ar71xx: fix trailing statements location
authorjuhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Fri, 12 Nov 2010 18:50:47 +0000 (18:50 +0000)
committerjuhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Fri, 12 Nov 2010 18:50:47 +0000 (18:50 +0000)
Signed-off-by: Arnaud Lacombe <lacombar@gmail.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@23976 3c298f89-4303-0410-b956-a3cf2f4a3e73

target/linux/ar71xx/files/arch/mips/ar71xx/ar71xx.c
target/linux/ar71xx/files/arch/mips/ar71xx/early_printk.c

index 5d05562..6c88985 100644 (file)
@@ -157,10 +157,12 @@ EXPORT_SYMBOL_GPL(ar71xx_device_stopped);
 void ar71xx_ddr_flush(u32 reg)
 {
        ar71xx_ddr_wr(reg, 1);
-       while ((ar71xx_ddr_rr(reg) & 0x1));
+       while ((ar71xx_ddr_rr(reg) & 0x1))
+               ;
 
        ar71xx_ddr_wr(reg, 1);
-       while ((ar71xx_ddr_rr(reg) & 0x1));
+       while ((ar71xx_ddr_rr(reg) & 0x1))
+               ;
 }
 EXPORT_SYMBOL_GPL(ar71xx_ddr_flush);
 
index 4661d97..76f69c5 100644 (file)
 
 void prom_putchar(unsigned char ch)
 {
-       while (((UART_READ(UART_LSR)) & UART_LSR_THRE) == 0);
+       while (((UART_READ(UART_LSR)) & UART_LSR_THRE) == 0)
+               ;
        UART_WRITE(UART_TX, ch);
-       while (((UART_READ(UART_LSR)) & UART_LSR_THRE) == 0);
+       while (((UART_READ(UART_LSR)) & UART_LSR_THRE) == 0)
+               ;
 }