cns3xxx: set both MPS 'and' MRSS to 128
[openwrt.git] / target / linux / lantiq / dts / TDW89X0.dtsi
index 30225d5..312a2d6 100644 (file)
                                        lantiq,open-drain = <0>;
                                        lantiq,output = <1>;
                                };
-                               spi {
-                                       lantiq,groups = "spi", "spi_cs4";
-                                       lantiq,function = "spi";
-                               };
                                pcie-rst {
                                        lantiq,pins = "io38";
                                        lantiq,pull = <0>;
                                        lantiq,output = <1>;
                                };
                        };
-               };
-
-               eth@E108000 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-                       compatible = "lantiq,xrx200-net";
-                       reg = < 0xE108000 0x3000 /* switch */
-                               0xE10B100 0x70 /* mdio */
-                               0xE10B1D8 0x30 /* mii */
-                               0xE10B308 0x30 /* pmac */
-                       >;
-                       interrupt-parent = <&icu0>;
-                       interrupts = <73 72>;
-
-                       lan: interface@0 {
-                               compatible = "lantiq,xrx200-pdi";
-                               #address-cells = <1>;
-                               #size-cells = <0>;
-                               reg = <0>;
-                               mtd-mac-address = <&ath9k_cal 0xf100>;
-                               lantiq,switch;
-
-                               ethernet@0 {
-                                       compatible = "lantiq,xrx200-pdi-port";
-                                       reg = <0>;
-                                       phy-mode = "rgmii";
-                                       phy-handle = <&phy0>;
-                                       // gpios = <&gpio 42 1>;
-                               };
-                               ethernet@5 {
-                                       compatible = "lantiq,xrx200-pdi-port";
-                                       reg = <5>;
-                                       phy-mode = "rgmii";
-                                       phy-handle = <&phy5>;
-                               };
-                               ethernet@2 {
-                                       compatible = "lantiq,xrx200-pdi-port";
-                                       reg = <2>;
-                                       phy-mode = "gmii";
-                                       phy-handle = <&phy11>;
-                               };
-                               ethernet@3 {
-                                       compatible = "lantiq,xrx200-pdi-port";
-                                       reg = <4>;
-                                       phy-mode = "gmii";
-                                       phy-handle = <&phy13>;
-                               };
-                       };
-
-                       mdio@0 {
-                               #address-cells = <1>;
-                               #size-cells = <0>;
-                               compatible = "lantiq,xrx200-mdio";
-                               phy0: ethernet-phy@0 {
-                                       reg = <0x0>;
-                                       compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
-                               };
-                               phy5: ethernet-phy@5 {
-                                       reg = <0x5>;
-                                       compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
-                               };
-                               phy11: ethernet-phy@11 {
-                                       reg = <0x11>;
-                                       compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+                       pins_spi_default: pins_spi_default {
+                               spi_in {
+                                       lantiq,groups = "spi_di";
+                                       lantiq,function = "spi";
                                };
-                               phy13: ethernet-phy@13 {
-                                       reg = <0x13>;
-                                       compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+                               spi_out {
+                                       lantiq,groups = "spi_do", "spi_clk",
+                                               "spi_cs4";
+                                       lantiq,function = "spi";
+                                       lantiq,output = <1>;
                                };
                        };
                };
                phys = [ 00 01 ];
        };
 
-       pcie {
-               compatible = "lantiq,pcie-xway";
-       };
-
        ath9k_eep {
                compatible = "ath9k,eeprom";
                ath,eep-flash = <&ath9k_cal 0x21000>;
 };
 
 &spi {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pins_spi_default>;
+
        status = "ok";
 
-       m25p80@3 {
+       m25p80@4 {
                #address-cells = <1>;
                #size-cells = <1>;
                compatible = "jedec,spi-nor";
-               reg = <3 0>;
+               reg = <4 0>;
                spi-max-frequency = <33250000>;
                m25p,fast-read;
 
                };
        };
 };
+
+&eth0 {
+       lan: interface@0 {
+               compatible = "lantiq,xrx200-pdi";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <0>;
+               mtd-mac-address = <&ath9k_cal 0xf100>;
+               lantiq,switch;
+
+               ethernet@0 {
+                       compatible = "lantiq,xrx200-pdi-port";
+                       reg = <0>;
+                       phy-mode = "rgmii";
+                       phy-handle = <&phy0>;
+                       // gpios = <&gpio 42 1>;
+               };
+               ethernet@5 {
+                       compatible = "lantiq,xrx200-pdi-port";
+                       reg = <5>;
+                       phy-mode = "rgmii";
+                       phy-handle = <&phy5>;
+               };
+               ethernet@2 {
+                       compatible = "lantiq,xrx200-pdi-port";
+                       reg = <2>;
+                       phy-mode = "gmii";
+                       phy-handle = <&phy11>;
+               };
+               ethernet@3 {
+                       compatible = "lantiq,xrx200-pdi-port";
+                       reg = <4>;
+                       phy-mode = "gmii";
+                       phy-handle = <&phy13>;
+               };
+       };
+
+       mdio@0 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "lantiq,xrx200-mdio";
+               phy0: ethernet-phy@0 {
+                       reg = <0x0>;
+                       compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+               };
+               phy5: ethernet-phy@5 {
+                       reg = <0x5>;
+                       compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+               };
+               phy11: ethernet-phy@11 {
+                       reg = <0x11>;
+                       compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+               };
+               phy13: ethernet-phy@13 {
+                       reg = <0x13>;
+                       compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+               };
+       };
+};