spi_pins: spi_pins {
mux {
pins = "gpio18", "gpio19", "gpio21";
-@@ -114,5 +132,19 @@
+@@ -91,5 +109,19 @@
sata@29000000 {
status = "ok";
};
/ {
model = "Qualcomm IPQ8064";
-@@ -329,5 +331,127 @@
- #reset-cells = <1>;
+@@ -333,6 +335,129 @@
+ compatible = "syscon";
+ reg = <0x01200600 0x100>;
};
-
++
+ pcie0: pci@1b500000 {
+ compatible = "qcom,pcie-v0";
+ reg = <0x1b500000 0x1000
+ #address-cells = <3>;
+ #size-cells = <2>;
+
-+ ranges = <0x81000000 0 0 0x0fe00000 0 0x00100000 /* downstream I/O */
-+ 0x82000000 0 0x00000000 0x08000000 0 0x07e00000>; /* non-prefetchable memory */
++ ranges = <0x81000000 0 0x0fe00000 0x0fe00000 0 0x00100000 /* downstream I/O */
++ 0x82000000 0 0x08000000 0x08000000 0 0x07e00000>; /* non-prefetchable memory */
+
+ interrupts = <GIC_SPI 35 IRQ_TYPE_NONE>;
+ interrupt-names = "msi";
+ #address-cells = <3>;
+ #size-cells = <2>;
+
-+ ranges = <0x81000000 0 0 0x31e00000 0 0x00100000 /* downstream I/O */
-+ 0x82000000 0 0x00000000 0x2e000000 0 0x03e00000>; /* non-prefetchable memory */
++ ranges = <0x81000000 0 0x31e00000 0x31e00000 0 0x00100000 /* downstream I/O */
++ 0x82000000 0 0x2e000000 0x2e000000 0 0x03e00000>; /* non-prefetchable memory */
+
+ interrupts = <GIC_SPI 57 IRQ_TYPE_NONE>;
+ interrupt-names = "msi";
+ #address-cells = <3>;
+ #size-cells = <2>;
+
-+ ranges = <0x81000000 0 0 0x35e00000 0 0x00100000 /* downstream I/O */
-+ 0x82000000 0 0x00000000 0x32000000 0 0x03e00000>; /* non-prefetchable memory */
++ ranges = <0x81000000 0 0x35e00000 0x35e00000 0 0x00100000 /* downstream I/O */
++ 0x82000000 0 0x32000000 0x32000000 0 0x03e00000>; /* non-prefetchable memory */
+
+ interrupts = <GIC_SPI 71 IRQ_TYPE_NONE>;
+ interrupt-names = "msi";
+ status = "disabled";
+ };
};
- };
+
+ sfpb_mutex: sfpb-mutex {