ar71xx: add kernel support for the OpenMesh OM5P-AC board
[openwrt.git] / target / linux / ar71xx / files / arch / mips / ath79 / dev-eth.c
index 2efb9c7..b43c80a 100644 (file)
@@ -183,7 +183,8 @@ void __init ath79_register_mdio(unsigned int id, u32 phy_mask)
            ath79_soc == ATH79_SOC_AR9342 ||
            ath79_soc == ATH79_SOC_AR9344 ||
            ath79_soc == ATH79_SOC_QCA9556 ||
-           ath79_soc == ATH79_SOC_QCA9558)
+           ath79_soc == ATH79_SOC_QCA9558 ||
+           ath79_soc == ATH79_SOC_QCA956X)
                max_id = 1;
        else
                max_id = 0;
@@ -270,6 +271,7 @@ void __init ath79_register_mdio(unsigned int id, u32 phy_mask)
        case ATH79_SOC_QCA956X:
                if (id == 1)
                        mdio_data->builtin_switch = 1;
+               mdio_data->is_ar934x = 1;
                break;
 
        default:
@@ -1122,16 +1124,25 @@ void __init ath79_register_eth(unsigned int id)
                if (id == 0) {
                        pdata->reset_bit = QCA955X_RESET_GE0_MAC |
                                           QCA955X_RESET_GE0_MDIO;
+
                        if (pdata->phy_if_mode == PHY_INTERFACE_MODE_SGMII)
                                pdata->set_speed = qca956x_set_speed_sgmii;
                        else
-                               /* FIXME */
-                               pdata->set_speed = ath79_set_speed_dummy;
+                               pdata->set_speed = ath79_set_speed_ge0;
                } else {
                        pdata->reset_bit = QCA955X_RESET_GE1_MAC |
                                           QCA955X_RESET_GE1_MDIO;
-                       /* FIXME */
+
                        pdata->set_speed = ath79_set_speed_dummy;
+
+                       pdata->switch_data = &ath79_switch_data;
+
+                       pdata->speed = SPEED_1000;
+                       pdata->duplex = DUPLEX_FULL;
+
+                       /* reset the built-in switch */
+                       ath79_device_reset_set(AR934X_RESET_ETH_SWITCH);
+                       ath79_device_reset_clear(AR934X_RESET_ETH_SWITCH);
                }
 
                pdata->ddr_flush = ath79_ddr_no_flush;
@@ -1195,6 +1206,11 @@ void __init ath79_register_eth(unsigned int id)
                        /* don't assign any MDIO device by default */
                        break;
 
+               case ATH79_SOC_QCA956X:
+                       if (pdata->phy_if_mode != PHY_INTERFACE_MODE_SGMII)
+                               pdata->mii_bus_dev = &ath79_mdio1_device.dev;
+                       break;
+
                default:
                        pdata->mii_bus_dev = &ath79_mdio0_device.dev;
                        break;