target/linux/xburst/patches-2.6.34/061-asoc.patch

   1 From d12d1c5f8615192b545faa69a553f64d4d9cc9ab Mon Sep 17 00:00:00 2001
   2 From: Lars-Peter Clausen <lars@metafoo.de>
   3 Date: Fri, 28 May 2010 19:54:02 +0200
   4 Subject: [PATCH] Add jz4740 SoC sound drivers
   5
   6 ---
   7  sound/soc/Kconfig             |    1 +
   8  sound/soc/Makefile            |    1 +
   9  sound/soc/jz4740/Kconfig      |   13 +
  10  sound/soc/jz4740/Makefile     |    9 +
  11  sound/soc/jz4740/jz4740-i2s.c |  568 +++++++++++++++++++++++++++++++++++++++++
  12  sound/soc/jz4740/jz4740-i2s.h |   18 ++
  13  sound/soc/jz4740/jz4740-pcm.c |  350 +++++++++++++++++++++++++
  14  sound/soc/jz4740/jz4740-pcm.h |   22 ++
  15  8 files changed, 982 insertions(+), 0 deletions(-)
  16  create mode 100644 sound/soc/jz4740/Kconfig
  17  create mode 100644 sound/soc/jz4740/Makefile
  18  create mode 100644 sound/soc/jz4740/jz4740-i2s.c
  19  create mode 100644 sound/soc/jz4740/jz4740-i2s.h
  20  create mode 100644 sound/soc/jz4740/jz4740-pcm.c
  21  create mode 100644 sound/soc/jz4740/jz4740-pcm.h
  22
  23 diff --git a/sound/soc/Kconfig b/sound/soc/Kconfig
  24 index b1749bc..5a7a724 100644
  25 --- a/sound/soc/Kconfig
  26 +++ b/sound/soc/Kconfig
  27 @@ -36,6 +36,7 @@ source "sound/soc/s3c24xx/Kconfig"
  28  source "sound/soc/s6000/Kconfig"
  29  source "sound/soc/sh/Kconfig"
  30  source "sound/soc/txx9/Kconfig"
  31 +source "sound/soc/jz4740/Kconfig"
  32
  33  # Supported codecs
  34  source "sound/soc/codecs/Kconfig"
  35 diff --git a/sound/soc/Makefile b/sound/soc/Makefile
  36 index 1470141..fdbe74d 100644
  37 --- a/sound/soc/Makefile
  38 +++ b/sound/soc/Makefile
  39 @@ -14,3 +14,4 @@ obj-$(CONFIG_SND_SOC) += s3c24xx/
  40  obj-$(CONFIG_SND_SOC)  += s6000/
  41  obj-$(CONFIG_SND_SOC)  += sh/
  42  obj-$(CONFIG_SND_SOC)  += txx9/
  43 +obj-$(CONFIG_SND_SOC)  += jz4740/
  44 diff --git a/sound/soc/jz4740/Kconfig b/sound/soc/jz4740/Kconfig
  45 new file mode 100644
  46 index 0000000..39df949
  47 --- /dev/null
  48 +++ b/sound/soc/jz4740/Kconfig
  49 @@ -0,0 +1,13 @@
  50 +config SND_JZ4740_SOC
  51 +       tristate "SoC Audio for Ingenic JZ4740 SoC"
  52 +       depends on SOC_JZ4740 && SND_SOC
  53 +       help
  54 +         Say Y or M if you want to add support for codecs attached to
  55 +         the Jz4740 AC97, I2S or SSP interface. You will also need
  56 +         to select the audio interfaces to support below.
  57 +
  58 +config SND_JZ4740_SOC_I2S
  59 +       depends on SND_JZ4740_SOC
  60 +       tristate "SoC Audio (I2S protocol) for Ingenic jz4740 chip"
  61 +       help
  62 +         Say Y if you want to use I2S protocol and I2S codec on Ingenic Jz4740 QI_LB60 board.
  63 diff --git a/sound/soc/jz4740/Makefile b/sound/soc/jz4740/Makefile
  64 new file mode 100644
  65 index 0000000..1be8d19
  66 --- /dev/null
  67 +++ b/sound/soc/jz4740/Makefile
  68 @@ -0,0 +1,9 @@
  69 +#
  70 +# Jz4740 Platform Support
  71 +#
  72 +snd-soc-jz4740-objs := jz4740-pcm.o
  73 +snd-soc-jz4740-i2s-objs := jz4740-i2s.o
  74 +
  75 +obj-$(CONFIG_SND_JZ4740_SOC) += snd-soc-jz4740.o
  76 +obj-$(CONFIG_SND_JZ4740_SOC_I2S) += snd-soc-jz4740-i2s.o
  77 +
  78 diff --git a/sound/soc/jz4740/jz4740-i2s.c b/sound/soc/jz4740/jz4740-i2s.c
  79 new file mode 100644
  80 index 0000000..2b139fd
  81 --- /dev/null
  82 +++ b/sound/soc/jz4740/jz4740-i2s.c
  83 @@ -0,0 +1,568 @@
  84 +/*
  85 + *  Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
  86 + *
  87 + *  This program is free software; you can redistribute         it and/or modify it
  88 + *  under  the terms of         the GNU General  Public License as published by the
  89 + *  Free Software Foundation;  either version 2 of the License, or (at your
  90 + *  option) any later version.
  91 + *
  92 + *  You should have received a copy of the  GNU General Public License along
  93 + *  with this program; if not, write  to the Free Software Foundation, Inc.,
  94 + *  675 Mass Ave, Cambridge, MA 02139, USA.
  95 + *
  96 + */
  97 +
  98 +#include <linux/init.h>
  99 +#include <linux/io.h>
 100 +#include <linux/kernel.h>
 101 +#include <linux/module.h>
 102 +#include <linux/platform_device.h>
 103 +#include <linux/slab.h>
 104 +
 105 +#include <linux/clk.h>
 106 +#include <linux/delay.h>
 107 +
 108 +#include <linux/dma-mapping.h>
 109 +
 110 +#include <sound/core.h>
 111 +#include <sound/pcm.h>
 112 +#include <sound/pcm_params.h>
 113 +#include <sound/soc.h>
 114 +#include <sound/soc-dapm.h>
 115 +#include <sound/initval.h>
 116 +
 117 +#include "jz4740-i2s.h"
 118 +#include "jz4740-pcm.h"
 119 +
 120 +#define JZ_REG_AIC_CONF                0x00
 121 +#define JZ_REG_AIC_CTRL                0x04
 122 +#define JZ_REG_AIC_I2S_FMT     0x10
 123 +#define JZ_REG_AIC_FIFO_STATUS 0x14
 124 +#define JZ_REG_AIC_I2S_STATUS  0x1c
 125 +#define JZ_REG_AIC_CLK_DIV     0x30
 126 +#define JZ_REG_AIC_FIFO                0x34
 127 +
 128 +#define JZ_AIC_CONF_FIFO_RX_THRESHOLD_MASK (0xf << 12)
 129 +#define JZ_AIC_CONF_FIFO_TX_THRESHOLD_MASK (0xf <<  8)
 130 +#define JZ_AIC_CONF_OVERFLOW_PLAY_LAST BIT(6)
 131 +#define JZ_AIC_CONF_INTERNAL_CODEC BIT(5)
 132 +#define JZ_AIC_CONF_I2S BIT(4)
 133 +#define JZ_AIC_CONF_RESET BIT(3)
 134 +#define JZ_AIC_CONF_BIT_CLK_MASTER BIT(2)
 135 +#define JZ_AIC_CONF_SYNC_CLK_MASTER BIT(1)
 136 +#define JZ_AIC_CONF_ENABLE BIT(0)
 137 +
 138 +#define JZ_AIC_CONF_FIFO_RX_THRESHOLD_OFFSET 12
 139 +#define JZ_AIC_CONF_FIFO_TX_THRESHOLD_OFFSET 8
 140 +
 141 +#define JZ_AIC_CTRL_OUTPUT_SAMPLE_SIZE_MASK (0x7 << 19)
 142 +#define JZ_AIC_CTRL_INPUT_SAMPLE_SIZE_MASK (0x7 << 16)
 143 +#define JZ_AIC_CTRL_ENABLE_RX_DMA BIT(15)
 144 +#define JZ_AIC_CTRL_ENABLE_TX_DMA BIT(14)
 145 +#define JZ_AIC_CTRL_MONO_TO_STEREO BIT(11)
 146 +#define JZ_AIC_CTRL_SWITCH_ENDIANNESS BIT(10)
 147 +#define JZ_AIC_CTRL_SIGNED_TO_UNSIGNED BIT(9)
 148 +#define JZ_AIC_CTRL_FLUSH              BIT(8)
 149 +#define JZ_AIC_CTRL_ENABLE_ROR_INT BIT(6)
 150 +#define JZ_AIC_CTRL_ENABLE_TUR_INT BIT(5)
 151 +#define JZ_AIC_CTRL_ENABLE_RFS_INT BIT(4)
 152 +#define JZ_AIC_CTRL_ENABLE_TFS_INT BIT(3)
 153 +#define JZ_AIC_CTRL_ENABLE_LOOPBACK BIT(2)
 154 +#define JZ_AIC_CTRL_ENABLE_PLAYBACK BIT(1)
 155 +#define JZ_AIC_CTRL_ENABLE_CAPTURE BIT(0)
 156 +
 157 +#define JZ_AIC_CTRL_OUTPUT_SAMPLE_SIZE_OFFSET 19
 158 +#define JZ_AIC_CTRL_INPUT_SAMPLE_SIZE_OFFSET  16
 159 +
 160 +#define JZ_AIC_I2S_FMT_DISABLE_BIT_CLK BIT(12)
 161 +#define JZ_AIC_I2S_FMT_ENABLE_SYS_CLK BIT(4)
 162 +#define JZ_AIC_I2S_FMT_MSB BIT(0)
 163 +
 164 +#define JZ_AIC_I2S_STATUS_BUSY BIT(2)
 165 +
 166 +#define JZ_AIC_CLK_DIV_MASK 0xf
 167 +
 168 +struct jz4740_i2s {
 169 +       struct resource *mem;
 170 +       void __iomem *base;
 171 +       dma_addr_t phys_base;
 172 +
 173 +       struct clk *clk_aic;
 174 +       struct clk *clk_i2s;
 175 +
 176 +       struct jz4740_pcm_config pcm_config_playback;
 177 +       struct jz4740_pcm_config pcm_config_capture;
 178 +};
 179 +
 180 +static inline uint32_t jz4740_i2s_read(const struct jz4740_i2s *i2s,
 181 +       unsigned int reg)
 182 +{
 183 +       return readl(i2s->base + reg);
 184 +}
 185 +
 186 +static inline void jz4740_i2s_write(const struct jz4740_i2s *i2s,
 187 +       unsigned int reg, uint32_t value)
 188 +{
 189 +       writel(value, i2s->base + reg);
 190 +}
 191 +
 192 +static inline struct jz4740_i2s *jz4740_dai_to_i2s(struct snd_soc_dai *dai)
 193 +{
 194 +       return dai->private_data;
 195 +}
 196 +
 197 +static int jz4740_i2s_startup(struct snd_pcm_substream *substream,
 198 +       struct snd_soc_dai *dai)
 199 +{
 200 +       struct jz4740_i2s *i2s = jz4740_dai_to_i2s(dai);
 201 +       uint32_t conf, ctrl;
 202 +
 203 +       if (dai->active)
 204 +               return 0;
 205 +
 206 +
 207 +       ctrl = jz4740_i2s_read(i2s, JZ_REG_AIC_CTRL);
 208 +       ctrl |= JZ_AIC_CTRL_FLUSH;
 209 +       jz4740_i2s_write(i2s, JZ_REG_AIC_CTRL, ctrl);
 210 +
 211 +       clk_enable(i2s->clk_i2s);
 212 +
 213 +       conf = jz4740_i2s_read(i2s, JZ_REG_AIC_CONF);
 214 +       conf |= JZ_AIC_CONF_ENABLE;
 215 +       jz4740_i2s_write(i2s, JZ_REG_AIC_CONF, conf);
 216 +
 217 +       return 0;
 218 +}
 219 +
 220 +static void jz4740_i2s_shutdown(struct snd_pcm_substream *substream,
 221 +       struct snd_soc_dai *dai)
 222 +{
 223 +       struct jz4740_i2s *i2s = jz4740_dai_to_i2s(dai);
 224 +       uint32_t conf;
 225 +
 226 +       if (!dai->active)
 227 +               return;
 228 +
 229 +       conf = jz4740_i2s_read(i2s, JZ_REG_AIC_CONF);
 230 +       conf &= ~JZ_AIC_CONF_ENABLE;
 231 +       jz4740_i2s_write(i2s, JZ_REG_AIC_CONF, conf);
 232 +
 233 +       clk_disable(i2s->clk_i2s);
 234 +}
 235 +
 236 +
 237 +static int jz4740_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
 238 +       struct snd_soc_dai *dai)
 239 +{
 240 +       struct jz4740_i2s *i2s = jz4740_dai_to_i2s(dai);
 241 +       bool playback = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
 242 +
 243 +       uint32_t ctrl;
 244 +       uint32_t mask;
 245 +
 246 +       if (playback)
 247 +               mask = JZ_AIC_CTRL_ENABLE_PLAYBACK | JZ_AIC_CTRL_ENABLE_TX_DMA;
 248 +       else
 249 +               mask = JZ_AIC_CTRL_ENABLE_CAPTURE | JZ_AIC_CTRL_ENABLE_RX_DMA;
 250 +
 251 +       ctrl = jz4740_i2s_read(i2s, JZ_REG_AIC_CTRL);
 252 +
 253 +       switch (cmd) {
 254 +       case SNDRV_PCM_TRIGGER_START:
 255 +       case SNDRV_PCM_TRIGGER_RESUME:
 256 +       case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 257 +               ctrl |= mask;
 258 +               break;
 259 +       case SNDRV_PCM_TRIGGER_STOP:
 260 +       case SNDRV_PCM_TRIGGER_SUSPEND:
 261 +       case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 262 +               ctrl &= ~mask;
 263 +               break;
 264 +       default:
 265 +               return -EINVAL;
 266 +       }
 267 +
 268 +       jz4740_i2s_write(i2s, JZ_REG_AIC_CTRL, ctrl);
 269 +
 270 +       return 0;
 271 +}
 272 +
 273 +
 274 +static int jz4740_i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
 275 +{
 276 +       struct jz4740_i2s *i2s = jz4740_dai_to_i2s(dai);
 277 +
 278 +       uint32_t format = 0;
 279 +       uint32_t conf;
 280 +
 281 +       conf = jz4740_i2s_read(i2s, JZ_REG_AIC_CONF);
 282 +
 283 +       conf &= ~(JZ_AIC_CONF_BIT_CLK_MASTER | JZ_AIC_CONF_SYNC_CLK_MASTER);
 284 +
 285 +       switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 286 +       case SND_SOC_DAIFMT_CBS_CFS:
 287 +               conf |= JZ_AIC_CONF_BIT_CLK_MASTER | JZ_AIC_CONF_SYNC_CLK_MASTER;
 288 +               format |= JZ_AIC_I2S_FMT_ENABLE_SYS_CLK;
 289 +               break;
 290 +       case SND_SOC_DAIFMT_CBM_CFS:
 291 +               conf |= JZ_AIC_CONF_SYNC_CLK_MASTER;
 292 +               break;
 293 +       case SND_SOC_DAIFMT_CBS_CFM:
 294 +               conf |= JZ_AIC_CONF_BIT_CLK_MASTER;
 295 +               break;
 296 +       case SND_SOC_DAIFMT_CBM_CFM:
 297 +               break;
 298 +       default:
 299 +               return -EINVAL;
 300 +       }
 301 +
 302 +       switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 303 +       case SND_SOC_DAIFMT_MSB:
 304 +               format |= JZ_AIC_I2S_FMT_MSB;
 305 +               break;
 306 +       case SND_SOC_DAIFMT_I2S:
 307 +               break;
 308 +       default:
 309 +               return -EINVAL;
 310 +       }
 311 +
 312 +       switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
 313 +       case SND_SOC_DAIFMT_NB_NF:
 314 +               break;
 315 +       default:
 316 +               return -EINVAL;
 317 +       }
 318 +
 319 +       jz4740_i2s_write(i2s, JZ_REG_AIC_CONF, conf);
 320 +       jz4740_i2s_write(i2s, JZ_REG_AIC_I2S_FMT, format);
 321 +
 322 +       return 0;
 323 +}
 324 +
 325 +static int jz4740_i2s_hw_params(struct snd_pcm_substream *substream,
 326 +       struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
 327 +{
 328 +       struct jz4740_i2s *i2s = jz4740_dai_to_i2s(dai);
 329 +       bool playback = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
 330 +       enum jz4740_dma_width dma_width;
 331 +       struct jz4740_pcm_config *pcm_config;
 332 +       unsigned int sample_size;
 333 +       uint32_t ctrl;
 334 +
 335 +       ctrl = jz4740_i2s_read(i2s, JZ_REG_AIC_CTRL);
 336 +
 337 +       switch (params_format(params)) {
 338 +       case SNDRV_PCM_FORMAT_S8:
 339 +               sample_size = 0;
 340 +               dma_width = JZ4740_DMA_WIDTH_8BIT;
 341 +               break;
 342 +       case SNDRV_PCM_FORMAT_S16:
 343 +               sample_size = 1;
 344 +               dma_width = JZ4740_DMA_WIDTH_16BIT;
 345 +               break;
 346 +       default:
 347 +               return -EINVAL;
 348 +       }
 349 +
 350 +       if (playback) {
 351 +               ctrl &= ~JZ_AIC_CTRL_OUTPUT_SAMPLE_SIZE_MASK;
 352 +               ctrl |= sample_size << JZ_AIC_CTRL_OUTPUT_SAMPLE_SIZE_OFFSET;
 353 +       } else {
 354 +               ctrl &= ~JZ_AIC_CTRL_INPUT_SAMPLE_SIZE_MASK;
 355 +               ctrl |= sample_size << JZ_AIC_CTRL_INPUT_SAMPLE_SIZE_OFFSET;
 356 +       }
 357 +
 358 +       switch (params_channels(params)) {
 359 +       case 2:
 360 +               break;
 361 +       case 1:
 362 +               if (playback) {
 363 +                       ctrl |= JZ_AIC_CTRL_MONO_TO_STEREO;
 364 +                       break;
 365 +               }
 366 +       default: /* Falltrough */
 367 +               return -EINVAL;
 368 +       }
 369 +
 370 +       jz4740_i2s_write(i2s, JZ_REG_AIC_CTRL, ctrl);
 371 +
 372 +       if (playback) {
 373 +               pcm_config = &i2s->pcm_config_playback;
 374 +               pcm_config->dma_config.dst_width = dma_width;
 375 +       } else {
 376 +               pcm_config = &i2s->pcm_config_capture;
 377 +               pcm_config->dma_config.src_width = dma_width;
 378 +       }
 379 +
 380 +
 381 +       snd_soc_dai_set_dma_data(dai, substream, pcm_config);
 382 +
 383 +       return 0;
 384 +}
 385 +
 386 +static int jz4740_i2s_set_clkdiv(struct snd_soc_dai *dai, int div_id, int div)
 387 +{
 388 +       struct jz4740_i2s *i2s = jz4740_dai_to_i2s(dai);
 389 +
 390 +       switch (div_id) {
 391 +       case JZ4740_I2S_BIT_CLK:
 392 +               if (div & 1 || div > 16)
 393 +                       return -EINVAL;
 394 +               jz4740_i2s_write(i2s, JZ_REG_AIC_CLK_DIV, div - 1);
 395 +               break;
 396 +       default:
 397 +               return -EINVAL;
 398 +       }
 399 +
 400 +       return 0;
 401 +}
 402 +
 403 +static int jz4740_i2s_set_sysclk(struct snd_soc_dai *dai, int clk_id,
 404 +       unsigned int freq, int dir)
 405 +{
 406 +       struct jz4740_i2s *i2s = jz4740_dai_to_i2s(dai);
 407 +       int ret = 0;
 408 +       struct clk *parent;
 409 +
 410 +       switch (clk_id) {
 411 +       case JZ4740_I2S_CLKSRC_EXT:
 412 +               parent = clk_get(NULL, "ext");
 413 +               clk_set_parent(i2s->clk_i2s, parent);
 414 +               break;
 415 +       case JZ4740_I2S_CLKSRC_PLL:
 416 +               parent = clk_get(NULL, "pll half");
 417 +               clk_set_parent(i2s->clk_i2s, parent);
 418 +               ret = clk_set_rate(i2s->clk_i2s, freq);
 419 +               break;
 420 +       default:
 421 +               return -EINVAL;
 422 +       }
 423 +       clk_put(parent);
 424 +
 425 +       return ret;
 426 +}
 427 +
 428 +static int jz4740_i2s_suspend(struct snd_soc_dai *dai)
 429 +{
 430 +       struct jz4740_i2s *i2s = jz4740_dai_to_i2s(dai);
 431 +       uint32_t conf;
 432 +
 433 +       if (dai->active) {
 434 +               conf = jz4740_i2s_read(i2s, JZ_REG_AIC_CONF);
 435 +               conf &= ~JZ_AIC_CONF_ENABLE;
 436 +               jz4740_i2s_write(i2s, JZ_REG_AIC_CONF, conf);
 437 +
 438 +               clk_disable(i2s->clk_i2s);
 439 +       }
 440 +
 441 +       clk_disable(i2s->clk_aic);
 442 +
 443 +       return 0;
 444 +}
 445 +
 446 +static int jz4740_i2s_resume(struct snd_soc_dai *dai)
 447 +{
 448 +       struct jz4740_i2s *i2s = jz4740_dai_to_i2s(dai);
 449 +       uint32_t conf;
 450 +
 451 +       clk_enable(i2s->clk_aic);
 452 +
 453 +       if (dai->active) {
 454 +               clk_enable(i2s->clk_i2s);
 455 +
 456 +               conf = jz4740_i2s_read(i2s, JZ_REG_AIC_CONF);
 457 +               conf |= JZ_AIC_CONF_ENABLE;
 458 +               jz4740_i2s_write(i2s, JZ_REG_AIC_CONF, conf);
 459 +
 460 +       }
 461 +
 462 +       return 0;
 463 +}
 464 +
 465 +static int jz4740_i2s_probe(struct platform_device *pdev, struct snd_soc_dai *dai)
 466 +{
 467 +       struct jz4740_i2s *i2s = jz4740_dai_to_i2s(dai);
 468 +       uint32_t conf;
 469 +
 470 +       conf = (7 << JZ_AIC_CONF_FIFO_RX_THRESHOLD_OFFSET) |
 471 +               (8 << JZ_AIC_CONF_FIFO_TX_THRESHOLD_OFFSET) |
 472 +               JZ_AIC_CONF_OVERFLOW_PLAY_LAST |
 473 +               JZ_AIC_CONF_I2S |
 474 +               JZ_AIC_CONF_INTERNAL_CODEC;
 475 +
 476 +       jz4740_i2s_write(i2s, JZ_REG_AIC_CONF, JZ_AIC_CONF_RESET);
 477 +       jz4740_i2s_write(i2s, JZ_REG_AIC_CONF, conf);
 478 +
 479 +       return 0;
 480 +}
 481 +
 482 +
 483 +static struct snd_soc_dai_ops jz4740_i2s_dai_ops = {
 484 +       .startup = jz4740_i2s_startup,
 485 +       .shutdown = jz4740_i2s_shutdown,
 486 +       .trigger = jz4740_i2s_trigger,
 487 +       .hw_params = jz4740_i2s_hw_params,
 488 +       .set_fmt = jz4740_i2s_set_fmt,
 489 +       .set_clkdiv = jz4740_i2s_set_clkdiv,
 490 +       .set_sysclk = jz4740_i2s_set_sysclk,
 491 +};
 492 +
 493 +#define JZ4740_I2S_FMTS (SNDRV_PCM_FMTBIT_S8 | \
 494 +               SNDRV_PCM_FMTBIT_S16_LE)
 495 +
 496 +struct snd_soc_dai jz4740_i2s_dai = {
 497 +       .name = "jz4740-i2s",
 498 +       .probe = jz4740_i2s_probe,
 499 +       .playback = {
 500 +               .channels_min = 1,
 501 +               .channels_max = 2,
 502 +               .rates = SNDRV_PCM_RATE_8000_48000,
 503 +               .formats = JZ4740_I2S_FMTS,
 504 +       },
 505 +       .capture = {
 506 +               .channels_min = 2,
 507 +               .channels_max = 2,
 508 +               .rates = SNDRV_PCM_RATE_8000_48000,
 509 +               .formats = JZ4740_I2S_FMTS,
 510 +       },
 511 +       .symmetric_rates = 1,
 512 +       .ops = &jz4740_i2s_dai_ops,
 513 +       .suspend = jz4740_i2s_suspend,
 514 +       .resume = jz4740_i2s_resume,
 515 +};
 516 +EXPORT_SYMBOL_GPL(jz4740_i2s_dai);
 517 +
 518 +static void __devinit jz4740_i2c_init_pcm_config(struct jz4740_i2s *i2s)
 519 +{
 520 +       struct jz4740_dma_config *dma_config;
 521 +
 522 +       /* Playback */
 523 +       dma_config = &i2s->pcm_config_playback.dma_config;
 524 +       dma_config->src_width = JZ4740_DMA_WIDTH_32BIT,
 525 +       dma_config->transfer_size = JZ4740_DMA_TRANSFER_SIZE_16BYTE;
 526 +       dma_config->request_type = JZ4740_DMA_TYPE_AIC_TRANSMIT;
 527 +       dma_config->flags = JZ4740_DMA_SRC_AUTOINC;
 528 +       dma_config->mode = JZ4740_DMA_MODE_SINGLE;
 529 +       i2s->pcm_config_playback.fifo_addr = i2s->phys_base + JZ_REG_AIC_FIFO;
 530 +
 531 +       /* Capture */
 532 +       dma_config = &i2s->pcm_config_capture.dma_config;
 533 +       dma_config->dst_width = JZ4740_DMA_WIDTH_32BIT,
 534 +       dma_config->transfer_size = JZ4740_DMA_TRANSFER_SIZE_16BYTE;
 535 +       dma_config->request_type = JZ4740_DMA_TYPE_AIC_RECEIVE;
 536 +       dma_config->flags = JZ4740_DMA_DST_AUTOINC;
 537 +       dma_config->mode = JZ4740_DMA_MODE_SINGLE;
 538 +       i2s->pcm_config_capture.fifo_addr = i2s->phys_base + JZ_REG_AIC_FIFO;
 539 +}
 540 +
 541 +static int __devinit jz4740_i2s_dev_probe(struct platform_device *pdev)
 542 +{
 543 +       struct jz4740_i2s *i2s;
 544 +       int ret;
 545 +
 546 +       i2s = kzalloc(sizeof(*i2s), GFP_KERNEL);
 547 +
 548 +       if (!i2s)
 549 +               return -ENOMEM;
 550 +
 551 +       i2s->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 552 +
 553 +       if (!i2s->mem) {
 554 +               ret = -ENOENT;
 555 +               goto err_free;
 556 +       }
 557 +
 558 +       i2s->mem = request_mem_region(i2s->mem->start, resource_size(i2s->mem),
 559 +                               pdev->name);
 560 +
 561 +       if (!i2s->mem) {
 562 +               ret = -EBUSY;
 563 +               goto err_free;
 564 +       }
 565 +
 566 +       i2s->base = ioremap_nocache(i2s->mem->start, resource_size(i2s->mem));
 567 +
 568 +       if (!i2s->base) {
 569 +               ret = -EBUSY;
 570 +               goto err_release_mem_region;
 571 +       }
 572 +
 573 +       i2s->phys_base = i2s->mem->start;
 574 +
 575 +       i2s->clk_aic = clk_get(&pdev->dev, "aic");
 576 +       if (IS_ERR(i2s->clk_aic)) {
 577 +               ret = PTR_ERR(i2s->clk_aic);
 578 +               goto err_iounmap;
 579 +       }
 580 +
 581 +       i2s->clk_i2s = clk_get(&pdev->dev, "i2s");
 582 +       if (IS_ERR(i2s->clk_i2s)) {
 583 +               ret = PTR_ERR(i2s->clk_i2s);
 584 +               goto err_iounmap;
 585 +       }
 586 +
 587 +       clk_enable(i2s->clk_aic);
 588 +
 589 +       jz4740_i2c_init_pcm_config(i2s);
 590 +
 591 +       jz4740_i2s_dai.private_data = i2s;
 592 +       ret = snd_soc_register_dai(&jz4740_i2s_dai);
 593 +
 594 +       platform_set_drvdata(pdev, i2s);
 595 +
 596 +       return 0;
 597 +
 598 +err_iounmap:
 599 +       iounmap(i2s->base);
 600 +err_release_mem_region:
 601 +       release_mem_region(i2s->mem->start, resource_size(i2s->mem));
 602 +err_free:
 603 +       kfree(i2s);
 604 +
 605 +       return ret;
 606 +}
 607 +
 608 +static int __devexit jz4740_i2s_dev_remove(struct platform_device *pdev)
 609 +{
 610 +       struct jz4740_i2s *i2s = platform_get_drvdata(pdev);
 611 +
 612 +       snd_soc_unregister_dai(&jz4740_i2s_dai);
 613 +
 614 +       clk_disable(i2s->clk_aic);
 615 +       clk_put(i2s->clk_i2s);
 616 +       clk_put(i2s->clk_aic);
 617 +
 618 +       iounmap(i2s->base);
 619 +       release_mem_region(i2s->mem->start, resource_size(i2s->mem));
 620 +
 621 +       platform_set_drvdata(pdev, NULL);
 622 +       kfree(i2s);
 623 +
 624 +       return 0;
 625 +}
 626 +
 627 +static struct platform_driver jz4740_i2s_driver = {
 628 +       .probe = jz4740_i2s_dev_probe,
 629 +       .remove = __devexit_p(jz4740_i2s_dev_remove),
 630 +       .driver = {
 631 +               .name = "jz4740-i2s",
 632 +               .owner = THIS_MODULE,
 633 +       },
 634 +};
 635 +
 636 +static int __init jz4740_i2s_init(void)
 637 +{
 638 +       return platform_driver_register(&jz4740_i2s_driver);
 639 +}
 640 +module_init(jz4740_i2s_init);
 641 +
 642 +static void __exit jz4740_i2s_exit(void)
 643 +{
 644 +       platform_driver_unregister(&jz4740_i2s_driver);
 645 +}
 646 +module_exit(jz4740_i2s_exit);
 647 +
 648 +MODULE_AUTHOR("Lars-Peter Clausen, <lars@metafoo.de>");
 649 +MODULE_DESCRIPTION("Ingenic JZ4740 SoC I2S driver");
 650 +MODULE_LICENSE("GPL");
 651 +MODULE_ALIAS("platform:jz4740-i2s");
 652 diff --git a/sound/soc/jz4740/jz4740-i2s.h b/sound/soc/jz4740/jz4740-i2s.h
 653 new file mode 100644
 654 index 0000000..da22ed8
 655 --- /dev/null
 656 +++ b/sound/soc/jz4740/jz4740-i2s.h
 657 @@ -0,0 +1,18 @@
 658 +/*
 659 + * This program is free software; you can redistribute it and/or modify
 660 + * it under the terms of the GNU General Public License version 2 as
 661 + * published by the Free Software Foundation.
 662 + */
 663 +
 664 +#ifndef _JZ4740_I2S_H
 665 +#define _JZ4740_I2S_H
 666 +
 667 +/* I2S clock source */
 668 +#define JZ4740_I2S_CLKSRC_EXT 0
 669 +#define JZ4740_I2S_CLKSRC_PLL 1
 670 +
 671 +#define JZ4740_I2S_BIT_CLK             0
 672 +
 673 +extern struct snd_soc_dai jz4740_i2s_dai;
 674 +
 675 +#endif
 676 diff --git a/sound/soc/jz4740/jz4740-pcm.c b/sound/soc/jz4740/jz4740-pcm.c
 677 new file mode 100644
 678 index 0000000..fd1c203
 679 --- /dev/null
 680 +++ b/sound/soc/jz4740/jz4740-pcm.c
 681 @@ -0,0 +1,350 @@
 682 +/*
 683 + *  Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
 684 + *
 685 + *  This program is free software; you can redistribute         it and/or modify it
 686 + *  under  the terms of         the GNU General  Public License as published by the
 687 + *  Free Software Foundation;  either version 2 of the License, or (at your
 688 + *  option) any later version.
 689 + *
 690 + *  You should have received a copy of the  GNU General Public License along
 691 + *  with this program; if not, write  to the Free Software Foundation, Inc.,
 692 + *  675 Mass Ave, Cambridge, MA 02139, USA.
 693 + *
 694 + */
 695 +
 696 +#include <linux/init.h>
 697 +#include <linux/interrupt.h>
 698 +#include <linux/kernel.h>
 699 +#include <linux/module.h>
 700 +#include <linux/slab.h>
 701 +
 702 +#include <linux/dma-mapping.h>
 703 +
 704 +#include <sound/core.h>
 705 +#include <sound/pcm.h>
 706 +#include <sound/pcm_params.h>
 707 +#include <sound/soc.h>
 708 +
 709 +#include <asm/mach-jz4740/dma.h>
 710 +#include "jz4740-pcm.h"
 711 +
 712 +struct jz4740_runtime_data {
 713 +       unsigned int dma_period;
 714 +       dma_addr_t dma_start;
 715 +       dma_addr_t dma_pos;
 716 +       dma_addr_t dma_end;
 717 +
 718 +       struct jz4740_dma_chan *dma;
 719 +
 720 +       dma_addr_t fifo_addr;
 721 +};
 722 +
 723 +/* identify hardware playback capabilities */
 724 +static const struct snd_pcm_hardware jz4740_pcm_hardware = {
 725 +       .info = SNDRV_PCM_INFO_MMAP |
 726 +               SNDRV_PCM_INFO_MMAP_VALID |
 727 +               SNDRV_PCM_INFO_INTERLEAVED |
 728 +               SNDRV_PCM_INFO_BLOCK_TRANSFER,
 729 +       .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8,
 730 +
 731 +       .rates                  = SNDRV_PCM_RATE_8000_48000,
 732 +       .channels_min           = 1,
 733 +       .channels_max           = 2,
 734 +       .period_bytes_min       = 16,
 735 +       .period_bytes_max       = 2 * PAGE_SIZE,
 736 +       .periods_min            = 2,
 737 +       .periods_max            = 128,
 738 +       .buffer_bytes_max       = 128 * 2 * PAGE_SIZE,
 739 +       .fifo_size              = 32,
 740 +};
 741 +
 742 +static void jz4740_pcm_start_transfer(struct jz4740_runtime_data *prtd, int stream)
 743 +{
 744 +       unsigned int count;
 745 +
 746 +       if (prtd->dma_pos + prtd->dma_period > prtd->dma_end)
 747 +               count = prtd->dma_end - prtd->dma_pos;
 748 +       else
 749 +               count = prtd->dma_period;
 750 +
 751 +       jz4740_dma_disable(prtd->dma);
 752 +
 753 +       if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
 754 +               jz4740_dma_set_src_addr(prtd->dma, prtd->dma_pos);
 755 +               jz4740_dma_set_dst_addr(prtd->dma, prtd->fifo_addr);
 756 +       } else {
 757 +               jz4740_dma_set_src_addr(prtd->dma, prtd->fifo_addr);
 758 +               jz4740_dma_set_dst_addr(prtd->dma, prtd->dma_pos);
 759 +       }
 760 +
 761 +       jz4740_dma_set_transfer_count(prtd->dma, count);
 762 +
 763 +       jz4740_dma_enable(prtd->dma);
 764 +
 765 +       prtd->dma_pos += prtd->dma_period;
 766 +       if (prtd->dma_pos >= prtd->dma_end)
 767 +               prtd->dma_pos = prtd->dma_start;
 768 +}
 769 +
 770 +static void jz4740_pcm_dma_transfer_done(struct jz4740_dma_chan *dma, int err,
 771 +       void *dev_id)
 772 +{
 773 +       struct snd_pcm_substream *substream = dev_id;
 774 +       struct snd_pcm_runtime *runtime = substream->runtime;
 775 +       struct jz4740_runtime_data *prtd = runtime->private_data;
 776 +
 777 +       snd_pcm_period_elapsed(substream);
 778 +
 779 +       jz4740_pcm_start_transfer(prtd, substream->stream);
 780 +}
 781 +
 782 +static int jz4740_pcm_hw_params(struct snd_pcm_substream *substream,
 783 +       struct snd_pcm_hw_params *params)
 784 +{
 785 +       struct snd_pcm_runtime *runtime = substream->runtime;
 786 +       struct jz4740_runtime_data *prtd = runtime->private_data;
 787 +       struct snd_soc_pcm_runtime *rtd = substream->private_data;
 788 +       struct jz4740_pcm_config *config;
 789 +
 790 +       config = snd_soc_dai_get_dma_data(rtd->dai->cpu_dai, substream);
 791 +       if (!prtd->dma) {
 792 +               const char *dma_channel_name;
 793 +               if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 794 +                       dma_channel_name = "PCM Playback";
 795 +               else
 796 +                       dma_channel_name = "PCM Capture";
 797 +
 798 +               prtd->dma = jz4740_dma_request(substream, dma_channel_name);
 799 +       }
 800 +
 801 +       if (!prtd->dma)
 802 +               return -EBUSY;
 803 +
 804 +       jz4740_dma_configure(prtd->dma, &config->dma_config);
 805 +       prtd->fifo_addr = config->fifo_addr;
 806 +
 807 +       jz4740_dma_set_complete_cb(prtd->dma, jz4740_pcm_dma_transfer_done);
 808 +
 809 +       snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
 810 +       runtime->dma_bytes = params_buffer_bytes(params);
 811 +
 812 +       prtd->dma_period = params_period_bytes(params);
 813 +       prtd->dma_start = runtime->dma_addr;
 814 +       prtd->dma_pos = prtd->dma_start;
 815 +       prtd->dma_end = prtd->dma_start + runtime->dma_bytes;
 816 +
 817 +       return 0;
 818 +}
 819 +
 820 +static int jz4740_pcm_hw_free(struct snd_pcm_substream *substream)
 821 +{
 822 +       struct jz4740_runtime_data *prtd = substream->runtime->private_data;
 823 +
 824 +       snd_pcm_set_runtime_buffer(substream, NULL);
 825 +       if (prtd->dma) {
 826 +               jz4740_dma_free(prtd->dma);
 827 +               prtd->dma = NULL;
 828 +       }
 829 +
 830 +       return 0;
 831 +}
 832 +
 833 +static int jz4740_pcm_prepare(struct snd_pcm_substream *substream)
 834 +{
 835 +       struct jz4740_runtime_data *prtd = substream->runtime->private_data;
 836 +       int ret = 0;
 837 +
 838 +       if (!prtd->dma)
 839 +                       return 0;
 840 +
 841 +       prtd->dma_pos = prtd->dma_start;
 842 +
 843 +       return ret;
 844 +}
 845 +
 846 +static int jz4740_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
 847 +{
 848 +       struct snd_pcm_runtime *runtime = substream->runtime;
 849 +       struct jz4740_runtime_data *prtd = runtime->private_data;
 850 +
 851 +       int ret = 0;
 852 +
 853 +       switch (cmd) {
 854 +       case SNDRV_PCM_TRIGGER_START:
 855 +       case SNDRV_PCM_TRIGGER_RESUME:
 856 +       case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 857 +               jz4740_pcm_start_transfer(prtd, substream->stream);
 858 +               break;
 859 +       case SNDRV_PCM_TRIGGER_STOP:
 860 +       case SNDRV_PCM_TRIGGER_SUSPEND:
 861 +       case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 862 +               jz4740_dma_disable(prtd->dma);
 863 +               break;
 864 +       default:
 865 +               ret = -EINVAL;
 866 +       }
 867 +
 868 +       return ret;
 869 +}
 870 +
 871 +static snd_pcm_uframes_t jz4740_pcm_pointer(struct snd_pcm_substream *substream)
 872 +{
 873 +       struct snd_pcm_runtime *runtime = substream->runtime;
 874 +       struct jz4740_runtime_data *prtd = runtime->private_data;
 875 +       unsigned long count, pos;
 876 +       snd_pcm_uframes_t offset;
 877 +       struct jz4740_dma_chan *dma = prtd->dma;
 878 +
 879 +       count = jz4740_dma_get_residue(dma);
 880 +       if (prtd->dma_pos == prtd->dma_start)
 881 +               pos = prtd->dma_end - prtd->dma_start - count;
 882 +       else
 883 +               pos = prtd->dma_pos - prtd->dma_start - count;
 884 +
 885 +       offset = bytes_to_frames(runtime, pos);
 886 +       if (offset >= runtime->buffer_size)
 887 +               offset = 0;
 888 +
 889 +       return offset;
 890 +}
 891 +
 892 +static int jz4740_pcm_open(struct snd_pcm_substream *substream)
 893 +{
 894 +       struct snd_pcm_runtime *runtime = substream->runtime;
 895 +       struct jz4740_runtime_data *prtd;
 896 +
 897 +       snd_soc_set_runtime_hwparams(substream, &jz4740_pcm_hardware);
 898 +       prtd = kzalloc(sizeof(struct jz4740_runtime_data), GFP_KERNEL);
 899 +
 900 +       if (prtd == NULL)
 901 +               return -ENOMEM;
 902 +
 903 +       runtime->private_data = prtd;
 904 +       return 0;
 905 +}
 906 +
 907 +static int jz4740_pcm_close(struct snd_pcm_substream *substream)
 908 +{
 909 +       struct snd_pcm_runtime *runtime = substream->runtime;
 910 +       struct jz4740_runtime_data *prtd = runtime->private_data;
 911 +
 912 +       kfree(prtd);
 913 +
 914 +       return 0;
 915 +}
 916 +
 917 +static int jz4740_pcm_mmap(struct snd_pcm_substream *substream,
 918 +       struct vm_area_struct *vma)
 919 +{
 920 +       return remap_pfn_range(vma, vma->vm_start,
 921 +                       substream->dma_buffer.addr >> PAGE_SHIFT,
 922 +                       vma->vm_end - vma->vm_start, vma->vm_page_prot);
 923 +}
 924 +
 925 +static struct snd_pcm_ops jz4740_pcm_ops = {
 926 +       .open           = jz4740_pcm_open,
 927 +       .close          = jz4740_pcm_close,
 928 +       .ioctl          = snd_pcm_lib_ioctl,
 929 +       .hw_params      = jz4740_pcm_hw_params,
 930 +       .hw_free        = jz4740_pcm_hw_free,
 931 +       .prepare        = jz4740_pcm_prepare,
 932 +       .trigger        = jz4740_pcm_trigger,
 933 +       .pointer        = jz4740_pcm_pointer,
 934 +       .mmap           = jz4740_pcm_mmap,
 935 +};
 936 +
 937 +static int jz4740_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream)
 938 +{
 939 +       struct snd_pcm_substream *substream = pcm->streams[stream].substream;
 940 +       struct snd_dma_buffer *buf = &substream->dma_buffer;
 941 +       size_t size = jz4740_pcm_hardware.buffer_bytes_max;
 942 +
 943 +       buf->dev.type = SNDRV_DMA_TYPE_DEV;
 944 +       buf->dev.dev = pcm->card->dev;
 945 +       buf->private_data = NULL;
 946 +
 947 +       buf->area = dma_alloc_noncoherent(pcm->card->dev, size,
 948 +                                         &buf->addr, GFP_KERNEL);
 949 +       if (!buf->area)
 950 +               return -ENOMEM;
 951 +
 952 +       buf->bytes = size;
 953 +
 954 +       return 0;
 955 +}
 956 +
 957 +static void jz4740_pcm_free(struct snd_pcm *pcm)
 958 +{
 959 +       struct snd_pcm_substream *substream;
 960 +       struct snd_dma_buffer *buf;
 961 +       int stream;
 962 +
 963 +       for (stream = 0; stream < 2; stream++) {
 964 +               substream = pcm->streams[stream].substream;
 965 +               if (!substream)
 966 +                       continue;
 967 +
 968 +               buf = &substream->dma_buffer;
 969 +               if (!buf->area)
 970 +                       continue;
 971 +
 972 +               dma_free_noncoherent(pcm->card->dev, buf->bytes,
 973 +                 buf->area, buf->addr);
 974 +               buf->area = NULL;
 975 +       }
 976 +}
 977 +
 978 +static u64 jz4740_pcm_dmamask = DMA_BIT_MASK(32);
 979 +
 980 +int jz4740_pcm_new(struct snd_card *card, struct snd_soc_dai *dai,
 981 +       struct snd_pcm *pcm)
 982 +{
 983 +       int ret = 0;
 984 +
 985 +       if (!card->dev->dma_mask)
 986 +               card->dev->dma_mask = &jz4740_pcm_dmamask;
 987 +
 988 +       if (!card->dev->coherent_dma_mask)
 989 +               card->dev->coherent_dma_mask = DMA_BIT_MASK(32);
 990 +
 991 +       if (dai->playback.channels_min) {
 992 +               ret = jz4740_pcm_preallocate_dma_buffer(pcm,
 993 +                       SNDRV_PCM_STREAM_PLAYBACK);
 994 +               if (ret)
 995 +                       goto err;
 996 +       }
 997 +
 998 +       if (dai->capture.channels_min) {
 999 +               ret = jz4740_pcm_preallocate_dma_buffer(pcm,
1000 +                       SNDRV_PCM_STREAM_CAPTURE);
1001 +               if (ret)
1002 +                       goto err;
1003 +       }
1004 +
1005 +err:
1006 +       return ret;
1007 +}
1008 +
1009 +struct snd_soc_platform jz4740_soc_platform = {
1010 +               .name           = "jz4740-pcm",
1011 +               .pcm_ops        = &jz4740_pcm_ops,
1012 +               .pcm_new        = jz4740_pcm_new,
1013 +               .pcm_free       = jz4740_pcm_free,
1014 +};
1015 +EXPORT_SYMBOL_GPL(jz4740_soc_platform);
1016 +
1017 +static int __init jz4740_soc_platform_init(void)
1018 +{
1019 +       return snd_soc_register_platform(&jz4740_soc_platform);
1020 +}
1021 +module_init(jz4740_soc_platform_init);
1022 +
1023 +static void __exit jz4740_soc_platform_exit(void)
1024 +{
1025 +       snd_soc_unregister_platform(&jz4740_soc_platform);
1026 +}
1027 +module_exit(jz4740_soc_platform_exit);
1028 +
1029 +MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
1030 +MODULE_DESCRIPTION("Ingenic SoC JZ4740 PCM driver");
1031 +MODULE_LICENSE("GPL");
1032 diff --git a/sound/soc/jz4740/jz4740-pcm.h b/sound/soc/jz4740/jz4740-pcm.h
1033 new file mode 100644
1034 index 0000000..e3f221e
1035 --- /dev/null
1036 +++ b/sound/soc/jz4740/jz4740-pcm.h
1037 @@ -0,0 +1,22 @@
1038 +/*
1039 + *
1040 + * This program is free software; you can redistribute it and/or modify
1041 + * it under the terms of the GNU General Public License version 2 as
1042 + * published by the Free Software Foundation.
1043 + */
1044 +
1045 +#ifndef _JZ4740_PCM_H
1046 +#define _JZ4740_PCM_H
1047 +
1048 +#include <linux/dma-mapping.h>
1049 +#include <asm/mach-jz4740/dma.h>
1050 +
1051 +/* platform data */
1052 +extern struct snd_soc_platform jz4740_soc_platform;
1053 +
1054 +struct jz4740_pcm_config {
1055 +       struct jz4740_dma_config dma_config;
1056 +       phys_addr_t fifo_addr;
1057 +};
1058 +
1059 +#endif
1060 --
1061 1.5.6.5
1062