sunxi: update pcDuino3 profile to the new u-boot
[15.05/openwrt.git] / target / linux / sunxi / patches-3.14 / 210-mfd-add-axp20x-pmic-driver.patch
1 From 509326e0138b762067904c0c60f818e9bdba4cd4 Mon Sep 17 00:00:00 2001
2 From: Carlo Caione <carlo@caione.org>
3 Date: Sat, 1 Mar 2014 17:45:46 +0100
4 Subject: [PATCH] mfd: AXP20x: Add mfd driver for AXP20x PMIC
5
6 This patch introduces the preliminary support for PMICs X-Powers AXP202
7 and AXP209. The AXP209 and AXP202 are the PMUs (Power Management Unit)
8 used by A10, A13 and A20 SoCs and developed by X-Powers, a sister company
9 of Allwinner.
10
11 The core enables support for two subsystems:
12 - PEK (Power Enable Key)
13 - Regulators
14
15 Signed-off-by: Carlo Caione <carlo@caione.org>
16 ---
17  arch/arm/configs/sunxi_defconfig |   1 +
18  drivers/mfd/Kconfig              |  12 ++
19  drivers/mfd/Makefile             |   1 +
20  drivers/mfd/axp20x.c             | 250 +++++++++++++++++++++++++++++++++++++++
21  include/linux/mfd/axp20x.h       | 180 ++++++++++++++++++++++++++++
22  5 files changed, 444 insertions(+)
23  create mode 100644 drivers/mfd/axp20x.c
24  create mode 100644 include/linux/mfd/axp20x.h
25
26 diff --git a/arch/arm/configs/sunxi_defconfig b/arch/arm/configs/sunxi_defconfig
27 index b5df4a5..d25660d 100644
28 --- a/arch/arm/configs/sunxi_defconfig
29 +++ b/arch/arm/configs/sunxi_defconfig
30 @@ -55,6 +55,7 @@ CONFIG_GPIO_SYSFS=y
31  # CONFIG_HWMON is not set
32  CONFIG_WATCHDOG=y
33  CONFIG_SUNXI_WATCHDOG=y
34 +CONFIG_MFD_AXP20X=y
35  # CONFIG_USB_SUPPORT is not set
36  CONFIG_NEW_LEDS=y
37  CONFIG_LEDS_CLASS=y
38 diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
39 index 49bb445..24ba61a 100644
40 --- a/drivers/mfd/Kconfig
41 +++ b/drivers/mfd/Kconfig
42 @@ -59,6 +59,18 @@ config MFD_AAT2870_CORE
43           additional drivers must be enabled in order to use the
44           functionality of the device.
45  
46 +config MFD_AXP20X
47 +       bool "X-Powers AXP20X"
48 +       select MFD_CORE
49 +       select REGMAP_I2C
50 +       select REGMAP_IRQ
51 +       depends on I2C=y
52 +       help
53 +         If you say Y here you get support for the AXP20X.
54 +         This driver provides common support for accessing the device,
55 +         additional drivers must be enabled in order to use the
56 +         functionality of the device.
57 +
58  config MFD_CROS_EC
59         tristate "ChromeOS Embedded Controller"
60         select MFD_CORE
61 diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
62 index 5aea5ef..fb773b5 100644
63 --- a/drivers/mfd/Makefile
64 +++ b/drivers/mfd/Makefile
65 @@ -101,6 +101,7 @@ obj-$(CONFIG_PMIC_DA9052)   += da9052-irq.o
66  obj-$(CONFIG_PMIC_DA9052)      += da9052-core.o
67  obj-$(CONFIG_MFD_DA9052_SPI)   += da9052-spi.o
68  obj-$(CONFIG_MFD_DA9052_I2C)   += da9052-i2c.o
69 +obj-$(CONFIG_MFD_AXP20X)       += axp20x.o
70  
71  obj-$(CONFIG_MFD_LP3943)       += lp3943.o
72  obj-$(CONFIG_MFD_LP8788)       += lp8788.o lp8788-irq.o
73 diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c
74 new file mode 100644
75 index 0000000..92e5b0f
76 --- /dev/null
77 +++ b/drivers/mfd/axp20x.c
78 @@ -0,0 +1,250 @@
79 +/*
80 + * axp20x.c - mfd core driver for the X-Powers AXP202 and AXP209
81 + *
82 + * Author: Carlo Caione <carlo@caione.org>
83 + *
84 + * This program is free software; you can redistribute it and/or modify
85 + * it under the terms of the GNU General Public License version 2 as
86 + * published by the Free Software Foundation.
87 + */
88 +
89 +#include <linux/err.h>
90 +#include <linux/i2c.h>
91 +#include <linux/interrupt.h>
92 +#include <linux/kernel.h>
93 +#include <linux/module.h>
94 +#include <linux/pm_runtime.h>
95 +#include <linux/regmap.h>
96 +#include <linux/slab.h>
97 +#include <linux/regulator/consumer.h>
98 +#include <linux/mfd/axp20x.h>
99 +#include <linux/mfd/core.h>
100 +#include <linux/of_device.h>
101 +#include <linux/of_irq.h>
102 +
103 +#define AXP20X_OFF     0x80
104 +
105 +static const struct regmap_range axp20x_writeable_ranges[] = {
106 +       regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE),
107 +       regmap_reg_range(AXP20X_DCDC_MODE, AXP20X_FG_RES),
108 +};
109 +
110 +static const struct regmap_range axp20x_volatile_ranges[] = {
111 +       regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE),
112 +};
113 +
114 +static const struct regmap_access_table axp20x_writeable_table = {
115 +       .yes_ranges     = axp20x_writeable_ranges,
116 +       .n_yes_ranges   = ARRAY_SIZE(axp20x_writeable_ranges),
117 +};
118 +
119 +static const struct regmap_access_table axp20x_volatile_table = {
120 +       .yes_ranges     = axp20x_volatile_ranges,
121 +       .n_yes_ranges   = ARRAY_SIZE(axp20x_volatile_ranges),
122 +};
123 +
124 +static struct resource axp20x_pek_resources[] = {
125 +       {
126 +               .name   = "PEK_DBR",
127 +               .start  = AXP20X_IRQ_PEK_RIS_EDGE,
128 +               .end    = AXP20X_IRQ_PEK_RIS_EDGE,
129 +               .flags  = IORESOURCE_IRQ,
130 +       },
131 +       {
132 +               .name   = "PEK_DBF",
133 +               .start  = AXP20X_IRQ_PEK_FAL_EDGE,
134 +               .end    = AXP20X_IRQ_PEK_FAL_EDGE,
135 +               .flags  = IORESOURCE_IRQ,
136 +       },
137 +};
138 +
139 +static const struct regmap_config axp20x_regmap_config = {
140 +       .reg_bits       = 8,
141 +       .val_bits       = 8,
142 +       .wr_table       = &axp20x_writeable_table,
143 +       .volatile_table = &axp20x_volatile_table,
144 +       .max_register   = AXP20X_FG_RES,
145 +       .cache_type     = REGCACHE_RBTREE,
146 +};
147 +
148 +#define AXP20X_IRQ(_irq, _off, _mask) \
149 +       [AXP20X_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) }
150 +
151 +static const struct regmap_irq axp20x_regmap_irqs[] = {
152 +       AXP20X_IRQ(ACIN_OVER_V,         0, 7),
153 +       AXP20X_IRQ(ACIN_PLUGIN,         0, 6),
154 +       AXP20X_IRQ(ACIN_REMOVAL,        0, 5),
155 +       AXP20X_IRQ(VBUS_OVER_V,         0, 4),
156 +       AXP20X_IRQ(VBUS_PLUGIN,         0, 3),
157 +       AXP20X_IRQ(VBUS_REMOVAL,        0, 2),
158 +       AXP20X_IRQ(VBUS_V_LOW,          0, 1),
159 +       AXP20X_IRQ(BATT_PLUGIN,         1, 7),
160 +       AXP20X_IRQ(BATT_REMOVAL,        1, 6),
161 +       AXP20X_IRQ(BATT_ENT_ACT_MODE,   1, 5),
162 +       AXP20X_IRQ(BATT_EXIT_ACT_MODE,  1, 4),
163 +       AXP20X_IRQ(CHARG,               1, 3),
164 +       AXP20X_IRQ(CHARG_DONE,          1, 2),
165 +       AXP20X_IRQ(BATT_TEMP_HIGH,      1, 1),
166 +       AXP20X_IRQ(BATT_TEMP_LOW,       1, 0),
167 +       AXP20X_IRQ(DIE_TEMP_HIGH,       2, 7),
168 +       AXP20X_IRQ(CHARG_I_LOW,         2, 6),
169 +       AXP20X_IRQ(DCDC1_V_LONG,        2, 5),
170 +       AXP20X_IRQ(DCDC2_V_LONG,        2, 4),
171 +       AXP20X_IRQ(DCDC3_V_LONG,        2, 3),
172 +       AXP20X_IRQ(PEK_SHORT,           2, 1),
173 +       AXP20X_IRQ(PEK_LONG,            2, 0),
174 +       AXP20X_IRQ(N_OE_PWR_ON,         3, 7),
175 +       AXP20X_IRQ(N_OE_PWR_OFF,        3, 6),
176 +       AXP20X_IRQ(VBUS_VALID,          3, 5),
177 +       AXP20X_IRQ(VBUS_NOT_VALID,      3, 4),
178 +       AXP20X_IRQ(VBUS_SESS_VALID,     3, 3),
179 +       AXP20X_IRQ(VBUS_SESS_END,       3, 2),
180 +       AXP20X_IRQ(LOW_PWR_LVL1,        3, 1),
181 +       AXP20X_IRQ(LOW_PWR_LVL2,        3, 0),
182 +       AXP20X_IRQ(TIMER,               4, 7),
183 +       AXP20X_IRQ(PEK_RIS_EDGE,        4, 6),
184 +       AXP20X_IRQ(PEK_FAL_EDGE,        4, 5),
185 +       AXP20X_IRQ(GPIO3_INPUT,         4, 3),
186 +       AXP20X_IRQ(GPIO2_INPUT,         4, 2),
187 +       AXP20X_IRQ(GPIO1_INPUT,         4, 1),
188 +       AXP20X_IRQ(GPIO0_INPUT,         4, 0),
189 +};
190 +
191 +static const struct regmap_irq_chip axp20x_regmap_irq_chip = {
192 +       .name                   = "axp20x_irq_chip",
193 +       .status_base            = AXP20X_IRQ1_STATE,
194 +       .ack_base               = AXP20X_IRQ1_STATE,
195 +       .mask_base              = AXP20X_IRQ1_EN,
196 +       .num_regs               = 5,
197 +       .irqs                   = axp20x_regmap_irqs,
198 +       .num_irqs               = ARRAY_SIZE(axp20x_regmap_irqs),
199 +       .mask_invert            = true,
200 +       .init_ack_masked        = true,
201 +};
202 +
203 +static struct mfd_cell axp20x_cells[] = {
204 +       {
205 +               .name           = "axp20x-pek",
206 +               .of_compatible  = "x-powers,axp20x-pek",
207 +               .num_resources  = ARRAY_SIZE(axp20x_pek_resources),
208 +               .resources      = axp20x_pek_resources,
209 +       }, {
210 +               .name           = "axp20x-regulator",
211 +       },
212 +};
213 +
214 +const struct of_device_id axp20x_of_match[] = {
215 +       { .compatible = "x-powers,axp202", .data = (void *) AXP202_ID },
216 +       { .compatible = "x-powers,axp209", .data = (void *) AXP209_ID },
217 +       { },
218 +};
219 +
220 +static struct axp20x_dev *axp20x_pm_power_off;
221 +static void axp20x_power_off(void)
222 +{
223 +       regmap_write(axp20x_pm_power_off->regmap, AXP20X_OFF_CTRL,
224 +                    AXP20X_OFF);
225 +}
226 +
227 +static int axp20x_i2c_probe(struct i2c_client *i2c,
228 +                        const struct i2c_device_id *id)
229 +{
230 +       struct axp20x_dev *axp20x;
231 +       const struct of_device_id *of_id;
232 +       struct device_node *node = i2c->dev.of_node;
233 +       int ret;
234 +
235 +       axp20x = devm_kzalloc(&i2c->dev, sizeof(*axp20x), GFP_KERNEL);
236 +       if (!axp20x)
237 +               return -ENOMEM;
238 +
239 +       of_id = of_match_device(axp20x_of_match, &i2c->dev);
240 +       if (!of_id) {
241 +               dev_err(&i2c->dev, "Unable to setup AXP20X data\n");
242 +               return -ENODEV;
243 +       }
244 +       axp20x->variant = (int) of_id->data;
245 +
246 +       axp20x->i2c_client = i2c;
247 +       axp20x->dev = &i2c->dev;
248 +       dev_set_drvdata(axp20x->dev, axp20x);
249 +
250 +       axp20x->regmap = devm_regmap_init_i2c(i2c, &axp20x_regmap_config);
251 +       if (IS_ERR(axp20x->regmap)) {
252 +               ret = PTR_ERR(axp20x->regmap);
253 +               dev_err(&i2c->dev, "regmap init failed: %d\n", ret);
254 +               return ret;
255 +       }
256 +
257 +       axp20x->irq = i2c->irq;
258 +       ret = regmap_add_irq_chip(axp20x->regmap, axp20x->irq,
259 +                                 IRQF_ONESHOT | IRQF_SHARED, -1,
260 +                                 &axp20x_regmap_irq_chip,
261 +                                 &axp20x->regmap_irqc);
262 +       if (ret) {
263 +               dev_err(&i2c->dev, "failed to add irq chip: %d\n", ret);
264 +               return ret;
265 +       }
266 +
267 +       ret = mfd_add_devices(axp20x->dev, -1, axp20x_cells,
268 +                             ARRAY_SIZE(axp20x_cells), NULL, 0, NULL);
269 +       if (ret) {
270 +               dev_err(&i2c->dev, "failed to add MFD devices: %d\n", ret);
271 +               goto mfd_err;
272 +       }
273 +
274 +       axp20x->pm_off = of_property_read_bool(node, "axp,system-power-controller");
275 +
276 +       if (axp20x->pm_off && !pm_power_off) {
277 +               axp20x_pm_power_off = axp20x;
278 +               pm_power_off = axp20x_power_off;
279 +       }
280 +
281 +       dev_info(&i2c->dev, "AXP20X driver loaded\n");
282 +
283 +       return 0;
284 +
285 +mfd_err:
286 +       regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc);
287 +
288 +       return ret;
289 +}
290 +
291 +static int axp20x_i2c_remove(struct i2c_client *i2c)
292 +{
293 +       struct axp20x_dev *axp20x = i2c_get_clientdata(i2c);
294 +
295 +       if (axp20x == axp20x_pm_power_off) {
296 +               axp20x_pm_power_off = NULL;
297 +               pm_power_off = NULL;
298 +       }
299 +
300 +       mfd_remove_devices(axp20x->dev);
301 +       regmap_del_irq_chip(axp20x->i2c_client->irq, axp20x->regmap_irqc);
302 +
303 +       return 0;
304 +}
305 +
306 +static const struct i2c_device_id axp20x_i2c_id[] = {
307 +       { "axp202", AXP202_ID },
308 +       { "axp209", AXP209_ID },
309 +       { }
310 +};
311 +MODULE_DEVICE_TABLE(i2c, axp20x_i2c_id);
312 +
313 +static struct i2c_driver axp20x_i2c_driver = {
314 +       .driver = {
315 +               .name   = "axp20x",
316 +               .owner  = THIS_MODULE,
317 +               .of_match_table = of_match_ptr(axp20x_of_match),
318 +       },
319 +       .probe          = axp20x_i2c_probe,
320 +       .remove         = axp20x_i2c_remove,
321 +       .id_table       = axp20x_i2c_id,
322 +};
323 +
324 +module_i2c_driver(axp20x_i2c_driver);
325 +
326 +MODULE_DESCRIPTION("PMIC MFD core driver for AXP20X");
327 +MODULE_AUTHOR("Carlo Caione <carlo@caione.org>");
328 +MODULE_LICENSE("GPL");
329 diff --git a/include/linux/mfd/axp20x.h b/include/linux/mfd/axp20x.h
330 new file mode 100644
331 index 0000000..fcef32c
332 --- /dev/null
333 +++ b/include/linux/mfd/axp20x.h
334 @@ -0,0 +1,180 @@
335 +/*
336 + * Functions to access AXP20X power management chip.
337 + *
338 + * Copyright (C) 2013, Carlo Caione <carlo@caione.org>
339 + *
340 + * This program is free software; you can redistribute it and/or modify
341 + * it under the terms of the GNU General Public License version 2 as
342 + * published by the Free Software Foundation.
343 + */
344 +
345 +#ifndef __LINUX_MFD_AXP20X_H
346 +#define __LINUX_MFD_AXP20X_H
347 +
348 +#define AXP202_ID                      0
349 +#define AXP209_ID                      1
350 +
351 +#define AXP20X_DATACACHE(m)            (0x04 + (m))
352 +
353 +/* Power supply */
354 +#define AXP20X_PWR_INPUT_STATUS                0x00
355 +#define AXP20X_PWR_OP_MODE             0x01
356 +#define AXP20X_USB_OTG_STATUS          0x02
357 +#define AXP20X_PWR_OUT_CTRL            0x12
358 +#define AXP20X_DCDC2_V_OUT             0x23
359 +#define AXP20X_DCDC2_LDO3_V_SCAL       0x25
360 +#define AXP20X_DCDC3_V_OUT             0x27
361 +#define AXP20X_LDO24_V_OUT             0x28
362 +#define AXP20X_LDO3_V_OUT              0x29
363 +#define AXP20X_VBUS_IPSOUT_MGMT                0x30
364 +#define AXP20X_V_OFF                   0x31
365 +#define AXP20X_OFF_CTRL                        0x32
366 +#define AXP20X_CHRG_CTRL1              0x33
367 +#define AXP20X_CHRG_CTRL2              0x34
368 +#define AXP20X_CHRG_BAK_CTRL           0x35
369 +#define AXP20X_PEK_KEY                 0x36
370 +#define AXP20X_DCDC_FREQ               0x37
371 +#define AXP20X_V_LTF_CHRG              0x38
372 +#define AXP20X_V_HTF_CHRG              0x39
373 +#define AXP20X_APS_WARN_L1             0x3a
374 +#define AXP20X_APS_WARN_L2             0x3b
375 +#define AXP20X_V_LTF_DISCHRG           0x3c
376 +#define AXP20X_V_HTF_DISCHRG           0x3d
377 +
378 +/* Interrupt */
379 +#define AXP20X_IRQ1_EN                 0x40
380 +#define AXP20X_IRQ2_EN                 0x41
381 +#define AXP20X_IRQ3_EN                 0x42
382 +#define AXP20X_IRQ4_EN                 0x43
383 +#define AXP20X_IRQ5_EN                 0x44
384 +#define AXP20X_IRQ1_STATE              0x48
385 +#define AXP20X_IRQ2_STATE              0x49
386 +#define AXP20X_IRQ3_STATE              0x4a
387 +#define AXP20X_IRQ4_STATE              0x4b
388 +#define AXP20X_IRQ5_STATE              0x4c
389 +
390 +/* ADC */
391 +#define AXP20X_ACIN_V_ADC_H            0x56
392 +#define AXP20X_ACIN_V_ADC_L            0x57
393 +#define AXP20X_ACIN_I_ADC_H            0x58
394 +#define AXP20X_ACIN_I_ADC_L            0x59
395 +#define AXP20X_VBUS_V_ADC_H            0x5a
396 +#define AXP20X_VBUS_V_ADC_L            0x5b
397 +#define AXP20X_VBUS_I_ADC_H            0x5c
398 +#define AXP20X_VBUS_I_ADC_L            0x5d
399 +#define AXP20X_TEMP_ADC_H              0x5e
400 +#define AXP20X_TEMP_ADC_L              0x5f
401 +#define AXP20X_TS_IN_H                 0x62
402 +#define AXP20X_TS_IN_L                 0x63
403 +#define AXP20X_GPIO0_V_ADC_H           0x64
404 +#define AXP20X_GPIO0_V_ADC_L           0x65
405 +#define AXP20X_GPIO1_V_ADC_H           0x66
406 +#define AXP20X_GPIO1_V_ADC_L           0x67
407 +#define AXP20X_PWR_BATT_H              0x70
408 +#define AXP20X_PWR_BATT_M              0x71
409 +#define AXP20X_PWR_BATT_L              0x72
410 +#define AXP20X_BATT_V_H                        0x78
411 +#define AXP20X_BATT_V_L                        0x79
412 +#define AXP20X_BATT_CHRG_I_H           0x7a
413 +#define AXP20X_BATT_CHRG_I_L           0x7b
414 +#define AXP20X_BATT_DISCHRG_I_H                0x7c
415 +#define AXP20X_BATT_DISCHRG_I_L                0x7d
416 +#define AXP20X_IPSOUT_V_HIGH_H         0x7e
417 +#define AXP20X_IPSOUT_V_HIGH_L         0x7f
418 +
419 +/* Power supply */
420 +#define AXP20X_DCDC_MODE               0x80
421 +#define AXP20X_ADC_EN1                 0x82
422 +#define AXP20X_ADC_EN2                 0x83
423 +#define AXP20X_ADC_RATE                        0x84
424 +#define AXP20X_GPIO10_IN_RANGE         0x85
425 +#define AXP20X_GPIO1_ADC_IRQ_RIS       0x86
426 +#define AXP20X_GPIO1_ADC_IRQ_FAL       0x87
427 +#define AXP20X_TIMER_CTRL              0x8a
428 +#define AXP20X_VBUS_MON                        0x8b
429 +#define AXP20X_OVER_TMP                        0x8f
430 +
431 +/* GPIO */
432 +#define AXP20X_GPIO0_CTRL              0x90
433 +#define AXP20X_LDO5_V_OUT              0x91
434 +#define AXP20X_GPIO1_CTRL              0x92
435 +#define AXP20X_GPIO2_CTRL              0x93
436 +#define AXP20X_GPIO20_SS               0x94
437 +#define AXP20X_GPIO3_CTRL              0x95
438 +
439 +/* Battery */
440 +#define AXP20X_CHRG_CC_31_24           0xb0
441 +#define AXP20X_CHRG_CC_23_16           0xb1
442 +#define AXP20X_CHRG_CC_15_8            0xb2
443 +#define AXP20X_CHRG_CC_7_0             0xb3
444 +#define AXP20X_DISCHRG_CC_31_24                0xb4
445 +#define AXP20X_DISCHRG_CC_23_16                0xb5
446 +#define AXP20X_DISCHRG_CC_15_8         0xb6
447 +#define AXP20X_DISCHRG_CC_7_0          0xb7
448 +#define AXP20X_CC_CTRL                 0xb8
449 +#define AXP20X_FG_RES                  0xb9
450 +
451 +/* Regulators IDs */
452 +enum {
453 +       AXP20X_LDO1 = 0,
454 +       AXP20X_LDO2,
455 +       AXP20X_LDO3,
456 +       AXP20X_LDO4,
457 +       AXP20X_LDO5,
458 +       AXP20X_DCDC2,
459 +       AXP20X_DCDC3,
460 +       AXP20X_REG_ID_MAX,
461 +};
462 +
463 +/* IRQs */
464 +enum {
465 +       AXP20X_IRQ_ACIN_OVER_V = 1,
466 +       AXP20X_IRQ_ACIN_PLUGIN,
467 +       AXP20X_IRQ_ACIN_REMOVAL,
468 +       AXP20X_IRQ_VBUS_OVER_V,
469 +       AXP20X_IRQ_VBUS_PLUGIN,
470 +       AXP20X_IRQ_VBUS_REMOVAL,
471 +       AXP20X_IRQ_VBUS_V_LOW,
472 +       AXP20X_IRQ_BATT_PLUGIN,
473 +       AXP20X_IRQ_BATT_REMOVAL,
474 +       AXP20X_IRQ_BATT_ENT_ACT_MODE,
475 +       AXP20X_IRQ_BATT_EXIT_ACT_MODE,
476 +       AXP20X_IRQ_CHARG,
477 +       AXP20X_IRQ_CHARG_DONE,
478 +       AXP20X_IRQ_BATT_TEMP_HIGH,
479 +       AXP20X_IRQ_BATT_TEMP_LOW,
480 +       AXP20X_IRQ_DIE_TEMP_HIGH,
481 +       AXP20X_IRQ_CHARG_I_LOW,
482 +       AXP20X_IRQ_DCDC1_V_LONG,
483 +       AXP20X_IRQ_DCDC2_V_LONG,
484 +       AXP20X_IRQ_DCDC3_V_LONG,
485 +       AXP20X_IRQ_PEK_SHORT = 22,
486 +       AXP20X_IRQ_PEK_LONG,
487 +       AXP20X_IRQ_N_OE_PWR_ON,
488 +       AXP20X_IRQ_N_OE_PWR_OFF,
489 +       AXP20X_IRQ_VBUS_VALID,
490 +       AXP20X_IRQ_VBUS_NOT_VALID,
491 +       AXP20X_IRQ_VBUS_SESS_VALID,
492 +       AXP20X_IRQ_VBUS_SESS_END,
493 +       AXP20X_IRQ_LOW_PWR_LVL1,
494 +       AXP20X_IRQ_LOW_PWR_LVL2,
495 +       AXP20X_IRQ_TIMER,
496 +       AXP20X_IRQ_PEK_RIS_EDGE,
497 +       AXP20X_IRQ_PEK_FAL_EDGE,
498 +       AXP20X_IRQ_GPIO3_INPUT,
499 +       AXP20X_IRQ_GPIO2_INPUT,
500 +       AXP20X_IRQ_GPIO1_INPUT,
501 +       AXP20X_IRQ_GPIO0_INPUT,
502 +};
503 +
504 +struct axp20x_dev {
505 +       struct device                   *dev;
506 +       struct i2c_client               *i2c_client;
507 +       struct regmap                   *regmap;
508 +       struct regmap_irq_chip_data     *regmap_irqc;
509 +       int                             variant;
510 +       int                             irq;
511 +       bool                            pm_off;
512 +};
513 +
514 +#endif /* __LINUX_MFD_AXP20X_H */
515 -- 
516 2.0.3
517