2 * linux/drivers/mmc/host/glamo-mmc.c - Glamo MMC driver
4 * Copyright (C) 2007 Openmoko, Inc, Andy Green <andy@openmoko.com>
5 * Based on S3C MMC driver that was:
6 * Copyright (C) 2004-2006 maintech GmbH, Thomas Kleffel <tk@maintech.de>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/module.h>
14 #include <linux/mmc/mmc.h>
15 #include <linux/mmc/sd.h>
16 #include <linux/mmc/host.h>
17 #include <linux/platform_device.h>
18 #include <linux/irq.h>
19 #include <linux/delay.h>
20 #include <linux/interrupt.h>
21 #include <linux/workqueue.h>
22 #include <linux/crc7.h>
23 #include <linux/scatterlist.h>
25 #include <linux/regulator/consumer.h>
26 #include <linux/mfd/glamo.h>
28 #include "glamo-core.h"
29 #include "glamo-regs.h"
31 #define DRIVER_NAME "glamo-mci"
33 struct glamo_mci_host {
34 struct platform_device *pdev;
35 struct glamo_mmc_platform_data *pdata;
37 struct resource *mmio_mem;
38 struct resource *data_mem;
39 void __iomem *mmio_base;
40 u16 __iomem *data_base;
42 struct regulator *regulator;
43 struct mmc_request *mrq;
45 unsigned int clk_rate;
50 unsigned char request_counter;
52 struct timer_list disable_timer;
54 struct work_struct irq_work;
55 struct work_struct read_work;
57 unsigned clk_enabled : 1;
60 static void glamo_mci_send_request(struct mmc_host *mmc, struct mmc_request* mrq);
61 static void glamo_mci_send_command(struct glamo_mci_host *host,
62 struct mmc_command *cmd);
67 * held at /(3 + 1) due to concerns of 100R recommended series resistor
68 * allows 16MHz @ 4-bit --> 8MBytes/sec raw
70 * you can override this on kernel commandline using
72 * glamo_mci.sd_max_clk=10000000
77 static int sd_max_clk = 21000000;
78 module_param(sd_max_clk, int, 0644);
83 * you can override this on kernel commandline using
85 * glamo_mci.sd_slow_ratio=8
89 * platform callback is used to decide effective clock rate, if not
90 * defined then max is used, if defined and returns nonzero, rate is
91 * divided by this factor
94 static int sd_slow_ratio = 8;
95 module_param(sd_slow_ratio, int, 0644);
98 * Post-power SD clock rate
100 * you can override this on kernel commandline using
102 * glamo_mci.sd_post_power_clock=1000000
106 * After changing power to card, clock is held at this rate until first bulk
110 static int sd_post_power_clock = 1000000;
111 module_param(sd_post_power_clock, int, 0644);
114 static inline void glamo_reg_write(struct glamo_mci_host *glamo,
115 u_int16_t reg, u_int16_t val)
117 writew(val, glamo->mmio_base + reg);
120 static inline u_int16_t glamo_reg_read(struct glamo_mci_host *glamo,
123 return readw(glamo->mmio_base + reg);
126 static void glamo_reg_set_bit_mask(struct glamo_mci_host *glamo,
127 u_int16_t reg, u_int16_t mask,
134 tmp = glamo_reg_read(glamo, reg);
137 glamo_reg_write(glamo, reg, tmp);
140 static void glamo_mci_clock_disable(struct glamo_mci_host *host) {
141 if (host->clk_enabled) {
142 glamo_engine_div_disable(host->pdata->core, GLAMO_ENGINE_MMC);
143 host->clk_enabled = 0;
147 static void glamo_mci_clock_enable(struct glamo_mci_host *host) {
148 del_timer_sync(&host->disable_timer);
150 if (!host->clk_enabled) {
151 glamo_engine_div_enable(host->pdata->core, GLAMO_ENGINE_MMC);
152 host->clk_enabled = 1;
156 static void glamo_mci_disable_timer(unsigned long data) {
157 struct glamo_mci_host *host = (struct glamo_mci_host *)data;
158 glamo_mci_clock_disable(host);
162 static void do_pio_read(struct glamo_mci_host *host, struct mmc_data *data)
164 struct scatterlist *sg;
165 u16 __iomem *from_ptr = host->data_base;
168 dev_dbg(&host->pdev->dev, "pio_read():\n");
169 for (sg = data->sg; sg; sg = sg_next(sg)) {
170 sg_pointer = page_address(sg_page(sg)) + sg->offset;
173 memcpy(sg_pointer, from_ptr, sg->length);
174 from_ptr += sg->length >> 1;
176 data->bytes_xfered += sg->length;
179 dev_dbg(&host->pdev->dev, "pio_read(): "
180 "complete (no more data).\n");
183 static void do_pio_write(struct glamo_mci_host *host, struct mmc_data *data)
185 struct scatterlist *sg;
186 u16 __iomem *to_ptr = host->data_base;
189 dev_dbg(&host->pdev->dev, "pio_write():\n");
190 for (sg = data->sg; sg; sg = sg_next(sg)) {
191 sg_pointer = page_address(sg_page(sg)) + sg->offset;
193 data->bytes_xfered += sg->length;
195 memcpy(to_ptr, sg_pointer, sg->length);
196 to_ptr += sg->length >> 1;
199 dev_dbg(&host->pdev->dev, "pio_write(): complete\n");
202 static int glamo_mci_set_card_clock(struct glamo_mci_host *host, int freq)
207 glamo_mci_clock_enable(host);
208 real_rate = glamo_engine_reclock(host->pdata->core, GLAMO_ENGINE_MMC, freq);
210 glamo_mci_clock_disable(host);
216 static void glamo_mci_request_done(struct glamo_mci_host *host, struct
218 mod_timer(&host->disable_timer, jiffies + HZ / 16);
219 mmc_request_done(host->mmc, mrq);
223 static void glamo_mci_irq_worker(struct work_struct *work)
225 struct glamo_mci_host *host = container_of(work, struct glamo_mci_host,
227 struct mmc_command *cmd;
229 if (!host->mrq || !host->mrq->cmd)
232 cmd = host->mrq->cmd;
235 if (cmd->data->flags & MMC_DATA_READ) {
240 status = glamo_reg_read(host, GLAMO_REG_MMC_RB_STAT1);
241 dev_dbg(&host->pdev->dev, "status = 0x%04x\n", status);
243 /* we ignore a data timeout report if we are also told the data came */
244 if (status & GLAMO_STAT1_MMC_RB_DRDY)
245 status &= ~GLAMO_STAT1_MMC_DTOUT;
247 if (status & (GLAMO_STAT1_MMC_RTOUT | GLAMO_STAT1_MMC_DTOUT))
248 cmd->error = -ETIMEDOUT;
249 if (status & (GLAMO_STAT1_MMC_BWERR | GLAMO_STAT1_MMC_BRERR)) {
250 cmd->error = -EILSEQ;
253 dev_info(&host->pdev->dev, "Error after cmd: 0x%x\n", status);
257 /* issue STOP if we have been given one to use */
258 if (host->mrq->stop) {
259 glamo_mci_send_command(host, host->mrq->stop);
262 if (cmd->data->flags & MMC_DATA_READ)
263 do_pio_read(host, cmd->data);
267 glamo_mci_request_done(host, cmd->mrq);
270 static void glamo_mci_read_worker(struct work_struct *work)
272 struct glamo_mci_host *host = container_of(work, struct glamo_mci_host,
274 struct mmc_command *cmd;
276 uint16_t blocks_ready;
277 size_t data_read = 0;
279 struct scatterlist *sg;
280 u16 __iomem *from_ptr = host->data_base;
284 cmd = host->mrq->cmd;
287 status = glamo_reg_read(host, GLAMO_REG_MMC_RB_STAT1);
289 if (status & (GLAMO_STAT1_MMC_RTOUT | GLAMO_STAT1_MMC_DTOUT))
290 cmd->error = -ETIMEDOUT;
291 if (status & (GLAMO_STAT1_MMC_BWERR | GLAMO_STAT1_MMC_BRERR))
292 cmd->error = -EILSEQ;
294 dev_info(&host->pdev->dev, "Error after cmd: 0x%x\n", status);
298 blocks_ready = glamo_reg_read(host, GLAMO_REG_MMC_RB_BLKCNT);
299 data_ready = blocks_ready * cmd->data->blksz;
301 if (data_ready == data_read)
304 while(sg && data_read + sg->length <= data_ready) {
305 sg_pointer = page_address(sg_page(sg)) + sg->offset;
306 memcpy(sg_pointer, from_ptr, sg->length);
307 from_ptr += sg->length >> 1;
309 data_read += sg->length;
314 cmd->data->bytes_xfered = data_read;
317 status = glamo_reg_read(host, GLAMO_REG_MMC_RB_STAT1);
318 } while (!(status & GLAMO_STAT1_MMC_IDLE));
321 glamo_mci_send_command(host, host->mrq->stop);
324 status = glamo_reg_read(host, GLAMO_REG_MMC_RB_STAT1);
325 } while (!(status & GLAMO_STAT1_MMC_IDLE));
328 glamo_mci_request_done(host, cmd->mrq);
331 static irqreturn_t glamo_mci_irq(int irq, void *devid)
333 struct glamo_mci_host *host = (struct glamo_mci_host*)devid;
334 schedule_work(&host->irq_work);
339 static void glamo_mci_send_command(struct glamo_mci_host *host,
340 struct mmc_command *cmd)
344 unsigned int timeout = 1000000;
345 u16 * reg_resp = (u16 *)(host->mmio_base + GLAMO_REG_MMC_CMD_RSP1);
347 int triggers_int = 1;
349 /* if we can't do it, reject as busy */
350 if (!glamo_reg_read(host, GLAMO_REG_MMC_RB_STAT1) &
351 GLAMO_STAT1_MMC_IDLE) {
356 /* create an array in wire order for CRC computation */
357 u8a[0] = 0x40 | (cmd->opcode & 0x3f);
358 u8a[1] = (u8)(cmd->arg >> 24);
359 u8a[2] = (u8)(cmd->arg >> 16);
360 u8a[3] = (u8)(cmd->arg >> 8);
361 u8a[4] = (u8)cmd->arg;
362 u8a[5] = (crc7(0, u8a, 5) << 1) | 0x01; /* crc7 on first 5 bytes of packet */
364 /* issue the wire-order array including CRC in register order */
365 glamo_reg_write(host, GLAMO_REG_MMC_CMD_REG1, ((u8a[4] << 8) | u8a[5]));
366 glamo_reg_write(host, GLAMO_REG_MMC_CMD_REG2, ((u8a[2] << 8) | u8a[3]));
367 glamo_reg_write(host, GLAMO_REG_MMC_CMD_REG3, ((u8a[0] << 8) | u8a[1]));
369 /* command index toggle */
370 fire |= (host->request_counter & 1) << 12;
372 /* set type of command */
373 switch (mmc_cmd_type(cmd)) {
375 fire |= GLAMO_FIRE_MMC_CMDT_BNR;
378 fire |= GLAMO_FIRE_MMC_CMDT_BR;
381 fire |= GLAMO_FIRE_MMC_CMDT_AND;
384 fire |= GLAMO_FIRE_MMC_CMDT_AD;
388 * if it expects a response, set the type expected
390 * R1, Length : 48bit, Normal response
391 * R1b, Length : 48bit, same R1, but added card busy status
392 * R2, Length : 136bit (really 128 bits with CRC snipped)
393 * R3, Length : 48bit (OCR register value)
394 * R4, Length : 48bit, SDIO_OP_CONDITION, Reverse SDIO Card
395 * R5, Length : 48bit, IO_RW_DIRECTION, Reverse SDIO Card
396 * R6, Length : 48bit (RCA register)
397 * R7, Length : 48bit (interface condition, VHS(voltage supplied),
398 * check pattern, CRC7)
400 switch (mmc_resp_type(cmd)) {
401 case MMC_RSP_R1: /* same index as R6 and R7 */
402 fire |= GLAMO_FIRE_MMC_RSPT_R1;
405 fire |= GLAMO_FIRE_MMC_RSPT_R1b;
408 fire |= GLAMO_FIRE_MMC_RSPT_R2;
411 fire |= GLAMO_FIRE_MMC_RSPT_R3;
413 /* R4 and R5 supported by chip not defined in linux/mmc/core.h (sdio) */
416 * From the command index, set up the command class in the host ctrllr
418 * missing guys present on chip but couldn't figure out how to use yet:
420 * 0x9 "cancel running command"
422 switch (cmd->opcode) {
423 case MMC_READ_SINGLE_BLOCK:
424 fire |= GLAMO_FIRE_MMC_CC_SBR; /* single block read */
426 case MMC_SWITCH: /* 64 byte payload */
427 case SD_APP_SEND_SCR:
428 case MMC_READ_MULTIPLE_BLOCK:
429 /* we will get an interrupt off this */
431 /* multiblock no stop */
432 fire |= GLAMO_FIRE_MMC_CC_MBRNS;
434 /* multiblock with stop */
435 fire |= GLAMO_FIRE_MMC_CC_MBRS;
437 case MMC_WRITE_BLOCK:
438 fire |= GLAMO_FIRE_MMC_CC_SBW; /* single block write */
440 case MMC_WRITE_MULTIPLE_BLOCK:
442 /* multiblock with stop */
443 fire |= GLAMO_FIRE_MMC_CC_MBWS;
445 /* multiblock NO stop-- 'RESERVED'? */
446 fire |= GLAMO_FIRE_MMC_CC_MBWNS;
448 case MMC_STOP_TRANSMISSION:
449 fire |= GLAMO_FIRE_MMC_CC_STOP; /* STOP */
453 fire |= GLAMO_FIRE_MMC_CC_BASIC; /* "basic command" */
459 host->mrq = cmd->mrq;
461 /* always largest timeout */
462 glamo_reg_write(host, GLAMO_REG_MMC_TIMEOUT, 0xfff);
464 /* Generate interrupt on txfer */
465 glamo_reg_set_bit_mask(host, GLAMO_REG_MMC_BASIC, 0xff36,
467 GLAMO_BASIC_MMC_NO_CLK_RD_WAIT |
468 GLAMO_BASIC_MMC_EN_COMPL_INT |
469 GLAMO_BASIC_MMC_EN_DATA_PUPS |
470 GLAMO_BASIC_MMC_EN_CMD_PUP);
472 /* send the command out on the wire */
473 /* dev_info(&host->pdev->dev, "Using FIRE %04X\n", fire); */
474 glamo_reg_write(host, GLAMO_REG_MMC_CMD_FIRE, fire);
476 /* we are deselecting card? because it isn't going to ack then... */
477 if ((cmd->opcode == 7) && (cmd->arg == 0))
481 * we must spin until response is ready or timed out
482 * -- we don't get interrupts unless there is a bulk rx
485 status = glamo_reg_read(host, GLAMO_REG_MMC_RB_STAT1);
486 while (((((status >> 15) & 1) != (host->request_counter & 1)) ||
487 (!(status & (GLAMO_STAT1_MMC_RB_RRDY |
488 GLAMO_STAT1_MMC_RTOUT |
489 GLAMO_STAT1_MMC_DTOUT |
490 GLAMO_STAT1_MMC_BWERR |
491 GLAMO_STAT1_MMC_BRERR)))) && (timeout--));
493 if ((status & (GLAMO_STAT1_MMC_RTOUT |
494 GLAMO_STAT1_MMC_DTOUT)) ||
496 cmd->error = -ETIMEDOUT;
497 } else if (status & (GLAMO_STAT1_MMC_BWERR | GLAMO_STAT1_MMC_BRERR)) {
498 cmd->error = -EILSEQ;
501 if (cmd->flags & MMC_RSP_PRESENT) {
502 if (cmd->flags & MMC_RSP_136) {
503 cmd->resp[3] = readw(®_resp[0]) |
504 (readw(®_resp[1]) << 16);
505 cmd->resp[2] = readw(®_resp[2]) |
506 (readw(®_resp[3]) << 16);
507 cmd->resp[1] = readw(®_resp[4]) |
508 (readw(®_resp[5]) << 16);
509 cmd->resp[0] = readw(®_resp[6]) |
510 (readw(®_resp[7]) << 16);
512 cmd->resp[0] = (readw(®_resp[0]) >> 8) |
513 (readw(®_resp[1]) << 8) |
514 ((readw(®_resp[2])) << 24);
519 /* We'll only get an interrupt when all data has been transfered.
520 By starting to copy data when it's avaiable we can increase throughput by
522 if (cmd->data && (cmd->data->flags & MMC_DATA_READ))
523 schedule_work(&host->read_work);
528 static int glamo_mci_prepare_pio(struct glamo_mci_host *host,
529 struct mmc_data *data)
531 /* set up the block info */
532 glamo_reg_write(host, GLAMO_REG_MMC_DATBLKLEN, data->blksz);
533 glamo_reg_write(host, GLAMO_REG_MMC_DATBLKCNT, data->blocks);
535 data->bytes_xfered = 0;
537 /* if write, prep the write into the shared RAM before the command */
538 if (data->flags & MMC_DATA_WRITE) {
539 do_pio_write(host, data);
542 dev_dbg(&host->pdev->dev, "(blksz=%d, count=%d)\n",
543 data->blksz, data->blocks);
547 static int glamo_mci_irq_poll(struct glamo_mci_host *host,
548 struct mmc_command *cmd)
550 int timeout = 1000000;
552 * if the glamo INT# line isn't wired (*cough* it can happen)
553 * I'm afraid we have to spin on the IRQ status bit and "be
557 * we have faith we will get an "interrupt"...
558 * but something insane like suspend problems can mean
559 * we spin here forever, so we timeout after a LONG time
561 while ((!(readw(host->pdata->core->base +
562 GLAMO_REG_IRQ_STATUS) & GLAMO_IRQ_MMC)) &&
566 if (cmd->data->error)
567 cmd->data->error = -ETIMEDOUT;
568 dev_err(&host->pdev->dev, "Payload timeout\n");
571 /* ack this interrupt source */
572 writew(GLAMO_IRQ_MMC, host->pdata->core->base +
573 GLAMO_REG_IRQ_CLEAR);
575 /* yay we are an interrupt controller! -- call the ISR
576 * it will stop clock to card
578 glamo_mci_irq(IRQ_GLAMO(GLAMO_IRQIDX_MMC), host);
583 static void glamo_mci_send_request(struct mmc_host *mmc, struct mmc_request *mrq)
585 struct glamo_mci_host *host = mmc_priv(mmc);
586 struct mmc_command *cmd = mrq->cmd;
588 glamo_mci_clock_enable(host);
589 host->request_counter++;
591 if(glamo_mci_prepare_pio(host, cmd->data)) {
593 cmd->data->error = -EIO;
598 dev_dbg(&host->pdev->dev,"cmd 0x%x, "
599 "arg 0x%x data=%p mrq->stop=%p flags 0x%x\n",
600 cmd->opcode, cmd->arg, cmd->data, cmd->mrq->stop,
603 glamo_mci_send_command(host, cmd);
606 * if we don't have bulk data to take care of, we're done
608 if (!cmd->data || cmd->error)
612 if (!host->pdata->core->irq_works) {
613 if (glamo_mci_irq_poll(host, mrq->cmd))
618 * Otherwise can can use the interrupt as async completion --
619 * if there is read data coming, or we wait for write data to complete,
620 * exit without mmc_request_done() as the payload interrupt
623 dev_dbg(&host->pdev->dev, "Waiting for payload data\n");
626 glamo_mci_request_done(host, mrq);
629 static void glamo_mci_set_power_mode(struct glamo_mci_host *host,
630 unsigned char power_mode) {
633 if (power_mode == host->power_mode)
638 if (host->power_mode == MMC_POWER_OFF) {
639 ret = regulator_enable(host->regulator);
641 dev_err(&host->pdev->dev, "Failed to enable regulator: %d\n", ret);
648 glamo_engine_disable(host->pdata->core,
651 ret = regulator_disable(host->regulator);
653 dev_warn(&host->pdev->dev, "Failed to disable regulator: %d\n", ret);
656 host->power_mode = power_mode;
659 static void glamo_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
661 struct glamo_mci_host *host = mmc_priv(mmc);
668 glamo_mci_set_power_mode(host, ios->power_mode);
670 if (host->vdd != ios->vdd) {
671 ret = mmc_regulator_set_ocr(host->regulator, ios->vdd);
673 dev_err(&host->pdev->dev, "Failed to set regulator voltage: %d\n", ret);
675 host->vdd = ios->vdd;
677 rate = glamo_mci_set_card_clock(host, ios->clock);
679 if ((ios->power_mode == MMC_POWER_ON) ||
680 (ios->power_mode == MMC_POWER_UP)) {
681 dev_info(&host->pdev->dev,
682 "powered (vdd = %hu) clk: %dkHz div=%hu (req: %ukHz). "
683 "Bus width=%d\n", ios->vdd,
685 ios->clock / 1000, (int)ios->bus_width);
687 dev_info(&host->pdev->dev, "glamo_mci_set_ios: power down.\n");
691 if (ios->bus_width == MMC_BUS_WIDTH_4)
692 bus_width = GLAMO_BASIC_MMC_EN_4BIT_DATA;
694 sd_drive = (rate * 4) / host->clk_rate;
698 glamo_reg_set_bit_mask(host, GLAMO_REG_MMC_BASIC,
699 GLAMO_BASIC_MMC_EN_4BIT_DATA | 0xb0,
700 bus_width | sd_drive << 6);
705 * no physical write protect supported by us
707 static int glamo_mci_get_ro(struct mmc_host *mmc)
712 static struct mmc_host_ops glamo_mci_ops = {
713 .request = glamo_mci_send_request,
714 .set_ios = glamo_mci_set_ios,
715 .get_ro = glamo_mci_get_ro,
718 static int glamo_mci_probe(struct platform_device *pdev)
720 struct mmc_host *mmc;
721 struct glamo_mci_host *host;
724 dev_info(&pdev->dev, "glamo_mci driver (C)2007 Openmoko, Inc\n");
726 mmc = mmc_alloc_host(sizeof(struct glamo_mci_host), &pdev->dev);
732 host = mmc_priv(mmc);
735 host->pdata = pdev->dev.platform_data;
736 host->power_mode = MMC_POWER_OFF;
737 host->clk_enabled = 0;
739 INIT_WORK(&host->irq_work, glamo_mci_irq_worker);
740 INIT_WORK(&host->read_work, glamo_mci_read_worker);
742 host->regulator = regulator_get(pdev->dev.parent, "SD_3V3");
743 if (!host->regulator) {
744 dev_err(&pdev->dev, "Cannot proceed without regulator.\n");
746 goto probe_free_host;
749 host->mmio_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
750 if (!host->mmio_mem) {
752 "failed to get io memory region resouce.\n");
754 goto probe_regulator_put;
757 host->mmio_mem = request_mem_region(host->mmio_mem->start,
758 resource_size(host->mmio_mem),
761 if (!host->mmio_mem) {
762 dev_err(&pdev->dev, "failed to request io memory region.\n");
764 goto probe_regulator_put;
767 host->mmio_base = ioremap(host->mmio_mem->start,
768 resource_size(host->mmio_mem));
769 if (!host->mmio_base) {
770 dev_err(&pdev->dev, "failed to ioremap() io memory region.\n");
772 goto probe_free_mem_region_mmio;
776 /* Get ahold of our data buffer we use for data in and out on MMC */
777 host->data_mem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
778 if (!host->data_mem) {
780 "failed to get io memory region resource.\n");
782 goto probe_iounmap_mmio;
785 host->data_mem = request_mem_region(host->data_mem->start,
786 resource_size(host->data_mem),
789 if (!host->data_mem) {
790 dev_err(&pdev->dev, "failed to request io memory region.\n");
792 goto probe_iounmap_mmio;
794 host->data_base = ioremap(host->data_mem->start,
795 resource_size(host->data_mem));
797 if (host->data_base == 0) {
798 dev_err(&pdev->dev, "failed to ioremap() io memory region.\n");
800 goto probe_free_mem_region_data;
803 ret = request_irq(IRQ_GLAMO(GLAMO_IRQIDX_MMC), glamo_mci_irq, IRQF_SHARED,
806 dev_err(&pdev->dev, "failed to register irq.\n");
807 goto probe_iounmap_data;
812 host->clk_rate = glamo_pll_rate(host->pdata->core, GLAMO_PLL1);
814 /* explain our host controller capabilities */
815 mmc->ops = &glamo_mci_ops;
816 mmc->ocr_avail = mmc_regulator_get_ocrmask(host->regulator);
817 mmc->caps = MMC_CAP_4_BIT_DATA |
818 MMC_CAP_MMC_HIGHSPEED |
819 MMC_CAP_SD_HIGHSPEED;
820 mmc->f_min = host->clk_rate / 256;
821 mmc->f_max = sd_max_clk;
823 mmc->max_blk_count = (1 << 16) - 1; /* GLAMO_REG_MMC_RB_BLKCNT */
824 mmc->max_blk_size = (1 << 12) - 1; /* GLAMO_REG_MMC_RB_BLKLEN */
825 mmc->max_req_size = resource_size(host->data_mem);
826 mmc->max_seg_size = mmc->max_req_size;
827 mmc->max_phys_segs = 128;
828 mmc->max_hw_segs = 128;
830 if (mmc->ocr_avail < 0) {
831 dev_warn(&pdev->dev, "Failed to get ocr list for regulator: %d.\n",
833 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
836 platform_set_drvdata(pdev, mmc);
838 glamo_engine_enable(host->pdata->core, GLAMO_ENGINE_MMC);
839 glamo_engine_reset(host->pdata->core, GLAMO_ENGINE_MMC);
841 glamo_reg_write(host, GLAMO_REG_MMC_WDATADS1,
842 (u16)(host->data_mem->start));
843 glamo_reg_write(host, GLAMO_REG_MMC_WDATADS2,
844 (u16)(host->data_mem->start >> 16));
846 glamo_reg_write(host, GLAMO_REG_MMC_RDATADS1,
847 (u16)(host->data_mem->start));
848 glamo_reg_write(host, GLAMO_REG_MMC_RDATADS2,
849 (u16)(host->data_mem->start >> 16));
851 setup_timer(&host->disable_timer, glamo_mci_disable_timer,
852 (unsigned long)host);
854 if ((ret = mmc_add_host(mmc))) {
855 dev_err(&pdev->dev, "failed to add mmc host.\n");
859 dev_info(&pdev->dev,"initialisation done.\n");
863 free_irq(IRQ_GLAMO(GLAMO_IRQIDX_MMC), host);
865 iounmap(host->data_base);
866 probe_free_mem_region_data:
867 release_mem_region(host->data_mem->start, resource_size(host->data_mem));
869 iounmap(host->mmio_base);
870 probe_free_mem_region_mmio:
871 release_mem_region(host->mmio_mem->start, resource_size(host->mmio_mem));
873 regulator_put(host->regulator);
880 static int glamo_mci_remove(struct platform_device *pdev)
882 struct mmc_host *mmc = platform_get_drvdata(pdev);
883 struct glamo_mci_host *host = mmc_priv(mmc);
885 free_irq(IRQ_GLAMO(GLAMO_IRQIDX_MMC), host);
887 mmc_remove_host(mmc);
888 iounmap(host->mmio_base);
889 iounmap(host->data_base);
890 release_mem_region(host->mmio_mem->start, resource_size(host->mmio_mem));
891 release_mem_region(host->data_mem->start, resource_size(host->data_mem));
893 regulator_put(host->regulator);
897 glamo_engine_disable(host->pdata->core, GLAMO_ENGINE_MMC);
904 static int glamo_mci_suspend(struct device *dev)
906 struct mmc_host *mmc = dev_get_drvdata(dev);
907 struct glamo_mci_host *host = mmc_priv(mmc);
910 cancel_work_sync(&host->irq_work);
912 ret = mmc_suspend_host(mmc, PMSG_SUSPEND);
913 glamo_mci_clock_enable(host);
918 static int glamo_mci_resume(struct device *dev)
920 struct mmc_host *mmc = dev_get_drvdata(dev);
921 struct glamo_mci_host *host = mmc_priv(mmc);
924 glamo_engine_enable(host->pdata->core, GLAMO_ENGINE_MMC);
925 glamo_engine_reset(host->pdata->core, GLAMO_ENGINE_MMC);
927 glamo_reg_write(host, GLAMO_REG_MMC_WDATADS1,
928 (u16)(host->data_mem->start));
929 glamo_reg_write(host, GLAMO_REG_MMC_WDATADS2,
930 (u16)(host->data_mem->start >> 16));
932 glamo_reg_write(host, GLAMO_REG_MMC_RDATADS1,
933 (u16)(host->data_mem->start));
934 glamo_reg_write(host, GLAMO_REG_MMC_RDATADS2,
935 (u16)(host->data_mem->start >> 16));
938 ret = mmc_resume_host(host->mmc);
939 /* glamo_mci_clock_disable(host);*/
944 static struct dev_pm_ops glamo_mci_pm_ops = {
945 .suspend = glamo_mci_suspend,
946 .resume = glamo_mci_resume,
948 #define GLAMO_MCI_PM_OPS (&glamo_mci_pm_ops)
950 #else /* CONFIG_PM */
951 #define GLAMO_MCI_PM_OPS NULL
952 #endif /* CONFIG_PM */
955 static struct platform_driver glamo_mci_driver =
957 .probe = glamo_mci_probe,
958 .remove = glamo_mci_remove,
961 .owner = THIS_MODULE,
962 .pm = GLAMO_MCI_PM_OPS,
966 static int __init glamo_mci_init(void)
968 platform_driver_register(&glamo_mci_driver);
972 static void __exit glamo_mci_exit(void)
974 platform_driver_unregister(&glamo_mci_driver);
977 module_init(glamo_mci_init);
978 module_exit(glamo_mci_exit);
980 MODULE_DESCRIPTION("Glamo MMC/SD Card Interface driver");
981 MODULE_LICENSE("GPL");
982 MODULE_AUTHOR("Andy Green <andy@openmoko.com>");