target/linux/mvebu/patches-3.18/022-ARM-mvebu-A385-AP-Enable-the-NAND-controller.patch

   1 From 7eb1f09ec8e25aa2fc3f6fc5fc9405d9f917d503 Mon Sep 17 00:00:00 2001
   2 From: Maxime Ripard <maxime.ripard@free-electrons.com>
   3 Date: Thu, 11 Dec 2014 14:14:58 +0100
   4 Subject: [PATCH 1/2] ARM: mvebu: A385-AP: Enable the NAND controller
   5
   6 The A385 AP has a 1GB NAND chip. Enable it.
   7
   8 Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
   9 ---
  10  arch/arm/boot/dts/armada-385-db-ap.dts | 13 +++++++++++++
  11  1 file changed, 13 insertions(+)
  12
  13 diff --git a/arch/arm/boot/dts/armada-385-db-ap.dts b/arch/arm/boot/dts/armada-385-db-ap.dts
  14 index 3a51531eb37b..02db04867d8f 100644
  15 --- a/arch/arm/boot/dts/armada-385-db-ap.dts
  16 +++ b/arch/arm/boot/dts/armada-385-db-ap.dts
  17 @@ -122,6 +122,19 @@
  18                                 phy = <&phy0>;
  19                                 phy-mode = "rgmii-id";
  20                         };
  21 +
  22 +                       nfc: flash@d0000 {
  23 +                               status = "okay";
  24 +                               #address-cells = <1>;
  25 +                               #size-cells = <1>;
  26 +
  27 +                               num-cs = <1>;
  28 +                               nand-ecc-strength = <4>;
  29 +                               nand-ecc-step-size = <512>;
  30 +                               marvell,nand-keep-config;
  31 +                               marvell,nand-enable-arbiter;
  32 +                               nand-on-flash-bbt;
  33 +                       };
  34                 };
  35
  36                 pcie-controller {
  37 --
  38 2.2.1
  39