mxs: bump kernel to 3.12
[openwrt.git] / target / linux / mpc85xx / patches-3.10 / 110-fix_mpc8548_cds.patch
1 --- a/arch/powerpc/boot/dts/mpc8548cds_32b.dts
2 +++ b/arch/powerpc/boot/dts/mpc8548cds_32b.dts
3 @@ -75,6 +75,9 @@
4                         ranges = <0x0 0x0 0x0 0xc0000000 0x0 0x20000000>;
5                 };
6         };
7 +       chosen {
8 +               linux,stdout-path = "/soc8548@e0000000/serial@4600";
9 +       };
10  };
11  
12  /*
13 --- a/arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi
14 +++ b/arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi
15 @@ -131,7 +131,24 @@
16  
17  /include/ "pq3-i2c-0.dtsi"
18  /include/ "pq3-i2c-1.dtsi"
19 -/include/ "pq3-duart-0.dtsi"
20 +
21 +       serial0: serial@4600 {
22 +               cell-index = <1>;
23 +               device_type = "serial";
24 +               compatible = "fsl,ns16550", "ns16550";
25 +               reg = <0x4600 0x100>;
26 +               clock-frequency = <0>;
27 +               interrupts = <42 2 0 0>;
28 +       };
29 +
30 +       serial1: serial@4500 {
31 +               cell-index = <0>;
32 +               device_type = "serial";
33 +               compatible = "fsl,ns16550", "ns16550";
34 +               reg = <0x4500 0x100>;
35 +               clock-frequency = <0>;
36 +               interrupts = <42 2 0 0>;
37 +       };
38  
39         L2: l2-cache-controller@20000 {
40                 compatible = "fsl,mpc8548-l2-cache-controller";