2 * Copyright (C) 2003 Artec Design Ltd.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
10 #ifndef __ASM_ARCH_MCS814X_H
11 #define __ASM_ARCH_MCS814X_H
13 #define MCS814X_IO_BASE 0xF0000000
14 #define MCS814X_IO_START 0x40000000
15 #define MCS814X_IO_SIZE 0x00100000
17 /* IRQ controller register offset */
18 #define MCS814X_IRQ_ICR 0x00
19 #define MCS814X_IRQ_ISR 0x04
20 #define MCS814X_IRQ_MASK 0x20
21 #define MCS814X_IRQ_STS0 0x40
23 #define _PHYS_CONFADDR 0x40000000
24 #define _VIRT_CONFADDR MCS814X_IO_BASE
26 #define _CONFOFFSET_UART 0x000DC000
27 #define _CONFOFFSET_DBGLED 0x000EC000
28 #define _CONFOFFSET_SYSDBG 0x000F8000
30 #define _CONFADDR_DBGLED (_VIRT_CONFADDR + _CONFOFFSET_DBGLED)
31 #define _CONFADDR_SYSDBG (_VIRT_CONFADDR + _CONFOFFSET_SYSDBG)
33 /* System configuration and bootstrap registers */
34 #define SYSDBG_BS1 0x00
35 #define CPU_FREQ_SHIFT 27
36 #define CPU_FREQ_MASK 0x0F
37 #define SDRAM_FREQ_BIT (1 << 22)
39 #define SYSDBG_BS2 0x04
40 #define LED_CFG_MASK 0x03
41 #define CPU_MODE_SHIFT 23
42 #define CPU_MODE_MASK 0x03
44 #define SYSDBG_SYSCTL_MAC 0x1d
45 #define BUF_SHIFT_BIT (1 << 0)
47 #define SYSDBG_SYSCTL 0x08
48 #define SYSCTL_EMAC (1 << 0)
49 #define SYSCTL_CIPHER (1 << 16)
51 #define SYSDBG_PLL_CTL 0x3C
53 #endif /* __ASM_ARCH_MCS814X_H */