target/linux/lantiq/patches-3.18/0035-owrt-lantiq-wifi-and-ethernet-eeprom-handling.patch

   1 From f8c5db89e793a4bc6c1e87bd7b3a5cec16b75bc3 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Wed, 10 Sep 2014 22:42:14 +0200
   4 Subject: [PATCH 35/36] owrt: lantiq: wifi and ethernet eeprom handling
   5
   6 Signed-off-by: John Crispin <blogic@openwrt.org>
   7 ---
   8  arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h  |    6 +
   9  .../mips/include/asm/mach-lantiq/xway/lantiq_soc.h |    3 +
  10  arch/mips/lantiq/xway/Makefile                     |    3 +
  11  arch/mips/lantiq/xway/ath_eep.c                    |  282 ++++++++++++++++++++
  12  arch/mips/lantiq/xway/eth_mac.c                    |   76 ++++++
  13  arch/mips/lantiq/xway/pci-ath-fixup.c              |  109 ++++++++
  14  arch/mips/lantiq/xway/rt_eep.c                     |   60 +++++
  15  7 files changed, 539 insertions(+)
  16  create mode 100644 arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h
  17  create mode 100644 arch/mips/lantiq/xway/ath_eep.c
  18  create mode 100644 arch/mips/lantiq/xway/eth_mac.c
  19  create mode 100644 arch/mips/lantiq/xway/pci-ath-fixup.c
  20  create mode 100644 arch/mips/lantiq/xway/rt_eep.c
  21
  22 --- /dev/null
  23 +++ b/arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h
  24 @@ -0,0 +1,6 @@
  25 +#ifndef _PCI_ATH_FIXUP
  26 +#define _PCI_ATH_FIXUP
  27 +
  28 +void ltq_pci_ath_fixup(unsigned slot, u16 *cal_data) __init;
  29 +
  30 +#endif /* _PCI_ATH_FIXUP */
  31 --- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
  32 +++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
  33 @@ -90,5 +90,8 @@ int xrx200_gphy_boot(struct device *dev,
  34  extern void ltq_pmu_enable(unsigned int module);
  35  extern void ltq_pmu_disable(unsigned int module);
  36
  37 +/* allow the ethernet driver to load a flash mapped mac addr */
  38 +const u8* ltq_get_eth_mac(void);
  39 +
  40  #endif /* CONFIG_SOC_TYPE_XWAY */
  41  #endif /* _LTQ_XWAY_H__ */
  42 --- a/arch/mips/lantiq/xway/Makefile
  43 +++ b/arch/mips/lantiq/xway/Makefile
  44 @@ -2,4 +2,7 @@ obj-y := prom.o sysctrl.o clk.o reset.o
  45
  46  obj-y += vmmc.o tffs.o
  47
  48 +obj-y += eth_mac.o
  49 +obj-$(CONFIG_PCI) += ath_eep.o rt_eep.o pci-ath-fixup.o
  50 +
  51  obj-$(CONFIG_XRX200_PHY_FW) += xrx200_phy_fw.o
  52 --- /dev/null
  53 +++ b/arch/mips/lantiq/xway/ath_eep.c
  54 @@ -0,0 +1,298 @@
  55 +/*
  56 + *  Copyright (C) 2011 Luca Olivetti <luca@ventoso.org>
  57 + *  Copyright (C) 2011 John Crispin <blogic@openwrt.org>
  58 + *  Copyright (C) 2011 Andrej Vlašić <andrej.vlasic0@gmail.com>
  59 + *  Copyright (C) 2013 Álvaro Fernández Rojas <noltari@gmail.com>
  60 + *  Copyright (C) 2013 Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
  61 + *  Copyright (C) 2015 Vittorio Gambaletta <openwrt@vittgam.net>
  62 + *
  63 + *  This program is free software; you can redistribute it and/or modify it
  64 + *  under the terms of the GNU General Public License version 2 as published
  65 + *  by the Free Software Foundation.
  66 + */
  67 +
  68 +#include <linux/init.h>
  69 +#include <linux/module.h>
  70 +#include <linux/platform_device.h>
  71 +#include <linux/etherdevice.h>
  72 +#include <linux/ath5k_platform.h>
  73 +#include <linux/ath9k_platform.h>
  74 +#include <linux/pci.h>
  75 +#include <linux/err.h>
  76 +#include <linux/mtd/mtd.h>
  77 +#include <pci-ath-fixup.h>
  78 +#include <lantiq_soc.h>
  79 +
  80 +extern int (*ltq_pci_plat_dev_init)(struct pci_dev *dev);
  81 +struct ath5k_platform_data ath5k_pdata;
  82 +struct ath9k_platform_data ath9k_pdata = {
  83 +       .led_pin = -1,
  84 +};
  85 +static u8 athxk_eeprom_mac[6];
  86 +
  87 +static int ath9k_pci_plat_dev_init(struct pci_dev *dev)
  88 +{
  89 +       dev->dev.platform_data = &ath9k_pdata;
  90 +       return 0;
  91 +}
  92 +
  93 +static int ath9k_eep_load;
  94 +int __init of_ath9k_eeprom_probe(struct platform_device *pdev)
  95 +{
  96 +       struct device_node *np = pdev->dev.of_node, *mtd_np;
  97 +       struct resource *eep_res, *mac_res = NULL;
  98 +       void __iomem *eep, *mac;
  99 +       int mac_offset, led_pin;
 100 +       u32 mac_inc = 0, pci_slot = 0;
 101 +       int i;
 102 +       struct mtd_info *the_mtd;
 103 +       size_t flash_readlen;
 104 +       const __be32 *list;
 105 +       const char *part;
 106 +       phandle phandle;
 107 +
 108 +       if ((list = of_get_property(np, "ath,eep-flash", &i)) && i == 2 *
 109 +                       sizeof(*list) && (phandle = be32_to_cpup(list++)) &&
 110 +                       (mtd_np = of_find_node_by_phandle(phandle)) && ((part =
 111 +                       of_get_property(mtd_np, "label", NULL)) || (part =
 112 +                       mtd_np->name)) && (the_mtd = get_mtd_device_nm(part))
 113 +                       != ERR_PTR(-ENODEV)) {
 114 +               i = mtd_read(the_mtd, be32_to_cpup(list),
 115 +                               ATH9K_PLAT_EEP_MAX_WORDS << 1, &flash_readlen,
 116 +                               (void *) ath9k_pdata.eeprom_data);
 117 +               if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) {
 118 +                       size_t mac_readlen;
 119 +                       mtd_read(the_mtd, mac_offset, 6, &mac_readlen,
 120 +                               (void *) athxk_eeprom_mac);
 121 +               }
 122 +               put_mtd_device(the_mtd);
 123 +               if ((sizeof(ath9k_pdata.eeprom_data) != flash_readlen) || i) {
 124 +                       dev_err(&pdev->dev, "failed to load eeprom from mtd\n");
 125 +                       return -ENODEV;
 126 +               }
 127 +       } else {
 128 +               eep_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 129 +               mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
 130 +
 131 +               if (!eep_res) {
 132 +                       dev_err(&pdev->dev, "failed to load eeprom address\n");
 133 +                       return -ENODEV;
 134 +               }
 135 +               if (resource_size(eep_res) != ATH9K_PLAT_EEP_MAX_WORDS << 1) {
 136 +                       dev_err(&pdev->dev, "eeprom has an invalid size\n");
 137 +                       return -EINVAL;
 138 +               }
 139 +
 140 +               eep = ioremap(eep_res->start, resource_size(eep_res));
 141 +               memcpy_fromio(ath9k_pdata.eeprom_data, eep,
 142 +                               ATH9K_PLAT_EEP_MAX_WORDS << 1);
 143 +       }
 144 +
 145 +       if (of_find_property(np, "ath,eep-swap", NULL))
 146 +               for (i = 0; i < ATH9K_PLAT_EEP_MAX_WORDS; i++)
 147 +                       ath9k_pdata.eeprom_data[i] = swab16(ath9k_pdata.eeprom_data[i]);
 148 +
 149 +       if (of_find_property(np, "ath,eep-endian", NULL)) {
 150 +               ath9k_pdata.endian_check = true;
 151 +
 152 +               dev_info(&pdev->dev, "endian check enabled.\n");
 153 +       }
 154 +
 155 +       if (!is_valid_ether_addr(athxk_eeprom_mac)) {
 156 +               if (mac_res) {
 157 +                       if (resource_size(mac_res) != 6) {
 158 +                               dev_err(&pdev->dev, "mac has an invalid size\n");
 159 +                               return -EINVAL;
 160 +                       }
 161 +                       mac = ioremap(mac_res->start, resource_size(mac_res));
 162 +                       memcpy_fromio(athxk_eeprom_mac, mac, 6);
 163 +               } else if (ltq_get_eth_mac()) {
 164 +                       memcpy(athxk_eeprom_mac, ltq_get_eth_mac(), 6);
 165 +               }
 166 +       }
 167 +       if (!is_valid_ether_addr(athxk_eeprom_mac)) {
 168 +               dev_warn(&pdev->dev, "using random mac\n");
 169 +               random_ether_addr(athxk_eeprom_mac);
 170 +       }
 171 +
 172 +       if (!of_property_read_u32(np, "ath,mac-increment", &mac_inc))
 173 +               athxk_eeprom_mac[5] += mac_inc;
 174 +
 175 +       ath9k_pdata.macaddr = athxk_eeprom_mac;
 176 +       ltq_pci_plat_dev_init = ath9k_pci_plat_dev_init;
 177 +
 178 +       if (!of_property_read_u32(np, "ath,pci-slot", &pci_slot)) {
 179 +               ltq_pci_ath_fixup(pci_slot, ath9k_pdata.eeprom_data);
 180 +
 181 +               dev_info(&pdev->dev, "pci slot: %u\n", pci_slot);
 182 +                if (ath9k_eep_load) {
 183 +                        struct pci_dev *d = NULL;
 184 +                        while ((d = pci_get_device(PCI_VENDOR_ID_ATHEROS,
 185 +                                        PCI_ANY_ID, d)) != NULL)
 186 +                                pci_fixup_device(pci_fixup_early, d);
 187 +                }
 188 +
 189 +       }
 190 +
 191 +       if (!of_property_read_u32(np, "ath,led-pin", &led_pin)) {
 192 +               ath9k_pdata.led_pin = led_pin;
 193 +               dev_info(&pdev->dev, "using led pin %d.\n", led_pin);
 194 +       }
 195 +
 196 +       if (of_property_read_bool(np, "ath,led-active-high")) {
 197 +               ath9k_pdata.led_active_high = true;
 198 +               dev_info(&pdev->dev, "inverted LED polarity\n");
 199 +       }
 200 +
 201 +       if (of_property_read_bool(np, "ath,disable-2ghz")) {
 202 +               ath9k_pdata.disable_2ghz = true;
 203 +               dev_info(&pdev->dev, "disabled 2.4 GHz band\n");
 204 +       }
 205 +
 206 +       if (of_property_read_bool(np, "ath,disable-5ghz")) {
 207 +               ath9k_pdata.disable_5ghz = true;
 208 +               dev_info(&pdev->dev, "disabled 5 GHz band\n");
 209 +       }
 210 +
 211 +       dev_info(&pdev->dev, "loaded ath9k eeprom\n");
 212 +
 213 +       return 0;
 214 +}
 215 +
 216 +static struct of_device_id ath9k_eeprom_ids[] = {
 217 +       { .compatible = "ath9k,eeprom" },
 218 +       { }
 219 +};
 220 +
 221 +static struct platform_driver ath9k_eeprom_driver = {
 222 +       .driver         = {
 223 +               .name           = "ath9k,eeprom",
 224 +               .owner  = THIS_MODULE,
 225 +               .of_match_table = of_match_ptr(ath9k_eeprom_ids),
 226 +       },
 227 +};
 228 +
 229 +static int __init of_ath9k_eeprom_init(void)
 230 +{
 231 +        int ret = platform_driver_probe(&ath9k_eeprom_driver, of_ath9k_eeprom_probe);
 232 +
 233 +        if (ret)
 234 +                ath9k_eep_load = 1;
 235 +
 236 +        return ret;
 237 +}
 238 +
 239 +static int __init of_ath9k_eeprom_init_late(void)
 240 +{
 241 +        if (!ath9k_eep_load)
 242 +                return 0;
 243 +        return platform_driver_probe(&ath9k_eeprom_driver, of_ath9k_eeprom_probe);
 244 +}
 245 +late_initcall(of_ath9k_eeprom_init_late);
 246 +subsys_initcall(of_ath9k_eeprom_init);
 247 +
 248 +
 249 +static int ath5k_pci_plat_dev_init(struct pci_dev *dev)
 250 +{
 251 +       dev->dev.platform_data = &ath5k_pdata;
 252 +       return 0;
 253 +}
 254 +
 255 +int __init of_ath5k_eeprom_probe(struct platform_device *pdev)
 256 +{
 257 +       struct device_node *np = pdev->dev.of_node, *mtd_np;
 258 +       struct resource *eep_res, *mac_res = NULL;
 259 +       void __iomem *eep, *mac;
 260 +       int mac_offset;
 261 +       u32 mac_inc = 0;
 262 +       int i;
 263 +       struct mtd_info *the_mtd;
 264 +       size_t flash_readlen;
 265 +       const __be32 *list;
 266 +       const char *part;
 267 +       phandle phandle;
 268 +
 269 +       if ((list = of_get_property(np, "ath,eep-flash", &i)) && i == 2 *
 270 +                       sizeof(*list) && (phandle = be32_to_cpup(list++)) &&
 271 +                       (mtd_np = of_find_node_by_phandle(phandle)) && ((part =
 272 +                       of_get_property(mtd_np, "label", NULL)) || (part =
 273 +                       mtd_np->name)) && (the_mtd = get_mtd_device_nm(part))
 274 +                       != ERR_PTR(-ENODEV)) {
 275 +               i = mtd_read(the_mtd, be32_to_cpup(list),
 276 +                               ATH5K_PLAT_EEP_MAX_WORDS << 1, &flash_readlen,
 277 +                               (void *) ath5k_pdata.eeprom_data);
 278 +               put_mtd_device(the_mtd);
 279 +               if ((sizeof(ATH5K_PLAT_EEP_MAX_WORDS << 1) != flash_readlen)
 280 +                               || i) {
 281 +                       dev_err(&pdev->dev, "failed to load eeprom from mtd\n");
 282 +                       return -ENODEV;
 283 +               }
 284 +       } else {
 285 +               eep_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 286 +               mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
 287 +
 288 +               if (!eep_res) {
 289 +                       dev_err(&pdev->dev, "failed to load eeprom address\n");
 290 +                       return -ENODEV;
 291 +               }
 292 +               if (resource_size(eep_res) != ATH5K_PLAT_EEP_MAX_WORDS << 1) {
 293 +                       dev_err(&pdev->dev, "eeprom has an invalid size\n");
 294 +                       return -EINVAL;
 295 +               }
 296 +
 297 +               eep = ioremap(eep_res->start, resource_size(eep_res));
 298 +               ath5k_pdata.eeprom_data = kmalloc(ATH5K_PLAT_EEP_MAX_WORDS<<1,
 299 +                               GFP_KERNEL);
 300 +               memcpy_fromio(ath5k_pdata.eeprom_data, eep,
 301 +                               ATH5K_PLAT_EEP_MAX_WORDS << 1);
 302 +       }
 303 +
 304 +       if (of_find_property(np, "ath,eep-swap", NULL))
 305 +               for (i = 0; i < ATH5K_PLAT_EEP_MAX_WORDS; i++)
 306 +                       ath5k_pdata.eeprom_data[i] = swab16(ath5k_pdata.eeprom_data[i]);
 307 +
 308 +       if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) {
 309 +               memcpy_fromio(athxk_eeprom_mac, (void*) ath5k_pdata.eeprom_data + mac_offset, 6);
 310 +       } else if (mac_res) {
 311 +               if (resource_size(mac_res) != 6) {
 312 +                       dev_err(&pdev->dev, "mac has an invalid size\n");
 313 +                       return -EINVAL;
 314 +               }
 315 +               mac = ioremap(mac_res->start, resource_size(mac_res));
 316 +               memcpy_fromio(athxk_eeprom_mac, mac, 6);
 317 +       } else if (ltq_get_eth_mac())
 318 +               memcpy(athxk_eeprom_mac, ltq_get_eth_mac(), 6);
 319 +       else {
 320 +               dev_warn(&pdev->dev, "using random mac\n");
 321 +               random_ether_addr(athxk_eeprom_mac);
 322 +       }
 323 +
 324 +       if (!of_property_read_u32(np, "ath,mac-increment", &mac_inc))
 325 +               athxk_eeprom_mac[5] += mac_inc;
 326 +
 327 +       ath5k_pdata.macaddr = athxk_eeprom_mac;
 328 +       ltq_pci_plat_dev_init = ath5k_pci_plat_dev_init;
 329 +
 330 +       dev_info(&pdev->dev, "loaded ath5k eeprom\n");
 331 +
 332 +       return 0;
 333 +}
 334 +
 335 +static struct of_device_id ath5k_eeprom_ids[] = {
 336 +       { .compatible = "ath5k,eeprom" },
 337 +       { }
 338 +};
 339 +
 340 +static struct platform_driver ath5k_eeprom_driver = {
 341 +       .driver         = {
 342 +               .name           = "ath5k,eeprom",
 343 +               .owner  = THIS_MODULE,
 344 +               .of_match_table = of_match_ptr(ath5k_eeprom_ids),
 345 +       },
 346 +};
 347 +
 348 +static int __init of_ath5k_eeprom_init(void)
 349 +{
 350 +       return platform_driver_probe(&ath5k_eeprom_driver, of_ath5k_eeprom_probe);
 351 +}
 352 +device_initcall(of_ath5k_eeprom_init);
 353 --- /dev/null
 354 +++ b/arch/mips/lantiq/xway/eth_mac.c
 355 @@ -0,0 +1,76 @@
 356 +/*
 357 + *  Copyright (C) 2012 John Crispin <blogic@openwrt.org>
 358 + *
 359 + *  This program is free software; you can redistribute it and/or modify it
 360 + *  under the terms of the GNU General Public License version 2 as published
 361 + *  by the Free Software Foundation.
 362 + */
 363 +
 364 +#include <linux/init.h>
 365 +#include <linux/module.h>
 366 +#include <linux/of_platform.h>
 367 +#include <linux/if_ether.h>
 368 +
 369 +static u8 eth_mac[6];
 370 +static int eth_mac_set;
 371 +
 372 +const u8* ltq_get_eth_mac(void)
 373 +{
 374 +       return eth_mac;
 375 +}
 376 +
 377 +static int __init setup_ethaddr(char *str)
 378 +{
 379 +       eth_mac_set = mac_pton(str, eth_mac);
 380 +       return !eth_mac_set;
 381 +}
 382 +__setup("ethaddr=", setup_ethaddr);
 383 +
 384 +int __init of_eth_mac_probe(struct platform_device *pdev)
 385 +{
 386 +       struct device_node *np = pdev->dev.of_node;
 387 +       struct resource *mac_res;
 388 +       void __iomem *mac;
 389 +       u32 mac_inc = 0;
 390 +
 391 +       if (eth_mac_set) {
 392 +               dev_err(&pdev->dev, "mac was already set by bootloader\n");
 393 +               return -EINVAL;
 394 +       }
 395 +       mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 396 +
 397 +       if (!mac_res) {
 398 +               dev_err(&pdev->dev, "failed to load mac\n");
 399 +               return -EINVAL;
 400 +       }
 401 +       if (resource_size(mac_res) != 6) {
 402 +               dev_err(&pdev->dev, "mac has an invalid size\n");
 403 +               return -EINVAL;
 404 +       }
 405 +       mac = ioremap(mac_res->start, resource_size(mac_res));
 406 +       memcpy_fromio(eth_mac, mac, 6);
 407 +
 408 +       if (!of_property_read_u32(np, "mac-increment", &mac_inc))
 409 +               eth_mac[5] += mac_inc;
 410 +
 411 +       return 0;
 412 +}
 413 +
 414 +static struct of_device_id eth_mac_ids[] = {
 415 +       { .compatible = "lantiq,eth-mac" },
 416 +       { /* sentinel */ }
 417 +};
 418 +
 419 +static struct platform_driver eth_mac_driver = {
 420 +       .driver         = {
 421 +               .name           = "lantiq,eth-mac",
 422 +               .owner  = THIS_MODULE,
 423 +               .of_match_table = of_match_ptr(eth_mac_ids),
 424 +       },
 425 +};
 426 +
 427 +static int __init of_eth_mac_init(void)
 428 +{
 429 +       return platform_driver_probe(&eth_mac_driver, of_eth_mac_probe);
 430 +}
 431 +device_initcall(of_eth_mac_init);
 432 --- /dev/null
 433 +++ b/arch/mips/lantiq/xway/pci-ath-fixup.c
 434 @@ -0,0 +1,109 @@
 435 +/*
 436 + *  Atheros AP94 reference board PCI initialization
 437 + *
 438 + *  Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
 439 + *
 440 + *  This program is free software; you can redistribute it and/or modify it
 441 + *  under the terms of the GNU General Public License version 2 as published
 442 + *  by the Free Software Foundation.
 443 + */
 444 +
 445 +#include <linux/pci.h>
 446 +#include <linux/init.h>
 447 +#include <linux/delay.h>
 448 +#include <lantiq_soc.h>
 449 +
 450 +#define LTQ_PCI_MEM_BASE               0x18000000
 451 +
 452 +struct ath_fixup {
 453 +       u16             *cal_data;
 454 +       unsigned        slot;
 455 +};
 456 +
 457 +static int ath_num_fixups;
 458 +static struct ath_fixup ath_fixups[2];
 459 +
 460 +static void ath_pci_fixup(struct pci_dev *dev)
 461 +{
 462 +       void __iomem *mem;
 463 +       u16 *cal_data = NULL;
 464 +       u16 cmd;
 465 +       u32 bar0;
 466 +       u32 val;
 467 +       unsigned i;
 468 +
 469 +       for (i = 0; i < ath_num_fixups; i++) {
 470 +               if (ath_fixups[i].cal_data == NULL)
 471 +                       continue;
 472 +
 473 +               if (ath_fixups[i].slot != PCI_SLOT(dev->devfn))
 474 +                       continue;
 475 +
 476 +               cal_data = ath_fixups[i].cal_data;
 477 +               break;
 478 +       }
 479 +
 480 +       if (cal_data == NULL)
 481 +               return;
 482 +
 483 +       if (*cal_data != 0xa55a) {
 484 +               pr_err("pci %s: invalid calibration data\n", pci_name(dev));
 485 +               return;
 486 +       }
 487 +
 488 +       pr_info("pci %s: fixup device configuration\n", pci_name(dev));
 489 +
 490 +       mem = ioremap(LTQ_PCI_MEM_BASE, 0x10000);
 491 +       if (!mem) {
 492 +               pr_err("pci %s: ioremap error\n", pci_name(dev));
 493 +               return;
 494 +       }
 495 +
 496 +       pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
 497 +       pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, LTQ_PCI_MEM_BASE);
 498 +       pci_read_config_word(dev, PCI_COMMAND, &cmd);
 499 +       cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
 500 +       pci_write_config_word(dev, PCI_COMMAND, cmd);
 501 +
 502 +       /* set pointer to first reg address */
 503 +       cal_data += 3;
 504 +       while (*cal_data != 0xffff) {
 505 +               u32 reg;
 506 +               reg = *cal_data++;
 507 +               val = *cal_data++;
 508 +               val |= (*cal_data++) << 16;
 509 +
 510 +               ltq_w32(swab32(val), mem + reg);
 511 +               udelay(100);
 512 +       }
 513 +
 514 +       pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
 515 +       dev->vendor = val & 0xffff;
 516 +       dev->device = (val >> 16) & 0xffff;
 517 +
 518 +       pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
 519 +       dev->revision = val & 0xff;
 520 +       dev->class = val >> 8; /* upper 3 bytes */
 521 +
 522 +       pr_info("pci %s: fixup info: [%04x:%04x] revision %02x class %#08x\n",
 523 +               pci_name(dev), dev->vendor, dev->device, dev->revision, dev->class);
 524 +
 525 +       pci_read_config_word(dev, PCI_COMMAND, &cmd);
 526 +       cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
 527 +       pci_write_config_word(dev, PCI_COMMAND, cmd);
 528 +
 529 +       pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
 530 +
 531 +       iounmap(mem);
 532 +}
 533 +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath_pci_fixup);
 534 +
 535 +void __init ltq_pci_ath_fixup(unsigned slot, u16 *cal_data)
 536 +{
 537 +       if (ath_num_fixups >= ARRAY_SIZE(ath_fixups))
 538 +               return;
 539 +
 540 +       ath_fixups[ath_num_fixups].slot = slot;
 541 +       ath_fixups[ath_num_fixups].cal_data = cal_data;
 542 +       ath_num_fixups++;
 543 +}
 544 --- /dev/null
 545 +++ b/arch/mips/lantiq/xway/rt_eep.c
 546 @@ -0,0 +1,60 @@
 547 +/*
 548 + *  Copyright (C) 2011 John Crispin <blogic@openwrt.org>
 549 + *
 550 + *  This program is free software; you can redistribute it and/or modify it
 551 + *  under the terms of the GNU General Public License version 2 as published
 552 + *  by the Free Software Foundation.
 553 + */
 554 +
 555 +#include <linux/init.h>
 556 +#include <linux/module.h>
 557 +#include <linux/pci.h>
 558 +#include <linux/platform_device.h>
 559 +#include <linux/rt2x00_platform.h>
 560 +
 561 +extern int (*ltq_pci_plat_dev_init)(struct pci_dev *dev);
 562 +static struct rt2x00_platform_data rt2x00_pdata;
 563 +
 564 +static int rt2x00_pci_plat_dev_init(struct pci_dev *dev)
 565 +{
 566 +       dev->dev.platform_data = &rt2x00_pdata;
 567 +       return 0;
 568 +}
 569 +
 570 +int __init of_ralink_eeprom_probe(struct platform_device *pdev)
 571 +{
 572 +       struct device_node *np = pdev->dev.of_node;
 573 +       const char *eeprom;
 574 +
 575 +       if (of_property_read_string(np, "ralink,eeprom", &eeprom)) {
 576 +               dev_err(&pdev->dev, "failed to load eeprom filename\n");
 577 +               return 0;
 578 +       }
 579 +
 580 +       rt2x00_pdata.eeprom_file_name = kstrdup(eeprom, GFP_KERNEL);
 581 +//     rt2x00_pdata.mac_address = mac;
 582 +       ltq_pci_plat_dev_init = rt2x00_pci_plat_dev_init;
 583 +
 584 +       dev_info(&pdev->dev, "using %s as eeprom\n", eeprom);
 585 +
 586 +       return 0;
 587 +}
 588 +
 589 +static struct of_device_id ralink_eeprom_ids[] = {
 590 +       { .compatible = "ralink,eeprom" },
 591 +       { }
 592 +};
 593 +
 594 +static struct platform_driver ralink_eeprom_driver = {
 595 +       .driver         = {
 596 +               .name           = "ralink,eeprom",
 597 +               .owner  = THIS_MODULE,
 598 +               .of_match_table = of_match_ptr(ralink_eeprom_ids),
 599 +       },
 600 +};
 601 +
 602 +static int __init of_ralink_eeprom_init(void)
 603 +{
 604 +       return platform_driver_probe(&ralink_eeprom_driver, of_ralink_eeprom_probe);
 605 +}
 606 +device_initcall(of_ralink_eeprom_init);
 607 --- a/drivers/net/ethernet/lantiq_etop.c
 608 +++ b/drivers/net/ethernet/lantiq_etop.c
 609 @@ -161,7 +161,7 @@ struct ltq_etop_priv {
 610         int tx_irq;
 611         int rx_irq;
 612
 613 -       const void *mac;
 614 +       void *mac;
 615         int mii_mode;
 616
 617         spinlock_t lock;
 618 @@ -840,7 +840,11 @@ ltq_etop_init(struct net_device *dev)
 619         if (err)
 620                 goto err_hw;
 621
 622 -       memcpy(&mac, &priv->pldata->mac, sizeof(struct sockaddr));
 623 +       if (priv->mac)
 624 +               memcpy(&mac.sa_data, priv->mac, ETH_ALEN);
 625 +       else
 626 +               memcpy(&mac.sa_data, ltq_get_eth_mac(), ETH_ALEN);
 627 +
 628         if (!is_valid_ether_addr(mac.sa_data)) {
 629                 pr_warn("etop: invalid MAC, using random\n");
 630                 eth_random_addr(mac.sa_data);