target/linux/generic-2.6/files/drivers/net/phy/rtl8366rb.c

   1 /*
   2  * Platform driver for the Realtek RTL8366S ethernet switch
   3  *
   4  * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
   5  * Copyright (C) 2010 Antti Seppälä <a.seppala@gmail.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify it
   8  * under the terms of the GNU General Public License version 2 as published
   9  * by the Free Software Foundation.
  10  */
  11
  12 #include <linux/kernel.h>
  13 #include <linux/module.h>
  14 #include <linux/init.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/delay.h>
  17 #include <linux/skbuff.h>
  18 #include <linux/switch.h>
  19 #include <linux/rtl8366rb.h>
  20
  21 #include "rtl8366_smi.h"
  22
  23 #ifdef CONFIG_RTL8366S_PHY_DEBUG_FS
  24 #include <linux/debugfs.h>
  25 #endif
  26
  27 #define RTL8366S_DRIVER_DESC    "Realtek RTL8366RB ethernet switch driver"
  28 #define RTL8366S_DRIVER_VER     "0.2.2"
  29
  30 #define RTL8366S_PHY_NO_MAX                 4
  31 #define RTL8366S_PHY_PAGE_MAX               7
  32 #define RTL8366S_PHY_ADDR_MAX               31
  33
  34 #define RTL8366_CHIP_GLOBAL_CTRL_REG        0x0000
  35 #define RTL8366_CHIP_CTRL_VLAN              (1 << 13)
  36 #define RTL8366_CHIP_CTRL_VLAN_4KTB         (1 << 14)
  37
  38 #define RTL8366_RESET_CTRL_REG              0x0100
  39 #define RTL8366_CHIP_CTRL_RESET_HW          1
  40 #define RTL8366_CHIP_CTRL_RESET_SW          (1 << 1)
  41
  42 #define RTL8366S_CHIP_VERSION_CTRL_REG      0x050A
  43 #define RTL8366S_CHIP_VERSION_MASK          0xf
  44 #define RTL8366S_CHIP_ID_REG                0x0509
  45 #define RTL8366S_CHIP_ID_8366               0x5937
  46
  47 /* PHY registers control */
  48 #define RTL8366S_PHY_ACCESS_CTRL_REG        0x8000
  49 #define RTL8366S_PHY_ACCESS_DATA_REG        0x8002
  50
  51 #define RTL8366S_PHY_CTRL_READ              1
  52 #define RTL8366S_PHY_CTRL_WRITE             0
  53
  54 #define RTL8366S_PHY_REG_MASK               0x1f
  55 #define RTL8366S_PHY_PAGE_OFFSET            5
  56 #define RTL8366S_PHY_PAGE_MASK              (0xf << 5)
  57 #define RTL8366S_PHY_NO_OFFSET              9
  58 #define RTL8366S_PHY_NO_MASK                (0x1f << 9)
  59
  60 /* LED control registers */
  61 #define RTL8366_LED_BLINKRATE_REG           0x0430
  62 #define RTL8366_LED_BLINKRATE_BIT           0
  63 #define RTL8366_LED_BLINKRATE_MASK          0x0007
  64
  65 #define RTL8366_LED_CTRL_REG                0x0431
  66 #define RTL8366_LED_0_1_CTRL_REG            0x0432
  67 #define RTL8366_LED_2_3_CTRL_REG            0x0433
  68
  69 #define RTL8366S_MIB_COUNT                  33
  70 #define RTL8366S_GLOBAL_MIB_COUNT           1
  71 #define RTL8366S_MIB_COUNTER_PORT_OFFSET    0x0050
  72 #define RTL8366S_MIB_COUNTER_BASE           0x1000
  73 #define RTL8366S_MIB_CTRL_REG               0x13F0
  74 #define RTL8366S_MIB_CTRL_USER_MASK         0x0FFC
  75 #define RTL8366S_MIB_CTRL_BUSY_MASK         0x0001
  76 #define RTL8366S_MIB_CTRL_RESET_MASK        0x0001
  77
  78 #define RTL8366S_MIB_CTRL_GLOBAL_RESET_MASK 0x0004
  79 #define RTL8366S_MIB_CTRL_PORT_RESET_BIT    0x0003
  80 #define RTL8366S_MIB_CTRL_PORT_RESET_MASK   0x01FC
  81
  82
  83 #define RTL8366S_PORT_VLAN_CTRL_BASE        0x0063
  84 #define RTL8366S_PORT_VLAN_CTRL_REG(_p)  \
  85                 (RTL8366S_PORT_VLAN_CTRL_BASE + (_p) / 4)
  86 #define RTL8366S_PORT_VLAN_CTRL_MASK        0xf
  87 #define RTL8366S_PORT_VLAN_CTRL_SHIFT(_p)   (4 * ((_p) % 4))
  88
  89
  90 #define RTL8366S_VLAN_TABLE_READ_BASE       0x018C
  91 #define RTL8366S_VLAN_TABLE_WRITE_BASE      0x0185
  92
  93
  94 #define RTL8366S_TABLE_ACCESS_CTRL_REG      0x0180
  95 #define RTL8366S_TABLE_VLAN_READ_CTRL       0x0E01
  96 #define RTL8366S_TABLE_VLAN_WRITE_CTRL      0x0F01
  97
  98 #define RTL8366S_VLAN_MEMCONF_BASE          0x0020
  99
 100
 101 #define RTL8366S_PORT_LINK_STATUS_BASE      0x0014
 102 #define RTL8366S_PORT_STATUS_SPEED_MASK     0x0003
 103 #define RTL8366S_PORT_STATUS_DUPLEX_MASK    0x0004
 104 #define RTL8366S_PORT_STATUS_LINK_MASK      0x0010
 105 #define RTL8366S_PORT_STATUS_TXPAUSE_MASK   0x0020
 106 #define RTL8366S_PORT_STATUS_RXPAUSE_MASK   0x0040
 107 #define RTL8366S_PORT_STATUS_AN_MASK        0x0080
 108
 109
 110 #define RTL8366_PORT_NUM_CPU                5
 111 #define RTL8366_NUM_PORTS                   6
 112 #define RTL8366_NUM_VLANS                   16
 113 #define RTL8366_NUM_LEDGROUPS               4
 114 #define RTL8366_NUM_VIDS                    4096
 115 #define RTL8366S_PRIORITYMAX                7
 116 #define RTL8366S_FIDMAX                     7
 117
 118
 119 #define RTL8366_PORT_1                      (1 << 0) /* In userspace port 0 */
 120 #define RTL8366_PORT_2                      (1 << 1) /* In userspace port 1 */
 121 #define RTL8366_PORT_3                      (1 << 2) /* In userspace port 2 */
 122 #define RTL8366_PORT_4                      (1 << 3) /* In userspace port 3 */
 123 #define RTL8366_PORT_5                      (1 << 4) /* In userspace port 4 */
 124
 125 #define RTL8366_PORT_CPU                    (1 << 5) /* CPU port */
 126
 127 #define RTL8366_PORT_ALL                    (RTL8366_PORT_1 |       \
 128                                              RTL8366_PORT_2 |       \
 129                                              RTL8366_PORT_3 |       \
 130                                              RTL8366_PORT_4 |       \
 131                                              RTL8366_PORT_5 |       \
 132                                              RTL8366_PORT_CPU)
 133
 134 #define RTL8366_PORT_ALL_BUT_CPU            (RTL8366_PORT_1 |       \
 135                                              RTL8366_PORT_2 |       \
 136                                              RTL8366_PORT_3 |       \
 137                                              RTL8366_PORT_4 |       \
 138                                              RTL8366_PORT_5)
 139
 140 #define RTL8366_PORT_ALL_EXTERNAL           (RTL8366_PORT_1 |       \
 141                                              RTL8366_PORT_2 |       \
 142                                              RTL8366_PORT_3 |       \
 143                                              RTL8366_PORT_4)
 144
 145 #define RTL8366_PORT_ALL_INTERNAL            RTL8366_PORT_CPU
 146
 147 struct rtl8366rb {
 148         struct device           *parent;
 149         struct rtl8366_smi      smi;
 150         struct switch_dev       dev;
 151         char                    buf[4096];
 152 #ifdef CONFIG_RTL8366S_PHY_DEBUG_FS
 153         struct dentry           *debugfs_root;
 154 #endif
 155 };
 156
 157 struct rtl8366rb_vlanconfig {
 158         u16     reserved2:1;
 159         u16     priority:3;
 160         u16     vid:12;
 161         u16     untag:8;
 162         u16     member:8;
 163         u16     stag_mbr:8;
 164         u16     stag_idx:3;
 165         u16     reserved1:2;
 166         u16     fid:3;
 167 };
 168
 169 struct rtl8366rb_vlan4kentry {
 170         u16     reserved1:4;
 171         u16     vid:12;
 172         u16     untag:8;
 173         u16     member:8;
 174         u16     reserved2:13;
 175         u16     fid:3;
 176 };
 177
 178
 179 #ifdef CONFIG_RTL8366S_PHY_DEBUG_FS
 180 u16 gl_dbg_reg;
 181 #endif
 182
 183 struct mib_counter {
 184         unsigned        offset;
 185         unsigned        length;
 186         const char      *name;
 187 };
 188
 189 static struct mib_counter rtl8366rb_mib_counters[RTL8366S_MIB_COUNT] = {
 190         {  0, 4, "IfInOctets                        " },
 191         {  4, 4, "EtherStatsOctets                  " },
 192         {  8, 2, "EtherStatsUnderSizePkts           " },
 193         { 10, 2, "EtherFregament                    " },
 194         { 12, 2, "EtherStatsPkts64Octets            " },
 195         { 14, 2, "EtherStatsPkts65to127Octets       " },
 196         { 16, 2, "EtherStatsPkts128to255Octets      " },
 197         { 18, 2, "EtherStatsPkts256to511Octets      " },
 198         { 20, 2, "EtherStatsPkts512to1023Octets     " },
 199         { 22, 2, "EtherStatsPkts1024to1518Octets    " },
 200         { 24, 2, "EtherOversizeStats                " },
 201         { 26, 2, "EtherStatsJabbers                 " },
 202         { 28, 2, "IfInUcastPkts                     " },
 203         { 30, 2, "EtherStatsMulticastPkts           " },
 204         { 32, 2, "EtherStatsBroadcastPkts           " },
 205         { 34, 2, "EtherStatsDropEvents              " },
 206         { 36, 2, "Dot3StatsFCSErrors                " },
 207         { 38, 2, "Dot3StatsSymbolErrors             " },
 208         { 40, 2, "Dot3InPauseFrames                 " },
 209         { 42, 2, "Dot3ControlInUnknownOpcodes       " },
 210         { 44, 4, "IfOutOctets                       " },
 211         { 48, 2, "Dot3StatsSingleCollisionFrames    " },
 212         { 50, 2, "Dot3StatMultipleCollisionFrames   " },
 213         { 52, 2, "Dot3sDeferredTransmissions        " },
 214         { 54, 2, "Dot3StatsLateCollisions           " },
 215         { 56, 2, "EtherStatsCollisions              " },
 216         { 58, 2, "Dot3StatsExcessiveCollisions      " },
 217         { 60, 2, "Dot3OutPauseFrames                " },
 218         { 62, 2, "Dot1dBasePortDelayExceededDiscards" },
 219         { 64, 2, "Dot1dTpPortInDiscards             " },
 220         { 66, 2, "IfOutUcastPkts                    " },
 221         { 68, 2, "IfOutMulticastPkts                " },
 222         { 70, 2, "IfOutBroadcastPkts                " },
 223 };
 224
 225 static inline struct rtl8366rb *smi_to_rtl8366rb(struct rtl8366_smi *smi)
 226 {
 227         return container_of(smi, struct rtl8366rb, smi);
 228 }
 229
 230 static inline struct rtl8366rb *sw_to_rtl8366rb(struct switch_dev *sw)
 231 {
 232         return container_of(sw, struct rtl8366rb, dev);
 233 }
 234
 235 static int rtl8366rb_reset_chip(struct rtl8366rb *rtl)
 236 {
 237         struct rtl8366_smi *smi = &rtl->smi;
 238         int timeout = 10;
 239         u32 data;
 240
 241         rtl8366_smi_write_reg(smi, RTL8366_RESET_CTRL_REG,
 242                               RTL8366_CHIP_CTRL_RESET_HW);
 243         do {
 244                 msleep(1);
 245                 if (rtl8366_smi_read_reg(smi, RTL8366_RESET_CTRL_REG, &data))
 246                         return -EIO;
 247
 248                 if (!(data & RTL8366_CHIP_CTRL_RESET_HW))
 249                         break;
 250         } while (--timeout);
 251
 252         if (!timeout) {
 253                 printk("Timeout waiting for the switch to reset\n");
 254                 return -EIO;
 255         }
 256
 257         return 0;
 258 }
 259
 260 static int rtl8366rb_read_phy_reg(struct rtl8366rb *rtl,
 261                                  u32 phy_no, u32 page, u32 addr, u32 *data)
 262 {
 263         struct rtl8366_smi *smi = &rtl->smi;
 264         u32 reg;
 265         int ret;
 266
 267         if (phy_no > RTL8366S_PHY_NO_MAX)
 268                 return -EINVAL;
 269
 270         if (page > RTL8366S_PHY_PAGE_MAX)
 271                 return -EINVAL;
 272
 273         if (addr > RTL8366S_PHY_ADDR_MAX)
 274                 return -EINVAL;
 275
 276         ret = rtl8366_smi_write_reg(smi, RTL8366S_PHY_ACCESS_CTRL_REG,
 277                                     RTL8366S_PHY_CTRL_READ);
 278         if (ret)
 279                 return ret;
 280
 281         reg = 0x8000 | (1 << (phy_no + RTL8366S_PHY_NO_OFFSET)) |
 282               ((page << RTL8366S_PHY_PAGE_OFFSET) & RTL8366S_PHY_PAGE_MASK) |
 283               (addr & RTL8366S_PHY_REG_MASK);
 284
 285         ret = rtl8366_smi_write_reg(smi, reg, 0);
 286         if (ret)
 287                 return ret;
 288
 289         ret = rtl8366_smi_read_reg(smi, RTL8366S_PHY_ACCESS_DATA_REG, data);
 290         if (ret)
 291                 return ret;
 292
 293         return 0;
 294 }
 295
 296 static int rtl8366rb_write_phy_reg(struct rtl8366rb *rtl,
 297                                   u32 phy_no, u32 page, u32 addr, u32 data)
 298 {
 299         struct rtl8366_smi *smi = &rtl->smi;
 300         u32 reg;
 301         int ret;
 302
 303         if (phy_no > RTL8366S_PHY_NO_MAX)
 304                 return -EINVAL;
 305
 306         if (page > RTL8366S_PHY_PAGE_MAX)
 307                 return -EINVAL;
 308
 309         if (addr > RTL8366S_PHY_ADDR_MAX)
 310                 return -EINVAL;
 311
 312         ret = rtl8366_smi_write_reg(smi, RTL8366S_PHY_ACCESS_CTRL_REG,
 313                                     RTL8366S_PHY_CTRL_WRITE);
 314         if (ret)
 315                 return ret;
 316
 317         reg = 0x8000 | (1 << (phy_no + RTL8366S_PHY_NO_OFFSET)) |
 318               ((page << RTL8366S_PHY_PAGE_OFFSET) & RTL8366S_PHY_PAGE_MASK) |
 319               (addr & RTL8366S_PHY_REG_MASK);
 320
 321         ret = rtl8366_smi_write_reg(smi, reg, data);
 322         if (ret)
 323                 return ret;
 324
 325         return 0;
 326 }
 327
 328 static int rtl8366_get_mib_counter(struct rtl8366rb *rtl, int counter,
 329                                    int port, unsigned long long *val)
 330 {
 331         struct rtl8366_smi *smi = &rtl->smi;
 332         int i;
 333         int err;
 334         u32 addr, data;
 335         u64 mibvalue;
 336
 337         if (port > RTL8366_NUM_PORTS || counter >= RTL8366S_MIB_COUNT)
 338                 return -EINVAL;
 339
 340         addr = RTL8366S_MIB_COUNTER_BASE +
 341                RTL8366S_MIB_COUNTER_PORT_OFFSET * (port) +
 342                rtl8366rb_mib_counters[counter].offset;
 343
 344         /*
 345          * Writing access counter address first
 346          * then ASIC will prepare 64bits counter wait for being retrived
 347          */
 348         data = 0; /* writing data will be discard by ASIC */
 349         err = rtl8366_smi_write_reg(smi, addr, data);
 350         if (err)
 351                 return err;
 352
 353         /* read MIB control register */
 354         err =  rtl8366_smi_read_reg(smi, RTL8366S_MIB_CTRL_REG, &data);
 355         if (err)
 356                 return err;
 357
 358         if (data & RTL8366S_MIB_CTRL_BUSY_MASK)
 359                 return -EBUSY;
 360
 361         if (data & RTL8366S_MIB_CTRL_RESET_MASK)
 362                 return -EIO;
 363
 364         mibvalue = 0;
 365         for (i = rtl8366rb_mib_counters[counter].length; i > 0; i--) {
 366                 err = rtl8366_smi_read_reg(smi, addr + (i - 1), &data);
 367                 if (err)
 368                         return err;
 369
 370                 mibvalue = (mibvalue << 16) | (data & 0xFFFF);
 371         }
 372
 373         *val = mibvalue;
 374         return 0;
 375 }
 376
 377 static int rtl8366rb_get_vlan_4k_entry(struct rtl8366rb *rtl, u32 vid,
 378                                       struct rtl8366rb_vlan4kentry *vlan4k)
 379 {
 380         struct rtl8366_smi *smi = &rtl->smi;
 381         int err;
 382         u32 data;
 383         u16 *tableaddr;
 384
 385         memset(vlan4k, '\0', sizeof(struct rtl8366rb_vlan4kentry));
 386         vlan4k->vid = vid;
 387
 388         if (vid >= RTL8366_NUM_VIDS)
 389                 return -EINVAL;
 390
 391         tableaddr = (u16 *)vlan4k;
 392
 393         /* write VID */
 394         data = *tableaddr;
 395         err = rtl8366_smi_write_reg(smi, RTL8366S_VLAN_TABLE_WRITE_BASE, data);
 396         if (err)
 397                 return err;
 398
 399         /* write table access control word */
 400         err = rtl8366_smi_write_reg(smi, RTL8366S_TABLE_ACCESS_CTRL_REG,
 401                                     RTL8366S_TABLE_VLAN_READ_CTRL);
 402         if (err)
 403                 return err;
 404
 405         err = rtl8366_smi_read_reg(smi, RTL8366S_VLAN_TABLE_READ_BASE, &data);
 406         if (err)
 407                 return err;
 408
 409         *tableaddr = data;
 410         tableaddr++;
 411
 412         err = rtl8366_smi_read_reg(smi, RTL8366S_VLAN_TABLE_READ_BASE + 1,
 413                                    &data);
 414         if (err)
 415                 return err;
 416
 417         *tableaddr = data;
 418         tableaddr++;
 419
 420         err = rtl8366_smi_read_reg(smi, RTL8366S_VLAN_TABLE_READ_BASE + 2,
 421                                    &data);
 422         if (err)
 423                 return err;
 424         *tableaddr = data;
 425         vlan4k->vid = vid;
 426
 427         return 0;
 428 }
 429
 430 static int rtl8366rb_set_vlan_4k_entry(struct rtl8366rb *rtl,
 431                                       const struct rtl8366rb_vlan4kentry *vlan4k)
 432 {
 433         struct rtl8366_smi *smi = &rtl->smi;
 434         int err;
 435         u32 data;
 436         u16 *tableaddr;
 437
 438         if (vlan4k->vid >= RTL8366_NUM_VIDS ||
 439             vlan4k->member > RTL8366_PORT_ALL ||
 440             vlan4k->untag > RTL8366_PORT_ALL ||
 441             vlan4k->fid > RTL8366S_FIDMAX)
 442                 return -EINVAL;
 443
 444         tableaddr = (u16 *)vlan4k;
 445
 446         data = *tableaddr;
 447
 448         err = rtl8366_smi_write_reg(smi, RTL8366S_VLAN_TABLE_WRITE_BASE, data);
 449         if (err)
 450                 return err;
 451
 452         tableaddr++;
 453
 454         data = *tableaddr;
 455
 456         err = rtl8366_smi_write_reg(smi, RTL8366S_VLAN_TABLE_WRITE_BASE + 1,
 457                                     data);
 458         if (err)
 459                 return err;
 460
 461         tableaddr++;
 462
 463         data = *tableaddr;
 464
 465         err = rtl8366_smi_write_reg(smi, RTL8366S_VLAN_TABLE_WRITE_BASE + 2,
 466                                     data);
 467         if (err)
 468                 return err;
 469
 470         /* write table access control word */
 471         err = rtl8366_smi_write_reg(smi, RTL8366S_TABLE_ACCESS_CTRL_REG,
 472                                     RTL8366S_TABLE_VLAN_WRITE_CTRL);
 473
 474         return err;
 475 }
 476
 477 static int rtl8366rb_get_vlan_member_config(struct rtl8366rb *rtl, u32 index,
 478                                            struct rtl8366rb_vlanconfig *vlanmc)
 479 {
 480         struct rtl8366_smi *smi = &rtl->smi;
 481         int err;
 482         u32 addr;
 483         u32 data;
 484         u16 *tableaddr;
 485
 486         memset(vlanmc, '\0', sizeof(struct rtl8366rb_vlanconfig));
 487
 488         if (index >= RTL8366_NUM_VLANS)
 489                 return -EINVAL;
 490
 491         tableaddr = (u16 *)vlanmc;
 492
 493         addr = RTL8366S_VLAN_MEMCONF_BASE + (index * 3);
 494         err = rtl8366_smi_read_reg(smi, addr, &data);
 495         if (err)
 496                 return err;
 497
 498         *tableaddr = data;
 499         tableaddr++;
 500
 501         addr = RTL8366S_VLAN_MEMCONF_BASE + 1 + (index * 3);
 502         err = rtl8366_smi_read_reg(smi, addr, &data);
 503         if (err)
 504                 return err;
 505
 506         *tableaddr = data;
 507         tableaddr++;
 508
 509         addr = RTL8366S_VLAN_MEMCONF_BASE + 2 + (index * 3);
 510         err = rtl8366_smi_read_reg(smi, addr, &data);
 511         if (err)
 512                 return err;
 513
 514         *tableaddr = data;
 515
 516         return 0;
 517 }
 518
 519 static int rtl8366rb_set_vlan_member_config(struct rtl8366rb *rtl, u32 index,
 520                                            const struct rtl8366rb_vlanconfig
 521                                            *vlanmc)
 522 {
 523         struct rtl8366_smi *smi = &rtl->smi;
 524         int err;
 525         u32 addr;
 526         u32 data;
 527         u16 *tableaddr;
 528
 529         if (index >= RTL8366_NUM_VLANS ||
 530             vlanmc->vid >= RTL8366_NUM_VIDS ||
 531             vlanmc->priority > RTL8366S_PRIORITYMAX ||
 532             vlanmc->member > RTL8366_PORT_ALL ||
 533             vlanmc->untag > RTL8366_PORT_ALL ||
 534             vlanmc->fid > RTL8366S_FIDMAX)
 535                 return -EINVAL;
 536
 537         addr = RTL8366S_VLAN_MEMCONF_BASE + (index * 3);
 538
 539         tableaddr = (u16 *)vlanmc;
 540         data = *tableaddr;
 541
 542         err = rtl8366_smi_write_reg(smi, addr, data);
 543         if (err)
 544                 return err;
 545
 546         addr = RTL8366S_VLAN_MEMCONF_BASE + 1 + (index * 3);
 547
 548         tableaddr++;
 549         data = *tableaddr;
 550
 551         err = rtl8366_smi_write_reg(smi, addr, data);
 552         if (err)
 553                 return err;
 554
 555         addr = RTL8366S_VLAN_MEMCONF_BASE + 2 + (index * 3);
 556
 557         tableaddr++;
 558         data = *tableaddr;
 559
 560         err = rtl8366_smi_write_reg(smi, addr, data);
 561         if (err)
 562                 return err;
 563         return 0;
 564 }
 565
 566 static int rtl8366rb_get_port_vlan_index(struct rtl8366rb *rtl, int port,
 567                                        int *val)
 568 {
 569         struct rtl8366_smi *smi = &rtl->smi;
 570         u32 data;
 571         int err;
 572
 573         if (port >= RTL8366_NUM_PORTS)
 574                 return -EINVAL;
 575
 576         err = rtl8366_smi_read_reg(smi, RTL8366S_PORT_VLAN_CTRL_REG(port),
 577                                    &data);
 578         if (err)
 579                 return err;
 580
 581         *val = (data >> RTL8366S_PORT_VLAN_CTRL_SHIFT(port)) &
 582                RTL8366S_PORT_VLAN_CTRL_MASK;
 583
 584         return 0;
 585
 586 }
 587
 588 static int rtl8366rb_get_vlan_port_pvid(struct rtl8366rb *rtl, int port,
 589                                        int *val)
 590 {
 591         struct rtl8366rb_vlanconfig vlanmc;
 592         int err;
 593         int index;
 594
 595         err = rtl8366rb_get_port_vlan_index(rtl, port, &index);
 596         if (err)
 597                 return err;
 598
 599         err = rtl8366rb_get_vlan_member_config(rtl, index, &vlanmc);
 600         if (err)
 601                 return err;
 602
 603         *val = vlanmc.vid;
 604         return 0;
 605 }
 606
 607 static int rtl8366rb_set_port_vlan_index(struct rtl8366rb *rtl, int port,
 608                                         int index)
 609 {
 610         struct rtl8366_smi *smi = &rtl->smi;
 611         u32 data;
 612         int err;
 613
 614         if (port >= RTL8366_NUM_PORTS || index >= RTL8366_NUM_VLANS)
 615                 return -EINVAL;
 616
 617         err = rtl8366_smi_read_reg(smi, RTL8366S_PORT_VLAN_CTRL_REG(port),
 618                                    &data);
 619         if (err)
 620                 return err;
 621
 622         data &= ~(RTL8366S_PORT_VLAN_CTRL_MASK <<
 623                   RTL8366S_PORT_VLAN_CTRL_SHIFT(port));
 624         data |= (index & RTL8366S_PORT_VLAN_CTRL_MASK) <<
 625                  RTL8366S_PORT_VLAN_CTRL_SHIFT(port);
 626
 627         err = rtl8366_smi_write_reg(smi, RTL8366S_PORT_VLAN_CTRL_REG(port),
 628                                     data);
 629         return err;
 630 }
 631
 632 static int rtl8366rb_set_vlan_port_pvid(struct rtl8366rb *rtl, int port, int val)
 633 {
 634         int i;
 635         struct rtl8366rb_vlanconfig vlanmc;
 636         struct rtl8366rb_vlan4kentry vlan4k;
 637
 638         if (port >= RTL8366_NUM_PORTS || val >= RTL8366_NUM_VIDS)
 639                 return -EINVAL;
 640
 641         /* Updating the 4K entry; lookup it and change the port member set */
 642         rtl8366rb_get_vlan_4k_entry(rtl, val, &vlan4k);
 643         vlan4k.member |= ((1 << port) | RTL8366_PORT_CPU);
 644         vlan4k.untag = RTL8366_PORT_ALL_BUT_CPU;
 645         rtl8366rb_set_vlan_4k_entry(rtl, &vlan4k);
 646
 647         /*
 648          * For the 16 entries more work needs to be done. First see if such
 649          * VID is already there and change it
 650          */
 651         for (i = 0; i < RTL8366_NUM_VLANS; ++i) {
 652                 rtl8366rb_get_vlan_member_config(rtl, i, &vlanmc);
 653
 654                 /* Try to find an existing vid and update port member set */
 655                 if (val == vlanmc.vid) {
 656                         vlanmc.member |= ((1 << port) | RTL8366_PORT_CPU);
 657                         rtl8366rb_set_vlan_member_config(rtl, i, &vlanmc);
 658
 659                         /* Now update PVID register settings */
 660                         rtl8366rb_set_port_vlan_index(rtl, port, i);
 661
 662                         return 0;
 663                 }
 664         }
 665
 666         /*
 667          * PVID could not be found from vlan table. Replace unused (one that
 668          * has no member ports) with new one
 669          */
 670         for (i = 0; i < RTL8366_NUM_VLANS; ++i) {
 671                 rtl8366rb_get_vlan_member_config(rtl, i, &vlanmc);
 672
 673                 /*
 674                  * See if this vlan member configuration is unused. It is
 675                  * unused if member set contains no ports or CPU port only
 676                  */
 677                 if (!vlanmc.member || vlanmc.member == RTL8366_PORT_CPU) {
 678                         vlanmc.vid = val;
 679                         vlanmc.priority = 0;
 680                         vlanmc.untag = RTL8366_PORT_ALL_BUT_CPU;
 681                         vlanmc.member = ((1 << port) | RTL8366_PORT_CPU);
 682                         vlanmc.fid = 0;
 683
 684                         rtl8366rb_set_vlan_member_config(rtl, i, &vlanmc);
 685
 686                         /* Now update PVID register settings */
 687                         rtl8366rb_set_port_vlan_index(rtl, port, i);
 688
 689                         return 0;
 690                 }
 691         }
 692
 693         dev_err(rtl->parent,
 694                 "All 16 vlan member configurations are in use\n");
 695
 696         return -EINVAL;
 697 }
 698
 699
 700 static int rtl8366rb_vlan_set_vlan(struct rtl8366rb *rtl, int enable)
 701 {
 702         struct rtl8366_smi *smi = &rtl->smi;
 703         u32 data = 0;
 704
 705         rtl8366_smi_read_reg(smi, RTL8366_CHIP_GLOBAL_CTRL_REG, &data);
 706
 707         if (enable)
 708                 data |= RTL8366_CHIP_CTRL_VLAN;
 709         else
 710                 data &= ~RTL8366_CHIP_CTRL_VLAN;
 711
 712         return rtl8366_smi_write_reg(smi, RTL8366_CHIP_GLOBAL_CTRL_REG, data);
 713 }
 714
 715 static int rtl8366rb_vlan_set_4ktable(struct rtl8366rb *rtl, int enable)
 716 {
 717         struct rtl8366_smi *smi = &rtl->smi;
 718         u32 data = 0;
 719
 720         rtl8366_smi_read_reg(smi, RTL8366_CHIP_GLOBAL_CTRL_REG, &data);
 721
 722         if (enable)
 723                 data |= RTL8366_CHIP_CTRL_VLAN_4KTB;
 724         else
 725                 data &= ~RTL8366_CHIP_CTRL_VLAN_4KTB;
 726
 727         return rtl8366_smi_write_reg(smi, RTL8366_CHIP_GLOBAL_CTRL_REG, data);
 728 }
 729
 730 static int rtl8366rb_reset_vlan(struct rtl8366rb *rtl)
 731 {
 732         struct rtl8366rb_vlan4kentry vlan4k;
 733         struct rtl8366rb_vlanconfig vlanmc;
 734         int err;
 735         int i;
 736
 737         /* clear 16 VLAN member configuration */
 738         vlanmc.vid = 0;
 739         vlanmc.priority = 0;
 740         vlanmc.member = 0;
 741         vlanmc.untag = 0;
 742         vlanmc.fid = 0;
 743         for (i = 0; i < RTL8366_NUM_VLANS; i++) {
 744                 err = rtl8366rb_set_vlan_member_config(rtl, i, &vlanmc);
 745                 if (err)
 746                         return err;
 747         }
 748
 749         /* Set a default VLAN with vid 1 to 4K table for all ports */
 750         vlan4k.vid = 1;
 751         vlan4k.member = RTL8366_PORT_ALL;
 752         vlan4k.untag = RTL8366_PORT_ALL;
 753         vlan4k.fid = 0;
 754         err = rtl8366rb_set_vlan_4k_entry(rtl, &vlan4k);
 755         if (err)
 756                 return err;
 757
 758         /* Set all ports PVID to default VLAN */
 759         for (i = 0; i < RTL8366_NUM_PORTS; i++) {
 760                 err = rtl8366rb_set_vlan_port_pvid(rtl, i, 0);
 761                 if (err)
 762                         return err;
 763         }
 764
 765         return 0;
 766 }
 767
 768 #ifdef CONFIG_RTL8366S_PHY_DEBUG_FS
 769 static int rtl8366rb_debugfs_open(struct inode *inode, struct file *file)
 770 {
 771         file->private_data = inode->i_private;
 772         return 0;
 773 }
 774
 775 static ssize_t rtl8366rb_read_debugfs_mibs(struct file *file,
 776                                           char __user *user_buf,
 777                                           size_t count, loff_t *ppos)
 778 {
 779         struct rtl8366rb *rtl = (struct rtl8366rb *)file->private_data;
 780         int i, j, len = 0;
 781         char *buf = rtl->buf;
 782
 783         len += snprintf(buf + len, sizeof(rtl->buf) - len, "MIB Counters:\n");
 784         len += snprintf(buf + len, sizeof(rtl->buf) - len, "Counter"
 785                         "                            "
 786                         "Port 0 \t\t Port 1 \t\t Port 2 \t\t Port 3 \t\t "
 787                         "Port 4\n");
 788
 789         for (i = 0; i < 33; ++i) {
 790                 len += snprintf(buf + len, sizeof(rtl->buf) - len, "%d:%s ",
 791                                 i, rtl8366rb_mib_counters[i].name);
 792                 for (j = 0; j < RTL8366_NUM_PORTS; ++j) {
 793                         unsigned long long counter = 0;
 794
 795                         if (!rtl8366_get_mib_counter(rtl, i, j, &counter))
 796                                 len += snprintf(buf + len,
 797                                                 sizeof(rtl->buf) - len,
 798                                                 "[%llu]", counter);
 799                         else
 800                                 len += snprintf(buf + len,
 801                                                 sizeof(rtl->buf) - len,
 802                                                 "[error]");
 803
 804                         if (j != RTL8366_NUM_PORTS - 1) {
 805                                 if (counter < 100000)
 806                                         len += snprintf(buf + len,
 807                                                         sizeof(rtl->buf) - len,
 808                                                         "\t");
 809
 810                                 len += snprintf(buf + len,
 811                                                 sizeof(rtl->buf) - len,
 812                                                 "\t");
 813                         }
 814                 }
 815                 len += snprintf(buf + len, sizeof(rtl->buf) - len, "\n");
 816         }
 817
 818         len += snprintf(buf + len, sizeof(rtl->buf) - len, "\n");
 819
 820         return simple_read_from_buffer(user_buf, count, ppos, buf, len);
 821 }
 822
 823 static ssize_t rtl8366rb_read_debugfs_vlan(struct file *file,
 824                                           char __user *user_buf,
 825                                           size_t count, loff_t *ppos)
 826 {
 827         struct rtl8366rb *rtl = (struct rtl8366rb *)file->private_data;
 828         int i, j, len = 0;
 829         char *buf = rtl->buf;
 830
 831         len += snprintf(buf + len, sizeof(rtl->buf) - len,
 832                         "VLAN Member Config:\n");
 833         len += snprintf(buf + len, sizeof(rtl->buf) - len,
 834                         "\t id \t vid \t prio \t member \t untag  \t fid "
 835                         "\tports\n");
 836
 837         for (i = 0; i < RTL8366_NUM_VLANS; ++i) {
 838                 struct rtl8366rb_vlanconfig vlanmc;
 839
 840                 rtl8366rb_get_vlan_member_config(rtl, i, &vlanmc);
 841
 842                 len += snprintf(buf + len, sizeof(rtl->buf) - len,
 843                                 "\t[%d] \t %d \t %d \t 0x%04x \t 0x%04x \t %d "
 844                                 "\t", i, vlanmc.vid, vlanmc.priority,
 845                                 vlanmc.member, vlanmc.untag, vlanmc.fid);
 846
 847                 for (j = 0; j < RTL8366_NUM_PORTS; ++j) {
 848                         int index = 0;
 849                         if (!rtl8366rb_get_port_vlan_index(rtl, j, &index)) {
 850                                 if (index == i)
 851                                         len += snprintf(buf + len,
 852                                                         sizeof(rtl->buf) - len,
 853                                                         "%d", j);
 854                         }
 855                 }
 856                 len += snprintf(buf + len, sizeof(rtl->buf) - len, "\n");
 857         }
 858
 859         return simple_read_from_buffer(user_buf, count, ppos, buf, len);
 860 }
 861
 862 static ssize_t rtl8366rb_read_debugfs_reg(struct file *file,
 863                                          char __user *user_buf,
 864                                          size_t count, loff_t *ppos)
 865 {
 866         struct rtl8366rb *rtl = (struct rtl8366rb *)file->private_data;
 867         struct rtl8366_smi *smi = &rtl->smi;
 868         u32 t, reg = gl_dbg_reg;
 869         int err, len = 0;
 870         char *buf = rtl->buf;
 871
 872         memset(buf, '\0', sizeof(rtl->buf));
 873
 874         err = rtl8366_smi_read_reg(smi, reg, &t);
 875         if (err) {
 876                 len += snprintf(buf, sizeof(rtl->buf),
 877                                 "Read failed (reg: 0x%04x)\n", reg);
 878                 return simple_read_from_buffer(user_buf, count, ppos, buf, len);
 879         }
 880
 881         len += snprintf(buf, sizeof(rtl->buf), "reg = 0x%04x, val = 0x%04x\n",
 882                         reg, t);
 883
 884         return simple_read_from_buffer(user_buf, count, ppos, buf, len);
 885 }
 886
 887 static ssize_t rtl8366rb_write_debugfs_reg(struct file *file,
 888                                           const char __user *user_buf,
 889                                           size_t count, loff_t *ppos)
 890 {
 891         struct rtl8366rb *rtl = (struct rtl8366rb *)file->private_data;
 892         struct rtl8366_smi *smi = &rtl->smi;
 893         unsigned long data;
 894         u32 reg = gl_dbg_reg;
 895         int err;
 896         size_t len;
 897         char *buf = rtl->buf;
 898
 899         len = min(count, sizeof(rtl->buf) - 1);
 900         if (copy_from_user(buf, user_buf, len)) {
 901                 dev_err(rtl->parent, "copy from user failed\n");
 902                 return -EFAULT;
 903         }
 904
 905         buf[len] = '\0';
 906         if (len > 0 && buf[len - 1] == '\n')
 907                 buf[len - 1] = '\0';
 908
 909
 910         if (strict_strtoul(buf, 16, &data)) {
 911                 dev_err(rtl->parent, "Invalid reg value %s\n", buf);
 912         } else {
 913                 err = rtl8366_smi_write_reg(smi, reg, data);
 914                 if (err) {
 915                         dev_err(rtl->parent,
 916                                 "writing reg 0x%04x val 0x%04lx failed\n",
 917                                 reg, data);
 918                 }
 919         }
 920
 921         return count;
 922 }
 923
 924 static const struct file_operations fops_rtl8366rb_regs = {
 925         .read = rtl8366rb_read_debugfs_reg,
 926         .write = rtl8366rb_write_debugfs_reg,
 927         .open = rtl8366rb_debugfs_open,
 928         .owner = THIS_MODULE
 929 };
 930
 931 static const struct file_operations fops_rtl8366rb_vlan = {
 932         .read = rtl8366rb_read_debugfs_vlan,
 933         .open = rtl8366rb_debugfs_open,
 934         .owner = THIS_MODULE
 935 };
 936
 937 static const struct file_operations fops_rtl8366rb_mibs = {
 938         .read = rtl8366rb_read_debugfs_mibs,
 939         .open = rtl8366rb_debugfs_open,
 940         .owner = THIS_MODULE
 941 };
 942
 943 static void rtl8366rb_debugfs_init(struct rtl8366rb *rtl)
 944 {
 945         struct dentry *node;
 946         struct dentry *root;
 947
 948         if (!rtl->debugfs_root)
 949                 rtl->debugfs_root = debugfs_create_dir("rtl8366rb", NULL);
 950
 951         if (!rtl->debugfs_root) {
 952                 dev_err(rtl->parent, "Unable to create debugfs dir\n");
 953                 return;
 954         }
 955         root = rtl->debugfs_root;
 956
 957         node = debugfs_create_x16("reg", S_IRUGO | S_IWUSR, root, &gl_dbg_reg);
 958         if (!node) {
 959                 dev_err(rtl->parent, "Creating debugfs file '%s' failed\n",
 960                         "reg");
 961                 return;
 962         }
 963
 964         node = debugfs_create_file("val", S_IRUGO | S_IWUSR, root, rtl,
 965                                    &fops_rtl8366rb_regs);
 966         if (!node) {
 967                 dev_err(rtl->parent, "Creating debugfs file '%s' failed\n",
 968                         "val");
 969                 return;
 970         }
 971
 972         node = debugfs_create_file("vlan", S_IRUSR, root, rtl,
 973                                    &fops_rtl8366rb_vlan);
 974         if (!node) {
 975                 dev_err(rtl->parent, "Creating debugfs file '%s' failed\n",
 976                         "vlan");
 977                 return;
 978         }
 979
 980         node = debugfs_create_file("mibs", S_IRUSR, root, rtl,
 981                                    &fops_rtl8366rb_mibs);
 982         if (!node) {
 983                 dev_err(rtl->parent, "Creating debugfs file '%s' failed\n",
 984                         "mibs");
 985                 return;
 986         }
 987 }
 988
 989 static void rtl8366rb_debugfs_remove(struct rtl8366rb *rtl)
 990 {
 991         if (rtl->debugfs_root) {
 992                 debugfs_remove_recursive(rtl->debugfs_root);
 993                 rtl->debugfs_root = NULL;
 994         }
 995 }
 996
 997 #else
 998 static inline void rtl8366rb_debugfs_init(struct rtl8366rb *rtl) {}
 999 static inline void rtl8366rb_debugfs_remove(struct rtl8366rb *rtl) {}
1000 #endif /* CONFIG_RTL8366S_PHY_DEBUG_FS */
1001
1002 static int rtl8366rb_sw_reset_mibs(struct switch_dev *dev,
1003                                   const struct switch_attr *attr,
1004                                   struct switch_val *val)
1005 {
1006         struct rtl8366rb *rtl = sw_to_rtl8366rb(dev);
1007         struct rtl8366_smi *smi = &rtl->smi;
1008         u32 data = 0;
1009
1010         if (val->value.i == 1) {
1011                 rtl8366_smi_read_reg(smi, RTL8366S_MIB_CTRL_REG, &data);
1012                 data |= (1 << 2);
1013                 rtl8366_smi_write_reg(smi, RTL8366S_MIB_CTRL_REG, data);
1014         }
1015
1016         return 0;
1017 }
1018
1019 static int rtl8366rb_sw_get_vlan_enable(struct switch_dev *dev,
1020                                        const struct switch_attr *attr,
1021                                        struct switch_val *val)
1022 {
1023         struct rtl8366rb *rtl = sw_to_rtl8366rb(dev);
1024         struct rtl8366_smi *smi = &rtl->smi;
1025         u32 data;
1026
1027         if (attr->ofs == 1) {
1028                 rtl8366_smi_read_reg(smi, RTL8366_CHIP_GLOBAL_CTRL_REG, &data);
1029
1030                 if (data & RTL8366_CHIP_CTRL_VLAN)
1031                         val->value.i = 1;
1032                 else
1033                         val->value.i = 0;
1034         } else if (attr->ofs == 2) {
1035                 rtl8366_smi_read_reg(smi, RTL8366_CHIP_GLOBAL_CTRL_REG, &data);
1036
1037                 if (data & RTL8366_CHIP_CTRL_VLAN_4KTB)
1038                         val->value.i = 1;
1039                 else
1040                         val->value.i = 0;
1041         }
1042
1043         return 0;
1044 }
1045
1046 static int rtl8366rb_sw_get_blinkrate(struct switch_dev *dev,
1047                                      const struct switch_attr *attr,
1048                                      struct switch_val *val)
1049 {
1050         struct rtl8366rb *rtl = sw_to_rtl8366rb(dev);
1051         struct rtl8366_smi *smi = &rtl->smi;
1052         u32 data;
1053
1054         rtl8366_smi_read_reg(smi, RTL8366_LED_BLINKRATE_REG, &data);
1055
1056         val->value.i = (data & (RTL8366_LED_BLINKRATE_MASK));
1057
1058         return 0;
1059 }
1060
1061 static int rtl8366rb_sw_set_blinkrate(struct switch_dev *dev,
1062                                     const struct switch_attr *attr,
1063                                     struct switch_val *val)
1064 {
1065         struct rtl8366rb *rtl = sw_to_rtl8366rb(dev);
1066         struct rtl8366_smi *smi = &rtl->smi;
1067         u32 data;
1068
1069         if (val->value.i >= 6)
1070                 return -EINVAL;
1071
1072         rtl8366_smi_read_reg(smi, RTL8366_LED_BLINKRATE_REG, &data);
1073
1074         data &= ~RTL8366_LED_BLINKRATE_MASK;
1075         data |= val->value.i;
1076
1077         rtl8366_smi_write_reg(smi, RTL8366_LED_BLINKRATE_REG, data);
1078
1079         return 0;
1080 }
1081
1082 static int rtl8366rb_sw_set_vlan_enable(struct switch_dev *dev,
1083                                        const struct switch_attr *attr,
1084                                        struct switch_val *val)
1085 {
1086         struct rtl8366rb *rtl = sw_to_rtl8366rb(dev);
1087
1088         if (attr->ofs == 1)
1089                 return rtl8366rb_vlan_set_vlan(rtl, val->value.i);
1090         else
1091                 return rtl8366rb_vlan_set_4ktable(rtl, val->value.i);
1092 }
1093
1094 static const char *rtl8366rb_speed_str(unsigned speed)
1095 {
1096         switch (speed) {
1097         case 0:
1098                 return "10baseT";
1099         case 1:
1100                 return "100baseT";
1101         case 2:
1102                 return "1000baseT";
1103         }
1104
1105         return "unknown";
1106 }
1107
1108 static int rtl8366rb_sw_get_port_link(struct switch_dev *dev,
1109                                      const struct switch_attr *attr,
1110                                      struct switch_val *val)
1111 {
1112         struct rtl8366rb *rtl = sw_to_rtl8366rb(dev);
1113         struct rtl8366_smi *smi = &rtl->smi;
1114         u32 len = 0, data = 0;
1115
1116         if (val->port_vlan >= RTL8366_NUM_PORTS)
1117                 return -EINVAL;
1118
1119         memset(rtl->buf, '\0', sizeof(rtl->buf));
1120         rtl8366_smi_read_reg(smi, RTL8366S_PORT_LINK_STATUS_BASE +
1121                              (val->port_vlan / 2), &data);
1122
1123         if (val->port_vlan % 2)
1124                 data = data >> 8;
1125
1126         if (data & RTL8366S_PORT_STATUS_LINK_MASK) {
1127                 len = snprintf(rtl->buf, sizeof(rtl->buf),
1128                                 "port:%d link:up speed:%s %s-duplex %s%s%s",
1129                                 val->port_vlan,
1130                                 rtl8366rb_speed_str(data &
1131                                           RTL8366S_PORT_STATUS_SPEED_MASK),
1132                                 (data & RTL8366S_PORT_STATUS_DUPLEX_MASK) ?
1133                                         "full" : "half",
1134                                 (data & RTL8366S_PORT_STATUS_TXPAUSE_MASK) ?
1135                                         "tx-pause ": "",
1136                                 (data & RTL8366S_PORT_STATUS_RXPAUSE_MASK) ?
1137                                         "rx-pause " : "",
1138                                 (data & RTL8366S_PORT_STATUS_AN_MASK) ?
1139                                         "nway ": "");
1140         } else {
1141                 len = snprintf(rtl->buf, sizeof(rtl->buf), "port:%d link: down",
1142                                 val->port_vlan);
1143         }
1144
1145         val->value.s = rtl->buf;
1146         val->len = len;
1147
1148         return 0;
1149 }
1150
1151 static int rtl8366rb_sw_get_vlan_info(struct switch_dev *dev,
1152                                      const struct switch_attr *attr,
1153                                      struct switch_val *val)
1154 {
1155         int i;
1156         u32 len = 0;
1157         struct rtl8366rb_vlanconfig vlanmc;
1158         struct rtl8366rb_vlan4kentry vlan4k;
1159         struct rtl8366rb *rtl = sw_to_rtl8366rb(dev);
1160         char *buf = rtl->buf;
1161
1162         if (val->port_vlan == 0 || val->port_vlan >= RTL8366_NUM_VLANS)
1163                 return -EINVAL;
1164
1165         memset(buf, '\0', sizeof(rtl->buf));
1166
1167         rtl8366rb_get_vlan_member_config(rtl, val->port_vlan, &vlanmc);
1168         rtl8366rb_get_vlan_4k_entry(rtl, vlanmc.vid, &vlan4k);
1169
1170         len += snprintf(buf + len, sizeof(rtl->buf) - len, "VLAN %d: Ports: ",
1171                         val->port_vlan);
1172
1173         for (i = 0; i < RTL8366_NUM_PORTS; ++i) {
1174                 int index = 0;
1175                 if (!rtl8366rb_get_port_vlan_index(rtl, i, &index) &&
1176                     index == val->port_vlan)
1177                         len += snprintf(buf + len, sizeof(rtl->buf) - len,
1178                                         "%d", i);
1179         }
1180         len += snprintf(buf + len, sizeof(rtl->buf) - len, "\n");
1181
1182         len += snprintf(buf + len, sizeof(rtl->buf) - len,
1183                         "\t\t vid \t prio \t member \t untag \t fid\n");
1184         len += snprintf(buf + len, sizeof(rtl->buf) - len, "\tMC:\t");
1185         len += snprintf(buf + len, sizeof(rtl->buf) - len,
1186                         "%d \t %d \t 0x%04x \t 0x%04x \t %d\n",
1187                         vlanmc.vid, vlanmc.priority, vlanmc.member,
1188                         vlanmc.untag, vlanmc.fid);
1189         len += snprintf(buf + len, sizeof(rtl->buf) - len, "\t4K:\t");
1190         len += snprintf(buf + len, sizeof(rtl->buf) - len,
1191                         "%d \t  \t 0x%04x \t 0x%04x \t %d",
1192                         vlan4k.vid, vlan4k.member, vlan4k.untag, vlan4k.fid);
1193
1194         val->value.s = buf;
1195         val->len = len;
1196
1197         return 0;
1198 }
1199
1200 static int rtl8366rb_sw_set_port_led(struct switch_dev *dev,
1201                                     const struct switch_attr *attr,
1202                                     struct switch_val *val)
1203 {
1204         struct rtl8366rb *rtl = sw_to_rtl8366rb(dev);
1205         struct rtl8366_smi *smi = &rtl->smi;
1206         u32 data = 0;
1207
1208         if (val->port_vlan >= RTL8366_NUM_PORTS)
1209                 return -EINVAL;
1210
1211         if (val->port_vlan == RTL8366_PORT_NUM_CPU) {
1212                 rtl8366_smi_read_reg(smi, RTL8366_LED_BLINKRATE_REG, &data);
1213                 data = (data & (~(0xF << 4))) | (val->value.i << 4);
1214                 rtl8366_smi_write_reg(smi, RTL8366_LED_BLINKRATE_REG, data);
1215         } else {
1216                 rtl8366_smi_read_reg(smi, RTL8366_LED_CTRL_REG, &data);
1217                 data = (data & (~(0xF << (val->port_vlan * 4)))) |
1218                         (val->value.i << (val->port_vlan * 4));
1219                 rtl8366_smi_write_reg(smi, RTL8366_LED_CTRL_REG, data);
1220         }
1221
1222         return 0;
1223 }
1224
1225 static int rtl8366rb_sw_get_port_led(struct switch_dev *dev,
1226                                     const struct switch_attr *attr,
1227                                     struct switch_val *val)
1228 {
1229         struct rtl8366rb *rtl = sw_to_rtl8366rb(dev);
1230         struct rtl8366_smi *smi = &rtl->smi;
1231         u32 data = 0;
1232
1233         if (val->port_vlan >= RTL8366_NUM_LEDGROUPS)
1234                 return -EINVAL;
1235
1236         rtl8366_smi_read_reg(smi, RTL8366_LED_CTRL_REG, &data);
1237         val->value.i = (data >> (val->port_vlan * 4)) & 0x000F;
1238
1239         return 0;
1240 }
1241
1242 static int rtl8366rb_sw_reset_port_mibs(struct switch_dev *dev,
1243                                        const struct switch_attr *attr,
1244                                        struct switch_val *val)
1245 {
1246         struct rtl8366rb *rtl = sw_to_rtl8366rb(dev);
1247         struct rtl8366_smi *smi = &rtl->smi;
1248         u32 data = 0;
1249
1250         if (val->port_vlan >= RTL8366_NUM_PORTS)
1251                 return -EINVAL;
1252
1253         rtl8366_smi_read_reg(smi, RTL8366S_MIB_CTRL_REG, &data);
1254         data |= (1 << (val->port_vlan + 3));
1255         rtl8366_smi_write_reg(smi, RTL8366S_MIB_CTRL_REG, data);
1256
1257         return 0;
1258 }
1259
1260 static int rtl8366rb_sw_get_port_mib(struct switch_dev *dev,
1261                                     const struct switch_attr *attr,
1262                                     struct switch_val *val)
1263 {
1264         struct rtl8366rb *rtl = sw_to_rtl8366rb(dev);
1265         int i, len = 0;
1266         unsigned long long counter = 0;
1267         char *buf = rtl->buf;
1268
1269         if (val->port_vlan >= RTL8366_NUM_PORTS)
1270                 return -EINVAL;
1271
1272         len += snprintf(buf + len, sizeof(rtl->buf) - len,
1273                         "Port %d MIB counters\n",
1274                         val->port_vlan);
1275
1276         for (i = 0; i < RTL8366S_MIB_COUNT; ++i) {
1277                 len += snprintf(buf + len, sizeof(rtl->buf) - len,
1278                                 "%d:%s\t", i, rtl8366rb_mib_counters[i].name);
1279                 if (!rtl8366_get_mib_counter(rtl, i, val->port_vlan, &counter))
1280                         len += snprintf(buf + len, sizeof(rtl->buf) - len,
1281                                         "[%llu]\n", counter);
1282                 else
1283                         len += snprintf(buf + len, sizeof(rtl->buf) - len,
1284                                         "[error]\n");
1285         }
1286
1287         val->value.s = buf;
1288         val->len = len;
1289         return 0;
1290 }
1291
1292 static int rtl8366rb_sw_get_vlan_ports(struct switch_dev *dev,
1293                                       struct switch_val *val)
1294 {
1295         struct rtl8366rb_vlanconfig vlanmc;
1296         struct rtl8366rb *rtl = sw_to_rtl8366rb(dev);
1297         struct switch_port *port;
1298         int i;
1299
1300         if (val->port_vlan == 0 || val->port_vlan >= RTL8366_NUM_VLANS)
1301                 return -EINVAL;
1302
1303         rtl8366rb_get_vlan_member_config(rtl, val->port_vlan, &vlanmc);
1304
1305         port = &val->value.ports[0];
1306         val->len = 0;
1307         for (i = 0; i < RTL8366_NUM_PORTS; i++) {
1308                 if (!(vlanmc.member & BIT(i)))
1309                         continue;
1310
1311                 port->id = i;
1312                 port->flags = (vlanmc.untag & BIT(i)) ?
1313                                         0 : BIT(SWITCH_PORT_FLAG_TAGGED);
1314                 val->len++;
1315                 port++;
1316         }
1317         return 0;
1318 }
1319
1320 static int rtl8366rb_sw_set_vlan_ports(struct switch_dev *dev,
1321                                       struct switch_val *val)
1322 {
1323         struct rtl8366rb_vlanconfig vlanmc;
1324         struct rtl8366rb_vlan4kentry vlan4k;
1325         struct rtl8366rb *rtl = sw_to_rtl8366rb(dev);
1326         struct switch_port *port;
1327         int i;
1328
1329         if (val->port_vlan == 0 || val->port_vlan >= RTL8366_NUM_VLANS)
1330                 return -EINVAL;
1331
1332         rtl8366rb_get_vlan_member_config(rtl, val->port_vlan, &vlanmc);
1333         rtl8366rb_get_vlan_4k_entry(rtl, vlanmc.vid, &vlan4k);
1334
1335         vlanmc.untag = 0;
1336         vlanmc.member = 0;
1337
1338         port = &val->value.ports[0];
1339         for (i = 0; i < val->len; i++, port++) {
1340                 vlanmc.member |= BIT(port->id);
1341
1342                 if (!(port->flags & BIT(SWITCH_PORT_FLAG_TAGGED)))
1343                         vlanmc.untag |= BIT(port->id);
1344         }
1345
1346         vlan4k.member = vlanmc.member;
1347         vlan4k.untag = vlanmc.untag;
1348
1349         rtl8366rb_set_vlan_member_config(rtl, val->port_vlan, &vlanmc);
1350         rtl8366rb_set_vlan_4k_entry(rtl, &vlan4k);
1351         return 0;
1352 }
1353
1354 static int rtl8366rb_sw_get_port_pvid(struct switch_dev *dev, int port, int *val)
1355 {
1356         struct rtl8366rb *rtl = sw_to_rtl8366rb(dev);
1357         return rtl8366rb_get_vlan_port_pvid(rtl, port, val);
1358 }
1359
1360 static int rtl8366rb_sw_set_port_pvid(struct switch_dev *dev, int port, int val)
1361 {
1362         struct rtl8366rb *rtl = sw_to_rtl8366rb(dev);
1363         return rtl8366rb_set_vlan_port_pvid(rtl, port, val);
1364 }
1365
1366 static int rtl8366rb_sw_reset_switch(struct switch_dev *dev)
1367 {
1368         struct rtl8366rb *rtl = sw_to_rtl8366rb(dev);
1369         int err;
1370
1371         err = rtl8366rb_reset_chip(rtl);
1372         if (err)
1373                 return err;
1374
1375         return rtl8366rb_reset_vlan(rtl);
1376 }
1377
1378 static struct switch_attr rtl8366rb_globals[] = {
1379         {
1380                 .type = SWITCH_TYPE_INT,
1381                 .name = "enable_vlan",
1382                 .description = "Enable VLAN mode",
1383                 .set = rtl8366rb_sw_set_vlan_enable,
1384                 .get = rtl8366rb_sw_get_vlan_enable,
1385                 .max = 1,
1386                 .ofs = 1
1387         }, {
1388                 .type = SWITCH_TYPE_INT,
1389                 .name = "enable_vlan4k",
1390                 .description = "Enable VLAN 4K mode",
1391                 .set = rtl8366rb_sw_set_vlan_enable,
1392                 .get = rtl8366rb_sw_get_vlan_enable,
1393                 .max = 1,
1394                 .ofs = 2
1395         }, {
1396                 .type = SWITCH_TYPE_INT,
1397                 .name = "reset_mibs",
1398                 .description = "Reset all MIB counters",
1399                 .set = rtl8366rb_sw_reset_mibs,
1400                 .get = NULL,
1401                 .max = 1
1402         }, {
1403                 .type = SWITCH_TYPE_INT,
1404                 .name = "blinkrate",
1405                 .description = "Get/Set LED blinking rate (0 = 43ms, 1 = 84ms,"
1406                 " 2 = 120ms, 3 = 170ms, 4 = 340ms, 5 = 670ms)",
1407                 .set = rtl8366rb_sw_set_blinkrate,
1408                 .get = rtl8366rb_sw_get_blinkrate,
1409                 .max = 5
1410         },
1411 };
1412
1413 static struct switch_attr rtl8366rb_port[] = {
1414         {
1415                 .type = SWITCH_TYPE_STRING,
1416                 .name = "link",
1417                 .description = "Get port link information",
1418                 .max = 1,
1419                 .set = NULL,
1420                 .get = rtl8366rb_sw_get_port_link,
1421         }, {
1422                 .type = SWITCH_TYPE_INT,
1423                 .name = "reset_mib",
1424                 .description = "Reset single port MIB counters",
1425                 .max = 1,
1426                 .set = rtl8366rb_sw_reset_port_mibs,
1427                 .get = NULL,
1428         }, {
1429                 .type = SWITCH_TYPE_STRING,
1430                 .name = "mib",
1431                 .description = "Get MIB counters for port",
1432                 .max = 33,
1433                 .set = NULL,
1434                 .get = rtl8366rb_sw_get_port_mib,
1435         }, {
1436                 .type = SWITCH_TYPE_INT,
1437                 .name = "led",
1438                 .description = "Get/Set port group (0 - 3) led mode (0 - 15)",
1439                 .max = 15,
1440                 .set = rtl8366rb_sw_set_port_led,
1441                 .get = rtl8366rb_sw_get_port_led,
1442         },
1443 };
1444
1445 static struct switch_attr rtl8366rb_vlan[] = {
1446         {
1447                 .type = SWITCH_TYPE_STRING,
1448                 .name = "info",
1449                 .description = "Get vlan information",
1450                 .max = 1,
1451                 .set = NULL,
1452                 .get = rtl8366rb_sw_get_vlan_info,
1453         },
1454 };
1455
1456 /* template */
1457 static struct switch_dev rtl8366_switch_dev = {
1458         .name = "RTL8366S",
1459         .cpu_port = RTL8366_PORT_NUM_CPU,
1460         .ports = RTL8366_NUM_PORTS,
1461         .vlans = RTL8366_NUM_VLANS,
1462         .attr_global = {
1463                 .attr = rtl8366rb_globals,
1464                 .n_attr = ARRAY_SIZE(rtl8366rb_globals),
1465         },
1466         .attr_port = {
1467                 .attr = rtl8366rb_port,
1468                 .n_attr = ARRAY_SIZE(rtl8366rb_port),
1469         },
1470         .attr_vlan = {
1471                 .attr = rtl8366rb_vlan,
1472                 .n_attr = ARRAY_SIZE(rtl8366rb_vlan),
1473         },
1474
1475         .get_vlan_ports = rtl8366rb_sw_get_vlan_ports,
1476         .set_vlan_ports = rtl8366rb_sw_set_vlan_ports,
1477         .get_port_pvid = rtl8366rb_sw_get_port_pvid,
1478         .set_port_pvid = rtl8366rb_sw_set_port_pvid,
1479         .reset_switch = rtl8366rb_sw_reset_switch,
1480 };
1481
1482 static int rtl8366rb_switch_init(struct rtl8366rb *rtl)
1483 {
1484         struct switch_dev *dev = &rtl->dev;
1485         int err;
1486
1487         memcpy(dev, &rtl8366_switch_dev, sizeof(struct switch_dev));
1488         dev->priv = rtl;
1489         dev->devname = dev_name(rtl->parent);
1490
1491         err = register_switch(dev, NULL);
1492         if (err)
1493                 dev_err(rtl->parent, "switch registration failed\n");
1494
1495         return err;
1496 }
1497
1498 static void rtl8366rb_switch_cleanup(struct rtl8366rb *rtl)
1499 {
1500         unregister_switch(&rtl->dev);
1501 }
1502
1503 static int rtl8366rb_mii_read(struct mii_bus *bus, int addr, int reg)
1504 {
1505         struct rtl8366rb *rtl = smi_to_rtl8366rb(bus->priv);
1506         u32 val = 0;
1507         int err;
1508
1509         err = rtl8366rb_read_phy_reg(rtl, addr, 0, reg, &val);
1510         if (err)
1511                 return 0xffff;
1512
1513         return val;
1514 }
1515
1516 static int rtl8366rb_mii_write(struct mii_bus *bus, int addr, int reg, u16 val)
1517 {
1518         struct rtl8366rb *rtl = smi_to_rtl8366rb(bus->priv);
1519         u32 t;
1520         int err;
1521
1522         err = rtl8366rb_write_phy_reg(rtl, addr, 0, reg, val);
1523         /* flush write */
1524         (void) rtl8366rb_read_phy_reg(rtl, addr, 0, reg, &t);
1525
1526         return err;
1527 }
1528
1529 static int rtl8366rb_mii_bus_match(struct mii_bus *bus)
1530 {
1531         return (bus->read == rtl8366rb_mii_read &&
1532                 bus->write == rtl8366rb_mii_write);
1533 }
1534
1535 static int rtl8366rb_setup(struct rtl8366rb *rtl)
1536 {
1537         int ret;
1538
1539         ret = rtl8366rb_reset_chip(rtl);
1540         if (ret)
1541                 return ret;
1542
1543         rtl8366rb_debugfs_init(rtl);
1544         return 0;
1545 }
1546
1547 static int rtl8366rb_detect(struct rtl8366_smi *smi)
1548 {
1549         u32 chip_id = 0;
1550         u32 chip_ver = 0;
1551         int ret;
1552
1553         ret = rtl8366_smi_read_reg(smi, RTL8366S_CHIP_ID_REG, &chip_id);
1554         if (ret) {
1555                 dev_err(smi->parent, "unable to read chip id\n");
1556                 return ret;
1557         }
1558
1559         switch (chip_id) {
1560         case RTL8366S_CHIP_ID_8366:
1561                 break;
1562         default:
1563                 dev_err(smi->parent, "unknown chip id (%04x)\n", chip_id);
1564                 return -ENODEV;
1565         }
1566
1567         ret = rtl8366_smi_read_reg(smi, RTL8366S_CHIP_VERSION_CTRL_REG,
1568                                    &chip_ver);
1569         if (ret) {
1570                 dev_err(smi->parent, "unable to read chip version\n");
1571                 return ret;
1572         }
1573
1574         dev_info(smi->parent, "RTL%04x ver. %u chip found\n",
1575                  chip_id, chip_ver & RTL8366S_CHIP_VERSION_MASK);
1576
1577         return 0;
1578 }
1579
1580 static struct rtl8366_smi_ops rtl8366rb_smi_ops = {
1581         .detect         = rtl8366rb_detect,
1582         .mii_read       = rtl8366rb_mii_read,
1583         .mii_write      = rtl8366rb_mii_write,
1584 };
1585
1586 static int __init rtl8366rb_probe(struct platform_device *pdev)
1587 {
1588         static int rtl8366_smi_version_printed;
1589         struct rtl8366rb_platform_data *pdata;
1590         struct rtl8366rb *rtl;
1591         struct rtl8366_smi *smi;
1592         int err;
1593
1594         if (!rtl8366_smi_version_printed++)
1595                 printk(KERN_NOTICE RTL8366S_DRIVER_DESC
1596                        " version " RTL8366S_DRIVER_VER"\n");
1597
1598         pdata = pdev->dev.platform_data;
1599         if (!pdata) {
1600                 dev_err(&pdev->dev, "no platform data specified\n");
1601                 err = -EINVAL;
1602                 goto err_out;
1603         }
1604
1605         rtl = kzalloc(sizeof(*rtl), GFP_KERNEL);
1606         if (!rtl) {
1607                 dev_err(&pdev->dev, "no memory for private data\n");
1608                 err = -ENOMEM;
1609                 goto err_out;
1610         }
1611
1612         rtl->parent = &pdev->dev;
1613
1614         smi = &rtl->smi;
1615         smi->parent = &pdev->dev;
1616         smi->gpio_sda = pdata->gpio_sda;
1617         smi->gpio_sck = pdata->gpio_sck;
1618         smi->ops = &rtl8366rb_smi_ops;
1619
1620         err = rtl8366_smi_init(smi);
1621         if (err)
1622                 goto err_free_rtl;
1623
1624         platform_set_drvdata(pdev, rtl);
1625
1626         err = rtl8366rb_setup(rtl);
1627         if (err)
1628                 goto err_clear_drvdata;
1629
1630         err = rtl8366rb_switch_init(rtl);
1631         if (err)
1632                 goto err_clear_drvdata;
1633
1634         return 0;
1635
1636  err_clear_drvdata:
1637         platform_set_drvdata(pdev, NULL);
1638         rtl8366_smi_cleanup(smi);
1639  err_free_rtl:
1640         kfree(rtl);
1641  err_out:
1642         return err;
1643 }
1644
1645 static int rtl8366rb_phy_config_init(struct phy_device *phydev)
1646 {
1647         if (!rtl8366rb_mii_bus_match(phydev->bus))
1648                 return -EINVAL;
1649
1650         return 0;
1651 }
1652
1653 static int rtl8366rb_phy_config_aneg(struct phy_device *phydev)
1654 {
1655         return 0;
1656 }
1657
1658 static struct phy_driver rtl8366rb_phy_driver = {
1659         .phy_id         = 0x001cc960,
1660         .name           = "Realtek RTL8366RB",
1661         .phy_id_mask    = 0x1ffffff0,
1662         .features       = PHY_GBIT_FEATURES,
1663         .config_aneg    = rtl8366rb_phy_config_aneg,
1664         .config_init    = rtl8366rb_phy_config_init,
1665         .read_status    = genphy_read_status,
1666         .driver         = {
1667                 .owner = THIS_MODULE,
1668         },
1669 };
1670
1671 static int __devexit rtl8366rb_remove(struct platform_device *pdev)
1672 {
1673         struct rtl8366rb *rtl = platform_get_drvdata(pdev);
1674
1675         if (rtl) {
1676                 rtl8366rb_switch_cleanup(rtl);
1677                 rtl8366rb_debugfs_remove(rtl);
1678                 platform_set_drvdata(pdev, NULL);
1679                 rtl8366_smi_cleanup(&rtl->smi);
1680                 kfree(rtl);
1681         }
1682
1683         return 0;
1684 }
1685
1686 static struct platform_driver rtl8366rb_driver = {
1687         .driver = {
1688                 .name           = RTL8366RB_DRIVER_NAME,
1689                 .owner          = THIS_MODULE,
1690         },
1691         .probe          = rtl8366rb_probe,
1692         .remove         = __devexit_p(rtl8366rb_remove),
1693 };
1694
1695 static int __init rtl8366rb_module_init(void)
1696 {
1697         int ret;
1698         ret = platform_driver_register(&rtl8366rb_driver);
1699         if (ret)
1700                 return ret;
1701
1702         ret = phy_driver_register(&rtl8366rb_phy_driver);
1703         if (ret)
1704                 goto err_platform_unregister;
1705
1706         return 0;
1707
1708  err_platform_unregister:
1709         platform_driver_unregister(&rtl8366rb_driver);
1710         return ret;
1711 }
1712 module_init(rtl8366rb_module_init);
1713
1714 static void __exit rtl8366rb_module_exit(void)
1715 {
1716         phy_driver_unregister(&rtl8366rb_phy_driver);
1717         platform_driver_unregister(&rtl8366rb_driver);
1718 }
1719 module_exit(rtl8366rb_module_exit);
1720
1721 MODULE_DESCRIPTION(RTL8366S_DRIVER_DESC);
1722 MODULE_VERSION(RTL8366S_DRIVER_VER);
1723 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
1724 MODULE_AUTHOR("Antti Seppälä <a.seppala@gmail.com>");
1725 MODULE_LICENSE("GPL v2");
1726 MODULE_ALIAS("platform:" RTL8366RB_DRIVER_NAME);