target/linux/generic/patches-3.10/020-ssb_update.patch

   1 --- a/drivers/ssb/Kconfig
   2 +++ b/drivers/ssb/Kconfig
   3 @@ -138,13 +138,13 @@ config SSB_DRIVER_MIPS
   4
   5  config SSB_SFLASH
   6         bool "SSB serial flash support"
   7 -       depends on SSB_DRIVER_MIPS && BROKEN
   8 +       depends on SSB_DRIVER_MIPS
   9         default y
  10
  11  # Assumption: We are on embedded, if we compile the MIPS core.
  12  config SSB_EMBEDDED
  13         bool
  14 -       depends on SSB_DRIVER_MIPS
  15 +       depends on SSB_DRIVER_MIPS && SSB_PCICORE_HOSTMODE
  16         default y
  17
  18  config SSB_DRIVER_EXTIF
  19 @@ -168,6 +168,7 @@ config SSB_DRIVER_GIGE
  20  config SSB_DRIVER_GPIO
  21         bool "SSB GPIO driver"
  22         depends on SSB && GPIOLIB
  23 +       select IRQ_DOMAIN if SSB_EMBEDDED
  24         help
  25           Driver to provide access to the GPIO pins on the bus.
  26
  27 --- a/drivers/ssb/driver_chipcommon_sflash.c
  28 +++ b/drivers/ssb/driver_chipcommon_sflash.c
  29 @@ -9,6 +9,19 @@
  30
  31  #include "ssb_private.h"
  32
  33 +static struct resource ssb_sflash_resource = {
  34 +       .name   = "ssb_sflash",
  35 +       .start  = SSB_FLASH2,
  36 +       .end    = 0,
  37 +       .flags  = IORESOURCE_MEM | IORESOURCE_READONLY,
  38 +};
  39 +
  40 +struct platform_device ssb_sflash_dev = {
  41 +       .name           = "ssb_sflash",
  42 +       .resource       = &ssb_sflash_resource,
  43 +       .num_resources  = 1,
  44 +};
  45 +
  46  struct ssb_sflash_tbl_e {
  47         char *name;
  48         u32 id;
  49 @@ -16,7 +29,7 @@ struct ssb_sflash_tbl_e {
  50         u16 numblocks;
  51  };
  52
  53 -static struct ssb_sflash_tbl_e ssb_sflash_st_tbl[] = {
  54 +static const struct ssb_sflash_tbl_e ssb_sflash_st_tbl[] = {
  55         { "M25P20", 0x11, 0x10000, 4, },
  56         { "M25P40", 0x12, 0x10000, 8, },
  57
  58 @@ -24,10 +37,10 @@ static struct ssb_sflash_tbl_e ssb_sflas
  59         { "M25P32", 0x15, 0x10000, 64, },
  60         { "M25P64", 0x16, 0x10000, 128, },
  61         { "M25FL128", 0x17, 0x10000, 256, },
  62 -       { 0 },
  63 +       { NULL },
  64  };
  65
  66 -static struct ssb_sflash_tbl_e ssb_sflash_sst_tbl[] = {
  67 +static const struct ssb_sflash_tbl_e ssb_sflash_sst_tbl[] = {
  68         { "SST25WF512", 1, 0x1000, 16, },
  69         { "SST25VF512", 0x48, 0x1000, 16, },
  70         { "SST25WF010", 2, 0x1000, 32, },
  71 @@ -42,10 +55,10 @@ static struct ssb_sflash_tbl_e ssb_sflas
  72         { "SST25VF016", 0x41, 0x1000, 512, },
  73         { "SST25VF032", 0x4a, 0x1000, 1024, },
  74         { "SST25VF064", 0x4b, 0x1000, 2048, },
  75 -       { 0 },
  76 +       { NULL },
  77  };
  78
  79 -static struct ssb_sflash_tbl_e ssb_sflash_at_tbl[] = {
  80 +static const struct ssb_sflash_tbl_e ssb_sflash_at_tbl[] = {
  81         { "AT45DB011", 0xc, 256, 512, },
  82         { "AT45DB021", 0x14, 256, 1024, },
  83         { "AT45DB041", 0x1c, 256, 2048, },
  84 @@ -53,7 +66,7 @@ static struct ssb_sflash_tbl_e ssb_sflas
  85         { "AT45DB161", 0x2c, 512, 4096, },
  86         { "AT45DB321", 0x34, 512, 8192, },
  87         { "AT45DB642", 0x3c, 1024, 8192, },
  88 -       { 0 },
  89 +       { NULL },
  90  };
  91
  92  static void ssb_sflash_cmd(struct ssb_chipcommon *cc, u32 opcode)
  93 @@ -73,7 +86,8 @@ static void ssb_sflash_cmd(struct ssb_ch
  94  /* Initialize serial flash access */
  95  int ssb_sflash_init(struct ssb_chipcommon *cc)
  96  {
  97 -       struct ssb_sflash_tbl_e *e;
  98 +       struct ssb_sflash *sflash = &cc->dev->bus->mipscore.sflash;
  99 +       const struct ssb_sflash_tbl_e *e;
 100         u32 id, id2;
 101
 102         switch (cc->capabilities & SSB_CHIPCO_CAP_FLASHT) {
 103 @@ -131,10 +145,20 @@ int ssb_sflash_init(struct ssb_chipcommo
 104                 return -ENOTSUPP;
 105         }
 106
 107 -       pr_info("Found %s serial flash (blocksize: 0x%X, blocks: %d)\n",
 108 -               e->name, e->blocksize, e->numblocks);
 109 -
 110 -       pr_err("Serial flash support is not implemented yet!\n");
 111 +       sflash->window = SSB_FLASH2;
 112 +       sflash->blocksize = e->blocksize;
 113 +       sflash->numblocks = e->numblocks;
 114 +       sflash->size = sflash->blocksize * sflash->numblocks;
 115 +       sflash->present = true;
 116 +
 117 +       pr_info("Found %s serial flash (size: %dKiB, blocksize: 0x%X, blocks: %d)\n",
 118 +               e->name, sflash->size / 1024, e->blocksize, e->numblocks);
 119 +
 120 +       /* Prepare platform device, but don't register it yet. It's too early,
 121 +        * malloc (required by device_private_init) is not available yet. */
 122 +       ssb_sflash_dev.resource[0].end = ssb_sflash_dev.resource[0].start +
 123 +                                        sflash->size;
 124 +       ssb_sflash_dev.dev.platform_data = sflash;
 125
 126 -       return -ENOTSUPP;
 127 +       return 0;
 128  }
 129 --- a/drivers/ssb/driver_gpio.c
 130 +++ b/drivers/ssb/driver_gpio.c
 131 @@ -9,16 +9,40 @@
 132   */
 133
 134  #include <linux/gpio.h>
 135 +#include <linux/irq.h>
 136 +#include <linux/interrupt.h>
 137 +#include <linux/irqdomain.h>
 138  #include <linux/export.h>
 139  #include <linux/ssb/ssb.h>
 140
 141  #include "ssb_private.h"
 142
 143 +
 144 +/**************************************************
 145 + * Shared
 146 + **************************************************/
 147 +
 148  static struct ssb_bus *ssb_gpio_get_bus(struct gpio_chip *chip)
 149  {
 150         return container_of(chip, struct ssb_bus, gpio);
 151  }
 152
 153 +#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
 154 +static int ssb_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
 155 +{
 156 +       struct ssb_bus *bus = ssb_gpio_get_bus(chip);
 157 +
 158 +       if (bus->bustype == SSB_BUSTYPE_SSB)
 159 +               return irq_find_mapping(bus->irq_domain, gpio);
 160 +       else
 161 +               return -EINVAL;
 162 +}
 163 +#endif
 164 +
 165 +/**************************************************
 166 + * ChipCommon
 167 + **************************************************/
 168 +
 169  static int ssb_gpio_chipco_get_value(struct gpio_chip *chip, unsigned gpio)
 170  {
 171         struct ssb_bus *bus = ssb_gpio_get_bus(chip);
 172 @@ -74,19 +98,129 @@ static void ssb_gpio_chipco_free(struct
 173         ssb_chipco_gpio_pullup(&bus->chipco, 1 << gpio, 0);
 174  }
 175
 176 -static int ssb_gpio_chipco_to_irq(struct gpio_chip *chip, unsigned gpio)
 177 +#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
 178 +static void ssb_gpio_irq_chipco_mask(struct irq_data *d)
 179  {
 180 -       struct ssb_bus *bus = ssb_gpio_get_bus(chip);
 181 +       struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
 182 +       int gpio = irqd_to_hwirq(d);
 183
 184 -       if (bus->bustype == SSB_BUSTYPE_SSB)
 185 -               return ssb_mips_irq(bus->chipco.dev) + 2;
 186 -       else
 187 -               return -EINVAL;
 188 +       ssb_chipco_gpio_intmask(&bus->chipco, BIT(gpio), 0);
 189 +}
 190 +
 191 +static void ssb_gpio_irq_chipco_unmask(struct irq_data *d)
 192 +{
 193 +       struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
 194 +       int gpio = irqd_to_hwirq(d);
 195 +       u32 val = ssb_chipco_gpio_in(&bus->chipco, BIT(gpio));
 196 +
 197 +       ssb_chipco_gpio_polarity(&bus->chipco, BIT(gpio), val);
 198 +       ssb_chipco_gpio_intmask(&bus->chipco, BIT(gpio), BIT(gpio));
 199 +}
 200 +
 201 +static struct irq_chip ssb_gpio_irq_chipco_chip = {
 202 +       .name           = "SSB-GPIO-CC",
 203 +       .irq_mask       = ssb_gpio_irq_chipco_mask,
 204 +       .irq_unmask     = ssb_gpio_irq_chipco_unmask,
 205 +};
 206 +
 207 +static irqreturn_t ssb_gpio_irq_chipco_handler(int irq, void *dev_id)
 208 +{
 209 +       struct ssb_bus *bus = dev_id;
 210 +       struct ssb_chipcommon *chipco = &bus->chipco;
 211 +       u32 val = chipco_read32(chipco, SSB_CHIPCO_GPIOIN);
 212 +       u32 mask = chipco_read32(chipco, SSB_CHIPCO_GPIOIRQ);
 213 +       u32 pol = chipco_read32(chipco, SSB_CHIPCO_GPIOPOL);
 214 +       unsigned long irqs = (val ^ pol) & mask;
 215 +       int gpio;
 216 +
 217 +       if (!irqs)
 218 +               return IRQ_NONE;
 219 +
 220 +       for_each_set_bit(gpio, &irqs, bus->gpio.ngpio)
 221 +               generic_handle_irq(ssb_gpio_to_irq(&bus->gpio, gpio));
 222 +       ssb_chipco_gpio_polarity(chipco, irqs, val & irqs);
 223 +
 224 +       return IRQ_HANDLED;
 225 +}
 226 +
 227 +static int ssb_gpio_irq_chipco_domain_init(struct ssb_bus *bus)
 228 +{
 229 +       struct ssb_chipcommon *chipco = &bus->chipco;
 230 +       struct gpio_chip *chip = &bus->gpio;
 231 +       int gpio, hwirq, err;
 232 +
 233 +       if (bus->bustype != SSB_BUSTYPE_SSB)
 234 +               return 0;
 235 +
 236 +       bus->irq_domain = irq_domain_add_linear(NULL, chip->ngpio,
 237 +                                               &irq_domain_simple_ops, chipco);
 238 +       if (!bus->irq_domain) {
 239 +               err = -ENODEV;
 240 +               goto err_irq_domain;
 241 +       }
 242 +       for (gpio = 0; gpio < chip->ngpio; gpio++) {
 243 +               int irq = irq_create_mapping(bus->irq_domain, gpio);
 244 +
 245 +               irq_set_chip_data(irq, bus);
 246 +               irq_set_chip_and_handler(irq, &ssb_gpio_irq_chipco_chip,
 247 +                                        handle_simple_irq);
 248 +       }
 249 +
 250 +       hwirq = ssb_mips_irq(bus->chipco.dev) + 2;
 251 +       err = request_irq(hwirq, ssb_gpio_irq_chipco_handler, IRQF_SHARED,
 252 +                         "gpio", bus);
 253 +       if (err)
 254 +               goto err_req_irq;
 255 +
 256 +       ssb_chipco_gpio_intmask(&bus->chipco, ~0, 0);
 257 +       chipco_set32(chipco, SSB_CHIPCO_IRQMASK, SSB_CHIPCO_IRQ_GPIO);
 258 +
 259 +       return 0;
 260 +
 261 +err_req_irq:
 262 +       for (gpio = 0; gpio < chip->ngpio; gpio++) {
 263 +               int irq = irq_find_mapping(bus->irq_domain, gpio);
 264 +
 265 +               irq_dispose_mapping(irq);
 266 +       }
 267 +       irq_domain_remove(bus->irq_domain);
 268 +err_irq_domain:
 269 +       return err;
 270 +}
 271 +
 272 +static void ssb_gpio_irq_chipco_domain_exit(struct ssb_bus *bus)
 273 +{
 274 +       struct ssb_chipcommon *chipco = &bus->chipco;
 275 +       struct gpio_chip *chip = &bus->gpio;
 276 +       int gpio;
 277 +
 278 +       if (bus->bustype != SSB_BUSTYPE_SSB)
 279 +               return;
 280 +
 281 +       chipco_mask32(chipco, SSB_CHIPCO_IRQMASK, ~SSB_CHIPCO_IRQ_GPIO);
 282 +       free_irq(ssb_mips_irq(bus->chipco.dev) + 2, chipco);
 283 +       for (gpio = 0; gpio < chip->ngpio; gpio++) {
 284 +               int irq = irq_find_mapping(bus->irq_domain, gpio);
 285 +
 286 +               irq_dispose_mapping(irq);
 287 +       }
 288 +       irq_domain_remove(bus->irq_domain);
 289 +}
 290 +#else
 291 +static int ssb_gpio_irq_chipco_domain_init(struct ssb_bus *bus)
 292 +{
 293 +       return 0;
 294 +}
 295 +
 296 +static void ssb_gpio_irq_chipco_domain_exit(struct ssb_bus *bus)
 297 +{
 298  }
 299 +#endif
 300
 301  static int ssb_gpio_chipco_init(struct ssb_bus *bus)
 302  {
 303         struct gpio_chip *chip = &bus->gpio;
 304 +       int err;
 305
 306         chip->label             = "ssb_chipco_gpio";
 307         chip->owner             = THIS_MODULE;
 308 @@ -96,7 +230,9 @@ static int ssb_gpio_chipco_init(struct s
 309         chip->set               = ssb_gpio_chipco_set_value;
 310         chip->direction_input   = ssb_gpio_chipco_direction_input;
 311         chip->direction_output  = ssb_gpio_chipco_direction_output;
 312 -       chip->to_irq            = ssb_gpio_chipco_to_irq;
 313 +#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
 314 +       chip->to_irq            = ssb_gpio_to_irq;
 315 +#endif
 316         chip->ngpio             = 16;
 317         /* There is just one SoC in one device and its GPIO addresses should be
 318          * deterministic to address them more easily. The other buses could get
 319 @@ -106,9 +242,23 @@ static int ssb_gpio_chipco_init(struct s
 320         else
 321                 chip->base              = -1;
 322
 323 -       return gpiochip_add(chip);
 324 +       err = ssb_gpio_irq_chipco_domain_init(bus);
 325 +       if (err)
 326 +               return err;
 327 +
 328 +       err = gpiochip_add(chip);
 329 +       if (err) {
 330 +               ssb_gpio_irq_chipco_domain_exit(bus);
 331 +               return err;
 332 +       }
 333 +
 334 +       return 0;
 335  }
 336
 337 +/**************************************************
 338 + * EXTIF
 339 + **************************************************/
 340 +
 341  #ifdef CONFIG_SSB_DRIVER_EXTIF
 342
 343  static int ssb_gpio_extif_get_value(struct gpio_chip *chip, unsigned gpio)
 344 @@ -145,19 +295,127 @@ static int ssb_gpio_extif_direction_outp
 345         return 0;
 346  }
 347
 348 -static int ssb_gpio_extif_to_irq(struct gpio_chip *chip, unsigned gpio)
 349 +#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
 350 +static void ssb_gpio_irq_extif_mask(struct irq_data *d)
 351  {
 352 -       struct ssb_bus *bus = ssb_gpio_get_bus(chip);
 353 +       struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
 354 +       int gpio = irqd_to_hwirq(d);
 355
 356 -       if (bus->bustype == SSB_BUSTYPE_SSB)
 357 -               return ssb_mips_irq(bus->extif.dev) + 2;
 358 -       else
 359 -               return -EINVAL;
 360 +       ssb_extif_gpio_intmask(&bus->extif, BIT(gpio), 0);
 361 +}
 362 +
 363 +static void ssb_gpio_irq_extif_unmask(struct irq_data *d)
 364 +{
 365 +       struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
 366 +       int gpio = irqd_to_hwirq(d);
 367 +       u32 val = ssb_extif_gpio_in(&bus->extif, BIT(gpio));
 368 +
 369 +       ssb_extif_gpio_polarity(&bus->extif, BIT(gpio), val);
 370 +       ssb_extif_gpio_intmask(&bus->extif, BIT(gpio), BIT(gpio));
 371 +}
 372 +
 373 +static struct irq_chip ssb_gpio_irq_extif_chip = {
 374 +       .name           = "SSB-GPIO-EXTIF",
 375 +       .irq_mask       = ssb_gpio_irq_extif_mask,
 376 +       .irq_unmask     = ssb_gpio_irq_extif_unmask,
 377 +};
 378 +
 379 +static irqreturn_t ssb_gpio_irq_extif_handler(int irq, void *dev_id)
 380 +{
 381 +       struct ssb_bus *bus = dev_id;
 382 +       struct ssb_extif *extif = &bus->extif;
 383 +       u32 val = ssb_read32(extif->dev, SSB_EXTIF_GPIO_IN);
 384 +       u32 mask = ssb_read32(extif->dev, SSB_EXTIF_GPIO_INTMASK);
 385 +       u32 pol = ssb_read32(extif->dev, SSB_EXTIF_GPIO_INTPOL);
 386 +       unsigned long irqs = (val ^ pol) & mask;
 387 +       int gpio;
 388 +
 389 +       if (!irqs)
 390 +               return IRQ_NONE;
 391 +
 392 +       for_each_set_bit(gpio, &irqs, bus->gpio.ngpio)
 393 +               generic_handle_irq(ssb_gpio_to_irq(&bus->gpio, gpio));
 394 +       ssb_extif_gpio_polarity(extif, irqs, val & irqs);
 395 +
 396 +       return IRQ_HANDLED;
 397 +}
 398 +
 399 +static int ssb_gpio_irq_extif_domain_init(struct ssb_bus *bus)
 400 +{
 401 +       struct ssb_extif *extif = &bus->extif;
 402 +       struct gpio_chip *chip = &bus->gpio;
 403 +       int gpio, hwirq, err;
 404 +
 405 +       if (bus->bustype != SSB_BUSTYPE_SSB)
 406 +               return 0;
 407 +
 408 +       bus->irq_domain = irq_domain_add_linear(NULL, chip->ngpio,
 409 +                                               &irq_domain_simple_ops, extif);
 410 +       if (!bus->irq_domain) {
 411 +               err = -ENODEV;
 412 +               goto err_irq_domain;
 413 +       }
 414 +       for (gpio = 0; gpio < chip->ngpio; gpio++) {
 415 +               int irq = irq_create_mapping(bus->irq_domain, gpio);
 416 +
 417 +               irq_set_chip_data(irq, bus);
 418 +               irq_set_chip_and_handler(irq, &ssb_gpio_irq_extif_chip,
 419 +                                        handle_simple_irq);
 420 +       }
 421 +
 422 +       hwirq = ssb_mips_irq(bus->extif.dev) + 2;
 423 +       err = request_irq(hwirq, ssb_gpio_irq_extif_handler, IRQF_SHARED,
 424 +                         "gpio", bus);
 425 +       if (err)
 426 +               goto err_req_irq;
 427 +
 428 +       ssb_extif_gpio_intmask(&bus->extif, ~0, 0);
 429 +
 430 +       return 0;
 431 +
 432 +err_req_irq:
 433 +       for (gpio = 0; gpio < chip->ngpio; gpio++) {
 434 +               int irq = irq_find_mapping(bus->irq_domain, gpio);
 435 +
 436 +               irq_dispose_mapping(irq);
 437 +       }
 438 +       irq_domain_remove(bus->irq_domain);
 439 +err_irq_domain:
 440 +       return err;
 441  }
 442
 443 +static void ssb_gpio_irq_extif_domain_exit(struct ssb_bus *bus)
 444 +{
 445 +       struct ssb_extif *extif = &bus->extif;
 446 +       struct gpio_chip *chip = &bus->gpio;
 447 +       int gpio;
 448 +
 449 +       if (bus->bustype != SSB_BUSTYPE_SSB)
 450 +               return;
 451 +
 452 +       free_irq(ssb_mips_irq(bus->extif.dev) + 2, extif);
 453 +       for (gpio = 0; gpio < chip->ngpio; gpio++) {
 454 +               int irq = irq_find_mapping(bus->irq_domain, gpio);
 455 +
 456 +               irq_dispose_mapping(irq);
 457 +       }
 458 +       irq_domain_remove(bus->irq_domain);
 459 +}
 460 +#else
 461 +static int ssb_gpio_irq_extif_domain_init(struct ssb_bus *bus)
 462 +{
 463 +       return 0;
 464 +}
 465 +
 466 +static void ssb_gpio_irq_extif_domain_exit(struct ssb_bus *bus)
 467 +{
 468 +}
 469 +#endif
 470 +
 471  static int ssb_gpio_extif_init(struct ssb_bus *bus)
 472  {
 473         struct gpio_chip *chip = &bus->gpio;
 474 +       int err;
 475
 476         chip->label             = "ssb_extif_gpio";
 477         chip->owner             = THIS_MODULE;
 478 @@ -165,7 +423,9 @@ static int ssb_gpio_extif_init(struct ss
 479         chip->set               = ssb_gpio_extif_set_value;
 480         chip->direction_input   = ssb_gpio_extif_direction_input;
 481         chip->direction_output  = ssb_gpio_extif_direction_output;
 482 -       chip->to_irq            = ssb_gpio_extif_to_irq;
 483 +#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
 484 +       chip->to_irq            = ssb_gpio_to_irq;
 485 +#endif
 486         chip->ngpio             = 5;
 487         /* There is just one SoC in one device and its GPIO addresses should be
 488          * deterministic to address them more easily. The other buses could get
 489 @@ -175,7 +435,17 @@ static int ssb_gpio_extif_init(struct ss
 490         else
 491                 chip->base              = -1;
 492
 493 -       return gpiochip_add(chip);
 494 +       err = ssb_gpio_irq_extif_domain_init(bus);
 495 +       if (err)
 496 +               return err;
 497 +
 498 +       err = gpiochip_add(chip);
 499 +       if (err) {
 500 +               ssb_gpio_irq_extif_domain_exit(bus);
 501 +               return err;
 502 +       }
 503 +
 504 +       return 0;
 505  }
 506
 507  #else
 508 @@ -185,6 +455,10 @@ static int ssb_gpio_extif_init(struct ss
 509  }
 510  #endif
 511
 512 +/**************************************************
 513 + * Init
 514 + **************************************************/
 515 +
 516  int ssb_gpio_init(struct ssb_bus *bus)
 517  {
 518         if (ssb_chipco_available(&bus->chipco))
 519 --- a/drivers/ssb/main.c
 520 +++ b/drivers/ssb/main.c
 521 @@ -553,6 +553,14 @@ static int ssb_devices_register(struct s
 522         }
 523  #endif
 524
 525 +#ifdef CONFIG_SSB_SFLASH
 526 +       if (bus->mipscore.sflash.present) {
 527 +               err = platform_device_register(&ssb_sflash_dev);
 528 +               if (err)
 529 +                       pr_err("Error registering serial flash\n");
 530 +       }
 531 +#endif
 532 +
 533         return 0;
 534  error:
 535         /* Unwind the already registered devices. */
 536 @@ -582,6 +590,13 @@ static int ssb_attach_queued_buses(void)
 537                 ssb_pcicore_init(&bus->pcicore);
 538                 if (bus->bustype == SSB_BUSTYPE_SSB)
 539                         ssb_watchdog_register(bus);
 540 +
 541 +               err = ssb_gpio_init(bus);
 542 +               if (err == -ENOTSUPP)
 543 +                       ssb_dbg("GPIO driver not activated\n");
 544 +               else if (err)
 545 +                       ssb_dbg("Error registering GPIO driver: %i\n", err);
 546 +
 547                 ssb_bus_may_powerdown(bus);
 548
 549                 err = ssb_devices_register(bus);
 550 @@ -819,11 +834,6 @@ static int ssb_bus_register(struct ssb_b
 551         ssb_chipcommon_init(&bus->chipco);
 552         ssb_extif_init(&bus->extif);
 553         ssb_mipscore_init(&bus->mipscore);
 554 -       err = ssb_gpio_init(bus);
 555 -       if (err == -ENOTSUPP)
 556 -               ssb_dbg("GPIO driver not activated\n");
 557 -       else if (err)
 558 -               ssb_dbg("Error registering GPIO driver: %i\n", err);
 559         err = ssb_fetch_invariants(bus, get_invariants);
 560         if (err) {
 561                 ssb_bus_may_powerdown(bus);
 562 --- a/drivers/ssb/pci.c
 563 +++ b/drivers/ssb/pci.c
 564 @@ -326,13 +326,13 @@ err_ctlreg:
 565         return err;
 566  }
 567
 568 -static s8 r123_extract_antgain(u8 sprom_revision, const u16 *in,
 569 -                              u16 mask, u16 shift)
 570 +static s8 sprom_extract_antgain(u8 sprom_revision, const u16 *in, u16 offset,
 571 +                               u16 mask, u16 shift)
 572  {
 573         u16 v;
 574         u8 gain;
 575
 576 -       v = in[SPOFF(SSB_SPROM1_AGAIN)];
 577 +       v = in[SPOFF(offset)];
 578         gain = (v & mask) >> shift;
 579         if (gain == 0xFF)
 580                 gain = 2; /* If unset use 2dBm */
 581 @@ -416,12 +416,14 @@ static void sprom_extract_r123(struct ss
 582         SPEX(alpha2[1], SSB_SPROM1_CCODE, 0x00ff, 0);
 583
 584         /* Extract the antenna gain values. */
 585 -       out->antenna_gain.a0 = r123_extract_antgain(out->revision, in,
 586 -                                                   SSB_SPROM1_AGAIN_BG,
 587 -                                                   SSB_SPROM1_AGAIN_BG_SHIFT);
 588 -       out->antenna_gain.a1 = r123_extract_antgain(out->revision, in,
 589 -                                                   SSB_SPROM1_AGAIN_A,
 590 -                                                   SSB_SPROM1_AGAIN_A_SHIFT);
 591 +       out->antenna_gain.a0 = sprom_extract_antgain(out->revision, in,
 592 +                                                    SSB_SPROM1_AGAIN,
 593 +                                                    SSB_SPROM1_AGAIN_BG,
 594 +                                                    SSB_SPROM1_AGAIN_BG_SHIFT);
 595 +       out->antenna_gain.a1 = sprom_extract_antgain(out->revision, in,
 596 +                                                    SSB_SPROM1_AGAIN,
 597 +                                                    SSB_SPROM1_AGAIN_A,
 598 +                                                    SSB_SPROM1_AGAIN_A_SHIFT);
 599         if (out->revision >= 2)
 600                 sprom_extract_r23(out, in);
 601  }
 602 @@ -468,7 +470,15 @@ static void sprom_extract_r458(struct ss
 603
 604  static void sprom_extract_r45(struct ssb_sprom *out, const u16 *in)
 605  {
 606 +       static const u16 pwr_info_offset[] = {
 607 +               SSB_SPROM4_PWR_INFO_CORE0, SSB_SPROM4_PWR_INFO_CORE1,
 608 +               SSB_SPROM4_PWR_INFO_CORE2, SSB_SPROM4_PWR_INFO_CORE3
 609 +       };
 610         u16 il0mac_offset;
 611 +       int i;
 612 +
 613 +       BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) !=
 614 +                    ARRAY_SIZE(out->core_pwr_info));
 615
 616         if (out->revision == 4)
 617                 il0mac_offset = SSB_SPROM4_IL0MAC;
 618 @@ -524,14 +534,59 @@ static void sprom_extract_r45(struct ssb
 619         }
 620
 621         /* Extract the antenna gain values. */
 622 -       SPEX(antenna_gain.a0, SSB_SPROM4_AGAIN01,
 623 -            SSB_SPROM4_AGAIN0, SSB_SPROM4_AGAIN0_SHIFT);
 624 -       SPEX(antenna_gain.a1, SSB_SPROM4_AGAIN01,
 625 -            SSB_SPROM4_AGAIN1, SSB_SPROM4_AGAIN1_SHIFT);
 626 -       SPEX(antenna_gain.a2, SSB_SPROM4_AGAIN23,
 627 -            SSB_SPROM4_AGAIN2, SSB_SPROM4_AGAIN2_SHIFT);
 628 -       SPEX(antenna_gain.a3, SSB_SPROM4_AGAIN23,
 629 -            SSB_SPROM4_AGAIN3, SSB_SPROM4_AGAIN3_SHIFT);
 630 +       out->antenna_gain.a0 = sprom_extract_antgain(out->revision, in,
 631 +                                                    SSB_SPROM4_AGAIN01,
 632 +                                                    SSB_SPROM4_AGAIN0,
 633 +                                                    SSB_SPROM4_AGAIN0_SHIFT);
 634 +       out->antenna_gain.a1 = sprom_extract_antgain(out->revision, in,
 635 +                                                    SSB_SPROM4_AGAIN01,
 636 +                                                    SSB_SPROM4_AGAIN1,
 637 +                                                    SSB_SPROM4_AGAIN1_SHIFT);
 638 +       out->antenna_gain.a2 = sprom_extract_antgain(out->revision, in,
 639 +                                                    SSB_SPROM4_AGAIN23,
 640 +                                                    SSB_SPROM4_AGAIN2,
 641 +                                                    SSB_SPROM4_AGAIN2_SHIFT);
 642 +       out->antenna_gain.a3 = sprom_extract_antgain(out->revision, in,
 643 +                                                    SSB_SPROM4_AGAIN23,
 644 +                                                    SSB_SPROM4_AGAIN3,
 645 +                                                    SSB_SPROM4_AGAIN3_SHIFT);
 646 +
 647 +       /* Extract cores power info info */
 648 +       for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
 649 +               u16 o = pwr_info_offset[i];
 650 +
 651 +               SPEX(core_pwr_info[i].itssi_2g, o + SSB_SPROM4_2G_MAXP_ITSSI,
 652 +                       SSB_SPROM4_2G_ITSSI, SSB_SPROM4_2G_ITSSI_SHIFT);
 653 +               SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SPROM4_2G_MAXP_ITSSI,
 654 +                       SSB_SPROM4_2G_MAXP, 0);
 655 +
 656 +               SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SPROM4_2G_PA_0, ~0, 0);
 657 +               SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SPROM4_2G_PA_1, ~0, 0);
 658 +               SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SPROM4_2G_PA_2, ~0, 0);
 659 +               SPEX(core_pwr_info[i].pa_2g[3], o + SSB_SPROM4_2G_PA_3, ~0, 0);
 660 +
 661 +               SPEX(core_pwr_info[i].itssi_5g, o + SSB_SPROM4_5G_MAXP_ITSSI,
 662 +                       SSB_SPROM4_5G_ITSSI, SSB_SPROM4_5G_ITSSI_SHIFT);
 663 +               SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SPROM4_5G_MAXP_ITSSI,
 664 +                       SSB_SPROM4_5G_MAXP, 0);
 665 +               SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM4_5GHL_MAXP,
 666 +                       SSB_SPROM4_5GH_MAXP, 0);
 667 +               SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM4_5GHL_MAXP,
 668 +                       SSB_SPROM4_5GL_MAXP, SSB_SPROM4_5GL_MAXP_SHIFT);
 669 +
 670 +               SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SPROM4_5GL_PA_0, ~0, 0);
 671 +               SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SPROM4_5GL_PA_1, ~0, 0);
 672 +               SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SPROM4_5GL_PA_2, ~0, 0);
 673 +               SPEX(core_pwr_info[i].pa_5gl[3], o + SSB_SPROM4_5GL_PA_3, ~0, 0);
 674 +               SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SPROM4_5G_PA_0, ~0, 0);
 675 +               SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SPROM4_5G_PA_1, ~0, 0);
 676 +               SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SPROM4_5G_PA_2, ~0, 0);
 677 +               SPEX(core_pwr_info[i].pa_5g[3], o + SSB_SPROM4_5G_PA_3, ~0, 0);
 678 +               SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SPROM4_5GH_PA_0, ~0, 0);
 679 +               SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SPROM4_5GH_PA_1, ~0, 0);
 680 +               SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SPROM4_5GH_PA_2, ~0, 0);
 681 +               SPEX(core_pwr_info[i].pa_5gh[3], o + SSB_SPROM4_5GH_PA_3, ~0, 0);
 682 +       }
 683
 684         sprom_extract_r458(out, in);
 685
 686 @@ -621,14 +676,22 @@ static void sprom_extract_r8(struct ssb_
 687         SPEX32(ofdm5ghpo, SSB_SPROM8_OFDM5GHPO, 0xFFFFFFFF, 0);
 688
 689         /* Extract the antenna gain values. */
 690 -       SPEX(antenna_gain.a0, SSB_SPROM8_AGAIN01,
 691 -            SSB_SPROM8_AGAIN0, SSB_SPROM8_AGAIN0_SHIFT);
 692 -       SPEX(antenna_gain.a1, SSB_SPROM8_AGAIN01,
 693 -            SSB_SPROM8_AGAIN1, SSB_SPROM8_AGAIN1_SHIFT);
 694 -       SPEX(antenna_gain.a2, SSB_SPROM8_AGAIN23,
 695 -            SSB_SPROM8_AGAIN2, SSB_SPROM8_AGAIN2_SHIFT);
 696 -       SPEX(antenna_gain.a3, SSB_SPROM8_AGAIN23,
 697 -            SSB_SPROM8_AGAIN3, SSB_SPROM8_AGAIN3_SHIFT);
 698 +       out->antenna_gain.a0 = sprom_extract_antgain(out->revision, in,
 699 +                                                    SSB_SPROM8_AGAIN01,
 700 +                                                    SSB_SPROM8_AGAIN0,
 701 +                                                    SSB_SPROM8_AGAIN0_SHIFT);
 702 +       out->antenna_gain.a1 = sprom_extract_antgain(out->revision, in,
 703 +                                                    SSB_SPROM8_AGAIN01,
 704 +                                                    SSB_SPROM8_AGAIN1,
 705 +                                                    SSB_SPROM8_AGAIN1_SHIFT);
 706 +       out->antenna_gain.a2 = sprom_extract_antgain(out->revision, in,
 707 +                                                    SSB_SPROM8_AGAIN23,
 708 +                                                    SSB_SPROM8_AGAIN2,
 709 +                                                    SSB_SPROM8_AGAIN2_SHIFT);
 710 +       out->antenna_gain.a3 = sprom_extract_antgain(out->revision, in,
 711 +                                                    SSB_SPROM8_AGAIN23,
 712 +                                                    SSB_SPROM8_AGAIN3,
 713 +                                                    SSB_SPROM8_AGAIN3_SHIFT);
 714
 715         /* Extract cores power info info */
 716         for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
 717 --- a/drivers/ssb/pcihost_wrapper.c
 718 +++ b/drivers/ssb/pcihost_wrapper.c
 719 @@ -38,7 +38,7 @@ static int ssb_pcihost_resume(struct pci
 720         struct ssb_bus *ssb = pci_get_drvdata(dev);
 721         int err;
 722
 723 -       pci_set_power_state(dev, 0);
 724 +       pci_set_power_state(dev, PCI_D0);
 725         err = pci_enable_device(dev);
 726         if (err)
 727                 return err;
 728 --- a/drivers/ssb/sprom.c
 729 +++ b/drivers/ssb/sprom.c
 730 @@ -54,7 +54,7 @@ static int hex2sprom(u16 *sprom, const c
 731         while (cnt < sprom_size_words) {
 732                 memcpy(tmp, dump, 4);
 733                 dump += 4;
 734 -               err = strict_strtoul(tmp, 16, &parsed);
 735 +               err = kstrtoul(tmp, 16, &parsed);
 736                 if (err)
 737                         return err;
 738                 sprom[cnt++] = swab16((u16)parsed);
 739 --- a/drivers/ssb/ssb_private.h
 740 +++ b/drivers/ssb/ssb_private.h
 741 @@ -243,6 +243,10 @@ static inline int ssb_sflash_init(struct
 742  extern struct platform_device ssb_pflash_dev;
 743  #endif
 744
 745 +#ifdef CONFIG_SSB_SFLASH
 746 +extern struct platform_device ssb_sflash_dev;
 747 +#endif
 748 +
 749  #ifdef CONFIG_SSB_DRIVER_EXTIF
 750  extern u32 ssb_extif_watchdog_timer_set_wdt(struct bcm47xx_wdt *wdt, u32 ticks);
 751  extern u32 ssb_extif_watchdog_timer_set_ms(struct bcm47xx_wdt *wdt, u32 ms);
 752 --- a/include/linux/ssb/ssb.h
 753 +++ b/include/linux/ssb/ssb.h
 754 @@ -33,6 +33,7 @@ struct ssb_sprom {
 755         u8 et1phyaddr;          /* MII address for enet1 */
 756         u8 et0mdcport;          /* MDIO for enet0 */
 757         u8 et1mdcport;          /* MDIO for enet1 */
 758 +       u16 dev_id;             /* Device ID overriding e.g. PCI ID */
 759         u16 board_rev;          /* Board revision number from SPROM. */
 760         u16 board_num;          /* Board number from SPROM. */
 761         u16 board_type;         /* Board type from SPROM. */
 762 @@ -486,6 +487,7 @@ struct ssb_bus {
 763  #endif /* EMBEDDED */
 764  #ifdef CONFIG_SSB_DRIVER_GPIO
 765         struct gpio_chip gpio;
 766 +       struct irq_domain *irq_domain;
 767  #endif /* DRIVER_GPIO */
 768
 769         /* Internal-only stuff follows. Do not touch. */
 770 --- a/include/linux/ssb/ssb_driver_gige.h
 771 +++ b/include/linux/ssb/ssb_driver_gige.h
 772 @@ -108,6 +108,16 @@ static inline int ssb_gige_get_macaddr(s
 773         return 0;
 774  }
 775
 776 +/* Get the device phy address */
 777 +static inline int ssb_gige_get_phyaddr(struct pci_dev *pdev)
 778 +{
 779 +       struct ssb_gige *dev = pdev_to_ssb_gige(pdev);
 780 +       if (!dev)
 781 +               return -ENODEV;
 782 +
 783 +       return dev->dev->bus->sprom.et0phyaddr;
 784 +}
 785 +
 786  extern int ssb_gige_pcibios_plat_dev_init(struct ssb_device *sdev,
 787                                           struct pci_dev *pdev);
 788  extern int ssb_gige_map_irq(struct ssb_device *sdev,
 789 @@ -174,6 +184,10 @@ static inline int ssb_gige_get_macaddr(s
 790  {
 791         return -ENODEV;
 792  }
 793 +static inline int ssb_gige_get_phyaddr(struct pci_dev *pdev)
 794 +{
 795 +       return -ENODEV;
 796 +}
 797
 798  #endif /* CONFIG_SSB_DRIVER_GIGE */
 799  #endif /* LINUX_SSB_DRIVER_GIGE_H_ */
 800 --- a/include/linux/ssb/ssb_driver_mips.h
 801 +++ b/include/linux/ssb/ssb_driver_mips.h
 802 @@ -20,6 +20,18 @@ struct ssb_pflash {
 803         u32 window_size;
 804  };
 805
 806 +#ifdef CONFIG_SSB_SFLASH
 807 +struct ssb_sflash {
 808 +       bool present;
 809 +       u32 window;
 810 +       u32 blocksize;
 811 +       u16 numblocks;
 812 +       u32 size;
 813 +
 814 +       void *priv;
 815 +};
 816 +#endif
 817 +
 818  struct ssb_mipscore {
 819         struct ssb_device *dev;
 820
 821 @@ -27,6 +39,9 @@ struct ssb_mipscore {
 822         struct ssb_serial_port serial_ports[4];
 823
 824         struct ssb_pflash pflash;
 825 +#ifdef CONFIG_SSB_SFLASH
 826 +       struct ssb_sflash sflash;
 827 +#endif
 828  };
 829
 830  extern void ssb_mipscore_init(struct ssb_mipscore *mcore);
 831 --- a/include/linux/ssb/ssb_regs.h
 832 +++ b/include/linux/ssb/ssb_regs.h
 833 @@ -172,6 +172,7 @@
 834  #define SSB_SPROMSIZE_WORDS_R4         220
 835  #define SSB_SPROMSIZE_BYTES_R123       (SSB_SPROMSIZE_WORDS_R123 * sizeof(u16))
 836  #define SSB_SPROMSIZE_BYTES_R4         (SSB_SPROMSIZE_WORDS_R4 * sizeof(u16))
 837 +#define SSB_SPROMSIZE_WORDS_R10                230
 838  #define SSB_SPROM_BASE1                        0x1000
 839  #define SSB_SPROM_BASE31               0x0800
 840  #define SSB_SPROM_REVISION             0x007E
 841 @@ -344,6 +345,43 @@
 842  #define  SSB_SPROM4_TXPID5GH2_SHIFT    0
 843  #define  SSB_SPROM4_TXPID5GH3          0xFF00
 844  #define  SSB_SPROM4_TXPID5GH3_SHIFT    8
 845 +
 846 +/* There are 4 blocks with power info sharing the same layout */
 847 +#define SSB_SPROM4_PWR_INFO_CORE0      0x0080
 848 +#define SSB_SPROM4_PWR_INFO_CORE1      0x00AE
 849 +#define SSB_SPROM4_PWR_INFO_CORE2      0x00DC
 850 +#define SSB_SPROM4_PWR_INFO_CORE3      0x010A
 851 +
 852 +#define SSB_SPROM4_2G_MAXP_ITSSI       0x00    /* 2 GHz ITSSI and 2 GHz Max Power */
 853 +#define  SSB_SPROM4_2G_MAXP            0x00FF
 854 +#define  SSB_SPROM4_2G_ITSSI           0xFF00
 855 +#define  SSB_SPROM4_2G_ITSSI_SHIFT     8
 856 +#define SSB_SPROM4_2G_PA_0             0x02    /* 2 GHz power amp */
 857 +#define SSB_SPROM4_2G_PA_1             0x04
 858 +#define SSB_SPROM4_2G_PA_2             0x06
 859 +#define SSB_SPROM4_2G_PA_3             0x08
 860 +#define SSB_SPROM4_5G_MAXP_ITSSI       0x0A    /* 5 GHz ITSSI and 5.3 GHz Max Power */
 861 +#define  SSB_SPROM4_5G_MAXP            0x00FF
 862 +#define  SSB_SPROM4_5G_ITSSI           0xFF00
 863 +#define  SSB_SPROM4_5G_ITSSI_SHIFT     8
 864 +#define SSB_SPROM4_5GHL_MAXP           0x0C    /* 5.2 GHz and 5.8 GHz Max Power */
 865 +#define  SSB_SPROM4_5GH_MAXP           0x00FF
 866 +#define  SSB_SPROM4_5GL_MAXP           0xFF00
 867 +#define  SSB_SPROM4_5GL_MAXP_SHIFT     8
 868 +#define SSB_SPROM4_5G_PA_0             0x0E    /* 5.3 GHz power amp */
 869 +#define SSB_SPROM4_5G_PA_1             0x10
 870 +#define SSB_SPROM4_5G_PA_2             0x12
 871 +#define SSB_SPROM4_5G_PA_3             0x14
 872 +#define SSB_SPROM4_5GL_PA_0            0x16    /* 5.2 GHz power amp */
 873 +#define SSB_SPROM4_5GL_PA_1            0x18
 874 +#define SSB_SPROM4_5GL_PA_2            0x1A
 875 +#define SSB_SPROM4_5GL_PA_3            0x1C
 876 +#define SSB_SPROM4_5GH_PA_0            0x1E    /* 5.8 GHz power amp */
 877 +#define SSB_SPROM4_5GH_PA_1            0x20
 878 +#define SSB_SPROM4_5GH_PA_2            0x22
 879 +#define SSB_SPROM4_5GH_PA_3            0x24
 880 +
 881 +/* TODO: Make it deprecated */
 882  #define SSB_SPROM4_MAXP_BG             0x0080  /* Max Power BG in path 1 */
 883  #define  SSB_SPROM4_MAXP_BG_MASK       0x00FF  /* Mask for Max Power BG */
 884  #define  SSB_SPROM4_ITSSI_BG           0xFF00  /* Mask for path 1 itssi_bg */
 885 --- a/arch/mips/bcm47xx/sprom.c
 886 +++ b/arch/mips/bcm47xx/sprom.c
 887 @@ -168,6 +168,7 @@ static void nvram_read_alpha2(const char
 888  static void bcm47xx_fill_sprom_r1234589(struct ssb_sprom *sprom,
 889                                         const char *prefix, bool fallback)
 890  {
 891 +       nvram_read_u16(prefix, NULL, "devid", &sprom->dev_id, 0, fallback);
 892         nvram_read_u8(prefix, NULL, "ledbh0", &sprom->gpio0, 0xff, fallback);
 893         nvram_read_u8(prefix, NULL, "ledbh1", &sprom->gpio1, 0xff, fallback);
 894         nvram_read_u8(prefix, NULL, "ledbh2", &sprom->gpio2, 0xff, fallback);