target/linux/generic/files/drivers/net/phy/rtl8366s.c

   1 /*
   2  * Platform driver for the Realtek RTL8366S ethernet switch
   3  *
   4  * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
   5  * Copyright (C) 2010 Antti Seppälä <a.seppala@gmail.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify it
   8  * under the terms of the GNU General Public License version 2 as published
   9  * by the Free Software Foundation.
  10  */
  11
  12 #include <linux/kernel.h>
  13 #include <linux/module.h>
  14 #include <linux/init.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/delay.h>
  17 #include <linux/skbuff.h>
  18 #include <linux/switch.h>
  19 #include <linux/rtl8366s.h>
  20
  21 #include "rtl8366_smi.h"
  22
  23 #ifdef CONFIG_RTL8366S_PHY_DEBUG_FS
  24 #include <linux/debugfs.h>
  25 #endif
  26
  27 #define RTL8366S_DRIVER_DESC    "Realtek RTL8366S ethernet switch driver"
  28 #define RTL8366S_DRIVER_VER     "0.2.2"
  29
  30 #define RTL8366S_PHY_NO_MAX     4
  31 #define RTL8366S_PHY_PAGE_MAX   7
  32 #define RTL8366S_PHY_ADDR_MAX   31
  33
  34 #define RTL8366S_CHIP_GLOBAL_CTRL_REG           0x0000
  35 #define RTL8366S_CHIP_CTRL_VLAN                 (1 << 13)
  36
  37 /* Switch Global Configuration register */
  38 #define RTL8366S_SGCR                           0x0000
  39 #define RTL8366S_SGCR_EN_BC_STORM_CTRL          BIT(0)
  40 #define RTL8366S_SGCR_MAX_LENGTH(_x)            (_x << 4)
  41 #define RTL8366S_SGCR_MAX_LENGTH_MASK           RTL8366S_SGCR_MAX_LENGTH(0x3)
  42 #define RTL8366S_SGCR_MAX_LENGTH_1522           RTL8366S_SGCR_MAX_LENGTH(0x0)
  43 #define RTL8366S_SGCR_MAX_LENGTH_1536           RTL8366S_SGCR_MAX_LENGTH(0x1)
  44 #define RTL8366S_SGCR_MAX_LENGTH_1552           RTL8366S_SGCR_MAX_LENGTH(0x2)
  45 #define RTL8366S_SGCR_MAX_LENGTH_16000          RTL8366S_SGCR_MAX_LENGTH(0x3)
  46
  47 /* Port Enable Control register */
  48 #define RTL8366S_PECR                           0x0001
  49
  50 /* Switch Security Control registers */
  51 #define RTL8366S_SSCR0                          0x0002
  52 #define RTL8366S_SSCR1                          0x0003
  53 #define RTL8366S_SSCR2                          0x0004
  54 #define RTL8366S_SSCR2_DROP_UNKNOWN_DA          BIT(0)
  55
  56 #define RTL8366S_RESET_CTRL_REG                 0x0100
  57 #define RTL8366S_CHIP_CTRL_RESET_HW             1
  58 #define RTL8366S_CHIP_CTRL_RESET_SW             (1 << 1)
  59
  60 #define RTL8366S_CHIP_VERSION_CTRL_REG          0x0104
  61 #define RTL8366S_CHIP_VERSION_MASK              0xf
  62 #define RTL8366S_CHIP_ID_REG                    0x0105
  63 #define RTL8366S_CHIP_ID_8366                   0x8366
  64
  65 /* PHY registers control */
  66 #define RTL8366S_PHY_ACCESS_CTRL_REG            0x8028
  67 #define RTL8366S_PHY_ACCESS_DATA_REG            0x8029
  68
  69 #define RTL8366S_PHY_CTRL_READ                  1
  70 #define RTL8366S_PHY_CTRL_WRITE                 0
  71
  72 #define RTL8366S_PHY_REG_MASK                   0x1f
  73 #define RTL8366S_PHY_PAGE_OFFSET                5
  74 #define RTL8366S_PHY_PAGE_MASK                  (0x7 << 5)
  75 #define RTL8366S_PHY_NO_OFFSET                  9
  76 #define RTL8366S_PHY_NO_MASK                    (0x1f << 9)
  77
  78 /* LED control registers */
  79 #define RTL8366S_LED_BLINKRATE_REG              0x0420
  80 #define RTL8366S_LED_BLINKRATE_BIT              0
  81 #define RTL8366S_LED_BLINKRATE_MASK             0x0007
  82
  83 #define RTL8366S_LED_CTRL_REG                   0x0421
  84 #define RTL8366S_LED_0_1_CTRL_REG               0x0422
  85 #define RTL8366S_LED_2_3_CTRL_REG               0x0423
  86
  87 #define RTL8366S_MIB_COUNT                      33
  88 #define RTL8366S_GLOBAL_MIB_COUNT               1
  89 #define RTL8366S_MIB_COUNTER_PORT_OFFSET        0x0040
  90 #define RTL8366S_MIB_COUNTER_BASE               0x1000
  91 #define RTL8366S_MIB_COUNTER_PORT_OFFSET2       0x0008
  92 #define RTL8366S_MIB_COUNTER_BASE2              0x1180
  93 #define RTL8366S_MIB_CTRL_REG                   0x11F0
  94 #define RTL8366S_MIB_CTRL_USER_MASK             0x01FF
  95 #define RTL8366S_MIB_CTRL_BUSY_MASK             0x0001
  96 #define RTL8366S_MIB_CTRL_RESET_MASK            0x0002
  97
  98 #define RTL8366S_MIB_CTRL_GLOBAL_RESET_MASK     0x0004
  99 #define RTL8366S_MIB_CTRL_PORT_RESET_BIT        0x0003
 100 #define RTL8366S_MIB_CTRL_PORT_RESET_MASK       0x01FC
 101
 102
 103 #define RTL8366S_PORT_VLAN_CTRL_BASE            0x0058
 104 #define RTL8366S_PORT_VLAN_CTRL_REG(_p)  \
 105                 (RTL8366S_PORT_VLAN_CTRL_BASE + (_p) / 4)
 106 #define RTL8366S_PORT_VLAN_CTRL_MASK            0xf
 107 #define RTL8366S_PORT_VLAN_CTRL_SHIFT(_p)       (4 * ((_p) % 4))
 108
 109
 110 #define RTL8366S_VLAN_TABLE_READ_BASE           0x018B
 111 #define RTL8366S_VLAN_TABLE_WRITE_BASE          0x0185
 112
 113 #define RTL8366S_VLAN_TB_CTRL_REG               0x010F
 114
 115 #define RTL8366S_TABLE_ACCESS_CTRL_REG          0x0180
 116 #define RTL8366S_TABLE_VLAN_READ_CTRL           0x0E01
 117 #define RTL8366S_TABLE_VLAN_WRITE_CTRL          0x0F01
 118
 119 #define RTL8366S_VLAN_MEMCONF_BASE              0x0016
 120
 121
 122 #define RTL8366S_PORT_LINK_STATUS_BASE          0x0060
 123 #define RTL8366S_PORT_STATUS_SPEED_MASK         0x0003
 124 #define RTL8366S_PORT_STATUS_DUPLEX_MASK        0x0004
 125 #define RTL8366S_PORT_STATUS_LINK_MASK          0x0010
 126 #define RTL8366S_PORT_STATUS_TXPAUSE_MASK       0x0020
 127 #define RTL8366S_PORT_STATUS_RXPAUSE_MASK       0x0040
 128 #define RTL8366S_PORT_STATUS_AN_MASK            0x0080
 129
 130
 131 #define RTL8366S_PORT_NUM_CPU           5
 132 #define RTL8366S_NUM_PORTS              6
 133 #define RTL8366S_NUM_VLANS              16
 134 #define RTL8366S_NUM_LEDGROUPS          4
 135 #define RTL8366S_NUM_VIDS               4096
 136 #define RTL8366S_PRIORITYMAX            7
 137 #define RTL8366S_FIDMAX                 7
 138
 139
 140 #define RTL8366S_PORT_1                 (1 << 0) /* In userspace port 0 */
 141 #define RTL8366S_PORT_2                 (1 << 1) /* In userspace port 1 */
 142 #define RTL8366S_PORT_3                 (1 << 2) /* In userspace port 2 */
 143 #define RTL8366S_PORT_4                 (1 << 3) /* In userspace port 3 */
 144
 145 #define RTL8366S_PORT_UNKNOWN           (1 << 4) /* No known connection */
 146 #define RTL8366S_PORT_CPU               (1 << 5) /* CPU port */
 147
 148 #define RTL8366S_PORT_ALL               (RTL8366S_PORT_1 |      \
 149                                          RTL8366S_PORT_2 |      \
 150                                          RTL8366S_PORT_3 |      \
 151                                          RTL8366S_PORT_4 |      \
 152                                          RTL8366S_PORT_UNKNOWN | \
 153                                          RTL8366S_PORT_CPU)
 154
 155 #define RTL8366S_PORT_ALL_BUT_CPU       (RTL8366S_PORT_1 |      \
 156                                          RTL8366S_PORT_2 |      \
 157                                          RTL8366S_PORT_3 |      \
 158                                          RTL8366S_PORT_4 |      \
 159                                          RTL8366S_PORT_UNKNOWN)
 160
 161 #define RTL8366S_PORT_ALL_EXTERNAL      (RTL8366S_PORT_1 |      \
 162                                          RTL8366S_PORT_2 |      \
 163                                          RTL8366S_PORT_3 |      \
 164                                          RTL8366S_PORT_4)
 165
 166 #define RTL8366S_PORT_ALL_INTERNAL      (RTL8366S_PORT_UNKNOWN | \
 167                                          RTL8366S_PORT_CPU)
 168
 169 struct rtl8366s {
 170         struct device           *parent;
 171         struct rtl8366_smi      smi;
 172         struct switch_dev       dev;
 173 #ifdef CONFIG_RTL8366S_PHY_DEBUG_FS
 174         struct dentry           *debugfs_root;
 175 #endif
 176 };
 177
 178 struct rtl8366s_vlan_mc {
 179         u16     reserved2:1;
 180         u16     priority:3;
 181         u16     vid:12;
 182
 183         u16     reserved1:1;
 184         u16     fid:3;
 185         u16     untag:6;
 186         u16     member:6;
 187 };
 188
 189 struct rtl8366s_vlan_4k {
 190         u16     reserved1:4;
 191         u16     vid:12;
 192
 193         u16     reserved2:1;
 194         u16     fid:3;
 195         u16     untag:6;
 196         u16     member:6;
 197 };
 198
 199 #ifdef CONFIG_RTL8366S_PHY_DEBUG_FS
 200 u16 g_dbg_reg;
 201 #endif
 202
 203 struct mib_counter {
 204         unsigned        base;
 205         unsigned        offset;
 206         unsigned        length;
 207         const char      *name;
 208 };
 209
 210 static struct mib_counter rtl8366s_mib_counters[RTL8366S_MIB_COUNT] = {
 211         { 0,  0, 4, "IfInOctets"                                },
 212         { 0,  4, 4, "EtherStatsOctets"                          },
 213         { 0,  8, 2, "EtherStatsUnderSizePkts"                   },
 214         { 0, 10, 2, "EtherFragments"                            },
 215         { 0, 12, 2, "EtherStatsPkts64Octets"                    },
 216         { 0, 14, 2, "EtherStatsPkts65to127Octets"               },
 217         { 0, 16, 2, "EtherStatsPkts128to255Octets"              },
 218         { 0, 18, 2, "EtherStatsPkts256to511Octets"              },
 219         { 0, 20, 2, "EtherStatsPkts512to1023Octets"             },
 220         { 0, 22, 2, "EtherStatsPkts1024to1518Octets"            },
 221         { 0, 24, 2, "EtherOversizeStats"                        },
 222         { 0, 26, 2, "EtherStatsJabbers"                         },
 223         { 0, 28, 2, "IfInUcastPkts"                             },
 224         { 0, 30, 2, "EtherStatsMulticastPkts"                   },
 225         { 0, 32, 2, "EtherStatsBroadcastPkts"                   },
 226         { 0, 34, 2, "EtherStatsDropEvents"                      },
 227         { 0, 36, 2, "Dot3StatsFCSErrors"                        },
 228         { 0, 38, 2, "Dot3StatsSymbolErrors"                     },
 229         { 0, 40, 2, "Dot3InPauseFrames"                         },
 230         { 0, 42, 2, "Dot3ControlInUnknownOpcodes"               },
 231         { 0, 44, 4, "IfOutOctets"                               },
 232         { 0, 48, 2, "Dot3StatsSingleCollisionFrames"            },
 233         { 0, 50, 2, "Dot3StatMultipleCollisionFrames"           },
 234         { 0, 52, 2, "Dot3sDeferredTransmissions"                },
 235         { 0, 54, 2, "Dot3StatsLateCollisions"                   },
 236         { 0, 56, 2, "EtherStatsCollisions"                      },
 237         { 0, 58, 2, "Dot3StatsExcessiveCollisions"              },
 238         { 0, 60, 2, "Dot3OutPauseFrames"                        },
 239         { 0, 62, 2, "Dot1dBasePortDelayExceededDiscards"        },
 240
 241         /*
 242          * The following counters are accessible at a different
 243          * base address.
 244          */
 245         { 1,  0, 2, "Dot1dTpPortInDiscards"                     },
 246         { 1,  2, 2, "IfOutUcastPkts"                            },
 247         { 1,  4, 2, "IfOutMulticastPkts"                        },
 248         { 1,  6, 2, "IfOutBroadcastPkts"                        },
 249 };
 250
 251 #define REG_WR(_smi, _reg, _val)                                        \
 252         do {                                                            \
 253                 err = rtl8366_smi_write_reg(_smi, _reg, _val);          \
 254                 if (err)                                                \
 255                         return err;                                     \
 256         } while (0)
 257
 258 #define REG_RMW(_smi, _reg, _mask, _val)                                \
 259         do {                                                            \
 260                 err = rtl8366_smi_rmwr(_smi, _reg, _mask, _val);        \
 261                 if (err)                                                \
 262                         return err;                                     \
 263         } while (0)
 264
 265 static inline struct rtl8366s *smi_to_rtl8366s(struct rtl8366_smi *smi)
 266 {
 267         return container_of(smi, struct rtl8366s, smi);
 268 }
 269
 270 static inline struct rtl8366s *sw_to_rtl8366s(struct switch_dev *sw)
 271 {
 272         return container_of(sw, struct rtl8366s, dev);
 273 }
 274
 275 static inline struct rtl8366_smi *sw_to_rtl8366_smi(struct switch_dev *sw)
 276 {
 277         struct rtl8366s *rtl = sw_to_rtl8366s(sw);
 278         return &rtl->smi;
 279 }
 280
 281 static int rtl8366s_reset_chip(struct rtl8366_smi *smi)
 282 {
 283         int timeout = 10;
 284         u32 data;
 285
 286         rtl8366_smi_write_reg(smi, RTL8366S_RESET_CTRL_REG,
 287                               RTL8366S_CHIP_CTRL_RESET_HW);
 288         do {
 289                 msleep(1);
 290                 if (rtl8366_smi_read_reg(smi, RTL8366S_RESET_CTRL_REG, &data))
 291                         return -EIO;
 292
 293                 if (!(data & RTL8366S_CHIP_CTRL_RESET_HW))
 294                         break;
 295         } while (--timeout);
 296
 297         if (!timeout) {
 298                 printk("Timeout waiting for the switch to reset\n");
 299                 return -EIO;
 300         }
 301
 302         return 0;
 303 }
 304
 305 static int rtl8366s_hw_init(struct rtl8366_smi *smi)
 306 {
 307         int err;
 308
 309         /* set maximum packet length to 1536 bytes */
 310         REG_RMW(smi, RTL8366S_SGCR, RTL8366S_SGCR_MAX_LENGTH_MASK,
 311                 RTL8366S_SGCR_MAX_LENGTH_1536);
 312
 313         /* enable all ports */
 314         REG_WR(smi, RTL8366S_PECR, 0);
 315
 316         /* disable learning for all ports */
 317         REG_WR(smi, RTL8366S_SSCR0, RTL8366S_PORT_ALL);
 318
 319         /* disable auto ageing for all ports */
 320         REG_WR(smi, RTL8366S_SSCR1, RTL8366S_PORT_ALL);
 321
 322         /* don't drop packets whose DA has not been learned */
 323         REG_RMW(smi, RTL8366S_SSCR2, RTL8366S_SSCR2_DROP_UNKNOWN_DA, 0);
 324
 325         return 0;
 326 }
 327
 328 static int rtl8366s_read_phy_reg(struct rtl8366_smi *smi,
 329                                  u32 phy_no, u32 page, u32 addr, u32 *data)
 330 {
 331         u32 reg;
 332         int ret;
 333
 334         if (phy_no > RTL8366S_PHY_NO_MAX)
 335                 return -EINVAL;
 336
 337         if (page > RTL8366S_PHY_PAGE_MAX)
 338                 return -EINVAL;
 339
 340         if (addr > RTL8366S_PHY_ADDR_MAX)
 341                 return -EINVAL;
 342
 343         ret = rtl8366_smi_write_reg(smi, RTL8366S_PHY_ACCESS_CTRL_REG,
 344                                     RTL8366S_PHY_CTRL_READ);
 345         if (ret)
 346                 return ret;
 347
 348         reg = 0x8000 | (1 << (phy_no + RTL8366S_PHY_NO_OFFSET)) |
 349               ((page << RTL8366S_PHY_PAGE_OFFSET) & RTL8366S_PHY_PAGE_MASK) |
 350               (addr & RTL8366S_PHY_REG_MASK);
 351
 352         ret = rtl8366_smi_write_reg(smi, reg, 0);
 353         if (ret)
 354                 return ret;
 355
 356         ret = rtl8366_smi_read_reg(smi, RTL8366S_PHY_ACCESS_DATA_REG, data);
 357         if (ret)
 358                 return ret;
 359
 360         return 0;
 361 }
 362
 363 static int rtl8366s_write_phy_reg(struct rtl8366_smi *smi,
 364                                   u32 phy_no, u32 page, u32 addr, u32 data)
 365 {
 366         u32 reg;
 367         int ret;
 368
 369         if (phy_no > RTL8366S_PHY_NO_MAX)
 370                 return -EINVAL;
 371
 372         if (page > RTL8366S_PHY_PAGE_MAX)
 373                 return -EINVAL;
 374
 375         if (addr > RTL8366S_PHY_ADDR_MAX)
 376                 return -EINVAL;
 377
 378         ret = rtl8366_smi_write_reg(smi, RTL8366S_PHY_ACCESS_CTRL_REG,
 379                                     RTL8366S_PHY_CTRL_WRITE);
 380         if (ret)
 381                 return ret;
 382
 383         reg = 0x8000 | (1 << (phy_no + RTL8366S_PHY_NO_OFFSET)) |
 384               ((page << RTL8366S_PHY_PAGE_OFFSET) & RTL8366S_PHY_PAGE_MASK) |
 385               (addr & RTL8366S_PHY_REG_MASK);
 386
 387         ret = rtl8366_smi_write_reg(smi, reg, data);
 388         if (ret)
 389                 return ret;
 390
 391         return 0;
 392 }
 393
 394 static int rtl8366_get_mib_counter(struct rtl8366_smi *smi, int counter,
 395                                    int port, unsigned long long *val)
 396 {
 397         int i;
 398         int err;
 399         u32 addr, data;
 400         u64 mibvalue;
 401
 402         if (port > RTL8366S_NUM_PORTS || counter >= RTL8366S_MIB_COUNT)
 403                 return -EINVAL;
 404
 405         switch (rtl8366s_mib_counters[counter].base) {
 406         case 0:
 407                 addr = RTL8366S_MIB_COUNTER_BASE +
 408                        RTL8366S_MIB_COUNTER_PORT_OFFSET * port;
 409                 break;
 410
 411         case 1:
 412                 addr = RTL8366S_MIB_COUNTER_BASE2 +
 413                         RTL8366S_MIB_COUNTER_PORT_OFFSET2 * port;
 414                 break;
 415
 416         default:
 417                 return -EINVAL;
 418         }
 419
 420         addr += rtl8366s_mib_counters[counter].offset;
 421
 422         /*
 423          * Writing access counter address first
 424          * then ASIC will prepare 64bits counter wait for being retrived
 425          */
 426         data = 0; /* writing data will be discard by ASIC */
 427         err = rtl8366_smi_write_reg(smi, addr, data);
 428         if (err)
 429                 return err;
 430
 431         /* read MIB control register */
 432         err =  rtl8366_smi_read_reg(smi, RTL8366S_MIB_CTRL_REG, &data);
 433         if (err)
 434                 return err;
 435
 436         if (data & RTL8366S_MIB_CTRL_BUSY_MASK)
 437                 return -EBUSY;
 438
 439         if (data & RTL8366S_MIB_CTRL_RESET_MASK)
 440                 return -EIO;
 441
 442         mibvalue = 0;
 443         for (i = rtl8366s_mib_counters[counter].length; i > 0; i--) {
 444                 err = rtl8366_smi_read_reg(smi, addr + (i - 1), &data);
 445                 if (err)
 446                         return err;
 447
 448                 mibvalue = (mibvalue << 16) | (data & 0xFFFF);
 449         }
 450
 451         *val = mibvalue;
 452         return 0;
 453 }
 454
 455 static int rtl8366s_get_vlan_4k(struct rtl8366_smi *smi, u32 vid,
 456                                 struct rtl8366_vlan_4k *vlan4k)
 457 {
 458         struct rtl8366s_vlan_4k vlan4k_priv;
 459         int err;
 460         u32 data;
 461         u16 *tableaddr;
 462
 463         memset(vlan4k, '\0', sizeof(struct rtl8366_vlan_4k));
 464         vlan4k_priv.vid = vid;
 465
 466         if (vid >= RTL8366S_NUM_VIDS)
 467                 return -EINVAL;
 468
 469         tableaddr = (u16 *)&vlan4k_priv;
 470
 471         /* write VID */
 472         data = *tableaddr;
 473         err = rtl8366_smi_write_reg(smi, RTL8366S_VLAN_TABLE_WRITE_BASE, data);
 474         if (err)
 475                 return err;
 476
 477         /* write table access control word */
 478         err = rtl8366_smi_write_reg(smi, RTL8366S_TABLE_ACCESS_CTRL_REG,
 479                                     RTL8366S_TABLE_VLAN_READ_CTRL);
 480         if (err)
 481                 return err;
 482
 483         err = rtl8366_smi_read_reg(smi, RTL8366S_VLAN_TABLE_READ_BASE, &data);
 484         if (err)
 485                 return err;
 486
 487         *tableaddr = data;
 488         tableaddr++;
 489
 490         err = rtl8366_smi_read_reg(smi, RTL8366S_VLAN_TABLE_READ_BASE + 1,
 491                                    &data);
 492         if (err)
 493                 return err;
 494
 495         *tableaddr = data;
 496
 497         vlan4k->vid = vid;
 498         vlan4k->untag = vlan4k_priv.untag;
 499         vlan4k->member = vlan4k_priv.member;
 500         vlan4k->fid = vlan4k_priv.fid;
 501
 502         return 0;
 503 }
 504
 505 static int rtl8366s_set_vlan_4k(struct rtl8366_smi *smi,
 506                                 const struct rtl8366_vlan_4k *vlan4k)
 507 {
 508         struct rtl8366s_vlan_4k vlan4k_priv;
 509         int err;
 510         u32 data;
 511         u16 *tableaddr;
 512
 513         if (vlan4k->vid >= RTL8366S_NUM_VIDS ||
 514             vlan4k->member > RTL8366S_PORT_ALL ||
 515             vlan4k->untag > RTL8366S_PORT_ALL ||
 516             vlan4k->fid > RTL8366S_FIDMAX)
 517                 return -EINVAL;
 518
 519         vlan4k_priv.vid = vlan4k->vid;
 520         vlan4k_priv.untag = vlan4k->untag;
 521         vlan4k_priv.member = vlan4k->member;
 522         vlan4k_priv.fid = vlan4k->fid;
 523
 524         tableaddr = (u16 *)&vlan4k_priv;
 525
 526         data = *tableaddr;
 527
 528         err = rtl8366_smi_write_reg(smi, RTL8366S_VLAN_TABLE_WRITE_BASE, data);
 529         if (err)
 530                 return err;
 531
 532         tableaddr++;
 533
 534         data = *tableaddr;
 535
 536         err = rtl8366_smi_write_reg(smi, RTL8366S_VLAN_TABLE_WRITE_BASE + 1,
 537                                     data);
 538         if (err)
 539                 return err;
 540
 541         /* write table access control word */
 542         err = rtl8366_smi_write_reg(smi, RTL8366S_TABLE_ACCESS_CTRL_REG,
 543                                     RTL8366S_TABLE_VLAN_WRITE_CTRL);
 544
 545         return err;
 546 }
 547
 548 static int rtl8366s_get_vlan_mc(struct rtl8366_smi *smi, u32 index,
 549                                 struct rtl8366_vlan_mc *vlanmc)
 550 {
 551         struct rtl8366s_vlan_mc vlanmc_priv;
 552         int err;
 553         u32 addr;
 554         u32 data;
 555         u16 *tableaddr;
 556
 557         memset(vlanmc, '\0', sizeof(struct rtl8366_vlan_mc));
 558
 559         if (index >= RTL8366S_NUM_VLANS)
 560                 return -EINVAL;
 561
 562         tableaddr = (u16 *)&vlanmc_priv;
 563
 564         addr = RTL8366S_VLAN_MEMCONF_BASE + (index << 1);
 565         err = rtl8366_smi_read_reg(smi, addr, &data);
 566         if (err)
 567                 return err;
 568
 569         *tableaddr = data;
 570         tableaddr++;
 571
 572         addr = RTL8366S_VLAN_MEMCONF_BASE + 1 + (index << 1);
 573         err = rtl8366_smi_read_reg(smi, addr, &data);
 574         if (err)
 575                 return err;
 576
 577         *tableaddr = data;
 578
 579         vlanmc->vid = vlanmc_priv.vid;
 580         vlanmc->priority = vlanmc_priv.priority;
 581         vlanmc->untag = vlanmc_priv.untag;
 582         vlanmc->member = vlanmc_priv.member;
 583         vlanmc->fid = vlanmc_priv.fid;
 584
 585         return 0;
 586 }
 587
 588 static int rtl8366s_set_vlan_mc(struct rtl8366_smi *smi, u32 index,
 589                                 const struct rtl8366_vlan_mc *vlanmc)
 590 {
 591         struct rtl8366s_vlan_mc vlanmc_priv;
 592         int err;
 593         u32 addr;
 594         u32 data;
 595         u16 *tableaddr;
 596
 597         if (index >= RTL8366S_NUM_VLANS ||
 598             vlanmc->vid >= RTL8366S_NUM_VIDS ||
 599             vlanmc->priority > RTL8366S_PRIORITYMAX ||
 600             vlanmc->member > RTL8366S_PORT_ALL ||
 601             vlanmc->untag > RTL8366S_PORT_ALL ||
 602             vlanmc->fid > RTL8366S_FIDMAX)
 603                 return -EINVAL;
 604
 605         vlanmc_priv.vid = vlanmc->vid;
 606         vlanmc_priv.priority = vlanmc->priority;
 607         vlanmc_priv.untag = vlanmc->untag;
 608         vlanmc_priv.member = vlanmc->member;
 609         vlanmc_priv.fid = vlanmc->fid;
 610
 611         addr = RTL8366S_VLAN_MEMCONF_BASE + (index << 1);
 612
 613         tableaddr = (u16 *)&vlanmc_priv;
 614         data = *tableaddr;
 615
 616         err = rtl8366_smi_write_reg(smi, addr, data);
 617         if (err)
 618                 return err;
 619
 620         addr = RTL8366S_VLAN_MEMCONF_BASE + 1 + (index << 1);
 621
 622         tableaddr++;
 623         data = *tableaddr;
 624
 625         err = rtl8366_smi_write_reg(smi, addr, data);
 626         if (err)
 627                 return err;
 628
 629         return 0;
 630 }
 631
 632 static int rtl8366s_get_mc_index(struct rtl8366_smi *smi, int port, int *val)
 633 {
 634         u32 data;
 635         int err;
 636
 637         if (port >= RTL8366S_NUM_PORTS)
 638                 return -EINVAL;
 639
 640         err = rtl8366_smi_read_reg(smi, RTL8366S_PORT_VLAN_CTRL_REG(port),
 641                                    &data);
 642         if (err)
 643                 return err;
 644
 645         *val = (data >> RTL8366S_PORT_VLAN_CTRL_SHIFT(port)) &
 646                RTL8366S_PORT_VLAN_CTRL_MASK;
 647
 648         return 0;
 649 }
 650
 651 static int rtl8366s_set_mc_index(struct rtl8366_smi *smi, int port, int index)
 652 {
 653         if (port >= RTL8366S_NUM_PORTS || index >= RTL8366S_NUM_VLANS)
 654                 return -EINVAL;
 655
 656         return rtl8366_smi_rmwr(smi, RTL8366S_PORT_VLAN_CTRL_REG(port),
 657                                 RTL8366S_PORT_VLAN_CTRL_MASK <<
 658                                         RTL8366S_PORT_VLAN_CTRL_SHIFT(port),
 659                                 (index & RTL8366S_PORT_VLAN_CTRL_MASK) <<
 660                                         RTL8366S_PORT_VLAN_CTRL_SHIFT(port));
 661 }
 662
 663 static int rtl8366s_vlan_set_vlan(struct rtl8366_smi *smi, int enable)
 664 {
 665         return rtl8366_smi_rmwr(smi, RTL8366S_CHIP_GLOBAL_CTRL_REG,
 666                                 RTL8366S_CHIP_CTRL_VLAN,
 667                                 (enable) ? RTL8366S_CHIP_CTRL_VLAN : 0);
 668 }
 669
 670 static int rtl8366s_vlan_set_4ktable(struct rtl8366_smi *smi, int enable)
 671 {
 672         return rtl8366_smi_rmwr(smi, RTL8366S_VLAN_TB_CTRL_REG,
 673                                 1, (enable) ? 1 : 0);
 674 }
 675
 676 #ifdef CONFIG_RTL8366S_PHY_DEBUG_FS
 677 static int rtl8366s_debugfs_open(struct inode *inode, struct file *file)
 678 {
 679         file->private_data = inode->i_private;
 680         return 0;
 681 }
 682
 683 static ssize_t rtl8366s_read_debugfs_mibs(struct file *file,
 684                                           char __user *user_buf,
 685                                           size_t count, loff_t *ppos)
 686 {
 687         struct rtl8366s *rtl = (struct rtl8366s *)file->private_data;
 688         struct rtl8366_smi *smi = &rtl->smi;
 689         int i, j, len = 0;
 690         char *buf = smi->buf;
 691
 692         len += snprintf(buf + len, sizeof(smi->buf) - len,
 693                         "%-36s %12s %12s %12s %12s %12s %12s\n",
 694                         "Counter",
 695                         "Port 0", "Port 1", "Port 2",
 696                         "Port 3", "Port 4", "Port 5");
 697
 698         for (i = 0; i < ARRAY_SIZE(rtl8366s_mib_counters); ++i) {
 699                 len += snprintf(buf + len, sizeof(smi->buf) - len, "%-36s ",
 700                                 rtl8366s_mib_counters[i].name);
 701                 for (j = 0; j < RTL8366S_NUM_PORTS; ++j) {
 702                         unsigned long long counter = 0;
 703
 704                         if (!rtl8366_get_mib_counter(smi, i, j, &counter))
 705                                 len += snprintf(buf + len,
 706                                                 sizeof(smi->buf) - len,
 707                                                 "%12llu ", counter);
 708                         else
 709                                 len += snprintf(buf + len,
 710                                                 sizeof(smi->buf) - len,
 711                                                 "%12s ", "error");
 712                 }
 713                 len += snprintf(buf + len, sizeof(smi->buf) - len, "\n");
 714         }
 715
 716         return simple_read_from_buffer(user_buf, count, ppos, buf, len);
 717 }
 718
 719 static ssize_t rtl8366s_read_debugfs_vlan_mc(struct file *file,
 720                                              char __user *user_buf,
 721                                              size_t count, loff_t *ppos)
 722 {
 723         struct rtl8366s *rtl = (struct rtl8366s *)file->private_data;
 724         struct rtl8366_smi *smi = &rtl->smi;
 725         int i, len = 0;
 726         char *buf = smi->buf;
 727
 728         len += snprintf(buf + len, sizeof(smi->buf) - len,
 729                         "%2s %6s %4s %6s %6s %3s\n",
 730                         "id", "vid","prio", "member", "untag", "fid");
 731
 732         for (i = 0; i < RTL8366S_NUM_VLANS; ++i) {
 733                 struct rtl8366_vlan_mc vlanmc;
 734
 735                 rtl8366s_get_vlan_mc(smi, i, &vlanmc);
 736
 737                 len += snprintf(buf + len, sizeof(smi->buf) - len,
 738                                 "%2d %6d %4d 0x%04x 0x%04x %3d\n",
 739                                 i, vlanmc.vid, vlanmc.priority,
 740                                 vlanmc.member, vlanmc.untag, vlanmc.fid);
 741         }
 742
 743         return simple_read_from_buffer(user_buf, count, ppos, buf, len);
 744 }
 745
 746 static ssize_t rtl8366s_read_debugfs_reg(struct file *file,
 747                                          char __user *user_buf,
 748                                          size_t count, loff_t *ppos)
 749 {
 750         struct rtl8366s *rtl = (struct rtl8366s *)file->private_data;
 751         struct rtl8366_smi *smi = &rtl->smi;
 752         u32 t, reg = g_dbg_reg;
 753         int err, len = 0;
 754         char *buf = smi->buf;
 755
 756         memset(buf, '\0', sizeof(smi->buf));
 757
 758         err = rtl8366_smi_read_reg(smi, reg, &t);
 759         if (err) {
 760                 len += snprintf(buf, sizeof(smi->buf),
 761                                 "Read failed (reg: 0x%04x)\n", reg);
 762                 return simple_read_from_buffer(user_buf, count, ppos, buf, len);
 763         }
 764
 765         len += snprintf(buf, sizeof(smi->buf), "reg = 0x%04x, val = 0x%04x\n",
 766                         reg, t);
 767
 768         return simple_read_from_buffer(user_buf, count, ppos, buf, len);
 769 }
 770
 771 static ssize_t rtl8366s_write_debugfs_reg(struct file *file,
 772                                           const char __user *user_buf,
 773                                           size_t count, loff_t *ppos)
 774 {
 775         struct rtl8366s *rtl = (struct rtl8366s *)file->private_data;
 776         struct rtl8366_smi *smi = &rtl->smi;
 777         unsigned long data;
 778         u32 reg = g_dbg_reg;
 779         int err;
 780         size_t len;
 781         char *buf = smi->buf;
 782
 783         len = min(count, sizeof(smi->buf) - 1);
 784         if (copy_from_user(buf, user_buf, len)) {
 785                 dev_err(rtl->parent, "copy from user failed\n");
 786                 return -EFAULT;
 787         }
 788
 789         buf[len] = '\0';
 790         if (len > 0 && buf[len - 1] == '\n')
 791                 buf[len - 1] = '\0';
 792
 793
 794         if (strict_strtoul(buf, 16, &data)) {
 795                 dev_err(rtl->parent, "Invalid reg value %s\n", buf);
 796         } else {
 797                 err = rtl8366_smi_write_reg(smi, reg, data);
 798                 if (err) {
 799                         dev_err(rtl->parent,
 800                                 "writing reg 0x%04x val 0x%04lx failed\n",
 801                                 reg, data);
 802                 }
 803         }
 804
 805         return count;
 806 }
 807
 808 static const struct file_operations fops_rtl8366s_regs = {
 809         .read = rtl8366s_read_debugfs_reg,
 810         .write = rtl8366s_write_debugfs_reg,
 811         .open = rtl8366s_debugfs_open,
 812         .owner = THIS_MODULE
 813 };
 814
 815 static const struct file_operations fops_rtl8366s_vlan_mc = {
 816         .read = rtl8366s_read_debugfs_vlan_mc,
 817         .open = rtl8366s_debugfs_open,
 818         .owner = THIS_MODULE
 819 };
 820
 821 static const struct file_operations fops_rtl8366s_mibs = {
 822         .read = rtl8366s_read_debugfs_mibs,
 823         .open = rtl8366s_debugfs_open,
 824         .owner = THIS_MODULE
 825 };
 826
 827 static void rtl8366s_debugfs_init(struct rtl8366s *rtl)
 828 {
 829         struct dentry *node;
 830         struct dentry *root;
 831
 832         if (!rtl->debugfs_root)
 833                 rtl->debugfs_root = debugfs_create_dir("rtl8366s", NULL);
 834
 835         if (!rtl->debugfs_root) {
 836                 dev_err(rtl->parent, "Unable to create debugfs dir\n");
 837                 return;
 838         }
 839         root = rtl->debugfs_root;
 840
 841         node = debugfs_create_x16("reg", S_IRUGO | S_IWUSR, root, &g_dbg_reg);
 842         if (!node) {
 843                 dev_err(rtl->parent, "Creating debugfs file '%s' failed\n",
 844                         "reg");
 845                 return;
 846         }
 847
 848         node = debugfs_create_file("val", S_IRUGO | S_IWUSR, root, rtl,
 849                                    &fops_rtl8366s_regs);
 850         if (!node) {
 851                 dev_err(rtl->parent, "Creating debugfs file '%s' failed\n",
 852                         "val");
 853                 return;
 854         }
 855
 856         node = debugfs_create_file("vlan_mc", S_IRUSR, root, rtl,
 857                                    &fops_rtl8366s_vlan_mc);
 858         if (!node) {
 859                 dev_err(rtl->parent, "Creating debugfs file '%s' failed\n",
 860                         "vlan_mc");
 861                 return;
 862         }
 863
 864         node = debugfs_create_file("mibs", S_IRUSR, root, rtl,
 865                                    &fops_rtl8366s_mibs);
 866         if (!node) {
 867                 dev_err(rtl->parent, "Creating debugfs file '%s' failed\n",
 868                         "mibs");
 869                 return;
 870         }
 871 }
 872
 873 static void rtl8366s_debugfs_remove(struct rtl8366s *rtl)
 874 {
 875         if (rtl->debugfs_root) {
 876                 debugfs_remove_recursive(rtl->debugfs_root);
 877                 rtl->debugfs_root = NULL;
 878         }
 879 }
 880
 881 #else
 882 static inline void rtl8366s_debugfs_init(struct rtl8366s *rtl) {}
 883 static inline void rtl8366s_debugfs_remove(struct rtl8366s *rtl) {}
 884 #endif /* CONFIG_RTL8366S_PHY_DEBUG_FS */
 885
 886 static int rtl8366s_sw_reset_mibs(struct switch_dev *dev,
 887                                   const struct switch_attr *attr,
 888                                   struct switch_val *val)
 889 {
 890         struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
 891         int err = 0;
 892
 893         if (val->value.i == 1)
 894                 err = rtl8366_smi_rmwr(smi, RTL8366S_MIB_CTRL_REG, 0, (1 << 2));
 895
 896         return err;
 897 }
 898
 899 static int rtl8366s_sw_get_vlan_enable(struct switch_dev *dev,
 900                                        const struct switch_attr *attr,
 901                                        struct switch_val *val)
 902 {
 903         struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
 904         u32 data;
 905
 906         if (attr->ofs == 1) {
 907                 rtl8366_smi_read_reg(smi, RTL8366S_CHIP_GLOBAL_CTRL_REG, &data);
 908
 909                 if (data & RTL8366S_CHIP_CTRL_VLAN)
 910                         val->value.i = 1;
 911                 else
 912                         val->value.i = 0;
 913         } else if (attr->ofs == 2) {
 914                 rtl8366_smi_read_reg(smi, RTL8366S_VLAN_TB_CTRL_REG, &data);
 915
 916                 if (data & 0x0001)
 917                         val->value.i = 1;
 918                 else
 919                         val->value.i = 0;
 920         }
 921
 922         return 0;
 923 }
 924
 925 static int rtl8366s_sw_get_blinkrate(struct switch_dev *dev,
 926                                      const struct switch_attr *attr,
 927                                      struct switch_val *val)
 928 {
 929         struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
 930         u32 data;
 931
 932         rtl8366_smi_read_reg(smi, RTL8366S_LED_BLINKRATE_REG, &data);
 933
 934         val->value.i = (data & (RTL8366S_LED_BLINKRATE_MASK));
 935
 936         return 0;
 937 }
 938
 939 static int rtl8366s_sw_set_blinkrate(struct switch_dev *dev,
 940                                     const struct switch_attr *attr,
 941                                     struct switch_val *val)
 942 {
 943         struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
 944
 945         if (val->value.i >= 6)
 946                 return -EINVAL;
 947
 948         return rtl8366_smi_rmwr(smi, RTL8366S_LED_BLINKRATE_REG,
 949                                 RTL8366S_LED_BLINKRATE_MASK,
 950                                 val->value.i);
 951 }
 952
 953 static int rtl8366s_sw_set_vlan_enable(struct switch_dev *dev,
 954                                        const struct switch_attr *attr,
 955                                        struct switch_val *val)
 956 {
 957         struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
 958
 959         if (attr->ofs == 1)
 960                 return rtl8366s_vlan_set_vlan(smi, val->value.i);
 961         else
 962                 return rtl8366s_vlan_set_4ktable(smi, val->value.i);
 963 }
 964
 965 static const char *rtl8366s_speed_str(unsigned speed)
 966 {
 967         switch (speed) {
 968         case 0:
 969                 return "10baseT";
 970         case 1:
 971                 return "100baseT";
 972         case 2:
 973                 return "1000baseT";
 974         }
 975
 976         return "unknown";
 977 }
 978
 979 static int rtl8366s_sw_get_port_link(struct switch_dev *dev,
 980                                      const struct switch_attr *attr,
 981                                      struct switch_val *val)
 982 {
 983         struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
 984         u32 len = 0, data = 0;
 985
 986         if (val->port_vlan >= RTL8366S_NUM_PORTS)
 987                 return -EINVAL;
 988
 989         memset(smi->buf, '\0', sizeof(smi->buf));
 990         rtl8366_smi_read_reg(smi, RTL8366S_PORT_LINK_STATUS_BASE +
 991                              (val->port_vlan / 2), &data);
 992
 993         if (val->port_vlan % 2)
 994                 data = data >> 8;
 995
 996         if (data & RTL8366S_PORT_STATUS_LINK_MASK) {
 997                 len = snprintf(smi->buf, sizeof(smi->buf),
 998                                 "port:%d link:up speed:%s %s-duplex %s%s%s",
 999                                 val->port_vlan,
1000                                 rtl8366s_speed_str(data &
1001                                           RTL8366S_PORT_STATUS_SPEED_MASK),
1002                                 (data & RTL8366S_PORT_STATUS_DUPLEX_MASK) ?
1003                                         "full" : "half",
1004                                 (data & RTL8366S_PORT_STATUS_TXPAUSE_MASK) ?
1005                                         "tx-pause ": "",
1006                                 (data & RTL8366S_PORT_STATUS_RXPAUSE_MASK) ?
1007                                         "rx-pause " : "",
1008                                 (data & RTL8366S_PORT_STATUS_AN_MASK) ?
1009                                         "nway ": "");
1010         } else {
1011                 len = snprintf(smi->buf, sizeof(smi->buf), "port:%d link: down",
1012                                 val->port_vlan);
1013         }
1014
1015         val->value.s = smi->buf;
1016         val->len = len;
1017
1018         return 0;
1019 }
1020
1021 static int rtl8366s_sw_get_vlan_info(struct switch_dev *dev,
1022                                      const struct switch_attr *attr,
1023                                      struct switch_val *val)
1024 {
1025         int i;
1026         u32 len = 0;
1027         struct rtl8366_vlan_4k vlan4k;
1028         struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
1029         char *buf = smi->buf;
1030         int err;
1031
1032         if (val->port_vlan == 0 || val->port_vlan >= RTL8366S_NUM_VLANS)
1033                 return -EINVAL;
1034
1035         memset(buf, '\0', sizeof(smi->buf));
1036
1037         err = rtl8366s_get_vlan_4k(smi, val->port_vlan, &vlan4k);
1038         if (err)
1039                 return err;
1040
1041         len += snprintf(buf + len, sizeof(smi->buf) - len,
1042                         "VLAN %d: Ports: '", vlan4k.vid);
1043
1044         for (i = 0; i < RTL8366S_NUM_PORTS; i++) {
1045                 if (!(vlan4k.member & (1 << i)))
1046                         continue;
1047
1048                 len += snprintf(buf + len, sizeof(smi->buf) - len, "%d%s", i,
1049                                 (vlan4k.untag & (1 << i)) ? "" : "t");
1050         }
1051
1052         len += snprintf(buf + len, sizeof(smi->buf) - len,
1053                         "', members=%04x, untag=%04x, fid=%u",
1054                         vlan4k.member, vlan4k.untag, vlan4k.fid);
1055
1056         val->value.s = buf;
1057         val->len = len;
1058
1059         return 0;
1060 }
1061
1062 static int rtl8366s_sw_set_port_led(struct switch_dev *dev,
1063                                     const struct switch_attr *attr,
1064                                     struct switch_val *val)
1065 {
1066         struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
1067         u32 data;
1068         u32 mask;
1069         u32 reg;
1070
1071         if (val->port_vlan >= RTL8366S_NUM_PORTS ||
1072             (1 << val->port_vlan) == RTL8366S_PORT_UNKNOWN)
1073                 return -EINVAL;
1074
1075         if (val->port_vlan == RTL8366S_PORT_NUM_CPU) {
1076                 reg = RTL8366S_LED_BLINKRATE_REG;
1077                 mask = 0xF << 4;
1078                 data = val->value.i << 4;
1079         } else {
1080                 reg = RTL8366S_LED_CTRL_REG;
1081                 mask = 0xF << (val->port_vlan * 4),
1082                 data = val->value.i << (val->port_vlan * 4);
1083         }
1084
1085         return rtl8366_smi_rmwr(smi, RTL8366S_LED_BLINKRATE_REG, mask, data);
1086 }
1087
1088 static int rtl8366s_sw_get_port_led(struct switch_dev *dev,
1089                                     const struct switch_attr *attr,
1090                                     struct switch_val *val)
1091 {
1092         struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
1093         u32 data = 0;
1094
1095         if (val->port_vlan >= RTL8366S_NUM_LEDGROUPS)
1096                 return -EINVAL;
1097
1098         rtl8366_smi_read_reg(smi, RTL8366S_LED_CTRL_REG, &data);
1099         val->value.i = (data >> (val->port_vlan * 4)) & 0x000F;
1100
1101         return 0;
1102 }
1103
1104 static int rtl8366s_sw_reset_port_mibs(struct switch_dev *dev,
1105                                        const struct switch_attr *attr,
1106                                        struct switch_val *val)
1107 {
1108         struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
1109
1110         if (val->port_vlan >= RTL8366S_NUM_PORTS)
1111                 return -EINVAL;
1112
1113
1114         return rtl8366_smi_rmwr(smi, RTL8366S_MIB_CTRL_REG,
1115                                 0, (1 << (val->port_vlan + 3)));
1116 }
1117
1118 static int rtl8366s_sw_get_port_mib(struct switch_dev *dev,
1119                                     const struct switch_attr *attr,
1120                                     struct switch_val *val)
1121 {
1122         struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
1123         int i, len = 0;
1124         unsigned long long counter = 0;
1125         char *buf = smi->buf;
1126
1127         if (val->port_vlan >= RTL8366S_NUM_PORTS)
1128                 return -EINVAL;
1129
1130         len += snprintf(buf + len, sizeof(smi->buf) - len,
1131                         "Port %d MIB counters\n",
1132                         val->port_vlan);
1133
1134         for (i = 0; i < ARRAY_SIZE(rtl8366s_mib_counters); ++i) {
1135                 len += snprintf(buf + len, sizeof(smi->buf) - len,
1136                                 "%-36s: ", rtl8366s_mib_counters[i].name);
1137                 if (!rtl8366_get_mib_counter(smi, i, val->port_vlan, &counter))
1138                         len += snprintf(buf + len, sizeof(smi->buf) - len,
1139                                         "%llu\n", counter);
1140                 else
1141                         len += snprintf(buf + len, sizeof(smi->buf) - len,
1142                                         "%s\n", "error");
1143         }
1144
1145         val->value.s = buf;
1146         val->len = len;
1147         return 0;
1148 }
1149
1150 static int rtl8366s_sw_get_vlan_ports(struct switch_dev *dev,
1151                                       struct switch_val *val)
1152 {
1153         struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
1154         struct switch_port *port;
1155         struct rtl8366_vlan_4k vlan4k;
1156         int i;
1157
1158         if (val->port_vlan == 0 || val->port_vlan >= RTL8366S_NUM_VLANS)
1159                 return -EINVAL;
1160
1161         rtl8366s_get_vlan_4k(smi, val->port_vlan, &vlan4k);
1162
1163         port = &val->value.ports[0];
1164         val->len = 0;
1165         for (i = 0; i < RTL8366S_NUM_PORTS; i++) {
1166                 if (!(vlan4k.member & BIT(i)))
1167                         continue;
1168
1169                 port->id = i;
1170                 port->flags = (vlan4k.untag & BIT(i)) ?
1171                                         0 : BIT(SWITCH_PORT_FLAG_TAGGED);
1172                 val->len++;
1173                 port++;
1174         }
1175         return 0;
1176 }
1177
1178 static int rtl8366s_sw_set_vlan_ports(struct switch_dev *dev,
1179                                       struct switch_val *val)
1180 {
1181         struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
1182         struct switch_port *port;
1183         u32 member = 0;
1184         u32 untag = 0;
1185         int i;
1186
1187         if (val->port_vlan == 0 || val->port_vlan >= RTL8366S_NUM_VLANS)
1188                 return -EINVAL;
1189
1190         port = &val->value.ports[0];
1191         for (i = 0; i < val->len; i++, port++) {
1192                 member |= BIT(port->id);
1193
1194                 if (!(port->flags & BIT(SWITCH_PORT_FLAG_TAGGED)))
1195                         untag |= BIT(port->id);
1196         }
1197
1198         return rtl8366_set_vlan(smi, val->port_vlan, member, untag, 0);
1199 }
1200
1201 static int rtl8366s_sw_get_port_pvid(struct switch_dev *dev, int port, int *val)
1202 {
1203         struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
1204         return rtl8366_get_pvid(smi, port, val);
1205 }
1206
1207 static int rtl8366s_sw_set_port_pvid(struct switch_dev *dev, int port, int val)
1208 {
1209         struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
1210         return rtl8366_set_pvid(smi, port, val);
1211 }
1212
1213 static int rtl8366s_sw_reset_switch(struct switch_dev *dev)
1214 {
1215         struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
1216         int err;
1217
1218         err = rtl8366s_reset_chip(smi);
1219         if (err)
1220                 return err;
1221
1222         err = rtl8366s_hw_init(smi);
1223         if (err)
1224                 return err;
1225
1226         return rtl8366_reset_vlan(smi);
1227 }
1228
1229 static struct switch_attr rtl8366s_globals[] = {
1230         {
1231                 .type = SWITCH_TYPE_INT,
1232                 .name = "enable_vlan",
1233                 .description = "Enable VLAN mode",
1234                 .set = rtl8366s_sw_set_vlan_enable,
1235                 .get = rtl8366s_sw_get_vlan_enable,
1236                 .max = 1,
1237                 .ofs = 1
1238         }, {
1239                 .type = SWITCH_TYPE_INT,
1240                 .name = "enable_vlan4k",
1241                 .description = "Enable VLAN 4K mode",
1242                 .set = rtl8366s_sw_set_vlan_enable,
1243                 .get = rtl8366s_sw_get_vlan_enable,
1244                 .max = 1,
1245                 .ofs = 2
1246         }, {
1247                 .type = SWITCH_TYPE_INT,
1248                 .name = "reset_mibs",
1249                 .description = "Reset all MIB counters",
1250                 .set = rtl8366s_sw_reset_mibs,
1251                 .get = NULL,
1252                 .max = 1
1253         }, {
1254                 .type = SWITCH_TYPE_INT,
1255                 .name = "blinkrate",
1256                 .description = "Get/Set LED blinking rate (0 = 43ms, 1 = 84ms,"
1257                 " 2 = 120ms, 3 = 170ms, 4 = 340ms, 5 = 670ms)",
1258                 .set = rtl8366s_sw_set_blinkrate,
1259                 .get = rtl8366s_sw_get_blinkrate,
1260                 .max = 5
1261         },
1262 };
1263
1264 static struct switch_attr rtl8366s_port[] = {
1265         {
1266                 .type = SWITCH_TYPE_STRING,
1267                 .name = "link",
1268                 .description = "Get port link information",
1269                 .max = 1,
1270                 .set = NULL,
1271                 .get = rtl8366s_sw_get_port_link,
1272         }, {
1273                 .type = SWITCH_TYPE_INT,
1274                 .name = "reset_mib",
1275                 .description = "Reset single port MIB counters",
1276                 .max = 1,
1277                 .set = rtl8366s_sw_reset_port_mibs,
1278                 .get = NULL,
1279         }, {
1280                 .type = SWITCH_TYPE_STRING,
1281                 .name = "mib",
1282                 .description = "Get MIB counters for port",
1283                 .max = 33,
1284                 .set = NULL,
1285                 .get = rtl8366s_sw_get_port_mib,
1286         }, {
1287                 .type = SWITCH_TYPE_INT,
1288                 .name = "led",
1289                 .description = "Get/Set port group (0 - 3) led mode (0 - 15)",
1290                 .max = 15,
1291                 .set = rtl8366s_sw_set_port_led,
1292                 .get = rtl8366s_sw_get_port_led,
1293         },
1294 };
1295
1296 static struct switch_attr rtl8366s_vlan[] = {
1297         {
1298                 .type = SWITCH_TYPE_STRING,
1299                 .name = "info",
1300                 .description = "Get vlan information",
1301                 .max = 1,
1302                 .set = NULL,
1303                 .get = rtl8366s_sw_get_vlan_info,
1304         },
1305 };
1306
1307 /* template */
1308 static struct switch_dev rtl8366_switch_dev = {
1309         .name = "RTL8366S",
1310         .cpu_port = RTL8366S_PORT_NUM_CPU,
1311         .ports = RTL8366S_NUM_PORTS,
1312         .vlans = RTL8366S_NUM_VLANS,
1313         .attr_global = {
1314                 .attr = rtl8366s_globals,
1315                 .n_attr = ARRAY_SIZE(rtl8366s_globals),
1316         },
1317         .attr_port = {
1318                 .attr = rtl8366s_port,
1319                 .n_attr = ARRAY_SIZE(rtl8366s_port),
1320         },
1321         .attr_vlan = {
1322                 .attr = rtl8366s_vlan,
1323                 .n_attr = ARRAY_SIZE(rtl8366s_vlan),
1324         },
1325
1326         .get_vlan_ports = rtl8366s_sw_get_vlan_ports,
1327         .set_vlan_ports = rtl8366s_sw_set_vlan_ports,
1328         .get_port_pvid = rtl8366s_sw_get_port_pvid,
1329         .set_port_pvid = rtl8366s_sw_set_port_pvid,
1330         .reset_switch = rtl8366s_sw_reset_switch,
1331 };
1332
1333 static int rtl8366s_switch_init(struct rtl8366s *rtl)
1334 {
1335         struct switch_dev *dev = &rtl->dev;
1336         int err;
1337
1338         memcpy(dev, &rtl8366_switch_dev, sizeof(struct switch_dev));
1339         dev->priv = rtl;
1340         dev->devname = dev_name(rtl->parent);
1341
1342         err = register_switch(dev, NULL);
1343         if (err)
1344                 dev_err(rtl->parent, "switch registration failed\n");
1345
1346         return err;
1347 }
1348
1349 static void rtl8366s_switch_cleanup(struct rtl8366s *rtl)
1350 {
1351         unregister_switch(&rtl->dev);
1352 }
1353
1354 static int rtl8366s_mii_read(struct mii_bus *bus, int addr, int reg)
1355 {
1356         struct rtl8366_smi *smi = bus->priv;
1357         u32 val = 0;
1358         int err;
1359
1360         err = rtl8366s_read_phy_reg(smi, addr, 0, reg, &val);
1361         if (err)
1362                 return 0xffff;
1363
1364         return val;
1365 }
1366
1367 static int rtl8366s_mii_write(struct mii_bus *bus, int addr, int reg, u16 val)
1368 {
1369         struct rtl8366_smi *smi = bus->priv;
1370         u32 t;
1371         int err;
1372
1373         err = rtl8366s_write_phy_reg(smi, addr, 0, reg, val);
1374         /* flush write */
1375         (void) rtl8366s_read_phy_reg(smi, addr, 0, reg, &t);
1376
1377         return err;
1378 }
1379
1380 static int rtl8366s_mii_bus_match(struct mii_bus *bus)
1381 {
1382         return (bus->read == rtl8366s_mii_read &&
1383                 bus->write == rtl8366s_mii_write);
1384 }
1385
1386 static int rtl8366s_setup(struct rtl8366s *rtl)
1387 {
1388         struct rtl8366_smi *smi = &rtl->smi;
1389         int ret;
1390
1391         rtl8366s_debugfs_init(rtl);
1392
1393         ret = rtl8366s_reset_chip(smi);
1394         if (ret)
1395                 return ret;
1396
1397         ret = rtl8366s_hw_init(smi);
1398         return ret;
1399 }
1400
1401 static int rtl8366s_detect(struct rtl8366_smi *smi)
1402 {
1403         u32 chip_id = 0;
1404         u32 chip_ver = 0;
1405         int ret;
1406
1407         ret = rtl8366_smi_read_reg(smi, RTL8366S_CHIP_ID_REG, &chip_id);
1408         if (ret) {
1409                 dev_err(smi->parent, "unable to read chip id\n");
1410                 return ret;
1411         }
1412
1413         switch (chip_id) {
1414         case RTL8366S_CHIP_ID_8366:
1415                 break;
1416         default:
1417                 dev_err(smi->parent, "unknown chip id (%04x)\n", chip_id);
1418                 return -ENODEV;
1419         }
1420
1421         ret = rtl8366_smi_read_reg(smi, RTL8366S_CHIP_VERSION_CTRL_REG,
1422                                    &chip_ver);
1423         if (ret) {
1424                 dev_err(smi->parent, "unable to read chip version\n");
1425                 return ret;
1426         }
1427
1428         dev_info(smi->parent, "RTL%04x ver. %u chip found\n",
1429                  chip_id, chip_ver & RTL8366S_CHIP_VERSION_MASK);
1430
1431         return 0;
1432 }
1433
1434 static struct rtl8366_smi_ops rtl8366s_smi_ops = {
1435         .detect         = rtl8366s_detect,
1436         .mii_read       = rtl8366s_mii_read,
1437         .mii_write      = rtl8366s_mii_write,
1438
1439         .get_vlan_mc    = rtl8366s_get_vlan_mc,
1440         .set_vlan_mc    = rtl8366s_set_vlan_mc,
1441         .get_vlan_4k    = rtl8366s_get_vlan_4k,
1442         .set_vlan_4k    = rtl8366s_set_vlan_4k,
1443         .get_mc_index   = rtl8366s_get_mc_index,
1444         .set_mc_index   = rtl8366s_set_mc_index,
1445 };
1446
1447 static int __init rtl8366s_probe(struct platform_device *pdev)
1448 {
1449         static int rtl8366_smi_version_printed;
1450         struct rtl8366s_platform_data *pdata;
1451         struct rtl8366s *rtl;
1452         struct rtl8366_smi *smi;
1453         int err;
1454
1455         if (!rtl8366_smi_version_printed++)
1456                 printk(KERN_NOTICE RTL8366S_DRIVER_DESC
1457                        " version " RTL8366S_DRIVER_VER"\n");
1458
1459         pdata = pdev->dev.platform_data;
1460         if (!pdata) {
1461                 dev_err(&pdev->dev, "no platform data specified\n");
1462                 err = -EINVAL;
1463                 goto err_out;
1464         }
1465
1466         rtl = kzalloc(sizeof(*rtl), GFP_KERNEL);
1467         if (!rtl) {
1468                 dev_err(&pdev->dev, "no memory for private data\n");
1469                 err = -ENOMEM;
1470                 goto err_out;
1471         }
1472
1473         rtl->parent = &pdev->dev;
1474
1475         smi = &rtl->smi;
1476         smi->parent = &pdev->dev;
1477         smi->gpio_sda = pdata->gpio_sda;
1478         smi->gpio_sck = pdata->gpio_sck;
1479         smi->ops = &rtl8366s_smi_ops;
1480         smi->cpu_port = RTL8366S_PORT_NUM_CPU;
1481         smi->num_ports = RTL8366S_NUM_PORTS;
1482         smi->num_vlan_mc = RTL8366S_NUM_VLANS;
1483
1484         err = rtl8366_smi_init(smi);
1485         if (err)
1486                 goto err_free_rtl;
1487
1488         platform_set_drvdata(pdev, rtl);
1489
1490         err = rtl8366s_setup(rtl);
1491         if (err)
1492                 goto err_clear_drvdata;
1493
1494         err = rtl8366s_switch_init(rtl);
1495         if (err)
1496                 goto err_clear_drvdata;
1497
1498         return 0;
1499
1500  err_clear_drvdata:
1501         platform_set_drvdata(pdev, NULL);
1502         rtl8366_smi_cleanup(smi);
1503  err_free_rtl:
1504         kfree(rtl);
1505  err_out:
1506         return err;
1507 }
1508
1509 static int rtl8366s_phy_config_init(struct phy_device *phydev)
1510 {
1511         if (!rtl8366s_mii_bus_match(phydev->bus))
1512                 return -EINVAL;
1513
1514         return 0;
1515 }
1516
1517 static int rtl8366s_phy_config_aneg(struct phy_device *phydev)
1518 {
1519         return 0;
1520 }
1521
1522 static struct phy_driver rtl8366s_phy_driver = {
1523         .phy_id         = 0x001cc960,
1524         .name           = "Realtek RTL8366S",
1525         .phy_id_mask    = 0x1ffffff0,
1526         .features       = PHY_GBIT_FEATURES,
1527         .config_aneg    = rtl8366s_phy_config_aneg,
1528         .config_init    = rtl8366s_phy_config_init,
1529         .read_status    = genphy_read_status,
1530         .driver         = {
1531                 .owner = THIS_MODULE,
1532         },
1533 };
1534
1535 static int __devexit rtl8366s_remove(struct platform_device *pdev)
1536 {
1537         struct rtl8366s *rtl = platform_get_drvdata(pdev);
1538
1539         if (rtl) {
1540                 rtl8366s_switch_cleanup(rtl);
1541                 rtl8366s_debugfs_remove(rtl);
1542                 platform_set_drvdata(pdev, NULL);
1543                 rtl8366_smi_cleanup(&rtl->smi);
1544                 kfree(rtl);
1545         }
1546
1547         return 0;
1548 }
1549
1550 static struct platform_driver rtl8366s_driver = {
1551         .driver = {
1552                 .name           = RTL8366S_DRIVER_NAME,
1553                 .owner          = THIS_MODULE,
1554         },
1555         .probe          = rtl8366s_probe,
1556         .remove         = __devexit_p(rtl8366s_remove),
1557 };
1558
1559 static int __init rtl8366s_module_init(void)
1560 {
1561         int ret;
1562         ret = platform_driver_register(&rtl8366s_driver);
1563         if (ret)
1564                 return ret;
1565
1566         ret = phy_driver_register(&rtl8366s_phy_driver);
1567         if (ret)
1568                 goto err_platform_unregister;
1569
1570         return 0;
1571
1572  err_platform_unregister:
1573         platform_driver_unregister(&rtl8366s_driver);
1574         return ret;
1575 }
1576 module_init(rtl8366s_module_init);
1577
1578 static void __exit rtl8366s_module_exit(void)
1579 {
1580         phy_driver_unregister(&rtl8366s_phy_driver);
1581         platform_driver_unregister(&rtl8366s_driver);
1582 }
1583 module_exit(rtl8366s_module_exit);
1584
1585 MODULE_DESCRIPTION(RTL8366S_DRIVER_DESC);
1586 MODULE_VERSION(RTL8366S_DRIVER_VER);
1587 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
1588 MODULE_AUTHOR("Antti Seppälä <a.seppala@gmail.com>");
1589 MODULE_LICENSE("GPL v2");
1590 MODULE_ALIAS("platform:" RTL8366S_DRIVER_NAME);