2 * arch/m68k/coldfire/m547x/devices.c
4 * Coldfire M547x/M548x Platform Device Configuration
6 * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
8 * Kurt Mahan <kmahan@freescale.com>
10 #include <linux/module.h>
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/platform_device.h>
14 #include <linux/fsl_devices.h>
15 #include <linux/spi/spi.h>
16 #include <linux/i2c.h>
18 #include <asm/coldfire.h>
19 #include <asm/mcfsim.h>
23 #include <asm/mcfqspi.h>
30 /* number of supported SPI selects */
31 #define SPI_NUM_CHIPSELECTS 8
33 void coldfire_spi_cs_control(u8 cs, u8 command)
35 /* nothing special required */
38 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
39 static struct coldfire_spi_chip spidev_chip_info = {
44 static struct spi_board_info spi_board_info[] = {
45 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
48 .max_speed_hz = 16000000, /* max clk (SCK) speed in HZ */
50 .chip_select = 0, /* CS0 */
51 .controller_data = &spidev_chip_info,
56 static int spi_irq_list[] = {
57 /* IRQ, ICR Offset, ICR Val,Mask */
58 64 + ISC_DSPI_OVRFW, ISC_DSPI_OVRFW, 0x18, 0,
59 64 + ISC_DSPI_RFOF, ISC_DSPI_RFOF, 0x18, 0,
60 64 + ISC_DSPI_RFDF, ISC_DSPI_RFDF, 0x18, 0,
61 64 + ISC_DSPI_TFUF, ISC_DSPI_TFUF, 0x18, 0,
62 64 + ISC_DSPI_TCF, ISC_DSPI_TCF, 0x18, 0,
63 64 + ISC_DSPI_TFFF, ISC_DSPI_TFFF, 0x18, 0,
64 64 + ISC_DSPI_EOQF, ISC_DSPI_EOQF, 0x18, 0,
68 static struct coldfire_spi_master coldfire_master_info = {
70 .num_chipselect = SPI_NUM_CHIPSELECTS,
71 .irq_list = spi_irq_list,
72 .irq_source = 0, /* not used */
73 .irq_vector = 0, /* not used */
74 .irq_mask = 0, /* not used */
75 .irq_lp = 0, /* not used */
76 .par_val = 0, /* not used */
77 .cs_control = coldfire_spi_cs_control,
80 static struct resource coldfire_spi_resources[] = {
83 .start = MCF_MBAR + 0x00000a50, /* PAR_DSPI */
84 .end = MCF_MBAR + 0x00000a50, /* PAR_DSPI */
85 .flags = IORESOURCE_MEM
90 .start = MCF_MBAR + 0x00008a00, /* DSPI MCR Base */
91 .end = MCF_MBAR + 0x00008ab8, /* DSPI mem map end */
92 .flags = IORESOURCE_MEM
96 .name = "spi-int-level",
97 .start = MCF_MBAR + 0x740, /* ICR start */
98 .end = MCF_MBAR + 0x740 + ISC_DSPI_EOQF, /* ICR end */
99 .flags = IORESOURCE_MEM
103 .name = "spi-int-mask",
104 .start = MCF_MBAR + 0x70c, /* IMRL */
105 .end = MCF_MBAR + 0x70c, /* IMRL */
106 .flags = IORESOURCE_MEM
110 static struct platform_device coldfire_spi = {
111 .name = "spi_coldfire",
113 .resource = coldfire_spi_resources,
114 .num_resources = ARRAY_SIZE(coldfire_spi_resources),
116 .platform_data = &coldfire_master_info,
121 * m547x_8x_spi_init - Initialize SPI
123 static int __init m547x_8x_spi_init(void)
127 /* initialize the DSPI PAR */
128 MCF_GPIO_PAR_DSPI = (MCF_GPIO_PAR_DSPI_PAR_CS5 |
129 MCF_GPIO_PAR_DSPI_PAR_CS3_DSPICS |
130 MCF_GPIO_PAR_DSPI_PAR_CS2_DSPICS |
131 MCF_GPIO_PAR_DSPI_PAR_CS0_DSPICS |
132 MCF_GPIO_PAR_DSPI_PAR_SCK_SCK |
133 MCF_GPIO_PAR_DSPI_PAR_SIN_SIN |
134 MCF_GPIO_PAR_DSPI_PAR_SOUT_SOUT);
136 /* register device */
137 retval = platform_device_register(&coldfire_spi);
142 /* register board info */
143 if (ARRAY_SIZE(spi_board_info))
144 retval = spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
151 #ifdef CONFIG_I2C_BOARDINFO
152 static struct i2c_board_info mcf_i2c_devices[] = {
154 I2C_BOARD_INFO("rv5c387a", 0x32),
160 * m547x_8x_init_devices - Initialize M547X_8X devices
162 * Returns 0 on success.
164 static int __init m547x_8x_init_devices(void)
169 #ifdef CONFIG_I2C_BOARDINFO
170 i2c_register_board_info(0, mcf_i2c_devices,
171 ARRAY_SIZE(mcf_i2c_devices));
176 arch_initcall(m547x_8x_init_devices);