[cns3xxx]: clean up PCI bus topology
[openwrt.git] / target / linux / cns3xxx / patches-3.3 / 015-clkdev_support.patch
1 --- a/arch/arm/Kconfig
2 +++ b/arch/arm/Kconfig
3 @@ -368,6 +368,7 @@ config ARCH_CNS3XXX
4         select CPU_V6K
5         select GENERIC_CLOCKEVENTS
6         select ARM_GIC
7 +       select CLKDEV_LOOKUP
8         select MIGHT_HAVE_CACHE_L2X0
9         select MIGHT_HAVE_PCI
10         select PCI_DOMAINS if PCI
11 --- a/arch/arm/mach-cns3xxx/core.c
12 +++ b/arch/arm/mach-cns3xxx/core.c
13 @@ -9,8 +9,11 @@
14   */
15  
16  #include <linux/init.h>
17 +#include <linux/export.h>
18  #include <linux/interrupt.h>
19  #include <linux/clockchips.h>
20 +#include <linux/clk.h>
21 +#include <linux/clkdev.h>
22  #include <linux/io.h>
23  #include <asm/mach/map.h>
24  #include <asm/mach/time.h>
25 @@ -20,6 +23,10 @@
26  #include <mach/cns3xxx.h>
27  #include "core.h"
28  
29 +struct clk {
30 +       unsigned long   rate;
31 +};
32 +
33  static struct map_desc cns3xxx_io_desc[] __initdata = {
34         {
35                 .virtual        = CNS3XXX_TC11MP_TWD_BASE_VIRT,
36 @@ -277,3 +284,33 @@ void __init cns3xxx_l2x0_init(void)
37  }
38  
39  #endif /* CONFIG_CACHE_L2X0 */
40 +
41 +int clk_enable(struct clk *clk)
42 +{
43 +       return 0;
44 +}
45 +EXPORT_SYMBOL(clk_enable);
46 +
47 +void clk_disable(struct clk *clk)
48 +{
49 +}
50 +EXPORT_SYMBOL(clk_disable);
51 +
52 +unsigned long clk_get_rate(struct clk *clk)
53 +{
54 +       return clk->rate;
55 +}
56 +EXPORT_SYMBOL(clk_get_rate);
57 +
58 +static struct clk_lookup cns3xxx_clocks[] = {
59 +       {
60 +               /* TODO */
61 +       },
62 +};
63 +
64 +int __init cns3xxx_clocks_init(void)
65 +{
66 +       clkdev_add_table(cns3xxx_clocks, ARRAY_SIZE(cns3xxx_clocks));
67 +       return 0;
68 +}
69 +postcore_initcall(cns3xxx_clocks_init);