1 diff -urN linux-2.6.8.1/arch/mips/brcm-boards/bcm963xx/Kconfig linux-2.6.8.1-brcm63xx/arch/mips/brcm-boards/bcm963xx/Kconfig
2 --- linux-2.6.8.1/arch/mips/brcm-boards/bcm963xx/Kconfig 1970-01-01 01:00:00.000000000 +0100
3 +++ linux-2.6.8.1-brcm63xx/arch/mips/brcm-boards/bcm963xx/Kconfig 2006-06-26 09:07:08.000000000 +0200
5 +# Kernel and Driver configuration for Broadcom Commengine ADSL board
7 + prompt "Broadcom Commengine ADSL board"
11 + Select different Broadcom ADSL board
14 + bool "96338 ADSL board"
15 + select DMA_NONCOHERENT
18 + bool "96345 ADSL board"
19 + select DMA_NONCOHERENT
22 + bool "96348 ADSL board"
23 + select DMA_NONCOHERENT
28 + bool "Support for Broadcom Board"
29 + depends on BCM96338 || BCM96345 || BCM96348
32 + bool "Support for Serial Port"
33 + depends on BCM96338 || BCM96345 || BCM96348
36 + tristate "Support for Ethernet"
37 + depends on BCM96338 || BCM96345 || BCM96348
40 + tristate "Support for USB"
41 + depends on BCM96338 || BCM96345 || BCM96348
44 + tristate "Support for Wireless"
45 + depends on BCM96338 || BCM96345 || BCM96348
48 + bool "Support for PCI"
49 + depends on BCM96338 || BCM96345 || BCM96348
53 + tristate "Support for ATM"
54 + depends on BCM96338 || BCM96345 || BCM96348
57 + tristate "Support for ATM Diagnostic"
58 + depends on BCM96338 || BCM96345 || BCM96348
61 + tristate "Support for ADSL"
62 + depends on BCM96338 || BCM96345 || BCM96348
65 + tristate "Support for VOICE"
66 + depends on BCM96338 || BCM96345 || BCM96348
69 + tristate "Support for PROCFS"
70 + depends on BCM96338 || BCM96345 || BCM96348
73 + tristate "Support for VDSL"
74 + depends on BCM96338 || BCM96345 || BCM96348
77 + tristate "Support for SECURITY"
78 + depends on BCM96338 || BCM96345 || BCM96348
81 + tristate "Support for HPNA"
82 + depends on BCM96338 || BCM96345 || BCM96348
84 +config BCM_BOARD_IMPL
85 + int "Implementation index for ADSL Board"
86 + depends on BCM96338 || BCM96345 || BCM96348
88 +config BCM_SERIAL_IMPL
89 + int "Implementation index for Serial"
90 + depends on BCM96338 || BCM96345 || BCM96348
93 + int "Implementation index for Ethernet"
94 + depends on BCM96338 || BCM96345 || BCM96348
97 + int "Implementation index for USB"
98 + depends on BCM96338 || BCM96345 || BCM96348
100 +config BCM_WLAN_IMPL
101 + int "Implementation index for WIRELESS"
102 + depends on BCM96338 || BCM96345 || BCM96348
104 +config BCM_ATMAPI_IMPL
105 + int "Implementation index for ATM"
106 + depends on BCM96338 || BCM96345 || BCM96348
108 +config BCM_ATMTEST_IMPL
109 + int "Implementation index for ATM Diagnostic"
110 + depends on BCM96338 || BCM96345 || BCM96348
112 +config BCM_BLAA_IMPL
113 + int "Implementation index for BLAA"
114 + depends on BCM96338 || BCM96345 || BCM96348
116 +config BCM_ADSL_IMPL
117 + int "Implementation index for ADSL"
118 + depends on BCM96338 || BCM96345 || BCM96348
120 +config BCM_ENDPOINT_IMPL
121 + int "Implementation index for VOICE"
122 + depends on BCM96338 || BCM96345 || BCM96348
124 +config BCM_PROCFS_IMPL
125 + int "Implementation index for PROCFS"
126 + depends on BCM96338 || BCM96345 || BCM96348
128 +config BCM_VDSL_IMPL
129 + int "Implementation index for VDSL"
130 + depends on BCM96338 || BCM96345 || BCM96348
132 +config BCM_SECURITY_IMPL
133 + int "Implementation index for SECURITY"
134 + depends on BCM96338 || BCM96345 || BCM96348
136 +config BCM_HPNA_IMPL
137 + int "Implementation index for HPNA"
138 + depends on BCM96338 || BCM96345 || BCM96348
141 + prompt "Root File System"
142 + depends on MIPS_BRCM
143 + default ROOTFS_SQUASHFS
145 + Select root file system on the board flash.
147 +config ROOTFS_SQUASHFS
149 +config ROOTFS_CRAMFS
159 + string "flash partition"
160 + depends on ROOTFS_SQUASHFS || ROOTFS_CRAMFS || ROOTFS_JFFS2
161 + default "root=31:0 ro noinitrd" if ROOTFS_SQUASHFS = y || ROOTFS_CRAMFS = y
162 + default "root=31:2 ro noinitrd" if ROOTFS_JFFS2 = y
164 + This is the root file system partition on flash memory
167 + string "NFS server path"
168 + depends on ROOTFS_NFS
169 + default "/opt/bcm96338/targets/96338R/fs" if BCM96338 = y
170 + default "/opt/bcm96345/targets/96345R/fs" if BCM96345 = y
171 + default "/opt/bcm96348/targets/96348R/fs" if BCM96348 = y
173 + This is the path of NFS server (host system)
174 diff -urN linux-2.6.8.1/arch/mips/brcm-boards/bcm963xx/Makefile linux-2.6.8.1-brcm63xx/arch/mips/brcm-boards/bcm963xx/Makefile
175 --- linux-2.6.8.1/arch/mips/brcm-boards/bcm963xx/Makefile 1970-01-01 01:00:00.000000000 +0100
176 +++ linux-2.6.8.1-brcm63xx/arch/mips/brcm-boards/bcm963xx/Makefile 2006-06-26 09:07:08.000000000 +0200
179 +# Makefile for generic Broadcom MIPS boards
181 +# Copyright (C) 2004 Broadcom Corporation
183 +obj-y := irq.o prom.o setup.o time.o ser_init.o
185 +SRCBASE := $(TOPDIR)
186 +EXTRA_CFLAGS += -I$(INC_BRCMBOARDPARMS_PATH)/$(BRCM_BOARD) -I$(SRCBASE)/include -I$(INC_BRCMDRIVER_PUB_PATH)/$(BRCM_BOARD)
187 +#EXTRA_CFLAGS += -I$(INC_ADSLDRV_PATH) -DDBG
188 +EXTRA_CFLAGS += -I$(INC_ADSLDRV_PATH)
191 +ifeq "$(ADSL)" "ANNEX_B"
192 +EXTRA_CFLAGS += -DADSL_ANNEXB
194 +ifeq "$(ADSL)" "SADSL"
195 +EXTRA_CFLAGS += -DADSL_SADSL
197 +ifeq "$(ADSL)" "ANNEX_C"
198 +EXTRA_CFLAGS += -DADSL_ANNEXC
201 diff -urN linux-2.6.8.1/arch/mips/brcm-boards/bcm963xx/irq.c linux-2.6.8.1-brcm63xx/arch/mips/brcm-boards/bcm963xx/irq.c
202 --- linux-2.6.8.1/arch/mips/brcm-boards/bcm963xx/irq.c 1970-01-01 01:00:00.000000000 +0100
203 +++ linux-2.6.8.1-brcm63xx/arch/mips/brcm-boards/bcm963xx/irq.c 2006-06-26 09:07:08.000000000 +0200
207 + Copyright 2002 Broadcom Corp. All Rights Reserved.
209 + This program is free software; you can distribute it and/or modify it
210 + under the terms of the GNU General Public License (Version 2) as
211 + published by the Free Software Foundation.
213 + This program is distributed in the hope it will be useful, but WITHOUT
214 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
215 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
218 + You should have received a copy of the GNU General Public License along
219 + with this program; if not, write to the Free Software Foundation, Inc.,
220 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
224 + * Interrupt control functions for Broadcom 963xx MIPS boards
227 +#include <asm/atomic.h>
229 +#include <linux/delay.h>
230 +#include <linux/init.h>
231 +#include <linux/ioport.h>
232 +#include <linux/irq.h>
233 +#include <linux/interrupt.h>
234 +#include <linux/kernel.h>
235 +#include <linux/slab.h>
236 +#include <linux/module.h>
238 +#include <asm/irq.h>
239 +#include <asm/mipsregs.h>
240 +#include <asm/addrspace.h>
241 +#include <asm/signal.h>
242 +#include <bcm_map_part.h>
243 +#include <bcm_intr.h>
245 +extern asmlinkage unsigned int do_IRQ(int irq, struct pt_regs *regs);
247 +static void irq_dispatch_int(struct pt_regs *regs)
249 + unsigned int pendingIrqs;
250 + static unsigned int irqBit;
251 + static unsigned int isrNumber = 31;
253 + pendingIrqs = PERF->IrqStatus & PERF->IrqMask;
254 + if (!pendingIrqs) {
261 + if (isrNumber == 32) {
265 + if (pendingIrqs & irqBit) {
266 + PERF->IrqMask &= ~irqBit; // mask
267 + do_IRQ(isrNumber + INTERNAL_ISR_TABLE_OFFSET, regs);
273 +static void irq_dispatch_ext(uint32 irq, struct pt_regs *regs)
275 + if (!(PERF->ExtIrqCfg & (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_MASK_SHFT)))) {
276 + printk("**** Ext IRQ mask. Should not dispatch ****\n");
278 + /* disable and clear interrupt in the controller */
279 + PERF->ExtIrqCfg |= (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_CLEAR_SHFT));
280 + PERF->ExtIrqCfg &= ~(1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_MASK_SHFT));
284 +void brcm_irq_dispatch(struct pt_regs *regs)
287 + while((cause = (read_c0_cause()& CAUSEF_IP))) {
288 + if (cause & CAUSEF_IP7)
289 + do_IRQ(MIPS_TIMER_INT, regs);
290 + else if (cause & CAUSEF_IP2)
291 + irq_dispatch_int(regs);
292 + else if (cause & CAUSEF_IP3)
293 + irq_dispatch_ext(INTERRUPT_ID_EXTERNAL_0, regs);
294 + else if (cause & CAUSEF_IP4)
295 + irq_dispatch_ext(INTERRUPT_ID_EXTERNAL_1, regs);
296 + else if (cause & CAUSEF_IP5)
297 + irq_dispatch_ext(INTERRUPT_ID_EXTERNAL_2, regs);
298 + else if (cause & CAUSEF_IP6)
299 + irq_dispatch_ext(INTERRUPT_ID_EXTERNAL_3, regs);
305 +void enable_brcm_irq(unsigned int irq)
307 + unsigned long flags;
309 + local_irq_save(flags);
310 + if( irq >= INTERNAL_ISR_TABLE_OFFSET ) {
311 + PERF->IrqMask |= (1 << (irq - INTERNAL_ISR_TABLE_OFFSET));
313 + else if (irq >= INTERRUPT_ID_EXTERNAL_0 && irq <= INTERRUPT_ID_EXTERNAL_3) {
314 + /* enable and clear interrupt in the controller */
315 + PERF->ExtIrqCfg |= (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_CLEAR_SHFT));
316 + PERF->ExtIrqCfg |= (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_MASK_SHFT));
318 + local_irq_restore(flags);
321 +void disable_brcm_irq(unsigned int irq)
323 + unsigned long flags;
325 + local_irq_save(flags);
326 + if( irq >= INTERNAL_ISR_TABLE_OFFSET ) {
327 + PERF->IrqMask &= ~(1 << (irq - INTERNAL_ISR_TABLE_OFFSET));
329 + else if (irq >= INTERRUPT_ID_EXTERNAL_0 && irq <= INTERRUPT_ID_EXTERNAL_3) {
330 + /* disable interrupt in the controller */
331 + PERF->ExtIrqCfg &= ~(1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_MASK_SHFT));
333 + local_irq_restore(flags);
336 +void ack_brcm_irq(unsigned int irq)
338 + /* Already done in brcm_irq_dispatch */
341 +unsigned int startup_brcm_irq(unsigned int irq)
343 + enable_brcm_irq(irq);
345 + return 0; /* never anything pending */
348 +unsigned int startup_brcm_none(unsigned int irq)
353 +void end_brcm_irq(unsigned int irq)
355 + if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
356 + enable_brcm_irq(irq);
359 +void end_brcm_none(unsigned int irq)
363 +#define ALLINTS_NOTIMER (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4)
365 +static void __init brcm_irq_setup(void)
367 + extern asmlinkage void brcmIRQ(void);
369 + clear_c0_status(ST0_BEV);
370 + set_except_vector(0, brcmIRQ);
371 + change_c0_status(ST0_IM, ALLINTS_NOTIMER);
373 +#ifdef CONFIG_REMOTE_DEBUG
378 +static struct hw_interrupt_type brcm_irq_type = {
379 + .typename = "MIPS",
380 + .startup = startup_brcm_irq,
381 + .shutdown = disable_brcm_irq,
382 + .enable = enable_brcm_irq,
383 + .disable = disable_brcm_irq,
384 + .ack = ack_brcm_irq,
385 + .end = end_brcm_irq,
386 + .set_affinity = NULL
389 +static struct hw_interrupt_type brcm_irq_no_end_type = {
390 + .typename = "MIPS",
391 + .startup = startup_brcm_none,
392 + .shutdown = disable_brcm_irq,
393 + .enable = enable_brcm_irq,
394 + .disable = disable_brcm_irq,
395 + .ack = ack_brcm_irq,
396 + .end = end_brcm_none,
397 + .set_affinity = NULL
400 +void __init arch_init_irq(void)
404 + for (i = 0; i < NR_IRQS; i++) {
405 + irq_desc[i].status = IRQ_DISABLED;
406 + irq_desc[i].action = 0;
407 + irq_desc[i].depth = 1;
408 + irq_desc[i].handler = &brcm_irq_type;
414 +int request_external_irq(unsigned int irq,
415 + FN_HANDLER handler,
416 + unsigned long irqflags,
417 + const char * devname,
420 + unsigned long flags;
422 + local_irq_save(flags);
424 + PERF->ExtIrqCfg |= (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_CLEAR_SHFT)); // Clear
425 + PERF->ExtIrqCfg &= ~(1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_MASK_SHFT)); // Mask
426 + PERF->ExtIrqCfg &= ~(1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_INSENS_SHFT)); // Edge insesnsitive
427 + PERF->ExtIrqCfg |= (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_LEVEL_SHFT)); // Level triggered
428 + PERF->ExtIrqCfg &= ~(1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_SENSE_SHFT)); // Low level
430 + local_irq_restore(flags);
432 + return( request_irq(irq, handler, irqflags, devname, dev_id) );
435 +/* VxWorks compatibility function(s). */
437 +unsigned int BcmHalMapInterrupt(FN_HANDLER pfunc, unsigned int param,
438 + unsigned int interruptId)
443 + devname = kmalloc(16, GFP_KERNEL);
445 + sprintf( devname, "brcm_%d", interruptId );
447 + /* Set the IRQ description to not automatically enable the interrupt at
448 + * the end of an ISR. The driver that handles the interrupt must
449 + * explicitly call BcmHalInterruptEnable or enable_brcm_irq. This behavior
450 + * is consistent with interrupt handling on VxWorks.
452 + irq_desc[interruptId].handler = &brcm_irq_no_end_type;
454 + if( interruptId >= INTERNAL_ISR_TABLE_OFFSET )
456 + nRet = request_irq( interruptId, pfunc, SA_SAMPLE_RANDOM | SA_INTERRUPT,
457 + devname, (void *) param );
459 + else if (interruptId >= INTERRUPT_ID_EXTERNAL_0 && interruptId <= INTERRUPT_ID_EXTERNAL_3)
461 + nRet = request_external_irq( interruptId, pfunc, SA_SAMPLE_RANDOM | SA_INTERRUPT,
462 + devname, (void *) param );
469 +/* Debug function. */
471 +void dump_intr_regs(void)
473 + printk("PERF->ExtIrqCfg [%08x]\n", *(&(PERF->ExtIrqCfg)));
476 +EXPORT_SYMBOL(enable_brcm_irq);
477 +EXPORT_SYMBOL(disable_brcm_irq);
478 +EXPORT_SYMBOL(request_external_irq);
479 +EXPORT_SYMBOL(BcmHalMapInterrupt);
481 diff -urN linux-2.6.8.1/arch/mips/brcm-boards/bcm963xx/prom.c linux-2.6.8.1-brcm63xx/arch/mips/brcm-boards/bcm963xx/prom.c
482 --- linux-2.6.8.1/arch/mips/brcm-boards/bcm963xx/prom.c 1970-01-01 01:00:00.000000000 +0100
483 +++ linux-2.6.8.1-brcm63xx/arch/mips/brcm-boards/bcm963xx/prom.c 2006-06-26 09:07:08.000000000 +0200
487 + Copyright 2004 Broadcom Corp. All Rights Reserved.
489 + This program is free software; you can distribute it and/or modify it
490 + under the terms of the GNU General Public License (Version 2) as
491 + published by the Free Software Foundation.
493 + This program is distributed in the hope it will be useful, but WITHOUT
494 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
495 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
498 + You should have received a copy of the GNU General Public License along
499 + with this program; if not, write to the Free Software Foundation, Inc.,
500 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
504 + * prom.c: PROM library initialization code.
507 +#include <linux/init.h>
508 +#include <linux/mm.h>
509 +#include <linux/sched.h>
510 +#include <linux/bootmem.h>
511 +#include <linux/blkdev.h>
512 +#include <asm/addrspace.h>
513 +#include <asm/bootinfo.h>
514 +#include <asm/cpu.h>
515 +#include <asm/time.h>
517 +#include <bcm_map_part.h>
519 +#include "boardparms.h"
520 +#include "softdsl/AdslCoreDefs.h"
523 +extern int do_syslog(int, char *, int);
524 +extern void serial_init(void);
525 +extern void __init InitNvramInfo( void );
526 +extern void kerSysFlashInit( void );
527 +extern unsigned long get_nvram_start_addr(void);
528 +void __init create_root_nfs_cmdline( char *cmdline );
530 +#if defined(CONFIG_BCM96338)
531 +#define CPU_CLOCK 240000000
532 +#define MACH_BCM MACH_BCM96338
534 +#if defined(CONFIG_BCM96345)
535 +#define CPU_CLOCK 140000000
536 +#define MACH_BCM MACH_BCM96345
538 +#if defined(CONFIG_BCM96348)
539 +void __init calculateCpuSpeed(void);
540 +static unsigned long cpu_speed;
541 +#define CPU_CLOCK cpu_speed
542 +#define MACH_BCM MACH_BCM96348
545 +const char *get_system_type(void)
547 + PNVRAM_DATA pNvramData = (PNVRAM_DATA) get_nvram_start_addr();
549 + return( pNvramData->szBoardId );
552 +unsigned long getMemorySize(void)
554 + unsigned long ulSdramType = BOARD_SDRAM_TYPE;
556 + unsigned long ulSdramSize;
558 + switch( ulSdramType )
560 + case BP_MEMORY_16MB_1_CHIP:
561 + case BP_MEMORY_16MB_2_CHIP:
562 + ulSdramSize = 16 * 1024 * 1024;
564 + case BP_MEMORY_32MB_1_CHIP:
565 + case BP_MEMORY_32MB_2_CHIP:
566 + ulSdramSize = 32 * 1024 * 1024;
568 + case BP_MEMORY_64MB_2_CHIP:
569 + ulSdramSize = 64 * 1024 * 1024;
572 + ulSdramSize = 8 * 1024 * 1024;
576 + return ulSdramSize;
579 +/* --------------------------------------------------------------------------
581 + -------------------------------------------------------------------------- */
582 +void __init prom_init(void)
584 + extern ulong r4k_interval;
590 + do_syslog(8, NULL, 8);
592 + printk( "%s prom init\n", get_system_type() );
596 + arcs_cmdline[0] = '\0';
598 +#if defined(CONFIG_ROOT_NFS)
599 + create_root_nfs_cmdline( arcs_cmdline );
600 +#elif defined(CONFIG_ROOT_FLASHFS)
601 + strcpy(arcs_cmdline, CONFIG_ROOT_FLASHFS);
604 + add_memory_region(0, (getMemorySize() - ADSL_SDRAM_IMAGE_SIZE), BOOT_MEM_RAM);
606 +#if defined(CONFIG_BCM96348)
607 + calculateCpuSpeed();
609 + /* Count register increments every other clock */
610 + r4k_interval = CPU_CLOCK / HZ / 2;
611 + mips_hpt_frequency = CPU_CLOCK / 2;
613 + mips_machgroup = MACH_GROUP_BRCM;
614 + mips_machtype = MACH_BCM;
617 +/* --------------------------------------------------------------------------
618 + Name: prom_free_prom_memory
620 + -------------------------------------------------------------------------- */
621 +void __init prom_free_prom_memory(void)
627 +#if defined(CONFIG_ROOT_NFS)
628 +/* This function reads in a line that looks something like this:
631 + * CFE bootline=bcmEnet(0,0)host:vmlinux e=192.169.0.100:ffffff00 h=192.169.0.1
634 + * and retuns in the cmdline parameter some that looks like this:
636 + * CONFIG_CMDLINE="root=/dev/nfs nfsroot=192.168.0.1:/opt/targets/96345R/fs
637 + * ip=192.168.0.100:192.168.0.1::255.255.255.0::eth0:off rw"
639 +#define BOOT_LINE_ADDR 0x0
640 +#define HEXDIGIT(d) ((d >= '0' && d <= '9') ? (d - '0') : ((d | 0x20) - 'W'))
641 +#define HEXBYTE(b) (HEXDIGIT((b)[0]) << 4) + HEXDIGIT((b)[1])
642 +extern unsigned long get_nvram_start_addr(void);
644 +void __init create_root_nfs_cmdline( char *cmdline )
646 + char root_nfs_cl[] = "root=/dev/nfs nfsroot=%s:" CONFIG_ROOT_NFS_DIR
647 + " ip=%s:%s::%s::eth0:off rw";
649 + char *localip = NULL;
650 + char *hostip = NULL;
651 + char mask[16] = "";
652 + PNVRAM_DATA pNvramData = (PNVRAM_DATA) get_nvram_start_addr();
653 + char bootline[128] = "";
654 + char *p = bootline;
656 + memcpy(bootline, pNvramData->szBootline, sizeof(bootline));
659 + if( p[0] == 'e' && p[1] == '=' )
661 + /* Found local ip address */
664 + while( *p && *p != ' ' && *p != ':' )
668 + /* Found network mask (eg FFFFFF00 */
670 + sprintf( mask, "%u.%u.%u.%u", HEXBYTE(p), HEXBYTE(p + 2),
671 + HEXBYTE(p + 4), HEXBYTE(p + 6) );
674 + else if( *p == ' ' )
677 + else if( p[0] == 'h' && p[1] == '=' )
679 + /* Found host ip address */
682 + while( *p && *p != ' ' )
691 + if( localip && hostip )
692 + sprintf( cmdline, root_nfs_cl, hostip, localip, hostip, mask );
696 +#if defined(CONFIG_BCM96348)
697 +/* *********************************************************************
698 + * calculateCpuSpeed()
699 + * Calculate the BCM6348 CPU speed by reading the PLL strap register
700 + * and applying the following formula:
701 + * cpu_clk = (.25 * 64MHz freq) * (N1 + 1) * (N2 + 2) / (M1_CPU + 1)
702 + * Input parameters:
706 + ********************************************************************* */
707 +void __init calculateCpuSpeed(void)
709 + UINT32 pllStrap = PERF->PllStrap;
710 + int n1 = (pllStrap & PLL_N1_MASK) >> PLL_N1_SHFT;
711 + int n2 = (pllStrap & PLL_N2_MASK) >> PLL_N2_SHFT;
712 + int m1cpu = (pllStrap & PLL_M1_CPU_MASK) >> PLL_M1_CPU_SHFT;
714 + cpu_speed = (16 * (n1 + 1) * (n2 + 2) / (m1cpu + 1)) * 1000000;
718 diff -urN linux-2.6.8.1/arch/mips/brcm-boards/bcm963xx/ser_init.c linux-2.6.8.1-brcm63xx/arch/mips/brcm-boards/bcm963xx/ser_init.c
719 --- linux-2.6.8.1/arch/mips/brcm-boards/bcm963xx/ser_init.c 1970-01-01 01:00:00.000000000 +0100
720 +++ linux-2.6.8.1-brcm63xx/arch/mips/brcm-boards/bcm963xx/ser_init.c 2006-06-26 09:07:08.000000000 +0200
724 + Copyright 2004 Broadcom Corp. All Rights Reserved.
726 + This program is free software; you can distribute it and/or modify it
727 + under the terms of the GNU General Public License (Version 2) as
728 + published by the Free Software Foundation.
730 + This program is distributed in the hope it will be useful, but WITHOUT
731 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
732 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
735 + You should have received a copy of the GNU General Public License along
736 + with this program; if not, write to the Free Software Foundation, Inc.,
737 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
741 + * Broadcom bcm63xx serial port initialization, also prepare for printk
742 + * by registering with console_init
746 +#include <linux/config.h>
747 +#include <linux/init.h>
748 +#include <linux/interrupt.h>
749 +#include <linux/kernel.h>
750 +#include <linux/types.h>
751 +#include <linux/console.h>
752 +#include <linux/sched.h>
754 +#include <asm/addrspace.h>
755 +#include <asm/irq.h>
756 +#include <asm/reboot.h>
757 +#include <asm/gdb-stub.h>
758 +#include <asm/mc146818rtc.h>
760 +#include <bcm_map_part.h>
763 +#define SER63XX_DEFAULT_BAUD 115200
764 +#define BD_BCM63XX_TIMER_CLOCK_INPUT (FPERIPH)
765 +#define stUart ((volatile Uart * const) UART_BASE)
767 +// Transmit interrupts
768 +#define TXINT (TXFIFOEMT | TXUNDERR | TXOVFERR)
769 +// Receive interrupts
770 +#define RXINT (RXFIFONE | RXOVFERR)
772 +/* --------------------------------------------------------------------------
774 + Purpose: Initalize the UART
775 +-------------------------------------------------------------------------- */
776 +void __init serial_init(void)
778 + UINT32 tmpVal = SER63XX_DEFAULT_BAUD;
781 +#if defined(CONFIG_BCM96345)
782 + // Make sure clock is ticking
783 + PERF->blkEnables |= UART_CLK_EN;
786 + /* Dissable channel's receiver and transmitter. */
787 + stUart->control &= ~(BRGEN|TXEN|RXEN);
789 + /*--------------------------------------------------------------------*/
790 + /* Write the table value to the clock select register. */
791 + /* DPullen - this is the equation to use: */
792 + /* value = clockFreqHz / baud / 32-1; */
793 + /* (snmod) Actually you should also take into account any necessary */
794 + /* rounding. Divide by 16, look at lsb, if 0, divide by 2 */
795 + /* and subtract 1. If 1, just divide by 2 */
796 + /*--------------------------------------------------------------------*/
797 + clockFreqHz = BD_BCM63XX_TIMER_CLOCK_INPUT;
798 + tmpVal = (clockFreqHz / tmpVal) / 16;
799 + if( tmpVal & 0x01 )
800 + tmpVal /= 2; //Rounding up, so sub is already accounted for
802 + tmpVal = (tmpVal / 2) - 1; // Rounding down so we must sub 1
803 + stUart->baudword = tmpVal;
805 + /* Finally, re-enable the transmitter and receiver. */
806 + stUart->control |= (BRGEN|TXEN|RXEN);
808 + stUart->config = (BITS8SYM | ONESTOP);
809 + // Set the FIFO interrupt depth ... stUart->fifocfg = 0xAA;
810 + stUart->fifoctl = RSTTXFIFOS | RSTRXFIFOS;
811 + stUart->intMask = 0;
812 + stUart->intMask = RXINT | TXINT;
817 + * Output a character to the UART
819 +void prom_putc(char c)
821 + /* Wait for Tx uffer to empty */
822 + while (! (READ16(stUart->intStatus) & TXFIFOEMT));
823 + /* Send character */
828 + * Write a string to the UART
830 +void prom_puts(const char *s)
841 +/* prom_getc_nowait()
842 + * Returns a character from the UART
843 + * Returns -1 if no characters available or corrupted
845 +int prom_getc_nowait(void)
850 + uStatus = READ16(stUart->intStatus);
852 + if (uStatus & RXFIFONE) { /* Do we have a character? */
853 + cData = READ16(stUart->Data) & 0xff; /* Read character */
854 + if (uStatus & (RXFRAMERR | RXPARERR)) { /* If we got an error, throw it away */
863 + * Returns a charcter from the serial port
864 + * Will block until it receives a valid character
866 +char prom_getc(void)
870 + /* Loop until we get a valid character */
871 + while(cData == -1) {
872 + cData = prom_getc_nowait();
874 + return (char) cData;
878 + * Returns 0 if no characters available
880 +int prom_testc(void)
884 + uStatus = READ16(stUart->intStatus);
886 + return (uStatus & RXFIFONE);
889 +#if CONFIG_REMOTE_DEBUG
890 +/* Prevent other code from writing to the serial port */
891 +void _putc(char c) { }
892 +void _puts(const char *ptr) { }
894 +/* Low level outputs call prom routines */
895 +void _putc(char c) {
898 +void _puts(const char *ptr) {
902 diff -urN linux-2.6.8.1/arch/mips/brcm-boards/bcm963xx/setup.c linux-2.6.8.1-brcm63xx/arch/mips/brcm-boards/bcm963xx/setup.c
903 --- linux-2.6.8.1/arch/mips/brcm-boards/bcm963xx/setup.c 1970-01-01 01:00:00.000000000 +0100
904 +++ linux-2.6.8.1-brcm63xx/arch/mips/brcm-boards/bcm963xx/setup.c 2006-06-26 09:07:08.000000000 +0200
908 + Copyright 2002 Broadcom Corp. All Rights Reserved.
910 + This program is free software; you can distribute it and/or modify it
911 + under the terms of the GNU General Public License (Version 2) as
912 + published by the Free Software Foundation.
914 + This program is distributed in the hope it will be useful, but WITHOUT
915 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
916 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
919 + You should have received a copy of the GNU General Public License along
920 + with this program; if not, write to the Free Software Foundation, Inc.,
921 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
925 + * Generic setup routines for Broadcom 963xx MIPS boards
928 +#include <linux/config.h>
929 +#include <linux/init.h>
930 +#include <linux/interrupt.h>
931 +#include <linux/kernel.h>
932 +#include <linux/kdev_t.h>
933 +#include <linux/types.h>
934 +#include <linux/console.h>
935 +#include <linux/sched.h>
936 +#include <linux/mm.h>
937 +#include <linux/slab.h>
938 +#include <linux/module.h>
940 +#include <asm/addrspace.h>
941 +#include <asm/bcache.h>
942 +#include <asm/irq.h>
943 +#include <asm/time.h>
944 +#include <asm/reboot.h>
945 +#include <asm/gdb-stub.h>
947 +extern void brcm_timer_setup(struct irqaction *irq);
948 +extern unsigned long getMemorySize(void);
950 +#if defined(CONFIG_BCM96348) && defined(CONFIG_PCI)
951 +#include <linux/pci.h>
952 +#include <linux/delay.h>
953 +#include <bcm_map_part.h>
956 +static volatile MpiRegisters * mpi = (MpiRegisters *)(MPI_BASE);
959 +/* This function should be in a board specific directory. For now,
960 + * assume that all boards that include this file use a Broadcom chip
961 + * with a soft reset bit in the PLL control register.
963 +static void brcm_machine_restart(char *command)
965 + const unsigned long ulSoftReset = 0x00000001;
966 + unsigned long *pulPllCtrl = (unsigned long *) 0xfffe0008;
967 + *pulPllCtrl |= ulSoftReset;
970 +static void brcm_machine_halt(void)
972 + printk("System halted\n");
976 +#if defined(CONFIG_BCM96348) && defined(CONFIG_PCI)
978 +static void mpi_SetLocalPciConfigReg(uint32 reg, uint32 value)
980 + /* write index then value */
981 + mpi->pcicfgcntrl = PCI_CFG_REG_WRITE_EN + reg;;
982 + mpi->pcicfgdata = value;
985 +static uint32 mpi_GetLocalPciConfigReg(uint32 reg)
987 + /* write index then get value */
988 + mpi->pcicfgcntrl = PCI_CFG_REG_WRITE_EN + reg;;
989 + return mpi->pcicfgdata;
993 + * mpi_ResetPcCard: Set/Reset the PcCard
995 +static void mpi_ResetPcCard(int cardtype, BOOL bReset)
997 + if (cardtype == MPI_CARDTYPE_NONE) {
1001 + if (cardtype == MPI_CARDTYPE_CARDBUS) {
1002 + bReset = ! bReset;
1006 + mpi->pcmcia_cntl1 = (mpi->pcmcia_cntl1 & ~PCCARD_CARD_RESET);
1008 + mpi->pcmcia_cntl1 = (mpi->pcmcia_cntl1 | PCCARD_CARD_RESET);
1013 + * mpi_ConfigCs: Configure an MPI/EBI chip select
1015 +static void mpi_ConfigCs(uint32 cs, uint32 base, uint32 size, uint32 flags)
1017 + mpi->cs[cs].base = ((base & 0x1FFFFFFF) | size);
1018 + mpi->cs[cs].config = flags;
1022 + * mpi_InitPcmciaSpace
1024 +static void mpi_InitPcmciaSpace(void)
1026 + // ChipSelect 4 controls PCMCIA Memory accesses
1027 + mpi_ConfigCs(PCMCIA_COMMON_BASE, pcmciaMem, EBI_SIZE_1M, (EBI_WORD_WIDE|EBI_ENABLE));
1028 + // ChipSelect 5 controls PCMCIA Attribute accesses
1029 + mpi_ConfigCs(PCMCIA_ATTRIBUTE_BASE, pcmciaAttr, EBI_SIZE_1M, (EBI_WORD_WIDE|EBI_ENABLE));
1030 + // ChipSelect 6 controls PCMCIA I/O accesses
1031 + mpi_ConfigCs(PCMCIA_IO_BASE, pcmciaIo, EBI_SIZE_64K, (EBI_WORD_WIDE|EBI_ENABLE));
1033 + mpi->pcmcia_cntl2 = ((PCMCIA_ATTR_ACTIVE << RW_ACTIVE_CNT_BIT) |
1034 + (PCMCIA_ATTR_INACTIVE << INACTIVE_CNT_BIT) |
1035 + (PCMCIA_ATTR_CE_SETUP << CE_SETUP_CNT_BIT) |
1036 + (PCMCIA_ATTR_CE_HOLD << CE_HOLD_CNT_BIT));
1038 + mpi->pcmcia_cntl2 |= (PCMCIA_HALFWORD_EN | PCMCIA_BYTESWAP_DIS);
1042 + * cardtype_vcc_detect: PC Card's card detect and voltage sense connection
1044 + * CD1#/ CD2#/ VS1#/ VS2#/ Card Initial Vcc
1045 + * CCD1# CCD2# CVS1 CVS2 Type
1047 + * GND GND open open 16-bit 5 vdc
1049 + * GND GND GND open 16-bit 3.3 vdc
1051 + * GND GND open GND 16-bit x.x vdc
1053 + * GND GND GND GND 16-bit 3.3 & x.x vdc
1055 + *====================================================================
1057 + * CVS1 GND CCD1# open CardBus 3.3 vdc
1059 + * GND CVS2 open CCD2# CardBus x.x vdc
1061 + * GND CVS1 CCD2# open CardBus y.y vdc
1063 + * GND CVS2 GND CCD2# CardBus 3.3 & x.x vdc
1065 + * CVS2 GND open CCD1# CardBus x.x & y.y vdc
1067 + * GND CVS1 CCD2# open CardBus 3.3, x.x & y.y vdc
1070 +static int cardtype_vcc_detect(void)
1075 + cardtype = MPI_CARDTYPE_NONE;
1076 + mpi->pcmcia_cntl1 = 0x0000A000; // Turn on the output enables and drive
1077 + // the CVS pins to 0.
1078 + data32 = mpi->pcmcia_cntl1;
1079 + switch (data32 & 0x00000003) // Test CD1# and CD2#, see if card is plugged in.
1081 + case 0x00000003: // No Card is in the slot.
1082 + printk("mpi: No Card is in the PCMCIA slot\n");
1085 + case 0x00000002: // Partial insertion, No CD2#.
1086 + printk("mpi: Card in the PCMCIA slot partial insertion, no CD2 signal\n");
1089 + case 0x00000001: // Partial insertion, No CD1#.
1090 + printk("mpi: Card in the PCMCIA slot partial insertion, no CD1 signal\n");
1094 + mpi->pcmcia_cntl1 = 0x0000A0C0; // Turn off the CVS output enables and
1095 + // float the CVS pins.
1097 + data32 = mpi->pcmcia_cntl1;
1098 + // Read the Register.
1099 + switch (data32 & 0x0000000C) // See what is on the CVS pins.
1101 + case 0x00000000: // CVS1 and CVS2 are tied to ground, only 1 option.
1102 + printk("mpi: Detected 3.3 & x.x 16-bit PCMCIA card\n");
1103 + cardtype = MPI_CARDTYPE_PCMCIA;
1106 + case 0x00000004: // CVS1 is open or tied to CCD1/CCD2 and CVS2 is tied to ground.
1107 + // 2 valid voltage options.
1108 + switch (data32 & 0x00000003) // Test the values of CCD1 and CCD2.
1110 + case 0x00000003: // CCD1 and CCD2 are tied to 1 of the CVS pins.
1111 + // This is not a valid combination.
1112 + printk("mpi: Unknown card plugged into slot\n");
1115 + case 0x00000002: // CCD2 is tied to either CVS1 or CVS2.
1116 + mpi->pcmcia_cntl1 = 0x0000A080; // Drive CVS1 to a 0.
1118 + data32 = mpi->pcmcia_cntl1;
1119 + if (data32 & 0x00000002) { // CCD2 is tied to CVS2, not valid.
1120 + printk("mpi: Unknown card plugged into slot\n");
1121 + } else { // CCD2 is tied to CVS1.
1122 + printk("mpi: Detected 3.3, x.x and y.y Cardbus card\n");
1123 + cardtype = MPI_CARDTYPE_CARDBUS;
1127 + case 0x00000001: // CCD1 is tied to either CVS1 or CVS2.
1128 + // This is not a valid combination.
1129 + printk("mpi: Unknown card plugged into slot\n");
1132 + case 0x00000000: // CCD1 and CCD2 are tied to ground.
1133 + printk("mpi: Detected x.x vdc 16-bit PCMCIA card\n");
1134 + cardtype = MPI_CARDTYPE_PCMCIA;
1139 + case 0x00000008: // CVS2 is open or tied to CCD1/CCD2 and CVS1 is tied to ground.
1140 + // 2 valid voltage options.
1141 + switch (data32 & 0x00000003) // Test the values of CCD1 and CCD2.
1143 + case 0x00000003: // CCD1 and CCD2 are tied to 1 of the CVS pins.
1144 + // This is not a valid combination.
1145 + printk("mpi: Unknown card plugged into slot\n");
1148 + case 0x00000002: // CCD2 is tied to either CVS1 or CVS2.
1149 + mpi->pcmcia_cntl1 = 0x0000A040; // Drive CVS2 to a 0.
1151 + data32 = mpi->pcmcia_cntl1;
1152 + if (data32 & 0x00000002) { // CCD2 is tied to CVS1, not valid.
1153 + printk("mpi: Unknown card plugged into slot\n");
1154 + } else {// CCD2 is tied to CVS2.
1155 + printk("mpi: Detected 3.3 and x.x Cardbus card\n");
1156 + cardtype = MPI_CARDTYPE_CARDBUS;
1160 + case 0x00000001: // CCD1 is tied to either CVS1 or CVS2.
1161 + // This is not a valid combination.
1162 + printk("mpi: Unknown card plugged into slot\n");
1165 + case 0x00000000: // CCD1 and CCD2 are tied to ground.
1166 + cardtype = MPI_CARDTYPE_PCMCIA;
1167 + printk("mpi: Detected 3.3 vdc 16-bit PCMCIA card\n");
1172 + case 0x0000000C: // CVS1 and CVS2 are open or tied to CCD1/CCD2.
1173 + // 5 valid voltage options.
1175 + switch (data32 & 0x00000003) // Test the values of CCD1 and CCD2.
1177 + case 0x00000003: // CCD1 and CCD2 are tied to 1 of the CVS pins.
1178 + // This is not a valid combination.
1179 + printk("mpi: Unknown card plugged into slot\n");
1182 + case 0x00000002: // CCD2 is tied to either CVS1 or CVS2.
1183 + // CCD1 is tied to ground.
1184 + mpi->pcmcia_cntl1 = 0x0000A040; // Drive CVS2 to a 0.
1186 + data32 = mpi->pcmcia_cntl1;
1187 + if (data32 & 0x00000002) { // CCD2 is tied to CVS1.
1188 + printk("mpi: Detected y.y vdc Cardbus card\n");
1189 + } else { // CCD2 is tied to CVS2.
1190 + printk("mpi: Detected x.x vdc Cardbus card\n");
1192 + cardtype = MPI_CARDTYPE_CARDBUS;
1195 + case 0x00000001: // CCD1 is tied to either CVS1 or CVS2.
1196 + // CCD2 is tied to ground.
1198 + mpi->pcmcia_cntl1 = 0x0000A040; // Drive CVS2 to a 0.
1200 + data32 = mpi->pcmcia_cntl1;
1201 + if (data32 & 0x00000001) {// CCD1 is tied to CVS1.
1202 + printk("mpi: Detected 3.3 vdc Cardbus card\n");
1203 + } else { // CCD1 is tied to CVS2.
1204 + printk("mpi: Detected x.x and y.y Cardbus card\n");
1206 + cardtype = MPI_CARDTYPE_CARDBUS;
1209 + case 0x00000000: // CCD1 and CCD2 are tied to ground.
1210 + cardtype = MPI_CARDTYPE_PCMCIA;
1211 + printk("mpi: Detected 5 vdc 16-bit PCMCIA card\n");
1217 + printk("mpi: Unknown card plugged into slot\n");
1226 + * mpi_DetectPcCard: Detect the plugged in PC-Card
1227 + * Return: < 0 => Unknown card detected
1228 + * 0 => No card detected
1229 + * 1 => 16-bit card detected
1230 + * 2 => 32-bit CardBus card detected
1232 +static int mpi_DetectPcCard(void)
1236 + cardtype = cardtype_vcc_detect();
1237 + switch(cardtype) {
1238 + case MPI_CARDTYPE_PCMCIA:
1239 + mpi->pcmcia_cntl1 &= ~0x0000e000; // disable enable bits
1240 + //mpi->pcmcia_cntl1 = (mpi->pcmcia_cntl1 & ~PCCARD_CARD_RESET);
1241 + mpi->pcmcia_cntl1 |= (PCMCIA_ENABLE | PCMCIA_GPIO_ENABLE);
1242 + mpi_InitPcmciaSpace();
1243 + mpi_ResetPcCard(cardtype, FALSE);
1244 + // Hold card in reset for 10ms
1246 + mpi_ResetPcCard(cardtype, TRUE);
1247 + // Let card come out of reset
1250 + case MPI_CARDTYPE_CARDBUS:
1251 + // 8 => CardBus Enable
1252 + // 1 => PCI Slot Number
1253 + // C => Float VS1 & VS2
1254 + mpi->pcmcia_cntl1 = (mpi->pcmcia_cntl1 & 0xFFFF0000) |
1256 + (CARDBUS_SLOT << 8)|
1259 + /* access to this memory window will be to/from CardBus */
1260 + mpi->l2pmremap1 |= CARDBUS_MEM;
1262 + // Need to reset the Cardbus Card. There's no CardManager to do this,
1263 + // and we need to be ready for PCI configuration.
1264 + mpi_ResetPcCard(cardtype, FALSE);
1265 + // Hold card in reset for 10ms
1267 + mpi_ResetPcCard(cardtype, TRUE);
1268 + // Let card come out of reset
1277 +static int mpi_init(void)
1279 + unsigned long data;
1280 + unsigned int chipid;
1281 + unsigned int chiprev;
1282 + unsigned int sdramsize;
1284 + chipid = (PERF->RevID & 0xFFFF0000) >> 16;
1285 + chiprev = (PERF->RevID & 0xFF);
1286 + sdramsize = getMemorySize();
1288 + * Init the pci interface
1290 + data = GPIO->GPIOMode; // GPIO mode register
1291 + data |= GROUP2_PCI | GROUP1_MII_PCCARD; // PCI internal arbiter + Cardbus
1292 + GPIO->GPIOMode = data; // PCI internal arbiter
1295 + * In the BCM6348 CardBus support is defaulted to Slot 0
1296 + * because there is no external IDSEL for CardBus. To disable
1297 + * the CardBus and allow a standard PCI card in Slot 0
1298 + * set the cbus_idsel field to 0x1f.
1301 + uData = mpi->pcmcia_cntl1;
1302 + uData |= CARDBUS_IDSEL;
1303 + mpi->pcmcia_cntl1 = uData;
1305 + // Setup PCI I/O Window range. Give 64K to PCI I/O
1306 + mpi->l2piorange = ~(BCM_PCI_IO_SIZE_64KB-1);
1307 + // UBUS to PCI I/O base address
1308 + mpi->l2piobase = BCM_PCI_IO_BASE & BCM_PCI_ADDR_MASK;
1309 + // UBUS to PCI I/O Window remap
1310 + mpi->l2pioremap = (BCM_PCI_IO_BASE | MEM_WINDOW_EN);
1312 + // enable PCI related GPIO pins and data swap between system and PCI bus
1313 + mpi->locbuscntrl = (EN_PCI_GPIO | DIR_U2P_NOSWAP);
1315 + /* Enable 6348 BusMaster and Memory access mode */
1316 + data = mpi_GetLocalPciConfigReg(PCI_COMMAND);
1317 + data |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
1318 + mpi_SetLocalPciConfigReg(PCI_COMMAND, data);
1320 + /* Configure two 16 MByte PCI to System memory regions. */
1321 + /* These memory regions are used when PCI device is a bus master */
1322 + /* Accesses to the SDRAM from PCI bus will be "byte swapped" for this region */
1323 + mpi_SetLocalPciConfigReg(PCI_BASE_ADDRESS_3, BCM_HOST_MEM_SPACE1);
1324 + mpi->sp0remap = 0x0;
1326 + /* Accesses to the SDRAM from PCI bus will not be "byte swapped" for this region */
1327 + mpi_SetLocalPciConfigReg(PCI_BASE_ADDRESS_4, BCM_HOST_MEM_SPACE2);
1328 + mpi->sp1remap = 0x0;
1329 + mpi->pcimodesel |= (PCI_BAR2_NOSWAP | 0x40);
1331 + if ((chipid == 0x6348) && (chiprev == 0xb0)) {
1332 + mpi->sp0range = ~(sdramsize-1);
1333 + mpi->sp1range = ~(sdramsize-1);
1336 + * Change 6348 PCI Cfg Reg. offset 0x40 to PCI memory read retry count infinity
1337 + * by set 0 in bit 8~15. This resolve read Bcm4306 srom return 0xffff in
1340 + data = mpi_GetLocalPciConfigReg(BRCM_PCI_CONFIG_TIMER);
1341 + data &= ~BRCM_PCI_CONFIG_TIMER_RETRY_MASK;
1342 + data |= 0x00000080;
1343 + mpi_SetLocalPciConfigReg(BRCM_PCI_CONFIG_TIMER, data);
1345 + /* enable pci interrupt */
1346 + mpi->locintstat |= (EXT_PCI_INT << 16);
1348 + mpi_DetectPcCard();
1350 + ioport_resource.start = BCM_PCI_IO_BASE;
1351 + ioport_resource.end = BCM_PCI_IO_BASE + BCM_PCI_IO_SIZE_64KB;
1353 +#if defined(CONFIG_USB)
1354 + PERF->blkEnables |= USBH_CLK_EN;
1356 + *USBH_NON_OHCI = NON_OHCI_BYTE_SWAP;
1363 +static int __init brcm63xx_setup(void)
1365 + extern int panic_timeout;
1367 + _machine_restart = brcm_machine_restart;
1368 + _machine_halt = brcm_machine_halt;
1369 + _machine_power_off = brcm_machine_halt;
1371 + board_timer_setup = brcm_timer_setup;
1373 + panic_timeout = 180;
1375 +#if defined(CONFIG_BCM96348) && defined(CONFIG_PCI)
1376 + /* mpi initialization */
1382 +early_initcall(brcm63xx_setup);
1384 +/***************************************************************************
1385 + * C++ New and delete operator functions
1386 + ***************************************************************************/
1388 +/* void *operator new(unsigned int sz) */
1389 +void *_Znwj(unsigned int sz)
1391 + return( kmalloc(sz, GFP_KERNEL) );
1394 +/* void *operator new[](unsigned int sz)*/
1395 +void *_Znaj(unsigned int sz)
1397 + return( kmalloc(sz, GFP_KERNEL) );
1400 +/* placement new operator */
1401 +/* void *operator new (unsigned int size, void *ptr) */
1402 +void *ZnwjPv(unsigned int size, void *ptr)
1407 +/* void operator delete(void *m) */
1408 +void _ZdlPv(void *m)
1413 +/* void operator delete[](void *m) */
1414 +void _ZdaPv(void *m)
1419 +EXPORT_SYMBOL(_Znwj);
1420 +EXPORT_SYMBOL(_Znaj);
1421 +EXPORT_SYMBOL(ZnwjPv);
1422 +EXPORT_SYMBOL(_ZdlPv);
1423 +EXPORT_SYMBOL(_ZdaPv);
1425 diff -urN linux-2.6.8.1/arch/mips/brcm-boards/bcm963xx/time.c linux-2.6.8.1-brcm63xx/arch/mips/brcm-boards/bcm963xx/time.c
1426 --- linux-2.6.8.1/arch/mips/brcm-boards/bcm963xx/time.c 1970-01-01 01:00:00.000000000 +0100
1427 +++ linux-2.6.8.1-brcm63xx/arch/mips/brcm-boards/bcm963xx/time.c 2006-06-26 09:07:08.000000000 +0200
1431 + Copyright 2004 Broadcom Corp. All Rights Reserved.
1433 + This program is free software; you can distribute it and/or modify it
1434 + under the terms of the GNU General Public License (Version 2) as
1435 + published by the Free Software Foundation.
1437 + This program is distributed in the hope it will be useful, but WITHOUT
1438 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
1439 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
1442 + You should have received a copy of the GNU General Public License along
1443 + with this program; if not, write to the Free Software Foundation, Inc.,
1444 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
1448 + * Setup time for Broadcom 963xx MIPS boards
1451 +#include <linux/config.h>
1452 +#include <linux/init.h>
1453 +#include <linux/kernel_stat.h>
1454 +#include <linux/sched.h>
1455 +#include <linux/spinlock.h>
1456 +#include <linux/interrupt.h>
1457 +#include <linux/module.h>
1458 +#include <linux/time.h>
1459 +#include <linux/timex.h>
1461 +#include <asm/mipsregs.h>
1462 +#include <asm/ptrace.h>
1463 +#include <asm/div64.h>
1464 +#include <asm/time.h>
1466 +#include <bcm_map_part.h>
1467 +#include <bcm_intr.h>
1469 +unsigned long r4k_interval; /* Amount to increment compare reg each time */
1470 +static unsigned long r4k_cur; /* What counter should be at next timer irq */
1472 +/* Cycle counter value at the previous timer interrupt.. */
1473 +static unsigned int timerhi = 0, timerlo = 0;
1475 +extern volatile unsigned long wall_jiffies;
1477 +/* Optional board-specific timer routine */
1478 +void (*board_timer_interrupt)(int irq, void *dev_id, struct pt_regs * regs);
1480 +static inline void ack_r4ktimer(unsigned long newval)
1482 + write_c0_compare(newval);
1486 + * There are a lot of conceptually broken versions of the MIPS timer interrupt
1487 + * handler floating around. This one is rather different, but the algorithm
1488 + * is provably more robust.
1490 +static irqreturn_t brcm_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1492 + unsigned int count;
1494 + if (r4k_interval == 0)
1500 + if (board_timer_interrupt)
1501 + board_timer_interrupt(irq, dev_id, regs);
1503 + r4k_cur += r4k_interval;
1504 + ack_r4ktimer(r4k_cur);
1506 + } while (((count = (unsigned long)read_c0_count())
1507 + - r4k_cur) < 0x7fffffff);
1511 + * If jiffies has overflowed in this timer_interrupt we must
1512 + * update the timer[hi]/[lo] to make do_fast_gettimeoffset()
1513 + * quotient calc still valid. -arca
1515 + timerhi = timerlo = 0;
1518 + * The cycle counter is only 32 bit which is good for about
1519 + * a minute at current count rates of upto 150MHz or so.
1521 + timerhi += (count < timerlo); /* Wrap around */
1525 + return IRQ_HANDLED;
1532 +static struct irqaction brcm_timer_action = {
1533 + .handler = brcm_timer_interrupt,
1534 + .flags = SA_INTERRUPT,
1535 + .mask = CPU_MASK_NONE,
1538 + .dev_id = brcm_timer_interrupt,
1542 +void __init brcm_timer_setup(struct irqaction *irq)
1544 + r4k_cur = (read_c0_count() + r4k_interval);
1545 + write_c0_compare(r4k_cur);
1547 + /* we are using the cpu counter for timer interrupts */
1548 + irq->handler = no_action; /* we use our own handler */
1549 + setup_irq(MIPS_TIMER_INT, &brcm_timer_action);
1550 + set_c0_status(IE_IRQ5);
1554 +/* This is for machines which generate the exact clock. */
1555 +#define USECS_PER_JIFFY (1000000/HZ)
1556 +#define USECS_PER_JIFFY_FRAC (0x100000000*1000000/HZ&0xffffffff)
1558 +static void call_do_div64_32( unsigned long *res, unsigned int high,
1559 + unsigned int low, unsigned long base )
1561 + do_div64_32(*res, high, low, base);
1565 + * FIXME: Does playing with the RP bit in c0_status interfere with this code?
1567 +static unsigned long do_fast_gettimeoffset(void)
1570 + unsigned long res, tmp;
1572 + /* Last jiffy when do_fast_gettimeoffset() was called. */
1573 + static unsigned long last_jiffies=0;
1574 + unsigned long quotient;
1577 + * Cached "1/(clocks per usec)*2^32" value.
1578 + * It has to be recalculated once each jiffy.
1580 + static unsigned long cached_quotient=0;
1584 + quotient = cached_quotient;
1586 + if (tmp && last_jiffies != tmp) {
1587 + last_jiffies = tmp;
1588 +#ifdef CONFIG_CPU_MIPS32
1589 + if (last_jiffies != 0) {
1592 + /* gcc 3.0.1 gets an internal compiler error if there are two
1593 + * do_div64_32 inline macros. To work around this problem,
1594 + * do_div64_32 is called as a function.
1596 + call_do_div64_32(&r0, timerhi, timerlo, tmp);
1597 + call_do_div64_32("ient, USECS_PER_JIFFY,
1598 + USECS_PER_JIFFY_FRAC, r0);
1600 + cached_quotient = quotient;
1604 + __asm__(".set\tnoreorder\n\t"
1608 + "dsll32\t$1,%1,0\n\t"
1609 + "or\t$1,$1,%0\n\t"
1610 + "ddivu\t$0,$1,%3\n\t"
1612 + "dsll32\t%0,%4,0\n\t"
1614 + "ddivu\t$0,%0,$1\n\t"
1623 + "r" (USECS_PER_JIFFY)
1625 + cached_quotient = quotient;
1629 + /* Get last timer tick in absolute kernel time */
1630 + count = read_c0_count();
1632 + /* .. relative to previous jiffy (32 bits is enough) */
1635 + __asm__("multu\t%1,%2\n\t"
1642 + * Due to possible jiffies inconsistencies, we need to check
1643 + * the result so that we'll get a timer that is monotonic.
1645 + if (res >= USECS_PER_JIFFY)
1646 + res = USECS_PER_JIFFY-1;
1651 +void do_gettimeofday(struct timeval *tv)
1653 + unsigned int flags;
1655 + read_lock_irqsave (&xtime_lock, flags);
1656 + tv->tv_sec = xtime.tv_sec;
1657 + tv->tv_usec = xtime.tv_nsec/1000;
1658 + tv->tv_usec += do_fast_gettimeoffset();
1661 + * xtime is atomically updated in timer_bh. jiffies - wall_jiffies
1662 + * is nonzero if the timer bottom half hasnt executed yet.
1664 + if (jiffies - wall_jiffies)
1665 + tv->tv_usec += USECS_PER_JIFFY;
1667 + read_unlock_irqrestore (&xtime_lock, flags);
1669 + if (tv->tv_usec >= 1000000) {
1670 + tv->tv_usec -= 1000000;
1675 +EXPORT_SYMBOL(do_gettimeofday);
1677 +int do_settimeofday(struct timespec *tv)
1679 + write_lock_irq (&xtime_lock);
1681 + /* This is revolting. We need to set the xtime.tv_usec correctly.
1682 + * However, the value in this location is is value at the last tick.
1683 + * Discover what correction gettimeofday would have done, and then
1686 + tv->tv_nsec -= do_fast_gettimeoffset()*NSEC_PER_USEC;
1688 + if (tv->tv_nsec < 0) {
1689 + tv->tv_nsec += 1000000*NSEC_PER_USEC;
1693 + xtime.tv_sec = tv->tv_sec;
1694 + xtime.tv_nsec = tv->tv_nsec;
1695 + time_adjust = 0; /* stop active adjtime() */
1696 + time_status |= STA_UNSYNC;
1697 + time_maxerror = NTP_PHASE_LIMIT;
1698 + time_esterror = NTP_PHASE_LIMIT;
1700 + write_unlock_irq (&xtime_lock);
1703 +EXPORT_SYMBOL(do_settimeofday);
1706 diff -urN linux-2.6.8.1/arch/mips/brcm-boards/generic/Makefile linux-2.6.8.1-brcm63xx/arch/mips/brcm-boards/generic/Makefile
1707 --- linux-2.6.8.1/arch/mips/brcm-boards/generic/Makefile 1970-01-01 01:00:00.000000000 +0100
1708 +++ linux-2.6.8.1-brcm63xx/arch/mips/brcm-boards/generic/Makefile 2006-06-26 09:07:08.000000000 +0200
1711 +# Makefile for generic Broadcom MIPS boards
1713 +# Copyright (C) 2001 Broadcom Corporation
1715 +obj-y := int-handler.o
1717 +ifdef CONFIG_REMOTE_DEBUG
1721 diff -urN linux-2.6.8.1/arch/mips/brcm-boards/generic/dbg_io.c linux-2.6.8.1-brcm63xx/arch/mips/brcm-boards/generic/dbg_io.c
1722 --- linux-2.6.8.1/arch/mips/brcm-boards/generic/dbg_io.c 1970-01-01 01:00:00.000000000 +0100
1723 +++ linux-2.6.8.1-brcm63xx/arch/mips/brcm-boards/generic/dbg_io.c 2006-06-26 09:07:08.000000000 +0200
1727 + Copyright 2003 Broadcom Corp. All Rights Reserved.
1729 + This program is free software; you can distribute it and/or modify it
1730 + under the terms of the GNU General Public License (Version 2) as
1731 + published by the Free Software Foundation.
1733 + This program is distributed in the hope it will be useful, but WITHOUT
1734 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
1735 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
1738 + You should have received a copy of the GNU General Public License along
1739 + with this program; if not, write to the Free Software Foundation, Inc.,
1740 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
1744 +#include <linux/config.h>
1745 +#include <linux/tty.h>
1746 +#include <linux/major.h>
1747 +#include <linux/init.h>
1748 +#include <linux/console.h>
1749 +#include <linux/fs.h>
1750 +#include <linux/interrupt.h>
1751 +#include <linux/kernel.h>
1752 +#include <linux/types.h>
1753 +#include <linux/sched.h>
1755 +#include <bcm_map_part.h>
1757 +#undef PRNT /* define for debug printing */
1759 +#define UART16550_BAUD_2400 2400
1760 +#define UART16550_BAUD_4800 4800
1761 +#define UART16550_BAUD_9600 9600
1762 +#define UART16550_BAUD_19200 19200
1763 +#define UART16550_BAUD_38400 38400
1764 +#define UART16550_BAUD_57600 57600
1765 +#define UART16550_BAUD_115200 115200
1767 +#define UART16550_PARITY_NONE 0
1768 +#define UART16550_PARITY_ODD 0x08
1769 +#define UART16550_PARITY_EVEN 0x18
1770 +#define UART16550_PARITY_MARK 0x28
1771 +#define UART16550_PARITY_SPACE 0x38
1773 +#define UART16550_DATA_5BIT 0x0
1774 +#define UART16550_DATA_6BIT 0x1
1775 +#define UART16550_DATA_7BIT 0x2
1776 +#define UART16550_DATA_8BIT 0x3
1778 +#define UART16550_STOP_1BIT 0x0
1779 +#define UART16550_STOP_2BIT 0x4
1781 +volatile Uart * stUart = UART_BASE;
1783 +#define WRITE16(addr, value) ((*(volatile UINT16 *)((ULONG)&addr)) = value)
1785 +/* Low level UART routines from promcon.c */
1786 +extern void prom_putc(char c);
1787 +extern char prom_getc(void);
1788 +extern int prom_getc_nowait(void);
1789 +extern int prom_testc(void);
1791 +extern void set_debug_traps(void);
1792 +extern void breakpoint(void);
1793 +extern void enable_brcm_irq(unsigned int);
1794 +extern void set_async_breakpoint(unsigned int epc);
1796 +#ifdef CONFIG_GDB_CONSOLE
1797 +extern void register_gdb_console(void);
1800 +int gdb_initialized = 0;
1802 +#define GDB_BUF_SIZE 512 /* power of 2, please */
1804 +static char gdb_buf[GDB_BUF_SIZE] ;
1805 +static int gdb_buf_in_inx ;
1806 +static atomic_t gdb_buf_in_cnt ;
1807 +static int gdb_buf_out_inx ;
1809 +void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
1811 + /* Do nothing, assume boot loader has already set up serial port */
1812 + printk("debugInit called\n");
1816 + * Get a char if available, return -1 if nothing available.
1817 + * Empty the receive buffer first, then look at the interface hardware.
1819 +static int read_char(void)
1821 + if (atomic_read(&gdb_buf_in_cnt) != 0) /* intr routine has q'd chars */
1825 + chr = gdb_buf[gdb_buf_out_inx++] ;
1826 + gdb_buf_out_inx &= (GDB_BUF_SIZE - 1) ;
1827 + atomic_dec(&gdb_buf_in_cnt) ;
1830 + return(prom_getc_nowait()) ; /* read from hardware */
1834 + * This is the receiver interrupt routine for the GDB stub.
1835 + * It will receive a limited number of characters of input
1836 + * from the gdb host machine and save them up in a buffer.
1838 + * When the gdb stub routine getDebugChar() is called it
1839 + * draws characters out of the buffer until it is empty and
1840 + * then reads directly from the serial port.
1842 + * We do not attempt to write chars from the interrupt routine
1843 + * since the stubs do all of that via putDebugChar() which
1844 + * writes one byte after waiting for the interface to become
1847 + * The debug stubs like to run with interrupts disabled since,
1848 + * after all, they run as a consequence of a breakpoint in
1851 + * Perhaps someone who knows more about the tty driver than I
1852 + * care to learn can make this work for any low level serial
1855 +static void gdb_interrupt(int irq, void *dev_id, struct pt_regs * regs)
1861 + chr = prom_getc_nowait() ;
1862 + more = prom_testc();
1863 + if (chr < 0) continue ;
1865 + /* If we receive a Ctrl-C then this is GDB trying to break in */
1868 + /* Replace current instruction with breakpoint */
1869 + set_async_breakpoint(regs->cp0_epc);
1874 + printk("gdb_interrupt: chr=%02x '%c', more = %x\n",
1875 + chr, chr > ' ' && chr < 0x7F ? chr : ' ', more) ;
1878 + if (atomic_read(&gdb_buf_in_cnt) >= GDB_BUF_SIZE)
1879 + { /* buffer overflow, clear it */
1880 + gdb_buf_in_inx = 0 ;
1881 + atomic_set(&gdb_buf_in_cnt, 0) ;
1882 + gdb_buf_out_inx = 0 ;
1886 + gdb_buf[gdb_buf_in_inx++] = chr ;
1887 + gdb_buf_in_inx &= (GDB_BUF_SIZE - 1) ;
1888 + atomic_inc(&gdb_buf_in_cnt) ;
1892 +} /* gdb_interrupt */
1897 + * This is a GDB stub routine. It waits for a character from the
1898 + * serial interface and then returns it. If there is no serial
1899 + * interface connection then it returns a bogus value which will
1900 + * almost certainly cause the system to hang.
1902 +int getDebugChar(void)
1904 + volatile int chr ;
1907 + printk("getDebugChar: ") ;
1910 + while ( (chr = read_char()) < 0 ) ;
1913 + printk("%c\n", chr > ' ' && chr < 0x7F ? chr : ' ') ;
1917 +} /* getDebugChar */
1922 + * This is a GDB stub routine. It waits until the interface is ready
1923 + * to transmit a char and then sends it. If there is no serial
1924 + * interface connection then it simply returns to its caller, having
1925 + * pretended to send the char.
1927 +int putDebugChar(unsigned char chr)
1930 + printk("putDebugChar: chr=%02x '%c'\n", chr,
1931 + chr > ' ' && chr < 0x7F ? chr : ' ') ;
1934 + prom_putc(chr) ; /* this routine will wait */
1937 +} /* putDebugChar */
1939 +/* Just a NULL routine for testing. */
1940 +void gdb_null(void)
1944 +void rs_kgdb_hook(int tty_no)
1946 + printk("rs_kgdb_hook: tty %d\n", tty_no);
1948 + /* Call GDB routine to setup the exception vectors for the debugger */
1949 + set_debug_traps();
1951 + printk("Breaking into debugger...\n");
1954 + printk("Connected.\n");
1956 + gdb_initialized = 1;
1958 +#ifdef CONFIG_GDB_CONSOLE
1959 + register_gdb_console();
1963 +void kgdb_hook_irq()
1968 + printk("GDB: Hooking UART interrupt\n");
1970 + retval = request_irq(INTERRUPT_ID_UART,
1973 + "GDB-stub", NULL);
1976 + printk("gdb_hook: request_irq(irq=%d) failed: %d\n", INTERRUPT_ID_UART, retval);
1978 + // Enable UART config Rx not empty IRQ
1979 + uMask = READ16(stUart->intMask) ;
1980 + // printk("intMask: 0x%x\n", uMask);
1981 + WRITE16(stUart->intMask, uMask | RXFIFONE);
1985 diff -urN linux-2.6.8.1/arch/mips/brcm-boards/generic/int-handler.S linux-2.6.8.1-brcm63xx/arch/mips/brcm-boards/generic/int-handler.S
1986 --- linux-2.6.8.1/arch/mips/brcm-boards/generic/int-handler.S 1970-01-01 01:00:00.000000000 +0100
1987 +++ linux-2.6.8.1-brcm63xx/arch/mips/brcm-boards/generic/int-handler.S 2006-06-26 09:07:08.000000000 +0200
1991 + Copyright 2002 Broadcom Corp. All Rights Reserved.
1993 + This program is free software; you can distribute it and/or modify it
1994 + under the terms of the GNU General Public License (Version 2) as
1995 + published by the Free Software Foundation.
1997 + This program is distributed in the hope it will be useful, but WITHOUT
1998 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
1999 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
2002 + You should have received a copy of the GNU General Public License along
2003 + with this program; if not, write to the Free Software Foundation, Inc.,
2004 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
2008 + * Generic interrupt handler for Broadcom MIPS boards
2011 +#include <linux/config.h>
2013 +#include <asm/asm.h>
2014 +#include <asm/mipsregs.h>
2015 +#include <asm/regdef.h>
2016 +#include <asm/stackframe.h>
2021 + * 0 Software (ignored)
2022 + * 1 Software (ignored)
2023 + * 2 Combined hardware interrupt (hw0)
2035 + NESTED(brcmIRQ, PT_SIZE, sp)
2041 + jal brcm_irq_dispatch
2048 --- linux-2.6.8.1/arch/mips/Kconfig 2004-08-14 12:55:32.000000000 +0200
2049 +++ linux-2.6.8.1-brcm63xx/arch/mips/Kconfig 2006-06-26 09:07:08.000000000 +0200
2052 menu "Machine selection"
2054 +# CONFIG_MIPS_BRCM Begin Broadcom changed code.
2057 + bool "Support for the Broadcom boards"
2059 + This is a family of boards based on the Broadcom MIPS32
2061 +source "arch/mips/brcm-boards/bcm963xx/Kconfig"
2063 +# CONFIG_MIPS_BRCM End Broadcom changed code.
2066 bool "Support for the Jazz family of machines"
2070 select DMA_NONCOHERENT
2072 + select SWAP_IO_SPACE
2075 bool "Support for Cobalt Server (EXPERIMENTAL)"
2079 select RM7000_CPU_SCACHE
2080 + select SWAP_IO_SPACE
2082 This is an evaluation board based on the Galileo GT-96100 LAN/WAN
2083 communications controllers containing a MIPS R5000 compatible core
2085 bool "Support for MIPS Atlas board"
2086 select DMA_NONCOHERENT
2088 + select SWAP_IO_SPACE
2090 This enables support for the QED R5231-based MIPS Atlas evaluation
2093 select HAVE_STD_PC_SERIAL_PORT
2094 select DMA_NONCOHERENT
2096 + select SWAP_IO_SPACE
2098 This enables support for the VR5000-based MIPS Malta evaluation
2103 select RM7000_CPU_SCACHE
2104 + select SWAP_IO_SPACE
2106 The Ocelot is a MIPS-based Single Board Computer (SBC) made by
2107 Momentum Computer <http://www.momenco.com/>.
2111 select RM7000_CPU_SCACHE
2112 + select SWAP_IO_SPACE
2114 The Ocelot is a MIPS-based Single Board Computer (SBC) made by
2115 Momentum Computer <http://www.momenco.com/>.
2119 select RM7000_CPU_SCACHE
2120 + select SWAP_IO_SPACE
2122 The Ocelot is a MIPS-based Single Board Computer (SBC) made by
2123 Momentum Computer <http://www.momenco.com/>.
2127 select RM7000_CPU_SCACHE
2128 + select SWAP_IO_SPACE
2130 The Jaguar ATX is a MIPS-based Single Board Computer (SBC) made by
2131 Momentum Computer <http://www.momenco.com/>.
2136 + select SWAP_IO_SPACE
2138 Yosemite is an evaluation board for the RM9000x2 processor
2139 manufactured by PMC-Sierra
2141 select DMA_NONCOHERENT
2142 select IP22_CPU_SCACHE
2144 + select SWAP_IO_SPACE
2146 This are the SGI Indy, Challenge S and Indigo2, as well as certain
2147 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
2148 @@ -529,12 +550,14 @@
2149 depends on SOC_AU1000
2150 select DMA_NONCOHERENT
2152 + select SWAP_IO_SPACE
2156 depends on SOC_AU1100
2157 select DMA_NONCOHERENT
2159 + select SWAP_IO_SPACE
2164 bool "Support for Broadcom BCM1xxx SOCs (EXPERIMENTAL)"
2165 depends on EXPERIMENTAL
2167 + select SWAP_IO_SPACE
2170 prompt "BCM1xxx SOC-based board"
2172 select DMA_NONCOHERENT
2175 + select SWAP_IO_SPACE
2177 config RWSEM_GENERIC_SPINLOCK
2181 config SWAP_IO_SPACE
2183 - depends on TOSHIBA_JMR3927 || TOSHIBA_RBTX4927 || SIBYTE_SB1xxx_SOC || SGI_IP22 || MOMENCO_OCELOT_C || MOMENCO_OCELOT_G || MOMENCO_OCELOT || MOMENCO_JAGUAR_ATX || MIPS_MALTA || MIPS_ATLAS || MIPS_EV96100 || MIPS_PB1100 || MIPS_PB1000
2187 # Unfortunately not all GT64120 systems run the chip at the same clock.
2188 --- linux-2.6.8.1/arch/mips/kernel/cpu-probe.c 2004-08-14 12:55:10.000000000 +0200
2189 +++ linux-2.6.8.1-brcm63xx/arch/mips/kernel/cpu-probe.c 2006-06-26 09:07:09.000000000 +0200
2190 @@ -538,6 +538,27 @@
2194 +#if defined(CONFIG_MIPS_BRCM)
2195 +static inline void cpu_probe_broadcom(struct cpuinfo_mips *c)
2197 + decode_config1(c);
2198 + switch (c->processor_id & 0xff00) {
2199 + case PRID_IMP_BCM6338:
2200 + c->cputype = CPU_BCM6338;
2202 + case PRID_IMP_BCM6345:
2203 + c->cputype = CPU_BCM6345;
2205 + case PRID_IMP_BCM6348:
2206 + c->cputype = CPU_BCM6348;
2209 + c->cputype = CPU_UNKNOWN;
2215 static inline void cpu_probe_sandcraft(struct cpuinfo_mips *c)
2218 @@ -576,6 +597,11 @@
2219 case PRID_COMP_SIBYTE:
2220 cpu_probe_sibyte(c);
2222 +#if defined(CONFIG_MIPS_BRCM)
2223 + case PRID_COMP_BROADCOM:
2224 + cpu_probe_broadcom(c);
2228 case PRID_COMP_SANDCRAFT:
2229 cpu_probe_sandcraft(c);
2230 --- linux-2.6.8.1/arch/mips/kernel/gdb-stub.c 2004-08-14 12:56:23.000000000 +0200
2231 +++ linux-2.6.8.1-brcm63xx/arch/mips/kernel/gdb-stub.c 2006-06-26 09:07:09.000000000 +0200
2233 static unsigned char *mem2hex(char *mem, char *buf, int count, int may_fault);
2234 void handle_exception(struct gdb_regs *regs);
2239 * spin locks for smp case
2241 --- linux-2.6.8.1/arch/mips/kernel/irq.c 2004-08-14 12:54:50.000000000 +0200
2242 +++ linux-2.6.8.1-brcm63xx/arch/mips/kernel/irq.c 2006-06-26 09:07:09.000000000 +0200
2245 * Controller mappings for all interrupt sources:
2247 -irq_desc_t irq_desc[NR_IRQS] __cacheline_aligned = {
2248 - [0 ... NR_IRQS-1] = {
2249 - .handler = &no_irq_type,
2250 - .lock = SPIN_LOCK_UNLOCKED
2253 +irq_desc_t irq_desc[NR_IRQS] __cacheline_aligned;
2255 static void register_irq_proc (unsigned int irq);
2257 @@ -809,7 +804,20 @@
2261 -void __init init_generic_irq(void)
2263 +extern void breakpoint(void);
2264 +extern void set_debug_traps(void);
2266 +static int kgdb_flag = 1;
2267 +static int __init nokgdb(char *str)
2272 +__setup("nokgdb", nokgdb);
2275 +void __init init_IRQ(void)
2279 @@ -818,7 +826,18 @@
2280 irq_desc[i].action = NULL;
2281 irq_desc[i].depth = 1;
2282 irq_desc[i].handler = &no_irq_type;
2283 + irq_desc[i].lock = SPIN_LOCK_UNLOCKED;
2290 + printk("Wait for gdb client connection ...\n");
2291 + set_debug_traps();
2297 EXPORT_SYMBOL(disable_irq_nosync);
2300 static struct proc_dir_entry * smp_affinity_entry [NR_IRQS];
2302 -static cpumask_t irq_affinity [NR_IRQS] = { [0 ... NR_IRQS-1] = ~0UL };
2303 +static cpumask_t irq_affinity [NR_IRQS] = { [0 ... NR_IRQS-1] = CPU_MASK_ALL };
2304 static int irq_affinity_read_proc (char *page, char **start, off_t off,
2305 int count, int *eof, void *data)
2307 --- linux-2.6.8.1/arch/mips/kernel/Makefile 2004-08-14 12:55:19.000000000 +0200
2308 +++ linux-2.6.8.1-brcm63xx/arch/mips/kernel/Makefile 2006-06-26 09:07:09.000000000 +0200
2310 ptrace.o reset.o semaphore.o setup.o signal.o syscall.o \
2311 time.o traps.o unaligned.o
2313 +# CONFIG_MIPS_BRCM Begin Broadcom added code.
2314 +# gcc 3.4.x reorders code with -Os and -O2, breaking the save_static stuff.
2315 +CFLAGS_syscall.o := -O1
2316 +CFLAGS_signal.o := -O1
2317 +CFLAGS_signal32.o := -O1
2318 +# CONFIG_MIPS_BRCM End Broadcom added code.
2320 ifdef CONFIG_MODULES
2321 obj-y += mips_ksyms.o module.o
2322 obj-$(CONFIG_MIPS32) += module-elf32.o
2323 --- linux-2.6.8.1/arch/mips/kernel/proc.c 2004-08-14 12:55:09.000000000 +0200
2324 +++ linux-2.6.8.1-brcm63xx/arch/mips/kernel/proc.c 2006-06-26 09:07:09.000000000 +0200
2326 [CPU_VR4133] "NEC VR4133",
2327 [CPU_VR4181] "NEC VR4181",
2328 [CPU_VR4181A] "NEC VR4181A",
2329 +#if defined(CONFIG_MIPS_BRCM)
2330 + [CPU_BCM6338] "BCM6338",
2331 + [CPU_BCM6345] "BCM6345",
2332 + [CPU_BCM6348] "BCM6348",
2334 [CPU_SR71000] "Sandcraft SR71000"
2337 --- linux-2.6.8.1/arch/mips/kernel/scall32-o32.S 2004-08-14 12:54:49.000000000 +0200
2338 +++ linux-2.6.8.1-brcm63xx/arch/mips/kernel/scall32-o32.S 2006-06-26 12:42:05.000000000 +0200
2341 .size sys_call_table, . - sys_call_table
2343 - .macro sys function, nargs
2344 + /*.macro sys function, nargs
2351 --- linux-2.6.8.1/arch/mips/kernel/time.c 2004-08-14 12:55:20.000000000 +0200
2352 +++ linux-2.6.8.1-brcm63xx/arch/mips/kernel/time.c 2006-06-26 09:07:09.000000000 +0200
2353 @@ -274,11 +274,15 @@
2355 /* .. relative to previous jiffy (32 bits is enough) */
2359 __asm__("multu %1,%2"
2361 : "r" (count), "r" (sll32_usecs_per_cycle)
2362 +#if defined(CONFIG_MIPS_BRCM)
2369 * Due to possible jiffies inconsistencies, we need to check
2370 @@ -333,7 +337,11 @@
2371 __asm__("multu %1,%2"
2373 : "r" (count), "r" (quotient)
2374 +#if defined(CONFIG_MIPS_BRCM)
2381 * Due to possible jiffies inconsistencies, we need to check
2382 @@ -375,7 +383,11 @@
2383 : "r" (timerhi), "m" (timerlo),
2384 "r" (tmp), "r" (USECS_PER_JIFFY),
2385 "r" (USECS_PER_JIFFY_FRAC)
2386 +#if defined(CONFIG_MIPS_BRCM)
2389 : "hi", "lo", "accum");
2391 cached_quotient = quotient;
2394 @@ -389,7 +401,11 @@
2395 __asm__("multu %1,%2"
2397 : "r" (count), "r" (quotient)
2398 +#if defined(CONFIG_MIPS_BRCM)
2405 * Due to possible jiffies inconsistencies, we need to check
2407 board_timer_setup(&timer_irqaction);
2412 #define STARTOFTIME 1970
2413 #define SECDAY 86400L
2414 --- linux-2.6.8.1/arch/mips/kernel/traps.c 2004-08-14 12:55:20.000000000 +0200
2415 +++ linux-2.6.8.1-brcm63xx/arch/mips/kernel/traps.c 2006-06-26 09:07:09.000000000 +0200
2416 @@ -246,6 +246,13 @@
2418 static spinlock_t die_lock = SPIN_LOCK_UNLOCKED;
2420 +#if defined(CONFIG_MIPS_BRCM)
2421 +#ifdef CONFIG_REMOTE_DEBUG
2422 +#include <asm/gdb-stub.h>
2423 +extern void handle_exception(struct gdb_regs *regs);
2427 NORET_TYPE void __die(const char * str, struct pt_regs * regs,
2428 const char * file, const char * func, unsigned long line)
2430 @@ -258,7 +265,33 @@
2431 printk(" in %s:%s, line %ld", file, func, line);
2432 printk("[#%d]:\n", ++die_counter);
2433 show_registers(regs);
2434 +#if defined(CONFIG_MIPS_BRCM)
2435 +#ifdef CONFIG_REMOTE_DEBUG
2437 + struct gdb_regs regs2;
2441 + ptr = ®s2.reg0;
2442 + /* Copy registers to GDB structure */
2443 + for(i=0; i<32;i++)
2444 + *ptr++ = regs->regs[i];
2446 + regs2.lo = regs->lo;
2447 + regs2.hi = regs->hi;
2448 + regs2.cp0_epc = regs->cp0_epc;
2449 + regs2.cp0_badvaddr = regs->cp0_badvaddr;
2450 + regs2.cp0_status = regs->cp0_status;
2451 + regs2.cp0_cause = regs->cp0_cause;
2453 + handle_exception(®s2); /* Break to GDB */
2457 spin_unlock_irq(&die_lock);
2458 + /* Ron add for kernel crash */
2459 + (*(volatile unsigned int *)(0xfffe040c)) &= ~(1<<5);
2460 + machine_restart(NULL);
2464 --- linux-2.6.8.1/arch/mips/Makefile 2004-08-14 12:54:47.000000000 +0200
2465 +++ linux-2.6.8.1-brcm63xx/arch/mips/Makefile 2006-06-26 09:07:09.000000000 +0200
2469 ifdef CONFIG_CROSSCOMPILE
2470 +# CONFIG_MIPS_BRCM Begin Broadcom added code.
2471 +ifdef CONFIG_MIPS_BRCM
2472 +CROSS_COMPILE := mips-linux-uclibc-#$(tool-prefix)
2474 CROSS_COMPILE := $(tool-prefix)
2476 +# CONFIG_MIPS_BRCM End Broadcom added code.
2480 # GCC uses -G 0 -mabicalls -fpic as default. We don't want PIC in the kernel
2482 cflags-y := -I $(TOPDIR)/include/asm/gcc
2483 cflags-y += -G 0 -mno-abicalls -fno-pic -pipe
2484 cflags-y += $(call check_gcc, -finline-limit=100000,)
2485 +ifeq ($(strip $(JTAG_KERNEL_DEBUG)),y)
2488 LDFLAGS_vmlinux += -G 0 -static -n
2489 MODFLAGS += -mlong-calls
2493 check_warning = $(shell if $(CC) $(1) -c -o /dev/null -xc /dev/null > /dev/null 2>&1; then echo "$(1)"; else echo "$(2)"; fi)
2495 +# CONFIG_MIPS_BRCM Begin Broadcom changed code.
2496 +ifdef CONFIG_MIPS_BRCM
2497 +cflags-$(CONFIG_REMOTE_DEBUG) += -ggdb
2499 +# CONFIG_MIPS_BRCM End Broadcom changed code.
2502 # Use: $(call set_gccflags,<cpu0>,<isa0>,<cpu1>,<isa1>,<isa2>)
2504 @@ -302,6 +317,20 @@
2505 libs-$(CONFIG_BAGET_MIPS) += arch/mips/baget/ arch/mips/baget/prom/
2506 load-$(CONFIG_BAGET_MIPS) += 0x80001000
2508 +# CONFIG_MIPS_BRCM Begin Broadcom added code.
2509 +ifdef CONFIG_MIPS_BRCM
2512 +core-$(CONFIG_BCM96338) += arch/mips/brcm-boards/generic/ arch/mips/brcm-boards/bcm963xx/
2513 +cflags-$(CONFIG_BCM96338) += -Iinclude/asm-mips/mach-bcm963xx
2514 +core-$(CONFIG_BCM96345) += arch/mips/brcm-boards/generic/ arch/mips/brcm-boards/bcm963xx/
2515 +cflags-$(CONFIG_BCM96345) += -Iinclude/asm-mips/mach-bcm963xx
2516 +core-$(CONFIG_BCM96348) += arch/mips/brcm-boards/generic/ arch/mips/brcm-boards/bcm963xx/
2517 +cflags-$(CONFIG_BCM96348) += -Iinclude/asm-mips/mach-bcm963xx
2518 +load-$(CONFIG_MIPS_BRCM) += 0x80010000
2520 +# CONFIG_MIPS_BRCM End Broadcom added code.
2525 --- linux-2.6.8.1/arch/mips/mm/c-r4k.c 2004-08-14 12:56:22.000000000 +0200
2526 +++ linux-2.6.8.1-brcm63xx/arch/mips/mm/c-r4k.c 2006-06-26 09:07:09.000000000 +0200
2529 static void (* r4k_blast_dcache)(void);
2531 -static void r4k_blast_dcache_setup(void)
2532 +static inline void r4k_blast_dcache_setup(void)
2534 unsigned long dc_lsize = cpu_dcache_line_size();
2537 static void r4k_flush_icache_range(unsigned long start, unsigned long end)
2539 unsigned long dc_lsize = current_cpu_data.dcache.linesz;
2540 + unsigned long ic_lsize = current_cpu_data.icache.linesz;
2541 unsigned long addr, aend;
2543 if (!cpu_has_ic_fills_f_dc) {
2544 @@ -407,14 +408,14 @@
2545 if (end - start > icache_size)
2548 - addr = start & ~(dc_lsize - 1);
2549 - aend = (end - 1) & ~(dc_lsize - 1);
2550 + addr = start & ~(ic_lsize - 1);
2551 + aend = (end - 1) & ~(ic_lsize - 1);
2553 /* Hit_Invalidate_I */
2554 protected_flush_icache_line(addr);
2562 @@ -802,6 +803,13 @@
2563 if (!(config & MIPS_CONF_M))
2564 panic("Don't know how to probe P-caches on this cpu.");
2566 +#if defined(CONFIG_MIPS_BRCM)
2567 + if (c->cputype == CPU_BCM6338 || c->cputype == CPU_BCM6345 || c->cputype == CPU_BCM6348){
2568 + printk("brcm mips: enabling icache and dcache...\n");
2569 + /* Enable caches */
2570 + write_c0_diag(read_c0_diag() | 0xC0000000);
2574 * So we seem to be a MIPS32 or MIPS64 CPU
2575 * So let's probe the I-cache ...
2576 --- linux-2.6.8.1/arch/mips/pci/fixup-bcm96348.c 1970-01-01 01:00:00.000000000 +0100
2577 +++ linux-2.6.8.1-brcm63xx/arch/mips/pci/fixup-bcm96348.c 2006-06-26 09:07:09.000000000 +0200
2581 + Copyright 2002 Broadcom Corp. All Rights Reserved.
2583 + This program is free software; you can distribute it and/or modify it
2584 + under the terms of the GNU General Public License (Version 2) as
2585 + published by the Free Software Foundation.
2587 + This program is distributed in the hope it will be useful, but WITHOUT
2588 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
2589 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
2592 + You should have received a copy of the GNU General Public License along
2593 + with this program; if not, write to the Free Software Foundation, Inc.,
2594 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
2597 +#include <linux/init.h>
2598 +#include <linux/types.h>
2599 +#include <linux/pci.h>
2601 +#include <bcmpci.h>
2602 +#include <bcm_intr.h>
2603 +#include <bcm_map_part.h>
2605 +static volatile MpiRegisters * mpi = (MpiRegisters *)(MPI_BASE);
2607 +static char irq_tab_bcm96348[] __initdata = {
2608 + [0] = INTERRUPT_ID_MPI,
2609 + [1] = INTERRUPT_ID_MPI,
2610 +#if defined(CONFIG_USB)
2611 + [USB_HOST_SLOT] = INTERRUPT_ID_USBH
2615 +int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
2617 + return irq_tab_bcm96348[slot];
2620 +static void bcm96348_fixup(struct pci_dev *dev)
2625 + memaddr = pci_resource_start(dev, 0);
2626 + size = pci_resource_len(dev, 0);
2628 + switch (PCI_SLOT(dev->devfn)) {
2630 + // UBUS to PCI address range
2631 + // Memory Window 1. Mask determines which bits are decoded.
2632 + mpi->l2pmrange1 = ~(size-1);
2633 + // UBUS to PCI Memory base address. This is akin to the ChipSelect base
2635 + mpi->l2pmbase1 = memaddr & BCM_PCI_ADDR_MASK;
2636 + // UBUS to PCI Remap Address. Replaces the masked address bits in the
2637 + // range register with this setting.
2638 + // Also, enable direct I/O and direct Memory accesses
2639 + mpi->l2pmremap1 = (memaddr | MEM_WINDOW_EN);
2643 + // Memory Window 2
2644 + mpi->l2pmrange2 = ~(size-1);
2645 + // UBUS to PCI Memory base address.
2646 + mpi->l2pmbase2 = memaddr & BCM_PCI_ADDR_MASK;
2647 + // UBUS to PCI Remap Address
2648 + mpi->l2pmremap2 = (memaddr | MEM_WINDOW_EN);
2651 +#if defined(CONFIG_USB)
2652 + case USB_HOST_SLOT:
2653 + dev->resource[0].start = USB_HOST_BASE;
2654 + dev->resource[0].end = USB_HOST_BASE+USB_BAR0_MEM_SIZE-1;
2660 +struct pci_fixup pcibios_fixups[] = {
2661 + { PCI_FIXUP_FINAL, PCI_ANY_ID, PCI_ANY_ID, bcm96348_fixup },
2664 --- linux-2.6.8.1/arch/mips/pci/ops-bcm96348.c 1970-01-01 01:00:00.000000000 +0100
2665 +++ linux-2.6.8.1-brcm63xx/arch/mips/pci/ops-bcm96348.c 2006-06-26 09:07:09.000000000 +0200
2669 + Copyright 2002 Broadcom Corp. All Rights Reserved.
2671 + This program is free software; you can distribute it and/or modify it
2672 + under the terms of the GNU General Public License (Version 2) as
2673 + published by the Free Software Foundation.
2675 + This program is distributed in the hope it will be useful, but WITHOUT
2676 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
2677 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
2680 + You should have received a copy of the GNU General Public License along
2681 + with this program; if not, write to the Free Software Foundation, Inc.,
2682 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
2685 +#include <linux/types.h>
2686 +#include <linux/pci.h>
2687 +#include <linux/kernel.h>
2688 +#include <linux/init.h>
2689 +#include <asm/addrspace.h>
2691 +#include <bcm_intr.h>
2692 +#include <bcm_map_part.h>
2693 +#include <bcmpci.h>
2695 +#include <linux/delay.h>
2697 +#if defined(CONFIG_USB)
2699 +#define DPRINT(x...) printk(x)
2701 +#define DPRINT(x...)
2705 +pci63xx_int_read(unsigned int devfn, int where, u32 * value, int size);
2707 +pci63xx_int_write(unsigned int devfn, int where, u32 * value, int size);
2709 +static bool usb_mem_size_rd = FALSE;
2710 +static uint32 usb_mem_base = 0;
2711 +static uint32 usb_cfg_space_cmd_reg = 0;
2713 +static bool pci_mem_size_rd = FALSE;
2715 +static volatile MpiRegisters * mpi = (MpiRegisters *)(MPI_BASE);
2717 +static void mpi_SetupPciConfigAccess(uint32 addr)
2719 + mpi->l2pcfgctl = (DIR_CFG_SEL | DIR_CFG_USEREG | addr) & ~CONFIG_TYPE;
2722 +static void mpi_ClearPciConfigAccess(void)
2724 + mpi->l2pcfgctl = 0x00000000;
2727 +#if defined(CONFIG_USB)
2728 +/* --------------------------------------------------------------------------
2729 + Name: pci63xx_int_write
2730 +Abstract: PCI Config write on internal device(s)
2731 + -------------------------------------------------------------------------- */
2733 +pci63xx_int_write(unsigned int devfn, int where, u32 * value, int size)
2735 + if (PCI_SLOT(devfn) != USB_HOST_SLOT) {
2736 + return PCIBIOS_SUCCESSFUL;
2741 + DPRINT("W => Slot: %d Where: %2X Len: %d Data: %02X\n",
2742 + PCI_SLOT(devfn), where, size, *value);
2745 + DPRINT("W => Slot: %d Where: %2X Len: %d Data: %04X\n",
2746 + PCI_SLOT(devfn), where, size, *value);
2749 + usb_cfg_space_cmd_reg = *value;
2756 + DPRINT("W => Slot: %d Where: %2X Len: %d Data: %08lX\n",
2757 + PCI_SLOT(devfn), where, size, *value);
2759 + case PCI_BASE_ADDRESS_0:
2760 + if (*value == 0xffffffff) {
2761 + usb_mem_size_rd = TRUE;
2763 + usb_mem_base = *value;
2774 + return PCIBIOS_SUCCESSFUL;
2777 +/* --------------------------------------------------------------------------
2778 + Name: pci63xx_int_read
2779 +Abstract: PCI Config read on internal device(s)
2780 + -------------------------------------------------------------------------- */
2782 +pci63xx_int_read(unsigned int devfn, int where, u32 * value, int size)
2784 + uint32 retValue = 0xFFFFFFFF;
2786 + if (PCI_SLOT(devfn) != USB_HOST_SLOT) {
2787 + return PCIBIOS_SUCCESSFUL;
2790 + // For now, this is specific to the USB Host controller. We can
2791 + // make it more general if we have to...
2792 + // Emulate PCI Config accesses
2794 + case PCI_VENDOR_ID:
2795 + case PCI_DEVICE_ID:
2796 + retValue = PCI_VENDOR_ID_BROADCOM | 0x63000000;
2800 + retValue = (0x0006 << 16) | usb_cfg_space_cmd_reg;
2802 + case PCI_CLASS_REVISION:
2803 + case PCI_CLASS_DEVICE:
2804 + retValue = (PCI_CLASS_SERIAL_USB << 16) | (0x10 << 8) | 0x01;
2806 + case PCI_BASE_ADDRESS_0:
2807 + if (usb_mem_size_rd) {
2808 + retValue = USB_BAR0_MEM_SIZE;
2810 + if (usb_mem_base != 0)
2811 + retValue = usb_mem_base;
2813 + retValue = USB_HOST_BASE;
2815 + usb_mem_size_rd = FALSE;
2817 + case PCI_CACHE_LINE_SIZE:
2818 + case PCI_LATENCY_TIMER:
2821 + case PCI_HEADER_TYPE:
2822 + retValue = PCI_HEADER_TYPE_NORMAL;
2824 + case PCI_SUBSYSTEM_VENDOR_ID:
2825 + retValue = PCI_VENDOR_ID_BROADCOM;
2827 + case PCI_SUBSYSTEM_ID:
2828 + retValue = 0x6300;
2830 + case PCI_INTERRUPT_LINE:
2831 + retValue = INTERRUPT_ID_USBH;
2839 + *value = (retValue >> ((where & 3) << 3)) & 0xff;
2840 + DPRINT("R <= Slot: %d Where: %2X Len: %d Data: %02X\n",
2841 + PCI_SLOT(devfn), where, size, *value);
2844 + *value = (retValue >> ((where & 3) << 3)) & 0xffff;
2845 + DPRINT("R <= Slot: %d Where: %2X Len: %d Data: %04X\n",
2846 + PCI_SLOT(devfn), where, size, *value);
2849 + *value = retValue;
2850 + DPRINT("R <= Slot: %d Where: %2X Len: %d Data: %08lX\n",
2851 + PCI_SLOT(devfn), where, size, *value);
2857 + return PCIBIOS_SUCCESSFUL;
2861 +static int bcm96348_pcibios_read(struct pci_bus *bus, unsigned int devfn,
2862 + int where, int size, u32 * val)
2864 + volatile unsigned char *ioBase = (unsigned char *)(mpi->l2piobase | KSEG1);
2867 +#if defined(CONFIG_USB)
2868 + if (PCI_SLOT(devfn) == USB_HOST_SLOT)
2869 + return pci63xx_int_read(devfn, where, val, size);
2872 + mpi_SetupPciConfigAccess(BCM_PCI_CFG(PCI_SLOT(devfn), PCI_FUNC(devfn), where));
2873 + data = *(uint32 *)ioBase;
2876 + *val = (data >> ((where & 3) << 3)) & 0xff;
2879 + *val = (data >> ((where & 3) << 3)) & 0xffff;
2883 + /* Special case for reading PCI device range */
2884 + if ((where >= PCI_BASE_ADDRESS_0) && (where <= PCI_BASE_ADDRESS_5)) {
2885 + if (pci_mem_size_rd) {
2886 + /* bcm6348 PCI memory window minimum size is 64K */
2887 + *val &= PCI_SIZE_64K;
2894 + pci_mem_size_rd = FALSE;
2895 + mpi_ClearPciConfigAccess();
2897 + return PCIBIOS_SUCCESSFUL;
2900 +static int bcm96348_pcibios_write(struct pci_bus *bus, unsigned int devfn,
2901 + int where, int size, u32 val)
2903 + volatile unsigned char *ioBase = (unsigned char *)(mpi->l2piobase | KSEG1);
2906 +#if defined(CONFIG_USB)
2907 + if (PCI_SLOT(devfn) == USB_HOST_SLOT)
2908 + return pci63xx_int_write(devfn, where, &val, size);
2910 + mpi_SetupPciConfigAccess(BCM_PCI_CFG(PCI_SLOT(devfn), PCI_FUNC(devfn), where));
2911 + data = *(uint32 *)ioBase;
2914 + data = (data & ~(0xff << ((where & 3) << 3))) |
2915 + (val << ((where & 3) << 3));
2918 + data = (data & ~(0xffff << ((where & 3) << 3))) |
2919 + (val << ((where & 3) << 3));
2923 + /* Special case for reading PCI device range */
2924 + if ((where >= PCI_BASE_ADDRESS_0) && (where <= PCI_BASE_ADDRESS_5)) {
2925 + if (val == 0xffffffff)
2926 + pci_mem_size_rd = TRUE;
2932 + *(uint32 *)ioBase = data;
2934 + mpi_ClearPciConfigAccess();
2936 + return PCIBIOS_SUCCESSFUL;
2939 +struct pci_ops bcm96348_pci_ops = {
2940 + .read = bcm96348_pcibios_read,
2941 + .write = bcm96348_pcibios_write
2943 --- linux-2.6.8.1/arch/mips/pci/Makefile 2004-08-14 12:54:47.000000000 +0200
2944 +++ linux-2.6.8.1-brcm63xx/arch/mips/pci/Makefile 2006-06-26 09:07:09.000000000 +0200
2946 obj-$(CONFIG_MIPS_NILE4) += ops-nile4.o
2947 obj-$(CONFIG_MIPS_TX3927) += ops-jmr3927.o
2948 obj-$(CONFIG_PCI_VR41XX) += ops-vr41xx.o pci-vr41xx.o
2949 +obj-$(CONFIG_PCI_VR41XX) += ops-vr41xx.o pci-vr41xx.o
2950 +obj-$(CONFIG_BCM_PCI) += fixup-bcm96348.o pci-bcm96348.o ops-bcm96348.o
2953 # These are still pretty much in the old state, watch, go blind.
2955 obj-$(CONFIG_TOSHIBA_RBTX4927) += fixup-rbtx4927.o ops-tx4927.o
2956 obj-$(CONFIG_VICTOR_MPC30X) += fixup-mpc30x.o
2957 obj-$(CONFIG_ZAO_CAPCELLA) += fixup-capcella.o
2959 +ifeq "$(CONFIG_BCM_PCI)" "y"
2960 +EXTRA_CFLAGS += -I$(INC_BRCMDRIVER_PUB_PATH)/$(BRCM_BOARD)
2962 --- linux-2.6.8.1/arch/mips/pci/pci-bcm96348.c 1970-01-01 01:00:00.000000000 +0100
2963 +++ linux-2.6.8.1-brcm63xx/arch/mips/pci/pci-bcm96348.c 2006-06-26 09:07:09.000000000 +0200
2967 + Copyright 2002 Broadcom Corp. All Rights Reserved.
2969 + This program is free software; you can distribute it and/or modify it
2970 + under the terms of the GNU General Public License (Version 2) as
2971 + published by the Free Software Foundation.
2973 + This program is distributed in the hope it will be useful, but WITHOUT
2974 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
2975 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
2978 + You should have received a copy of the GNU General Public License along
2979 + with this program; if not, write to the Free Software Foundation, Inc.,
2980 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
2983 +#include <linux/types.h>
2984 +#include <linux/pci.h>
2985 +#include <linux/kernel.h>
2986 +#include <linux/init.h>
2988 +#include <asm/pci_channel.h>
2989 +#include <bcmpci.h>
2991 +static struct resource bcm_pci_io_resource = {
2992 + .name = "bcm96348 pci IO space",
2993 + .start = BCM_PCI_IO_BASE,
2994 + .end = BCM_PCI_IO_BASE + BCM_PCI_IO_SIZE_64KB - 1,
2995 + .flags = IORESOURCE_IO
2998 +static struct resource bcm_pci_mem_resource = {
2999 + .name = "bcm96348 pci memory space",
3000 + .start = BCM_PCI_MEM_BASE,
3001 + .end = BCM_PCI_MEM_BASE + BCM_PCI_MEM_SIZE_16MB - 1,
3002 + .flags = IORESOURCE_MEM
3005 +extern struct pci_ops bcm96348_pci_ops;
3007 +struct pci_controller bcm96348_controller = {
3008 + .pci_ops = &bcm96348_pci_ops,
3009 + .io_resource = &bcm_pci_io_resource,
3010 + .mem_resource = &bcm_pci_mem_resource,
3013 +static void bcm96348_pci_init(void)
3015 + register_pci_controller(&bcm96348_controller);
3018 +arch_initcall(bcm96348_pci_init);
3019 --- linux-2.6.8.1/drivers/mtd/maps/bcm963xx.c 1970-01-01 01:00:00.000000000 +0100
3020 +++ linux-2.6.8.1-brcm63xx/drivers/mtd/maps/bcm963xx.c 2006-06-26 09:07:13.000000000 +0200
3023 + * A simple flash mapping code for BCM963xx board flash memory
3024 + * It is simple because it only treats all the flash memory as ROM
3025 + * It is used with chips/map_rom.c
3027 + * Song Wang (songw@broadcom.com)
3029 +#include <linux/module.h>
3030 +#include <linux/types.h>
3031 +#include <linux/kernel.h>
3032 +#include <linux/init.h>
3033 +#include <asm/io.h>
3034 +#include <linux/mtd/mtd.h>
3035 +#include <linux/mtd/map.h>
3036 +#include <linux/config.h>
3037 +#include <linux/mtd/partitions.h>
3040 +#include <bcmTag.h>
3041 +#define VERSION "1.0"
3044 +extern PFILE_TAG kerSysImageTagGet(void);
3046 +static struct mtd_info *mymtd;
3047 +static struct mtd_partition brcm_partition_info[4];
3049 +#define CFE_ADDR 0xbfc00000
3050 +#define CFE_SIZE 64 << 10
3051 +#define FLASH_2M_SIZE 2048 << 10
3052 +#define FLASH_4M_SIZE 4096 << 10
3053 +#define NVRAM_SIZE 64 << 10
3054 +#define TAG_SIZE 0x100
3055 +#define FS_KERNEL_SIZE_4M 0x3E0000
3056 +#define NVRAM_ADDR_4M 0x3F0000
3058 +static map_word brcm_physmap_read16(struct map_info *map, unsigned long ofs)
3062 + val.x[0] = __raw_readw(map->map_priv_1 + ofs);
3067 +void brcm_physmap_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
3069 + memcpy_fromio(to, map->map_priv_1 + from, len);
3072 +static void brcm_physmap_write16(struct map_info *map, __u16 d, unsigned long adr)
3074 + __raw_writew(d, map->map_priv_1 + adr);
3078 +void brcm_physmap_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
3080 + memcpy_toio(map->map_priv_1 + to, from, len);
3083 +struct map_info brcm_physmap_map = {
3084 + .name = "Physically mapped flash",
3086 + .read = brcm_physmap_read16,
3087 + .copy_from = brcm_physmap_copy_from,
3088 + .write = brcm_physmap_write16,
3089 + .copy_to = brcm_physmap_copy_to
3095 +int __init init_brcm_physmap(void)
3097 + PFILE_TAG pTag = NULL;
3098 + u_int32_t rootfs_addr, kernel_addr,fs_len,cfe_len;
3099 + FLASH_ADDR_INFO info;
3101 + kerSysFlashAddrInfoGet( &info );
3103 + /* Read the flash memory map from flash memory. */
3104 + if (!(pTag = kerSysImageTagGet())) {
3105 + printk("Failed to read image tag from flash\n");
3109 + rootfs_addr = (u_int32_t) simple_strtoul(pTag->rootfsAddress, NULL, 10);
3110 + kernel_addr = (u_int32_t) simple_strtoul(pTag->kernelAddress, NULL, 10);
3113 + brcm_physmap_map.size = FLASH_4M_SIZE;
3115 + fs_len = kernel_addr - rootfs_addr;
3117 + /* Ron mapping from fs */
3118 + brcm_physmap_map.map_priv_1 = (unsigned long)CFE_ADDR;
3120 + if (!brcm_physmap_map.map_priv_1) {
3121 + printk("Wrong flash starting address\n");
3125 + if (brcm_physmap_map.size <= 0) {
3126 + printk("Wrong flash size\n");
3130 + mymtd = do_map_probe("cfi_probe", &brcm_physmap_map);
3134 + mymtd->owner = THIS_MODULE;
3135 + /* Ron file system */
3136 + brcm_partition_info[0].name = "fs";
3137 + brcm_partition_info[0].offset = (cfe_len + TAG_SIZE);
3138 + brcm_partition_info[0].size = fs_len;
3139 + brcm_partition_info[0].mask_flags = 0;
3141 + /* Ron tag + file system + kernel */
3142 + brcm_partition_info[1].name = "tag+fs+kernel";
3143 + brcm_partition_info[1].offset = cfe_len;
3144 + brcm_partition_info[1].size = FS_KERNEL_SIZE_4M;
3145 + brcm_partition_info[1].mask_flags = 0;
3147 + /* Ron bootloader */
3148 + brcm_partition_info[2].name = "bootloader";
3149 + brcm_partition_info[2].offset = 0x00;
3150 + brcm_partition_info[2].size = cfe_len;
3151 + brcm_partition_info[2].mask_flags = 0;
3154 + brcm_partition_info[3].name = "nvram";
3155 + brcm_partition_info[3].offset = NVRAM_ADDR_4M;
3156 + brcm_partition_info[3].size = NVRAM_SIZE;
3157 + brcm_partition_info[3].mask_flags = 0;
3159 + add_mtd_partitions(mymtd, brcm_partition_info, 4);
3165 +static void __exit cleanup_brcm_physmap(void)
3168 + del_mtd_partitions(mymtd);
3169 + del_mtd_device(mymtd);
3170 + map_destroy(mymtd);
3172 +if (brcm_physmap_map.map_priv_1) {
3173 + brcm_physmap_map.map_priv_1 = 0;
3177 +module_init(init_brcm_physmap);
3178 +module_exit(cleanup_brcm_physmap);
3181 +MODULE_LICENSE("GPL");
3182 +MODULE_AUTHOR("Song Wang songw@broadcom.com");
3183 +MODULE_DESCRIPTION("Configurable MTD map driver for read-only root file system");
3184 --- linux-2.6.8.1/drivers/mtd/maps/Makefile 2004-08-14 12:54:46.000000000 +0200
3185 +++ linux-2.6.8.1-brcm63xx/drivers/mtd/maps/Makefile 2006-06-26 09:07:13.000000000 +0200
3187 obj-$(CONFIG_MTD_SCx200_DOCFLASH)+= scx200_docflash.o
3188 obj-$(CONFIG_MTD_DBOX2) += dbox2-flash.o
3189 obj-$(CONFIG_MTD_OCELOT) += ocelot.o
3190 +obj-$(CONFIG_MTD_LASAT) += lasat.o
3191 obj-$(CONFIG_MTD_SOLUTIONENGINE)+= solutionengine.o
3192 obj-$(CONFIG_MTD_PCI) += pci.o
3193 -obj-$(CONFIG_MTD_PB1XXX) += pb1xxx-flash.o
3194 -obj-$(CONFIG_MTD_DB1X00) += db1x00-flash.o
3195 -obj-$(CONFIG_MTD_PB1550) += pb1550-flash.o
3196 -obj-$(CONFIG_MTD_DB1550) += db1550-flash.o
3197 obj-$(CONFIG_MTD_LASAT) += lasat.o
3198 +obj-$(CONFIG_MTD_DB1X00) += db1x00-flash.o
3199 +obj-$(CONFIG_MTD_PB1550) += pb1550-flash.o
3200 +obj-$(CONFIG_MTD_DB1550) += db1550-flash.o
3201 obj-$(CONFIG_MTD_AUTCPU12) += autcpu12-nvram.o
3202 obj-$(CONFIG_MTD_EDB7312) += edb7312.o
3203 obj-$(CONFIG_MTD_IMPA7) += impa7.o
3205 obj-$(CONFIG_MTD_IXP4XX) += ixp4xx.o
3206 obj-$(CONFIG_MTD_WRSBC8260) += wr_sbc82xx_flash.o
3207 obj-$(CONFIG_MTD_DMV182) += dmv182.o
3208 +obj-$(CONFIG_MTD_PB1000) += pb1xxx-flash.o
3209 +obj-$(CONFIG_MTD_PB1100) += pb1xxx-flash.o
3210 +obj-$(CONFIG_MTD_PB1500) += pb1xxx-flash.o
3211 +obj-$(CONFIG_MTD_DB1X00) += db1x00-flash.o
3212 +# CONFIG_MIPS_BRCM Begin Broadcom changed code.
3213 +obj-$(CONFIG_MTD_BCM963XX) += bcm963xx.o
3214 +EXTRA_CFLAGS += -I$(INC_BRCMDRIVER_PUB_PATH)/$(BRCM_BOARD)
3215 +# CONFIG_MIPS_BRCM End Broadcom changed code.
3216 --- linux-2.6.8.1/drivers/mtd/maps/Kconfig 2004-08-14 12:56:23.000000000 +0200
3217 +++ linux-2.6.8.1-brcm63xx/drivers/mtd/maps/Kconfig 2006-06-26 09:07:13.000000000 +0200
3219 Ignore this option if you use run-time physmap configuration
3220 (i.e., run-time calling physmap_configure()).
3222 +config MTD_BCM963XX
3223 + tristate "Broadcom 963xx ADSL board flash memory support"
3224 + depends on MIPS_BRCM
3226 + Broadcom 963xx ADSL board flash memory
3228 config MTD_SUN_UFLASH
3229 tristate "Sun Microsystems userflash support"
3230 depends on (SPARC32 || SPARC64) && MTD_CFI
3231 @@ -182,41 +188,12 @@
3233 Support for the flash chip on Tsunami TIG bus.
3236 - tristate "Flash chips on LASAT board"
3239 - Support for the flash chips on the Lasat 100 and 200 boards.
3242 tristate "CFI flash device on SnapGear/SecureEdge"
3243 depends on X86 && MTD_PARTITIONS && MTD_JEDECPROBE
3245 Support for flash chips on NETtel/SecureEdge/SnapGear boards.
3248 - tristate "Flash devices on Alchemy PB1xxx boards"
3249 - depends on MIPS && ( MIPS_PB1000 || MIPS_PB1100 || MIPS_PB1500 )
3251 - Flash memory access on Alchemy Pb1000/Pb1100/Pb1500 boards
3253 -config MTD_PB1XXX_BOOT
3254 - bool "PB1x00 boot flash device"
3255 - depends on MTD_PB1XXX && ( MIPS_PB1100 || MIPS_PB1500 )
3257 - Use the first of the two 32MiB flash banks on Pb1100/Pb1500 board.
3258 - You can say 'Y' to both this and 'MTD_PB1XXX_USER' below, to use
3261 -config MTD_PB1XXX_USER
3262 - bool "PB1x00 user flash device"
3263 - depends on MTD_PB1XXX && ( MIPS_PB1100 || MIPS_PB1500 )
3264 - default y if MTD_PB1XX_BOOT = n
3266 - Use the second of the two 32MiB flash banks on Pb1100/Pb1500 board.
3267 - You can say 'Y' to both this and 'MTD_PB1XXX_BOOT' above, to use
3271 tristate "Flash devices on Alchemy PB1550 board"
3272 depends on MIPS && MIPS_PB1550
3273 @@ -338,6 +315,80 @@
3274 Mapping for the Flaga digital module. If you don´t have one, ignore
3278 + tristate "Pb1000 Boot Flash device"
3279 + depends on MIPS && MIPS_PB1000
3281 + Flash memory access on Alchemy Pb1000
3284 + tristate "Pb1100 Flash device"
3285 + depends on MIPS && MIPS_PB1100
3287 + Flash memory access on Alchemy Pb1100
3290 + tristate "Pb1500 Flash device"
3291 + depends on MIPS && MIPS_PB1500
3293 + Flash memory access on Alchemy Pb1500
3295 +config MTD_PB1500_BOOT
3296 + bool "Pb1100/Pb1500 Boot Flash device"
3297 + depends on MIPS && (MTD_PB1500 || MTD_PB1100)
3299 + Use the first of the two 32MB flash banks on Pb1100/Pb1500 board.
3300 + You can say 'Y' to both this and the USER flash option, to use
3303 +config MTD_PB1500_USER
3304 + bool "Pb1100/Pb1500 User Flash device (2nd 32MB bank)"
3305 + depends on MIPS && (MTD_PB1500 || MTD_PB1100)
3307 + Use the second of the two 32MB flash banks on Pb1100/Pb1500 board.
3308 + You can say 'Y' to both this and the BOOT flash option, to use
3312 + tristate "Db1X00 Flash device"
3313 + depends on MIPS && (MIPS_DB1000 || MIPS_DB1100 || MIPS_DB1500)
3315 + Flash memory access on Alchemy Db1X00 Boards
3317 +config MTD_DB1X00_BOOT
3318 + bool "Db1X00 Boot Flash device"
3319 + depends on MIPS && MTD_DB1X00
3321 + Use the first of the two 32MB flash banks on Db1X00 board.
3322 + You can say 'Y' to both this and the USER flash option, to use
3325 +config MTD_DB1X00_USER
3326 + bool "Db1X00 User Flash device (2nd 32MB bank)"
3327 + depends on MIPS && MTD_DB1X00
3329 + Use the second of the two 32MB flash banks on Db1X00 boards.
3330 + You can say 'Y' to both this and the BOOT flash option, to use
3333 +config MTD_BOSPORUS
3334 + tristate "Bosporus Flash device"
3335 + depends on MIPS && MIPS_BOSPORUS
3337 + Flash memory access on Alchemy Bosporus Board
3340 + tristate "MyCable XXS1500 Flash device"
3341 + depends on MIPS && MIPS_XXS1500
3343 + Flash memory access on MyCable XXS1500 Board
3346 + tristate "4-G Systems MTX-1 Flash device"
3347 + depends on MIPS && MIPS_MTX1
3349 + Flash memory access on 4-G Systems MTX-1 Board
3352 tristate "CFI Flash device mapped on IBM 405LP Beech"
3353 depends on MTD_CFI && PPC32 && 40x && BEECH
3354 @@ -422,6 +473,12 @@
3355 NVRAM on the Momenco Ocelot board. If you have one of these boards
3356 and would like access to either of these, say 'Y'.
3359 + tristate "LASAT flash device"
3360 + depends on LASAT && MTD_CFI
3362 + Support for the flash chips on the Lasat 100 and 200 boards.
3364 config MTD_SOLUTIONENGINE
3365 tristate "CFI Flash device mapped on Hitachi SolutionEngine"
3366 depends on SUPERH && MTD_CFI && MTD_REDBOOT_PARTS
3367 --- linux-2.6.8.1/drivers/usb/host/Makefile 2004-08-14 12:56:23.000000000 +0200
3368 +++ linux-2.6.8.1-brcm63xx/drivers/usb/host/Makefile 2006-06-26 09:07:14.000000000 +0200
3370 obj-$(CONFIG_USB_UHCI_HCD) += uhci-hcd.o
3372 obj-$(CONFIG_USB_SL811HS) += hc_sl811.o
3374 +ifeq ($(CONFIG_MIPS_BRCM),y)
3375 +EXTRA_CFLAGS += -DCONFIG_SWAP_IO_SPACE -D__MIPSEB__
3377 \ No newline at end of file
3378 --- linux-2.6.8.1/include/asm-mips/addrspace.h 2004-08-14 12:54:47.000000000 +0200
3379 +++ linux-2.6.8.1-brcm63xx/include/asm-mips/addrspace.h 2006-06-26 09:07:15.000000000 +0200
3381 #define _ASM_ADDRSPACE_H
3383 #include <linux/config.h>
3385 +#if defined(CONFIG_BCM_ENDPOINT_MODULE)
3386 +#include <asm/mach-generic/spaces.h>
3393 * Configure language
3394 --- linux-2.6.8.1/include/asm-mips/bootinfo.h 2004-08-14 12:54:51.000000000 +0200
3395 +++ linux-2.6.8.1-brcm63xx/include/asm-mips/bootinfo.h 2006-06-26 09:07:15.000000000 +0200
3396 @@ -210,6 +210,16 @@
3397 #define MACH_GROUP_TITAN 22 /* PMC-Sierra Titan */
3398 #define MACH_TITAN_YOSEMITE 1 /* PMC-Sierra Yosemite */
3400 +#if defined(CONFIG_MIPS_BRCM)
3402 + * Valid machtype for group BRCM
3404 +#define MACH_GROUP_BRCM 23 /* Broadcom boards */
3405 +#define MACH_BCM96338 0
3406 +#define MACH_BCM96345 1
3407 +#define MACH_BCM96348 2
3410 #define CL_SIZE COMMAND_LINE_SIZE
3412 const char *get_system_type(void);
3413 --- linux-2.6.8.1/include/asm-mips/cpu.h 2004-08-14 12:54:50.000000000 +0200
3414 +++ linux-2.6.8.1-brcm63xx/include/asm-mips/cpu.h 2006-06-26 09:07:15.000000000 +0200
3416 #define PRID_IMP_4KEMPR2 0x9100
3417 #define PRID_IMP_4KSD 0x9200
3418 #define PRID_IMP_24K 0x9300
3419 +#if defined(CONFIG_MIPS_BRCM)
3420 +#define PRID_IMP_BCM6338 0x9000
3421 +#define PRID_IMP_BCM6345 0x8000
3422 +#define PRID_IMP_BCM6348 0x9100
3425 #define PRID_IMP_UNKNOWN 0xff00
3427 @@ -177,7 +182,14 @@
3428 #define CPU_VR4133 56
3429 #define CPU_AU1550 57
3431 +#if defined(CONFIG_MIPS_BRCM)
3432 +#define CPU_BCM6338 59
3433 +#define CPU_BCM6345 60
3434 +#define CPU_BCM6348 61
3435 +#define CPU_LAST 61
3441 * ISA Level encodings
3442 diff -urN linux-2.6.8.1/include/asm-mips/mach-bcm963xx/cpu-feature-overrides.h linux-2.6.8.1-brcm63xx/include/asm-mips/mach-bcm963xx/cpu-feature-overrides.h
3443 --- linux-2.6.8.1/include/asm-mips/mach-bcm963xx/cpu-feature-overrides.h 1970-01-01 01:00:00.000000000 +0100
3444 +++ linux-2.6.8.1-brcm63xx/include/asm-mips/mach-bcm963xx/cpu-feature-overrides.h 2006-06-26 09:07:15.000000000 +0200
3446 +#ifndef __ASM_MACH_BCM963XX_CPU_FEATURE_OVERRIDES_H
3447 +#define __ASM_MACH_BCM963XX_CPU_FEATURE_OVERRIDES_H
3449 +#define cpu_has_tlb 1
3450 +#define cpu_has_4kex 4
3451 +#define cpu_has_4ktlb 8
3452 +#define cpu_has_fpu 0
3453 +#define cpu_has_32fpr 0
3454 +#define cpu_has_counter 0x40
3455 +#define cpu_has_watch 0
3456 +#define cpu_has_mips16 0
3457 +#define cpu_has_divec 0x200
3458 +#define cpu_has_vce 0
3459 +#define cpu_has_cache_cdex_p 0
3460 +#define cpu_has_cache_cdex_s 0
3461 +#define cpu_has_prefetch 0x40000
3462 +#define cpu_has_mcheck 0x2000
3463 +#define cpu_has_ejtag 0x4000
3464 +#define cpu_has_llsc 0x10000
3465 +#define cpu_has_vtag_icache 0
3466 +#define cpu_has_dc_aliases 0
3467 +#define cpu_has_ic_fills_f_dc 0
3469 +#define cpu_has_nofpuex 0
3470 +#define cpu_has_64bits 0
3471 +#define cpu_has_64bit_zero_reg 0
3472 +#define cpu_has_64bit_gp_regs 0
3473 +#define cpu_has_64bit_addresses 0
3475 +#define cpu_has_subset_pcaches 0
3477 +#define cpu_dcache_line_size() 16
3478 +#define cpu_icache_line_size() 16
3479 +#define cpu_scache_line_size() 0
3481 +#endif /* __ASM_MACH_BCM963XX_CPU_FEATURE_OVERRIDES_H */
3482 --- linux-2.6.8.1/include/asm-mips/mach-generic/param.h 2004-08-14 12:55:10.000000000 +0200
3483 +++ linux-2.6.8.1-brcm63xx/include/asm-mips/mach-generic/param.h 2006-06-26 09:07:15.000000000 +0200
3485 #ifndef __ASM_MACH_GENERIC_PARAM_H
3486 #define __ASM_MACH_GENERIC_PARAM_H
3488 +#if defined(CONFIG_MIPS_BRCM)
3489 +#define HZ 200 /* Internal kernel timer frequency */
3491 #define HZ 1000 /* Internal kernel timer frequency */
3494 #endif /* __ASM_MACH_GENERIC_PARAM_H */
3495 --- linux-2.6.8.1/include/asm-mips/page.h 2004-08-14 12:55:10.000000000 +0200
3496 +++ linux-2.6.8.1-brcm63xx/include/asm-mips/page.h 2006-06-26 09:07:15.000000000 +0200
3501 +#if defined(CONFIG_BCM_ENDPOINT_MODULE)
3502 +#include <asm/mach-generic/spaces.h>
3510 * PAGE_SHIFT determines the page size
3512 #define PAGE_SIZE (1UL << PAGE_SHIFT)
3513 #define PAGE_MASK (~(PAGE_SIZE-1))
3516 #ifndef __ASSEMBLY__
3518 extern void clear_page(void * page);
3519 --- linux-2.6.8.1/include/asm-mips/param.h 2004-08-14 12:54:51.000000000 +0200
3520 +++ linux-2.6.8.1-brcm63xx/include/asm-mips/param.h 2006-06-26 09:07:15.000000000 +0200
3524 # include <param.h> /* Internal kernel timer frequency */
3525 +#if defined(CONFIG_BCM_ENDPOINT_MODULE)
3526 +# define USER_HZ HZ /* .. some user interfaces are in "ticks" */
3528 # define USER_HZ 100 /* .. some user interfaces are in "ticks" */
3530 # define CLOCKS_PER_SEC (USER_HZ) /* like times() */
3533 --- linux-2.6.8.1/include/asm-mips/timex.h 2004-08-14 12:56:15.000000000 +0200
3534 +++ linux-2.6.8.1-brcm63xx/include/asm-mips/timex.h 2006-06-26 09:07:15.000000000 +0200
3536 * no reason to make this a separate architecture.
3539 +#if defined(CONFIG_BCM_ENDPOINT_MODULE)
3540 +#include <asm/mach-generic/timex.h>
3546 * Standard way to access the cycle counter.
3547 diff -urN linux-2.6.8.1/bcmdrivers/Makefile linux-2.6.8.1-brcm63xx/bcmdrivers/Makefile
3548 --- linux-2.6.8.1/bcmdrivers/Makefile 1970-01-01 01:00:00.000000000 +0100
3549 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/Makefile 2006-06-26 09:07:10.000000000 +0200
3551 +# File: bcmdrivers/Makefile
3553 +# Makefile for the Linux kernel modules.
3555 +-include $(KERNEL_DIR)/.config
3557 +obj-y += opensource/
3559 +# If rootfs is nfs, we have to build Ethernet
3560 +# driver as built-n
3561 +ifeq ($(CONFIG_ROOTFS_NFS),y)
3568 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/Makefile linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/Makefile
3569 --- linux-2.6.8.1/bcmdrivers/broadcom/Makefile 1970-01-01 01:00:00.000000000 +0100
3570 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/Makefile 2006-06-26 10:29:23.000000000 +0200
3574 + #cp ../../../tools/built-in.o built-in.o
3575 Files linux-2.6.8.1/bcmdrivers/broadcom/built-in.o and linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/built-in.o differ
3576 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/adslcore6348/adsl_defs.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/adslcore6348/adsl_defs.h
3577 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/adslcore6348/adsl_defs.h 1970-01-01 01:00:00.000000000 +0100
3578 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/adslcore6348/adsl_defs.h 2006-06-26 09:07:10.000000000 +0200
3580 +/* TARGET=bcm6348-dmt-T1-dmtbis-adsl2plus-L2-SRA-firmware-Qproc-HW-RTL-pipeline-IncOneBit-Readsl2-doubleUS */
3582 +#define SOURCE_FILE_
3583 +#define BCM6348_SRC
3584 +#define G994_T1P413_1024_FFT
3585 +#define ENABLE_DIG_USPWR_CUTBACK
3586 +#define ADSLCORE_ONLY
3588 +#define LOOP_TIMING_PLL
3589 +#define RCV_PHASE_TWEAK_ONLY
3590 +#define ADSL_MAX_POSSIBLE_RCV_RATE
3591 +#define HARDWARE_CHANNEL
3592 +#define ADSL_HARDWARE_AGC
3593 +#define HW_CHANNEL_ADC
3594 +#define HW_CHANNEL_DAC
3596 +#define DIGITALEC_SINGLE_TAP_UPDATE
3597 +#define ANALOGEC_SINGLE_TAP_UPDATE
3599 +#define G992_TRELLIS_CODE_CLAMPING
3600 +#define G992DECODERTRELLISBOUNDARY
3601 +#define MEMORYLIMIT64K
3603 +#define DSL_BIG_ENDIAN
3605 +#define VP_INLINE -Winline
3606 +#define USE_ASM_API
3608 +#define RSENC_INLINE
3609 +#define BITENC_INLINE
3610 +#define USE_SLOW_DATA
3611 +#define USE_FAST_TEXT
3612 +#define PROFILE_INLINE
3614 +#define G992_RESYNC_PILOT_PHASE_IN_SHOWTIME
3615 +#define G992_APPLY_SSVI
3616 +#define SHARE_TEQ_VARS
3618 +#define DOUBLE_UP_STREAM
3619 +#define G994P1_SUPPORT_A43C
3620 +#define USE_ASM_API
3622 +#define MEMORYLIMIT64K
3623 +#define ADSL_FIRMWARE
3624 +#define G992DATA_XMT_COMPACT_WORD
3625 +#define ADSL_MAX_POSSIBLE_RCV_RATE
3626 +#define DSP_FRONTEND_ONLY
3627 +#define G992P3_ONE_BIT_CONSTELLATION
3631 +#define ADSL_SOFTWARE_TIME_ERROR_CALCULATION
3632 +#define DSL_REPORT_ALL_COUNTERS
3633 +#define ADSL_MONITOR_LCD
3635 +#define G994P1_ATUR
3638 +#define ADSL_FRAMER
3642 +#define G992_ATUR_UPSTREAM_SAMPLING_FREQ_276KHZ
3643 +#define G994P1_ATUR_UPSTREAM_SAMPLING_FREQ_276KHZ
3644 +#define G992_TRELLISCODE
3645 +#define ADSL_HARDWARE_ECHO_CANCELLOR
3647 +#define G992P1_ATUR
3648 +#define G992P1_ANNEX_A
3649 +#define ADSL_HARDWARE_TIME_ERROR_TRACKING
3650 +#define G992P1_NEWFRAME
3651 +#define G992P1_NEWFRAME_ATUR
3652 +#define G992P1_ANNEX_A_USED_FOR_G992P2
3654 +#define G992_ATUR_UPSTREAM_SAMPLING_FREQ_276KHZ
3655 +#define G992_CALC_DEBUG_SNR_BEFORE_TEQ
3657 +#define RATE_SELECT_E14
3658 +#define G992P3_ATUR
3659 +#define G992P3AMENDMENT
3660 +#define GLOBESPAN_DM
3661 +#define G992P3_COMB_MSG_THREE_COPIES
3662 +#define G992P3_POWER_MANAGEMENT
3665 +#define G992P5_ATUR
3666 +#define ADSL_PIPELINE_CODE
3667 +#define ADSL_HARDWARE_TIME_ERROR_TRACKING
3668 +#define G994P1RCV_QPROC
3669 +#define G994P1XMT_QPROC
3670 +#define G992RCV_QPROC
3671 +#define G992XMT_QPROC
3673 +#define VP_SIMULATOR
3674 +#define T1P413RCV_QPROC
3675 +#define T1P413XMT_QPROC
3676 +#define G992ENC_HW_DATAMODE
3677 +#define G992DATA_XMT_HW_RS
3678 +#define G992DATA_XMT_COMPACT_WORD
3679 +#define G992RCV_QPROC_FAST
3680 +#define G992_BIT_SWAP
3681 +#define ADSL_IDENTIFY_VENDOR_FIRMWARE
3682 +#define ADSL_ATUR_FORCE_BIGGER_UPSTREAM_MARGIN
3683 +#define G992_MORE_FRAME_MODE
3684 +#define XMT_RACT2_FOR_ADI_COMPATIBILITY
3685 +#define XMT_FFT_SIZE_2X
3686 +#define SYNCH_SYMBOL_DETECTION
3687 +#define ANSI_CACT12_PING_PONG
3688 +#define ADSL_SPECIAL_FIX_FOR_FRENCH_TELECOM
3689 +#define G994P1_CHECK_SECURITY
3690 +#define G994P1_NON_STD_INFO
3691 +#define I432_HEADER_COMPRESSION
3692 +#define TDC_IOP_FIX_ERICSSON_TI_4000C_350
3693 +#define TDC_IOP_FIX_SEIMENS_TI
3694 +#define FT_ADI_US_RATE_FIX
3695 +#define ANSI_CACT12_PING_PONG
3696 +#define G992_ATUR_UPSTREAM_SAMPLING_FREQ_276KHZ
3697 +#define G994P1_ATUR_UPSTREAM_SAMPLING_FREQ_276KHZ
3699 +#define G992_APPLY_SSVI
3700 +#define READSL2_FILTERS
3703 +#define ADSL_PHY_XFACE_OFFSET 0x21F90
3706 +#define ADSL_PHY_SDRAM_BIAS 0x1A0000
3709 +#define ADSL_PHY_SDRAM_LINK_OFFSET 0x1A0000
3712 +#define ADSL_PHY_SDRAM_PAGE_SIZE 0x200000
3713 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/adslcore6348/adsl_lmem.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/adslcore6348/adsl_lmem.h
3714 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/adslcore6348/adsl_lmem.h 1970-01-01 01:00:00.000000000 +0100
3715 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/adslcore6348/adsl_lmem.h 2006-06-26 09:07:10.000000000 +0200
3719 +** This file has been generated automatically by bin2c program
3722 +extern const unsigned char adsl_lmem[51036];
3723 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/adslcore6348/adsl_sdram.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/adslcore6348/adsl_sdram.h
3724 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/adslcore6348/adsl_sdram.h 1970-01-01 01:00:00.000000000 +0100
3725 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/adslcore6348/adsl_sdram.h 2006-06-26 09:07:10.000000000 +0200
3729 +** This file has been generated automatically by bin2c program
3732 +extern const unsigned char adsl_sdram[364348];
3733 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/AdslCoreDefs.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/AdslCoreDefs.h
3734 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/AdslCoreDefs.h 1970-01-01 01:00:00.000000000 +0100
3735 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/AdslCoreDefs.h 2006-06-26 09:07:10.000000000 +0200
3738 +<:copyright-broadcom
3740 + Copyright (c) 2002 Broadcom Corporation
3741 + All Rights Reserved
3742 + No portions of this material may be reproduced in any form without the
3743 + written permission of:
3744 + Broadcom Corporation
3745 + 16215 Alton Parkway
3746 + Irvine, California 92619
3747 + All information contained in this document is Broadcom Corporation
3748 + company private, proprietary, and trade secret.
3752 +/****************************************************************************
3754 + * AdslCore.c -- Bcm ADSL core driver
3757 + * This file contains BCM ADSL core driver
3760 + * Copyright (c) 2000-2001 Broadcom Corporation
3761 + * All Rights Reserved
3762 + * No portions of this material may be reproduced in any form without the
3763 + * written permission of:
3764 + * Broadcom Corporation
3765 + * 16215 Alton Parkway
3766 + * Irvine, California 92619
3767 + * All information contained in this document is Broadcom Corporation
3768 + * company private, proprietary, and trade secret.
3769 + * Authors: Ilya Stomakhin
3771 + * $Revision: 1.4 $
3773 + * $Id: AdslCoreDefs.h,v 1.4 2004/07/20 23:45:48 ilyas Exp $
3775 + * $Log: AdslCoreDefs.h,v $
3776 + * Revision 1.4 2004/07/20 23:45:48 ilyas
3777 + * Added driver version info, SoftDslPrintf support. Fixed G.997 related issues
3779 + * Revision 1.3 2004/06/10 00:20:33 ilyas
3780 + * Added L2/L3 and SRA
3782 + * Revision 1.2 2004/04/12 23:24:38 ilyas
3783 + * Added default G992P5 PHY definition
3785 + * Revision 1.1 2004/04/08 23:59:15 ilyas
3786 + * Initial CVS checkin
3788 + ****************************************************************************/
3790 +#ifndef _ADSL_CORE_DEFS_H
3791 +#define _ADSL_CORE_DEFS_H
3793 +#if defined(__KERNEL__)
3794 +#include <linux/config.h>
3797 +#if defined(CONFIG_BCM96348) || defined(BOARD_bcm96348) || defined(_BCM96348_) || defined(CONFIG_BCM96338) || defined(BOARD_bcm96338) || defined(_BCM96338_)
3799 +#include "../adslcore6348C/adsl_defs.h"
3800 +#elif defined(ADSL_ANNEXB)
3801 +#include "../adslcore6348B/adsl_defs.h"
3802 +#elif defined(ADSL_SADSL)
3803 +#include "../adslcore6348SA/adsl_defs.h"
3805 +#include "../adslcore6348/adsl_defs.h"
3809 +#if defined(__KERNEL__) || defined(TARG_OS_RTEMS) || defined(_CFE_)
3810 +#if defined(CONFIG_BCM96345) || defined(BOARD_bcm96345) || defined(_BCM96345_)
3812 +#include "../adslcore6345C/adsl_defs.h"
3813 +#elif defined(ADSL_ANNEXB)
3814 +#include "../adslcore6345B/adsl_defs.h"
3815 +#elif defined(ADSL_SADSL)
3816 +#include "../adslcore6345SA/adsl_defs.h"
3818 +#include "../adslcore6345/adsl_defs.h"
3820 +#endif /* of CONFIG_BCM96345 */
3822 +#if defined(CONFIG_BCM96345)
3824 +#include "../adslcoreC/adsl_defs.h"
3825 +#elif defined(ADSL_ANNEXB)
3826 +#include "../adslcoreB/adsl_defs.h"
3827 +#elif defined(ADSL_SADSL)
3828 +#include "../adslcoreSA/adsl_defs.h"
3830 +#include "../adslcore/adsl_defs.h"
3832 +#endif /* of CONFIG_BCM96345 */
3833 +#endif /* __KERNEL__ */
3839 +#include "AdslXfaceData.h"
3841 +/* adjust some definitions for the HOST */
3843 +#undef GLOBAL_PTR_BIAS
3844 +#undef ADSLCORE_ONLY
3845 +#undef USE_SLOW_DATA
3846 +#undef USE_FAST_TEXT
3847 +#undef VP_SIMULATOR
3855 +#define G997_1_FRAMER
3858 +#ifndef FLATTEN_ADDR_ADJUST
3859 +#define FLATTEN_ADDR_ADJUST 0xFFF00000
3862 +/* definitions for combo PHY (AnnexA(ADSL2) and AnnexB) */
3864 +#if !(defined(ADSL_SINGLE_PHY) || defined(G992_ANNEXC))
3866 +#undef G992P1_ANNEX_A
3867 +#define G992P1_ANNEX_A
3872 +#define G992P1_ANNEX_A
3875 +#undef G992P1_ANNEX_A_USED_FOR_G992P2
3876 +#define G992P1_ANNEX_A_USED_FOR_G992P2
3880 +#undef G992P1_ANNEX_B
3881 +#define G992P1_ANNEX_B
3885 +/* ADSL PHY definition */
3888 + unsigned long sdramPageAddr;
3889 + unsigned long sdramImageAddr;
3890 + unsigned long sdramImageSize;
3891 + unsigned long sdramPhyImageAddr;
3892 + unsigned short fwType;
3893 + unsigned short chipType;
3894 + unsigned short mjVerNum;
3895 + unsigned short mnVerNum;
3897 + unsigned long features[4];
3899 +extern adslPhyInfo adslCorePhyDesc;
3903 +#define kAdslPhyChipMjMask 0xFF00
3904 +#define kAdslPhyChipMnMask 0x00FF
3905 +#define kAdslPhyChipUnknown 0
3906 +#define kAdslPhyChip6345 0x100
3907 +#define kAdslPhyChip6348 0x200
3908 +#define kAdslPhyChipRev0 0
3909 +#define kAdslPhyChipRev1 1
3910 +#define kAdslPhyChipRev2 2
3911 +#define kAdslPhyChipRev3 3
3912 +#define kAdslPhyChipRev4 4
3913 +#define kAdslPhyChipRev5 5
3915 +#define ADSL_PHY_SUPPORT(f) AdslFeatureSupported(adslCorePhyDesc.features,f)
3916 +#define ADSL_PHY_SET_SUPPORT(p,f) AdslFeatureSet((p)->features,f)
3918 +/* ADSL Driver to/from PHY address and data conversion macros */
3920 +#ifdef ADSLDRV_LITTLE_ENDIAN
3921 +#define ADSL_ENDIAN_CONV_LONG(x) ( ((x) << 24) | (((x) << 8) & 0x00FF0000) | (((x) >> 8) & 0x0000FF00) | ((unsigned long)(x) >> 24) )
3922 +#define ADSL_ENDIAN_CONV_SHORT(x) ( ((x) << 8) | ((unsigned short)(x) >> 8) )
3923 +#define ADSL_ENDIAN_CONV_2SHORTS(x) ( ((x) << 16) | ((unsigned long)(x) >> 16) )
3925 +#define ADSL_ENDIAN_CONV_LONG(x) x
3926 +#define ADSL_ENDIAN_CONV_SHORT(x) x
3927 +#define ADSL_ENDIAN_CONV_2SHORTS(x) x
3930 +#ifndef ADSL_PHY_XFACE_OFFSET
3931 +#define ADSL_PHY_XFACE_OFFSET 0x00017F90
3933 +#define ADSL_LMEM_XFACE_DATA (0xFFF00000 | ADSL_PHY_XFACE_OFFSET)
3935 +#ifndef ADSL_PHY_SDRAM_START
3936 +#define ADSL_PHY_SDRAM_START 0x10000000
3938 +#ifndef ADSL_PHY_SDRAM_BIAS
3939 +#define ADSL_PHY_SDRAM_BIAS 0x00040000
3941 +#define ADSL_PHY_SDRAM_START_4 (ADSL_PHY_SDRAM_START + ADSL_PHY_SDRAM_BIAS)
3943 +#ifndef ADSL_PHY_SDRAM_PAGE_SIZE
3944 +#define ADSL_PHY_SDRAM_PAGE_SIZE 0x00080000
3947 +#ifdef ADSL_PHY_SDRAM_BIAS
3948 +#define ADSL_SDRAM_IMAGE_SIZE (ADSL_PHY_SDRAM_PAGE_SIZE - ADSL_PHY_SDRAM_BIAS)
3950 +#define ADSL_SDRAM_IMAGE_SIZE (256*1024)
3954 +#ifndef ADSL_PHY_SDRAM_LINK_OFFSET
3955 +#define ADSL_PHY_SDRAM_LINK_OFFSET 0x00040000
3958 +#define ADSL_SDRAM_TOTAL_SIZE 0x00800000
3959 +#define ADSL_SDRAM_HOST_MIPS_DEFAULT (0xA0000000 | (ADSL_SDRAM_TOTAL_SIZE - ADSL_PHY_SDRAM_PAGE_SIZE + ADSL_PHY_SDRAM_BIAS))
3961 +#define ADSLXF ((AdslXfaceData *) ADSL_LMEM_XFACE_DATA)
3963 +#define ADSL_MIPS_LMEM_ADDR(a) (((ulong)(a) & 0x19000000) == 0x19000000)
3964 +#define SDRAM_ADDR_TO_HOST(a) ((void *) ((ulong)(a) - adslCorePhyDesc.sdramPhyImageAddr + \
3965 + (ADSLXF->sdramBaseAddr ? (unsigned long) ADSLXF->sdramBaseAddr : ADSL_SDRAM_HOST_MIPS_DEFAULT)))
3966 +#define SDRAM_ADDR_TO_ADSL(a) ((void *) (adslCorePhyDesc.sdramPhyImageAddr + ((ulong)(a) - \
3967 + (ADSLXF->sdramBaseAddr ? (unsigned long) ADSLXF->sdramBaseAddr : ADSL_SDRAM_HOST_MIPS_DEFAULT))))
3969 +#define ADSL_ADDR_TO_HOST(addr) ADSL_MIPS_LMEM_ADDR(addr) ? (void *) ((ulong) (addr) | FLATTEN_ADDR_ADJUST) : SDRAM_ADDR_TO_HOST(addr)
3976 +#ifndef __SoftDslPrintf
3977 +void __SoftDslPrintf(void *gDslVars, char *fmt, int argNum, ...);
3982 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/AdslMib.gh linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/AdslMib.gh
3983 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/AdslMib.gh 1970-01-01 01:00:00.000000000 +0100
3984 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/AdslMib.gh 2006-06-26 09:07:10.000000000 +0200
3986 +/****************************************************************************
3991 + * This is a header file which defines the type for AdslMib
3992 + * global variable structure.
3995 + * Copyright (c) 1993-1998 AltoCom, Inc. All rights reserved.
3996 + * Authors: Ilya Stomakhin
3998 + * $Revision: 1.8 $
4000 + * $Id: AdslMib.gh,v 1.8 2004/06/04 18:56:01 ilyas Exp $
4002 + * $Log: AdslMib.gh,v $
4003 + * Revision 1.8 2004/06/04 18:56:01 ilyas
4004 + * Added counter for ADSL2 framing and performance
4006 + * Revision 1.7 2003/10/17 21:02:12 ilyas
4007 + * Added more data for ADSL2
4009 + * Revision 1.6 2003/10/14 00:55:27 ilyas
4010 + * Added UAS, LOSS, SES error seconds counters.
4011 + * Support for 512 tones (AnnexI)
4013 + * Revision 1.5 2003/07/18 19:07:15 ilyas
4014 + * Merged with ADSL driver
4016 + * Revision 1.4 2002/11/13 21:32:49 ilyas
4017 + * Added adjustK support for Centillium non-standard framing mode
4019 + * Revision 1.3 2002/10/31 20:27:13 ilyas
4020 + * Merged with the latest changes for VxWorks/Linux driver
4022 + * Revision 1.2 2002/07/20 00:51:41 ilyas
4023 + * Merged witchanges made for VxWorks/Linux driver.
4025 + * Revision 1.1 2001/12/21 22:39:30 ilyas
4026 + * Added support for ADSL MIB data objects (RFC2662)
4029 + *****************************************************************************/
4031 +#ifndef AdslMibGlobals
4032 +#define AdslMibGlobals
4034 +#include "AdslMib.h"
4040 + adslMibInfo adslMib;
4042 + /* ADSL state data */
4044 + adslMibNotifyHandlerType notifyHandlerPtr;
4047 + Boolean currSecondErrored;
4048 + Boolean currSecondLOS;
4049 + Boolean currSecondSES;
4050 + Boolean currSecondFEC;
4055 + G992CodingParams rcvParams;
4056 + G992CodingParams xmtParams;
4057 + ulong shtCounters[kG992ShowtimeNumOfMonitorCounters];
4058 + ulong scratchData;
4059 + long showtimeMarginThld;
4061 + /* ADSL diag data */
4063 + short snr[kAdslMibMaxToneNum];
4064 + short showtimeMargin[kAdslMibMaxToneNum];
4065 + uchar bitAlloc[kAdslMibMaxToneNum];
4066 + short gain[kAdslMibMaxToneNum];
4067 + ComplexShort chanCharLin[kAdslMibMaxToneNum];
4068 + short chanCharLog[kAdslMibMaxToneNum];
4069 + short quietLineNoise[kAdslMibMaxToneNum];
4073 + ulong g992MsgType;
4074 + uchar rsOption[1+4];
4075 + Boolean rsOptionValid;
4077 + adslMibVarsStruct;
4079 +#endif /* AdslMibGlobals */
4080 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/AdslMib.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/AdslMib.h
4081 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/AdslMib.h 1970-01-01 01:00:00.000000000 +0100
4082 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/AdslMib.h 2006-06-26 09:07:10.000000000 +0200
4085 +<:copyright-broadcom
4087 + Copyright (c) 2002 Broadcom Corporation
4088 + All Rights Reserved
4089 + No portions of this material may be reproduced in any form without the
4090 + written permission of:
4091 + Broadcom Corporation
4092 + 16215 Alton Parkway
4093 + Irvine, California 92619
4094 + All information contained in this document is Broadcom Corporation
4095 + company private, proprietary, and trade secret.
4099 +/****************************************************************************
4104 + * This file contains the exported functions and definitions for AdslMib
4107 + * Copyright (c) 1993-1998 AltoCom, Inc. All rights reserved.
4108 + * Authors: Ilya Stomakhin
4110 + * $Revision: 1.9 $
4112 + * $Id: AdslMib.h,v 1.9 2004/04/12 23:34:52 ilyas Exp $
4114 + * $Log: AdslMib.h,v $
4115 + * Revision 1.9 2004/04/12 23:34:52 ilyas
4116 + * Merged the latest ADSL driver chnages for ADSL2+
4118 + * Revision 1.8 2004/03/03 20:14:05 ilyas
4119 + * Merged changes for ADSL2+ from ADSL driver
4121 + * Revision 1.7 2003/10/14 00:55:27 ilyas
4122 + * Added UAS, LOSS, SES error seconds counters.
4123 + * Support for 512 tones (AnnexI)
4125 + * Revision 1.6 2003/07/18 19:07:15 ilyas
4126 + * Merged with ADSL driver
4128 + * Revision 1.5 2002/10/31 20:27:13 ilyas
4129 + * Merged with the latest changes for VxWorks/Linux driver
4131 + * Revision 1.4 2002/07/20 00:51:41 ilyas
4132 + * Merged witchanges made for VxWorks/Linux driver.
4134 + * Revision 1.3 2002/01/13 22:25:40 ilyas
4135 + * Added functions to get channels rate
4137 + * Revision 1.2 2002/01/03 06:03:36 ilyas
4138 + * Handle byte moves tha are not multiple of 2
4140 + * Revision 1.1 2001/12/21 22:39:30 ilyas
4141 + * Added support for ADSL MIB data objects (RFC2662)
4144 + *****************************************************************************/
4146 +#ifndef AdslMibHeader
4147 +#define AdslMibHeader
4150 +#include "lib_types.h"
4151 +#include "lib_string.h"
4154 +#include "AdslMibDef.h"
4156 +/* Interface functions */
4158 +typedef int (SM_DECL *adslMibNotifyHandlerType) (void *gDslVars, ulong event);
4160 +extern Boolean AdslMibInit(void *gDslVars);
4161 +extern void AdslMibTimer(void *gDslVars, long timeMs);
4162 +extern void AdslMibStatusSnooper (void *gDslVars, dslStatusStruct *status);
4163 +extern void AdslMibSetNotifyHandler(void *gDslVars, adslMibNotifyHandlerType notifyHandlerPtr);
4164 +extern int AdslMibGetModulationType(void *gDslVars);
4165 +extern Boolean AdslMibIsAdsl2Mod(void *gDslVars);
4166 +extern int AdslMibGetActiveChannel(void *gDslVars);
4167 +extern int AdslMibGetGetChannelRate(void *gDslVars, int dir, int channel);
4168 +extern Boolean AdslMibIsLinkActive(void *gDslVars);
4169 +extern int AdslMibPowerState(void *gDslVars);
4170 +extern int AdslMibTrainingState (void *gDslVars);
4171 +extern void AdslMibClearData(void *gDslVars);
4172 +extern void AdslMibClearBertResults(void *gDslVars);
4173 +extern void AdslMibBertStartEx(void *gDslVars, ulong bertSec);
4174 +extern void AdslMibBertStopEx(void *gDslVars);
4175 +extern ulong AdslMibBertContinueEx(void *gDslVars, ulong totalBits, ulong errBits);
4176 +extern void AdslMibSetLPR(void *gDslVars);
4177 +extern void AdslMibSetShowtimeMargin(void *gDslVars, long showtimeMargin);
4178 +extern void AdslMibResetConectionStatCounters(void *gDslVars);
4180 +extern void AdslMibByteMove (int size, void* srcPtr, void* dstPtr);
4181 +extern void AdslMibByteClear(int size, void* dstPtr);
4182 +extern int AdslMibStrCopy(char *srcPtr, char *dstPtr);
4184 +/* AdslMibGetData dataId codes */
4186 +#define kAdslMibDataAll 0
4188 +extern void *AdslMibGetData (void *gDslVars, int dataId, void *pAdslMibData);
4190 +extern int AdslMibGetObjectValue (
4195 + ulong *dataBufLen);
4197 +#endif /* AdslMibHeader */
4198 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/AdslMibOid.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/AdslMibOid.h
4199 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/AdslMibOid.h 1970-01-01 01:00:00.000000000 +0100
4200 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/AdslMibOid.h 2006-06-26 09:07:10.000000000 +0200
4203 +<:copyright-broadcom
4205 + Copyright (c) 2002 Broadcom Corporation
4206 + All Rights Reserved
4207 + No portions of this material may be reproduced in any form without the
4208 + written permission of:
4209 + Broadcom Corporation
4210 + 16215 Alton Parkway
4211 + Irvine, California 92619
4212 + All information contained in this document is Broadcom Corporation
4213 + company private, proprietary, and trade secret.
4217 +/****************************************************************************
4222 + * SNMP object identifiers for ADSL MIB and other related MIBs
4224 + * Copyright (c) 1993-1998 AltoCom, Inc. All rights reserved.
4225 + * Authors: Ilya Stomakhin
4227 + * $Revision: 1.5 $
4229 + * $Id: AdslMibOid.h,v 1.5 2004/06/04 18:56:01 ilyas Exp $
4231 + * $Log: AdslMibOid.h,v $
4232 + * Revision 1.5 2004/06/04 18:56:01 ilyas
4233 + * Added counter for ADSL2 framing and performance
4235 + * Revision 1.4 2003/10/17 21:02:12 ilyas
4236 + * Added more data for ADSL2
4238 + * Revision 1.3 2003/10/14 00:55:27 ilyas
4239 + * Added UAS, LOSS, SES error seconds counters.
4240 + * Support for 512 tones (AnnexI)
4242 + * Revision 1.2 2002/07/20 00:51:41 ilyas
4243 + * Merged witchanges made for VxWorks/Linux driver.
4245 + * Revision 1.1 2001/12/21 22:39:30 ilyas
4246 + * Added support for ADSL MIB data objects (RFC2662)
4249 + *****************************************************************************/
4251 +#ifndef AdslMibOidHeader
4252 +#define AdslMibOidHeader
4254 +#define kOidAdsl 94
4255 +#define kOidAdslInterleave 124
4256 +#define kOidAdslFast 125
4259 +#define kOidAdslLine 1
4260 +#define kOidAdslMibObjects 1
4262 +#define kOidAdslLineTable 1
4263 +#define kOidAdslLineEntry 1
4264 +#define kOidAdslLineCoding 1
4265 +#define kOidAdslLineType 2
4266 +#define kOidAdslLineSpecific 3
4267 +#define kOidAdslLineConfProfile 4
4268 +#define kOidAdslLineAlarmConfProfile 5
4270 +#define kOidAdslAtucPhysTable 2
4271 +#define kOidAdslAturPhysTable 3
4272 +#define kOidAdslPhysEntry 1
4273 +#define kOidAdslPhysInvSerialNumber 1
4274 +#define kOidAdslPhysInvVendorID 2
4275 +#define kOidAdslPhysInvVersionNumber 3
4276 +#define kOidAdslPhysCurrSnrMgn 4
4277 +#define kOidAdslPhysCurrAtn 5
4278 +#define kOidAdslPhysCurrStatus 6
4279 +#define kOidAdslPhysCurrOutputPwr 7
4280 +#define kOidAdslPhysCurrAttainableRate 8
4282 +#define kOidAdslAtucChanTable 4
4283 +#define kOidAdslAturChanTable 5
4284 +#define kOidAdslChanEntry 1
4285 +#define kOidAdslChanInterleaveDelay 1
4286 +#define kOidAdslChanCurrTxRate 2
4287 +#define kOidAdslChanPrevTxRate 3
4288 +#define kOidAdslChanCrcBlockLength 4
4290 +#define kOidAdslAtucPerfDataTable 6
4291 +#define kOidAdslAturPerfDataTable 7
4292 +#define kOidAdslPerfDataEntry 1
4293 +#define kOidAdslPerfLofs 1
4294 +#define kOidAdslPerfLoss 2
4295 +#define kOidAdslPerfLprs 3
4296 +#define kOidAdslPerfESs 4
4297 +#define kOidAdslPerfValidIntervals 5
4298 +#define kOidAdslPerfInvalidIntervals 6
4299 +#define kOidAdslPerfCurr15MinTimeElapsed 7
4300 +#define kOidAdslPerfCurr15MinLofs 8
4301 +#define kOidAdslPerfCurr15MinLoss 9
4302 +#define kOidAdslPerfCurr15MinLprs 10
4303 +#define kOidAdslPerfCurr15MinESs 11
4304 +#define kOidAdslPerfCurr1DayTimeElapsed 12
4305 +#define kOidAdslPerfCurr1DayLofs 13
4306 +#define kOidAdslPerfCurr1DayLoss 14
4307 +#define kOidAdslPerfCurr1DayLprs 15
4308 +#define kOidAdslPerfCurr1DayESs 16
4309 +#define kOidAdslPerfPrev1DayMoniSecs 17
4310 +#define kOidAdslPerfPrev1DayLofs 18
4311 +#define kOidAdslPerfPrev1DayLoss 19
4312 +#define kOidAdslPerfPrev1DayLprs 20
4313 +#define kOidAdslPerfPrev1DayESs 21
4315 +#define kOidAdslAtucPerfIntervalTable 8
4316 +#define kOidAdslAturPerfIntervalTable 9
4317 +#define kOidAdslPerfIntervalEntry 1
4318 +#define kOidAdslIntervalNumber 1
4319 +#define kOidAdslIntervalLofs 2
4320 +#define kOidAdslIntervalLoss 3
4321 +#define kOidAdslIntervalLprs 4
4322 +#define kOidAdslIntervalESs 5
4323 +#define kOidAdslIntervalValidData 6
4325 +#define kOidAdslAtucChanPerfTable 10
4326 +#define kOidAdslAturChanPerfTable 11
4327 +#define kOidAdslChanPerfEntry 1
4328 +#define kOidAdslChanReceivedBlks 1
4329 +#define kOidAdslChanTransmittedBlks 2
4330 +#define kOidAdslChanCorrectedBlks 3
4331 +#define kOidAdslChanUncorrectBlks 4
4332 +#define kOidAdslChanPerfValidIntervals 5
4333 +#define kOidAdslChanPerfInvalidIntervals 6
4334 +#define kOidAdslChanPerfCurr15MinTimeElapsed 7
4335 +#define kOidAdslChanPerfCurr15MinReceivedBlks 8
4336 +#define kOidAdslChanPerfCurr15MinTransmittedBlks 9
4337 +#define kOidAdslChanPerfCurr15MinCorrectedBlks 10
4338 +#define kOidAdslChanPerfCurr15MinUncorrectBlks 11
4339 +#define kOidAdslChanPerfCurr1DayTimeElapsed 12
4340 +#define kOidAdslChanPerfCurr1DayReceivedBlks 13
4341 +#define kOidAdslChanPerfCurr1DayTransmittedBlks 14
4342 +#define kOidAdslChanPerfCurr1DayCorrectedBlks 15
4343 +#define kOidAdslChanPerfCurr1DayUncorrectBlks 16
4344 +#define kOidAdslChanPerfPrev1DayMoniSecs 17
4345 +#define kOidAdslChanPerfPrev1DayReceivedBlks 18
4346 +#define kOidAdslChanPerfPrev1DayTransmittedBlks 19
4347 +#define kOidAdslChanPerfPrev1DayCorrectedBlks 20
4348 +#define kOidAdslChanPerfPrev1DayUncorrectBlks 21
4350 +#define kOidAdslAtucChanIntervalTable 12
4351 +#define kOidAdslAturChanIntervalTable 13
4352 +#define kOidAdslChanIntervalEntry 1
4353 +#define kOidAdslChanIntervalNumber 1
4354 +#define kOidAdslChanIntervalReceivedBlks 2
4355 +#define kOidAdslChanIntervalTransmittedBlks 3
4356 +#define kOidAdslChanIntervalCorrectedBlks 4
4357 +#define kOidAdslChanIntervalUncorrectBlks 5
4358 +#define kOidAdslChanIntervalValidData 6
4360 +/* AdslExtra OIDs for kOidAdslPrivate, kOidAdslPrivExtraInfo (defined in AdslMibDef.h) */
4362 +#define kOidAdslExtraConnectionInfo 1
4363 +#define kOidAdslExtraConnectionStat 2
4364 +#define kOidAdslExtraFramingMode 3
4365 +#define kOidAdslExtraTrainingState 4
4366 +#define kOidAdslExtraNonStdFramingAdjustK 5
4367 +#define kOidAdslExtraAtmStat 6
4368 +#define kOidAdslExtraDiagModeData 7
4369 +#define kOidAdslExtraAdsl2Info 8
4370 +#define kOidAdslExtraTxPerfCounterInfo 9
4372 +#define kOidAtmMibObjects 1
4373 +#define kOidAtmTcTable 4
4374 +#define kOidAtmTcEntry 1
4375 +#define kOidAtmOcdEvents 1
4376 +#define kOidAtmAlarmState 2
4378 +#endif /* AdslMibOidHeader */
4379 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/AdslXfaceData.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/AdslXfaceData.h
4380 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/AdslXfaceData.h 1970-01-01 01:00:00.000000000 +0100
4381 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/AdslXfaceData.h 2006-06-26 09:07:10.000000000 +0200
4384 +<:copyright-broadcom
4386 + Copyright (c) 2002 Broadcom Corporation
4387 + All Rights Reserved
4388 + No portions of this material may be reproduced in any form without the
4389 + written permission of:
4390 + Broadcom Corporation
4391 + 16215 Alton Parkway
4392 + Irvine, California 92619
4393 + All information contained in this document is Broadcom Corporation
4394 + company private, proprietary, and trade secret.
4398 +/****************************************************************************
4400 + * AdslXfaceData.h -- ADSL Core interface data structure
4403 + * To be included both in SoftDsl and BcmAdslCore driver
4406 + * Copyright (c) 2000-2001 Broadcom Corporation
4407 + * All Rights Reserved
4408 + * No portions of this material may be reproduced in any form without the
4409 + * written permission of:
4410 + * Broadcom Corporation
4411 + * 16215 Alton Parkway
4412 + * Irvine, California 92619
4413 + * All information contained in this document is Broadcom Corporation
4414 + * company private, proprietary, and trade secret.
4415 + * Authors: Ilya Stomakhin
4417 + * $Revision: 1.9 $
4419 + * $Id: AdslXfaceData.h,v 1.9 2004/02/03 02:57:22 ilyas Exp $
4421 + * $Log: AdslXfaceData.h,v $
4422 + * Revision 1.9 2004/02/03 02:57:22 ilyas
4423 + * Added PHY feature settings
4425 + * Revision 1.8 2003/07/18 04:50:21 ilyas
4426 + * Added shared buffer for clEoc messages to avoid copying thru command buffer
4428 + * Revision 1.7 2003/02/25 00:46:32 ilyas
4429 + * Added T1.413 EOC vendor ID
4431 + * Revision 1.6 2003/02/21 23:29:13 ilyas
4432 + * Added OEM vendor ID parameter for T1.413 mode
4434 + * Revision 1.5 2002/09/13 21:17:12 ilyas
4435 + * Added pointers to version and build string to OEM interface structure
4437 + * Revision 1.4 2002/09/07 04:16:29 ilyas
4438 + * Fixed HOST to ADSL MIPS SDRAM address translation for relocatable images
4440 + * Revision 1.3 2002/09/07 01:43:59 ilyas
4441 + * Added support for OEM parameters
4443 + * Revision 1.2 2002/01/22 19:03:10 khp
4444 + * -put sdramBaseAddr at end of Xface struct
4446 + * Revision 1.1 2002/01/15 06:25:08 ilyas
4447 + * Initial implementation of ADSL core firmware
4449 + ****************************************************************************/
4451 +#ifndef AdslXfaceDataHeader
4452 +#define AdslXfaceDataHeader
4454 +#include "CircBuf.h"
4456 +typedef struct _AdslXfaceData {
4457 + stretchBufferStruct sbSta;
4458 + stretchBufferStruct sbCmd;
4459 + unsigned long gfcTable[15];
4460 + void *sdramBaseAddr;
4463 +/* Shared SDRAM configuration data */
4465 +#define kAdslOemVendorIdMaxSize 8
4466 +#define kAdslOemVersionMaxSize 32
4467 +#define kAdslOemSerNumMaxSize 32
4468 +#define kAdslOemNonStdInfoMaxSize 64
4470 +typedef struct _AdslOemSharedData {
4471 + unsigned long g994VendorIdLen;
4472 + unsigned long g994XmtNonStdInfoLen;
4473 + unsigned long g994RcvNonStdInfoLen;
4474 + unsigned long eocVendorIdLen;
4475 + unsigned long eocVersionLen;
4476 + unsigned long eocSerNumLen;
4477 + unsigned char g994VendorId[kAdslOemVendorIdMaxSize];
4478 + unsigned char eocVendorId[kAdslOemVendorIdMaxSize];
4479 + unsigned char eocVersion[kAdslOemVersionMaxSize];
4480 + unsigned char eocSerNum[kAdslOemSerNumMaxSize];
4481 + unsigned char g994XmtNonStdInfo[kAdslOemNonStdInfoMaxSize];
4482 + unsigned char g994RcvNonStdInfo[kAdslOemNonStdInfoMaxSize];
4483 + char *gDslVerionStringPtr;
4484 + char *gDslBuildDataStringPtr;
4485 + unsigned long t1413VendorIdLen;
4486 + unsigned char t1413VendorId[kAdslOemVendorIdMaxSize];
4487 + unsigned long t1413EocVendorIdLen;
4488 + unsigned char t1413EocVendorId[kAdslOemVendorIdMaxSize];
4489 + unsigned long clEocBufLen;
4490 + unsigned char *clEocBufPtr;
4491 +} AdslOemSharedData;
4495 +#define kAdslPhyAnnexA 0
4496 +#define kAdslPhyAnnexB 1
4497 +#define kAdslPhyAnnexC 2
4498 +#define kAdslPhySADSL 3
4499 +#define kAdslPhyAdsl2 4
4500 +#define kAdslPhyAdslG992p3 4
4501 +#define kAdslPhyAdsl2p 5
4502 +#define kAdslPhyAdslG992p5 5
4503 +#define kAdslPhyAnnexI 6
4504 +#define kAdslPhyAdslReAdsl2 7
4505 +#define kAdslPhyG992p2Init 8
4506 +#define kAdslPhyT1P413 9
4508 +#define AdslFeatureSupported(fa,f) ((fa)[(f) >> 5] & (1 << ((f) & 0x1F)))
4509 +#define AdslFeatureSet(fa,f) (fa)[(f) >> 5] |= (1 << ((f) & 0x1F))
4511 +#endif /* AdslXfaceDataHeader */
4512 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/BlankList.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/BlankList.h
4513 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/BlankList.h 1970-01-01 01:00:00.000000000 +0100
4514 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/BlankList.h 2006-06-26 09:07:10.000000000 +0200
4517 +<:copyright-broadcom
4519 + Copyright (c) 2002 Broadcom Corporation
4520 + All Rights Reserved
4521 + No portions of this material may be reproduced in any form without the
4522 + written permission of:
4523 + Broadcom Corporation
4524 + 16215 Alton Parkway
4525 + Irvine, California 92619
4526 + All information contained in this document is Broadcom Corporation
4527 + company private, proprietary, and trade secret.
4531 +/****************************************************************************
4536 + * Definition and implementation (via macros and inline functions)
4537 + * of blank list - list of unused items of any size (not less than
4540 + * Copyright (c) 1993-1998 AltoCom, Inc. All rights reserved.
4541 + * Authors: Ilya Stomakhin
4543 + *****************************************************************************/
4545 +#ifndef BlankListHeader
4546 +#define BlankListHeader
4548 +#define BlankListPeek(head) ((void *) (head))
4549 +#define BlankListNext(p) (*(void **) (p))
4551 +#define BlankListAdd(pHead,p) do { \
4552 + BlankListNext(p) = BlankListNext(pHead); \
4553 + BlankListNext(pHead) = (void *) (p); \
4556 +#define BlankListAddList(pHead,pFirst,pLast) do { \
4557 + if (NULL != (pLast)) { \
4558 + BlankListNext(pLast) = BlankListNext(pHead); \
4559 + BlankListNext(pHead) = (void *) (pFirst); \
4563 +#define BlankListGet(pHead) \
4564 + BlankListNext(pHead); \
4567 + __p = (void **) BlankListNext(pHead); \
4568 + if (NULL != __p) \
4569 + BlankListNext(pHead) = *__p; \
4573 +#define BlankListForEach(pHead,f,ref) do { \
4574 + void *p = BlankListNext(pHead); \
4576 + while (NULL != p) { \
4577 + if ( (f)((p), ref) ) break; \
4578 + p = BlankListNext(p); \
4585 +#define BlankListAddQue(pHead,pqHdr) do { \
4586 + if (NULL != ((QueHeader *)(pqHdr))->tail) { \
4587 + BlankListNext(((QueHeader *)(pqHdr))->tail) = BlankListNext(pHead); \
4588 + BlankListNext(pHead) = ((QueHeader *)(pqHdr))->head; \
4594 +#define BlankListAddDList(pHead,pDListHead) do { \
4595 + if (!DListEmpty(pDListHead)) { \
4596 + BlankListNext(DListLast(pDListHead)) = BlankListNext(pHead); \
4597 + BlankListNext(pHead) = DListFirst(pDListHead); \
4601 +#endif /* BlankListHeader */
4603 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/BlockUtil.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/BlockUtil.h
4604 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/BlockUtil.h 1970-01-01 01:00:00.000000000 +0100
4605 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/BlockUtil.h 2006-06-26 09:07:10.000000000 +0200
4608 +<:copyright-broadcom
4610 + Copyright (c) 2002 Broadcom Corporation
4611 + All Rights Reserved
4612 + No portions of this material may be reproduced in any form without the
4613 + written permission of:
4614 + Broadcom Corporation
4615 + 16215 Alton Parkway
4616 + Irvine, California 92619
4617 + All information contained in this document is Broadcom Corporation
4618 + company private, proprietary, and trade secret.
4625 + * This file contains the interfaces for the fixed point block
4626 + * processing utilities.
4628 + * Copyright (c) 1993-1998 AltoCom, Inc. All rights reserved.
4629 + * Authors: Mark Gonikberg, Haixiang Liang.
4631 + * $Revision: 1.23 $
4633 + * $Id: BlockUtil.h,v 1.23 2004/04/13 00:31:10 ilyas Exp $
4635 + * $Log: BlockUtil.h,v $
4636 + * Revision 1.23 2004/04/13 00:31:10 ilyas
4637 + * Added standard header for shared ADSL driver files
4639 + * Revision 1.22 2003/07/11 01:49:01 gsyu
4640 + * Added BlockShortClearByLong to speed up performance
4642 + * Revision 1.21 2003/07/10 22:35:23 gsyu
4643 + * Speed up BlockByteXXX performance
4645 + * Revision 1.20 2003/07/10 22:15:51 gsyu
4646 + * Added BlockByteMoveByWord to speed up performance
4648 + * Revision 1.19 2002/03/12 00:03:03 yongbing
4649 + * Modify cplxScaleCplxSymbols to accept a shift value instead of an array of shifts
4651 + * Revision 1.18 2001/03/14 00:50:25 georgep
4652 + * All targets use FEQ_PASS_FFTSHIFT, remove code for case where its not defined
4654 + * Revision 1.17 2000/11/30 03:54:09 khp
4655 + * -BlockRealScaleCplxSymbols instead of BlockScaleComplexSymbols
4657 + * Revision 1.16 2000/11/29 20:42:12 liang
4658 + * Add function for ADSL xmt gains with fixed shift.
4660 + * Revision 1.15 2000/10/02 19:24:08 georgep
4661 + * Modify FEQ for new fft, fft outputs a shift for each block
4663 + * Revision 1.14 2000/09/09 00:23:48 liang
4664 + * Add corresponding functions for the ComplexLong FEQ coef.
4666 + * Revision 1.13 2000/05/17 01:36:52 yongbing
4667 + * Add Pentium MMX assembly codes for more block related functions
4669 + * Revision 1.12 2000/04/19 19:22:22 yongbing
4670 + * Add BlockShortScaleby2 function used in G994p1
4672 + * Revision 1.11 2000/04/04 02:28:01 liang
4673 + * Merged with SoftDsl_0_2 from old tree.
4675 + * Revision 1.11 2000/03/14 23:29:01 yongbing
4676 + * Add Pentim MMX codes for BlockCplxSymbolUpdateCplxScale function
4678 + * Revision 1.10 2000/02/16 01:53:00 yongbing
4679 + * Add Pentium MMX module for FEQ
4681 + * Revision 1.9 1999/11/02 02:49:55 liang
4682 + * Add BlockComplexPower function.
4684 + * Revision 1.8 1999/08/05 19:42:34 liang
4685 + * Merged with the softmodem top of the tree on 08/04/99 for assembly files.
4687 + * Revision 1.7 1999/06/16 00:54:39 liang
4688 + * BlockRealScaleComplexSymbols takes a scale shift buffer now.
4690 + * Revision 1.6 1999/05/22 02:18:29 liang
4691 + * Add one more parameter to BlockCplxSymbolUpdateCplxScale function.
4693 + * Revision 1.5 1999/05/14 22:49:39 liang
4694 + * Added two more functions.
4696 + * Revision 1.4 1999/03/26 03:29:57 liang
4697 + * Add function BlockComplexMultLongAcc.
4699 + * Revision 1.3 1999/02/22 22:40:59 liang
4700 + * BlockByteSum takes uchar inputs instead of schar.
4702 + * Revision 1.2 1999/02/10 01:56:44 liang
4703 + * Added BlockByteSum, BlockRealScaleComplexSymbols and BlockCplxScaleComplexSymbols.
4705 + * Revision 1.1 1998/10/28 01:35:38 liang
4706 + * *** empty log message ***
4708 + * Revision 1.12 1998/07/08 17:09:25 scott
4709 + * Removed unnecessary undefs
4711 + * Revision 1.11 1998/04/02 06:19:44 mwg
4712 + * Added two new utilities.
4714 + * Revision 1.10 1998/03/26 23:20:55 liang
4715 + * Added function BlockShortMultiply.
4717 + * Revision 1.9 1998/02/16 18:41:00 scott
4718 + * Added MMX autodetect support
4720 + * Revision 1.8 1997/12/13 06:11:35 mwg
4721 + * Added new functions:
4722 + * BlockLongSubtract()
4724 + * BlockLong2ShortSubtract()
4725 + * BlockShort2LongMove()
4726 + * BlockShortInterpolate()
4727 + * BlockLongCorrelate()
4728 + * BlockMapShort2Short()
4730 + * Revision 1.7 1997/03/19 18:35:10 mwg
4731 + * Changed copyright notice.
4733 + * Revision 1.6 1997/02/11 00:08:18 mwg
4734 + * Added BlockByteMove function
4736 + * Revision 1.5 1997/02/04 08:40:08 mwg
4737 + * Changed interface forBlockReal2ComplexMacc()
4739 + * Revision 1.4 1997/01/23 02:04:28 mwg
4740 + * Added return value to BlockShortMove
4742 + * Revision 1.3 1996/12/19 22:34:55 mwg
4743 + * Added new function BlockFullPower().
4745 + * Revision 1.2 1996/02/21 03:59:15 mwg
4746 + * Added new function BlockReal2ComplexMacc
4748 + * Revision 1.1.1.1 1996/02/14 02:35:13 mwg
4749 + * Redesigned the project directory structure. Merged V.34 into the project.
4751 + * Revision 1.5 1995/04/04 06:09:32 mwg
4752 + * Changed the SoftModem status reporting: now the status is a structure/union
4753 + * where different fields used for different status code. This will enable
4754 + * efficient status snooping for high level protocols on top of the softmodem.
4758 +#ifndef BlockUtilPh
4759 +#define BlockUtilPh
4761 +extern void BlockLongAdd (int, long*, long*, long*);
4762 +extern void BlockLong2ShortSubtract (int, long*, long*, short*);
4763 +extern void BlockShort2LongMove (int, short*, long*);
4764 +extern void BlockShortMultiply (int, int, short*, short*, short*);
4765 +extern void BlockByteMoveUnaligned (int size, uchar *srcPtr, uchar *dstPtr);
4766 +extern void BlockShortOffset (int, short, short*, short*);
4767 +extern long BlockShortInterpolateWithIncrement (int size, long scaleFactor, long increment, int shift, short* src1Ptr, short* src2Ptr, short* dstPtr);
4768 +extern void BlockReal2ComplexMult (int, short*, ComplexShort*, ComplexShort*);
4769 +extern void BlockComplexConjigateMult (int, ComplexShort*, ComplexShort*, ComplexShort*);
4771 +extern long BlockSum (int, short*);
4772 +extern long BlockByteSum (int, uchar*);
4773 +extern void BlockComplexSum (int, ComplexShort*, ComplexLong*);
4774 +extern void BlockComplexPower (int, int, ComplexShort*, long*);
4775 +extern long BlockFullPower (int, short*);
4776 +extern long BlockLongCorrelate (int, long*, long*);
4778 +extern int BlockSymbol2Byte (int, int, ushort*, uchar*);
4779 +extern int BlockByte2Symbol (int, int, uchar*, ushort*);
4781 +extern void BlockMapShort2Complex (int, ushort*, ComplexByte*, ComplexShort*);
4782 +extern void BlockMapShort2Short (int size, ushort *srcPtr, short *mapPtr, short *dstPtr);
4783 +extern void BlockMapByte2Byte (int size, uchar *srcPtr, uchar *mapPtr, uchar *dstPtr);
4784 +extern void BlockMapByte2Short (int size, uchar *srcPtr, short *mapPtr, short *dstPtr);
4785 +extern void BlockShortMult (int size, int shift, short* src1Ptr, short* src2Ptr, short* dstPtr);
4787 +extern int SM_DECL Idle(void);
4789 +extern void BlockGenerateAngles(int size, ComplexShort *anglePtr, ComplexShort *incPtr, ComplexShort *dstPtr);
4790 +extern void BlockExtractRealPart(int size, ComplexShort *srcPtr, short *dstPtr);
4791 +extern void BlockShortScaleByShift (int size, int shift, short* srcPtr, short* dstPtr);
4793 +#ifndef PENTIUM_REDEFS /* only if these have not been redefined to function pointers */
4794 +extern long BlockPower (int, short*);
4795 +extern void BlockReal2ComplexMacc (int, int, short*, ComplexShort*, ComplexLong*);
4796 +extern void BlockComplexMult (int, ComplexShort*, ComplexShort*, ComplexShort*);
4797 +extern void BlockShortScale (int, short, int, short*, short*);
4798 +extern int SM_DECL BlockShortMove (int, short*, short*);
4799 +extern long BlockCorrelate (int, short*, short*);
4801 +extern void BlockRealScaleComplexSymbols(int, int, uchar*, short*, ComplexShort*, ComplexShort*);
4802 +/* FIXME -- the following 3 functions can be removed */
4803 +extern void BlockCplxScaleComplexSymbols(int, int, int, ComplexShort*, ComplexShort*, ComplexShort*);
4804 +extern void BlockCplxSymbolUpdateCplxScale(int, int, int, uchar*, ComplexShort*,
4805 + ComplexShort*, ComplexShort*, ComplexShort*);
4806 +extern void BlockComplexShortFill (int, short, short, ComplexShort*);
4809 +extern void BlockRealScaleCplxSymbols(int, int, int, short*, ComplexShort*, ComplexShort*);
4810 +extern void BlockCplxLongConjigateMultCplxShort(int, ComplexLong*, ComplexShort*, ComplexLong*);
4812 +extern void BlockCplxLongScaleCplxSymbols(int, int, int, ComplexLong*, ComplexShort*, short*, ComplexShort*);
4813 +extern void BlockCplxSymbolUpdateCplxLongScale(int, int, int, int,
4814 + ComplexShort*, short *, ComplexLong*, ComplexShort*);
4816 +extern void BlockComplexLongFill (int, long, long, ComplexLong*);
4818 +extern void BlockShortSubtract (int, short*, short*, short*);
4819 +extern void BlockLongSubtract (int, long*, long*, long*);
4820 +extern void BlockShortAdd (int, short*, short*, short*);
4821 +extern void BlockByteMove (int, uchar*, uchar*);
4822 +extern void BlockByteMoveByLong (int, uchar*, uchar*);
4823 +extern void SM_DECL BlockByteFill (int, uchar, uchar*);
4824 +extern void BlockByteFillByLong (int, uchar, uchar*);
4825 +extern void BlockByteClear (int, uchar*);
4826 +extern void BlockByteClearByLong (int, uchar*);
4827 +extern void BlockShortFill (int, short, short*);
4828 +extern void BlockShortClear (int, short*);
4829 +extern void BlockShortClearByLong (int, short*);
4830 +extern void BlockLongFill (int, long, long*);
4831 +extern void BlockLongClear (int, long*);
4832 +extern void BlockComplexShortClear (int, ComplexShort*);
4833 +extern void BlockShortInvert (int, short*, short*);
4834 +extern void BlockShortScaleDown (int, short*);
4835 +extern void BlockLongMove (int, long*, long*);
4836 +extern void BlockShortInterpolate (int, short, int, short*, short*, short*);
4837 +extern void BlockComplexMultLongAcc (int, int, ComplexShort*, ComplexShort*, ComplexLong*);
4841 +#endif /* BlockUtilPh */
4842 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/CircBuf.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/CircBuf.h
4843 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/CircBuf.h 1970-01-01 01:00:00.000000000 +0100
4844 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/CircBuf.h 2006-06-26 09:07:10.000000000 +0200
4847 +<:copyright-broadcom
4849 + Copyright (c) 2002 Broadcom Corporation
4850 + All Rights Reserved
4851 + No portions of this material may be reproduced in any form without the
4852 + written permission of:
4853 + Broadcom Corporation
4854 + 16215 Alton Parkway
4855 + Irvine, California 92619
4856 + All information contained in this document is Broadcom Corporation
4857 + company private, proprietary, and trade secret.
4861 +/****************************************************************************
4863 + * CircBuf -- Generic Circular Buffer
4866 + * Implementation of generic circular buffer algorithms
4869 + * Copyright (c) 1993-1998 AltoCom, Inc. All rights reserved.
4870 + * Authors: Ilya Stomakhin
4872 + * $Revision: 1.14 $
4874 + * $Id: CircBuf.h,v 1.14 2004/06/24 03:10:37 ilyas Exp $
4876 + * $Log: CircBuf.h,v $
4877 + * Revision 1.14 2004/06/24 03:10:37 ilyas
4878 + * Added extra macro to be able to use un-cached variable (for status write)
4880 + * Revision 1.13 2004/02/09 23:47:02 ilyas
4881 + * Fixed last change
4883 + * Revision 1.12 2004/02/06 22:52:58 ilyas
4884 + * Improved stretch buffer write
4886 + * Revision 1.11 2002/12/30 23:27:55 ilyas
4887 + * Added macro for HostDma optimizations
4889 + * Revision 1.10 2002/10/26 02:15:02 ilyas
4890 + * Optimized and added new macros for HostDma
4892 + * Revision 1.9 2002/01/22 23:59:29 ilyas
4893 + * Added paraenthesis around macro argument
4895 + * Revision 1.8 2002/01/15 22:28:38 ilyas
4896 + * Extended macro to support readPtr from uncached address
4898 + * Revision 1.7 2001/09/21 19:47:05 ilyas
4899 + * Fixed compiler warnings for VxWorks build
4901 + * Revision 1.6 2001/06/07 18:47:56 ilyas
4902 + * Added more macros for circular buffer arithmetics
4904 + * Revision 1.5 2001/04/18 03:58:34 ilyas
4905 + * Added LOG file write granularity
4907 + * Revision 1.4 2001/01/19 04:34:12 ilyas
4908 + * Added more macros to circular buffer implementation
4910 + * Revision 1.3 2001/01/06 04:01:41 ilyas
4911 + * Changed the way we write status messages
4913 + * Revision 1.2 2001/01/04 05:52:21 ilyas
4914 + * Added implementation of stretchable circular buffer used in LOG and Status
4917 + * Revision 1.1 2000/05/03 03:45:55 ilyas
4918 + * Original implementation
4921 + *****************************************************************************/
4923 +#ifndef CircBufHeader_H_
4924 +#define CircBufHeader_H_
4932 +} circBufferStruct;
4934 +/* Initialize circular buffer */
4936 +#define CircBufferInit(pCB,buf,size) do { \
4937 + (pCB)->pStart = (char *) (buf); \
4938 + (pCB)->pRead = (pCB)->pWrite = (pCB)->pStart; \
4939 + (pCB)->pEnd = (pCB)->pStart + size; \
4942 +#define CircBufferGetSize(pCB) ((pCB)->pEnd - (pCB)->pStart)
4943 +#define CircBufferGetStartPtr(pCB) ((void *) (pCB)->pStart)
4944 +#define CircBufferGetEndPtr(pCB) ((void *) (pCB)->pEnd)
4946 +#define CircBufferReset(pCB) (pCB)->pRead = (pCB)->pWrite = (pCB)->pStart
4949 +#define CircBufferGetReadPtr(pCB) ((void *) (pCB)->pRead)
4950 +#define CircBufferGetWritePtr(pCB) ((void *) (pCB)->pWrite)
4954 +#define CircBufferDistance(pCB,p1,p2,d) ((char*)(p2) - (char*)(p1) - d >= 0 ? \
4955 + (char*)(p2) - (char*)(p1) - d : \
4956 + ((char*)(p2)- (char*)(p1) - d + ((pCB)->pEnd - (pCB)->pStart)))
4958 +#define CircBufferAddContig(pCB,p,n) ((char*)(p) + (n) == (pCB)->pEnd ? (pCB)->pStart : (char*)(p) + (n))
4960 +static __inline int CircBufferDistance(circBufferStruct *pCB, char *p1, char *p2, int d)
4962 + int tmp = p2 - p1 - d;
4964 + return (tmp >= 0 ? tmp : tmp + (pCB->pEnd - pCB->pStart));
4967 +static __inline char * CircBufferAddContig(circBufferStruct *pCB, char *p, int n)
4970 + return (p == pCB->pEnd ? pCB->pStart : p);
4974 +#define CircBufferAdd(pCB,p,n) ((char*)(p) + (n) >= (pCB)->pEnd ? \
4975 + (pCB)->pStart + ((char*)(p) + (n) - (pCB)->pEnd) : \
4978 +#define CircBufferReadUpdate(pCB,n) (pCB)->pRead = CircBufferAdd(pCB,(pCB)->pRead,n)
4979 +#define CircBufferWriteUpdate(pCB,n) (pCB)->pWrite= CircBufferAdd(pCB,(pCB)->pWrite,n)
4981 +#define CircBufferReadUpdateContig(pCB,n) (pCB)->pRead = CircBufferAddContig(pCB,(pCB)->pRead,n)
4982 +#define CircBufferWriteUpdateContig(pCB,n) (pCB)->pWrite= CircBufferAddContig(pCB,(pCB)->pWrite,n)
4984 +#define CircBufferGetReadAvail(pCB) CircBufferDistance(pCB,(pCB)->pRead,(pCB)->pWrite,0)
4985 +#define CircBufferIsReadEmpty(pCB) ((pCB)->pRead == (pCB)->pWrite)
4986 +#define CircBufferGetWriteAvail(pCB) CircBufferDistance(pCB,(pCB)->pWrite,(pCB)->pRead,1)
4987 +#define CircBufferGetWriteAvailN(pCB,n) CircBufferDistance(pCB,(pCB)->pWrite,(pCB)->pRead,n)
4989 +#define CircBufferGetReadContig(pCB) ((unsigned long)(pCB)->pWrite >= (unsigned long) (pCB)->pRead ? \
4990 + (pCB)->pWrite - (pCB)->pRead : \
4991 + (pCB)->pEnd - (pCB)->pRead)
4993 +#define CircBufferGetWriteContig(pCB) ((pCB)->pEnd - (pCB)->pWrite > CircBufferGetWriteAvail(pCB) ? \
4994 + CircBufferGetWriteAvail(pCB) : \
4995 + (pCB)->pEnd - (pCB)->pWrite)
4999 +** structure and macros for "strectch" buffer
5007 + char *pStretchEnd;
5010 +} stretchBufferStruct;
5012 +#define StretchBufferInit(pSB,buf,size,extra) do { \
5013 + (pSB)->pStart = (char *) (buf); \
5014 + (pSB)->pRead = (pSB)->pWrite = (pSB)->pStart; \
5015 + (pSB)->pEnd = (pSB)->pStart + (size); \
5016 + (pSB)->pStretchEnd = (pSB)->pEnd; \
5017 + (pSB)->pExtraEnd = (pSB)->pEnd+(extra); \
5020 +#define StretchBufferGetSize(pSB) ((pSB)->pEnd - (pSB)->pStart)
5021 +#define StretchBufferGetStartPtr(pSB) ((void *) (pSB)->pStart)
5022 +#define StretchBufferGetReadPtr(pSB) ((void *) (pSB)->pRead)
5023 +#define StretchBufferGetWritePtr(pSB) ((void *) (pSB)->pWrite)
5024 +#define StretchBufferReset(pSB) ((pSB)->pRead = (pSB)->pWrite = (pSB)->pStart)
5026 +#define StretchBufferGetReadToEnd(pSB) ((pSB)->pStretchEnd - (pSB)->pRead)
5028 +#define StretchBufferGetReadAvail(pSB) ((pSB)->pWrite - (pSB)->pRead >= 0 ? \
5029 + (pSB)->pWrite - (pSB)->pRead : \
5030 + (pSB)->pStretchEnd - (pSB)->pRead)
5031 +#define _StretchBufferGetWriteAvail(pSB,rd) ((rd) - (pSB)->pWrite > 0 ? \
5032 + (rd) - (pSB)->pWrite - 1 : \
5033 + ((pSB)->pExtraEnd - (pSB)->pWrite))
5034 +#define StretchBufferGetWriteAvail(pSB) _StretchBufferGetWriteAvail(pSB, (pSB)->pRead)
5036 +#define StretchBufferReadUpdate(pSB,n) do { \
5039 + p = (pSB)->pRead + (n); \
5040 + (pSB)->pRead = (p >= (pSB)->pStretchEnd ? (pSB)->pStart : p); \
5043 +#define _StretchBufferWriteUpdate(pSB,rd,n) do { \
5046 + p = (pSB)->pWrite + (n); \
5047 + if (p >= (pSB)->pEnd) { \
5048 + if ((rd) != (pSB)->pStart) { \
5049 + (pSB)->pStretchEnd = p; \
5050 + (pSB)->pWrite = (pSB)->pStart; \
5054 + (pSB)->pWrite = p; \
5057 +#define StretchBufferWriteUpdate(pSB,n) _StretchBufferWriteUpdate(pSB,(pSB)->pRead,n)
5059 +#endif /* CircBufHeader_H_ */
5063 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/DList.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/DList.h
5064 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/DList.h 1970-01-01 01:00:00.000000000 +0100
5065 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/DList.h 2006-06-26 09:07:10.000000000 +0200
5068 +<:copyright-broadcom
5070 + Copyright (c) 2002 Broadcom Corporation
5071 + All Rights Reserved
5072 + No portions of this material may be reproduced in any form without the
5073 + written permission of:
5074 + Broadcom Corporation
5075 + 16215 Alton Parkway
5076 + Irvine, California 92619
5077 + All information contained in this document is Broadcom Corporation
5078 + company private, proprietary, and trade secret.
5082 +/****************************************************************************
5087 + * Definition and implementation (via macros and inline functions)
5088 + * of double-linked list
5090 + * Copyright (c) 1993-1998 AltoCom, Inc. All rights reserved.
5091 + * Authors: Ilya Stomakhin
5093 + *****************************************************************************/
5095 +#ifndef DListHeader_H_
5096 +#define DListHeader_H_
5098 +typedef struct _DListHeader
5100 + struct _DListHeader *next; /* next item in the list */
5101 + struct _DListHeader *prev; /* prev item in the list */
5104 +typedef struct _DListUpHeader
5106 + struct _DListUpHeader *next; /* next item in the list */
5107 + struct _DListUpHeader *prev; /* prev item in the list */
5108 + struct _DListUpHeader *head; /* head of the list */
5111 +/* Double linked list DList management macros */
5113 +#define DListInit(pDListHead) do { \
5114 + ((DListHeader *)(pDListHead))->next = pDListHead; \
5115 + ((DListHeader *)(pDListHead))->prev = pDListHead; \
5118 +#define DListNext(pDListEntry) (((DListHeader *)(pDListEntry))->next)
5119 +#define DListPrev(pDListEntry) (((DListHeader *)(pDListEntry))->prev)
5121 +#define DListEntryLinked(pDListEntry) (NULL != DListNext(pDListEntry))
5122 +#define DListUnlinkEntry(pDListEntry) (DListNext(pDListEntry) = DListPrev(pDListEntry) = NULL)
5124 +#define DListFirst(pDListHead) DListNext(pDListHead)
5125 +#define DListLast(pDListHead) DListPrev(pDListHead)
5126 +#define DListValid(pDListHead,pEntry) ((void *)(pDListHead) != (pEntry))
5127 +#define DListEmpty(pDListHead) ((void *)pDListHead == ((DListHeader *)pDListHead)->next)
5129 +#define DListInsertAfter(pDListEntry,pEntry) do { \
5130 + ((DListHeader *)(pEntry))->next = ((DListHeader *)(pDListEntry))->next; \
5131 + ((DListHeader *)(pEntry))->prev = (DListHeader *)(pDListEntry); \
5132 + ((DListHeader *)(pDListEntry))->next->prev = (DListHeader *) (pEntry); \
5133 + ((DListHeader *)(pDListEntry))->next = (DListHeader *) (pEntry); \
5136 +#define DListInsertBefore(pDListEntry,pEntry) do { \
5137 + ((DListHeader *)(pEntry))->next = (DListHeader *)(pDListEntry); \
5138 + ((DListHeader *)(pEntry))->prev = ((DListHeader *)(pDListEntry))->prev; \
5139 + ((DListHeader *)(pDListEntry))->prev->next = (DListHeader *) (pEntry); \
5140 + ((DListHeader *)(pDListEntry))->prev = (DListHeader *) (pEntry); \
5143 +#define DListInsertTail(pDListHead,pEntry) DListInsertBefore(pDListHead,pEntry)
5144 +#define DListInsertHead(pDListHead,pEntry) DListInsertAfter(pDListHead,pEntry)
5146 +#define DListRemove(pDListEntry) do { \
5147 + ((DListHeader *)(pDListEntry))->prev->next = ((DListHeader *)(pDListEntry))->next; \
5148 + ((DListHeader *)(pDListEntry))->next->prev = ((DListHeader *)(pDListEntry))->prev; \
5152 +#define DListForEach(pDListHead,f,ref) do { \
5153 + DListHeader *p = ((DListHeader *)(pDListHead))->next; \
5155 + while (DListValid(pDListHead,p)) { \
5156 + DListHeader *p0 = p; \
5157 + p = DListNext(p); \
5158 + if ( (f)((void *)p0, ref) ) break; \
5163 +/* Double linked list with up link DListUp management macros */
5165 +#define DListUpInit(pDListHead) do { \
5166 + ((DListUpHeader *)(pDListHead))->next = (DListUpHeader *) (pDListHead); \
5167 + ((DListUpHeader *)(pDListHead))->prev = (DListUpHeader *) (pDListHead); \
5168 + ((DListUpHeader *)(pDListHead))->head = (DListUpHeader *) (pDListHead); \
5171 +#define DListUpNext(pDListEntry) ((DListUpHeader *) DListNext(pDListEntry))
5172 +#define DListUpPrev(pDListEntry) ((DListUpHeader *) DListPrev(pDListEntry))
5173 +#define DListUpHead(pDListEntry) (((DListUpHeader *)(pDListEntry))->head)
5175 +#define DListUpFirst(pDListHead) DListUpNext(pDListHead)
5176 +#define DListUpLast(pDListHead) DListUpPrev(pDListHead)
5177 +#define DListUpValid(pEntry) (((DListUpHeader *)(pEntry))->head != (void *) pEntry)
5178 +#define DListUpEmpty(pDListHead) DListEmpty(pDListHead)
5180 +#define DListUpInsertAfter(pDListEntry,pEntry) do { \
5181 + DListInsertAfter(pDListEntry,pEntry); \
5182 + ((DListUpHeader *)(pEntry))->head = ((DListUpHeader *)(pDListEntry))->head; \
5185 +#define DListUpInsertBefore(pDListEntry,pEntry) do { \
5186 + DListInsertBefore(pDListEntry,pEntry); \
5187 + ((DListUpHeader *)(pEntry))->head = ((DListUpHeader *)(pDListEntry))->head; \
5190 +#define DListUpInsertTail(pDListHead,pEntry) DListUpInsertBefore(pDListHead,pEntry)
5191 +#define DListUpInsertHead(pDListHead,pEntry) DListUpInsertAfter(pDListHead,pEntry)
5193 +#define DListUpRemove(pDListEntry) DListRemove(pDListEntry)
5194 +#define DListUpForEach(pDListHead,f,ref) DListForEach((DListHeader *)(pDListHead),f,ref)
5196 +#endif /* DListHeader_H_ */
5198 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/DslFramer.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/DslFramer.h
5199 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/DslFramer.h 1970-01-01 01:00:00.000000000 +0100
5200 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/DslFramer.h 2006-06-26 09:07:10.000000000 +0200
5203 +<:copyright-broadcom
5205 + Copyright (c) 2002 Broadcom Corporation
5206 + All Rights Reserved
5207 + No portions of this material may be reproduced in any form without the
5208 + written permission of:
5209 + Broadcom Corporation
5210 + 16215 Alton Parkway
5211 + Irvine, California 92619
5212 + All information contained in this document is Broadcom Corporation
5213 + company private, proprietary, and trade secret.
5217 +/****************************************************************************
5222 + * This file contains common DSL framer definitions
5225 + * Copyright (c) 1993-1998 AltoCom, Inc. All rights reserved.
5226 + * Authors: Ilya Stomakhin
5228 + * $Revision: 1.3 $
5230 + * $Id: DslFramer.h,v 1.3 2004/07/21 01:39:41 ilyas Exp $
5232 + * $Log: DslFramer.h,v $
5233 + * Revision 1.3 2004/07/21 01:39:41 ilyas
5234 + * Reset entire G.997 state on retrain. Timeout in G.997 if no ACK
5236 + * Revision 1.2 2004/04/12 23:41:10 ilyas
5237 + * Added standard header for shared ADSL driver files
5239 + * Revision 1.1 2001/12/13 02:28:27 ilyas
5240 + * Added common framer (DslPacket and G997) and G997 module
5244 + *****************************************************************************/
5246 +#ifndef DslFramerHeader
5247 +#define DslFramerHeader
5251 +#define kDslFramerInitialized 0x80000000
5255 +#define kDslFramerRxFrame 1
5256 +#define kDslFramerRxFrameErr 2
5257 +#define kDslFramerTxFrame 3
5258 +#define kDslFramerTxFrameErr 4
5260 +#define kDslFramerRxFrameErrFlushed 1
5261 +#define kDslFramerRxFrameErrAbort 2
5262 +#define kDslFramerRxFrameErrPhy 3
5264 +#define kDslFramerTxFrameErrFlushed 1
5267 +typedef struct _dslFramerBufDesc {
5272 +} dslFramerBufDesc;
5274 +/* data bufDesc flags */
5276 +#define kDslFramerStartNewFrame 1
5277 +#define kDslFramerEndOfFrame 2
5278 +#define kDslFramerAbortFrame 4
5280 +#define kDslFramerExtraByteShift 3
5281 +#define kDslFramerExtraByteMask (0x7 << kDslFramerExtraByteShift)
5283 +typedef struct _dslFramerControl {
5285 + dslFrameHandlerType rxIndicateHandlerPtr;
5286 + dslFrameHandlerType txCompleteHandlerPtr;
5287 + dslStatusHandlerType statusHandlerPtr;
5289 + ulong statusOffset;
5295 + dslFrame *freeBufListPtr;
5296 + void *freeBufPool;
5299 + dslFrame *freePacketListPtr;
5300 + void *freePacketPool;
5302 + /* RX working data set */
5304 + dslFrame *pRxFrame;
5305 + dslFrameBuffer *pRxBuf;
5306 + uchar *pRxBufData;
5307 + uchar *pRxBufDataEnd;
5310 + /* TX working data set */
5312 + DListHeader dlistTxWaiting;
5313 + dslFrame *pTxFrame;
5314 + dslFrameBuffer *pTxBuf;
5315 + uchar *pTxBufData;
5316 + uchar *pTxBufDataEnd;
5320 + ulong dslByteCntRxTotal;
5321 + ulong dslByteCntTxTotal;
5323 + ulong dslFrameCntRxTotal;
5324 + ulong dslFrameCntRxErr;
5325 + ulong dslFrameCntTxTotal;
5327 +} dslFramerControl;
5330 +extern Boolean DslFramerInit(
5332 + dslFramerControl *dfCtrl,
5335 + ulong statusOffset,
5336 + dslFrameHandlerType rxIndicateHandlerPtr,
5337 + dslFrameHandlerType txCompleteHandlerPtr,
5338 + dslStatusHandlerType statusHandlerPtr,
5341 + ulong rxPacketNum);
5342 +extern void DslFramerClose(void *gDslVars, dslFramerControl *dfCtrl);
5343 +extern void DslFramerSendFrame(void *gDslVars, dslFramerControl *dfCtrl, dslFrame *pFrame);
5344 +extern void DslFramerReturnFrame(void *gDslVars, dslFramerControl *dfCtrl, dslFrame *pFrame);
5347 +extern Boolean DslFramerRxGetPtr(void *gDslVars, dslFramerControl *dfCtrl, dslFramerBufDesc *pBufDesc);
5348 +extern void DslFramerRxDone (void *gDslVars, dslFramerControl *dfCtrl, dslFramerBufDesc *pBufDesc);
5349 +extern Boolean DslFramerTxGetPtr(void *gDslVars, dslFramerControl *dfCtrl, dslFramerBufDesc *pBufDesc);
5350 +extern void DslFramerTxDone(void *gDslVars, dslFramerControl *dfCtrl, dslFramerBufDesc *pBufDesc);
5351 +extern Boolean DslFramerTxIdle (void *gDslVars, dslFramerControl *dfCtrl);
5352 +extern void DslFramerTxFlush(void *gDslVars, dslFramerControl *dfCtrl);
5354 +extern void * DslFramerGetFramePoolHandler(dslFramerControl *dfCtrl);
5355 +extern void DslFramerClearStat(dslFramerControl *dfCtrl);
5357 +extern void DslFramerRxFlushFrame (void *gDslVars, dslFramerControl *dfCtrl, int errCode);
5358 +extern void DslFramerRxFlush(void *gDslVars, dslFramerControl *dfCtrl);
5360 +#endif /* DslFramerHeader */
5361 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/Flatten.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/Flatten.h
5362 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/Flatten.h 1970-01-01 01:00:00.000000000 +0100
5363 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/Flatten.h 2006-06-26 09:07:10.000000000 +0200
5366 +<:copyright-broadcom
5368 + Copyright (c) 2002 Broadcom Corporation
5369 + All Rights Reserved
5370 + No portions of this material may be reproduced in any form without the
5371 + written permission of:
5372 + Broadcom Corporation
5373 + 16215 Alton Parkway
5374 + Irvine, California 92619
5375 + All information contained in this document is Broadcom Corporation
5376 + company private, proprietary, and trade secret.
5380 +/****************************************************************************
5382 + * Flatten.h -- Header for Flatten/Unflatten command/status
5384 + * Copyright (c) 1998 AltoCom, Inc. All rights reserved.
5385 + * Authors: Ilya Stomakhin
5387 + * $Revision: 1.14 $
5389 + * $Id: Flatten.h,v 1.14 2004/03/04 19:48:52 linyin Exp $
5391 + * $Log: Flatten.h,v $
5392 + * Revision 1.14 2004/03/04 19:48:52 linyin
5393 + * Support adsl2plus
5395 + * Revision 1.13 2003/10/17 22:45:14 yongbing
5396 + * Increase buffer size for large B&G table of G992P3
5398 + * Revision 1.12 2003/08/12 23:16:26 khp
5399 + * - for Haixiang: added support for ADSL_MARGIN_TWEAK_TEST
5401 + * Revision 1.11 2003/02/27 06:33:03 ilyas
5402 + * Improved free space checking in command buffer (became a problem with
5403 + * 2 commands SetXmtgain and StartPhy)
5405 + * Revision 1.10 2003/01/11 01:27:07 ilyas
5406 + * Improved checking for available space in status buffer
5408 + * Revision 1.9 2002/09/07 01:43:59 ilyas
5409 + * Added support for OEM parameters
5411 + * Revision 1.8 2002/05/16 00:01:52 khp
5412 + * -added missing #endif
5414 + * Revision 1.7 2002/05/15 00:04:48 mprahlad
5415 + * increase the status buffer size - prevent memory overflow for annexC cases
5417 + * Revision 1.6 2002/04/05 04:10:33 linyin
5418 + * -hack to fit in Annex C firmware in LMEM
5420 + * Revision 1.5 2002/04/05 02:45:25 linyin
5421 + * Make the buffer side larger for annexC
5423 + * Revision 1.4 2002/01/30 07:19:06 ilyas
5424 + * Moved showtime code to LMEM
5426 + * Revision 1.3 2001/08/29 02:56:01 ilyas
5427 + * Added tests for flattening/unflatenning command and statuses (dual mode)
5429 + * Revision 1.2 2001/04/25 00:30:54 ilyas
5430 + * Adjusted MaxFrameLen
5432 + * Revision 1.1 2001/04/24 21:41:21 ilyas
5433 + * Implemented status flattening/unflattaning to transfer statuses between
5434 + * modules asynchronously through the circular buffer
5437 + *****************************************************************************/
5439 +#ifndef _Flatten_H_
5440 +#define _Flatten_H_
5442 +#include "CircBuf.h"
5444 +#ifdef ADSL_MARGIN_TWEAK_TEST
5445 +#define kMaxFlattenedCommandSize 272 /* maximum no. of bytes in flattened cmd */
5447 +#define kMaxFlattenedCommandSize 128 /* maximum no. of bytes in flattened cmd */
5449 +#if defined(G992_ANNEXC) || defined(G992P3)
5450 +#if defined(G992P5)
5451 +#define kMaxFlattenedStatusSize 2200 /* maximum no. of bytes in flattened status */
5453 +#define kMaxFlattenedStatusSize 1100 /* maximum no. of bytes in flattened status */
5456 +#define kMaxFlattenedStatusSize 550 /* maximum no. of bytes in flattened status */
5459 +#define kMaxFlattenFramelength (kMaxFlattenedStatusSize - (4*sizeof(long)) - 20)
5461 +extern int SM_DECL FlattenCommand (dslCommandStruct *cmd, ulong *dstPtr, ulong nAvail);
5462 +extern int SM_DECL UnflattenCommand(ulong *srcPtr, dslCommandStruct *cmd);
5463 +extern int SM_DECL FlattenStatus (dslStatusStruct *status, ulong *dstPtr, ulong nAvail);
5464 +extern int SM_DECL UnflattenStatus (ulong *srcPtr, dslStatusStruct *status);
5466 +#define FlattenBufferInit(fb,fbData,bufSize,itemSize) \
5467 + StretchBufferInit(fb, fbData, bufSize, itemSize)
5469 +extern int SM_DECL FlattenBufferStatusWrite(stretchBufferStruct *fBuf, dslStatusStruct *status);
5470 +extern int SM_DECL FlattenBufferStatusRead(stretchBufferStruct *fBuf, dslStatusStruct *status);
5472 +extern int SM_DECL FlattenBufferCommandWrite(stretchBufferStruct *fBuf, dslCommandStruct *cmd);
5473 +extern int SM_DECL FlattenBufferCommandRead(stretchBufferStruct *fBuf, dslCommandStruct *cmd);
5475 +#define FlattenBufferReadComplete(fb,nBytes) \
5476 + StretchBufferReadUpdate (fb, nBytes)
5478 +#endif /* _Flatten_H_ */
5480 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/G992p3OvhMsg.gh linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/G992p3OvhMsg.gh
5481 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/G992p3OvhMsg.gh 1970-01-01 01:00:00.000000000 +0100
5482 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/G992p3OvhMsg.gh 2006-06-26 09:07:10.000000000 +0200
5485 +<:copyright-broadcom
5487 + Copyright (c) 2002 Broadcom Corporation
5488 + All Rights Reserved
5489 + No portions of this material may be reproduced in any form without the
5490 + written permission of:
5491 + Broadcom Corporation
5492 + 16215 Alton Parkway
5493 + Irvine, California 92619
5494 + All information contained in this document is Broadcom Corporation
5495 + company private, proprietary, and trade secret.
5499 +/****************************************************************************
5504 + * This is a header file which defines the type for the G992p3 overhead
5505 + * channel messages global variable structure.
5508 + * Copyright (c) 1999-2003 BroadCom, Inc. All rights reserved.
5509 + * Authors: Ilya Stomakhin
5511 + * $Revision: 1.5 $
5513 + * $Id: G992p3OvhMsg.gh,v 1.5 2004/09/11 03:52:25 ilyas Exp $
5515 + * $Log: G992p3OvhMsg.gh,v $
5516 + * Revision 1.5 2004/09/11 03:52:25 ilyas
5517 + * Added support for overhead message segmentation
5519 + * Revision 1.4 2004/07/07 01:27:20 ilyas
5520 + * Fixed OHC message stuck problem on L2 entry/exit
5522 + * Revision 1.3 2004/06/10 00:13:31 ilyas
5523 + * Added L2/L3 and SRA
5525 + * Revision 1.2 2004/04/12 23:34:52 ilyas
5526 + * Merged the latest ADSL driver chnages for ADSL2+
5528 + * Revision 1.1 2003/07/18 19:39:18 ilyas
5529 + * Initial G.992.3 overhead channel message implementation (from ADSL driver)
5532 + *****************************************************************************/
5534 +#ifndef G992p3OvhMsgFramerGlobals
5535 +#define G992p3OvhMsgFramerGlobals
5537 +#define kG992p3OvhMsgMaxCmdSize (16 + 16)
5538 +#define kG992p3OvhMsgMaxRspSize (16 + 2*512)
5542 + dslFrame *segFrame;
5543 + dslFrameBuffer *segFrBufCur;
5544 + dslFrameBuffer segFrBuf;
5550 + g992p3SegFrameCtlStruct;
5555 + dslFrameHandlerType rxReturnFramePtr;
5556 + dslFrameHandlerType txSendFramePtr;
5557 + dslCommandHandlerType cmdHandlerPtr;
5558 + dslStatusHandlerType statusHandlerPtr;
5560 + dslFrame txRspFrame;
5561 + dslFrameBuffer txRspFrBuf;
5562 + dslFrameBuffer txRspFrBuf1;
5563 + uchar txRspBuf[kG992p3OvhMsgMaxRspSize];
5564 + dslFrame txPwrRspFrame;
5565 + dslFrameBuffer txPwrRspFrBuf0;
5566 + dslFrameBuffer txPwrRspFrBuf0a;
5567 + dslFrameBuffer txPwrRspFrBuf1;
5568 + uchar txPwrRspBuf0[8];
5569 + dslFrame txCmdFrame;
5570 + dslFrameBuffer txCmdFrBuf0;
5571 + dslFrameBuffer txCmdFrBuf0a;
5572 + dslFrameBuffer txCmdFrBuf1;
5573 + uchar txCmdBuf[kG992p3OvhMsgMaxCmdSize];
5574 + g992p3SegFrameCtlStruct txSegFrameCtl;
5586 + uchar rxCmdMsgNum;
5587 + uchar rxRspMsgNum;
5588 + uchar txCmdMsgNum;
5589 + uchar txRspMsgNum;
5591 + g992p3OvhMsgVarsStruct;
5593 +#endif /* G992p3OvhMsgFramerGlobals */
5594 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/G992p3OvhMsg.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/G992p3OvhMsg.h
5595 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/G992p3OvhMsg.h 1970-01-01 01:00:00.000000000 +0100
5596 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/G992p3OvhMsg.h 2006-06-26 09:07:10.000000000 +0200
5599 +<:copyright-broadcom
5601 + Copyright (c) 2002 Broadcom Corporation
5602 + All Rights Reserved
5603 + No portions of this material may be reproduced in any form without the
5604 + written permission of:
5605 + Broadcom Corporation
5606 + 16215 Alton Parkway
5607 + Irvine, California 92619
5608 + All information contained in this document is Broadcom Corporation
5609 + company private, proprietary, and trade secret.
5613 +/****************************************************************************
5618 + * This file contains the exported functions and definitions for G992p3
5619 + * overhead channel messages
5622 + * Copyright (c) 1999-2003 BroadCom, Inc. All rights reserved.
5623 + * Authors: Ilya Stomakhin
5625 + * $Revision: 1.1 $
5627 + * $Id: G992p3OvhMsg.h,v 1.1 2003/07/18 19:39:18 ilyas Exp $
5629 + * $Log: G992p3OvhMsg.h,v $
5630 + * Revision 1.1 2003/07/18 19:39:18 ilyas
5631 + * Initial G.992.3 overhead channel message implementation (from ADSL driver)
5634 + *****************************************************************************/
5636 +#ifndef G992p3OvhMsgFramerHeader
5637 +#define G992p3OvhMsgFramerHeader
5639 +#define kG992p3OvhMsgFrameBufCnt -1
5641 +extern Boolean G992p3OvhMsgInit(
5644 + dslFrameHandlerType rxReturnFramePtr,
5645 + dslFrameHandlerType txSendFramePtr,
5646 + dslCommandHandlerType commandHandler,
5647 + dslStatusHandlerType statusHandler);
5649 +extern void G992p3OvhMsgReset(void *gDslVars);
5650 +extern void G992p3OvhMsgClose(void *gDslVars);
5651 +extern void G992p3OvhMsgTimer(void *gDslVars, long timeQ24ms);
5652 +extern Boolean G992p3OvhMsgCommandHandler (void *gDslVars, dslCommandStruct *cmd);
5653 +extern void G992p3OvhMsgStatusSnooper (void *gDslVars, dslStatusStruct *status);
5655 +extern int G992p3OvhMsgSendCompleteFrame(void *gDslVars, void *pVc, ulong mid, dslFrame *pFrame);
5656 +extern int G992p3OvhMsgIndicateRcvFrame(void *gDslVars, void *pVc, ulong mid, dslFrame *pFrame);
5658 +extern void G992p3OvhMsgSetL3(void *gDslVars);
5659 +extern void G992p3OvhMsgSetL0(void *gDslVars);
5661 +#endif /* G992p3OvhMsgFramerHeader */
5662 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/G997.gh linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/G997.gh
5663 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/G997.gh 1970-01-01 01:00:00.000000000 +0100
5664 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/G997.gh 2006-06-26 09:07:10.000000000 +0200
5666 +/****************************************************************************
5671 + * This is a header file which defines the type for the G997 Framer
5672 + * global variable structure.
5675 + * Copyright (c) 1993-1998 AltoCom, Inc. All rights reserved.
5676 + * Authors: Ilya Stomakhin
5678 + * $Revision: 1.5 $
5680 + * $Id: G997.gh,v 1.5 2004/07/21 01:39:41 ilyas Exp $
5682 + * $Log: G997.gh,v $
5683 + * Revision 1.5 2004/07/21 01:39:41 ilyas
5684 + * Reset entire G.997 state on retrain. Timeout in G.997 if no ACK
5686 + * Revision 1.4 2004/04/27 00:27:16 ilyas
5687 + * Implemented double buffering to ensure G.997 HDLC frame is continuous
5689 + * Revision 1.3 2003/07/18 18:56:59 ilyas
5690 + * Added support for shared TX buffer (for ADSL driver)
5692 + * Revision 1.2 2002/01/11 06:48:27 ilyas
5693 + * Added command handler pointer
5695 + * Revision 1.1 2001/12/13 02:28:27 ilyas
5696 + * Added common framer (DslPacket and G997) and G997 module
5699 + *****************************************************************************/
5701 +#ifndef G997FramerGlobals
5702 +#define G997FramerGlobals
5704 +#include "DslFramer.h"
5705 +#include "HdlcFramer.h"
5707 +#define kG997MsgBufSize 64
5712 + dslFramerControl dslFramer;
5713 + hdlcByteControl hdlcByte;
5714 + dslCommandHandlerType commandHandler;
5722 + uchar txMsgBuf[kG997MsgBufSize];
5723 + ulong txMsgBufLen;
5724 + uchar *txMsgBufPtr;
5727 + ulong txMsgBufNum;
5731 +#endif /* G997FramerGlobals */
5732 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/G997.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/G997.h
5733 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/G997.h 1970-01-01 01:00:00.000000000 +0100
5734 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/G997.h 2006-06-26 09:07:10.000000000 +0200
5737 +<:copyright-broadcom
5739 + Copyright (c) 2002 Broadcom Corporation
5740 + All Rights Reserved
5741 + No portions of this material may be reproduced in any form without the
5742 + written permission of:
5743 + Broadcom Corporation
5744 + 16215 Alton Parkway
5745 + Irvine, California 92619
5746 + All information contained in this document is Broadcom Corporation
5747 + company private, proprietary, and trade secret.
5751 +/****************************************************************************
5756 + * This file contains the exported functions and definitions for G97Framer
5759 + * Copyright (c) 1993-1998 AltoCom, Inc. All rights reserved.
5760 + * Authors: Ilya Stomakhin
5762 + * $Revision: 1.3 $
5764 + * $Id: G997.h,v 1.3 2003/07/18 18:56:59 ilyas Exp $
5766 + * $Log: G997.h,v $
5767 + * Revision 1.3 2003/07/18 18:56:59 ilyas
5768 + * Added support for shared TX buffer (for ADSL driver)
5770 + * Revision 1.2 2002/07/20 00:51:41 ilyas
5771 + * Merged witchanges made for VxWorks/Linux driver.
5773 + * Revision 1.1 2001/12/13 02:28:27 ilyas
5774 + * Added common framer (DslPacket and G997) and G997 module
5778 + *****************************************************************************/
5780 +#ifndef G997FramerHeader
5781 +#define G997FramerHeader
5783 +extern Boolean G997Init(
5788 + ulong rxPacketNum,
5789 + upperLayerFunctions *pUpperLayerFunctions,
5790 + dslCommandHandlerType g997PhyCommandHandler);
5792 +extern void G997Close(void *gDslVars);
5793 +extern void G997Timer(void *gDslVars, long timeQ24ms);
5794 +extern Boolean G997CommandHandler (void *gDslVars, dslCommandStruct *cmd);
5795 +extern void G997StatusSnooper (void *gDslVars, dslStatusStruct *status);
5797 +extern int G997SendFrame(void *gDslVars, void *pVc, ulong mid, dslFrame *pFrame);
5798 +extern int G997ReturnFrame(void *gDslVars, void *pVc, ulong mid, dslFrame *pFrame);
5800 +extern Boolean G997SetTxBuffer(void *gDslVars, ulong len, void *bufPtr);
5801 +extern void * G997GetFramePoolHandler(void *gDslVars);
5803 +#endif /* G997FramerHeader */
5804 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/HdlcFramer.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/HdlcFramer.h
5805 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/HdlcFramer.h 1970-01-01 01:00:00.000000000 +0100
5806 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/HdlcFramer.h 2006-06-26 09:07:10.000000000 +0200
5809 +<:copyright-broadcom
5811 + Copyright (c) 2002 Broadcom Corporation
5812 + All Rights Reserved
5813 + No portions of this material may be reproduced in any form without the
5814 + written permission of:
5815 + Broadcom Corporation
5816 + 16215 Alton Parkway
5817 + Irvine, California 92619
5818 + All information contained in this document is Broadcom Corporation
5819 + company private, proprietary, and trade secret.
5823 +/****************************************************************************
5828 + * This file contains common HDLC definitions for bit/byte stuffing
5831 + * Copyright (c) 1993-1998 AltoCom, Inc. All rights reserved.
5832 + * Authors: Ilya Stomakhin
5834 + * $Revision: 1.3 $
5836 + * $Id: HdlcFramer.h,v 1.3 2004/07/21 01:39:41 ilyas Exp $
5838 + * $Log: HdlcFramer.h,v $
5839 + * Revision 1.3 2004/07/21 01:39:41 ilyas
5840 + * Reset entire G.997 state on retrain. Timeout in G.997 if no ACK
5842 + * Revision 1.2 2003/07/18 18:51:05 ilyas
5843 + * Added mode (default) to pass address and control field
5845 + * Revision 1.1 2001/12/13 02:28:27 ilyas
5846 + * Added common framer (DslPacket and G997) and G997 module
5850 + *****************************************************************************/
5852 +#ifndef HdlcFramerHeader
5853 +#define HdlcFramerHeader
5855 +/* setup bitmap definitions */
5857 +#define kHdlcSetupShift 16
5858 +#define kHdlcSetupMask ((long)0xFFFF << kHdlcSetupShift)
5860 +#define kHdlcCrcMask 0x00030000
5861 +#define kHdlcCrcNone 0x00000000
5862 +#define kHdlcCrc16 0x00010000
5863 +#define kHdlcCrc32 0x00020000
5865 +#define kHdlcTxIdleStop 0x00040000
5866 +#define kHdlcSpecialAddrCtrl 0x00080000
5868 +extern ushort HdlcCrc16Table[];
5870 +#define HDLC16_CRC_INIT 0xFFFF
5871 +#define HDLC16_CRC_FINAL(crc) ((crc) ^ 0xFFFF)
5872 +#define HDLC16_GOOD_CRC 0xF0B8
5873 +#define Hdlc16UpdateCrc(crc,b) ((crc) >> 8) ^ HdlcCrc16Table[((crc) ^ (b)) & 0xFF]
5875 +extern ulong HdlcCrc32Table[];
5877 +#define HDLC32_CRC_INIT 0xFFFFFFFF
5878 +#define HDLC32_CRC_FINAL(crc) ((crc) ^ 0xFFFFFFFF)
5879 +#define HDLC32_GOOD_CRC 0xDEBB20E3
5880 +#define Hdlc32UpdateCrc(crc,b) ((crc) >> 8) ^ HdlcCrc32Table[((crc) ^ (b)) & 0xFF]
5882 +extern ulong HdlcCrc32Table[];
5884 +/* HDLC common fields */
5886 +#define HDLC_ADDR 0xFF
5887 +#define HDLC_CTRL 0x3
5889 +#define HDLC_BYTE_FLAG 0x7E
5890 +#define HDLC_BYTE_ESC 0x7D
5892 +/* HDLC frame assembly states */
5894 +#define HDLC_STATE_START_FLAG 0
5895 +#define HDLC_STATE_ADDRESS (HDLC_STATE_START_FLAG + 1)
5896 +#define HDLC_STATE_CONTROL (HDLC_STATE_START_FLAG + 2)
5897 +#define HDLC_STATE_DATA (HDLC_STATE_START_FLAG + 3)
5898 +#define HDLC_STATE_FCS1 (HDLC_STATE_START_FLAG + 4)
5899 +#define HDLC_STATE_FCS2 (HDLC_STATE_START_FLAG + 5)
5900 +#define HDLC_STATE_END_FLAG (HDLC_STATE_START_FLAG + 6)
5903 +/* HDLC common types */
5905 +typedef struct _hdlcByteControl {
5907 + dslFramerDataGetPtrHandlerType rxDataGetPtrHandler;
5908 + dslFramerDataDoneHandlerType rxDataDoneHandler;
5909 + dslFramerDataGetPtrHandlerType txDataGetPtrHandler;
5910 + dslFramerDataDoneHandlerType txDataDoneHandler;
5912 + /* RX working data set */
5914 + uchar rxFrameState;
5917 + Boolean rxEscChar;
5920 + uchar *pRxDataEnd;
5923 + /* TX working data set */
5925 + uchar txFrameState;
5928 + int txCharPending;
5931 + uchar *pTxDataEnd;
5935 +typedef struct _hdlcBitControl {
5937 + dslFramerDataGetPtrHandlerType rxDataGetPtrHandler;
5938 + dslFramerDataDoneHandlerType rxDataDoneHandler;
5939 + dslFramerDataGetPtrHandlerType txDataGetPtrHandler;
5940 + dslFramerDataDoneHandlerType txDataDoneHandler;
5942 + /* RX working data set */
5944 + uchar rxFrameState;
5947 + int rxNibblePending;
5951 + Boolean rxEscChar; /* ???? */
5954 + uchar *pRxDataEnd;
5957 + /* TX working data set */
5959 + uchar txFrameState;
5964 + uchar txLast1Bits;
5965 + int txCharPending; /* ???? */
5968 + uchar *pTxDataEnd;
5972 +/* HDLC common functions */
5974 +#define HdlcFramerTxFrameInit(ctrl) do { \
5975 + ctrl->txFrameState = HDLC_STATE_START_FLAG; \
5976 + ctrl->txFrameLen = 0; \
5977 + ctrl->txCrc = HDLC16_CRC_INIT; \
5978 + ctrl->txCharPending= -1; \
5981 +#define HdlcFramerRxFrameInit(ctrl) do { \
5982 + ctrl->rxFrameState = HDLC_STATE_START_FLAG; \
5983 + ctrl->rxFrameLen = 0; \
5984 + ctrl->rxCrc = HDLC16_CRC_INIT; \
5985 + ctrl->rxEscChar = false; \
5988 +#define HdlcFramerTxGetData(ctrl) do { \
5989 + dslFramerBufDesc bufDesc; \
5991 + if ((ctrl->txDataGetPtrHandler) (gDslVars, &bufDesc)) { \
5992 + ctrl->pTxData = bufDesc.bufPtr; \
5993 + ctrl->pTxDataEnd = (uchar*)bufDesc.bufPtr + bufDesc.bufLen; \
5994 + ctrl->txDataLen = bufDesc.bufLen; \
5995 + if (bufDesc.bufFlags & kDslFramerStartNewFrame) \
5996 + HdlcFramerTxFrameInit(ctrl); \
5999 + HdlcFramerTxFrameInit(ctrl); \
6003 +#define HdlcFramerRxGetData(ctrl, frFlag) do { \
6004 + dslFramerBufDesc bufDesc; \
6006 + bufDesc.bufFlags = frFlag; \
6007 + if ((ctrl->rxDataGetPtrHandler) (gDslVars, &bufDesc)) { \
6008 + ctrl->pRxData = bufDesc.bufPtr; \
6009 + ctrl->pRxDataEnd = (uchar*)bufDesc.bufPtr + bufDesc.bufLen; \
6010 + ctrl->rxDataLen = bufDesc.bufLen; \
6014 +/* HDLC functions headers */
6016 +extern Boolean HdlcByteInit(
6018 + hdlcByteControl *hbyCtrl,
6020 + dslFramerDataGetPtrHandlerType rxDataGetPtrHandler,
6021 + dslFramerDataDoneHandlerType rxDataDoneHandler,
6022 + dslFramerDataGetPtrHandlerType txDataGetPtrHandler,
6023 + dslFramerDataDoneHandlerType txDataDoneHandler);
6025 +extern void HdlcByteReset(void *gDslVars, hdlcByteControl *hbyCtrl);
6026 +extern void HdlcByteRxFlush(void *gDslVars, hdlcByteControl *hbyCtrl);
6027 +extern int HdlcByteRx(void *gDslVars, hdlcByteControl *hbyCtrl, int nBytes, uchar *srcPtr) FAST_TEXT;
6028 +extern int HdlcByteTx(void *gDslVars, hdlcByteControl *hbyCtrl, int nBytes, uchar *dstPtr) FAST_TEXT;
6029 +extern Boolean HdlcByteTxIdle(void *gDslVars, hdlcByteControl *hbyCtrl);
6031 +extern Boolean HdlcBitInit(
6033 + hdlcBitControl *hbiCtrl,
6035 + dslFramerDataGetPtrHandlerType rxDataGetPtrHandler,
6036 + dslFramerDataDoneHandlerType rxDataDoneHandler,
6037 + dslFramerDataGetPtrHandlerType txDataGetPtrHandler,
6038 + dslFramerDataDoneHandlerType txDataDoneHandler);
6040 +extern void HdlcBitReset(void *gDslVars, hdlcByteControl *hbiCtrl);
6041 +extern int HdlcBitRx(void *gDslVars, hdlcBitControl *hbiCtrl, int nBytes, uchar *srcPtr) FAST_TEXT;
6042 +extern int HdlcBitTx(void *gDslVars, hdlcBitControl *hbiCtrl, int nBytes, uchar *dstPtr) FAST_TEXT;
6044 +#endif /* HdlcFramerHeader */
6045 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/MathUtil.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/MathUtil.h
6046 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/MathUtil.h 1970-01-01 01:00:00.000000000 +0100
6047 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/MathUtil.h 2006-06-26 09:07:10.000000000 +0200
6050 +<:copyright-broadcom
6052 + Copyright (c) 2002 Broadcom Corporation
6053 + All Rights Reserved
6054 + No portions of this material may be reproduced in any form without the
6055 + written permission of:
6056 + Broadcom Corporation
6057 + 16215 Alton Parkway
6058 + Irvine, California 92619
6059 + All information contained in this document is Broadcom Corporation
6060 + company private, proprietary, and trade secret.
6064 +/************************************************************************
6069 + * This file contains the exported interface for MathUtil.c module.
6072 + * Copyright (c) 1993-1997 AltoCom, Inc. All rights reserved.
6073 + * Authors: Mark Gonikberg, Haixiang Liang.
6075 + * $Revision: 1.6 $
6077 + * $Id: MathUtil.h,v 1.6 2004/04/13 00:21:13 ilyas Exp $
6079 + * $Log: MathUtil.h,v $
6080 + * Revision 1.6 2004/04/13 00:21:13 ilyas
6081 + * Added standard header for shared ADSL driver files
6083 + * Revision 1.5 2001/08/16 02:18:08 khp
6084 + * - mark functions with FAST_TEXT to reduce cycle counts for QPROC targets
6085 + * (replaces use of LMEM_INSN)
6087 + * Revision 1.4 1999/10/06 04:55:22 liang
6088 + * Added function to multiply two long values to save result as VeryLong.
6090 + * Revision 1.3 1999/08/05 19:42:52 liang
6091 + * Merged with the softmodem top of the tree on 08/04/99 for assembly files.
6093 + * Revision 1.2 1999/03/26 03:29:59 liang
6094 + * Export CosSin table.
6096 + * Revision 1.1 1998/10/28 01:28:07 liang
6097 + * *** empty log message ***
6099 + * Revision 1.12 1998/02/10 17:19:49 scott
6100 + * Changed MathVL routines to return arguments using pointers
6102 + * Revision 1.11 1997/12/13 06:12:07 mwg
6103 + * Added more Atan2 flavors
6105 + * Revision 1.10 1997/11/18 01:11:48 mwg
6106 + * Removed <CR> symbols which accidently slipped in.
6108 + * Revision 1.9 1997/11/03 19:07:52 scott
6109 + * No longer redefine max() and min() if already defined
6111 + * Revision 1.8 1997/07/30 01:35:20 liang
6112 + * Add more accurate atan2 function UtilLongLongAtan2.
6114 + * Revision 1.7 1997/07/21 20:23:19 mwg
6115 + * Added new function: UtilBlockCos()
6117 + * Revision 1.6 1997/03/21 23:50:10 liang
6118 + * Added initial version of V8bis module to CVS tree.
6120 + * Revision 1.5 1997/03/19 18:35:34 mwg
6121 + * Changed copyright notice.
6123 + * Revision 1.4 1997/01/21 00:36:15 mwg
6124 + * Added new function: UtilBlockCosSin()
6126 + * Revision 1.3 1996/06/18 21:14:45 mwg
6127 + * Modified VLDivVL by allowing to specify the result scaling.
6129 + * Revision 1.2 1996/06/12 02:31:59 mwg
6130 + * Added 64bit arithmetic functions.
6132 + * Revision 1.1.1.1 1996/02/14 02:35:15 mwg
6133 + * Redesigned the project directory structure. Merged V.34 into the project.
6135 + * Revision 1.4 1995/12/04 23:08:15 liang
6136 + * Add file Math/LinearToLog.c.
6138 + ************************************************************************/
6142 +/* Exported tables */
6143 +extern const short UtilCosTable[];
6145 +/* Exported functions */
6146 +extern ComplexShort UtilCosSin(ushort angle);
6147 +extern long UtilBlockCosSin (int nValues, long angle, long delta, ComplexShort *dstPtr);
6148 +extern long UtilBlockCos (int nValues, long angle, long delta, short *dstPtr);
6149 +extern ushort UtilShortShortAtan2(ComplexShort point);
6150 +extern ushort UtilLongShortAtan2(ComplexLong point);
6151 +extern ulong UtilShortLongAtan2(ComplexShort point) FAST_TEXT;
6152 +extern ulong UtilLongLongAtan2(ComplexLong point) FAST_TEXT;
6153 +extern ushort UtilSqrt(ulong y);
6154 +extern ushort UtilMaxMagnitude(int blkSize, ComplexShort *dataPtr);
6155 +extern short UtilQ0LinearToQ4dB (ulong x);
6156 +extern ulong UtilQ4dBToQ12Linear (short x);
6157 +extern void UtilAdjustComplexMagnitude(ComplexShort *srcPtr, short mag, short adjustment);
6159 +extern void VLMultLongByLong(long x, long y, VeryLong *dst);
6160 +extern void VLMultShort (VeryLong x, short y, VeryLong *dst);
6161 +extern void VLAddVL (VeryLong x, VeryLong y, VeryLong *dst);
6162 +extern void VLAddLong (VeryLong x, long y, VeryLong *dst);
6163 +extern void VLSubVL (VeryLong x, VeryLong y, VeryLong *dst);
6164 +extern void VLSubLong (VeryLong x, long y, VeryLong *dst);
6165 +extern void VLDivVL (VeryLong x, VeryLong y, int scale, long *dst);
6166 +extern void VLShiftLeft(VeryLong x, int shift, VeryLong *dst);
6167 +extern void VLShiftRight(VeryLong x, int shift, VeryLong *dst);
6170 +#define UtilAtan2 UtilShortShortAtan2
6171 +#define UtilLongAtan2 UtilLongShortAtan2
6173 +/* Standard Macros */
6175 +#define abs(x) ((x) >= 0 ? (x) : -(x))
6178 +#define max(x, y) ((x) >= (y) ? (x) : (y))
6181 +#define min(x, y) ((x) <= (y) ? (x) : (y))
6183 +#endif /* MathUtilPh */
6184 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/MipsAsm.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/MipsAsm.h
6185 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/MipsAsm.h 1970-01-01 01:00:00.000000000 +0100
6186 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/MipsAsm.h 2006-06-26 09:07:10.000000000 +0200
6189 +<:copyright-broadcom
6191 + Copyright (c) 2002 Broadcom Corporation
6192 + All Rights Reserved
6193 + No portions of this material may be reproduced in any form without the
6194 + written permission of:
6195 + Broadcom Corporation
6196 + 16215 Alton Parkway
6197 + Irvine, California 92619
6198 + All information contained in this document is Broadcom Corporation
6199 + company private, proprietary, and trade secret.
6203 +/************************************************************************
6208 + * This file contains definitions specific to MIPS assembly
6211 + * Copyright (c) 1993-1997 AltoCom, Inc. All rights reserved.
6212 + * Authors: Mark Gonikberg, Haixiang Liang.
6214 + * $Revision: 1.5 $
6216 + * $Id: MipsAsm.h,v 1.5 2004/04/13 00:16:59 ilyas Exp $
6218 + * $Log: MipsAsm.h,v $
6219 + * Revision 1.5 2004/04/13 00:16:59 ilyas
6220 + * Merged the latest ADSL driver changes
6222 + * Revision 1.4 2002/09/12 04:08:50 ilyas
6223 + * Added macros for BCM MIPS specific instructions
6225 + * Revision 1.3 2000/11/18 21:28:19 mprahlad
6227 + * define MSUB(src1,src2) msub src1, src2
6228 + * change Mult(dst, src1, src2) to use "mul" instead of "mult; mflo"
6229 + * define Mul(src1, src2) mult src1, src2
6231 + * Revision 1.2 2000/07/28 21:05:05 mprahlad
6232 + * Macros specific to bcm47xx added.
6234 + * Revision 1.1 1999/08/05 19:52:57 liang
6235 + * Copied from the softmodem top of the tree on 08/04/99.
6237 + * Revision 1.5 1999/04/02 23:16:21 mwg
6238 + * Fixed a minor comatibility issue with mult
6240 + * Revision 1.4 1999/02/03 20:25:43 mwg
6241 + * Added an option for R4010
6243 + * Revision 1.3 1998/10/30 02:21:34 mwg
6244 + * Added targets for 4640
6246 + * Revision 1.2 1998/10/16 18:52:09 ilyas
6247 + * Added ASM_PROLOG[5-7] macros to save on stores
6249 + * Revision 1.1 1998/06/03 23:28:39 mwg
6250 + * Renamed from DinoDefs.h
6252 + * Revision 1.6 1998/02/09 18:23:11 scott
6253 + * Added EMBEDDED_CALLING_CONVENTION (GreenHill) and R3900/R4102
6255 + * Revision 1.5 1997/03/19 18:35:02 mwg
6256 + * Changed copyright notice.
6258 + * Revision 1.4 1996/10/02 20:28:41 liang
6259 + * Remove parameter "acc" from the non-DINO version of MAD.
6261 + * Revision 1.3 1996/10/02 19:44:36 liang
6262 + * Separated MultAdd into MAD and MADW, added NO_DINO_WRITEBACK option.
6264 + * Revision 1.2 1996/08/14 03:06:07 liang
6265 + * Modified macro MultAdd so that the assembly code build works.
6267 + * Revision 1.1.1.1 1996/02/14 02:35:13 mwg
6268 + * Redesigned the project directory structure. Merged V.34 into the project.
6270 + * Revision 1.5 1994/11/04 22:41:29 mwg
6271 + * Added #ifdefs for different targets.
6273 + ************************************************************************/
6275 +#ifndef _MIPS_ASM_H_
6276 +#define _MIPS_ASM_H_
6311 +#ifdef EMBEDDED_CALLING_CONVENTION
6313 +/* Support for GreenHills embedded calling convention */
6315 +#define ASM_PROLOG subu sp, 32; \
6321 +#define ASM_PROLOG5 subu sp, 32; \
6324 +#define ASM_PROLOG6 subu sp, 32; \
6328 +#define ASM_PROLOG7 subu sp, 32; \
6333 +#define ASM_EPILOG addu sp, 32
6337 +#define ASM_PROLOG5
6338 +#define ASM_PROLOG6
6339 +#define ASM_PROLOG7
6343 +#ifdef DINO /* Special DSP extensions to MIPS core */
6345 +#ifndef NO_DINO_WRITEBACK /* DSP extensions with writeback register */
6347 +#define MAD(src1, src2) .set noreorder ; mad $0, src1, src2 ; .set reorder
6348 +#define MADW(acc, src1, src2) .set noreorder ; mad acc, src1, src2 ; .set reorder
6349 +#define Mult(dst, src1, src2) .set noreorder ; mult dst, src1, src2 ; .set reorder
6350 +#define MultU(dst, src1, src2) .set noreorder ; multu dst, src1, src2 ; .set reorder
6352 +#else /* NO_DINO_WRITEBACK */
6354 +#define MAD(src1, src2) .set noreorder ; mad $0, src1, src2 ; .set reorder
6355 +#define MADW(acc, src1, src2) .set noreorder ; mad $0, src1, src2 ; mflo acc ; .set reorder
6356 +#define Mult(dst, src1, src2) multu src1, src2 ; mflo dst
6357 +#define MultU(dst, src1, src2) multu src1, src2 ; mflo dst
6359 +#endif /* NO_DINO_WRITEBACK */
6365 +#define MAD(src1, src2) madd $0, src1, src2
6366 +#define MADW(acc, src1, src2) madd acc, src1, src2
6367 +#define Mult(dst, src1, src2) mult dst, src1, src2
6368 +#define MultU(dst, src1, src2) multu dst, src1, src2
6370 +#elif defined(bcm47xx_INSTR_MACROS) && defined(bcm47xx)
6372 +#define mips_froo(s1,s2,s3) s1##s2##s3
6373 +#define MSUB(s1,s2) .set noreorder ; mips_froo(msub_,s1,s2) ; .set reorder
6374 +#define MAD(s1,s2) .set noreorder ; mips_froo(mad_,s1,s2) ; .set reorder
6375 +#define MADW(acc, s1,s2) .set noreorder ; mips_froo(mad_,s1,s2) ; mflo acc ; .set reorder
6377 +#include "BCM4710.h"
6379 +#define Mult(dst, src1, src2) mul dst, src1, src2
6380 +#define Mul( src1, src2) mult src1, src2 ;
6381 +#define MultU(dst, src1, src2) multu src1, src2 ; mflo dst
6383 +#elif defined(bcm47xx)
6384 +#define MSUB(src1, src2) msub src1, src2
6385 +#define MAD(src1, src2) madd src1, src2
6386 +#define MADW(acc, src1, src2) .set noreorder ; madd src1, src2; mflo acc ; .set reorder
6388 +#define Mult(dst, src1, src2) mult src1, src2 ; mflo dst
6390 +#define Mult(dst, src1, src2) mul dst , src1, src2 ;
6391 +#define Mul( src1, src2) mult src1, src2 ;
6392 +#define MultU(dst, src1, src2) multu src1, src2 ; mflo dst
6397 +#define MAD(src1, src2) madd16 src1, src2
6398 +#define MADW(acc, src1, src2) madd16 src1, src2 ; mflo acc
6403 +#define MAD(src1, src2) madd $0, src1, src2
6404 +#define MADW(acc, src1, src2) madd src1, src2; mflo acc
6410 +#define MAD(src1, src2) madd src1, src2
6411 +#define MADW(acc, src1, src2) madd src1, src2; mflo acc
6414 +#define MAD(src1, src2) .set noat ;\
6417 + multu src1, src2 ;\
6419 + addu $at, $2, $at ;\
6424 +#define MADW(acc, src1, src2) .set noat ;\
6427 + multu src1, src2 ;\
6429 + addu $at, $2, $at ;\
6438 +#define Mult(dst, src1, src2) mul dst, src1, src2
6439 +#define MultU(dst, src1, src2) multu src1, src2 ; mflo dst
6451 +#endif /* _MIPS_ASM_H_ */
6452 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/MiscUtil.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/MiscUtil.h
6453 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/MiscUtil.h 1970-01-01 01:00:00.000000000 +0100
6454 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/MiscUtil.h 2006-06-26 09:07:10.000000000 +0200
6457 +<:copyright-broadcom
6459 + Copyright (c) 2002 Broadcom Corporation
6460 + All Rights Reserved
6461 + No portions of this material may be reproduced in any form without the
6462 + written permission of:
6463 + Broadcom Corporation
6464 + 16215 Alton Parkway
6465 + Irvine, California 92619
6466 + All information contained in this document is Broadcom Corporation
6467 + company private, proprietary, and trade secret.
6471 +/****************************************************************************
6473 + * MiscUtil.h -- Miscellaneous utilities
6478 + * Copyright (c) 1993-1997 AltoCom, Inc. All rights reserved.
6479 + * Authors: Mark Gonikberg Haixiang Liang
6481 + * $Revision: 1.4 $
6483 + * $Id: MiscUtil.h,v 1.4 2004/04/13 00:21:46 ilyas Exp $
6485 + * $Log: MiscUtil.h,v $
6486 + * Revision 1.4 2004/04/13 00:21:46 ilyas
6487 + * Added standard header for shared ADSL driver files
6489 + * Revision 1.3 2001/07/21 01:21:06 ilyas
6490 + * Added more functions for int to string conversion used by log file
6492 + * Revision 1.2 1999/08/05 19:42:56 liang
6493 + * Merged with the softmodem top of the tree on 08/04/99 for assembly files.
6495 + * Revision 1.1 1999/01/27 22:10:12 liang
6496 + * Initial version.
6498 + * Revision 1.1 1997/07/10 01:18:45 mwg
6499 + * Initial revision.
6503 + *****************************************************************************/
6504 +#ifndef _MISC_UTIL_H_
6505 +#define _MISC_UTIL_H_
6507 +extern long SM_DECL GetRateValue(dataRateMap rate);
6508 +extern int SM_DECL DecToString(ulong value, uchar *dstPtr, uint nDigits);
6509 +extern int SM_DECL HexToString(ulong value, uchar *dstPtr, uint nDigits);
6510 +extern char * SM_DECL DecToStr(char *s, ulong num);
6511 +extern char * SM_DECL SignedToStr(char *s, long num);
6512 +extern char * SM_DECL HexToStr(char *s, ulong num);
6514 +#define EvenParityBit(x) ((z = (y = x ^ (x >> 4)) ^ (y >> 2)) ^ (z >> 1))
6515 +#define OddParityBit(x) (EvenParityBit(x) ^ 1)
6517 +extern void ParityApply(int nBytes, int nDataBits, int parity, uchar *srcPtr, uchar *dstPtr);
6518 +extern void ParityStrip(int nBytes, int nDataBits, int parity, uchar *srcPtr, uchar *dstPtr, statusHandlerType statusHandler);
6521 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/Que.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/Que.h
6522 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/Que.h 1970-01-01 01:00:00.000000000 +0100
6523 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/Que.h 2006-06-26 09:07:10.000000000 +0200
6526 +<:copyright-broadcom
6528 + Copyright (c) 2002 Broadcom Corporation
6529 + All Rights Reserved
6530 + No portions of this material may be reproduced in any form without the
6531 + written permission of:
6532 + Broadcom Corporation
6533 + 16215 Alton Parkway
6534 + Irvine, California 92619
6535 + All information contained in this document is Broadcom Corporation
6536 + company private, proprietary, and trade secret.
6540 +/****************************************************************************
6545 + * Definition and implementation (via macros and inline functions)
6546 + * of a simple queue
6548 + * Copyright (c) 1993-1998 AltoCom, Inc. All rights reserved.
6549 + * Authors: Ilya Stomakhin
6551 + *****************************************************************************/
6553 +#ifndef QueHeader_H_
6554 +#define QueHeader_H_
6556 +typedef void * _QueItem;
6558 +typedef struct _QueHeader
6560 + _QueItem *head; /* first item in the queue */
6561 + _QueItem *tail; /* last item in the queue */
6564 +/* Queue management macros */
6566 +#define QueInit(pqHdr) (((QueHeader *)(pqHdr))->head = ((QueHeader *)(pqHdr))->tail = NULL)
6567 +#define QueEmpty(pqHdr) (NULL == ((QueHeader *)(pqHdr))->head)
6569 +#define QueFirst(pqHdr) ((QueHeader *)(pqHdr))->head
6570 +#define QueLast(pqHdr) ((QueHeader *)(pqHdr))->tail
6571 +#define QueNext(pqItem) (*((void **)(pqItem)))
6574 +#define QueRemoveFirst(pqHdr) do { \
6575 + if (!QueEmpty(pqHdr)) { \
6576 + ((QueHeader *)(pqHdr))->head = *((QueHeader *)(pqHdr))->head; \
6577 + if (QueEmpty(pqHdr)) \
6578 + ((QueHeader *)(pqHdr))->tail = NULL; \
6581 +#define QueRemove(pqHdr) QueRemoveFirst(pqHdr)
6584 +#define QueAddLast(pqHdr,pqItem) do { \
6585 + QueNext(pqItem) = NULL; \
6586 + if (NULL != ((QueHeader *)(pqHdr))->tail) \
6587 + *((QueHeader *)(pqHdr))->tail = (pqItem); \
6589 + ((QueHeader *)(pqHdr))->head = (_QueItem *)(pqItem); \
6590 + ((QueHeader *)(pqHdr))->tail = (_QueItem *)(pqItem); \
6592 +#define QueAdd(pqHdr,pItem) QueAddLast(pqHdr,pItem)
6594 +#define QueAddFirst(pqHdr,pqItem) do { \
6595 + if (NULL == ((QueHeader *)(pqHdr))->tail) \
6596 + ((QueHeader *)(pqHdr))->tail = (_QueItem *)(pqItem); \
6597 + QueNext(pqItem) = ((QueHeader *)(pqHdr))->head; \
6598 + ((QueHeader *)(pqHdr))->head = (_QueItem *)(pqItem); \
6602 +#define QueGet(pqHdr) \
6603 + (void *) QueFirst(pqHdr); \
6606 +#define QueMerge(pqHdr1,pqHdr2) do { \
6607 + if (NULL == ((QueHeader *)(pqHdr1))->tail) \
6608 + ((QueHeader *)(pqHdr1))->head = ((QueHeader *)(pqHdr2))->head; \
6610 + QueNext(((QueHeader *)(pqHdr1))->tail) = ((QueHeader *)(pqHdr2))->head; \
6611 + if (NULL != ((QueHeader *)(pqHdr2))->tail) \
6612 + ((QueHeader *)(pqHdr1))->tail = ((QueHeader *)(pqHdr2))->tail; \
6615 +#define QueCopy(pqHdr1,pqHdr2) do { \
6616 + ((QueHeader *)(pqHdr1))->head = ((QueHeader *)(pqHdr2))->head; \
6617 + ((QueHeader *)(pqHdr1))->tail = ((QueHeader *)(pqHdr2))->tail; \
6620 +#define QueForEach(pqHdr,f,ref) do { \
6621 + _QueItem *p = ((QueHeader *)(pqHdr))->head; \
6623 + while (NULL != p) { \
6624 + if ( (f)((void *)p, ref) ) break; \
6629 +#endif /* QueHeader_H_ */
6631 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/SoftAtmVc.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/SoftAtmVc.h
6632 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/SoftAtmVc.h 1970-01-01 01:00:00.000000000 +0100
6633 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/SoftAtmVc.h 2006-06-26 09:07:10.000000000 +0200
6636 +<:copyright-broadcom
6638 + Copyright (c) 2002 Broadcom Corporation
6639 + All Rights Reserved
6640 + No portions of this material may be reproduced in any form without the
6641 + written permission of:
6642 + Broadcom Corporation
6643 + 16215 Alton Parkway
6644 + Irvine, California 92619
6645 + All information contained in this document is Broadcom Corporation
6646 + company private, proprietary, and trade secret.
6650 +/****************************************************************************
6655 + * This file contains ATM VC definitions
6658 + * Copyright (c) 1993-1998 AltoCom, Inc. All rights reserved.
6659 + * Authors: Ilya Stomakhin
6661 + * $Revision: 1.27 $
6663 + * $Id: SoftAtmVc.h,v 1.27 2004/06/02 22:26:17 ilyas Exp $
6665 + * $Log: SoftAtmVc.h,v $
6666 + * Revision 1.27 2004/06/02 22:26:17 ilyas
6667 + * Added ATM counters for G.992.3
6669 + * Revision 1.26 2004/03/10 22:57:20 ilyas
6670 + * Added I.432 scramling control
6672 + * Revision 1.25 2003/09/23 00:21:59 ilyas
6673 + * Added status to indicate ATM header compression
6675 + * Revision 1.24 2003/08/27 02:00:50 ilyas
6676 + * Original implementation of ATM header compression
6678 + * Revision 1.23 2003/02/25 04:13:15 ilyas
6679 + * Added standard Broadcom header
6681 + * Revision 1.22 2003/01/10 23:25:48 ilyas
6682 + * Added ATM status definition
6684 + * Revision 1.21 2002/09/12 21:07:19 ilyas
6685 + * Added HEC, OCD and LCD counters
6687 + * Revision 1.20 2002/04/02 09:58:00 ilyas
6688 + * Initial implementatoin of BERT
6690 + * Revision 1.19 2001/10/09 22:35:14 ilyas
6691 + * Added more ATM statistics and OAM support
6693 + * Revision 1.18 2001/06/18 19:49:36 ilyas
6694 + * Changes to include support for HOST_ONLY mode
6696 + * Revision 1.17 2001/02/23 05:49:57 ilyas
6697 + * Added routed 1483 encapsulation
6699 + * Revision 1.16 2001/02/09 04:18:18 ilyas
6700 + * Added framer for bridged ethernet PDUs
6702 + * Revision 1.15 2001/02/09 01:55:27 ilyas
6703 + * Added status codes and macros to support printing of AAL packets
6705 + * Revision 1.14 2000/09/21 17:28:35 ilyas
6706 + * Added VBR support to traffic management code, separated UBR to a different
6707 + * Tx list, changed some of the algorithms
6709 + * Revision 1.13 2000/08/23 18:42:13 ilyas
6710 + * Added AAL2, added VcConfigure functions, moved commonly used look-up
6711 + * tables for CRC calculation to AtmLayer
6713 + * Revision 1.12 2000/08/02 03:06:22 ilyas
6714 + * Added support for reserving space in RX packets for ATm protocols
6716 + * Revision 1.11 2000/07/28 17:23:39 ilyas
6717 + * Added ATM connect/disconnect statuses
6719 + * Revision 1.10 2000/07/25 02:16:12 ilyas
6720 + * Added EClip (with Eth to ATM ARP translation) implementation
6722 + * Revision 1.9 2000/07/23 20:57:14 ilyas
6723 + * Added ATM framer and protocol layers
6725 + * Revision 1.8 2000/07/17 21:08:16 lkaplan
6726 + * removed global pointer
6728 + * Revision 1.7 2000/06/09 18:33:04 liang
6729 + * Fixed Irix compiler warnings.
6731 + * Revision 1.6 2000/05/18 21:47:31 ilyas
6732 + * Added detection of preassigned cells such as OAM F4, F5
6734 + * Revision 1.5 2000/05/14 01:50:11 ilyas
6735 + * Added more statuses to ATM code
6737 + * Revision 1.4 2000/05/10 02:41:28 liang
6738 + * Added status report for no cell memory
6740 + * Revision 1.3 2000/05/09 23:00:27 ilyas
6741 + * Added ATM status messages, ATM timer, Tx frames flush on timeout
6742 + * Fixed a bug - adding flushed Tx frames to the list of free Rx frames
6744 + * Revision 1.2 2000/05/03 03:53:00 ilyas
6745 + * Added support for pVc to vcID translation needed for LOG file and other
6746 + * definitions for ATM data in LOG file
6748 + * Revision 1.1 2000/04/19 00:21:35 ilyas
6749 + * Fixed some problems and added Out Of Band (OOB) support to ATM packets
6752 + *****************************************************************************/
6754 +#ifndef SoftAtmVcHeader
6755 +#define SoftAtmVcHeader
6763 +#define AtmLinkFlags(bMap,name) (((bMap) >> name##Shift) & name##Mask)
6765 +/* ATM service category types */
6767 +#define kAtmSrvcCBR 1 /* Constant Bit Rate */
6768 +#define kAtmSrvcVBR 2 /* Variable Bit Rate */
6769 +#define kAtmSrvcUBR 4 /* Unspecified Bit Rate */
6770 +#define kAtmSrvcABR 8 /* Available Bit Rate */
6771 +#define kAtmSrvcUnknown 0xFF
6773 +/* ATM AAL types (as encoded at UNI) */
6775 +#define kAtmAalIE 0x58
6780 +#define kAtmAal34 3
6782 +#define kAtmAalUser 16
6783 +#define kAtmAalUnknown 0xFF
6785 +/* ATM AAL1 parameters */
6787 +#define kAal1SubTypeId 0x85
6789 +#define kAal1TransportShift 0
6790 +#define kAal1TransportMask 0x7
6792 +#define kAal1NullTransport 0
6793 +#define kAal1VoiceTransport 1
6794 +#define kAal1CircuitTransport 2
6795 +#define kAal1AudioTransport 4
6796 +#define kAal1VideoTransport 5
6799 +#define kAal1CBRId 0x86
6801 +#define kAal1CBRShift 24
6802 +#define kAal1CBRMask 0xFF
6804 +#define kAal1CBR64 1
6805 +#define kAal1CBR1544 4 /* DS1 */
6806 +#define kAal1CBR6312 5 /* DS2 */
6807 +#define kAal1CBR32064 6
6808 +#define kAal1CBR44736 7 /* DS3 */
6809 +#define kAal1CBR97728 8
6810 +#define kAal1CBR2048 0x10 /* E1 */
6811 +#define kAal1CBR8448 0x11 /* E2 */
6812 +#define kAal1CBR34368 0x12 /* E3 */
6813 +#define kAal1CBR139264 0x13
6814 +#define kAal1CBR64xN 0x40
6815 +#define kAal1CBR8xN 0x41
6818 +#define kAal1MultiplierId 0x87
6820 +#define kAal1ClockRecoveryId 0x88
6822 +#define kAal1ClockRecoveryShift 3
6823 +#define kAal1ClockRecoveryMask 0x3
6825 +#define kAal1ClockRecoveryNull 1 /* synchronous transport */
6826 +#define kAal1ClockRecoverySRTS 1 /* asynchronous transport */
6827 +#define kAal1ClockRecoveryAdaptive 2
6830 +#define kAal1ECMId 0x89 /* Error correction method */
6832 +#define kAal1ECMShift (kAal1ClockRecoveryShift + 2)
6833 +#define kAal1ECMMask 0x3
6835 +#define kAal1ECMNull 0
6836 +#define kAal1ECMLossSensitive 1
6837 +#define kAal1ECMDelaySensitive 2
6840 +#define kAal1SDTBlockSizeId 0x8A
6842 +#define kAal1CellFillId 0x8B
6844 +/* ATM AAL34 and AAL5 parameters */
6846 +#define kAalFwdMaxSDUSizeId 0x8C
6847 +#define kAalBacMaxkSDUSizeId 0x81
6849 +#define kAal34MidRangeId 0x82
6851 +#define kAalSSCSTypeId 0x84
6853 +#define kAalSSCSAssured 1
6854 +#define kAalSSCSNonAssured 2
6855 +#define kAalSSCSFrameRelay 4
6857 +/* ATM AAL2 parameters */
6859 +#define kAal2SSNone 0
6860 +#define kAal2SSSAR 1
6861 +#define kAal2SSTED 2
6862 +#define kAal2SSSARMask 3
6863 +#define kAal2SSType1 4
6864 +#define kAal2SSType3 5
6876 + ushort fwdMaxCpSize; /* Max "common part" packet size */
6877 + ushort backMaxCpSize;
6880 + ushort fwdMaxSsSize; /* Max "service specific" packet size */
6881 + ushort backMaxSsSize;
6885 + ushort fwdMaxSDUSize;
6886 + ushort backMaxSDUSize;
6892 + ushort fwdMaxSDUSize;
6893 + ushort backMaxSDUSize;
6899 +/* ATM Traffic Descriptor types (as encoded at UNI) */
6901 +#define kAtmTrafficIE 0x59
6903 +#define kTrafficFwdPeakCellRateId0 0x82
6904 +#define kTrafficBackPeakCellRateId0 0x83
6905 +#define kTrafficFwdPeakCellRateId 0x84
6906 +#define kTrafficBackPeakCellRateId 0x85
6908 +#define kTrafficFwdSustainCellRateId0 0x88
6909 +#define kTrafficBackSustainCellRateId0 0x89
6910 +#define kTrafficFwdSustainCellRateId 0x90
6911 +#define kTrafficBackSustainCellRateId 0x91
6913 +#define kTrafficFwdMaxBurstSizeId0 0xA0
6914 +#define kTrafficBackMaxBurstSizeId0 0xA1
6915 +#define kTrafficFwdMaxBurstSizeId 0xB0
6916 +#define kTrafficBackMaxBurstSizeId 0xB1
6918 +#define kTrafficBestEffortId 0xBE
6919 +#define kTrafficMgrOptionsId 0xBF
6921 +#define kTrafficMaxTolerance 0x7FFFFFFF
6923 +/* trafficFlags coding */
6925 +#define kTrafficTagFwd 1
6926 +#define kTrafficTagBack 2
6927 +#define kTrafficBestEffort 4
6930 + ulong tPCR0; /* CLP = 0, time between cells in us */
6931 + ulong tPCR; /* CLP = 0+1 */
6932 + ulong tolPCR; /* tolerance for PCR in us */
6934 + ulong tSCR0; /* CLP = 0 */
6935 + ulong tSCR; /* CLP = 0+1 */
6936 + ulong tolSCR; /* tolerance for SCR in us */
6938 + uchar atmServiceType; /* CBR, VBR, UBR, etc. */
6939 + uchar trafficFlags;
6940 +} atmTrafficParams;
6942 +/* ATM Broadband Bearer Capabilty (BBC) types (as encoded at UNI) */
6944 +#define kAtmBBCIE 0x5E
6946 +#define kBBCClassShift 0
6947 +#define kBBCClassMask 0x1F
6949 +#define kBBCClassA 0x1
6950 +#define kBBCClassC 0x3
6951 +#define kBBCClassX 0x10
6954 +#define kBBCTrafficShift (kBBCClassShift + 5)
6955 +#define kBBCTrafficMask 0x7
6957 +#define kBBCTrafficNull 0
6958 +#define kBBCTrafficCBR 1
6959 +#define kBBCTrafficVBR 2
6962 +#define kBBCTimingShift (kBBCTrafficShift + 3)
6963 +#define kBBCTimingMask 0x3
6965 +#define kBBCTimingNull 0
6966 +#define kBBCTimingRequired 1
6967 +#define kBBCTimingNotRequired 2
6970 +#define kBBCClippingShift (kBBCTimingShift + 2)
6971 +#define kBBCClippingMask 0x3
6973 +#define kBBCNoClipping 0
6974 +#define kBBCClippingOk 1
6976 +#define kBBCConnectionShift (kBBCClippingShift + 2)
6977 +#define kBBCConnectionMask 0x3
6979 +#define kBBCPoint2Point 0
6980 +#define kBBCPoint2MPoint 1
6982 +/* ATM Broadband High/Low Layer Information (BHLI/BLLI) types (as encoded at UNI) */
6984 +#define kAtmBHLIIE 0x5D
6985 +#define kAtmBLLIIE 0x5F
6987 +/* ATM QoS types (as encoded at UNI) */
6989 +#define kAtmQoSIE 0x5C
6992 +#define kQoSClass1 1
6993 +#define kQoSClass2 2
6994 +#define kQoSClass3 3
6995 +#define kQoSClass4 4
6996 +#define kQoSReserved 0xFF
6999 + uchar fwdQoSClass;
7000 + uchar backQoSClass;
7003 +/* ATM MID definitions (ConfigureHandler) */
7005 +#define kAtmMidEntireVc ((ulong) -1)
7008 + void *pUserVc; /* VC id from the caller: has to be 1st !!! */
7010 + uchar defaultCLP; /* default CLP for tx packets on this VC */
7013 + uchar protoRxBytesReserved; /* # bytes reserved by protocol in the beginning of Rx packet */
7014 + uchar protoTxBytesReserved; /* # bytes reserved by protocol in the beginning of Tx packet */
7016 + atmAalParams aalParams;
7017 + atmTrafficParams rxTrafficParams;
7018 + atmTrafficParams txTrafficParams;
7020 + atmQoSParams qosParams;
7025 +** ATM Out of Band (OOB) packet information
7030 + Boolean clp; /* Cell Loss Prioroty */
7034 + uchar payloadType;
7037 + uchar payloadType;
7041 + uchar uui; /* Uses to user indicator */
7042 + uchar cpi; /* common part indicator */
7045 +} atmOobPacketInfo;
7049 +** ATM setup bit definition
7053 +#define kAtmCorrectHecErrors 1
7054 +#define kCorrectHecErrors kAtmCorrectHecErrors
7055 +#define kAtmPhyHeaderCompression 2
7056 +#define kAtmPhyNoDataScrambling 4
7058 +#define kAtmTxIdleTimeoutMask 0x6
7059 +#define kAtmTxIdleNoTimeout 0
7060 +#define kAtmTxIdleTimeout10s 2
7061 +#define kAtmTxIdleTimeout30s 4
7062 +#define kAtmTxIdleTimeout60s 6
7066 +** ATM framer modes and protocol definitions
7070 +#define kAtmFramerNone 0
7071 +#define kAtmFramerISO 1
7072 +#define kAtmFramerIP 2
7073 +#define kAtmFramerEth 3
7074 +#define kAtmFramerEthWithCRC 4
7076 +#define kAtmProtoNone 0
7077 +#define kAtmProtoEClip 1
7078 +#define kAtmProtoERouted1483 2
7079 +#define kAtmProtoPPP 3
7084 +** ATM status codes
7088 +typedef void (*atmStatusHandler) (void *gDslVars, ulong statusCode, ...);
7090 +/* physical layer I.432 */
7092 +#define kAtmStatRxHunt 1
7093 +#define kAtmStatRxPreSync 2
7094 +#define kAtmStatRxSync 3
7095 +#define kAtmStatRxPlOamCell 4
7096 +#define kAtmStatBertResult 5
7097 +#define kAtmStatHec 6
7098 +#define kAtmStatHdrCompr 7
7099 +#define kAtmStatCounters 8
7103 +#define kAtmLayerStatFirst 100
7104 +#define kAtmStatRxDiscarded 100
7105 +#define kAtmStatTxDelayed 101
7107 +#define kAtmStatVcCreated 102
7108 +#define kAtmStatVcStarted 103
7109 +#define kAtmStatVcStopped 104
7110 +#define kAtmStatVcDeleted 105
7112 +#define kAtmStatTimeout 106
7113 +#define kAtmStatNoCellMemory 107
7114 +#define kAtmStatPrintCell 108
7115 +#define kAtmStatInvalidCell 109
7116 +#define kAtmStatUnassignedCell 110
7117 +#define kAtmStatOamF4SegmentCell 111
7118 +#define kAtmStatOamF4End2EndCell 112
7119 +#define kAtmStatOamI371Cell 113
7120 +#define kAtmStatOamF5SegmentCell 114
7121 +#define kAtmStatOamF5End2EndCell 115
7122 +#define kAtmStatReservedCell 116
7124 +#define kAtmStatConnected 117
7125 +#define kAtmStatDisconnected 118
7127 +#define kAtmStatRxPacket 119
7128 +#define kAtmStatTxPacket 120
7130 +#define kAtmStatOamLoopback 121
7133 +typedef struct _atmPhyCounters {
7135 + ushort bertStatus;
7136 + ulong bertCellTotal;
7137 + ulong bertCellCnt;
7138 + ulong bertBitErrors;
7141 + ulong rxCellTotal;
7152 +** ATM log file definitions
7156 +/* ATM log file flags */
7158 +#define kAtmLogFrameFlagMask 3 /* mask */
7160 +#define kAtmLogFrameFlagNone 0 /* nothing */
7161 +#define kAtmLogFrameFlagNoData 1 /* no data only frame size */
7162 +#define kAtmLogFrameFlagBinData 2 /* data in binary form */
7163 +#define kAtmLogFrameFlagTextData 3 /* data in text form */
7165 +#define kAtmLogSendFrameShift 0
7166 +#define kAtmLogSendFrameNoData (kAtmLogFrameFlagNoData << kAtmLogSendFrameShift)
7167 +#define kAtmLogSendFrameBinData (kAtmLogFrameFlagBinData << kAtmLogSendFrameShift)
7168 +#define kAtmLogSendFrameTextData (kAtmLogFrameFlagTextData << kAtmLogSendFrameShift)
7170 +#define kAtmLogRcvFrameShift 2
7171 +#define kAtmLogRcvFrameNone (kAtmLogFrameFlagNone << kAtmLogRcvFrameShift)
7172 +#define kAtmLogRcvFrameNoData (kAtmLogFrameFlagNoData << kAtmLogRcvFrameShift)
7173 +#define kAtmLogRcvFrameBinData (kAtmLogFrameFlagBinData << kAtmLogRcvFrameShift)
7174 +#define kAtmLogRcvFrameTextData (kAtmLogFrameFlagTextData << kAtmLogRcvFrameShift)
7176 +#define kAtmLogSendCompleteFrameShift 4
7177 +#define kAtmLogSendCompleteFrameNone (kAtmLogFrameFlagNone << kAtmLogSendCompleteFrameShift)
7178 +#define kAtmLogSendCompleteFrameNoData (kAtmLogFrameFlagNoData << kAtmLogSendCompleteFrameShift)
7180 +#define kAtmLogReturnFrameShift 6
7181 +#define kAtmLogReturnFrameNoData (kAtmLogFrameFlagNoData << kAtmLogReturnFrameShift)
7183 +#define kAtmLogCellFlag (1 << 8)
7185 +/* ATM log codes */
7187 +#define kAtmLogSendFrame 1
7188 +#define kAtmLogRcvFrame 2
7189 +#define kAtmLogSendFrameComplete 3
7190 +#define kAtmLogReturnFrame 4
7191 +#define kAtmLogVcAllocate 5
7192 +#define kAtmLogVcFree 6
7193 +#define kAtmLogVcActivate 7
7194 +#define kAtmLogVcDeactivate 8
7195 +#define kAtmLogTimer 9
7196 +#define kAtmLogCell 10
7197 +#define kAtmLogVcConfigure 11
7199 +#define kAtmLogRxCellHeader 12
7200 +#define kAtmLogRxCellData 13
7201 +#define kAtmLogTxCell 14
7203 +#endif /* SoftAtmVcHeader */
7204 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/SoftDsl.gh linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/SoftDsl.gh
7205 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/SoftDsl.gh 1970-01-01 01:00:00.000000000 +0100
7206 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/SoftDsl.gh 2006-06-26 09:07:10.000000000 +0200
7208 +/****************************************************************************
7213 + * This is a header file which defines the type for the DSL
7214 + * global variable structure.
7216 + * Copyright (c) 1993-1997 AltoCom, Inc. All rights reserved.
7217 + * Authors: Ilya Stomakhin
7219 + * $Revision: 1.72 $
7221 + * $Id: SoftDsl.gh,v 1.72 2004/04/30 23:05:19 kdu Exp $
7223 + * $Log: SoftDsl.gh,v $
7224 + * Revision 1.72 2004/04/30 23:05:19 kdu
7225 + * Fixed interop issues in TDC lab for TMM.
7227 + * Revision 1.70 2004/04/10 23:30:48 ilyas
7228 + * Defined gloval structure for slow (SDRAM) data
7230 + * Revision 1.69 2004/04/02 18:33:45 gsyu
7231 + * Share MuxFramer buffers with scratch memory
7233 + * Revision 1.68 2004/02/04 20:12:38 linyin
7234 + * Support adsl2plus
7236 + * Revision 1.67 2004/02/03 19:10:37 gsyu
7237 + * Added separated carrierInfo structures for G992P5
7239 + * Revision 1.66 2004/01/26 04:21:06 yongbing
7240 + * Merge changes in ADSL2 branch into Annex A branch
7242 + * Revision 1.65 2004/01/13 19:12:07 gsyu
7243 + * Added two more variables for Double upstream
7245 + * Revision 1.64 2003/12/04 02:10:37 linyin
7246 + * Add a variable for FbmsOL mode
7248 + * Revision 1.63 2003/11/20 00:57:50 yongbing
7249 + * Merge ADSL2 functionalities into Annex A branch
7251 + * Revision 1.62 2003/11/05 01:59:12 liang
7252 + * Add vendor ID code for Infineon.
7254 + * Revision 1.61 2003/08/12 22:59:41 khp
7255 + * - for Haixiang: added support for ADSL_MARGIN_TWEAK_TEST
7257 + * Revision 1.60 2003/08/01 00:08:19 liang
7258 + * Added firmware ID for Samsung ADI 930 DSLAM.
7260 + * Revision 1.59 2003/07/14 14:40:08 khp
7261 + * - AnnexB: added bad SNR2 retrain counter to connectin setup
7263 + * Revision 1.58 2003/06/25 02:40:22 liang
7264 + * Added firmware ID for Annex A UE9000 ADI918 (from Aliant, Canada).
7266 + * Revision 1.57 2003/06/25 00:00:40 ilyas
7267 + * -added firmware IDs for TI 4000C and AC5 (Annex B)
7269 + * Revision 1.56 2003/05/31 01:50:38 khp
7270 + * -add firmware IDs for ECI16 and ECI16A
7272 + * Revision 1.55 2003/03/27 19:30:52 liang
7273 + * Add and initialize new connectionSetup field coVendorFirmwareID under module ADSL_IDENTIFY_VENDOR_FIRMWARE.
7275 + * Revision 1.54 2002/12/13 18:35:48 yongbing
7276 + * Add support for G.992.2 Annex C in start up
7278 + * Revision 1.53 2002/12/06 02:06:33 liang
7279 + * Moved the T1.413 RAck1/RAck2 switching variables to connection setup structure.
7281 + * Revision 1.52 2002/11/26 02:49:46 liang
7282 + * Added variable codingGainDecrement to the connectionSetup structure to solve the C-Rates-RA option failure problem.
7284 + * Revision 1.51 2002/10/20 18:56:16 khp
7286 + * - #ifdef NEC_NSIF_WORKAROUND:
7287 + * - add status and fail counter for NSIF
7289 + * Revision 1.50 2002/09/28 02:36:50 yongbing
7290 + * Add retrain in T1.413 with R-Ack1 tone
7292 + * Revision 1.49 2002/09/12 21:07:19 ilyas
7293 + * Added HEC, OCD and LCD counters
7295 + * Revision 1.48 2002/07/19 01:51:35 liang
7296 + * Added vendor ID constant for Alcatel.
7298 + * Revision 1.47 2002/06/27 21:51:08 liang
7299 + * Added xmt and rcv tone selection bitmap in connection setup.
7301 + * Revision 1.46 2002/06/11 20:48:06 liang
7302 + * Added CO vendor ID field to connectionSetup structure.
7304 + * Revision 1.45 2002/06/06 03:05:43 khp
7305 + * -use boolean in connectup setup instead of localCapabilities.features to indicate FBM mode
7307 + * Revision 1.44 2002/03/22 19:38:58 yongbing
7308 + * Modify for co-exist of G994P1 and T1P413
7310 + * Revision 1.43 2002/03/02 00:52:40 ilyas
7311 + * AnnexC delay needs to be long for prototype
7313 + * Revision 1.42 2002/01/19 23:59:17 ilyas
7314 + * Added support for LOG and eye data to ADSL core target
7316 + * Revision 1.41 2002/01/16 19:03:59 ilyas
7317 + * Added HOST_ONLY ifdefs around ADSL core data
7319 + * Revision 1.40 2002/01/14 17:41:04 liang
7320 + * Move xmt & rcv sample buffers to top level.
7322 + * Revision 1.39 2001/12/21 22:45:34 ilyas
7323 + * Added support for ADSL MIB data object
7325 + * Revision 1.38 2001/12/13 02:24:22 ilyas
7326 + * Added G997 (Clear EOC and G997 framer) support
7328 + * Revision 1.37 2001/11/30 05:56:31 liang
7329 + * Merged top of the branch AnnexBDevelopment onto top of the tree.
7331 + * Revision 1.36 2001/10/19 00:12:07 ilyas
7332 + * Added support for frame oriented (no ATM) data link layer
7334 + * Revision 1.29.2.5 2001/10/03 01:44:00 liang
7335 + * Merged with codes from main tree (tag SoftDsl_2_18).
7337 + * Revision 1.29.2.4 2001/08/18 00:00:36 georgep
7338 + * Add variable to store annexC pathDelay
7340 + * Revision 1.29.2.3 2001/08/08 17:33:27 yongbing
7341 + * Merge with tag SoftDsl_2_17
7343 + * Revision 1.35 2001/08/29 02:56:01 ilyas
7344 + * Added tests for flattening/unflatenning command and statuses (dual mode)
7346 + * Revision 1.34 2001/08/28 03:26:32 ilyas
7347 + * Added support for running host and adsl core parts separately ("dual" mode)
7349 + * Revision 1.33 2001/06/18 19:49:36 ilyas
7350 + * Changes to include support for HOST_ONLY mode
7352 + * Revision 1.32 2001/05/18 21:21:44 liang
7353 + * Save the current number of rcv samples to line handler for QProc test.
7355 + * Revision 1.31 2001/04/25 01:20:11 ilyas
7357 + * Don't use DSL frame functions if ATM_LAYER is not defined
7359 + * Revision 1.30 2001/03/25 06:11:20 liang
7360 + * Combined separate loop attenuation status for ATUR & ATUC into one status.
7361 + * Replace separate hardware AGC info status for ATUR & ATUC into hardware AGC
7362 + * request status and hardware AGC obtained status.
7363 + * Use store AGC command to save hardware AGC value instead of returning value
7364 + * from status report.
7366 + * Revision 1.29 2001/03/17 03:00:46 georgep
7367 + * Added agcInfo to connectionSetupStruct
7369 + * Revision 1.28 2001/02/10 03:03:09 ilyas
7370 + * Added one more DslFrame function
7372 + * Revision 1.27 2000/08/31 19:04:24 liang
7373 + * Added scratch buffer structure definition.
7375 + * Revision 1.26 2000/07/23 20:52:52 ilyas
7376 + * Added xxxFrameBufSetAddress() function for ATM framer layers
7377 + * Rearranged linkLayer functions in one structure which is passed as a
7378 + * parameter to xxxLinkLayerInit() function to be set there
7380 + * Revision 1.25 2000/07/18 21:42:25 ilyas
7381 + * Fixed compiler warning about pointer casting
7383 + * Revision 1.24 2000/07/18 21:18:45 ilyas
7384 + * Added GLOBAL_PTR_BIAS feature to utilize full 64K MIPS relative addressing space
7386 + * Revision 1.23 2000/07/18 20:03:24 ilyas
7387 + * Changed DslFrame functions definitions to macros,
7388 + * Removed gDslVars from their parameter list
7390 + * Revision 1.22 2000/07/17 21:08:15 lkaplan
7391 + * removed global pointer
7393 + * Revision 1.21 2000/05/09 23:00:26 ilyas
7394 + * Added ATM status messages, ATM timer, Tx frames flush on timeout
7395 + * Fixed a bug - adding flushed Tx frames to the list of free Rx frames
7397 + * Revision 1.20 2000/05/03 03:57:04 ilyas
7398 + * Added LOG file support for writing ATM data
7400 + * Revision 1.19 2000/04/19 00:31:47 ilyas
7401 + * Added global SoftDsl functions for Vc, added OOB info functions
7403 + * Revision 1.18 2000/04/13 08:36:22 yura
7404 + * Added SoftDslSetRefData, SoftDslGetRefData functions
7406 + * Revision 1.17 2000/04/13 05:38:54 georgep
7407 + * Added T1p413 "Activation and Acknowledgement" which can substitute G994P1
7409 + * Revision 1.16 2000/04/05 22:30:42 liang
7410 + * Changed function & constant names from G992p2 to G992 for the Main module.
7412 + * Revision 1.15 2000/04/04 04:16:06 liang
7413 + * Merged with SoftDsl_0_03 from old tree.
7415 + * Revision 1.15 2000/04/04 01:47:21 ilyas
7416 + * Implemented abstract dslFrame and dslFrameBuffer objects
7418 + * Revision 1.14 2000/04/01 02:53:33 georgep
7419 + * Added pointer to G992p2Profile inside connectionSetup
7421 + * Revision 1.13 2000/03/18 01:27:56 georgep
7422 + * Changed connectionSetup to include G992p1 Capabilities
7424 + * Revision 1.12 2000/02/29 01:39:05 georgep
7425 + * put variable haveRemoteCapabilities inside connectionSetupStruct
7427 + * Revision 1.11 2000/02/08 00:44:36 liang
7428 + * Fix the gDslVars definition for Irix environment.
7430 + * Revision 1.10 1999/11/19 00:59:29 george
7431 + * Define physicalLayerVars as a union
7433 + * Revision 1.9 1999/11/11 19:19:42 george
7434 + * Porting to 16Bit Compiler
7436 + * Revision 1.8 1999/11/09 20:26:17 george
7437 + * Added G992P2_PROFILE to modules list
7439 + * Revision 1.7 1999/10/27 23:01:54 wan
7440 + * Add G.994.1 setup in dslConnectionSetupStruct for setting up Initiation side
7442 + * Revision 1.6 1999/08/12 21:16:27 george
7443 + * Move profileVars definition to G992p2/G992p2Profile.gh
7445 + * Revision 1.5 1999/08/10 18:20:43 george
7446 + * Define fastRetrainVars
7448 + * Revision 1.4 1999/07/16 02:03:02 liang
7449 + * Added Tx & Rx data handler function pointers.
7451 + * Revision 1.3 1999/07/03 01:40:15 liang
7452 + * Redefined dsl command parameter list and added connection setup struct.
7454 + * Revision 1.2 1999/02/10 01:56:37 liang
7455 + * Added hooks for G994.1 and G992.2.
7458 + *****************************************************************************/
7460 +#ifndef SoftDslGlobals
7461 +#define SoftDslGlobals
7463 +#include "SoftDsl.h"
7465 +#ifdef G992P2_PROFILE
7466 +#include "G992p2Profile.gh"
7471 + kVendorUnknown = 0,
7476 + kVendorCentillium,
7481 +#define kDslVendorFirwareUnknown 0
7484 + kVendorADI_Anaconda = 1,
7485 + kVendorADI_ECI918,
7486 + kVendorADI_ECI930,
7488 + kVendorADI_UE9000_918,
7489 + kVendorADI_Samsung_930,
7490 + kVendorTI_4000C_ERICSSON_350,
7491 + kVendorTI_4000C_SEIMENS,
7492 + kVendorADI_ECI16_AnnexB = 50, /* leave space for more Annex A types */
7493 + kVendorADI_ECI16A_AnnexB,
7494 + kVendorTI_4000C_AnnexB,
7495 + kVendorTI_AC5_AnnexB
7496 + } VendorFirmwareIDType;
7498 +#define kDslXmtToneSelectionStartTone 0
7499 +#ifdef G992P1_ANNEX_B
7500 +#define kDslXmtToneSelectionEndTone 63
7502 +#define kDslXmtToneSelectionEndTone 31
7504 +#define kDslXmtToneSelectionNumOfTones (kDslXmtToneSelectionEndTone-kDslXmtToneSelectionStartTone+1)
7505 +#define kDslXmtToneSelectionNumOfBytes ((kDslXmtToneSelectionNumOfTones+7)/8)
7506 +#define kDslRcvToneSelectionStartTone 32
7507 +#define kDslRcvToneSelectionEndTone 255
7508 +#define kDslRcvToneSelectionNumOfTones (kDslRcvToneSelectionEndTone-kDslRcvToneSelectionStartTone+1)
7509 +#define kDslRcvToneSelectionNumOfBytes ((kDslRcvToneSelectionNumOfTones+7)/8)
7511 +#define kDslT1p413RAckModeTryRAck1 0x01
7512 +#define kDslT1p413RAckModeTryRAck2 0x02
7513 +#define kDslT1p413RAckModeTrialMask 0x0F
7514 +#define kDslT1p413RAckModeSelected 0x10
7515 +#define kDslT1p413RAckModeTrialCount 10 /* when in trial mode */
7516 +#define kDslT1p413RAckModeSwitchCount 20 /* when mode is selected */
7518 +#ifdef ADSL_MARGIN_TWEAK_TEST
7519 +#define kDslMarginTweakNumOfTones 256
7524 + Boolean haveRemoteCapabilities;
7525 + dslModulationType selectedModulation;
7526 + dslModulationType startupModulation;
7527 +#if defined(G992P1_ANNEX_I) || defined(G992P5)
7528 + ushort downstreamMinCarr, downstreamMaxCarr;
7530 + uchar downstreamMinCarr, downstreamMaxCarr;
7532 + uchar upstreamMinCarr, upstreamMaxCarr;
7533 +#if defined(DOUBLE_UP_STREAM)
7534 + Boolean isDoubleUsEnabled;
7535 + short selectedPilotTone;
7537 + dslDataPumpCapabilities localCapabilities, remoteCapabilities;
7539 + g992p3DataPumpCapabilities localCarrierInfoG992p3AnnexA;
7540 + g992p3DataPumpCapabilities remoteCarrierInfoG992p3AnnexA;
7541 + g992p3DataPumpCapabilities selectedCarrierInfoG992p3AnnexA;
7542 + uchar xmtG992p3State;
7544 + g992p3DataPumpCapabilities localCarrierInfoG992p5AnnexA;
7545 + g992p3DataPumpCapabilities remoteCarrierInfoG992p5AnnexA;
7546 + g992p3DataPumpCapabilities selectedCarrierInfoG992p5AnnexA;
7547 +#endif /* G992P5 */
7548 +#endif /* G992P3 */
7549 + uchar handshakingDuplexMode;
7550 + Boolean handshakingClientInitiation;
7551 + short handshakingXmtPowerLevel;
7552 + uchar handshakingXmtCarrierSet;
7553 + short hwAgcQ4dB; /* for loop attenuation calculation */
7555 +#ifdef ADSL_IDENTIFY_VENDOR_FIRMWARE
7556 + uchar coVendorFirmwareID;
7558 + uchar codingGainDecrement; /* coding gain decrement in Q4dB for initial rate calculation */
7559 + uchar xmtToneSelection[kDslXmtToneSelectionNumOfBytes];
7560 + uchar rcvToneSelection[kDslRcvToneSelectionNumOfBytes];
7562 + Boolean isFbmMode;
7563 + Boolean isFbmsOLMode;
7564 + long xmtToRcvPathDelay;
7566 +#if defined(T1P413) && defined(XMT_RACT2_FOR_ADI_COMPATIBILITY)
7567 + uchar t1p413RAckModeUsed;
7568 + uchar t1p413RAckModeCounter;
7570 +#ifdef G992P1_ANNEX_B
7571 + uchar badSNR2RetrainCounter;
7573 +#ifdef ADSL_MARGIN_TWEAK_TEST
7574 + short marginTweakExtraPowerQ4dB;
7575 + char marginTweakTableQ4dB[kDslMarginTweakNumOfTones];
7577 +#ifdef G992P2_PROFILE
7578 + G992p2ProfileVarsStruct* profileVarsPtr;
7580 +#ifdef TDC_IOP_FIX_SEIMENS_TI
7581 + char t1p413RetrainCounter; /* 0: no retrain needed; 1: force to T1.413 mode and retrain after R-MSG1; 2: 2nd T1.413 session, go to showtime */
7583 +#ifdef ANSI_CACT12_PING_PONG
7584 + char t1p413SkipToneIndex; /* to alternate between CAct1 and CAct2 detection */
7586 + } dslConnectionSetupStruct;
7589 +#include "MuxFramer.gh"
7593 +#include "SoftAtm.gh"
7597 +#include "DslPacket.gh"
7600 +#ifdef G997_1_FRAMER
7603 +#include "G992p3OvhMsg.gh"
7608 +#include "AdslMib.gh"
7613 +#include "T1p413Main.gh"
7617 +#include "G994p1Main.gh"
7621 +#include "G992Main.gh"
7624 +#include "SoftDslSampleBuffers.gh"
7627 +typedef struct __dslSlowVarsStruct
7631 + dslSlowVarsStruct;
7633 +typedef struct __dslVarsStruct
7636 + eyeHandlerType eyeHandlerPtr;
7637 + logHandlerType logHandlerPtr;
7638 + dslDriverCallbackType driverCallback;
7640 + rcvHandlerType rcvHandlerPtr;
7641 + xmtHandlerType xmtHandlerPtr;
7643 +#ifndef ADSLCORE_ONLY
7644 + dslCommandHandlerType adslCoreCommandHandlerPtr;
7646 + dslCommandHandlerType dataPumpCommandHandlerPtr;
7648 + dslStatusHandlerType internalStatusHandlerPtr;
7649 + dslStatusHandlerType externalStatusHandlerPtr;
7650 +#ifndef ADSLCORE_ONLY
7651 + dslStatusHandlerType externalLinkLayerStatusHandlerPtr;
7654 + dslDirectionType direction;
7655 + dslConnectionSetupStruct connectionSetup;
7657 +#ifdef NEC_NSIF_WORKAROUND
7658 + uchar G994NsStatus;
7659 + uchar G994NsFailCounter;
7662 + dslFrameHandlerType rxIndicateHandlerPtr;
7663 + dslFrameHandlerType txCompleteHandlerPtr;
7665 + linkLayerFunctions LinkLayerFunctions;
7666 + dslSlowVarsStruct *dslSlowVars;
7668 +#ifdef DSL_FRAME_FUNCTIONS
7669 + dslFrameFunctions DslFrameFunctions;
7673 + int currRcvNSamps;
7676 + DslSampleBuffersStruct sampleBuffersVars;
7678 +#ifdef G992P2_PROFILE
7679 + G992p2ProfileVarsStruct G992p2ProfileVars;
7683 + muxFramerVarsStruct muxFramerVars;
7685 +#endif /* HOST_ONLY */
7687 +#ifdef DSL_LINKLAYER
7691 + atmVarsStruct atmVars;
7694 + dslPacketVarsStruct dslPacketVars;
7699 +#ifdef G997_1_FRAMER
7700 + g997VarsStruct G997Vars;
7702 + g992p3OvhMsgVarsStruct G992p3OvhMsgVars;
7707 + adslMibVarsStruct adslMibVars;
7714 + T1p413VarsStruct T1p413Vars;
7717 + G994p1VarsStruct G994p1Vars;
7720 + G992VarsStruct G992Vars;
7722 + } physicalLayerVars;
7726 + G992ScratchVarsStruct G992ScratchVars;
7728 +#if defined(ADSL_FRAMER) && defined(SHARE_MUX_FRAMER_VARS)
7729 + muxFramerSharedVarsStruct muxFramerSharedVars;
7732 +#endif /* HOST_ONLY */
7737 +#ifndef GLOBAL_PTR_BIAS
7738 +#define gDslGlobalVarPtr ((struct __dslVarsStruct *)gDslVars)
7739 +#define gDslGlobalSlowVarPtr (gDslGlobalVarPtr->dslSlowVars)
7741 +#define gDslGlobalVarPtr ((struct __dslVarsStruct *) (void*)((uchar*)(gDslVars) - GLOBAL_PTR_BIAS))
7742 +#define gDslGlobalSlowVarPtr ((struct __dslSlowVarsStruct *) (void*)((uchar*)(gDslGlobalVarPtr->dslSlowVars) - GLOBAL_PTR_BIAS))
7745 +#define gDslSampleBuffersVars (gDslGlobalVarPtr->sampleBuffersVars)
7747 +#define gDslMuxFramerVars (gDslGlobalVarPtr->muxFramerVars)
7748 +#define gDslMuxFramerSharedVars (gDslGlobalVarPtr->scratchVars.muxFramerSharedVars)
7749 +#define gDslLinkLayerVars (gDslGlobalVarPtr->linkLayerVars)
7750 +#define gDslAtmVars (gDslGlobalVarPtr->linkLayerVars.atmVars)
7751 +#define gDslPacketVars (gDslGlobalVarPtr->linkLayerVars.dslPacketVars)
7752 +#define gG997Vars (gDslGlobalVarPtr->G997Vars)
7755 +#define gG992p3OvhMsgVars (gDslGlobalVarPtr->G992p3OvhMsgVars)
7758 +#define gAdslMibVars (gDslGlobalVarPtr->adslMibVars)
7760 +#define gT1p413Vars (gDslGlobalVarPtr->physicalLayerVars.T1p413Vars)
7761 +#define gG994p1Vars (gDslGlobalVarPtr->physicalLayerVars.G994p1Vars)
7762 +#define gG992Vars (gDslGlobalVarPtr->physicalLayerVars.G992Vars)
7763 +#define gG992p2ProfileVars (gDslGlobalVarPtr->G992p2ProfileVars)
7765 +#define gG992ScratchVars (gDslGlobalVarPtr->scratchVars.G992ScratchVars)
7767 +#ifndef gEyeHandlerPtr
7768 +#define gEyeHandlerPtr (gDslGlobalVarPtr->eyeHandlerPtr)
7771 +#ifndef gLogHandlerPtr
7772 +#define gLogHandlerPtr (gDslGlobalVarPtr->logHandlerPtr)
7775 +#ifdef VP_SIMULATOR
7776 +#define gDriverCallback(x) (gDslGlobalVarPtr->driverCallback)(x)
7778 +#define gDriverCallback(x)
7783 +** Frame functions callouts
7787 +#define gDslFrameFunc (gDslGlobalVarPtr->DslFrameFunctions)
7789 +#define DslFrameBufferGetLength(gDslVars, fb) \
7790 + gDslFrameFunc.__DslFrameBufferGetLength(fb)
7792 +#define DslFrameBufferGetAddress(gDslVars, fb) \
7793 + gDslFrameFunc.__DslFrameBufferGetAddress(fb)
7795 +#define DslFrameBufferSetLength(gDslVars, fb, l) \
7796 + gDslFrameFunc.__DslFrameBufferSetLength(fb, l)
7798 +#define DslFrameBufferSetAddress(gDslVars, fb, p) \
7799 + gDslFrameFunc.__DslFrameBufferSetAddress(fb, p)
7801 +#define DslFrameInit(gDslVars, f) \
7802 + gDslFrameFunc.__DslFrameInit(f)
7804 +#define DslFrameGetLength(gDslVars, pFrame) \
7805 + gDslFrameFunc.__DslFrameGetLength(pFrame)
7807 +#define DslFrameGetBufCnt(gDslVars, pFrame) \
7808 + gDslFrameFunc.__DslFrameGetBufCnt(pFrame)
7810 +#define DslFrameGetFirstBuffer(gDslVars, pFrame) \
7811 + gDslFrameFunc.__DslFrameGetFirstBuffer(pFrame)
7813 +#define DslFrameGetNextBuffer(gDslVars, pFrBuffer) \
7814 + gDslFrameFunc.__DslFrameGetNextBuffer(pFrBuffer)
7816 +#define DslFrameSetNextBuffer(gDslVars, pFrBuf, pFrBufNext) \
7817 + gDslFrameFunc.__DslFrameSetNextBuffer(pFrBuf, pFrBufNext)
7819 +#define DslFrameGetLastBuffer(gDslVars, pFrame) \
7820 + gDslFrameFunc.__DslFrameGetLastBuffer(pFrame)
7822 +#define DslFrameGetLinkFieldAddress(gDslVars, f) \
7823 + gDslFrameFunc.__DslFrameGetLinkFieldAddress(f)
7825 +#define DslFrameGetFrameAddressFromLink(gDslVars, lnk) \
7826 + gDslFrameFunc.__DslFrameGetFrameAddressFromLink(lnk)
7829 +#define DslFrameGetOobInfo(gDslVars, f, pOobInfo) \
7830 + gDslFrameFunc.__DslFrameGetOobInfo(f, pOobInfo)
7832 +#define DslFrameSetOobInfo(gDslVars, f, pOobInfo) \
7833 + gDslFrameFunc.__DslFrameSetOobInfo(f, pOobInfo)
7836 +#define DslFrameEnqueBufferAtBack(gDslVars, f, b) \
7837 + gDslFrameFunc.__DslFrameEnqueBufferAtBack(f, b)
7839 +#define DslFrameEnqueFrameAtBack(gDslVars, fMain, f) \
7840 + gDslFrameFunc.__DslFrameEnqueFrameAtBack(fMain, f)
7842 +#define DslFrameEnqueBufferAtFront(gDslVars, f, b) \
7843 + gDslFrameFunc.__DslFrameEnqueBufferAtFront(f, b)
7845 +#define DslFrameEnqueFrameAtFront(gDslVars, fMain, f) \
7846 + gDslFrameFunc.__DslFrameEnqueFrameAtFront(fMain, f)
7848 +#define DslFrameDequeBuffer(gDslVars, pFrame) \
7849 + gDslFrameFunc.__DslFrameDequeBuffer(pFrame)
7851 +#define DslFrameAllocMemForFrames(gDslVars, frameNum) \
7852 + gDslFrameFunc.__DslFrameAllocMemForFrames(frameNum)
7854 +#define DslFrameFreeMemForFrames(gDslVars, hMem) \
7855 + gDslFrameFunc.__DslFrameFreeMemForFrames(hMem)
7857 +#define DslFrameAllocFrame(gDslVars, handle) \
7858 + gDslFrameFunc.__DslFrameAllocFrame(handle)
7860 +#define DslFrameFreeFrame(gDslVars, handle, pFrame) \
7861 + gDslFrameFunc.__DslFrameFreeFrame(handle, pFrame)
7863 +#define DslFrameAllocMemForBuffers(gDslVars, ppMemPool, bufNum, memSize) \
7864 + gDslFrameFunc.__DslFrameAllocMemForBuffers(ppMemPool, bufNum, memSize)
7866 +#define DslFrameFreeMemForBuffers(gDslVars, hMem, memSize, pMemPool) \
7867 + gDslFrameFunc.__DslFrameFreeMemForBuffers(hMem, memSize, pMemPool)
7869 +#define DslFrameAllocBuffer(gDslVars, handle, pMem, length) \
7870 + gDslFrameFunc.__DslFrameAllocBuffer(handle, pMem, length)
7872 +#define DslFrameFreeBuffer(gDslVars, handle, pBuf) \
7873 + gDslFrameFunc.__DslFrameFreeBuffer(handle, pBuf)
7875 +#define DslFrame2Id(gDslVars, handle, pFrame) \
7876 + gDslFrameFunc.__DslFrame2Id(handle, pFrame)
7878 +#define DslFrameId2Frame(gDslVars, handle, frameId) \
7879 + gDslFrameFunc.__DslFrameId2Frame (handle, frameId)
7882 +#endif /* SoftDslGlobals */
7883 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/SoftDsl.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/SoftDsl.h
7884 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/SoftDsl.h 1970-01-01 01:00:00.000000000 +0100
7885 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/SoftDsl.h 2006-06-26 09:07:10.000000000 +0200
7887 +/****************************************************************************
7893 + * This file contains the exported interface for SoftDsl.c
7896 + * Copyright (c) 1993-1998 AltoCom, Inc. All rights reserved.
7897 + * Authors: Ilya Stomakhin
7899 + * $Revision: 1.275 $
7901 + * $Id: SoftDsl.h,v 1.275 2005/04/28 22:55:36 ilyas Exp $
7903 + * $Log: SoftDsl.h,v $
7904 + * Revision 1.275 2005/04/28 22:55:36 ilyas
7905 + * Cleaned up kDslG992RunAnnexaP3ModeInAnnexaP5, kG992EnableAnnexM and kDslAtuChangeTxFilterRequest definitions
7907 + * Revision 1.274 2005/04/27 20:57:32 yongbing
7908 + * Implement 32 frequency break points for TSSI, PR 30211
7910 + * Revision 1.273 2005/04/02 03:27:52 kdu
7911 + * PR30236: Define kDslEnableRoundUpDSLoopAttn, this is shared with kDslCentilliumCRCWorkAroundEnabled.
7913 + * Revision 1.272 2005/04/01 21:56:39 ilyas
7914 + * Added more test commands definitions
7916 + * Revision 1.271 2005/02/11 05:03:57 ilyas
7917 + * Added support for DslOs
7919 + * Revision 1.270 2005/02/11 03:33:22 lke
7920 + * Support 2X, 4X, and 8X spectrum in ANNEX_I DS
7922 + * Revision 1.269 2005/01/08 00:11:58 ilyas
7923 + * Added definition for AnnexL status
7925 + * Revision 1.268 2004/12/18 00:52:35 mprahlad
7926 + * Add Dig US Pwr cutback status
7928 + * Revision 1.267 2004/11/08 22:21:38 ytan
7929 + * init swap state after retrain
7931 + * Revision 1.266 2004/11/05 21:16:50 ilyas
7932 + * Added support for pwmSyncClock
7934 + * Revision 1.265 2004/10/28 20:05:17 gsyu
7935 + * Fixed compilation errors for simulation targets
7937 + * Revision 1.264 2004/10/23 00:16:35 nino
7938 + * Added kDslHardwareSetRcvAGC status to set absolute rcv agc gain.
7940 + * Revision 1.263 2004/10/22 21:21:06 ilyas
7941 + * Fixed bit definition overlap in demodCapabilities
7943 + * Revision 1.262 2004/10/20 00:43:20 gsyu
7944 + * Added constants to support new xmt sample buffer control scheme
7946 + * Revision 1.261 2004/10/12 01:09:28 nino
7947 + * Remove kDslHardwareEnablePwmSyncClk and kDslHardwareSetPwmSyncClkFreq
7948 + * status definitions. Add kDslEnablePwmSyncClk and kDslSetPwmSyncClkFreq
7949 + * command definitions.
7951 + * Revision 1.260 2004/10/11 20:21:26 nino
7952 + * Added kDslHardwareEnablePwmSyncClk and kDslHardwareSetPwmSynClkFreq hardware statuses.
7954 + * Revision 1.259 2004/10/07 19:17:29 nino
7955 + * Added kDslHardwareGetRcvAGC status.
7957 + * Revision 1.258 2004/10/02 00:17:14 nino
7958 + * Added kDslHardwareAGCSetPga2 and kDslSetPilotEyeDisplay status definitions.
7960 + * Revision 1.257 2004/08/27 01:00:30 mprahlad
7962 + * Keep kDslAtuChangeTxFilterRequest defined by default so ADSL1 only targets can
7965 + * Revision 1.256 2004/08/20 19:00:34 ilyas
7966 + * Added power management code for 2+
7968 + * Revision 1.255 2004/08/17 23:18:25 kdu
7969 + * Merged interop changes for TDC lab from a023e9.
7971 + * Revision 1.254 2004/07/22 00:56:03 yongbing
7972 + * Add ADSL2 Annex B modulation definition
7974 + * Revision 1.253 2004/07/16 22:23:28 nino
7975 + * - Defined macros to extract subcarrier and supported set information
7976 + * for tssi. Subcarrier and suported set indicator is packed into
7977 + * dsSubcarrier index array.
7979 + * Revision 1.252 2004/07/01 00:11:22 nino
7980 + * Added preliminary code for debugDataHandler (inside of #if DEBUG_DATA_HANDLER).
7982 + * Revision 1.251 2004/06/24 03:08:39 ilyas
7983 + * Added GFC mapping control for ATM bonding
7985 + * Revision 1.250 2004/06/23 00:03:20 khp
7986 + * - shorten self test result register length to 1 (satisfied requirement
7987 + * at DT, no known requirement anywhere else)
7989 + * Revision 1.249 2004/06/15 20:18:33 ilyas
7990 + * Made D uchar again for compatibility with older ADSl drivers that use this structure. ADSL driver will rely on G992p3 parameters for large D
7992 + * Revision 1.248 2004/06/12 00:26:03 gsyu
7993 + * Added constants for AnnexM
7995 + * Revision 1.247 2004/06/10 18:53:24 yjchen
7996 + * add large D support
7998 + * Revision 1.246 2004/06/04 01:55:00 linyin
7999 + * Add a constant for SRA enable/disable
8001 + * Revision 1.245 2004/05/19 23:22:23 linyin
8004 + * Revision 1.244 2004/05/15 03:04:58 ilyas
8005 + * Added L3 test definition
8007 + * Revision 1.243 2004/05/14 03:04:38 ilyas
8008 + * Fixed structure name typo
8010 + * Revision 1.242 2004/05/14 02:01:01 ilyas
8011 + * Fixed structure name typo
8013 + * Revision 1.241 2004/05/14 01:21:49 nino
8014 + * Added kDslSignalAttenuation, kDslAttainableNetDataRate kDslHLinScale constant definitions.
8016 + * Revision 1.240 2004/05/13 19:07:58 ilyas
8017 + * Added new statuses for ADSL2
8019 + * Revision 1.239 2004/05/01 01:09:51 ilyas
8020 + * Added power management command and statuses
8022 + * Revision 1.238 2004/04/23 22:50:38 ilyas
8023 + * Implemented double buffering to ensure G.997 HDLC frame (OvhMsg) is continuous
8025 + * Revision 1.237 2004/03/31 18:57:39 ilyas
8026 + * Added drop on data error capability control
8028 + * Revision 1.236 2004/03/30 03:11:30 ilyas
8029 + * Added #ifdef for CFE build
8031 + * Revision 1.235 2004/03/29 23:06:39 ilyas
8032 + * Added status for BG table update
8034 + * Revision 1.234 2004/03/17 02:49:49 ilyas
8035 + * Turn off ATM bit reversal for Alcatel DSLAM only
8037 + * Revision 1.233 2004/03/11 03:09:48 mprahlad
8038 + * Add test mode for afeloopback test
8040 + * Revision 1.232 2004/03/10 23:15:53 ilyas
8041 + * Added ETSI modem support
8043 + * Revision 1.231 2004/03/04 19:28:14 linyin
8044 + * Support adsl2plus
8046 + * Revision 1.230 2004/02/28 00:06:21 ilyas
8047 + * Added OLR message definitions for ADSL2+
8049 + * Revision 1.229 2004/02/13 03:21:15 mprahlad
8050 + * define kDslAturHwAgcMaxGain correctly for 6348
8052 + * Revision 1.228 2004/02/09 05:06:17 yongbing
8053 + * Add ADSL2 bit swap function
8055 + * Revision 1.227 2004/02/04 02:08:19 linyin
8056 + * remove the redefined kG992p5AnnexA
8058 + * Revision 1.226 2004/02/04 01:41:48 linyin
8059 + * Add some variables for G992P5
8061 + * Revision 1.225 2004/02/03 19:12:22 gsyu
8062 + * Added a dedicate structure and constants for G992P5
8064 + * Revision 1.224 2004/01/24 01:18:34 ytan
8065 + * add multi-section swapping flag
8067 + * Revision 1.223 2004/01/17 00:21:48 ilyas
8068 + * Added commands and statuses for OLR
8070 + * Revision 1.222 2004/01/13 19:12:37 gsyu
8071 + * Added more constants for Double upstream
8073 + * Revision 1.221 2003/12/23 21:19:04 mprahlad
8074 + * Define BCM6348_TEMP_MOVE_TO_LMEM to FAST_TEXT for 6348 targets - this is for
8075 + * ADSL2/AnnexA multimode builds - move a few functions to Lmem for now to avoid
8076 + * changes for swap on 6348.
8078 + * Revision 1.220 2003/12/19 21:21:53 ilyas
8079 + * Added dying gasp support for ADSL2
8081 + * Revision 1.219 2003/12/05 02:09:51 mprahlad
8082 + * Leave the AnalogEC defs in - saves ifdef-ing all uses of these defines.
8083 + * Include Bcm6345_To_Bcm6348.h - to be able to pick up macros for the
8086 + * Revision 1.218 2003/12/04 02:10:58 linyin
8087 + * Redefine some constants for supporting different pilot and TTR
8089 + * Revision 1.217 2003/12/03 02:24:39 gsyu
8090 + * Reverse previous check in for Double Upstream demo
8092 + * Revision 1.215 2003/11/20 00:58:47 yongbing
8093 + * Merge ADSL2 functionalities into Annex A branch
8095 + * Revision 1.214 2003/11/06 00:35:06 nino
8096 + * Added kDslWriteAfeRegCmd and kDslReadAfeRegCmd commands.
8098 + * Revision 1.213 2003/11/05 21:04:23 ilyas
8099 + * Added more codes for LOG data
8101 + * Revision 1.212 2003/10/22 00:51:52 yjchen
8102 + * define constant for quiet line noise
8104 + * Revision 1.211 2003/10/20 22:08:57 nino
8105 + * Added kDslSetRcvGainCmd and kDslBypassRcvHpfCmd debug commands.
8107 + * Revision 1.210 2003/10/18 00:04:59 yjchen
8108 + * define constants for G992P3 diagnostic mode channel response
8110 + * Revision 1.209 2003/10/17 22:41:29 yongbing
8111 + * Add INP message support
8113 + * Revision 1.208 2003/10/16 00:06:09 uid1249
8114 + * Moved G.994 definitions from G.994p1MainTypes.h
8116 + * Revision 1.207 2003/10/15 20:45:11 linyin
8117 + * Add some constants for support Revision 2
8119 + * Revision 1.206 2003/10/14 22:04:02 ilyas
8120 + * Added Nino's AFE statuses for 6348
8122 + * Revision 1.205 2003/10/10 18:49:26 gsyu
8123 + * Added test modes to workaround the clock domain crossing bug, PR18038
8125 + * Revision 1.204 2003/09/30 19:27:46 mprahlad
8126 + * ifdef AnalogEC definies with #ifndef BCM6348_SRC
8128 + * Revision 1.203 2003/09/26 19:36:34 linyin
8129 + * Add annexi constant and vars
8131 + * Revision 1.202 2003/09/25 20:16:13 yjchen
8132 + * remove featureNTR definition
8134 + * Revision 1.201 2003/09/08 20:29:51 ilyas
8135 + * Added test commands for chip regression tests
8137 + * Revision 1.200 2003/08/26 00:58:14 ilyas
8138 + * Added I432 reset command (for header compression)
8139 + * Fixed SoftDsl time (for I432 header compression)
8141 + * Revision 1.199 2003/08/26 00:37:29 ilyas
8142 + * #ifdef'ed DslFrameFunctions in dslCommand structure to save space
8144 + * Revision 1.198 2003/08/22 22:45:00 liang
8145 + * Change the NF field in G992CodingParams from uchar to ushort to support K=256 (dataRate=255*32kbps) in fast path.
8147 + * Revision 1.197 2003/08/21 21:19:05 ilyas
8148 + * Changed dataPumpCapabilities structure for G992P3
8150 + * Revision 1.196 2003/08/12 22:44:28 khp
8151 + * - for Haixiang: added kDslTestMarginTweak command and marginTweakSpec
8153 + * Revision 1.195 2003/07/24 17:28:16 ovandewi
8154 + * added Tx filter change request code
8156 + * Revision 1.194 2003/07/24 15:48:55 yongbing
8157 + * Reduce TSSI buffer size to avoid crash at the beginning of G.994.1. Need to find out why
8159 + * Revision 1.193 2003/07/19 07:11:47 nino
8160 + * Revert back to version 1.191.
8162 + * Revision 1.191 2003/07/17 21:25:25 yongbing
8163 + * Add support for READSL2 and TSSI
8165 + * Revision 1.190 2003/07/14 19:42:33 yjchen
8166 + * add constants for G992P3
8168 + * Revision 1.189 2003/07/10 23:07:11 liang
8169 + * Add demodCapability bit to minimize showtime ATUC xmt power through b&g table.
8171 + * Revision 1.188 2003/07/08 22:18:50 liang
8172 + * Added demodCapability bit for G.994.1 Annex A multimode operation.
8174 + * Revision 1.187 2003/07/07 23:24:43 ilyas
8175 + * Added G.dmt.bis definitions
8177 + * Revision 1.186 2003/06/25 02:44:02 liang
8178 + * Added demod capability bit kDslUE9000ADI918FECFixEnabled.
8179 + * Added back kDslHWEnableAnalogECUpdate & kDslHWEnableAnalogEC for backward compatibility (annex A).
8181 + * Revision 1.185 2003/06/18 01:39:19 ilyas
8182 + * Added AFE test commands. Add #defines for driver's builds
8184 + * Revision 1.184 2003/06/06 23:58:09 ilyas
8185 + * Added command and status for standalone AFE tests
8187 + * Revision 1.183 2003/05/29 21:09:32 nino
8188 + * - kDslHWEnableAnalogECUpdate define replaced with kDslHWSetDigitalEcUpdateMode
8189 + * - kDslHWEnableAnalogEC define replaced with kDslHWDisableDigitalECUpdate
8191 + * Revision 1.182 2003/04/15 22:08:15 liang
8192 + * Changed one of the demodCapability bit name from last checkin.
8194 + * Revision 1.181 2003/04/13 19:25:54 liang
8195 + * Added three more demodCapability bits.
8197 + * Revision 1.180 2003/04/02 02:09:17 liang
8198 + * Added demodCapability bit for ADI low rate option fix disable.
8200 + * Revision 1.179 2003/03/18 18:22:06 yongbing
8201 + * Use 32 tap TEQ for Annex I
8203 + * Revision 1.178 2003/03/06 00:58:07 ilyas
8204 + * Added SetStausBuffer command
8206 + * Revision 1.177 2003/02/25 00:46:26 ilyas
8207 + * Added T1.413 EOC vendor ID
8209 + * Revision 1.176 2003/02/21 23:30:54 ilyas
8210 + * Added Xmtgain command framing mode status and T1413VendorId parameters
8212 + * Revision 1.175 2003/02/07 22:13:55 liang
8213 + * Add demodCapabilities bits for sub-sample alignment and higher T1.413 level (used internally only).
8215 + * Revision 1.174 2003/01/23 02:54:07 liang
8216 + * Added demod capability bit for bitswap enable.
8218 + * Revision 1.173 2002/12/13 18:36:33 yongbing
8219 + * Add support for G.992.2 Annex C
8221 + * Revision 1.172 2002/12/10 23:27:12 ilyas
8222 + * Extended dslException parameter structure to allow printout from DslDiags
8224 + * Revision 1.171 2002/12/06 02:10:19 liang
8225 + * Moved the T1.413 RAck1/RAck2 switching variables to connection setup structure.
8226 + * Added/Modified the training progress codes for T1.413 RAck1/RAck2 and upstream 2x IFFT disable.
8228 + * Revision 1.170 2002/11/11 00:20:05 liang
8229 + * Add demod capability constant for internally disabling upstream 2x IFFT in T1.413 mode.
8231 + * Revision 1.169 2002/11/06 03:46:19 liang
8232 + * Add training progress code for upstream 2x IFFT disable.
8234 + * Revision 1.168 2002/11/01 01:41:06 ilyas
8235 + * Added flags for Centillium 4103 workarround
8237 + * Revision 1.167 2002/10/26 01:26:11 gsyu
8238 + * Move SoftDslLineHandler from SDRAM to LMEM
8240 + * Revision 1.166 2002/10/20 18:56:20 khp
8242 + * - #ifdef NEC_NSIF_WORKAROUND:
8243 + * - add macros to extract NSIF status and fail counter vars
8245 + * Revision 1.165 2002/10/14 05:24:35 liang
8246 + * Add training status code to request alternate xmt filter (for Samsung 6-port ADI918 DSLAMs) to meet KT 2km spec.
8248 + * Revision 1.164 2002/10/08 21:44:50 ilyas
8249 + * Fixed EOC stuffing byte to indicate "no synchronization" action
8251 + * Revision 1.163 2002/10/03 19:34:24 ilyas
8252 + * Added size for EOC serial number register
8254 + * Revision 1.162 2002/09/28 02:42:27 yongbing
8255 + * Add retrain in T1.413 with R-Ack1 tone
8257 + * Revision 1.161 2002/09/28 01:23:35 gsyu
8258 + * Reverse us2xifft change so that we can install new us2xifft on the tree
8260 + * Revision 1.160 2002/09/26 23:30:48 yongbing
8261 + * Add synch symbol detection in Showtime
8263 + * Revision 1.159 2002/09/20 23:47:52 khp
8264 + * - for gsyu: enable 2X IFFT for Annex A (XMT_FFT_SIZE_2X)
8266 + * Revision 1.158 2002/09/14 03:26:39 ilyas
8267 + * Changed far-end RDI reporting
8269 + * Revision 1.157 2002/09/13 21:10:54 ilyas
8270 + * Added reporting of remote modem LOS and RDI.
8271 + * Moved G992CodingParams definition to SoftDsl.h
8273 + * Revision 1.156 2002/09/12 21:07:19 ilyas
8274 + * Added HEC, OCD and LCD counters
8276 + * Revision 1.155 2002/09/09 21:31:30 linyin
8277 + * Add two constant to support long reach
8279 + * Revision 1.154 2002/09/07 01:31:51 ilyas
8280 + * Added support for OEM parameters
8282 + * Revision 1.153 2002/09/04 22:36:14 mprahlad
8283 + * defines for non standard info added
8285 + * Revision 1.152 2002/08/02 21:59:09 liang
8286 + * Enable G.992.2 carrierInfo in capabitilities when G.992.1 annex A is used for G.992.2.
8288 + * Revision 1.151 2002/07/29 20:01:03 ilyas
8289 + * Added command for Atm VC map table change
8291 + * Revision 1.150 2002/07/18 22:30:47 liang
8292 + * Add xmt power and power cutback related constants.
8294 + * Revision 1.149 2002/07/11 01:30:58 ilyas
8295 + * Changed status for ShowtimeMargin reporting
8297 + * Revision 1.148 2002/07/09 19:19:09 ilyas
8298 + * Added status parameters for ShowtimeSNRMargin info and command to filter
8299 + * out SNR margin data
8301 + * Revision 1.147 2002/06/27 21:50:24 liang
8302 + * Added test command related demodCapabilities bits.
8304 + * Revision 1.146 2002/06/26 21:29:00 liang
8305 + * Added dsl test cmd structure and showtime margin connection info status.
8307 + * Revision 1.145 2002/06/15 05:15:51 ilyas
8308 + * Added definitions for Ping, Dying Gasp and other test commands
8310 + * Revision 1.144 2002/05/30 19:55:15 ilyas
8311 + * Added status for ADSL PHY MIPS exception
8312 + * Changed conflicting definition for higher rates (S=1/2)
8314 + * Revision 1.143 2002/05/21 23:41:07 yongbing
8315 + * First check-in of Annex C S=1/2 codes
8317 + * Revision 1.142 2002/04/29 22:25:09 georgep
8318 + * Merge from branch annexC_demo - add status message constants
8320 + * Revision 1.141 2002/04/18 19:00:35 ilyas
8321 + * Added include file for builds in CommEngine environment
8323 + * Revision 1.140 2002/04/18 00:18:36 yongbing
8324 + * Add detailed timeout error messages
8326 + * Revision 1.139 2002/04/02 10:03:18 ilyas
8327 + * Merged BERT from AnnexA branch
8329 + * Revision 1.138 2002/03/26 01:42:29 ilyas
8330 + * Added timeout message constants for annex C
8332 + * Revision 1.137 2002/03/22 19:39:22 yongbing
8333 + * Modify for co-exist of G994P1 and T1P413
8335 + * Revision 1.136 2002/03/22 01:19:40 ilyas
8336 + * Add status message constants for total FEXT Bits, NEXT bits
8338 + * Revision 1.135 2002/03/10 22:32:24 liang
8339 + * Added report constants for LOS recovery and timing tone index.
8341 + * Revision 1.134 2002/03/07 22:06:32 georgep
8342 + * Replace ifdef G992P1 with G992P1_ANNEX_A for annex A variables
8344 + * Revision 1.133 2002/02/16 01:08:18 georgep
8345 + * Add log constant for showtime mse
8347 + * Revision 1.132 2002/02/08 04:36:27 ilyas
8348 + * Added commands for LOG file and fixed Idle mode pointer update
8350 + * Revision 1.131 2002/01/24 20:21:30 georgep
8351 + * Add logging defines, remove fast retrain defines
8353 + * Revision 1.130 2002/01/19 23:59:17 ilyas
8354 + * Added support for LOG and eye data to ADSL core target
8356 + * Revision 1.129 2002/01/16 23:43:54 liang
8357 + * Remove the carriage return character from last checkin.
8359 + * Revision 1.128 2002/01/15 22:27:13 ilyas
8360 + * Added command for ADSL loopback
8362 + * Revision 1.127 2002/01/10 07:18:22 ilyas
8363 + * Added status for printf (mainly for ADSL core debugging)
8365 + * Revision 1.126 2001/12/21 22:45:34 ilyas
8366 + * Added support for ADSL MIB data object
8368 + * Revision 1.125 2001/12/13 02:24:22 ilyas
8369 + * Added G997 (Clear EOC and G997 framer) support
8371 + * Revision 1.124 2001/11/30 05:56:31 liang
8372 + * Merged top of the branch AnnexBDevelopment onto top of the tree.
8374 + * Revision 1.123 2001/11/15 19:01:07 yongbing
8375 + * Modify only T1.413 part to the top of tree based on AnnexBDevelopment branch
8377 + * Revision 1.122 2001/10/19 00:12:07 ilyas
8378 + * Added support for frame oriented (no ATM) data link layer
8380 + * Revision 1.121 2001/10/09 22:35:13 ilyas
8381 + * Added more ATM statistics and OAM support
8383 + * Revision 1.105.2.20 2001/11/27 02:32:03 liang
8384 + * Combine vendor ID, serial #, and version number into SoftModemVersionNumber.c.
8386 + * Revision 1.105.2.19 2001/11/21 01:29:14 georgep
8387 + * Add a status message define for annexC
8389 + * Revision 1.105.2.18 2001/11/08 23:26:28 yongbing
8390 + * Add carrier selection function for Annex A and B
8392 + * Revision 1.105.2.17 2001/11/07 22:55:30 liang
8393 + * Report G992 rcv msg CRC error as what it is instead of time out.
8395 + * Revision 1.105.2.16 2001/11/05 19:56:21 liang
8396 + * Add DC offset info code.
8398 + * Revision 1.105.2.15 2001/10/16 00:47:16 yongbing
8399 + * Add return-to-T1p413 starting point if in error
8401 + * Revision 1.105.2.14 2001/10/15 23:14:01 yjchen
8402 + * remove ADSL_SINGLE_SYMBOL_BLOCK
8404 + * Revision 1.105.2.13 2001/10/12 18:07:16 yongbing
8405 + * Add support for T1.413
8407 + * Revision 1.105.2.12 2001/10/04 00:23:52 liang
8408 + * Add connection info constants for TEQ coef and PSD.
8410 + * Revision 1.105.2.11 2001/10/03 01:44:01 liang
8411 + * Merged with codes from main tree (tag SoftDsl_2_18).
8413 + * Revision 1.105.2.10 2001/09/28 22:10:04 liang
8414 + * Add G994 exchange message status reports.
8416 + * Revision 1.105.2.9 2001/09/26 18:08:21 georgep
8417 + * Send status error message in case features field is not setup properly
8419 + * Revision 1.105.2.8 2001/09/05 01:58:13 georgep
8420 + * Added status message for annexC measured delay
8422 + * Revision 1.105.2.7 2001/08/29 00:37:52 georgep
8423 + * Add log constants for annexC
8425 + * Revision 1.105.2.6 2001/08/18 00:01:34 georgep
8426 + * Add constants for annexC
8428 + * Revision 1.105.2.5 2001/08/08 17:33:28 yongbing
8429 + * Merge with tag SoftDsl_2_17
8431 + * Revision 1.120 2001/08/29 02:56:01 ilyas
8432 + * Added tests for flattening/unflatenning command and statuses (dual mode)
8434 + * Revision 1.119 2001/08/28 03:26:32 ilyas
8435 + * Added support for running host and adsl core parts separately ("dual" mode)
8437 + * Revision 1.118 2001/08/16 02:16:10 khp
8438 + * - mark functions with FAST_TEXT to reduce cycle counts for QPROC targets
8439 + * (replaces use of LMEM_INSN)
8441 + * Revision 1.117 2001/06/18 20:06:35 ilyas
8442 + * Added forward declaration of dslCommandStruc to avoid gcc warnings
8444 + * Revision 1.116 2001/06/18 19:49:36 ilyas
8445 + * Changes to include support for HOST_ONLY mode
8447 + * Revision 1.115 2001/06/01 22:00:33 ilyas
8448 + * Changed ATM PHY interface to accomodate UTOPIA needs
8450 + * Revision 1.114 2001/05/16 06:22:24 liang
8451 + * Added status reports for xmt & rcv prefix enable position.
8453 + * Revision 1.113 2001/05/02 20:34:32 georgep
8454 + * Added log constants for snr1 calculation
8456 + * Revision 1.112 2001/04/25 01:20:11 ilyas
8458 + * Don't use DSL frame functions if ATM_LAYER is not defined
8460 + * Revision 1.111 2001/04/17 21:13:00 georgep
8461 + * Define status constant kDslHWSetDigitalEcUpdateShift
8463 + * Revision 1.110 2001/04/16 23:38:36 georgep
8464 + * Add HW AGC constants for ATUR
8466 + * Revision 1.109 2001/04/06 23:44:53 georgep
8467 + * Added status constant for setting up digitalEcGainShift
8469 + * Revision 1.108 2001/03/29 05:58:34 liang
8470 + * Replaced the Aware compatibility codes with automatic detection codes.
8472 + * Revision 1.107 2001/03/25 06:11:22 liang
8473 + * Combined separate loop attenuation status for ATUR & ATUC into one status.
8474 + * Replace separate hardware AGC info status for ATUR & ATUC into hardware AGC
8475 + * request status and hardware AGC obtained status.
8476 + * Use store AGC command to save hardware AGC value instead of returning value
8477 + * from status report.
8479 + * Revision 1.106 2001/03/24 00:43:22 liang
8480 + * Report more checksum results (NumOfCalls, txSignal, rxSignal & eyeData).
8482 + * Revision 1.105 2001/03/16 23:57:31 georgep
8483 + * Added more loop attenuation reporting status constants
8485 + * Revision 1.104 2001/03/15 00:22:07 liang
8486 + * Back to version 1.101.
8488 + * Revision 1.103 2001/03/15 00:03:44 yjchen
8489 + * use kDslATURHardwareAGCInfo for AltoE14 AGC as well
8491 + * Revision 1.102 2001/03/14 23:10:56 yjchen
8492 + * add defns for AltoE14 AGC
8494 + * Revision 1.101 2001/03/08 23:31:34 georgep
8495 + * Added R, S, D, coding parameters to dslDataPumpCapabilities
8497 + * Revision 1.100 2001/02/10 03:03:09 ilyas
8498 + * Added one more DslFrame function
8500 + * Revision 1.99 2001/02/09 01:55:27 ilyas
8501 + * Added status codes and macros to support printing of AAL packets
8503 + * Revision 1.98 2001/01/30 23:28:10 georgep
8504 + * Added kDslDspControlStatus for handling changes to dsp params
8506 + * Revision 1.97 2001/01/12 01:17:18 georgep
8507 + * Added bit in demodCapabilities for analog echo cancellor
8509 + * Revision 1.96 2001/01/04 05:51:03 ilyas
8510 + * Added more dslStatuses
8512 + * Revision 1.95 2000/12/21 05:46:07 ilyas
8513 + * Added name for struct _dslFrame
8515 + * Revision 1.94 2000/12/13 22:04:39 liang
8516 + * Add Reed-Solomon coding enable bit in demodCapabilities.
8518 + * Revision 1.93 2000/11/29 20:42:02 liang
8519 + * Add defines for SNR & max achivable rate status and DEC enable demodCapabilities bit.
8521 + * Revision 1.92 2000/09/22 21:55:13 ilyas
8522 + * Added support for DSL + Atm physical layer only (I.432) simulations
8524 + * Revision 1.91 2000/09/10 09:20:53 lkaplan
8525 + * Improve interface for sending Eoc messages
8527 + * Revision 1.90 2000/09/08 19:37:58 lkaplan
8528 + * Added code for handling EOC messages
8530 + * Revision 1.89 2000/09/07 23:02:27 georgep
8531 + * Add HarwareAGC Bit to demod Capabilities
8533 + * Revision 1.88 2000/09/01 00:57:34 georgep
8534 + * Added Hardware AGC status defines
8536 + * Revision 1.87 2000/08/31 19:04:26 liang
8537 + * Added external reference for stack size requirement test functions.
8539 + * Revision 1.86 2000/08/24 23:16:46 liang
8540 + * Increased sample block size for noBlock.
8542 + * Revision 1.85 2000/08/23 18:34:39 ilyas
8543 + * Added XxxVcConfigure function
8545 + * Revision 1.84 2000/08/05 00:25:04 georgep
8546 + * Redefine sampling freq constants
8548 + * Revision 1.83 2000/08/03 14:04:00 liang
8549 + * Add hardware time tracking clock error reset code.
8551 + * Revision 1.82 2000/07/23 20:52:52 ilyas
8552 + * Added xxxFrameBufSetAddress() function for ATM framer layers
8553 + * Rearranged linkLayer functions in one structure which is passed as a
8554 + * parameter to xxxLinkLayerInit() function to be set there
8556 + * Revision 1.81 2000/07/18 20:03:24 ilyas
8557 + * Changed DslFrame functions definitions to macros,
8558 + * Removed gDslVars from their parameter list
8560 + * Revision 1.80 2000/07/17 21:08:15 lkaplan
8561 + * removed global pointer
8563 + * Revision 1.79 2000/06/21 20:38:44 georgep
8564 + * Added bit to demodCapabilities for HW_TIME_TRACKING
8566 + * Revision 1.78 2000/06/19 19:57:55 georgep
8567 + * Added constants for logging of HWResampler data
8569 + * Revision 1.77 2000/06/02 18:57:21 ilyas
8570 + * Added support for DSL buffers consisting of many ATM cells
8572 + * Revision 1.76 2000/05/27 02:19:28 liang
8573 + * G992MonitorParams structure is moved here, and Tx/Rx data handler type definitions changed.
8575 + * Revision 1.75 2000/05/15 18:17:21 liang
8576 + * Added statuses for sent and received frames
8578 + * Revision 1.74 2000/05/14 01:56:38 ilyas
8579 + * Added ATM cell printouts
8581 + * Revision 1.73 2000/05/09 23:00:26 ilyas
8582 + * Added ATM status messages, ATM timer, Tx frames flush on timeout
8583 + * Fixed a bug - adding flushed Tx frames to the list of free Rx frames
8585 + * Revision 1.72 2000/05/03 18:01:18 georgep
8586 + * Removed old function declarations for Eoc/Aoc
8588 + * Revision 1.71 2000/05/03 03:57:04 ilyas
8589 + * Added LOG file support for writing ATM data
8591 + * Revision 1.70 2000/05/02 00:04:36 liang
8592 + * Add showtime monitoring and message exchange info constants.
8594 + * Revision 1.69 2000/04/28 23:34:20 yongbing
8595 + * Add constants for reporting error events in performance monitoring
8597 + * Revision 1.68 2000/04/21 23:09:04 liang
8598 + * Added G992 time out training progress constant.
8600 + * Revision 1.67 2000/04/19 00:31:47 ilyas
8601 + * Added global SoftDsl functions for Vc, added OOB info functions
8603 + * Revision 1.66 2000/04/18 00:45:31 yongbing
8604 + * Add G.DMT new frame structure, define G992P1_NEWFRAME to enable, need ATM layer to work
8606 + * Revision 1.65 2000/04/15 01:48:34 georgep
8607 + * Added T1p413 status constants
8609 + * Revision 1.64 2000/04/13 08:36:22 yura
8610 + * Added SoftDslSetRefData, SoftDslGetRefData functions
8612 + * Revision 1.63 2000/04/13 05:42:35 georgep
8613 + * Added constant for T1p413
8615 + * Revision 1.62 2000/04/05 21:49:54 liang
8618 + * Revision 1.61 2000/04/04 04:16:06 liang
8619 + * Merged with SoftDsl_0_03 from old tree.
8621 + * Revision 1.65 2000/04/04 01:47:21 ilyas
8622 + * Implemented abstract dslFrame and dslFrameBuffer objects
8624 + * Revision 1.64 2000/04/01 08:12:10 yura
8625 + * Added preliminary revision of the SoftDsl driver architecture
8627 + * Revision 1.63 2000/04/01 02:55:33 georgep
8628 + * New defines for G992p2Profile Structure
8630 + * Revision 1.62 2000/04/01 00:50:36 yongbing
8631 + * Add initial version of new frame structure for full-rate
8633 + * Revision 1.61 2000/03/24 03:30:45 georgep
8634 + * Define new constant kDslUpstreamSamplingFreq
8636 + * Revision 1.60 2000/03/23 19:51:30 georgep
8637 + * Define new features bits for G992p1
8639 + * Revision 1.59 2000/03/18 01:28:41 georgep
8640 + * Changed connectionSetup to include G992p1 Capabilities
8642 + * Revision 1.58 2000/02/29 01:40:03 georgep
8643 + * Changed modulationtype defines to be the same as SPAR1 in G994p1
8645 + * Revision 1.57 1999/11/19 01:03:19 george
8646 + * Use Block Size 256 for single symbol Mode
8648 + * Revision 1.56 1999/11/18 02:37:43 george
8649 + * Porting to 16Bit
8651 + * Revision 1.55 1999/11/12 02:12:55 george
8652 + * Added status constant for reporting of profile channel matching calculation
8654 + * Revision 1.54 1999/11/11 19:19:42 george
8655 + * Porting to 16Bit Compiler
8657 + * Revision 1.53 1999/11/05 01:27:06 liang
8658 + * Add recovery-from-inpulse-noise progress report.
8660 + * Revision 1.52 1999/11/02 02:06:27 george
8661 + * Added SNRMargin training status value
8663 + * Revision 1.51 1999/10/27 23:02:03 wan
8664 + * Add G.994.1 setup in dslConnectionSetupStruct for setting up Initiation side
8666 + * Revision 1.50 1999/10/25 21:55:36 liang
8667 + * Renamed the constant for FEQ output error.
8669 + * Revision 1.49 1999/10/23 02:20:55 george
8670 + * Add debug data codes
8672 + * Revision 1.48 1999/10/19 23:59:06 liang
8673 + * Change line handler interface to work with nonsymmetric sampling freq.
8675 + * Revision 1.47 1999/10/09 01:38:04 george
8676 + * Define maxProfileNumber
8678 + * Revision 1.46 1999/10/07 23:30:51 wan
8679 + * Add G.994.1 Tone and Fast Retrain Recov detections in G.992p2 SHOWTIME and Fast Retrain
8681 + * Revision 1.45 1999/10/06 13:59:27 liang
8682 + * Escape to G994.1 should be done through status instead of command.
8684 + * Revision 1.44 1999/10/06 02:01:28 george
8685 + * Add kDslReturnToG994p1Cmd
8687 + * Revision 1.43 1999/09/30 19:29:58 george
8688 + * Add reporting constant for Fast Retrain
8690 + * Revision 1.42 1999/09/16 23:41:56 liang
8691 + * Added command for host forced retrain.
8693 + * Revision 1.41 1999/08/20 00:47:25 wan
8694 + * Add constants for Fast Retrain progress status
8696 + * Revision 1.40 1999/08/16 18:06:01 wan
8697 + * Add more reporting constants for Fast Retrain
8699 + * Revision 1.39 1999/08/12 00:18:10 wan
8700 + * Add several Fast Retrain Status constants
8702 + * Revision 1.38 1999/08/10 18:25:38 george
8703 + * Define constants used for Fast Retrain
8705 + * Revision 1.37 1999/07/31 01:47:43 george
8706 + * Add status constants for eoc/aoc
8708 + * Revision 1.36 1999/07/27 18:19:52 george
8709 + * declare aoc/eoc functions
8711 + * Revision 1.35 1999/07/19 22:44:47 george
8712 + * Add constants for G994p1 Message Exchange
8714 + * Revision 1.34 1999/07/16 02:03:03 liang
8715 + * Modified Dsl link layer command spec structure.
8717 + * Revision 1.33 1999/07/14 22:53:16 george
8718 + * Add Constants for G994p1
8720 + * Revision 1.32 1999/07/13 00:02:26 liang
8721 + * Added more feature bits.
8723 + * Revision 1.31 1999/07/09 01:58:14 wan
8724 + * Added more constants G.994.1 testing reports
8726 + * Revision 1.30 1999/07/07 23:51:04 liang
8727 + * Added rcv power and loop attenuation reports.
8729 + * Revision 1.29 1999/07/06 21:32:01 liang
8730 + * Added some aux. feature bits, and field performanceMargin was changed to noiseMargin in Capabilities.
8732 + * Revision 1.28 1999/07/03 01:40:17 liang
8733 + * Redefined dsl command parameter list and added connection setup struct.
8735 + * Revision 1.27 1999/07/02 00:41:18 liang
8736 + * Add bit and gain logging as well as rcv carrier range status.
8738 + * Revision 1.26 1999/06/25 21:37:10 wan
8739 + * Work in progress for G994.1.
8741 + * Revision 1.25 1999/06/16 00:54:36 liang
8742 + * Added Tx/Rx SHOWTIME active training progress codes.
8744 + * Revision 1.24 1999/06/11 21:59:37 wan
8745 + * Added G994.1 fail status constant.
8747 + * Revision 1.23 1999/06/11 21:29:01 liang
8748 + * Constants for C/R-Msgs was changed to C/R-Msg.
8750 + * Revision 1.22 1999/06/08 02:49:42 liang
8751 + * Added SNR data logging.
8753 + * Revision 1.21 1999/06/07 21:05:08 liang
8754 + * Added more training status values.
8756 + * Revision 1.20 1999/05/22 02:18:26 liang
8757 + * More constant defines.
8759 + * Revision 1.19 1999/05/14 22:49:35 liang
8760 + * Added more status codes and debug data codes.
8762 + * Revision 1.18 1999/04/12 22:41:39 liang
8763 + * Work in progress.
8765 + * Revision 1.17 1999/04/01 20:28:07 liang
8766 + * Added RReverb detect event status.
8768 + * Revision 1.16 1999/03/26 03:29:54 liang
8769 + * Add DSL debug data constants.
8771 + * Revision 1.15 1999/03/08 21:58:00 liang
8772 + * Added more constant definitions.
8774 + * Revision 1.14 1999/03/02 01:49:36 liang
8775 + * Added more connection info codes.
8777 + * Revision 1.13 1999/03/02 00:25:55 liang
8778 + * Added DSL tx and rx data handler type definitions.
8780 + * Revision 1.12 1999/02/27 01:16:55 liang
8781 + * Increase allowable static memory size to a VERY large number for now.
8783 + * Revision 1.11 1999/02/25 00:24:06 liang
8784 + * Increased symbol block size to 16.
8786 + * Revision 1.10 1999/02/23 22:03:26 liang
8787 + * Increased maximal static memory size allowed.
8789 + * Revision 1.9 1999/02/17 02:39:21 ilyas
8790 + * Changes for NDIS
8792 + * Revision 1.8 1999/02/11 22:44:30 ilyas
8793 + * More definitions for ATM
8795 + * Revision 1.7 1999/02/10 01:56:38 liang
8796 + * Added hooks for G994.1 and G992.2.
8799 + *****************************************************************************/
8801 +#ifndef SoftDslHeader
8802 +#define SoftDslHeader
8804 +/* for builds in Linux/VxWorks CommEngine environment */
8805 +#if (defined(__KERNEL__) && !defined(LINUX_DRIVER)) || defined(VXWORKS) || defined(_WIN32_WCE) || defined(TARG_OS_RTEMS) || defined(_CFE_)
8806 +#include "AdslCoreDefs.h"
8808 +#include "Bcm6345_To_Bcm6348.h" /* File for 45->48 changes */
8811 +#ifndef SoftModemPh
8812 +#include "SoftModem.h"
8821 +** Type definitions
8825 +#if defined(ATM) || defined(DSL_PACKET)
8826 +#define DSL_LINKLAYER
8829 +#if defined(ATM_LAYER) || defined(DSL_PACKET_LAYER) || defined(G997_1_FRAMER)
8830 +#define DSL_FRAME_FUNCTIONS
8833 +#define FLD_OFFSET(type,fld) ((int)(void *)&(((type *)0)->fld))
8836 +#include "SoftAtmVc.h"
8838 +typedef struct _dslFrameBuffer
8840 + struct _dslFrameBuffer *next; /* link to the next buffer in the frame */
8841 + void *pData; /* pointer to data */
8842 + ulong length; /* size (in bytes) of data */
8845 +typedef struct _dslFrame
8847 + ulong Reserved[3];
8849 + ulong totalLength; /* total amount of data in the packet */
8850 + int bufCnt; /* buffer counter */
8851 + struct _dslFrameBuffer *head; /* first buffer in the chain */
8852 + struct _dslFrameBuffer *tail; /* last buffer in the chain */
8856 +/* VC types and parameters */
8858 +#define kDslVcAtm 1
8865 + atmVcParams atmParams;
8870 +** Assuming that dslVcParams.params is the first field in VC
8871 +** and RefData is the first field in dslVcParams.params
8874 +#define DslVcGetRefData(pVc) (*(void **) (pVc))
8876 +/* Frame OOB types */
8878 +#define kDslFrameAtm 1
8885 + atmOobPacketInfo atmInfo;
8887 + } dslOobFrameInfo;
8892 + ulong (SM_DECL *__DslFrameBufferGetLength) (dslFrameBuffer *fb);
8893 + void * (SM_DECL *__DslFrameBufferGetAddress) (dslFrameBuffer *fb);
8894 + void (SM_DECL *__DslFrameBufferSetLength) (dslFrameBuffer *fb, ulong l);
8895 + void (SM_DECL *__DslFrameBufferSetAddress) (dslFrameBuffer *fb, void *p);
8897 + void (SM_DECL *__DslFrameInit) (dslFrame *f);
8898 + ulong (SM_DECL *__DslFrameGetLength) (dslFrame *pFrame);
8899 + ulong (SM_DECL *__DslFrameGetBufCnt) (dslFrame *pFrame);
8900 + dslFrameBuffer * (SM_DECL *__DslFrameGetFirstBuffer) (dslFrame *pFrame);
8901 + dslFrameBuffer * (SM_DECL *__DslFrameGetNextBuffer) (dslFrameBuffer *pFrBuffer);
8902 + void (SM_DECL *__DslFrameSetNextBuffer) (dslFrameBuffer *pFrBuf, dslFrameBuffer *pFrBufNext);
8903 + dslFrameBuffer * (SM_DECL *__DslFrameGetLastBuffer) (dslFrame *pFrame);
8904 + void * (SM_DECL *__DslFrameGetLinkFieldAddress) (dslFrame *f);
8905 + dslFrame * (SM_DECL *__DslFrameGetFrameAddressFromLink) (void *lnk);
8907 + Boolean (SM_DECL *__DslFrameGetOobInfo) (dslFrame *f, dslOobFrameInfo *pOobInfo);
8908 + Boolean (SM_DECL *__DslFrameSetOobInfo) (dslFrame *f, dslOobFrameInfo *pOobInfo);
8910 + void (SM_DECL *__DslFrameEnqueBufferAtBack) (dslFrame *f, dslFrameBuffer *b);
8911 + void (SM_DECL *__DslFrameEnqueFrameAtBack) (dslFrame *fMain, dslFrame *f);
8912 + void (SM_DECL *__DslFrameEnqueBufferAtFront) (dslFrame *f, dslFrameBuffer *b);
8913 + void (SM_DECL *__DslFrameEnqueFrameAtFront) (dslFrame *fMain, dslFrame *f);
8914 + dslFrameBuffer * (SM_DECL *__DslFrameDequeBuffer) (dslFrame *pFrame);
8916 + void * (SM_DECL *__DslFrameAllocMemForFrames) (ulong frameNum);
8917 + void (SM_DECL *__DslFrameFreeMemForFrames) (void *hMem);
8918 + dslFrame * (SM_DECL *__DslFrameAllocFrame) (void *handle);
8919 + void (SM_DECL *__DslFrameFreeFrame) (void *handle, dslFrame *pFrame);
8920 + void * (SM_DECL *__DslFrameAllocMemForBuffers) (void **ppMemPool, ulong bufNum, ulong memSize);
8921 + void (SM_DECL *__DslFrameFreeMemForBuffers) (void *hMem, ulong memSize, void *pMemPool);
8922 + dslFrameBuffer * (SM_DECL *__DslFrameAllocBuffer) (void *handle, void *pMem, ulong length);
8923 + void (SM_DECL *__DslFrameFreeBuffer) (void *handle, dslFrameBuffer *pBuf);
8925 + /* for LOG file support */
8927 + ulong (SM_DECL *__DslFrame2Id)(void *handle, dslFrame *pFrame);
8928 + void * (SM_DECL *__DslFrameId2Frame)(void *handle, ulong frameId);
8929 + } dslFrameFunctions;
8931 +#define DslFrameDeclareFunctions( name_prefix ) \
8932 +extern ulong SM_DECL name_prefix##BufferGetLength(dslFrameBuffer *fb); \
8933 +extern void * SM_DECL name_prefix##BufferGetAddress(dslFrameBuffer *fb); \
8934 +extern void SM_DECL name_prefix##BufferSetLength(dslFrameBuffer *fb, ulong l); \
8935 +extern void SM_DECL name_prefix##BufferSetAddress(dslFrameBuffer *fb, void *p); \
8937 +extern void SM_DECL name_prefix##Init(dslFrame *f); \
8938 +extern ulong SM_DECL name_prefix##GetLength (dslFrame *pFrame); \
8939 +extern ulong SM_DECL name_prefix##GetBufCnt(dslFrame *pFrame); \
8940 +extern dslFrameBuffer * SM_DECL name_prefix##GetFirstBuffer(dslFrame *pFrame); \
8941 +extern dslFrameBuffer * SM_DECL name_prefix##GetNextBuffer(dslFrameBuffer *pFrBuffer); \
8942 +extern void SM_DECL name_prefix##SetNextBuffer(dslFrameBuffer *pFrBuf, dslFrameBuffer *pFrBufNext); \
8943 +extern dslFrameBuffer * SM_DECL name_prefix##GetLastBuffer(dslFrame *pFrame); \
8944 +extern void * SM_DECL name_prefix##GetLinkFieldAddress(dslFrame *f); \
8945 +extern Boolean SM_DECL name_prefix##GetOobInfo(dslFrame *f, dslOobFrameInfo *pOobInfo); \
8946 +extern Boolean SM_DECL name_prefix##SetOobInfo(dslFrame *f, dslOobFrameInfo *pOobInfo); \
8947 +extern dslFrame* SM_DECL name_prefix##GetFrameAddressFromLink(void *lnk); \
8948 +extern void SM_DECL name_prefix##EnqueBufferAtBack(dslFrame *f, dslFrameBuffer *b); \
8949 +extern void SM_DECL name_prefix##EnqueFrameAtBack(dslFrame *fMain, dslFrame *f); \
8950 +extern void SM_DECL name_prefix##EnqueBufferAtFront(dslFrame *f, dslFrameBuffer *b); \
8951 +extern void SM_DECL name_prefix##EnqueFrameAtFront(dslFrame *fMain, dslFrame *f); \
8952 +extern dslFrameBuffer * SM_DECL name_prefix##DequeBuffer(dslFrame *pFrame); \
8954 +extern void * SM_DECL name_prefix##AllocMemForFrames(ulong frameNum); \
8955 +extern void SM_DECL name_prefix##FreeMemForFrames(void *hMem); \
8956 +extern dslFrame * SM_DECL name_prefix##AllocFrame(void *handle); \
8957 +extern void SM_DECL name_prefix##FreeFrame(void *handle, dslFrame *pFrame); \
8958 +extern void * SM_DECL name_prefix##AllocMemForBuffers(void **ppMemPool, ulong bufNum, ulong memSize); \
8959 +extern void SM_DECL name_prefix##FreeMemForBuffers(void *hMem, ulong memSize, void *pMemPool); \
8960 +extern dslFrameBuffer * SM_DECL name_prefix##AllocBuffer(void *handle, void *pMem, ulong length); \
8961 +extern void SM_DECL name_prefix##FreeBuffer(void *handle, dslFrameBuffer *pBuf); \
8962 +extern ulong SM_DECL name_prefix##2Id(void *handle, dslFrame *pFrame); \
8963 +extern void * SM_DECL name_prefix##Id2Frame(void *handle, ulong frameId);
8966 +#define DslFrameAssignFunctions( var, name_prefix ) do { \
8967 + (var).__DslFrameBufferGetLength = name_prefix##BufferGetLength; \
8968 + (var).__DslFrameBufferGetAddress= name_prefix##BufferGetAddress; \
8969 + (var).__DslFrameBufferSetLength = name_prefix##BufferSetLength; \
8970 + (var).__DslFrameBufferSetAddress= name_prefix##BufferSetAddress; \
8972 + (var).__DslFrameInit = name_prefix##Init; \
8973 + (var).__DslFrameGetLength = name_prefix##GetLength; \
8974 + (var).__DslFrameGetBufCnt = name_prefix##GetBufCnt; \
8975 + (var).__DslFrameGetFirstBuffer = name_prefix##GetFirstBuffer; \
8976 + (var).__DslFrameGetNextBuffer = name_prefix##GetNextBuffer; \
8977 + (var).__DslFrameSetNextBuffer = name_prefix##SetNextBuffer; \
8978 + (var).__DslFrameGetLastBuffer = name_prefix##GetLastBuffer; \
8979 + (var).__DslFrameGetLinkFieldAddress = name_prefix##GetLinkFieldAddress; \
8980 + (var).__DslFrameGetFrameAddressFromLink = name_prefix##GetFrameAddressFromLink; \
8982 + (var).__DslFrameGetOobInfo = name_prefix##GetOobInfo; \
8983 + (var).__DslFrameSetOobInfo = name_prefix##SetOobInfo; \
8985 + (var).__DslFrameEnqueBufferAtBack = name_prefix##EnqueBufferAtBack; \
8986 + (var).__DslFrameEnqueFrameAtBack = name_prefix##EnqueFrameAtBack; \
8987 + (var).__DslFrameEnqueBufferAtFront= name_prefix##EnqueBufferAtFront; \
8988 + (var).__DslFrameEnqueFrameAtFront = name_prefix##EnqueFrameAtFront; \
8989 + (var).__DslFrameDequeBuffer = name_prefix##DequeBuffer; \
8991 + (var).__DslFrameAllocMemForFrames = name_prefix##AllocMemForFrames; \
8992 + (var).__DslFrameFreeMemForFrames = name_prefix##FreeMemForFrames; \
8993 + (var).__DslFrameAllocFrame = name_prefix##AllocFrame; \
8994 + (var).__DslFrameFreeFrame = name_prefix##FreeFrame; \
8995 + (var).__DslFrameAllocMemForBuffers= name_prefix##AllocMemForBuffers; \
8996 + (var).__DslFrameFreeMemForBuffers = name_prefix##FreeMemForBuffers; \
8997 + (var).__DslFrameAllocBuffer = name_prefix##AllocBuffer; \
8998 + (var).__DslFrameFreeBuffer = name_prefix##FreeBuffer; \
9000 + (var).__DslFrame2Id = name_prefix##2Id; \
9001 + (var).__DslFrameId2Frame = name_prefix##Id2Frame; \
9015 +#ifdef G992P1_NEWFRAME
9023 + } G992MonitorParams;
9033 + directionType direction;
9035 +#ifdef G992P1_NEWFRAME
9041 + uchar AS0BF, AS1BF, AS2BF, AS3BF, AEXAF;
9043 + uchar AS1BI, AS2BI, AS3BI, AEXAI;
9045 + uchar LS0CF, LS1BF, LS2BF, LEXLF;
9046 + uchar LS0CI, LS1BI, LS2BI, LEXLI;
9048 + uchar mergedModeEnabled;
9052 + } G992CodingParams;
9067 + } G992p3CodingParams;
9069 +/* Power Management Message definitions (used in command and status) */
9085 +/* Power Management commands and responses */
9087 +#define kPwrSimpleRequest 1
9088 +#define kPwrL2Request 2
9089 +#define kPwrL2TrimRequest 3
9091 +#define kPwrGrant 0x80
9092 +#define kPwrReject 0x81
9093 +#define kPwrL2Grant 0x82
9094 +#define kPwrL2Reject 0x83
9095 +#define kPwrL2TrimGrant 0x84
9096 +#define kPwrL2TrimReject 0x85
9097 +#define kPwrL2Grant2p 0x86
9099 +#define kPwrBusy 0x01
9100 +#define kPwrInvalid 0x02
9101 +#define kPwrNotDesired 0x03
9102 +#define kPwrInfeasibleParam 0x04
9104 +/* Power Management reason codes */
9106 +/* OLR definitions (used in command and status) */
9114 + void *carrParamPtr;
9122 + } dslOLRCarrParam;
9129 + } dslOLRCarrParam2p;
9133 +#define kOLRRequestType1 1
9134 +#define kOLRRequestType2 2
9135 +#define kOLRRequestType3 3
9136 +#define kOLRRequestType4 4
9137 +#define kOLRRequestType5 5
9138 +#define kOLRRequestType6 6
9140 +#define kOLRDeferType1 0x81
9141 +#define kOLRRejectType2 0x82
9142 +#define kOLRRejectType3 0x83
9144 +/* OLR reason codes */
9147 +#define kOLRInvalidParam 2
9148 +#define kOLRNotEnabled 3
9149 +#define kOLRNotSupported 4
9151 +/* common EOC definitions */
9152 +#define kG992EocStuffingByte 0x0C
9154 +/* showtime monitor counters */
9155 +#define kG992ShowtimeRSCodewordsRcved 0 /* number of Reed-Solomon codewords received */
9156 +#define kG992ShowtimeRSCodewordsRcvedOK 1 /* number of Reed-Solomon codewords received with all symdromes zero */
9157 +#define kG992ShowtimeRSCodewordsRcvedCorrectable 2 /* number of Reed-Solomon codewords received with correctable errors */
9158 +#define kG992ShowtimeRSCodewordsRcvedUncorrectable 3 /* number of Reed-Solomon codewords received with un-correctable errors */
9159 +#define kG992ShowtimeSuperFramesRcvd 4 /* number of super frames received */
9160 +#define kG992ShowtimeSuperFramesRcvdWrong 5 /* number of super frames received with CRC error */
9161 +#define kG992ShowtimeLastUncorrectableRSCount 6 /* last recorded value for kG992ShowtimeRSCodewordsRcvedUncorrectable */
9162 +#define kG992ShowtimeLastWrongSuperFrameCount 7 /* last recorded value for kG992ShowtimeSuperFramesRcvdWrong */
9163 +#define kG992ShowtimeNumOfShortResync 8 /* number of short interrupt recoveries by FEQ */
9165 +#define kG992ShowtimeNumOfFEBE 9 /* number of other side superframe errors */
9166 +#define kG992ShowtimeNumOfFECC 10 /* number of other side superframe FEC errors */
9167 +#define kG992ShowtimeNumOfFHEC 11 /* number of far-end ATM header CRC errors */
9168 +#define kG992ShowtimeNumOfFOCD 12 /* number of far-end OCD events */
9169 +#define kG992ShowtimeNumOfFLCD 13 /* number of far-end LCD events */
9170 +#define kG992ShowtimeNumOfHEC 14 /* number of ATM header CRC errors */
9171 +#define kG992ShowtimeNumOfOCD 15 /* number of OCD events */
9172 +#define kG992ShowtimeNumOfLCD 16 /* number of LCD events */
9174 +#define kG992ShowtimeNumOfMonitorCounters (kG992ShowtimeNumOfLCD+1) /* always last number + 1 */
9175 +#define kG992ShowtimeMonitorReportNumber 9
9177 +#define kG992ShowtimeLCDNumShift 1
9178 +#define kG992ShowtimeLCDFlag 1
9180 +typedef int (SM_DECL *dslFrameHandlerType) (void *gDslVars, void *pVc, ulong mid, dslFrame *);
9182 +typedef void* (SM_DECL *dslHeaderHandlerType) (void *gDslVars, ulong hdr, uchar hdrHec);
9183 +typedef void* (SM_DECL *dslTxFrameBufferHandlerType) (void *gDslVars, int*, void*);
9184 +typedef void* (SM_DECL *dslRxFrameBufferHandlerType) (void *gDslVars, int, void*);
9186 +typedef void* (SM_DECL *dslVcAllocateHandlerType) (void *gDslVars, void *);
9187 +typedef void (SM_DECL *dslVcFreeHandlerType) (void *gDslVars, void *);
9188 +typedef Boolean (SM_DECL *dslVcActivateHandlerType) (void *gDslVars, void *);
9189 +typedef void (SM_DECL *dslVcDeactivateHandlerType) (void *gDslVars, void *);
9190 +typedef Boolean (SM_DECL *dslVcConfigureHandlerType) (void *gDslVars, void *pVc, ulong mid, void *);
9192 +typedef ulong (SM_DECL *dslLinkVc2IdHandlerType) (void *gDslVars, void *);
9193 +typedef void* (SM_DECL *dslLinkVcId2VcHandlerType) (void *gDslVars, ulong);
9194 +typedef void* (SM_DECL *dslGetFramePoolHandlerType) (void *gDslVars);
9196 +typedef void (SM_DECL *dslLinkCloseHandlerType) (void *gDslVars);
9197 +typedef int (SM_DECL *dslTxDataHandlerType)(void *gDslVars, int, int, uchar*, G992MonitorParams*);
9198 +typedef int (SM_DECL *dslRxDataHandlerType)(void *gDslVars, int, uchar*, G992MonitorParams*);
9200 +typedef void (SM_DECL *dslLinkStatusHandler) (void *gDslVars, ulong statusCode, ...);
9202 +typedef Boolean (SM_DECL *dslPhyInitType) (
9205 + dslHeaderHandlerType rxCellHeaderHandlerPtr,
9206 + dslRxFrameBufferHandlerType rxFrameHandlerPtr,
9207 + dslTxFrameBufferHandlerType txFrameHandlerPtr,
9208 + atmStatusHandler statusHandlerPtr);
9210 +struct _dslFramerBufDesc;
9212 +typedef Boolean (SM_DECL *dslFramerDataGetPtrHandlerType) (void *gDslVars, struct _dslFramerBufDesc *pBufDesc);
9213 +typedef void (SM_DECL *dslFramerDataDoneHandlerType) (void *gDslVars, struct _dslFramerBufDesc *pBufDesc);
9215 +typedef void (SM_DECL *dslDriverCallbackType) (void *gDslVars);
9221 + dslFramerDataGetPtrHandlerType rxDataGetPtrHandler;
9222 + dslFramerDataDoneHandlerType rxDataDoneHandler;
9223 + dslFramerDataGetPtrHandlerType txDataGetPtrHandler;
9224 + dslFramerDataDoneHandlerType txDataDoneHandler;
9225 + } dslPacketPhyFunctions;
9227 +typedef Boolean (SM_DECL *dslPacketPhyInitType) (
9230 + dslPacketPhyFunctions dslPhyFunctions,
9231 + dslLinkStatusHandler statusHandlerPtr);
9234 +#endif /* DSL_PACKET */
9237 +typedef int dslDirectionType;
9238 +typedef bitMap dslModulationType;
9239 +typedef bitMap dslLinkLayerType;
9247 +#define kDslEyeData eyeData
9249 +#define kDslLogComplete (inputSignalData - 1)
9250 +#define kDslLogInputData inputSignalData
9251 +#define kDslLogInputData1 (inputSignalData + 1)
9252 +#define kDslLogInputData2 (inputSignalData + 2)
9253 +#define kDslLogInputData3 (inputSignalData + 3)
9261 +typedef long dslStatusCode;
9262 +#define kFirstDslStatusCode 256
9263 +#define kDslError (kFirstDslStatusCode + 0)
9264 +#define kAtmStatus (kFirstDslStatusCode + 1)
9265 +#define kDslTrainingStatus (kFirstDslStatusCode + 2)
9266 +#define kDslConnectInfoStatus (kFirstDslStatusCode + 3)
9267 +#define kDslEscapeToG994p1Status (kFirstDslStatusCode + 4)
9268 +#define kDslFrameStatus (kFirstDslStatusCode + 5)
9269 +#define kDslReceivedEocCommand (kFirstDslStatusCode + 6)
9270 +#define kDslSendEocCommandDone (kFirstDslStatusCode + 7)
9271 +#define kDslSendEocCommandFailed (kFirstDslStatusCode + 8)
9272 +#define kDslWriteRemoteRegisterDone (kFirstDslStatusCode + 9)
9273 +#define kDslReadRemoteRegisterDone (kFirstDslStatusCode + 10)
9274 +#define kDslExternalError (kFirstDslStatusCode + 11)
9275 +#define kDslDspControlStatus (kFirstDslStatusCode + 12)
9276 +#define kDslATUHardwareAGCRequest (kFirstDslStatusCode + 13)
9277 +#define kDslPacketStatus (kFirstDslStatusCode + 14)
9278 +#define kDslG997Status (kFirstDslStatusCode + 15)
9279 +#define kDslPrintfStatus (kFirstDslStatusCode + 16)
9280 +#define kDslPrintfStatus1 (kFirstDslStatusCode + 17)
9281 +#define kDslExceptionStatus (kFirstDslStatusCode + 18)
9282 +#define kDslPingResponse (kFirstDslStatusCode + 19)
9283 +#define kDslShowtimeSNRMarginInfo (kFirstDslStatusCode + 20)
9284 +#define kDslGetOemParameter (kFirstDslStatusCode + 21)
9285 +#define kDslOemDataAddrStatus (kFirstDslStatusCode + 22)
9286 +#define kDslDataAvailStatus (kFirstDslStatusCode + 23)
9287 +/* #define kDslAtuChangeTxFilterRequest (kFirstDslStatusCode + 24) */
9288 +#define kDslTestPllPhaseResult (kFirstDslStatusCode + 25)
9290 +#define kDslHardwareAGCSetPga1 (kFirstDslStatusCode + 26)
9291 +#define kDslHardwareAGCDecPga1 (kFirstDslStatusCode + 27)
9292 +#define kDslHardwareAGCIncPga1 (kFirstDslStatusCode + 28)
9293 +#define kDslHardwareAGCSetPga2Delta (kFirstDslStatusCode + 29)
9295 +#define kDslOLRRequestStatus (kFirstDslStatusCode + 30)
9296 +#define kDslOLRResponseStatus (kFirstDslStatusCode + 31)
9297 +#define kDslOLRBitGainUpdateStatus (kFirstDslStatusCode + 32)
9298 +#define kDslPwrMgrStatus (kFirstDslStatusCode + 33)
9299 +#define kDslEscapeToT1p413Status (kFirstDslStatusCode + 34)
9301 +#define kDslHardwareAGCSetPga2 (kFirstDslStatusCode + 35)
9302 +#define kDslHardwareGetRcvAGC (kFirstDslStatusCode + 36)
9304 +#define kDslUpdateXmtReadPtr (kFirstDslStatusCode + 37)
9305 +#define kDslHardwareSetRcvAGC (kFirstDslStatusCode + 38)
9307 +#define kDslSetDigUsPwrCutback (kFirstDslStatusCode + 39)
9310 +#define kClientSideInitiation 0
9311 +#define kClientSideRespond 1
9312 +#define kCentralSideInitiation 2
9313 +#define kCentralSideRespond 3
9315 +/* OEM parameter ID definition */
9317 +#define kDslOemG994VendorId 1
9318 +#define kDslOemG994XmtNSInfo 2
9319 +#define kDslOemG994RcvNSInfo 3
9320 +#define kDslOemEocVendorId 4
9321 +#define kDslOemEocVersion 5
9322 +#define kDslOemEocSerNum 6
9323 +#define kDslOemT1413VendorId 7
9324 +#define kDslOemT1413EocVendorId 8
9326 +typedef long dslErrorCode;
9328 +typedef long atmStatusCode;
9329 +typedef long dslFramerStatusCode;
9331 +typedef long atmErrorCode;
9333 +typedef long dslTrainingStatusCode;
9335 +#define kDslStartedG994p1 0
9336 +#define kDslStartedT1p413HS 1
9338 +/* reserved for G.994.1: 1 ~ 8 */
9340 +#define kDslG994p1MessageDet 100
9341 +#define kDslG994p1ToneDet 101
9342 +#define kDslG994p1RToneDet 102
9343 +#define kDslG994p1FlagDet 103
9344 +#define kDslG994p1GalfDet 104
9345 +#define kDslG994p1ErrorFrameDet 105
9346 +#define kDslG994p1BadFrameDet 106
9347 +#define kDslG994p1SilenceDet 107
9348 +#define kDslG994p1RcvTimeout 108
9349 +#define kDslG994p1XmtFinished 109
9350 +#define kDslG994p1ReturntoStartup 110
9351 +#define kDslG994p1InitiateCleardown 111
9352 +#define kDslG994p1StartupFinished 112
9353 +#define kDslG994p1RcvNonStandardInfo 113
9354 +#define kDslG994p1XmtNonStandardInfo 114
9356 +#define kG994p1MaxNonstdMessageLength 64
9358 +#define kDslFinishedT1p413 1100
9359 +#define kDslT1p413DetectedCTone 1101
9360 +#define kDslT1p413DetectedCAct 1102
9361 +#define kDslT1p413DetectedCReveille 1103
9362 +#define kDslT1p413DetectedRActReq 1104
9363 +#define kDslT1p413DetectedRQuiet1 1105
9364 +#define kDslT1p413DetectedRAct 1106
9365 +#define kDslT1p413TimeoutCReveille 1107
9366 +#define kDslT1p413ReturntoStartup 1108
9368 +#define kDslG994p1Timeout 8
9369 +#define kDslFinishedG994p1 9
9370 +#define kDslStartedG992p2Training 10
9371 +#define kDslG992p2DetectedPilotSymbol 11
9372 +#define kDslG992p2DetectedReverbSymbol 12
9373 +#define kDslG992p2TEQCalculationDone 13
9374 +#define kDslG992p2TrainingFEQ 14
9375 +#define kDslG992p2Phase3Started 15
9376 +#define kDslG992p2ReceivedRates1 16
9377 +#define kDslG992p2ReceivedMsg1 17
9378 +#define kDslG992p2Phase4Started 18
9379 +#define kDslG992p2ReceivedRatesRA 19
9380 +#define kDslG992p2ReceivedMsgRA 20
9381 +#define kDslG992p2ReceivedRates2 21
9382 +#define kDslG992p2ReceivedMsg2 22
9383 +#define kDslG992p2ReceivedBitGainTable 23
9384 +#define kDslG992p2TxShowtimeActive 24
9385 +#define kDslG992p2RxShowtimeActive 25
9386 +#define kDslG992p2TxAocMessage 26
9387 +#define kDslG992p2RxAocMessage 27
9388 +#define kDslG992p2TxEocMessage 28
9389 +#define kDslG992p2RxEocMessage 29
9390 +#define kDslFinishedG992p2Training 30
9391 +#define kDslRecoveredFromImpulseNoise 31
9392 +#define kDslG992Timeout 32
9393 +#define kDslT1p413Isu1SglByteSymDetected 33 /* detected T1.413 Issue 1 single byte per symbol mode */
9394 +#define kDslG992RxPrefixOnInAFewSymbols 34
9395 +#define kDslG992TxPrefixOnInAFewSymbols 35
9396 +#define kDslAnnexCXmtCPilot1Starting 36
9397 +#define kDslXmtToRcvPathDelay 37
9398 +#define kDslFeaturesUnsupported 38
9399 +#define kDslG992RcvMsgCrcError 39
9400 +#define kDslAnnexCDetectedStartHyperframe 40
9402 +#define kDslG992AnnexCTimeoutCPilot1Detection 41
9403 +#define kDslG992AnnexCTimeoutCReverb1Detection 42
9404 +#define kDslG992AnnexCTimeoutECTraining 43
9405 +#define kDslG992AnnexCTimeoutHyperframeDetector 44
9406 +#define kDslG992AnnexCTimeoutSendRSegue2 45
9407 +#define kDslG992AnnexCTimeoutDetectCSegue1 46
9408 +#define kDslG992AnnexCAlignmentErrDetected 47
9409 +#define kDslG992AnnexCTimeoutSendRSegueRA 48
9410 +#define kDslG992AnnexCTimeoutSendRSegue4 49
9411 +#define kDslG992AnnexCTimeoutCSegue2Detection 50
9412 +#define kDslG992AnnexCTimeoutCSegue3Detection 51
9413 +/* Progress report for fast retrain */
9415 +#define kG994p1EventToneDetected 54
9416 +#define kDslG992p2RcvVerifiedBitAndGain 55
9417 +#define kDslG992p2ProfileChannelResponseCalc 56
9418 +#define kDslG992AnnexCTotalFEXTBits 57
9419 +#define kDslG992AnnexCTotalNEXTBits 58
9420 +#define kDslG992AnnexCTotalFEXTCarrs 59
9421 +#define kDslG992AnnexCTotalNEXTCarrs 60
9423 +#define kDslG992p3ReceivedMsgFmt 61
9424 +#define kDslG992p3ReceivedMsgPcb 62
9426 +#define kDslG992p3AnnexLMode 63
9428 +/* performance monitoring report */
9430 +#define kG992DataRcvDetectFastRSCorrection 70
9431 +#define kG992DataRcvDetectInterleaveRSCorrection 71
9432 +#define kG992DataRcvDetectFastCRCError 72
9433 +#define kG992DataRcvDetectInterleaveCRCError 73
9434 +#define kG992DataRcvDetectFastRSError 74
9435 +#define kG992DataRcvDetectInterleaveRSError 75
9436 +#define kG992DataRcvDetectLOS 76
9437 +#define kG992DecoderDetectRDI 77
9438 +#define kG992DataRcvDetectLOSRecovery 78
9439 +#define kG992AtmDetectHEC 79
9440 +#define kG992AtmDetectOCD 180
9441 +#define kG992AtmDetectCD 181
9442 +#define kG992DecoderDetectRemoteLOS 182
9443 +#define kG992DecoderDetectRemoteLOSRecovery 183
9444 +#define kG992DecoderDetectRemoteRDI 184
9445 +#define kG992DecoderDetectRemoteRDIRecovery 185
9446 +#define kG992RcvDetectSyncSymbolOffset 186
9447 +#define kG992Upstream2xIfftDisabled 187
9448 +#if defined(G992P5)
9449 +#define kDslG992RunAnnexaP3ModeInAnnexaP5 188 /* run Annex C mode in Annex I compiled codes */
9451 +#define kDslG992RunAnnexCModeInAnnexI 188 /* run Annex C mode in Annex I compiled codes */
9454 +/* OLR PHY status */
9456 +#define kG992EventSynchSymbolDetected 189
9457 +#define kG992EventReverseSynchSymbolDetected 190
9458 +#define kG992EventL2CReverbSymbolDetected 191
9459 +#define kG992EventL2CSegueSymbolDetected 192
9462 +#define kG992EnableAnnexM 191
9464 +#define kDslAtuChangeTxFilterRequest 192
9466 +/* detailed error messages reports */
9468 +#define kDslG992XmtRReverbRAOver4000 80
9469 +#define kDslG992XmtRReverb5Over4000 81
9470 +#define kDslG992RcvCSegue2Failed 82
9471 +#define kDslG992RcvCSegueRAFailed 83
9472 +#define kDslG992RcvCSegue3Failed 84
9473 +#define kDslG992RcvShowtimeStartedTooLate 85
9474 +#define kDslG992XmtRReverb3Over4000 86
9475 +#define kDslG992RcvFailDetCSegue1InWindow 87
9476 +#define kDslG992RcvCPilot1Failed 88
9477 +#define kDslG992RcvCReverb1Failed 89
9478 +#define kG992ControlAllRateOptionsFailedErr 90
9479 +#define kG992ControlInvalidRateOptionErr 91
9480 +#define kDslG992XmtInvalidXmtDErr 92
9481 +#define kDslG992BitAndGainCalcFailed 93
9482 +#define kDslG992BitAndGainVerifyFailed 94
9484 +#define kDslT1p413RetrainToUseCorrectRAck 95
9485 +#define kDslUseAlternateTxFilter 96
9486 +#define kDslT1p413RetrainToUseCorrectIFFT 97
9488 +typedef long dslConnectInfoStatusCode;
9489 +#define kG992p2XmtToneOrderingInfo 0
9490 +#define kG992p2RcvToneOrderingInfo 1
9491 +#define kG992p2XmtCodingParamsInfo 2
9492 +#define kG992p2RcvCodingParamsInfo 3
9493 +#define kG992p2TrainingRcvCarrEdgeInfo 4
9494 +#define kG992ShowtimeMonitoringStatus 5
9495 +#define kG992MessageExchangeRcvInfo 6
9496 +#define kG992MessageExchangeXmtInfo 7
9497 +#define kG994MessageExchangeRcvInfo 8
9498 +#define kG994MessageExchangeXmtInfo 9
9500 +#define kDslATURClockErrorInfo 10
9501 +#define kDslATURcvPowerInfo 11
9502 +#define kDslATUAvgLoopAttenuationInfo 12
9503 +#define kDslHWTimeTrackingResetClockError 13
9504 +#define kDslHWTimeTrackingClockTweak 14
9505 +#define kDslATUHardwareAGCObtained 15
9506 +#define kDslTEQCoefInfo 16
9507 +#define kDslRcvCarrierSNRInfo 17
9508 +#define kDslMaxReceivableBitRateInfo 18
9509 +#define kDslHWSetDigitalEcUpdateMode 19
9510 +#define kDslHWEnableDigitalECUpdate 20
9511 +#define kDslHWDisableDigitalECUpdate 21
9512 +#define kDslHWEnableDigitalEC 22
9513 +#define kDslHWSetDigitalEcGainShift 23
9514 +#define kDslHWSetDigitalEcUpdateShift 24
9515 +#define kDslRcvPsdInfo 25
9516 +#define kDslHWdcOffsetInfo 26
9517 +#define kG994SelectedG994p1CarrierIndex 27
9518 +#define kDslSelectedTimingTone 28
9520 +#define kDslHWEnableAnalogECUpdate kDslHWSetDigitalEcUpdateMode
9521 +#define kDslHWEnableAnalogEC kDslHWDisableDigitalECUpdate
9523 +#define kG992AocMessageExchangeRcvInfo 29
9524 +#define kG992AocMessageExchangeXmtInfo 30
9525 +#define kG992AocBitswapTxStarted 31
9526 +#define kG992AocBitswapRxStarted 32
9527 +#define kG992AocBitswapTxCompleted 33
9528 +#define kG992AocBitswapRxCompleted 34
9529 +#define kDslChannelResponseLog 35
9530 +#define kDslChannelResponseLinear 36
9531 +#define kDslChannelQuietLineNoise 37
9533 +#define kDslATUCXmtPowerCutbackInfo 40
9534 +#define kDslATURXmtPowerCutbackInfo 41
9535 +#define kDslATUCXmtPowerInfo 42
9536 +#define kDslATURXmtPowerInfo 43
9538 +#define kDslFramingModeInfo 50
9539 +#define kDslG992VendorID 51
9542 +#define kDslHWSetRcvFir2OutputScale 52
9545 +#define kDslSignalAttenuation 53
9546 +#define kDslAttainableNetDataRate 54
9547 +#define kDslHLinScale 55
9549 +#define kG992p3XmtCodingParamsInfo 60
9550 +#define kG992p3RcvCodingParamsInfo 61
9551 +#define kG992p3PwrStateInfo 62
9552 +#define kG992PilotToneInfo 63
9554 +#define kDslSetPilotEyeDisplay 64
9556 +#define kDslAturHwAgcResolutionMask (0xFFFFFFF8)
9557 +#define kDslAturHwAgcMinGain ((-12)<<4)
9558 +#ifndef BCM6348_SRC
9559 +#define kDslAturHwAgcMaxGain (30<<4)
9561 +#define kDslAturHwAgcMaxGain (36<<4)
9564 +#define kDslFrameStatusSend 1
9565 +#define kDslFrameStatusSendComplete 2
9566 +#define kDslFrameStatusRcv 3
9567 +#define kDslFrameStatusReturn 4
9569 +typedef struct _dslFramerStatus
9571 + dslFramerStatusCode code;
9575 + dslErrorCode error;
9583 + long nRxFrameTotal;
9584 + long nRxFrameError;
9585 + long nTxFrameTotal;
9588 + } dslFramerStatus;
9592 + dslStatusCode code;
9596 + dslErrorCode error;
9599 + atmStatusCode code;
9603 + dslErrorCode error;
9615 + long nFrameErrors;
9622 + ulong fwdPeakCellTime;
9623 + ulong backPeakCellTime;
9645 + dslFramerStatus dslPacketStatus;
9647 +#ifdef G997_1_FRAMER
9648 + dslFramerStatus g997Status;
9652 + dslTrainingStatusCode code;
9654 + } dslTrainingInfo;
9657 + dslConnectInfoStatusCode code;
9663 + long maxMarginCarrier;
9664 + long maxSNRMargin;
9665 + long minMarginCarrier;
9666 + long minSNRMargin;
9667 + long avgSNRMargin;
9670 + } dslShowtimeSNRMarginInfo;
9696 + ulong nBlockErrors;
9699 + ulong nAudioBlocks;
9700 + ulong nAudioSyncErrors;
9701 + ulong nAudioBlockErrors;
9708 + } dslDataRegister;
9713 + } dslExternalError;
9716 + ulong numberOfCalls;
9717 + ulong txSignalChecksum;
9718 + ulong rxSignalChecksum;
9719 + ulong eyeDataChecksum;
9734 + } dslOemParameter;
9740 + dslOLRMessage dslOLRRequest;
9741 + dslPwrMessage dslPwrMsg;
9743 + } dslStatusStruct;
9745 +typedef void (SM_DECL *dslStatusHandlerType) (void *gDslVars, dslStatusStruct*);
9754 +typedef long dslCommandCode;
9755 +#define kFirstDslCommandCode 256
9756 +#define kDslIdleCmd (kFirstDslCommandCode + 0)
9757 +#define kDslIdleRcvCmd (kFirstDslCommandCode + 1)
9758 +#define kDslIdleXmtCmd (kFirstDslCommandCode + 2)
9759 +#define kDslStartPhysicalLayerCmd (kFirstDslCommandCode + 3)
9760 +#define kDslStartRetrainCmd (kFirstDslCommandCode + 4)
9761 +#define kDslSetFrameFunctions (kFirstDslCommandCode + 5)
9762 +#define kDslSendEocCommand (kFirstDslCommandCode + 6)
9763 +#define kDslWriteRemoteRegister (kFirstDslCommandCode + 7)
9764 +#define kDslReadRemoteRegister (kFirstDslCommandCode + 8)
9765 +#define kDslWriteLocalRegister (kFirstDslCommandCode + 9)
9766 +#define kDslReadLocalRegister (kFirstDslCommandCode + 10)
9767 +#define kDslStoreHardwareAGCCmd (kFirstDslCommandCode + 11)
9768 +#define kDslSetCommandHandlerCmd (kFirstDslCommandCode + 12)
9769 +#define kSetLinkLayerStatusHandlerCmd (kFirstDslCommandCode + 13)
9770 +#define kDslSetG997Cmd (kFirstDslCommandCode + 14)
9771 +#define kDslLoopbackCmd (kFirstDslCommandCode + 15)
9772 +#define kDslDiagSetupCmd (kFirstDslCommandCode + 16)
9773 +#define kDslSetDriverCallbackCmd (kFirstDslCommandCode + 17)
9774 +#define kDslDiagStopLogCmd (kFirstDslCommandCode + 18)
9775 +#define kDslDiagStartBERT (kFirstDslCommandCode + 19)
9776 +#define kDslDiagStopBERT (kFirstDslCommandCode + 20)
9777 +#define kDslPingCmd (kFirstDslCommandCode + 21)
9778 +#define kDslDyingGaspCmd (kFirstDslCommandCode + 22)
9779 +#define kDslTestCmd (kFirstDslCommandCode + 23)
9780 +#define kDslFilterSNRMarginCmd (kFirstDslCommandCode + 24)
9781 +#define kDslAtmVcMapTableChanged (kFirstDslCommandCode + 25)
9782 +#define kDslGetOemDataAddrCmd (kFirstDslCommandCode + 26)
9783 +#define kDslAtmReportHEC (kFirstDslCommandCode + 27)
9784 +#define kDslAtmReportCD (kFirstDslCommandCode + 28)
9785 +#define kDslSetXmtGainCmd (kFirstDslCommandCode + 29)
9786 +#define kDslSetStatusBufferCmd (kFirstDslCommandCode + 30)
9787 +#define kDslAfeTestCmd (kFirstDslCommandCode + 31)
9788 +#define kDslI432ResetCmd (kFirstDslCommandCode + 32)
9789 +#define kDslSetRcvGainCmd (kFirstDslCommandCode + 33)
9790 +#define kDslBypassRcvHpfCmd (kFirstDslCommandCode + 34)
9791 +#define kDslWriteAfeRegCmd (kFirstDslCommandCode + 35)
9792 +#define kDslReadAfeRegCmd (kFirstDslCommandCode + 36)
9793 +#define kDslOLRRequestCmd (kFirstDslCommandCode + 37)
9794 +#define kDslOLRResponseCmd (kFirstDslCommandCode + 38)
9795 +#define kDslI432SetScrambleCmd (kFirstDslCommandCode + 39)
9796 +#define kDslPwrMgrCmd (kFirstDslCommandCode + 40)
9797 +#define kDslAtmGfcMappingCmd (kFirstDslCommandCode + 41)
9800 +#define kDslEnablePwmSyncClk (kFirstDslCommandCode + 42)
9801 +#define kDslSetPwmSyncClkFreq (kFirstDslCommandCode + 43)
9804 +#define kG994p1Duplex 1
9805 +#define kG994p1HalfDuplex 2
9807 +/* Eoc Messages from ATU-C to ATU-R */
9808 +#define kDslEocHoldStateCmd 1
9809 +#define kDslEocReturnToNormalCmd 2
9810 +#define kDslEocPerformSelfTestCmd 3
9811 +#define kDslEocRequestCorruptCRCCmd 4
9812 +#define kDslEocRequestEndCorruptCRCCmd 5
9813 +#define kDslEocNotifyCorruptCRCCmd 6
9814 +#define kDslEocNotifyEndCorruptCRCCmd 7
9815 +#define kDslEocRequestTestParametersUpdateCmd 8
9816 +#define kDslEocGrantPowerDownCmd 9
9817 +#define kDslEocRejectPowerDownCmd 10
9819 +/* Eoc Messages from ATU-R to ATU-C */
9820 +#define kDslEocRequestPowerDownCmd 11
9821 +#define kDslEocDyingGaspCmd 12
9823 +/* Clear Eoc Messages */
9824 +#define kDslClearEocFirstCmd 100
9825 +#define kDslClearEocSendFrame 100
9826 +#define kDslClearEocSendComplete 101
9827 +#define kDslClearEocRcvedFrame 102
9828 +#define kDslClearEocSendComplete2 103
9830 +#define kDslClearEocMsgLengthMask 0xFFFF
9831 +#define kDslClearEocMsgNumMask 0xFF0000
9832 +#define kDslClearEocMsgDataVolatileMask 0x1000000
9833 +#define kDslClearEocMsgDataVolatile kDslClearEocMsgDataVolatileMask
9834 +#define kDslClearEocMsgExtraSendComplete 0x2000000
9836 +/* ADSL Link Power States */
9837 +#define kDslPowerFullOn 0
9838 +#define kDslPowerLow 1
9839 +#define kDslPowerIdle 3
9841 +/* ATU-R Data Registers */
9842 +#define kDslVendorIDRegister 1
9843 +#define kDslRevisionNumberRegister 2
9844 +#define kDslSerialNumberRegister 3
9845 +#define kDslSelfTestResultsRegister 4
9846 +#define kDslLineAttenuationRegister 5
9847 +#define kDslSnrMarginRegister 6
9848 +#define kDslAturConfigurationRegister 7
9849 +#define kDslLinkStateRegister 8
9851 +#define kDslVendorIDRegisterLength 8
9852 +#define kDslRevisionNumberRegisterLength 32
9853 +#define kDslSerialNumberRegisterLength 32
9854 +#define kDslSelfTestResultsRegisterLength 1
9855 +#define kDslLineAttenuationRegisterLength 1
9856 +#define kDslSnrMarginRegisterLength 1
9857 +#define kDslAturConfigurationRegisterLength 30
9858 +#define kDslLinkStateRegisterLength 1
9860 +/* Dsl Diags setup flags */
9861 +#define kDslDiagEnableEyeData 1
9862 +#define kDslDiagEnableLogData 2
9864 +/* Dsl test commands */
9865 +typedef long dslTestCmdType;
9866 +#define kDslTestBackToNormal 0
9867 +#define kDslTestReverb 1
9868 +#define kDslTestMedley 2
9869 +#define kDslTestToneSelection 3
9870 +#define kDslTestNoAutoRetrain 4
9871 +#define kDslTestMarginTweak 5
9872 +#define kDslTestEstimatePllPhase 6
9873 +#define kDslTestReportPllPhaseStatus 7
9874 +#define kDslTestAfeLoopback 8
9875 +#define kDslTestL3 9
9876 +#define kDslTestAdsl2DiagMode 10
9877 +#define kDslTestRetL0 11
9879 +/* Xmt gain default setting */
9880 +#define kDslXmtGainAuto 0x80000000
9882 +/* Unit (AFE) test commands */
9883 +#define kDslAfeTestLoadImage 0
9884 +#define kDslAfeTestPatternSend 1
9885 +#define kDslAfeTestLoadImageOnly 2
9886 +#define kDslAfeTestPhyRun 3
9887 +#define kDslAfeTestLoadBuffer 4
9891 +#if defined(G992P1_ANNEX_I) || defined(G992P5)
9892 + ushort downstreamMinCarr, downstreamMaxCarr;
9894 + uchar downstreamMinCarr, downstreamMaxCarr;
9896 + uchar upstreamMinCarr, upstreamMaxCarr;
9899 +#if defined(G992P3) && !defined(BCM6348_SRC)
9900 +#define FAST_TEXT_TYPE
9902 +#define FAST_TEXT_TYPE FAST_TEXT
9905 +#if defined(BCM6348_SRC)
9906 +#define BCM6348_TEMP_MOVE_TO_LMEM
9908 +#define BCM6348_TEMP_MOVE_TO_LMEM
9912 +#define PRINT_DEBUG_INFO
9914 +#define PRINT_DEBUG_INFO
9919 +#define kG992p3MaxSpectBoundsUpSize 16
9920 +#define kG992p3MaxSpectBoundsDownSize 16
9922 +/* G.994 definitions */
9924 +/*** Standard Info SPar2: G.992.3 Annex A Octet 1 ***/
9926 +#define kG994p1G992p3AnnexASpectrumBoundsUpstream 0x01
9927 +#define kG994p1G992p3AnnexASpectrumShapingUpstream 0x02
9928 +#define kG994p1G992p3AnnexASpectrumBoundsDownstream 0x04
9929 +#define kG994p1G992p3AnnexASpectrumShapingDownstream 0x08
9930 +#define kG994p1G992p3AnnexATxImageAboveNyquistFreq 0x10
9931 +#define kG994p1G992p3AnnexLReachExtended 0x20
9932 +#define kG994p1G992p3AnnexMSubModePSDMasks 0x20
9934 +#define kG994p1G992p3AnnexLUpNarrowband 0x02
9935 +#define kG994p1G992p3AnnexLUpWideband 0x01
9936 +#define kG994p1G992p3AnnexLDownNonoverlap 0x01
9938 +/*** Standard Info SPar2: G.992.3 Annex A Octet 2 ***/
9940 +#define kG994p1G992p3AnnexADownOverheadDataRate 0x01
9941 +#define kG994p1G992p3AnnexAUpOverheadDataRate 0x02
9942 +#define kG994p1G992p3AnnexAMaxNumberDownTPSTC 0x04
9943 +#define kG994p1G992p3AnnexAMaxNumberUpTPSTC 0x08
9945 +/*** Standard Info SPar2: G.992.3 Annex A Octet 3,5,7,9 ***/
9947 +#define kG994p1G992p3AnnexADownSTM_TPS_TC 0x01
9948 +#define kG994p1G992p3AnnexAUpSTM_TPS_TC 0x02
9949 +#define kG994p1G992p3AnnexADownATM_TPS_TC 0x04
9950 +#define kG994p1G992p3AnnexAUpATM_TPS_TC 0x08
9951 +#define kG994p1G992p3AnnexADownPTM_TPS_TC 0x10
9952 +#define kG994p1G992p3AnnexAUpPTM_TPS_TC 0x20
9954 +/*** Standard Info SPar2: G.992.3 Annex A Octet 4,6,8,10 ***/
9956 +#define kG994p1G992p3AnnexADownPMS_TC_Latency 0x01
9957 +#define kG994p1G992p3AnnexAUpPMS_TC_Latency 0x02
9962 + * TSSI information is specified in 2 parts: subcarrier index,
9963 + * tssi value, and an indication of whether or no the tone specified
9964 + * is part of the supported set.
9966 + * The subcarrier index information is currently stored in the
9967 + * dsSubcarrierIndex array defined below. The tssi value are stored
9968 + * in the dsLog_tss array.
9970 + * The subcarrier index information only occupies the lower 12 bits
9971 + * of the available 16 bits (short type). Therefore, we will pack the
9972 + * supported set information in bit 15.
9974 +#define kG992DsSubCarrierIndexMask (0x0fff) /* AND mask to ectract ds subcarrier index */
9975 +#define kG992DsSubCarrierSuppSetMask (0x8000) /* AND mask to extract supported set indication */
9977 +#define G992GetDsSubCarrierIndex(arg) ((arg) & kG992DsSubCarrierIndexMask)
9978 +#define G992GetDsSubCarrierSuppSetIndication(arg) (((arg) & kG992DsSubCarrierSuppSetMask) >> 15)
9980 +/* Caution: Do not change anything in this structure definition, including associated constant */
9981 +/* This structure definition is used only by the driver and any change impose incompatibility issue in driver */
9982 +/* The structure following this structure (g992p3PhyDataPumpCapabilities) can be changed in PHY application */
9986 + Boolean rcvNTREnabled, shortInitEnabled, diagnosticsModeEnabled;
9988 + char featureSpectrum, featureOverhead;
9989 + char featureTPS_TC[4], featurePMS_TC[4];
9991 + short rcvNOMPSDus, rcvMAXNOMPSDus, rcvMAXNOMATPus;
9992 + short usSubcarrierIndex[kG992p3MaxSpectBoundsUpSize],
9993 + usLog_tss[kG992p3MaxSpectBoundsUpSize];
9994 + short numUsSubcarrier;
9995 + short rcvNOMPSDds, rcvMAXNOMPSDds, rcvMAXNOMATPds;
9996 + short dsSubcarrierIndex[kG992p3MaxSpectBoundsDownSize],
9997 + dsLog_tss[kG992p3MaxSpectBoundsDownSize];
9998 + short numDsSubcarrier;
9999 + uchar sizeIDFT, fillIFFT;
10000 + uchar readsl2Upstream, readsl2Downstream;
10001 + uchar minDownOverheadDataRate, minUpOverheadDataRate;
10002 + uchar maxDownSTM_TPSTC, maxDownATM_TPSTC, maxDownPTM_TPSTC;
10003 + uchar maxUpSTM_TPSTC, maxUpATM_TPSTC, maxUpPTM_TPSTC;
10005 + short minDownSTM_TPS_TC[4], maxDownSTM_TPS_TC[4],
10006 + minRevDownSTM_TPS_TC[4], maxDelayDownSTM_TPS_TC[4];
10007 + uchar maxErrorDownSTM_TPS_TC[4], minINPDownSTM_TPS_TC[4];
10008 + short minUpSTM_TPS_TC[4], maxUpSTM_TPS_TC[4],
10009 + minRevUpSTM_TPS_TC[4], maxDelayUpSTM_TPS_TC[4];
10010 + uchar maxErrorUpSTM_TPS_TC[4], minINPUpSTM_TPS_TC[4];
10012 + short maxDownPMS_TC_Latency[4], maxUpPMS_TC_Latency[4];
10013 + short maxDownR_PMS_TC_Latency[4], maxDownD_PMS_TC_Latency[4];
10014 + short maxUpR_PMS_TC_Latency[4], maxUpD_PMS_TC_Latency[4];
10016 + short minDownATM_TPS_TC[4], maxDownATM_TPS_TC[4],
10017 + minRevDownATM_TPS_TC[4], maxDelayDownATM_TPS_TC[4];
10018 + uchar maxErrorDownATM_TPS_TC[4], minINPDownATM_TPS_TC[4];
10019 + short minUpATM_TPS_TC[4], maxUpATM_TPS_TC[4],
10020 + minRevUpATM_TPS_TC[4], maxDelayUpATM_TPS_TC[4];
10021 + uchar maxErrorUpATM_TPS_TC[4], minINPUpATM_TPS_TC[4];
10023 + short minDownPTM_TPS_TC[4], maxDownPTM_TPS_TC[4],
10024 + minRevDownPTM_TPS_TC[4], maxDelayDownPTM_TPS_TC[4];
10025 + uchar maxErrorDownPTM_TPS_TC[4], minINPDownPTM_TPS_TC[4];
10026 + short minUpPTM_TPS_TC[4], maxUpPTM_TPS_TC[4],
10027 + minRevUpPTM_TPS_TC[4], maxDelayUpPTM_TPS_TC[4];
10028 + uchar maxErrorUpPTM_TPS_TC[4], minINPUpPTM_TPS_TC[4];
10030 + ushort subModePSDMasks;
10031 + } g992p3DataPumpCapabilities;
10033 +#define kG992p3p5MaxSpectBoundsUpSize 16
10034 +#define kG992p3p5MaxSpectBoundsDownSize 32
10038 + Boolean rcvNTREnabled, shortInitEnabled, diagnosticsModeEnabled;
10040 + char featureSpectrum, featureOverhead;
10041 + char featureTPS_TC[4], featurePMS_TC[4];
10043 + short rcvNOMPSDus, rcvMAXNOMPSDus, rcvMAXNOMATPus;
10044 + short usSubcarrierIndex[kG992p3p5MaxSpectBoundsUpSize],
10045 + usLog_tss[kG992p3p5MaxSpectBoundsUpSize];
10046 + short numUsSubcarrier;
10047 + short rcvNOMPSDds, rcvMAXNOMPSDds, rcvMAXNOMATPds;
10048 + short dsSubcarrierIndex[kG992p3p5MaxSpectBoundsDownSize],
10049 + dsLog_tss[kG992p3p5MaxSpectBoundsDownSize];
10050 + short numDsSubcarrier;
10051 + uchar sizeIDFT, fillIFFT;
10052 + uchar readsl2Upstream, readsl2Downstream;
10053 + uchar minDownOverheadDataRate, minUpOverheadDataRate;
10054 + uchar maxDownSTM_TPSTC, maxDownATM_TPSTC, maxDownPTM_TPSTC;
10055 + uchar maxUpSTM_TPSTC, maxUpATM_TPSTC, maxUpPTM_TPSTC;
10057 + short minDownSTM_TPS_TC[4], maxDownSTM_TPS_TC[4],
10058 + minRevDownSTM_TPS_TC[4], maxDelayDownSTM_TPS_TC[4];
10059 + uchar maxErrorDownSTM_TPS_TC[4], minINPDownSTM_TPS_TC[4];
10060 + short minUpSTM_TPS_TC[4], maxUpSTM_TPS_TC[4],
10061 + minRevUpSTM_TPS_TC[4], maxDelayUpSTM_TPS_TC[4];
10062 + uchar maxErrorUpSTM_TPS_TC[4], minINPUpSTM_TPS_TC[4];
10064 + short maxDownPMS_TC_Latency[4], maxUpPMS_TC_Latency[4];
10065 + short maxDownR_PMS_TC_Latency[4], maxDownD_PMS_TC_Latency[4];
10066 + short maxUpR_PMS_TC_Latency[4], maxUpD_PMS_TC_Latency[4];
10068 + short minDownATM_TPS_TC[4], maxDownATM_TPS_TC[4],
10069 + minRevDownATM_TPS_TC[4], maxDelayDownATM_TPS_TC[4];
10070 + uchar maxErrorDownATM_TPS_TC[4], minINPDownATM_TPS_TC[4];
10071 + short minUpATM_TPS_TC[4], maxUpATM_TPS_TC[4],
10072 + minRevUpATM_TPS_TC[4], maxDelayUpATM_TPS_TC[4];
10073 + uchar maxErrorUpATM_TPS_TC[4], minINPUpATM_TPS_TC[4];
10075 + short minDownPTM_TPS_TC[4], maxDownPTM_TPS_TC[4],
10076 + minRevDownPTM_TPS_TC[4], maxDelayDownPTM_TPS_TC[4];
10077 + uchar maxErrorDownPTM_TPS_TC[4], minINPDownPTM_TPS_TC[4];
10078 + short minUpPTM_TPS_TC[4], maxUpPTM_TPS_TC[4],
10079 + minRevUpPTM_TPS_TC[4], maxDelayUpPTM_TPS_TC[4];
10080 + uchar maxErrorUpPTM_TPS_TC[4], minINPUpPTM_TPS_TC[4];
10082 + ushort subModePSDMasks;
10083 + } g992p3PhyDataPumpCapabilities;
10088 + dslModulationType modulations;
10089 + bitMap auxFeatures;
10091 + bitMap demodCapabilities;
10092 + bitMap demodCapabilities2;
10093 + ushort noiseMargin; /* Q4 dB */
10095 + short xmtRSf, xmtRS, xmtS, xmtD;
10096 + short rcvRSf, rcvRS, rcvS, rcvD;
10098 +#ifdef G992P1_ANNEX_A
10099 + bitMap subChannelInfo;
10100 + carrierInfo carrierInfoG992p1;
10102 +#ifdef G992P1_ANNEX_B
10103 + bitMap subChannelInfoAnnexB;
10104 + carrierInfo carrierInfoG992p1AnnexB;
10106 +#ifdef G992_ANNEXC
10107 + bitMap subChannelInfoAnnexC;
10108 + carrierInfo carrierInfoG992p1AnnexC;
10110 +#if defined(G992P1_ANNEX_I)
10111 + bitMap subChannelInfoAnnexI;
10112 + carrierInfo carrierInfoG992p1AnnexI;
10115 + bitMap subChannelInfop5;
10116 + carrierInfo carrierInfoG992p5;
10118 +#if defined(G992P2) || (defined(G992P1_ANNEX_A) && defined(G992P1_ANNEX_A_USED_FOR_G992P2))
10119 + carrierInfo carrierInfoG992p2;
10121 + ushort maxDataRate;
10122 + uchar minDataRate;
10124 + g992p3DataPumpCapabilities *carrierInfoG992p3AnnexA;
10127 + g992p3DataPumpCapabilities *carrierInfoG992p5AnnexA;
10129 + } dslDataPumpCapabilities;
10131 +struct __dslCommandStruct;
10132 +typedef Boolean (*dslCommandHandlerType) (void *gDslVars, struct __dslCommandStruct*);
10133 +typedef struct __dslCommandStruct
10135 + dslCommandCode command;
10142 + dslTestCmdType type;
10147 + ulong xmtStartTone, xmtNumOfTones;
10148 + ulong rcvStartTone, rcvNumOfTones;
10149 + uchar *xmtMap, *rcvMap;
10150 + } toneSelectSpec;
10153 + long extraPowerRequestQ4dB;
10154 + long numOfCarriers;
10155 + char *marginTweakTableQ4dB;
10156 + } marginTweakSpec;
10161 + dslDirectionType direction;
10162 + dslDataPumpCapabilities capabilities;
10167 + ulong eyeConstIndex1;
10168 + ulong eyeConstIndex2;
10175 + } dslStatusBufSpec;
10179 + void *afeParamPtr;
10180 + ulong afeParamSize;
10183 + } dslAfeTestSpec;
10186 + dslLinkLayerType type;
10192 + dataRateMap rxDataRate;
10193 + dataRateMap txDataRate;
10194 + long rtDelayQ4ms;
10196 + ulong rxCellsInBuf;
10197 + ulong rxPacketNum;
10198 + dslFrameHandlerType rxIndicateHandlerPtr;
10199 + dslFrameHandlerType txCompleteHandlerPtr;
10200 + dslPhyInitType atmPhyInitPtr;
10204 + dslHeaderHandlerType rxHeaderHandlerPtr;
10205 + dslRxFrameBufferHandlerType rxDataHandlerPtr;
10206 + dslTxFrameBufferHandlerType txHandlerPtr;
10207 + } atmPhyLinkSpec;
10213 + ulong rxPacketNum;
10214 + dslFrameHandlerType rxIndicateHandlerPtr;
10215 + dslFrameHandlerType txCompleteHandlerPtr;
10216 + dslPacketPhyInitType dslPhyInitPtr;
10217 + } dslPacketLinkSpec;
10218 + dslPacketPhyFunctions dslPacketPhyLinkSpec;
10222 + txDataHandlerType txDataHandlerPtr;
10223 + rxDataHandlerType rxDataHandlerPtr;
10226 + } dslLinkLayerSpec;
10228 +#ifdef G997_1_FRAMER
10234 + ulong rxPacketNum;
10235 + dslFrameHandlerType rxIndicateHandlerPtr;
10236 + dslFrameHandlerType txCompleteHandlerPtr;
10244 + } dslClearEocMsg;
10251 + } dslDataRegister;
10254 + dslStatusHandlerType statusHandlerPtr;
10255 + dslCommandHandlerType commandHandlerPtr;
10256 + eyeHandlerType eyeHandlerPtr;
10257 + logHandlerType logHandlerPtr;
10258 +#if defined(DEBUG_DATA_HANDLER)
10259 + debugDataHandlerType debugDataHandlerPtr;
10261 + dslFrameHandlerType rxIndicateHandlerPtr;
10262 + dslFrameHandlerType txCompleteHandlerPtr;
10263 + dslDriverCallbackType driverCallback;
10265 +#if !defined(CHIP_SRC) || defined(DSL_FRAME_FUNCTIONS)
10266 + dslFrameFunctions DslFunctions;
10268 + dslOLRMessage dslOLRRequest;
10269 + dslPwrMessage dslPwrMsg;
10271 + } dslCommandStruct;
10278 + dslCommandHandlerType linkCommandHandlerPtr;
10279 + timerHandlerType linkTimerHandlerPtr;
10280 + dslLinkCloseHandlerType linkCloseHandlerPtr;
10282 + dslFrameHandlerType linkSendHandlerPtr;
10283 + dslFrameHandlerType linkReturnHandlerPtr;
10285 + dslVcAllocateHandlerType linkVcAllocateHandlerPtr;
10286 + dslVcFreeHandlerType linkVcFreeHandlerPtr;
10287 + dslVcActivateHandlerType linkVcActivateHandlerPtr;
10288 + dslVcDeactivateHandlerType linkVcDeactivateHandlerPtr;
10289 + dslVcConfigureHandlerType linkVcConfigureHandlerPtr;
10291 + dslLinkVc2IdHandlerType linkVc2IdHandlerPtr;
10292 + dslLinkVcId2VcHandlerType linkVcId2VcHandlerPtr;
10293 + dslGetFramePoolHandlerType linkGetFramePoolHandlerPtr;
10295 +#ifndef ADSLCORE_ONLY
10296 + dslHeaderHandlerType linkRxCellHeaderHandlerPtr;
10297 + dslRxFrameBufferHandlerType linkRxCellDataHandlerPtr;
10298 + dslTxFrameBufferHandlerType linkTxCellHandlerPtr;
10301 + txDataHandlerType linkTxDataHandlerPtr;
10302 + rxDataHandlerType linkRxDataHandlerPtr;
10303 + } linkLayerFunctions;
10305 +#ifndef ADSLCORE_ONLY
10307 +#define LinkLayerAssignFunctions( var, name_prefix ) do { \
10308 + (var).linkCommandHandlerPtr = name_prefix##CommandHandler; \
10309 + (var).linkTimerHandlerPtr = name_prefix##TimerHandler; \
10310 + (var).linkCloseHandlerPtr = name_prefix##CloseHandler; \
10312 + (var).linkSendHandlerPtr = name_prefix##SendFrameHandler; \
10313 + (var).linkReturnHandlerPtr = name_prefix##ReturnFrameHandler; \
10315 + (var).linkVcAllocateHandlerPtr = name_prefix##VcAllocateHandler; \
10316 + (var).linkVcFreeHandlerPtr = name_prefix##VcFreeHandler; \
10317 + (var).linkVcActivateHandlerPtr = name_prefix##VcActivateHandler; \
10318 + (var).linkVcDeactivateHandlerPtr = name_prefix##VcDeactivateHandler; \
10319 + (var).linkVcConfigureHandlerPtr = name_prefix##VcConfigureHandler; \
10321 + (var).linkVc2IdHandlerPtr = name_prefix##Vc2IdHandler; \
10322 + (var).linkVcId2VcHandlerPtr = name_prefix##VcId2VcHandler; \
10323 + (var).linkGetFramePoolHandlerPtr = name_prefix##GetFramePoolHandler; \
10325 + (var).linkRxCellHeaderHandlerPtr = name_prefix##RxCellHeaderHandler; \
10326 + (var).linkRxCellDataHandlerPtr = name_prefix##RxCellDataHandler; \
10327 + (var).linkTxCellHandlerPtr = name_prefix##TxCellHandler; \
10329 + (var).linkTxDataHandlerPtr = name_prefix##TxDataHandler; \
10330 + (var).linkRxDataHandlerPtr = name_prefix##RxDataHandler; \
10335 +#define LinkLayerAssignFunctions( var, name_prefix ) do { \
10336 + (var).linkCommandHandlerPtr = name_prefix##CommandHandler; \
10337 + (var).linkTimerHandlerPtr = name_prefix##TimerHandler; \
10338 + (var).linkCloseHandlerPtr = name_prefix##CloseHandler; \
10340 + (var).linkSendHandlerPtr = name_prefix##SendFrameHandler; \
10341 + (var).linkReturnHandlerPtr = name_prefix##ReturnFrameHandler; \
10343 + (var).linkVcAllocateHandlerPtr = name_prefix##VcAllocateHandler; \
10344 + (var).linkVcFreeHandlerPtr = name_prefix##VcFreeHandler; \
10345 + (var).linkVcActivateHandlerPtr = name_prefix##VcActivateHandler; \
10346 + (var).linkVcDeactivateHandlerPtr = name_prefix##VcDeactivateHandler; \
10347 + (var).linkVcConfigureHandlerPtr = name_prefix##VcConfigureHandler; \
10349 + (var).linkVc2IdHandlerPtr = name_prefix##Vc2IdHandler; \
10350 + (var).linkVcId2VcHandlerPtr = name_prefix##VcId2VcHandler; \
10351 + (var).linkGetFramePoolHandlerPtr = name_prefix##GetFramePoolHandler; \
10353 + (var).linkTxDataHandlerPtr = name_prefix##TxDataHandler; \
10354 + (var).linkRxDataHandlerPtr = name_prefix##RxDataHandler; \
10361 + dslFrameHandlerType rxIndicateHandlerPtr;
10362 + dslFrameHandlerType txCompleteHandlerPtr;
10363 + dslStatusHandlerType statusHandlerPtr;
10364 + } upperLayerFunctions;
10370 +#define kDslFirstDebugData 1000
10371 +#define kDslXmtPerSymTimeCompData (kDslFirstDebugData + 0)
10372 +#define kDslRcvPerSymTimeCompData (kDslFirstDebugData + 1)
10373 +#define kDslXmtAccTimeCompData (kDslFirstDebugData + 2)
10374 +#define kDslRcvAccTimeCompData (kDslFirstDebugData + 3)
10375 +#define kDslRcvPilotToneData (kDslFirstDebugData + 4)
10376 +#define kDslTEQCoefData (kDslFirstDebugData + 5)
10377 +#define kDslTEQInputData (kDslFirstDebugData + 6)
10378 +#define kDslTEQOutputData (kDslFirstDebugData + 7)
10379 +#define kDslRcvFFTInputData (kDslFirstDebugData + 8)
10380 +#define kDslRcvFFTOutputData (kDslFirstDebugData + 9)
10381 +#define kDslRcvCarrierSNRData (kDslFirstDebugData + 10)
10382 +#define kDslXmtToneOrderingData (kDslFirstDebugData + 11)
10383 +#define kDslRcvToneOrderingData (kDslFirstDebugData + 12)
10384 +#define kDslXmtGainData (kDslFirstDebugData + 13)
10385 +#define kDslRcvGainData (kDslFirstDebugData + 14)
10386 +#define kDslMseData (kDslFirstDebugData + 15)
10387 +#define kDslFEQOutErrData (kDslFirstDebugData + 16)
10388 +#define kDslFEQCoefData (kDslFirstDebugData + 17)
10389 +#define kDslShowtimeMseData (kDslFirstDebugData + 18)
10390 +#define kDslTimeEstimationHWPhaseTweak (kDslFirstDebugData + 24)
10391 +#define kDslSlicerInput (kDslFirstDebugData + 40)
10392 +#define kDslXmtConstellations (kDslFirstDebugData + 41)
10393 +#define kDslSnr1ShiftData (kDslFirstDebugData + 50)
10394 +#define kDslSnr1InputData (kDslFirstDebugData + 51)
10395 +#define kDslSnr1ReverbAvgData (kDslFirstDebugData + 52)
10396 +#define kDslAnnexCFextSnrData (kDslFirstDebugData + 53)
10397 +#define kDslAnnexCNextSnrData (kDslFirstDebugData + 54)
10398 +#define kG994p1OutputXmtSample (kDslFirstDebugData + 100)
10399 +#define kG994p1OutputMicroBit (kDslFirstDebugData + 101)
10400 +#define kG994p1OutputBit (kDslFirstDebugData + 102)
10401 +#define kG994p1OutputTimer (kDslFirstDebugData + 103)
10403 +/****************************************************************************/
10404 +/* 2. Constant definitions. */
10406 +/* 2.1 Defininitive constants */
10407 +/****************************************************************************/
10409 +/* dslDirectionType */
10414 +/* ATM setup maps */
10416 +#define kAtmCallMgrEnabled 0x00000001 /* Bit 0 */
10417 +#define kAtmAAL1FecEnabledMask 0x00000006 /* Bit 1 */
10418 +#define kAtmAAL1HiDelayFecEnabled 0x00000002 /* Bit 2 */
10419 +#define kAtmAAL1LoDelayFecEnabled 0x00000004 /* Bit 3 */
10421 +/* dslLinkLayerType */
10423 +#define kNoDataLink 0
10424 +#define kAtmLink 0x00000001
10425 +#define kAtmPhyLink 0x00000002
10426 +#define kDslPacketLink 0x00000003
10427 +#define kDslPacketPhyLink 0x00000004
10429 +/* dslModulationType */
10430 +#define kNoCommonModulation 0x00000000
10431 +#define kG994p1 0x00000020 /* G.994.1 or G.hs */
10432 +#define kT1p413 0x00000040 /* T1.413 handshaking */
10433 +#define kG992p1AnnexA 0x00000001 /* G.992.1 or G.dmt Annex A */
10434 +#define kG992p1AnnexB 0x00000002 /* G.992.1 or G.dmt Annex B */
10435 +#define kG992p1AnnexC 0x00000004 /* G.992.1 or G.dmt Annex C */
10436 +#define kG992p2AnnexAB 0x00000008 /* G.992.2 or G.lite Annex A/B */
10437 +#define kG992p2AnnexC 0x00000010 /* G.992.2 or G.lite Annex C */
10438 +#define kG992p3AnnexA 0x00000100 /* G.992.3 or G.DMTbis Annex A */
10439 +#define kG992p3AnnexB 0x00000200 /* G.992.3 or G.DMTbis Annex A */
10440 +#define kG992p1AnnexI 0x00000400 /* G.992.1 Annex I */
10441 +#define kG992p5AnnexA 0x00010000 /* G.992.5 Annex A */
10442 +#define kG992p5AnnexB 0x00020000 /* G.992.5 Annex B */
10443 +#define kG992p5AnnexI 0x00040000 /* G.992.5 Annex I */
10444 +#define kG992p3AnnexM 0x00080000 /* G.992.3 Annex M */
10445 +#define kG992p5AnnexM 0x01000000 /* G.992.5 Annex M */
10447 +/* demodCapabilities bitmap */
10448 +#define kEchoCancellorEnabled 0x00000001
10449 +#define kSoftwareTimeErrorDetectionEnabled 0x00000002
10450 +#define kSoftwareTimeTrackingEnabled 0x00000004
10451 +#define kDslTrellisEnabled 0x00000008
10452 +#define kHardwareTimeTrackingEnabled 0x00000010
10453 +#define kHardwareAGCEnabled 0x00000020
10454 +#define kDigitalEchoCancellorEnabled 0x00000040
10455 +#define kReedSolomonCodingEnabled 0x00000080
10456 +#define kAnalogEchoCancellorEnabled 0x00000100
10457 +#define kT1p413Issue1SingleByteSymMode 0x00000200
10458 +#define kDslAturXmtPowerCutbackEnabled 0x00000400
10459 +#ifdef G992_ANNEXC_LONG_REACH
10460 +#define kDslAnnexCPilot48 0x00000800
10461 +#define kDslAnnexCReverb33_63 0x00001000
10463 +#ifdef G992_ANNEXC
10464 +#define kDslCentilliumCRCWorkAroundEnabled 0x00002000
10466 +#define kDslEnableRoundUpDSLoopAttn 0x00002000
10468 +#define kDslBitSwapEnabled 0x00004000
10469 +#define kDslADILowRateOptionFixDisabled 0x00008000
10470 +#define kDslAnymediaGSPNCrcFixEnabled 0x00010000
10471 +#define kDslMultiModesPreferT1p413 0x00020000
10472 +#define kDslT1p413UseRAck1Only 0x00040000
10473 +#define kDslUE9000ADI918FECFixEnabled 0x00080000
10474 +#define kDslG994AnnexAMultimodeEnabled 0x00100000
10475 +#define kDslATUCXmtPowerMinimizeEnabled 0x00200000
10476 +#define kDropOnDataErrorsDisabled 0x00400000
10477 +#define kDslSRAEnabled 0x00800000
10479 +#define kDslT1p413HigherToneLevelNeeded 0x01000000
10480 +#define kDslT1p413SubsampleAlignmentEnabled 0x02000000
10481 +#define kDslT1p413DisableUpstream2xIfftMode 0x04000000
10483 +/* test mode related demodCapabilities, for internal use only */
10484 +#define kDslTestDemodCapMask 0xF8000000
10485 +#define kDslSendReverbModeEnabled 0x10000000
10486 +#define kDslSendMedleyModeEnabled 0x20000000
10487 +#define kDslAutoRetrainDisabled 0x40000000
10488 +#define kDslPllWorkaroundEnabled 0x80000000
10489 +#define kDslAfeLoopbackModeEnabled 0x08000000
10491 +/* demodCapabilities bitmap2 */
10493 +#define kDslAnnexCProfile1 0x00000001
10494 +#define kDslAnnexCProfile2 0x00000002
10495 +#define kDslAnnexCProfile3 0x00000004
10496 +#define kDslAnnexCProfile4 0x00000008
10497 +#define kDslAnnexCProfile5 0x00000010
10498 +#define kDslAnnexCProfile6 0x00000020
10499 +#define kDslAnnexCPilot64 0x00000040
10500 +#define kDslAnnexCPilot48 0x00000080
10501 +#define kDslAnnexCPilot32 0x00000100
10502 +#define kDslAnnexCPilot16 0x00000200
10503 +#define kDslAnnexCA48B48 0x00000400
10504 +#define kDslAnnexCA24B24 0x00000800
10505 +#define kDslAnnexCReverb33_63 0x00001000
10506 +#define kDslAnnexCCReverb6_31 0x00002000
10508 +#define kDslAnnexIShapedSSVI 0x00004000
10509 +#define kDslAnnexIFlatSSVI 0x00008000
10511 +#define kDslAnnexIPilot64 0x00010000
10512 +#define kDslAnnexIA48B48 0x00020000
10513 +#define kDslAnnexIPilot128 0x00040000
10514 +#define kDslAnnexIPilot96 0x00080000
10516 +/* Features bitmap */
10517 +#define kG992p2RACK1 0x00000001
10518 +#define kG992p2RACK2 0x00000002
10519 +#define kG992p2DBM 0x00000004
10520 +#define kG992p2FastRetrain 0x00000008
10521 +#define kG992p2RS16 0x00000010
10522 +#define kG992p2ClearEOCOAM 0x00000020
10523 +#define kG992NTREnabled 0x00000040
10524 +#define kG992p2EraseAllStoredProfiles 0x00000080
10525 +#define kG992p2FeaturesNPar2Mask 0x0000003B
10526 +#define kG992p2FeaturesNPar2Shift 0
10528 +#define kG992p1RACK1 0x00000100
10529 +#define kG992p1RACK2 0x00000200
10530 +#define kG992p1STM 0x00000800
10531 +#define kG992p1ATM 0x00001000
10532 +#define kG992p1ClearEOCOAM 0x00002000
10533 +#define kG992p1FeaturesNPar2Mask 0x00003B00
10534 +#define kG992p1FeaturesNPar2Shift 8
10535 +#define kG992p1DualLatencyUpstream 0x00004000
10536 +#define kG992p1DualLatencyDownstream 0x00008000
10537 +#define kG992p1HigherBitRates 0x40000000
10539 +#if defined(G992P1_ANNEX_I)
10540 +#define kG992p1HigherBitRates1over3 0x80000000
10541 +#define kG992p1AnnexIShapedSSVI 0x00000001
10542 +#define kG992p1AnnexIFlatSSVI 0x00000002
10543 +#define kG992p1AnnexIPilotFlag 0x00000008
10544 +#define kG992p1AnnexIPilot64 0x00000001
10545 +#define kG992p1AnnexIPilot128 0x00000004
10546 +#define kG992p1AnnexIPilot96 0x00000008
10547 +#define kG992p1AnnexIPilotA48B48 0x00000010
10550 +#define kG992p1AnnexBRACK1 0x00010000
10551 +#define kG992p1AnnexBRACK2 0x00020000
10552 +#define kG992p1AnnexBUpstreamTones1to32 0x00040000
10553 +#define kG992p1AnnexBSTM 0x00080000
10554 +#define kG992p1AnnexBATM 0x00100000
10555 +#define kG992p1AnnexBClearEOCOAM 0x00200000
10556 +#define kG992p1AnnexBFeaturesNPar2Mask 0x003F0000
10557 +#define kG992p1AnnexBFeaturesNPar2Shift 16
10559 +#define kG992p1AnnexCRACK1 0x01000000
10560 +#define kG992p1AnnexCRACK2 0x02000000
10561 +#define kG992p1AnnexCDBM 0x04000000
10562 +#define kG992p1AnnexCSTM 0x08000000
10563 +#define kG992p1AnnexCATM 0x10000000
10564 +#define kG992p1AnnexCClearEOCOAM 0x20000000
10565 +#define kG992p1AnnexCFeaturesNPar2Mask 0x3F000000
10566 +#define kG992p1AnnexCFeaturesNPar2Shift 24
10568 +#define kG992p1HigherBitRates1over3 0x80000000
10570 +/* auxFeatures bitmap */
10571 +#define kG994p1PreferToExchangeCaps 0x00000001
10572 +#define kG994p1PreferToDecideMode 0x00000002
10573 +#define kG994p1PreferToMPMode 0x00000004
10574 +#define kAfePwmSyncClockShift 3
10575 +#define kAfePwmSyncClockMask (0xF << kAfePwmSyncClockShift)
10576 +#define AfePwmSyncClockEnabled(val) (((val) & kAfePwmSyncClockMask) != 0)
10577 +#define AfePwmGetSyncClockFreq(val) ((((val) & kAfePwmSyncClockMask) >> kAfePwmSyncClockShift) - 1)
10578 +#define AfePwmSetSyncClockFreq(val,freq) ((val) |= ((((freq)+1) << kAfePwmSyncClockShift) & kAfePwmSyncClockMask))
10580 +/* SubChannel Info bitMap for G992p1 */
10581 +#define kSubChannelASODownstream 0x00000001
10582 +#define kSubChannelAS1Downstream 0x00000002
10583 +#define kSubChannelAS2Downstream 0x00000004
10584 +#define kSubChannelAS3Downstream 0x00000008
10585 +#define kSubChannelLSODownstream 0x00000010
10586 +#define kSubChannelLS1Downstream 0x00000020
10587 +#define kSubChannelLS2Downstream 0x00000040
10588 +#define kSubChannelLS0Upstream 0x00000080
10589 +#define kSubChannelLS1Upstream 0x00000100
10590 +#define kSubChannelLS2Upstream 0x00000200
10591 +#define kSubChannelInfoOctet1Mask 0x0000001F
10592 +#define kSubChannelInfoOctet2Mask 0x000003E0
10593 +#define kSubChannelInfoOctet1Shift 0
10594 +#define kSubChannelInfoOctet2Shift 5
10596 +/****************************************************************************/
10597 +/* 3. Interface functions. */
10599 +/****************************************************************************/
10602 +#if defined(G992P1_ANNEX_I2X) || defined(G992P5)
10604 +#define kDslSamplingFreq 4416000
10605 +#define kDslMaxFFTSize 1024
10606 +#define kDslMaxFFTSizeShift 10
10607 +#elif defined(G992P1_ANNEX_I4X)
10608 +#define kDslSamplingFreq 8832000
10609 +#define kDslMaxFFTSize 2048
10610 +#define kDslMaxFFTSizeShift 11
10611 +#elif defined(G992P1_ANNEX_I8X)
10612 +#define kDslSamplingFreq 17664000
10613 +#define kDslMaxFFTSize 4096
10614 +#define kDslMaxFFTSizeShift 12
10616 +#define kDslSamplingFreq 2208000
10617 +#define kDslMaxFFTSize 512
10618 +#define kDslMaxFFTSizeShift 9
10621 +#define kDslSamplingFreq 1104000
10622 +#define kDslMaxFFTSize 256
10623 +#define kDslMaxFFTSizeShift 8
10626 +#if defined(G992_ATUR_UPSTREAM_SAMPLING_FREQ_276KHZ)
10627 +#define kDslATURUpstreamSamplingFreq 276000
10628 +#define kDslATURFFTSizeShiftUpstream 6
10629 +#elif defined(G992_ATUR_UPSTREAM_SAMPLING_FREQ_552KHZ)
10630 +#define kDslATURUpstreamSamplingFreq 552000
10631 +#define kDslATURFFTSizeShiftUpstream 7
10633 +#define kDslATURUpstreamSamplingFreq kDslSamplingFreq
10634 +#define kDslATURFFTSizeShiftUpstream kDslMaxFFTSizeShift
10637 +#if defined(G992_ATUC_UPSTREAM_SAMPLING_FREQ_276KHZ)
10638 +#define kDslATUCUpstreamSamplingFreq 276000
10639 +#define kDslATUCFFTSizeShiftUpstream 6
10640 +#elif defined(G992_ATUC_UPSTREAM_SAMPLING_FREQ_552KHZ)
10641 +#define kDslATUCUpstreamSamplingFreq 552000
10642 +#define kDslATUCFFTSizeShiftUpstream 7
10644 +#define kDslATUCUpstreamSamplingFreq kDslSamplingFreq
10645 +#define kDslATUCFFTSizeShiftUpstream kDslMaxFFTSizeShift
10648 +#define kDslMaxSamplesPerSymbol (kDslMaxFFTSize+kDslMaxFFTSize/16)
10650 +#if defined(G992P1_ANNEX_I) || defined(G992P5)
10651 +#define kDslMaxTEQLength 32
10653 +#define kDslMaxTEQLength 16
10656 +#define kDslMaxSymbolBlockSize 1
10657 +#define kDslMaxSampleBlockSize (kDslMaxSymbolBlockSize*kDslMaxSamplesPerSymbol)
10659 +#ifdef G992_ANNEXC
10660 +#define kG992AnnexCXmtToRcvPathDelay 512 /* In samples at kDslSamplingFreq */
10663 +/*** For compatibility with existing test codes ***/
10664 +#if !defined(TARG_OS_RTEMS)
10665 +typedef dslStatusCode modemStatusCode;
10666 +typedef dslStatusStruct modemStatusStruct;
10667 +typedef dslStatusHandlerType statusHandlerType;
10668 +typedef dslCommandCode modemCommandCode;
10669 +typedef dslCommandStruct modemCommandStruct;
10670 +typedef dslCommandHandlerType commandHandlerType;
10673 +extern void SM_DECL SoftDslSetRefData (void *gDslVars, ulong refData);
10674 +extern ulong SM_DECL SoftDslGetRefData (void *gDslVars);
10675 +extern int SM_DECL SoftDslGetMemorySize(void);
10676 +extern void SM_DECL SoftDslInit (void *gDslVars);
10677 +extern void SM_DECL SoftDslReset (void *gDslVars);
10678 +extern void SM_DECL SoftDslLineHandler (void *gDslVars, int rxNSamps, int txNSamps, short *rcvPtr, short *xmtPtr) FAST_TEXT;
10679 +extern Boolean SM_DECL SoftDslCommandHandler (void *gDslVars, dslCommandStruct *cmdPtr);
10681 +/* swap Lmem functions */
10682 +#if defined(bcm47xx) && defined(SWAP_LMEM)
10683 +extern int SoftDslSwapLmem(void *gDslVars, int sectionN, int imageN);
10684 +extern void init_SoftDslSwapLmem(void);
10687 +/* SoftDsl time functions */
10689 +extern ulong SM_DECL SoftDslGetTime(void *gDslVars);
10690 +#define __SoftDslGetTime(gv) gDslGlobalVarPtr->execTime
10692 +extern void SM_DECL SoftDslTimer(void *gDslVars, ulong timeMs);
10694 +/* SoftDsl IO functions */
10696 +extern void SM_DECL SoftDslClose (void *gDslVars);
10697 +extern int SM_DECL SoftDslSendFrame (void *gDslVars, void *pVc, ulong mid, dslFrame * pFrame);
10698 +extern int SM_DECL SoftDslReturnFrame (void *gDslVars, void *pVc, ulong mid, dslFrame * pFrame);
10700 +/* SoftDsl connection functions */
10702 +extern void* SM_DECL SoftDslVcAllocate(void *gDslVars, dslVcParams *pVcParams);
10703 +extern void SM_DECL SoftDslVcFree(void *gDslVars, void *pVc);
10704 +extern Boolean SM_DECL SoftDslVcActivate(void *gDslVars, void *pVc);
10705 +extern void SM_DECL SoftDslVcDeactivate(void *gDslVars, void *pVc);
10706 +extern Boolean SM_DECL SoftDslVcConfigure(void *gDslVars, void *pVc, ulong mid, dslVcParams *pVcParams);
10708 +/* Special functions for LOG support */
10710 +extern ulong SM_DECL SoftDslVc2Id(void *gDslVars, void *pVc);
10711 +extern void* SM_DECL SoftDslVcId2Vc(void *gDslVars, ulong vcId);
10712 +extern void* SM_DECL SoftDslGetFramePool(void *gDslVars);
10714 +/* Functions for host mode execution */
10716 +extern void* SM_DECL SoftDslRxCellHeaderHandler (void *gDslVars, ulong hdr, uchar hdrHec);
10717 +extern void* SM_DECL SoftDslRxCellDataHandler (void *gDslVars, int, void*);
10718 +extern void* SM_DECL SoftDslTxCellHandler (void *gDslVars, int*, void*);
10719 +extern Boolean SM_DECL SoftDslPhyCommandHandler (void *gDslVars, dslCommandStruct *cmdPtr);
10721 +/* Functions getting OEM parameters including G994 non standard info management */
10723 +extern char* SM_DECL SoftDslGetTrainingVendorIDString(void *gDslVars);
10724 +extern char* SM_DECL SoftDslGetVendorIDString(void *gDslVars);
10725 +extern char* SM_DECL SoftDslGetSerialNumberString(void *gDslVars);
10726 +extern char* SM_DECL SoftDslGetRevString(void *gDslVars);
10727 +extern int SM_DECL SoftDslRevStringSize(void *gDslVars);
10728 +extern int SM_DECL SoftDslSerNumStringSize(void *gDslVars);
10730 +extern void* SM_DECL SoftDslGetG994p1RcvNonStdInfo(void *gDslVars, ulong *pLen);
10731 +extern void* SM_DECL SoftDslGetG994p1XmtNonStdInfo(void *gDslVars, ulong *pLen);
10733 +#ifdef G997_1_FRAMER
10735 +/* G997 functions */
10737 +extern int SM_DECL SoftDslG997SendFrame (void *gDslVars, void *pVc, ulong mid, dslFrame * pFrame);
10738 +extern int SM_DECL SoftDslG997ReturnFrame (void *gDslVars, void *pVc, ulong mid, dslFrame * pFrame);
10743 +extern void * SM_DECL SoftDslMibGetData (void *gDslVars, int dataId, void *pAdslMibData);
10746 +#define SoftDsl SoftDslLineHandler
10747 +#define kSoftDslMaxMemorySize (32768*16384)
10750 + * Internal functions
10753 +extern void SoftDslStatusHandler (void *gDslVars, dslStatusStruct *status) FAST_TEXT;
10754 +extern void SoftDslInternalStatusHandler (void *gDslVars, dslStatusStruct *status);
10757 + * DSL OS functions
10762 +#define SoftDslIsBgAvailable(gDslVars) (DSLOS_THREAD_INACTIVE == DslOsGetThreadState(&(gDslGlobalVarPtr->tcbDslBg)))
10763 +#define SoftDslGetBgThread(gDslVars) \
10764 + ((DSLOS_THREAD_INACTIVE != DslOsGetThreadState(&(gDslGlobalVarPtr->tcbDslBg))) ? &gDslGlobalVarPtr->tcbDslBg : NULL)
10765 +#define SoftDslBgStart(gDslVars, pFunc) \
10766 + DslOsCreateThread(&gDslGlobalVarPtr->tcbDslBg, DSLOS_PRIO_HIGHEST - 10, pFunc, gDslVars, \
10767 + WB_ADDR(gDslGlobalVarPtr->bgStack), sizeof(gDslGlobalVarPtr->bgStack))
10768 +#define SoftDslBgStop(gDslVars) DslOsDeleteThread(&gDslGlobalVarPtr->tcbDslBg)
10770 +#define SoftDslEnterCritical() DslOsEnterCritical()
10771 +#define SoftDslLeaveCritical(id) DslOsLeaveCritical(id)
10775 +#define SoftDslIsBgAvailable(gDslVars) 1
10776 +#define SoftDslGetBgThread(gDslVars) 1
10777 +#define SoftDslBgStart(gDslVars, pFunc) (*pFunc)(gDslVars)
10778 +#define SoftDslBgStop(gDslVars)
10780 +#define SoftDslEnterCritical() 0
10781 +#define SoftDslLeaveCritical(id)
10786 + * DSL frames and native frame functions
10789 +DslFrameDeclareFunctions (DslFrameNative)
10792 + * These functions are for testing purpose, they are defined outside.
10794 +#ifdef STACK_SIZE_REQUIREMENT_TEST
10795 +extern void StackSizeTestInitializeStackBeforeEntry(void);
10796 +extern void StackSizeTestCheckStackAfterExit(void);
10797 +extern void StackSizeTestBackupStack(void);
10798 +extern void StackSizeTestRestoreStack(void);
10799 +#endif /* STACK_SIZE_REQUIREMENT_TEST */
10801 +#ifdef NEC_NSIF_WORKAROUND
10802 +#define SoftDslGetG994NsStatus(gDslVars) (gDslGlobalVarPtr->G994NsStatus)
10803 +#define SoftDslGetG994NsFailCounter(gDslVars) (gDslGlobalVarPtr->G994NsFailCounter)
10806 +#endif /* SoftDslHeader */
10807 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/SoftModem.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/SoftModem.h
10808 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/SoftModem.h 1970-01-01 01:00:00.000000000 +0100
10809 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/SoftModem.h 2006-06-26 09:07:10.000000000 +0200
10812 +<:copyright-broadcom
10814 + Copyright (c) 2002 Broadcom Corporation
10815 + All Rights Reserved
10816 + No portions of this material may be reproduced in any form without the
10817 + written permission of:
10818 + Broadcom Corporation
10819 + 16215 Alton Parkway
10820 + Irvine, California 92619
10821 + All information contained in this document is Broadcom Corporation
10822 + company private, proprietary, and trade secret.
10826 +/****************************************************************************
10832 + * This file contains the exported interface for SoftModem.c
10835 + * Copyright (c) 1993-1998 AltoCom, Inc. All rights reserved.
10836 + * Authors: Mark Gonikberg, Haixiang Liang.
10838 + * $Revision: 1.16 $
10840 + * $Id: SoftModem.h,v 1.16 2004/04/14 21:16:51 ilyas Exp $
10842 + * $Log: SoftModem.h,v $
10843 + * Revision 1.16 2004/04/14 21:16:51 ilyas
10844 + * Merged with the latest changes in ADSL driver
10846 + * Revision 1.15 2004/04/13 00:56:10 ilyas
10847 + * Merged the latest ADSL driver changes for RTEMS
10849 + * Revision 1.14 2004/04/13 00:16:59 ilyas
10850 + * Merged the latest ADSL driver changes
10852 + * Revision 1.13 2003/02/22 05:07:11 ilyas
10853 + * Added VendorID for T1.413 mode
10855 + * Revision 1.12 2002/10/03 19:34:24 ilyas
10856 + * Added size for EOC serial number register
10858 + * Revision 1.11 2002/09/07 01:37:22 ilyas
10859 + * Added support for OEM parameters
10861 + * Revision 1.10 2001/12/13 02:25:34 ilyas
10862 + * Added definitions for G997
10864 + * Revision 1.9 2001/11/30 05:56:34 liang
10865 + * Merged top of the branch AnnexBDevelopment onto top of the tree.
10867 + * Revision 1.7.2.2 2001/11/27 02:32:05 liang
10868 + * Combine vendor ID, serial #, and version number into SoftModemVersionNumber.c.
10870 + * Revision 1.7.2.1 2001/10/03 01:44:10 liang
10871 + * Merged with codes from main tree (tag SoftDsl_2_18).
10873 + * Revision 1.8 2001/09/21 19:19:01 ilyas
10874 + * Minor fixes for VxWorks build
10876 + * Revision 1.7 2000/07/17 21:08:16 lkaplan
10877 + * removed global pointer
10879 + * Revision 1.6 2000/05/03 04:09:11 ilyas
10880 + * Added ID for ATM log data
10882 + * Revision 1.5 2000/04/01 01:07:44 liang
10883 + * Changed file names and some module names.
10885 + * Revision 1.4 2000/03/02 20:18:12 ilyas
10886 + * Added test status code for ATM VC finished
10888 + * Revision 1.3 1999/08/05 20:02:11 liang
10889 + * Merged with the softmodem top of the tree on 08/04/99.
10891 + * Revision 1.2 1999/01/27 22:19:08 liang
10892 + * Merge with SoftModem_3_1_02.
10893 + * Include SoftDsl.h conditionlly so that the test utilities from SoftModem
10894 + * can be used without major change. It can be merged easily to SoftModem.
10896 + * Revision 1.170 1998/12/22 00:52:52 liang
10897 + * Added auxFeatures bit kV8HoldANSamUntilDetCI. When it is set, ANSam won't be
10898 + * sent until CI is detected (normally ANSam will be sent after 200ms). This is
10899 + * useful in V34 half duplex fax mode.
10901 + * Revision 1.169 1998/12/19 04:46:52 mwg
10902 + * Added bits for fax/data calling tones
10904 + * Revision 1.168 1998/12/17 02:46:10 scott
10905 + * Removed overlay-related commands/statuses and added
10906 + * kSetTrainingDelayReductionCmd
10908 + * Revision 1.167 1998/12/12 03:17:42 scott
10909 + * Added overlay commands and statuses
10911 + * Revision 1.166 1998/12/02 05:34:23 mwg
10912 + * Fixed a problem with bong tone detection
10914 + * Revision 1.165 1998/11/26 00:22:44 yura
10915 + * Added two more log data types: modulatorInputData & modulatorOutputData
10917 + * Revision 1.164 1998/11/19 03:08:04 mwg
10918 + * Added kSetCallProgressParamsCmd
10920 + * Revision 1.163 1998/11/18 23:00:03 liang
10921 + * Added a separate command kLoopbackTestAutoRespEnableCmd to enable or disable
10922 + * the loopback test auto respond feature when the modem is already on-line.
10924 + * Revision 1.162 1998/11/13 20:50:21 scott
10925 + * SoftModemInternalStatusHandler is now SM_DECL as well
10927 + * Revision 1.161 1998/11/13 20:42:25 scott
10928 + * Added SM_DECL type to entrypoint functions
10930 + * Revision 1.160 1998/11/13 03:02:54 scott
10931 + * Added SoftModemTimer prototype.
10932 + * Also include V.8bis types if AT_COMMANDS_V8BIS is defined.
10934 + * Revision 1.159 1998/11/12 01:22:46 scott
10935 + * Increased number of AT registers to 46
10937 + * Revision 1.158 1998/11/05 22:35:18 yura
10938 + * Added two more S-registers
10940 + * Revision 1.157 1998/11/05 03:09:54 mwg
10941 + * Added kLapmRetryFailed to the list of LAPM errors
10943 + * Revision 1.156 1998/11/05 00:13:20 liang
10944 + * Add new connectionInfo status kLoopbackSelfTestNewErrs to report
10945 + * new bit errors whenever it happens.
10947 + * Revision 1.155 1998/11/04 07:11:33 mwg
10948 + * Moved declaration for SoftModemATPrintf() to SoftModem.h
10950 + * Revision 1.154 1998/10/29 07:24:49 mwg
10951 + * *** empty log message ***
10953 + * Revision 1.153 1998/10/15 02:09:37 luisgm
10954 + * added separate data rate mask for Flex to dataPumpCapabilities structure
10956 + * Revision 1.152 1998/10/14 00:12:15 scott
10957 + * Added kMnpOOBFrameCmd and command.frameSpec
10959 + * Revision 1.151 1998/10/09 02:19:22 luisgm
10960 + * added FlexV8bisStruct member to dataPumpCapabilities struc to store flex v8bis info, added define for kFlexSkipV8bis
10962 + * Revision 1.150 1998/10/06 19:36:33 mwg
10963 + * Limited 56K rates to 53K
10965 + * Revision 1.149 1998/10/03 03:43:38 ilyas
10966 + * Added status codes for Audio
10968 + * Revision 1.148 1998/10/01 02:03:17 mwg
10969 + * Added external pulse dialer option
10971 + * Revision 1.147 1998/09/30 01:44:26 mwg
10972 + * Added new functions SoftModemGetWriteBufferSize() & SoftModemGetReadBufferSize()
10974 + * Revision 1.146 1998/09/22 03:44:38 scott
10975 + * Added ALWAYS_LONG_ALIGN() macro
10977 + * Revision 1.145 1998/09/21 21:49:22 scott
10978 + * Added logDataCodes for mnpDecoder(Input/Output)Data
10980 + * Revision 1.144 1998/08/31 22:57:21 luisgm
10981 + * added constants for Flex data rates + kFlexEventTRN2AFinished
10983 + * Revision 1.143 1998/08/18 05:09:53 mwg
10984 + * Increased AT command buffer size to 128
10986 + * Revision 1.142 1998/08/18 03:45:54 ilyas
10987 + * Integrated Audio into V70 test
10989 + * Revision 1.141 1998/08/14 17:46:04 ilyas
10990 + * Integrated Audio and G729a
10992 + * Revision 1.140 1998/08/10 21:42:19 mwg
10993 + * Added space and mark parity
10995 + * Revision 1.139 1998/08/08 03:39:33 scott
10996 + * Moved the C6xDefs and PentiumDefs includes before the internal function
10997 + * prototypes (to permit their redefinitions)
10999 + * Revision 1.138 1998/08/07 20:37:27 yura
11000 + * Added new S-register for &T commands
11002 + * Revision 1.137 1998/08/01 05:22:09 mwg
11003 + * Implemented split memory model
11005 + * Revision 1.136 1998/07/22 02:12:22 liang
11006 + * Added self test mode for loopback test.
11008 + * Revision 1.135 1998/07/21 01:19:03 liang
11009 + * Changed loopback test command parameter interface to use regular modeSpec.
11011 + * Revision 1.134 1998/07/18 03:52:10 liang
11012 + * Added V54 loop 2 test for V22.
11014 + * Revision 1.133 1998/07/15 02:45:03 mwg
11015 + * Added new connection info code: kPCMSpectralShapingBits
11017 + * Revision 1.132 1998/07/15 00:18:48 liang
11018 + * Add special turn off command for V34 fax to handle different turn off procedures.
11020 + * Revision 1.131 1998/07/13 22:19:49 liang
11021 + * Add V8 CI detection status and ANSam disable aux feature.
11023 + * Revision 1.130 1998/07/08 17:09:13 scott
11024 + * Added USE_LONG_ALIGN; support for 6 and PentiumDefs.h files
11026 + * Revision 1.129 1998/07/03 23:28:13 mwg
11027 + * Added Fax Class 2 defines
11029 + * Revision 1.128 1998/07/03 23:17:33 mwg
11030 + * Insuread command/status structures are long aligned
11032 + * Revision 1.127 1998/06/23 16:48:01 mwg
11033 + * Fixed a longstanding problem typical for Win95 VxD: whenever new
11034 + * VxD is intalled the confuguration profile may not match the old one but
11035 + * since the crc is correct it is still being downloaded. To avoid the problem
11036 + * a crc for the version number was added to avoid confusion between profiles
11037 + * of different versions.
11039 + * Revision 1.126 1998/06/19 21:04:06 liang
11040 + * Add auxiliary feature bit kV90ServerNotDetSbarAfterJdbarFix.
11042 + * Revision 1.125 1998/06/11 22:48:14 liang
11043 + * Add kPCM28000bpsShift constant.
11045 + * Revision 1.124 1998/06/05 22:11:51 liang
11046 + * New V90 DIL works through data mode.
11048 + * Revision 1.123 1998/06/01 23:03:41 liang
11049 + * Add v90RcvdDilDiffData logging.
11051 + * Revision 1.122 1998/06/01 21:24:38 mwg
11052 + * Changed some of the names.
11054 + * Revision 1.121 1998/05/13 04:55:22 mwg
11055 + * Now passing the number of spectral shaping bits in aux features
11057 + * Revision 1.120 1998/05/13 02:53:13 liang
11058 + * Add field "value" to command param structure.
11060 + * Revision 1.119 1998/05/12 04:42:23 mwg
11061 + * Replaced some of the status messages
11063 + * Revision 1.118 1998/05/11 23:36:10 mwg
11064 + * Added 8000Hz symbol rate to the map
11066 + * Revision 1.117 1998/05/05 04:28:39 liang
11067 + * V90 works up to data mode first version.
11069 + * Revision 1.116 1998/04/21 09:36:45 mwg
11070 + * Fixed a few problems for 16Khz and added 32Khz.
11072 + * Revision 1.115 1998/04/17 22:33:54 liang
11073 + * Added V90 DIL for mu-law PCM.
11075 + * Revision 1.114 1998/04/15 22:36:39 mwg
11076 + * Added new parameters to kDialCmd to allow individual control of each
11077 + * DTMF group attenuation.
11079 + * Revision 1.113 1998/04/15 18:16:22 ilyas
11080 + * Integrated V.8bis and changed coding of LinkLayerType to bitMap
11082 + * Revision 1.112 1998/04/15 07:59:06 mwg
11083 + * Added new status codes for V.90
11085 + * Revision 1.111 1998/04/11 00:29:16 mwg
11086 + * Fixed the warnings which appeared when Irix builds were upgraded to
11089 + * Revision 1.110 1998/04/11 00:25:01 ilyas
11090 + * More V.70 statuses
11092 + * Revision 1.109 1998/04/10 23:29:31 mwg
11093 + * Added new field to capabilities: dataRates56K
11095 + * Revision 1.108 1998/04/09 02:02:56 mwg
11096 + * Added status for Ja detection.
11098 + * Revision 1.107 1998/04/03 02:05:30 ilyas
11099 + * More V.70 commands added
11101 + * Revision 1.106 1998/04/02 06:15:39 mwg
11102 + * Added coding type (Mu-law/A-law) status reporting.
11104 + * Revision 1.105 1998/03/30 09:53:57 mwg
11105 + * Added definition for k56Flex modulation for future use.
11107 + * Revision 1.104 1998/03/27 17:56:09 ilyas
11108 + * Added definitions for V.70
11110 + * Revision 1.103 1998/03/26 23:29:04 liang
11111 + * Added first version of IMD estimation.
11113 + * Revision 1.102 1998/03/20 04:37:26 mwg
11114 + * Increased the size of the nominal variance to 32 bit.
11116 + * Revision 1.101 1998/03/06 01:22:04 yura
11117 + * Improved Win95 VxD segmentation handling
11119 + * Revision 1.100 1998/03/06 01:06:18 liang
11120 + * Add initial version of V90 phase 1 and 2.
11122 + * Revision 1.99 1998/03/05 23:42:22 mwg
11123 + * (hxl) Implemented enable/disable call waiting command.
11125 + * Revision 1.98 1998/02/26 06:13:06 mwg
11126 + * Increased the number of AT S-registers to account for newly introduced
11129 + * Revision 1.97 1998/02/25 18:18:25 scott
11130 + * Added v42bisCycleCount for V42BIS_THROUGHPUT_CONTROL
11132 + * Revision 1.96 1998/02/24 05:31:20 mwg
11133 + * Added stuff required by international version of AT command processor.
11135 + * Revision 1.95 1998/02/17 01:14:10 scott
11136 + * Reenabled sys/types.h for Linux builds
11138 + * Revision 1.94 1998/02/16 22:32:23 scott
11139 + * Changed copyright notice
11141 + * Revision 1.93 1998/02/16 22:17:44 scott
11142 + * Turned off include of sys/types.h for normal builds
11144 + * Revision 1.92 1998/02/16 21:53:28 scott
11145 + * Exclude sys/types.h for another compiler
11147 + * Revision 1.91 1998/02/09 18:24:10 scott
11148 + * Fixed ComplexShort type to work around bugs in MS and GreenHill compilers
11150 + * Revision 1.90 1998/01/27 01:37:36 mwg
11151 + * Added new log identifier for pcm infidelity data.
11153 + * Revision 1.89 1998/01/22 19:49:32 liang
11154 + * Add auxFeature bit kFaxV34HDXAllowAsymCtrlChan.
11156 + * Revision 1.88 1998/01/21 02:32:01 liang
11157 + * Add more V34 half duplex training progress codes.
11159 + * Revision 1.87 1997/12/23 03:28:25 liang
11160 + * Add more half duplex V34 related constants.
11162 + * Revision 1.86 1997/12/18 19:38:50 scott
11163 + * Added agcData log type.
11164 + * Added kDisableFaxFastClearDown demod capability
11166 + * Revision 1.85 1997/12/18 06:02:45 mwg
11167 + * Added a function to reenable DC offset tracking.
11169 + * Revision 1.84 1997/12/17 22:46:30 mwg
11170 + * Minor modifications to X2 escape status reporting.
11172 + * Revision 1.83 1997/12/16 06:49:45 mwg
11173 + * Implemented proper data rate reporting for PCM modem.
11175 + * Revision 1.82 1997/12/13 06:11:08 mwg
11176 + * Added X2 interface hooks
11178 + * Revision 1.81 1997/12/02 06:21:33 mwg
11179 + * Implemented kSetATRegister command.
11181 + * Revision 1.80 1997/11/27 02:11:41 liang
11182 + * Add code for half duplex V34 control channel.
11184 + * Revision 1.79 1997/11/19 19:52:48 guy
11185 + * Added constant to define V.34 half duplex operation
11187 + * Revision 1.78 1997/10/24 05:15:53 scott
11188 + * Added AGC and phase hit recovery to demodCapabilities
11190 + * Revision 1.77 1997/10/01 02:47:50 liang
11191 + * Add PCM interface.
11193 + * Revision 1.76 1997/09/29 15:48:04 yura
11194 + * Added #pragma statement for W95 Vxd
11196 + * Revision 1.75 1997/09/18 20:32:39 scott
11197 + * Do not include VxD support files if GENERATE_DEPENDENCIES is defined.
11199 + * Revision 1.74 1997/09/18 12:40:55 yura
11200 + * Removed #ifdef statments to be more robust
11202 + * Revision 1.73 1997/09/17 17:32:41 scott
11203 + * Do not include sys/types.h for 6
11205 + * Revision 1.72 1997/08/08 00:53:48 mwg
11206 + * Added fields for LAP-M frames printout.
11207 + * Added fields in auxFeatures to pass preemphasis filter parameters
11208 + * to V.34 phase 3 when doing PTT testing.
11210 + * Revision 1.71 1997/08/06 03:41:45 yura
11211 + * Added a few includes and defines needed by Win 95 driver.
11213 + * Revision 1.70 1997/08/05 03:22:10 liang
11214 + * Add equalizer center tap adjustment calculation related constants.
11216 + * Revision 1.69 1997/07/29 02:44:19 mwg
11217 + * Added new field to dataPumpCapabilities structure. This field is not
11218 + * yet exposed to external interface and currently is only used to
11219 + * enable PTT testing.
11220 + * Added new commands: kStartDataModemPTTTestCmd & kStartDataModemLoopbackTestCmd
11222 + * Revision 1.68 1997/07/22 22:05:10 liang
11223 + * Change sample rate setup as a normal command.
11225 + * Revision 1.67 1997/07/21 23:23:30 liang
11226 + * Define SoftModemSetSampleRate as null when SAMPLE_RATE_CONVERSION is not defined.
11228 + * Revision 1.66 1997/07/21 22:38:36 liang
11229 + * Change sample rate converter structure so that sample rate can be changed
11230 + * on the fly (at very begining) to either 8KHz or 9600Hz.
11232 + * Revision 1.65 1997/07/21 20:22:01 mwg
11233 + * Added statusInfoData to the log identifiers.
11235 + * Revision 1.64 1997/07/16 20:40:07 scott
11236 + * Added multitone monitor fields
11238 + * Revision 1.63 1997/07/10 02:31:08 mwg
11239 + * 1. Added kRxFrameHDLCFlags detected status for the
11241 + * 2. Added kLapmMNPFrameDetected status to lapmStatusCode.
11242 + * 3. Increased the number of AT registers to 35
11243 + * 4. Modified LinkLayerSpec structure in modemCommandStruc
11244 + * to provide the initial values of rxDataRate &
11245 + * txDataRate and RT delay for the cases when
11246 + * link layer is started *after* the data connection
11247 + * is established and the status snooper is unable
11248 + * to determine the rates and RT delay.
11249 + * 5. Added a few extra *empty* constant definitions for
11250 + * disabled features.
11252 + * Revision 1.62 1997/07/02 19:15:05 scott
11253 + * Added bits for Bel103 & Bel212 modulations.
11255 + * Revision 1.61 1997/07/02 05:15:16 mwg
11256 + * Added MNP code.
11258 + * Revision 1.60 1997/07/01 23:52:48 mwg
11259 + * Modified the record test setup to log and use all the commands.
11261 + * Revision 1.59 1997/06/25 19:11:26 mwg
11262 + * 1. Added new framingInfoCode values for Async framing error reporting;
11263 + * 2. Added a substructure to pass serial data format for kSetDTERate cmd;
11265 + * Revision 1.58 1997/05/28 02:05:08 liang
11266 + * Add PCM modem phase 2 codes.
11268 + * Revision 1.57 1997/05/12 21:55:08 liang
11269 + * Add call waiting tone detector module.
11271 + * Revision 1.56 1997/03/21 23:50:08 liang
11272 + * Added initial version of V8bis module to CVS tree.
11274 + * Revision 1.55 1997/03/19 18:35:05 mwg
11275 + * Changed copyright notice.
11277 + * Revision 1.54 1997/03/11 11:11:45 mwg
11278 + * Added code to report V42bis statistics.
11280 + * Revision 1.53 1997/03/04 06:21:08 mwg
11281 + * Added logging of most commands.
11283 + * Revision 1.52 1997/02/28 23:45:13 liang
11284 + * Added training progress status report kPhaseJitterDeactivated.
11286 + * Revision 1.51 1997/02/28 22:23:22 mwg
11287 + * Implemented the following features:
11288 + * - Cleardown for fax modulations V.27, V.29 V.17
11289 + * - Rockwell compatible bitmap report (needed by a customer)
11291 + * Revision 1.50 1997/02/28 03:05:31 mwg
11292 + * Added more logging data types.
11294 + * Revision 1.49 1997/02/27 05:28:58 mwg
11295 + * Added RxFrameOK report.
11297 + * Revision 1.48 1997/02/27 01:48:53 liang
11298 + * Add kV8MenuDataWord1 and kV8MenuDataWord2 connectionInfo status.
11300 + * Revision 1.47 1997/02/24 02:30:27 mwg
11301 + * Added new log data: predictorErrData
11303 + * Revision 1.46 1997/02/22 03:00:22 liang
11304 + * Add echoCancelledSignalData.
11306 + * Revision 1.45 1997/02/21 01:26:42 liang
11307 + * Add six more bits for the Demodulator capabilities to deal with 2nd order
11308 + * time tracking & PLLs, as well as shorter NEEC & PFEEC, and front end HBF.
11310 + * Revision 1.44 1997/02/17 03:09:00 mwg
11311 + * Added LAPM statistics printout.
11313 + * Revision 1.43 1997/02/04 08:38:47 mwg
11314 + * Added dc cancelled samples printout.
11316 + * Revision 1.42 1997/01/29 21:40:28 mwg
11317 + * Changed the way timers work: now time is passed as Q4 ms instead of ticks.
11318 + * Completed the 8KHz front end implementation.
11319 + * Got rid of kSamplesPerSecond constant.
11321 + * Revision 1.41 1997/01/24 07:13:50 mwg
11322 + * Added new statuses for automoder.
11324 + * Revision 1.40 1997/01/23 02:03:08 mwg
11325 + * Replaced old sample rate conversion with the newer one.
11326 + * Still has to resolve the automoding issue.
11328 + * Revision 1.39 1997/01/21 00:55:04 mwg
11329 + * Added 8KHz front end functionality.
11331 + * Revision 1.38 1996/11/13 00:30:55 liang
11332 + * Add kAutoLoadReductionEnabled to demodCapabilities so that PFEEC, FEEC, IEEC
11333 + * can be disabled automatically, but for worst processor loading test they
11334 + * won't be disabled when this bit is not set.
11336 + * Revision 1.37 1996/11/07 23:07:18 mwg
11337 + * Rearranged global variables to allow V.17 short training.
11339 + * Revision 1.36 1996/09/17 23:55:05 liang
11340 + * Change kMaxDataBlockSize from 16 to 24 to handle high data rates.
11342 + * Revision 1.35 1996/09/05 19:43:39 liang
11343 + * Removed caller ID error status code kCallerIDUnknownMessageType, and
11344 + * added caller ID status codes kCallerIDUnknownMessage & kCallerIDWholeMessage.
11345 + * Changed the callerIDStatus report structure.
11347 + * Revision 1.34 1996/08/29 00:36:57 liang
11348 + * Added kLapmTxFrameStatus and kLapmRxFrameStatus.
11350 + * Revision 1.33 1996/08/27 22:56:01 liang
11351 + * Added kResetHardware status code.
11353 + * Revision 1.32 1996/08/23 23:35:35 liang
11354 + * Add kATDebugStatus and function SoftModemGetHybridDelay.
11356 + * Revision 1.31 1996/08/22 01:13:19 yg
11357 + * Added AT command processor.
11359 + * Revision 1.30 1996/08/12 21:46:47 mwg
11360 + * Added code to report capabilities.
11362 + * Revision 1.29 1996/08/10 01:59:59 mwg
11363 + * Added report of the sent rate sequence;
11365 + * Revision 1.28 1996/08/07 22:15:02 mwg
11366 + * Added new status reports:
11367 + * kRemoteFreqOffset
11368 + * kIEECDeactivated
11369 + * kPFEECDeactivated
11371 + * Revision 1.27 1996/06/27 05:15:48 mwg
11372 + * Added V.24 circuit status.
11374 + * Revision 1.26 1996/06/27 02:12:43 mwg
11375 + * Cleaned the code.
11377 + * Revision 1.25 1996/06/20 23:57:30 mwg
11378 + * Added new training progress status.
11380 + * Revision 1.24 1996/06/18 21:13:50 mwg
11381 + * Added trellis MSE data logging.
11383 + * Revision 1.23 1996/06/12 02:31:10 mwg
11384 + * Added new type: VeryLong
11386 + * Revision 1.22 1996/06/08 22:15:39 mwg
11387 + * Added new status report: kCleardownStarted
11388 + * Added new field for the features: kV34bisEnabled
11390 + * Revision 1.21 1996/05/31 00:29:11 liang
11391 + * Add feature bit kV34ExtraINFOPreamble.
11393 + * Revision 1.20 1996/05/30 23:28:31 mwg
11394 + * Replaced enums with #defines
11396 + * Revision 1.19 1996/05/25 00:38:27 mwg
11397 + * Added kProjectedDataRate training progress report.
11399 + * Revision 1.18 1996/05/24 23:27:15 mwg
11400 + * Added mode status codes.
11402 + * Revision 1.17 1996/05/10 05:39:59 liang
11403 + * Move the includes for DEBUG inside "ifndef SoftModemTypes" so that
11404 + * cap build won't break.
11406 + * Revision 1.16 1996/05/08 01:49:34 mwg
11407 + * Added capability to setup auxiliary data channel handlers.
11409 + * Revision 1.15 1996/05/07 22:51:08 liang
11410 + * Added group delay estimation and improved symbol rate selection process.
11412 + * Revision 1.14 1996/05/06 06:49:09 mwg
11413 + * Fixed linux problems.
11415 + * Revision 1.13 1996/05/02 08:40:16 mwg
11416 + * Merged in Chromatic bug fixes.
11418 + * Revision 1.12 1996/05/02 02:26:21 mwg
11419 + * Added code to implement dozing functionality for v.34.
11421 + * Revision 1.11 1996/05/01 22:43:13 mwg
11422 + * Added new command: kDozeCmd;
11424 + * Revision 1.10 1996/05/01 19:20:16 liang
11425 + * Add command codes kInitiateRetrainCmd and kInitiateRateRenegotiationCmd.
11427 + * Revision 1.9 1996/04/25 01:12:37 mwg
11428 + * Added new flag: rapid preliminary EC training.
11430 + * Revision 1.8 1996/04/20 02:26:22 mwg
11431 + * Added preliminary far-end echo support
11433 + * Revision 1.7 1996/04/15 23:26:16 mwg
11434 + * Changed flag definitions for v34 modem.
11436 + * Revision 1.6 1996/04/04 02:35:50 liang
11437 + * Change kCid from 0x0080 to 0x0004 (0x0080 is defined as kV32).
11439 + * Revision 1.5 1996/03/08 23:07:01 mwg
11440 + * Added name for the struct.
11442 + * Revision 1.4 1996/03/02 00:59:27 liang
11443 + * Added typedef for V34CodingParameters structure.
11445 + * Revision 1.3 1996/02/27 02:28:31 mwg
11446 + * Fixed a bug in kLapmLongADPEnabled definition.
11448 + * Revision 1.2 1996/02/19 23:50:59 liang
11449 + * Removed compressionSetup parameter from the link layer command structure.
11451 + * Revision 1.1.1.1 1996/02/14 02:35:13 mwg
11452 + * Redesigned the project directory structure. Merged V.34 into the project.
11454 + * Revision 1.5 1996/01/15 23:26:04 liang
11455 + * Change the softmodem command structure name from SoftwareModemCommand
11456 + * to SoftwareModemCommandParameters.
11458 + *****************************************************************************/
11459 +#ifndef SoftModemPh
11460 +#define SoftModemPh
11462 +/****************************************************************************/
11463 +/* 1. Type definitions. */
11465 +/* 1.1 General types */
11466 +/****************************************************************************/
11472 +#ifdef __VxWORKS__
11473 +#include <types/vxTypesOld.h>
11477 +/* We have to define __wchar_t for Linux */
11478 +#if defined __linux__ && !defined _NO_WHCAR_DEF_
11479 +typedef long int __wchar_t;
11481 +#if !defined(__KERNEL__) && !defined(_CFE_)
11482 +#include <stdio.h>
11483 +#include <stdlib.h>
11486 +#if defined(__linux__) || defined (__unix__) || defined (__unix) || (defined (__mips__) && !defined(_CFE_) && !defined(VXWORKS) && !defined(TARG_OS_RTEMS))/* enable if necessary, but not for dos-based builds */
11487 +#include <linux/types.h>
11491 +#endif /* DEBUG */
11493 +#if defined(W95_DRIVER)
11494 +#pragma code_seg("_LTEXT", "LCODE")
11495 +#pragma data_seg("_LDATA", "LCODE")
11496 +#pragma const_seg("_LDATA", "LCODE")
11497 +#pragma bss_seg("_LDATA", "LCODE")
11499 +#endif /* W95_DRIVER */
11501 +#ifndef SoftModemTypes
11502 +#include "SoftModemTypes.h"
11503 +#endif /* SoftModemTypes */
11514 + uchar denominator;
11544 + ushort x0, x1, x2;
11553 + uchar defaultValue; /* default value */
11554 + uchar maxValue; /* max allowed value */
11555 + uchar minValue; /* should be greater then maxValue to make reg readonly */
11558 + } SRegisterDefinition;
11560 +#define MacroPaste2(a,b) a##b
11561 +#define MacroPaste(a,b) MacroPaste2(a,b)
11562 +#define ALWAYS_LONG_ALIGN() long MacroPaste(ALIGNMENT,__LINE__);
11564 +#ifdef USE_LONG_ALIGN
11565 +#define LONG_ALIGN() ALWAYS_LONG_ALIGN()
11567 +#define LONG_ALIGN()
11570 +typedef ulong bitMap;
11574 +#define kVerySlow 1
11580 +/****************************************************************************/
11581 +/* 1. Type definitions. */
11583 +/* 1.2 Modem specific types */
11584 +/****************************************************************************/
11586 +typedef long directionType;
11592 +#define originating kXmt
11593 +#define answering kRcv
11596 +#define kOrgAns kXmtRcv
11598 +#define ORIGINATING originating
11599 +#define ANSWERING answering
11601 +typedef int pcmCodingType;
11602 +#define kMuLawPCM 0
11603 +#define kALawPCM 1
11605 +#define kMuLawPCMScaleShift 2
11606 +#define kALawPCMScaleShift 3
11608 +/* link layer and framer share defines */
11609 +typedef bitMap framerType;
11610 +typedef bitMap linkLayerType;
11611 +#define kNoFramer 0
11612 +#define kSync 0x00000001
11613 +#define kAsync 0x00000002
11614 +#define kHDLC 0x00000004
11615 +#define kLapm 0x00000008
11616 +#define kMnp 0x00000010
11617 +#define kV70 0x00000020
11618 +#define kSAM 0x00000040
11621 +typedef bitMap modulationMap;
11622 +typedef bitMap symbolRateMap;
11623 +typedef bitMap dataRateMap;
11624 +typedef bitMap featureMap;
11625 +typedef bitMap breakType;
11627 +typedef bitMap audioType;
11628 +#define kRawAudio 0
11629 +#define kAudioG729A 1
11630 +#define kAudioG729 2
11631 +#define kAudioG723 3
11634 +#ifndef ADSL_MODEM
11635 +typedef long modemStatusCode;
11637 + /* Information status Codes: 1-31 */
11638 +#define kSetSampleRate 1
11639 +#define kModulationKnown 2
11640 +#define kRxSymbolRate 3
11641 +#define kTxSymbolRate 4
11642 +#define kRxCarrierFreq 5
11643 +#define kTxCarrierFreq 6
11644 +#define kTxPreemphasisFilter 7
11645 +#define kTxPowerAdjustment 8
11646 +#define kRemoteTxPreemphasisFilter 9
11647 +#define kRemoteTxPowerAdjustment 10
11648 +#define kRxRateKnown 11
11649 +#define kTxRateKnown 12
11650 +#define kRxDataModeActive 13
11651 +#define kTxDataModeActive 14
11652 +#define kTxSignalCompleted 15
11653 +#define kDTMFSignalDetected 16
11654 +#define kModemSignalDetected 17
11655 +#define kCallProgressSignalDetected 18
11656 +#define kCustomSignalDetected 19
11657 +#define kFaxPreambleDetected 20
11658 +#define kV24CircuitStatusChange 21
11659 +#define kHookStateChange 22
11660 +#define kCallWaitingToneDetected 23
11661 +#define kMultiToneSignalDetected 24
11662 +#define kPulseShuntStateChange 25
11663 +#define kRingFrequency 26
11666 + /* Warning status Codes: 32-64 */
11668 +#define kV34Exception 33
11669 +#define kClearDownLocal 34
11670 +#define kClearDownRemote 35
11671 +#define kCarrierPresent 36
11672 +#define kCarrierLost 37
11673 +#define kRetrainingLocal 38
11674 +#define kRetrainingRemote 39
11675 +#define kRateRenegotiationLocal 40
11676 +#define kRateRenegotiationRemote 41
11677 +#define kFallbackStarted 42
11678 +#define kFallForwardStarted 43
11679 +#define kCleardownStarted 44
11680 +#define kIllegalCommand 45
11682 + /* Auxiliary status Codes: 64-.. */
11683 +#define kTrainingProgress 64
11684 +#define kConnectionInfo 65
11685 +#define kDialerStatus 66
11686 +#define kFramingInfo 67
11687 +#define kBreakReceived 68
11688 +#define kLapmStatus 69
11689 +#define kLapmParameter 70
11690 +#define kV42bisStatus 71
11691 +#define kCallerIDStatus 72
11692 +#define kIOStatus 73
11693 +#define kCapabilitiesStatus 74
11694 +#define kSpeakerStatus 75
11695 +#define kATProfileChanged 76
11696 +#define kATDebugStatus 77
11697 +#define kResetHardware 78
11698 +#define kV8bisStatus 79
11699 +#define kMnpStatus 80
11700 +#define kMnpParameter 81
11701 +#define kV70Status 82
11702 +#define kV70Parameter 83
11703 +#define kFaxClass2Status 84
11704 +#define kAudioStatus 85
11705 +#define kAudioParameter 86
11706 +#define kOverlayStatus 87
11707 +#define kCallerIDCircuitStatus 88
11708 +#define kV80Status 89
11709 +#define kV80Parameter 90
11710 +#define kLocalCountryChanged 91
11711 +#define kDTERateChanged 92
11712 +#define kATResponse 93
11713 +#define kFramerConfigured 94
11714 +#define kA8RStatus 95
11715 +#define kA8TStatus 96
11716 +#define kVersionStatus 97
11718 + /* Testing status codes: 128-... */
11719 + /* These statuses are generated by modem test suit */
11720 +#define kTestFinished 128
11721 +#define kConnectivityTestFinished 129
11722 +#define kTestCheckSum 130
11723 +#define kLogFileControl 131
11724 +#define kTestAtmVcFinished 132
11725 +#define kTestClearEocFinished 133
11726 +#define kTestG997Finished 134
11728 +typedef long modemErrorCode;
11729 +#define kNoError 0
11730 +#define kErrorTimerExpired 1
11731 +#define kErrorNoSReceived 2
11732 +#define kErrorNoSbarReceived 3
11735 +typedef long dialerStatusCode;
11736 +#define kDialCompleted 0
11737 +#define kNoDialToneDetected 1
11738 +#define kBongToneDetected 2
11739 +#define kNoBongToneDetected 3
11740 +#define kErrorIllegalDialModifier 5
11741 +#define kDialStarted 6
11742 +#define kExternalPulseDialDigit 7
11745 +typedef long framingInfoCode;
11746 +#define kRxFrameOK 0
11747 +#define kRxFrameTooLong 1
11748 +#define kRxFrameCRCError 2
11749 +#define kTxFrameUnderrun 3
11750 +#define kRxFrameOverrun 4
11751 +#define kRxFrameAborted 5
11752 +#define kRxFrameParityError 6
11753 +#define kRxFrameFormatError 7
11754 +#define kRxFrameHDLCFlagsDetected 8
11757 +typedef long IOStatusCode;
11758 +#define kRxDataReady 0
11759 +#define kRxBufferOverflow 1
11760 +#define kTxSpaceAvailable 2
11761 +#define kTxBufferEmpty 3
11763 +typedef long capabilitiesStatusCode;
11764 +#define kSymbolRates 0
11765 +#define kDataRates 1
11766 +#define kFeatures 2
11767 +#define kDemodCapabilities 3
11768 +#define kRateThresholdAdjustment 4
11769 +#define kXmtLevel 5
11770 +#define kHybridDelay 6
11771 +#define kAuxFeatures 7
11774 +typedef long A8TStatusCode;
11775 +#define kA8TFinished 0
11777 +typedef long callerIDStatusCode;
11778 +#define kCallerIDError 0
11779 +#define kCallerIDChannelSeizureReceived 1
11780 +#define kCallerIDMarkSignalReceived 2
11781 +#define kCallerIDTime 3
11782 +#define kCallerIDTelnum 4
11783 +#define kCallerIDName 5
11784 +#define kCallerIDEnd 6
11785 +#define kCallerIDUnknownMessage 7
11786 +#define kCallerIDWholeMessage 8
11789 +typedef long callerIDErrorCode;
11790 +#define kCallerIDNoError 0
11791 +#define kCallerIDMarkSignalError 1
11792 +#define kCallerIDTooManyMarkBits 2
11793 +#define kCallerIDMessageTooLong 3
11794 +#define kCallerIDChecksumError 4
11797 +typedef long connectionInfoCode;
11798 +#define kRTDelay 1
11799 +#define kRxSignalLevel 2
11800 +#define kTimingOffset 3
11801 +#define kFreqOffset 4
11802 +#define kPhaseJitter 5
11804 +#define kNearEchoLevel 7
11806 +#define kNearEndDelay 9
11807 +#define kFarEchoLevel 10
11808 +#define kL1L2SNRDifference 11
11809 +#define kDCOffset 12
11810 +#define kTotalRxPower 13
11811 +#define kRemoteFreqOffset 14
11812 +/* obsolete #define kV8MenuDataWord1 15 */
11813 +/* obsolete #define kV8MenuDataWord2 16 */
11814 +#define kPCMP2AnalogDetSNR 17
11815 +#define kPCMP2DigitalDetSNR 18
11816 +#define kPCMP2RBSDetSNR 19
11817 +#define kEqCenterTapOffset 20
11818 +#define kPCMPadValue 21
11819 +#define kPCMRBSMap 22
11820 +#define kPCMCodingType 23
11821 +#define kPCMSpectralShapingBits 24
11822 +#define kLoopbackSelfTestResult 25
11823 +#define kEyeQuality 26
11824 +#define kLoopbackSelfTestNewErrs 27
11825 +#define kV34EqlLengthStatus 28
11826 +#define kV34EqlOffsetStatus 29
11827 +#define kV8CallMenuData 30
11828 +#define kV8JointMenuData 31
11829 +#define kPCMClientIeecLengthStatus 32
11830 +#define kPCMClientIeecOffsetStatus 33
11831 +#define kSeamlessRateChange 34
11833 +typedef long trainingProgressCode;
11834 +#define kPeriodicalSignalDetected 0
11835 +#define kPhaseReversalDetected 1
11836 +#define kSignalStartDetected 2
11837 +#define kSignalEndDetected 3
11838 +#define kSSignalDetected 4
11839 +#define kSbarSignalDetected 5
11840 +#define kJ4SignalDetected 6
11841 +#define kJ16SignalDetected 7
11842 +#define kJprimeSignalDetected 8
11843 +#define kMPSignalDetected 9
11844 +#define kMPprimeSignalDetected 10
11845 +#define kMPSignalSent 11
11846 +#define kMPprimeSignalSent 12
11847 +#define kRateSignalDetected 13
11848 +#define kESignalDetected 14
11849 +#define kRateSignalSent 15
11851 +#define kAutomodingTryModulation 16
11852 +#define kAutomodingCompleted 17
11853 +#define kRCFaxBitMapStatus 18
11855 +#define kV8CIDetected 19
11856 +#define kV8ANSToneDetected 20
11857 +#define kV8ANSamDetected 21
11858 +#define kV8CMDetected 22
11859 +#define kV8JMDetected 23
11860 +#define kV8CJDetected 24
11861 +#define kV8Finished 25
11863 +#define kV34Phase2Started 26
11864 +#define kV34Phase2INFOSequenceDetected 27
11865 +#define kV34Phase2NearEndEchoDetected 28
11866 +#define kV34Phase2L1Receiving 29
11867 +#define kV34Phase2L2Receiving 30
11868 +#define kV34Phase2Finished 31
11869 +#define kV34Phase3Started 32
11870 +#define kV34Phase3Finished 33
11871 +#define kV34Phase4Started 34
11872 +#define kV34Phase4Finished 35
11873 +#define kV34DecoderParameters 36
11874 +#define kV34EncoderParameters 37
11876 +#define kMaxLocalRxDataRate 38
11877 +#define kMaxLocalTxDataRate 39
11878 +#define kMaxRemoteRxDataRate 40
11879 +#define kMaxRemoteTxDataRate 41
11880 +#define kProjectedDataRate 42
11881 +#define kFEECDeactivated 43
11882 +#define kIEECDeactivated 44
11883 +#define kPFEECDeactivated 45
11884 +#define kPhaseJitterDeactivated 46
11886 +#define kPCMP2DetectedDigitalConnection 47
11887 +#define kPCMP2DetectedRBS 48
11888 +#define kX2DetectedPhase1Escape 49
11890 +#define kStarted1200BpsTraining 50
11891 +#define kStarted2400BpsTraining 51
11892 +#define kUnscrambledOneDetected 52
11893 +#define kScrambled1200BpsOneDetected 53
11894 +#define kScrambled2400BpsOneDetected 54
11895 +#define kV22BisS1Detected 55
11896 +#define kV22InitiateLoop2Test 56
11897 +#define kV22RespondLoop2Test 57
11898 +#define kV22Loop2TestAlt01Detected 58
11900 +#define kDataModemLoop1TestStarted 59
11901 +#define kDataModemLoop1TestFinished 60
11902 +#define kDataModemLoop2TestStarted 61
11903 +#define kDataModemLoop2TestFinished 62
11904 +#define kDataModemLoop3TestStarted 63
11905 +#define kDataModemLoop3TestFinished 64
11906 +#define kDataModemSelfLoopTestEnabled 65
11908 +#define kPCMPhase3Started 70
11909 +#define kPCMPhase3Finished 71
11910 +#define kPCMPhase4Started 72
11911 +#define kPCMPhase4Finished 73
11913 +#define kV90JaSignalDetected 74
11914 +#define kV90JdSignalDetected 75
11915 +#define kV90JdPrimeSignalDetected 76
11916 +#define kV90RSignalDetected 77
11917 +#define kV90RBarSignalDetected 78
11918 +#define kV90CPSignalDetected 79
11920 +#define kV90CPtSignalSent 80
11921 +#define kV90CPSignalSent 81
11922 +#define kV90CPprimeSignalSent 82
11925 +#define kV34SeamlessRateChangeRequestSent 83
11926 +#define kV34SeamlessRateChangeUpdateSent 84
11927 +#define kV34SeamlessRateChangeRequestReceived 85
11928 +#define kV34SeamlessRateChangeUpdateReceived 86
11929 +#define kV34SeamlessRateChangeUpdateTimeout 87
11931 +#define kV90JaSignalAcknowledged 88
11933 +#define kV34HCtrlChanPPhDetected 100
11934 +#define kV34HCtrlChanMPhDetected 101
11935 +#define kV34HCtrlChanRatesKnown 102
11936 +#define kV34HDXCtrlChanBinary1Detected 103
11937 +#define kV34HDXPhase3Started 104
11938 +#define kV34HDXPhase3Finished 105
11939 +#define kV34HDXPrimChanBinary1Detected 106
11940 +#define kFlexEventTRN2AFinished 107
11942 +#define kV32RanginigStarted 108
11943 +#define kV32RangingStarted 108
11944 +#define kV32RanginigFinished 109
11945 +#define kV32RangingFinished 109
11948 +typedef long lapmStatusCode;
11949 +#define kLapmDisconnected 0 /* LAPM disconnected */
11950 +#define kLapmConnected 1 /* LAPM is connected */
11951 +#define kLapmV42ODPDetected 2 /* LAPM ODP is detected */
11952 +#define kLapmV42ADPDetected 3 /* LAPM V.42 ADP is detected */
11953 +#define kLapmUnknownADPDetected 4 /* LAPM Unsupported ADP is detected */
11954 +#define kLapmTimeout 5 /* LAPM Timeout */
11955 +#define kLapmMNPFrameDetected 6 /* LAPM detected MNP frame */
11956 +#define kLapmDPDetectionTimedOut 7 /* LAPM Unsupported ADP is detected */
11957 +#define kLapmError 8 /* LAPM Error */
11958 +#define kLapmTestResult 9 /* LAPM loopback test result */
11959 +#define kLapmTxFrameStatus 10
11960 +#define kLapmRxFrameStatus 11
11961 +#define kLapmTxStatistics 12
11962 +#define kLapmRxStatistics 13
11964 +typedef long lapmTakedownReason;
11965 +#define kLapmRemoteDisconnect 0
11966 +#define kLapmLocalDisconnect 1
11967 +#define kLapmCannotConnect 2
11968 +#define kLapmProtocolError 3
11969 +#define kLapmCompressionError 4
11970 +#define kLapmInactivityTimer 5
11971 +#define kLapmRetryFailed 6
11974 +typedef long lapmParameterCode;
11975 +#define kLapmXmtK 0
11976 +#define kLapmRcvK 1
11977 +#define kLapmXmtN401 2
11978 +#define kLapmRcvN401 3
11979 +#define kLapmTESTSupport 4
11980 +#define kLapmSREJSupport 5
11981 +#define kLapmCompDir 6
11982 +#define kLapmCompDictSize 7
11983 +#define kLapmCompStringSize 8
11986 +typedef long lapmErrorCode;
11987 +#define kLapmNoError 0
11988 +#define kLapmBufferOverflow 1
11989 +#define kLapmFrameTooLong 2
11990 +#define kLapmBadFrame 3
11991 +#define kLapmUnknownEvent 4
11992 +/* 6 is reserved for kLapmRetryFailed defined above */
11995 +typedef long lapmTestResultCode;
11996 +#define kLapmTestPassed 0
11997 +#define kLapmTestRequestIgnored 1
11998 +#define kLapmTestAlreadyInProgress 2
11999 +#define kLapmTestNotSupported 3
12000 +#define kLapmTestFailed 4
12003 +typedef long v42bisStatusCode;
12004 +#define kV42bisEncoderTransparentMode 0 /* V.42bis encoder transparent mode active */
12005 +#define kV42bisEncoderCompressedMode 1 /* V.42bis encoder compressed mode active */
12006 +#define kV42bisDecoderTransparentMode 2 /* V.42bis decoder transparent mode active */
12007 +#define kV42bisDecoderCompressedMode 3 /* V.42bis decoder compressed mode active */
12008 +#define kV42bisError 4 /* V.42bis error */
12009 +#define kV42bisEncoderStatistics 5
12010 +#define kV42bisDecoderStatistics 6
12013 +typedef long v42bisErrorCode;
12014 +#define kV42bisUndefinedEscSequence 0 /* V.42bis undefined escape sequence */
12015 +#define kV42bisCodewordSizeOverflow 1 /* V.42bis codeword size overflow */
12016 +#define kV42bisUndefinedCodeword 2 /* V.42bis undefined codeword */
12018 +typedef long mnpStatusCode;
12019 +#define kMnpDisconnected 0 /* Mnp disconnected */
12020 +#define kMnpConnected 1 /* Mnp is connected */
12021 +#define kMnpFallback 2 /* Mnp is falling back to buffer mode */
12022 +#define kMnpError 3 /* Mnp Error */
12023 +#define kMnpTimeout 4 /* Mnp Timeout */
12024 +#define kMnpInvalidLT 5 /* Invalid LT received */
12025 +#define kMnpRetransmitFrame 6
12026 +#define kMnpNack 7
12027 +#define kMnpTxFrameStatus 8
12028 +#define kMnpRxFrameStatus 9
12029 +#define kMnpTxStatistics 10
12030 +#define kMnpRxStatistics 11
12032 +typedef long mnpTakedownReason;
12033 +#define kMnpRemoteDisconnect 0
12034 +#define kMnpLocalDisconnect 1
12035 +#define kMnpCannotConnect 2
12036 +#define kMnpProtocolError 3
12037 +#define kMnpCompressionError 4
12038 +#define kMnpInactivityTimer 5
12039 +#define kMnpRetryFailed 6
12042 +typedef long mnpParameterCode;
12043 +#define kMnpProtocolLevel 0
12044 +#define kMnpServiceClass 1
12045 +#define kMnpOptimizationSupport 2
12046 +#define kMnpCompressionSupport 3
12047 +#define kMnpN401 4
12051 +typedef long mnpErrorCode;
12052 +#define kMnpNoError 0
12053 +#define kMnpBufferOverflow 1
12054 +#define kMnpFrameTooLong 2
12055 +#define kMnpBadFrame 3
12056 +#define kMnpUnknownEvent 4
12059 +typedef long v70StatusCode;
12060 +#define kV70Disconnected 0 /* V70 disconnected */
12061 +#define kV70Connected 1 /* V70 is connected */
12062 +#define kV70Error 2 /* V70 Error */
12063 +#define kV70Timeout 3 /* V70 Timeout */
12064 +#define kV70ChannelDown 4 /* V70 channel released */
12065 +#define kV70ChannelUp 5 /* V70 channel established */
12066 +#define kV70AudioChannelDown 6 /* V70 audio channel released */
12067 +#define kV70AudioChannelUp 7 /* V70 audio channel established */
12068 +#define kV70DataChannelDown 8 /* V70 data channel released */
12069 +#define kV70DataChannelUp 9 /* V70 data channel established */
12070 +#define kV70OOBChannelDown 10 /* V70 out-of-band channel released */
12071 +#define kV70OOBChannelUp 11 /* V70 out-of-band channel established */
12072 +#define kV70TxFrameStatus 12
12073 +#define kV70RxFrameStatus 13
12074 +#define kV70TxStatistics 14
12075 +#define kV70RxStatistics 15
12076 +#define kV70StateTransition 16
12078 +typedef long v70TakedownReason;
12079 +#define kV70RemoteDisconnect 0
12080 +#define kV70LocalDisconnect 1
12081 +#define kV70CannotConnect 2
12082 +#define kV70ProtocolError 3
12083 +#define kV70CompressionError 4
12084 +#define kV70InactivityTimer 5
12085 +#define kV70RetryFailed 6
12088 +typedef long v70ParameterCode;
12089 +#define kV70SuspendResume 0
12090 +#define kV70CrcLength 1
12091 +#define kV70NumberOfDLCs 2
12094 +#define kV70LapmXmtK 10
12095 +#define kV70LapmRcvK 11
12096 +#define kV70LapmXmtN401 12
12097 +#define kV70LapmRcvN401 13
12098 +#define kV70LapmTESTSupport 14
12099 +#define kV70LapmSREJSupport 15
12100 +#define kV70LapmCompDir 16
12101 +#define kV70LapmCompDictSize 17
12102 +#define kV70LapmCompStringSize 18
12104 +#define kV70AudioHeader 20 /* if audio header is present in audio frames */
12105 +#define kV70BlockingFactor 21 /* audio blocking factor (default 1) */
12106 +#define kV70SilenceSuppression 22 /* audio silence suppression */
12110 +typedef long v70ErrorCode;
12111 +#define kV70NoError 0
12112 +#define kV70BadFrame 1
12114 +typedef long audioStatusCode;
12115 +#define kAudioFramesLost 0 /* One or more audio frames were lost */
12116 +#define kAudioTxBufferOverflow 1
12117 +#define kAudioRxBufferOverflow 2
12118 +#define kAudioRxBufferUnderflow 3
12121 +typedef long v80StatusCode;
12122 +#define kV80Disconnected 0 /* V80 disconnected */
12123 +#define kV80Connected 1 /* V80 is connected */
12124 +#define kV80Error 2 /* V80 Error */
12125 +#define kV80InBandStatus 3 /* V80 in-band SAM status */
12126 +#define kV80TxFrameStatus 12
12127 +#define kV80RxFrameStatus 13
12128 +#define kV80TxStatistics 14
12129 +#define kV80RxStatistics 15
12131 +typedef long v80TakedownReason;
12132 +#define kV80RemoteDisconnect 0
12133 +#define kV80LocalDisconnect 1
12135 +typedef long v80ErrorCode;
12136 +#define kV80NoError 0
12137 +#define kV80BadFrame 1
12139 +typedef long overlayStatusCode;
12140 +#define kOverlayBegin 0 /* DSP has halted */
12141 +#define kOverlayEnd 1 /* DSP has received entire overlay */
12142 +#define kOverlayElapsedTime 2 /* time elapsed(as viewed by datapump) during overlay */
12143 +#define kOverlayRecordingData 3 /* ms of data that we are recording */
12144 +#define kOverlayReplayingData 4 /* ms of data that we have replayed so far */
12145 +#define kOverlayReplayDone 5 /* playback is done */
12147 +/* types for kOverlayRecording/ReplayingData */
12148 +#define kOverlayTxData 0
12149 +#define kOverlayRxData 1
12152 + * Rockwell faxmodem compatible bitmap (kRCFaxBitMapStatus)
12154 +#define kRCFaxFCD 0x01
12155 +#define kRCFaxP2 0x02
12156 +#define kRCFaxPN 0x04
12157 +#define kRCFaxDCD 0x08
12158 +#define kRCFaxTX 0x10
12159 +#define kRCFaxCTS 0x20
12162 +#ifndef ADSL_MODEM
12163 +typedef long modemCommandCode;
12165 + /* Basic Action commands 00-63 */
12166 +#define kIdleCmd 0
12167 +#define kStartFaxModemCmd 1
12168 +#define kStartDataModemCmd 2
12169 +#define kStartCallProgressMonitorCmd 3
12170 +#define kSendTonesCmd 4
12171 +#define kStartCallerIDRcvCmd 5
12172 +#define kSetLinkLayerCmd 6
12173 +#define kSetFramerCmd 7
12174 +#define kTestLinkLayerCmd 8
12175 +#define kIdleRcvCmd 9
12176 +#define kIdleXmtCmd 10
12177 +#define kSetStatusHandlerCmd 11
12178 +#define kSetEyeHandlerCmd 12
12179 +#define kSetLogHandlerCmd 13
12180 +#define kSendBreakCmd 14
12181 +#define kSendTestCmd 15
12182 +#define kDisconnectLinkCmd 16
12183 +#define kSetXmtGainCmd 17
12184 +#define kStartADSICmd 18
12185 +#define kSetHybridDelayCmd 19
12186 +#define kCleardownCmd 20
12187 +#define kInitiateRetrainCmd 21
12188 +#define kInitiateRateRenegotiationCmd 22
12189 +#define kDialToneIndicator 23
12190 +#define kSetRxDataHandler 24 /* not used yet */
12191 +#define kSetTxDataHandler 25 /* not used yet */
12192 +#define kSetAuxRxDataHandler 26
12193 +#define kSetAuxTxDataHandler 27
12194 +#define kRingIndicatorCmd 28
12195 +#define kDTERateIndicatorCmd 29
12196 +#define kStartV8bisCmd 30
12197 +#define kSendMultiTonesCmd 31
12198 +#define kSetMultiToneParamsCmd 32
12199 +#define kSetModemSampleRateCmd 33
12200 +#define kStartDataModemPTTTestCmd 34
12201 +#define kStartDataModemLoopbackTestCmd 35
12202 +#define kRingFrequencyCmd 36
12203 +#define kSetCallWaitingDetectorStateCmd 37
12204 +#define kV34HDXTurnOffCurrentModeCmd 38
12205 +#define kSetAudioCmd 39
12206 +#define kLoopbackTestAutoRespEnableCmd 40
12207 +#define kSetCallProgressParamsCmd 41
12208 +#define kSetTrainingDelayReductionCmd 42
12209 +#define kSetFaxECMPageBufferPtrCmd 43
12210 +#define kSetLineCurrentStateCmd 44
12211 +#define kSetFramerParameterCmd 45
12212 +#define kStartDozeCmd 46
12213 +#define kEndDozeCmd 47
12214 +#define kStartRingFrequencyDetectorCmd 48
12215 +#define kSetBufferingDelayAdjustmentCmd 49
12217 + /* Composite action commands 64-127 */
12218 +#define kDialCmd 64
12219 +#define kSendCallingToneCmd 65
12220 +#define kV24CircuitChangeCmd 66
12221 +#define kStartATModeCmd 67
12222 +#define kStopATModeCmd 68
12223 +#define kSetATRegister 69
12224 +#define kSetATRegisterLimits 70
12225 +#define kSetATIResponse 71
12226 +#define kEnableATDebugMode 72
12227 +#define kSetWhiteListEntry 73
12228 +#define kSetBlackListEntry 74
12230 +#define kV70Setup 75 /* additional V70 configuration */
12231 +#define kEstablishChannel 76 /* Establish new link layer channel (V70) */
12232 +#define kReleaseChannel 77 /* Release link layer channel (V70) */
12233 +#define kWaitChannelEstablished 78 /* Wait for establishment of the new link layer channel (V70) */
12236 +#define kMnpOOBFrameCmd 80
12237 +#define kV80InBandCmd 81 /* V80 In-band commands */
12238 +#define kSetV250IdString 82
12239 +#define kSetInternationalTablesCmd 83
12240 +#define kConfigureCountryCmd 84
12241 +#define kConigureCountryCmd 84
12242 +#define kV8ControlCmd 85
12243 +#define kV8bisSendMessage 86
12244 +#define kSetHWIdCmd 87
12245 +#define kSetCodecIdCmd 88
12246 +#define kOverCurrentDetected 89
12250 +typedef long v8ControlType;
12251 +#define kEnableDTEControl 1
12252 +#define kSetV8ControlTimeout 2
12253 +#define kSetCIValue 3
12254 +#define kSetCMValue 4
12255 +#define kSetJMValue 5
12257 +#define kSetCallFunctionCategory 7
12259 +typedef long v250IdStringCode;
12260 +#define kGMIString 1
12261 +#define kGMMString 2
12262 +#define kGMRString 3
12263 +#define kGSNString 4
12264 +#define kGOIString 5
12266 +typedef long kCallProgressParameterCode;
12267 +#define kModemSignalPowerThreshold 1
12268 +#define kDialtonePowerThreshold 2
12269 +#define kRingBackPowerThreshold 3
12270 +#define kBusyPowerThreshold 4
12271 +#define kReorderPowerThreshold 5
12272 +#define k2ndDTnPowerThreshold 6
12273 +#define kMinDialtoneTime 7
12274 +#define kDialtoneFreqRange 8
12275 +#define kRingBackFreqRange 9
12276 +#define kBusyFreqRange 10
12277 +#define kReorderFreqRange 11
12278 +#define k2ndDTnFreqRange 12
12281 +typedef long framerParameterCode;
12282 +#define kSetHDLCLeadingFlags 0
12283 +#define kHDLCResetFlagDetection 1
12284 +#define kSyncFramerSetup 2
12285 +#define kHDLCSendCRC 3
12286 +#define kHDLCSendFlags 4
12287 +#define kHDLCSendAborts 5
12290 +typedef long logDataCode;
12295 +#define neecData 4
12297 +#define ieecData 6
12298 +#define feecData 7
12299 +#define eqlPllData 8
12300 +#define feecPllData 9
12301 +#define timingData 10
12302 +#define pjPhaseErrData 11
12303 +#define pjEstimateData 12
12304 +#define pjEstDiffData 13
12305 +#define pjCoefData 14
12306 +#define inputSignalData 15
12307 +#define outputSignalData 16
12308 +#define agcGainData 17
12309 +#define automoderData 18
12310 +#define v8CMData 19
12311 +#define v8JMData 20
12312 +#define inputAfterNeecData 21
12313 +#define eqlErrData 22
12314 +#define dpskMicrobitsData 23
12315 +#define v34P2LSamplesData 24
12316 +#define phaseSplittedLData 25
12317 +#define fftedLData 26
12318 +#define channelSNRData 27
12319 +#define noiseEstimateData 28
12320 +#define signalEstimateData 29
12321 +#define v34INFOData 30
12322 +#define v34ChanProbData 31
12323 +#define v34P2OutputData 32
12324 +#define v8ANSamDetectData 33
12325 +#define pFeecData 34
12326 +#define channelDelayData 35
12327 +#define timingOffsetData 36
12328 +#define trellisMSEData 37
12329 +#define interpolatedSignalData 38
12330 +#define dcCancelledSignalData 39
12331 +#define echoCancelledSignalData 40
12332 +#define predictorErrData 41
12333 +#define commandInfoData 42
12334 +#define unusedInfoData 43
12335 +#define atCommandInfoData 44
12336 +#define atResponseInfoData 45
12337 +#define hwTerminalTxData 46
12338 +#define hwTerminalRxData 47
12339 +#define statusInfoData 48
12340 +#define channelResponseData 49
12341 +#define channelImpulseRespData 50
12342 +#define x2PcmP1DetectorInData 51
12343 +#define x2PcmP1DetectorOutData 52
12344 +#define eqlRealData 53
12345 +#define ieecRealData 54
12346 +#define neecOutputData 55
12347 +#define precodedEqlOutputData 56
12348 +#define eqlRealErrData 57
12349 +#define idealEqlOutputData 58
12350 +#define agcData 59
12351 +#define pcmInfidelityData 60
12352 +#define v42bisCycleCount 61
12353 +#define pcmImdOffsetCoefData 62
12354 +#define pcmImdOffsetData 63
12355 +#define v90RcvdDilLongData 64
12356 +#define v90RcvdDilShortData 65
12357 +#define v90DilProducedData 66
12358 +#define pcmEncoderKbitsData 67
12359 +#define pcmEncoderMbitsData 68
12360 +#define pcmEncoderSbitsData 69
12361 +#define pcmDecoderKbitsData 70
12362 +#define pcmDecoderMbitsData 71
12363 +#define pcmDecoderSbitsData 72
12364 +#define v90CPorCPtData 73
12365 +#define mnpDecoderInputData 74
12366 +#define mnpDecoderOutputData 75
12367 +#define v42bisEncoderInputData 76
12368 +#define v42bisDecoderInputData 77
12369 +#define modulatorInputData 78
12370 +#define modulatorOutputData 79
12371 +#define encodedStatusData 80
12372 +#define blockFramerTxData 81
12373 +#define blockFramerRxData 82
12374 +#define framerTxData 83
12375 +#define framerRxData 84
12376 +#define dpskBasebandData 85
12377 +#define dpskBasebandLPFedData 86
12378 +#define dpskRealData 87
12379 +#define bandEdgeCorrectedSignalData 88
12380 +#define atmLogData 89
12381 +#define clearEocLogData 90
12382 +#define g997LogData 91
12385 +#define kLogDataDelimiter 0xFEFEFEFE
12387 +/****************************************************************************/
12388 +/* 1. Type definitions. */
12390 +/* 1.3 Handlers */
12391 +/****************************************************************************/
12393 +typedef void (SM_DECL *rcvHandlerType) (void *gDslVars, int, short*);
12394 +typedef void (SM_DECL *xmtHandlerType) (void *gDslVars, int, short*);
12395 +typedef int (SM_DECL *xmtHandlerWithRtnValType) (void *gDslVars, int, short*);
12396 +typedef void (SM_DECL *timerHandlerType) (void *gDslVars, long);
12397 +typedef int (SM_DECL *interpolatorHandlerType) (void *gDslVars, int, short*, short*);
12398 +typedef void (SM_DECL *controlHandlerType) (void *gDslVars, int);
12400 +typedef int (SM_DECL *txDataHandlerType) (void *gDslVars, int, uchar*);
12401 +typedef int (SM_DECL *rxDataHandlerType) (void *gDslVars, int, uchar*);
12403 +typedef bitMap (SM_DECL *signalDetectorType) (void *gDslVars, int, long, long*);
12406 +typedef void (SM_DECL *hookHandlerType) (void *gDslVars, Boolean);
12408 +typedef short* (SM_DECL *sampBuffPtrType) (void *gDslVars, int);
12410 +typedef void (SM_DECL *eyeHandlerType) (void *gDslVars, int, ComplexShort*);
12411 +typedef void (SM_DECL *logHandlerType) (void *gDslVars, logDataCode, ...);
12413 +typedef void (SM_DECL *voidFuncType) (void *gDslVars);
12415 +typedef int (SM_DECL *txAudioHandlerType) (void *gDslVars, int, short*);
12416 +typedef int (SM_DECL *rxAudioHandlerType) (void *gDslVars, int, short*);
12419 +/****************************************************************************/
12420 +/* 1. Type definitions. */
12422 +/* 1.4 Structures */
12423 +/****************************************************************************/
12426 + * AT command processor definitions
12428 +#define kATRegistersNumber 56
12429 +#define kFirstConfigurationRegister 500
12430 +#define kLastConfigurationRegister 515
12431 +#define kFirstInternationalRegister 516
12432 +#define kLastInternationalRegister 595
12436 +#define kATMaxDialStringSize 128
12441 + uchar loadNumber; /* Which profile to load upon powerup/reset */
12442 + uchar countryCode; /* T.35 Country Code */
12443 + uchar profile[2][kATRegistersNumber];
12444 + uchar dialString[4][kATMaxDialStringSize + 1];
12446 + ulong versionCode;
12447 + ulong crcCheckSum;
12448 + } NVRAMConfiguration;
12450 +/* Structure to hold international settings */
12455 + const SRegisterDefinition *userRegisters;
12456 + const ulong *configRegisters;
12457 + } CountryDescriptor;
12460 + * V.34 coding parameters structure
12465 + /* DO NOT CHANGE THE ORDER OF FIELDS IN THIS STRUCTURE!
12466 + * (Some assembly code depends on it!) If you
12467 + * must add fields, please do so at the bottom.
12470 + int symbolRateIndex,
12472 + userSNRAdjustment;
12473 + Boolean auxChannel,
12474 + expConstellation,
12477 + schar J, /* number of data frames in superframe */
12478 + P, /* number of mapping frames in a data frame */
12479 + r, /* number of high mapping frames in a data frame */
12480 + b, /* number of data bits in a mapping frame */
12481 + W, /* number of aux bits in a data frame */
12482 + K, /* number of S bits in a mapping frame */
12483 + q, /* number of Q bits in a 2D symbol */
12484 + M; /* number of rings in shell mapping */
12485 + long nominalVariance; /* the signal variance which gives 1e-2 BLER Q10 */
12486 + int bitsPerDataFrame;
12487 + short quantRoundOff,
12489 + uchar nTrellisStates,
12490 + log2NTrellisStates;
12495 + ushort bitInversionPattern;
12496 + } V34CodingParams;
12498 +typedef long v8bisStatusCode;
12499 +typedef bitMap v8bisConnectionSetup;
12500 +#if defined(V8BIS) || defined(AT_COMMANDS_V8BIS)
12501 +#include "V8bisMainTypes.h"
12504 +#define kMaxMultiTones 4 /* MultiTone: search for up to this many tones at once */
12506 +#ifndef ADSL_MODEM
12509 + modemStatusCode code;
12514 + modemErrorCode error;
12515 + modulationMap modulation;
12516 + modulationMap modemSignal;
12517 + dataRateMap dataRate;
12519 + bitMap callProgressSignal;
12520 + bitMap customSignal;
12526 + long tones[kMaxMultiTones];
12530 + v8bisStatusCode code;
12535 + trainingProgressCode code;
12545 + trainingProgressCode code;
12547 + } advancedTrainingInfo;
12550 + capabilitiesStatusCode code;
12552 + } capabilitiesStatusInfo;
12555 + connectionInfoCode code;
12557 + } connectionInfo;
12560 + connectionInfoCode code;
12563 + } advancedConnectionInfo;
12566 + dialerStatusCode code;
12576 + framingInfoCode framingInfo;
12577 + IOStatusCode ioStatus;
12580 + lapmStatusCode code;
12584 + lapmTakedownReason reason;
12585 + lapmErrorCode error;
12586 + lapmTestResultCode testResult;
12595 + long nFrameErrors;
12601 + lapmParameterCode code;
12606 + v42bisStatusCode code;
12610 + v42bisErrorCode error;
12620 + mnpStatusCode code;
12624 + mnpTakedownReason reason;
12625 + mnpErrorCode error;
12629 + long nFrameErrors;
12649 + long framesPending;
12655 + mnpParameterCode code;
12660 + v70StatusCode code;
12664 + v70TakedownReason reason;
12665 + v70ErrorCode error;
12669 + long nFrameErrors;
12684 + long framesPending;
12691 + v70TakedownReason reason;
12704 + audioStatusCode code;
12716 + long nFrameErrors;
12727 + v80StatusCode code;
12731 + v80TakedownReason reason;
12732 + v80ErrorCode error;
12736 + long nFrameErrors;
12753 + v70ParameterCode code;
12763 + callerIDStatusCode code;
12769 + callerIDErrorCode code;
12778 + } callerIDStatus;
12789 + overlayStatusCode code;
12797 + ulong nBitErrors;
12798 + ulong nBlockErrors;
12800 + ulong nAudioBits;
12801 + ulong nAudioBlocks;
12802 + ulong nAudioSyncErrors;
12803 + ulong nAudioBlockErrors;
12810 + } logFileControlStatus;
12821 + } modemStatusStruct;
12823 +typedef void (SM_DECL *statusHandlerType) (void *gDslVars, modemStatusStruct*);
12824 +#endif /* ADSL_MODEM */
12826 +/****************************************************************************/
12827 +/* 1. Type definitions. */
12829 +/* 1.5 Command structure */
12830 +/****************************************************************************/
12834 + Boolean remoteModemIsFlex;
12835 + uchar countryCode;
12836 + ushort manufacturerId;
12837 + uchar licenseeId;
12838 + uchar productCapabilities;
12839 + Boolean digitalModeFlag;
12840 + Boolean prototypeFlag;
12847 + symbolRateMap symbolRates;
12848 + dataRateMap dataRates;
12849 + dataRateMap dataRates56k;
12850 + dataRateMap dataRatesFlex;
12851 + featureMap features;
12852 + bitMap auxFeatures;
12853 + bitMap demodCapabilities;
12854 + long rateThresholdAdjustment; /* dB Q4 */
12855 + FlexV8bisStruct flexRemoteV8bisInfo;
12856 + } dataPumpCapabilities;
12858 +#ifndef ADSL_MODEM
12859 +typedef struct SoftwareModemCommandParameters
12861 + modemCommandCode command;
12865 + ulong hybridDelayQ4ms;
12866 + long modemSampleRate;
12870 + NVRAMConfiguration *nvramConfigurationPtr;
12873 + uchar *phoneNumber;
12874 + uchar *faxECMPageBufferPtr;
12875 + CountryDescriptor *countryDescriptorTable;
12878 + dataRateMap dteRate;
12883 + v8ControlType code;
12889 + directionType direction;
12890 + v8bisConnectionSetup setup;
12892 + voidFuncType confirmMsFunc;
12893 + voidFuncType genMsFunc;
12894 + xmtHandlerWithRtnValType ogmFunc;
12898 + directionType direction;
12902 + directionType direction;
12903 + modulationMap modulations;
12904 + dataPumpCapabilities capabilities;
12929 + v8bisMessageSpec;
12932 + linkLayerType type;
12934 + dataRateMap rxDataRate;
12935 + dataRateMap txDataRate;
12936 + long rtDelayQ4ms;
12937 + rxDataHandlerType rxDataHandlerPtr;
12938 + txDataHandlerType txDataHandlerPtr;
12944 + directionType direction;
12945 + long fill[2]; /* need to match linkLayerSpec */
12946 + rxDataHandlerType rxDataHandlerPtr;
12947 + txDataHandlerType txDataHandlerPtr;
12951 + framerParameterCode code;
12953 + } framerParameterSpec;
12956 + bitMap callProgressDetectorSetup;
12957 + signalDetectorType callProgressDetectorPtr; /* if nil, use defaults */
12958 + signalDetectorType customDetectorPtr; /* if nil, no custom detector */
12959 + } callProgressMonitorSpec;
12962 + ulong maxTones; /* maximum number of simultaneous tones to detect */
12963 + ulong allowableVariance; /* maximum cumulative variance in the eight interpolated frequencies */
12964 + ulong totalPowerThreshold; /* ignore complete block if power less than this */
12965 + ulong powerShiftThreshold; /* ignore a bin if its power is less than (totalPowerValue >> powerShiftThreshold) */
12966 + ulong toneMatchThresholdHz; /* tones within +/- this many Hz of original tone are considered the same tone */
12967 + ulong binSeparation; /* ignore tones with a spacing of less than this */
12968 + ulong outsideFreqDeviation; /* an individual value in the interpolated array can be up to this many Hz outside of the expected angle range */
12972 + uchar *dialString; /* nil limited string for DTMF dialing sequence */
12973 + long pulseBreakTime,
12975 + pulseInterDigitTime,
12977 + toneInterDigitTime,
12982 + signalWaitTimeout,
12983 + blindDialingTimeout;
12984 + bitMap dialerSetup;
12985 + bitMap callProgressDetectorSetup;
12986 + signalDetectorType callProgressDetectorPtr; /* if nil, use defaults */
12987 + signalDetectorType customDetectorPtr; /* if nil, no custom detector */
12988 + hookHandlerType hookHandlerPtr; /* nil if DTMF dialing specified*/
12995 + } callingToneSpec;
12998 + statusHandlerType statusHandlerPtr;
12999 + eyeHandlerType eyeHandlerPtr;
13000 + logHandlerType logHandlerPtr;
13001 + rxDataHandlerType rxDataHandlerPtr;
13002 + txDataHandlerType txDataHandlerPtr;
13016 + bitMap setupLapm;
13017 + rxDataHandlerType rxAudioHandlerPtr;
13018 + txDataHandlerType txAudioHandlerPtr;
13023 + ulong LogChannelNum;
13025 + } EstChannelSpec;
13029 + } WaitChannelSpec;
13033 + ulong LogChannelNum;
13036 + } RelChannelSpec;
13041 + dataRateMap rxAudioRate;
13042 + dataRateMap txAudioRate;
13043 + rxAudioHandlerType rxAudioHandlerPtr;
13044 + txAudioHandlerType txAudioHandlerPtr;
13082 + } callProgressParamSpec;
13085 + v250IdStringCode v250IdCode;
13086 + uchar *v250IdString;
13090 + } modemCommandStruct;
13092 +typedef Boolean (*commandHandlerType) (modemCommandStruct*);
13093 +#endif /* ADSL_MODEM */
13097 +/****************************************************************************/
13098 +/* 2. Constant definitions. */
13100 +/* 2.1 Definitive constants */
13101 +/****************************************************************************/
13103 +#define kMaxSampleBlockSize 48
13104 +#define kMaxDataBlockSize 48
13106 +#define kMaxDialStringLength 127
13107 +#define kCallProgressSampleRate 7200
13109 +#define kMaxCallerIDMessageLength 80
13111 +/****************************************************************************/
13112 +/* 2. Constant definitions. */
13114 +/* 2.2 Bit maps */
13115 +/****************************************************************************/
13117 +/* modulationMap */
13119 +#define kIdle 0x00000000
13120 +#define kV25 0x00000001
13121 +#define kV8 0x00000002
13122 +#define kCid 0x00000004
13123 +#define kV8bis 0x00000008
13124 +#define kV21 0x00000010
13125 +#define kV22 0x00000020
13126 +#define kV23 0x00000040
13127 +#define kV32 0x00000080
13128 +#define kV34 0x00000100
13129 +#define kX2 0x00000200
13130 +#define kV90 0x00000400
13131 +#define k56Flex 0x00000800
13132 +#define kV27 0x00001000
13133 +#define kV29 0x00002000
13134 +#define kV17 0x00004000
13135 +#define kV34HDX 0x00008000
13136 +#define kV34HDXC 0x00010000
13137 +#define kBell103 0x00100000
13138 +#define kBell212 0x00200000
13139 +#define kDataCallingTone 0x01000000
13140 +#define kFaxCallingTone 0x02000000
13142 +#define kV22FastNZConnect 0x04000000
13143 +#define kV22FastNNZConnect 0x08000000
13144 +#define kV22FastConnect (kV22FastNZConnect|kV22FastNNZConnect)
13145 +#define kV22bisFastConnect 0x10000000
13148 +#define kDataModulations (kV25 | kV8 | kV21 | kV22FastConnect | kV22bisFastConnect | kV22 | kV23 | kV32 | kV34 | kBell103 | kBell212)
13149 +#define kDataOnlyModulations (kV21 | kV22 | kV23 | kV32 | kBell103 | kBell212)
13150 +#define kPCMModulations (kV90 | kX2 | k56Flex)
13152 +#define kFaxModulations (kV25 | kV21 | kV27 | kV29 | kV17)
13153 +#define kFaxOnlyModulations (kV27 | kV29 | kV17)
13154 +#define kFaxModulationShift 12
13156 +/* symbolRateMap */
13158 +#define k1200Hz 0x00000001
13159 +#define k1600Hz 0x00000002
13160 +#define k2400Hz 0x00000004
13161 +#define k2743Hz 0x00000008
13162 +#define k2800Hz 0x00000010
13163 +#define k3000Hz 0x00000020
13164 +#define k3200Hz 0x00000040
13165 +#define k3429Hz 0x00000080
13166 +#define k8000Hz 0x00000100
13168 +#define kAllSymbolRates ( k1200Hz | k1600Hz | k2400Hz | k2743Hz | \
13169 + k2800Hz | k3000Hz | k3429Hz | k8000Hz )
13173 +#define k75bps 0x00000002
13174 +#define k300bps 0x00000004
13175 +#define k600bps 0x00000008
13176 +#define k1200bps 0x00000010
13177 +#define k2400bps 0x00000020
13178 +#define k4800bps 0x00000040
13179 +#define k7200bps 0x00000080
13180 +#define k9600bps 0x00000100
13181 +#define k12000bps 0x00000200
13182 +#define k14400bps 0x00000400
13183 +#define k16800bps 0x00000800
13184 +#define k19200bps 0x00001000
13185 +#define k21600bps 0x00002000
13186 +#define k24000bps 0x00004000
13187 +#define k26400bps 0x00008000
13188 +#define k28800bps 0x00010000
13189 +#define k31200bps 0x00020000
13190 +#define k33600bps 0x00040000
13191 +#define k36000bps 0x00080000
13192 +#define k38400bps 0x00100000
13193 +#define k57600bps 0x00200000
13194 +#define k115200bps 0x00400000
13195 +#define k230400bps 0x00800000
13196 +#define k460800bps 0x01000000
13197 +#define k921600bps 0x02000000
13199 + * kPCMRate is used to identify that the reported rate is
13200 + * PCM modulation rate, and is only used for PCM modulation while
13201 + * reporting rate !!!!
13203 +#define kPCMRate 0x40000000
13204 +#define kPCMFlexRate 0x80000000
13205 +#define kAllDataRates 0x0FFFFFFF
13207 +/* rates specific for X2 and V.90 */
13208 +#define kPCM25333bps 0x00000001
13209 +#define kPCM26666bps 0x00000002
13210 +#define kPCM28000bps 0x00000004
13211 +#define kPCM29333bps 0x00000008
13212 +#define kPCM30666bps 0x00000010
13213 +#define kPCM32000bps 0x00000020
13214 +#define kPCM33333bps 0x00000040
13215 +#define kPCM34666bps 0x00000080
13216 +#define kPCM36000bps 0x00000100
13217 +#define kPCM37333bps 0x00000200
13218 +#define kPCM38666bps 0x00000400
13219 +#define kPCM40000bps 0x00000800
13220 +#define kPCM41333bps 0x00001000
13221 +#define kPCM42666bps 0x00002000
13222 +#define kPCM44000bps 0x00004000
13223 +#define kPCM45333bps 0x00008000
13224 +#define kPCM46666bps 0x00010000
13225 +#define kPCM48000bps 0x00020000
13226 +#define kPCM49333bps 0x00040000
13227 +#define kPCM50666bps 0x00080000
13228 +#define kPCM52000bps 0x00100000
13229 +#define kPCM53333bps 0x00200000
13230 +#define kPCM54666bps 0x00400000
13231 +#define kPCM56000bps 0x00800000
13232 +#define kPCM57333bps 0x01000000
13234 +#define kV90ServerToClientDataRates \
13235 + ( kPCM28000bps | kPCM29333bps | kPCM30666bps | \
13236 + kPCM32000bps | kPCM33333bps | kPCM34666bps | \
13237 + kPCM36000bps | kPCM37333bps | kPCM38666bps | \
13238 + kPCM40000bps | kPCM41333bps | kPCM42666bps | \
13239 + kPCM44000bps | kPCM45333bps | kPCM46666bps | \
13240 + kPCM48000bps | kPCM49333bps | kPCM50666bps | \
13241 + kPCM52000bps | kPCM53333bps | kPCM54666bps | \
13242 + kPCM56000bps | kPCM57333bps )
13244 +#define kV90ClientToServerDataRates \
13245 + ( k4800bps | k7200bps | k9600bps | k12000bps | \
13246 + k14400bps | k16800bps | k19200bps | k21600bps | \
13247 + k24000bps | k26400bps | k28800bps | k31200bps | \
13252 +#define kX2ServerToClientDataRates \
13253 + ( kPCM25333bps | kPCM26666bps | kPCM28000bps | \
13254 + kPCM29333bps | kPCM30666bps | kPCM32000bps | \
13256 + kPCM34666bps | kPCM36000bps | kPCM37333bps | \
13257 + kPCM38666bps | kPCM40000bps | kPCM41333bps | \
13258 + kPCM42666bps | kPCM44000bps | kPCM45333bps | \
13259 + kPCM46666bps | kPCM48000bps | kPCM49333bps | \
13260 + kPCM50666bps | kPCM52000bps | kPCM53333bps | \
13261 + kPCM54666bps | kPCM56000bps | kPCM57333bps )
13262 +#define kX2ClientToServerDataRates \
13263 + ( k4800bps | k7200bps | k9600bps | k12000bps | k14400bps | \
13264 + k16800bps | k19200bps | k21600bps | k24000bps | k26400bps | k28800bps | \
13268 + Rates specific for Flex
13270 +#define kPCMFlex32000bps 0x00000001
13271 +#define kPCMFlex34000bps 0x00000002
13272 +#define kPCMFlex36000bps 0x00000004
13273 +#define kPCMFlex38000bps 0x00000008
13274 +#define kPCMFlex40000bps 0x00000010
13275 +#define kPCMFlex42000bps 0x00000020
13276 +#define kPCMFlex44000bps 0x00000040
13277 +#define kPCMFlex46000bps 0x00000080
13278 +#define kPCMFlex48000bps 0x00000100
13279 +#define kPCMFlex50000bps 0x00000200
13280 +#define kPCMFlex52000bps 0x00000400
13281 +#define kPCMFlex54000bps 0x00000800
13282 +#define kPCMFlex56000bps 0x00001000
13283 +#define kPCMFlex58000bps 0x00002000
13284 +#define kPCMFlex60000bps 0x00004000
13286 +#define kFlexServerToClientDataRates \
13287 + ( kPCMFlex32000bps | kPCMFlex34000bps | kPCMFlex36000bps | kPCMFlex38000bps | \
13288 + kPCMFlex40000bps | kPCMFlex42000bps | kPCMFlex44000bps | kPCMFlex46000bps | \
13289 + kPCMFlex48000bps | kPCMFlex50000bps | kPCMFlex52000bps | kPCMFlex52000bps | \
13290 + kPCMFlex54000bps | kPCMFlex56000bps | kPCMFlex58000bps | kPCMFlex60000bps )
13292 +#define kFlexClientToServerDataRates \
13293 + ( k4800bps | k7200bps | k9600bps | k12000bps | \
13294 + k14400bps | k16800bps | k19200bps | k21600bps | \
13295 + k24000bps | k26400bps | k28800bps | k31200bps )
13298 +#define k2400BitShift 5
13299 +#define k4800BitShift 6
13301 +#define kPCM28000bpsShift 2
13303 +#define kV21Rates k300bps
13304 +#define kV22Rates k1200bps
13305 +#define kV22bisRates (k1200bps | k2400bps)
13306 +#define kV23Rates (k75bps | k1200bps)
13307 +#define kCidRates (k1200bps)
13308 +#define kV32Rates (k4800bps | k9600bps)
13309 +#define kV32bisRates (kV32Rates | k7200bps | k12000bps | k14400bps)
13310 +#define kV32terboRates (kV32bisRates | k16800bps | k19200bps)
13311 +#define kV34Rates ( k2400bps | k4800bps | k7200bps | k9600bps | k12000bps | k14400bps | \
13312 + k16800bps | k19200bps | k21600bps | k24000bps | k26400bps | k28800bps | \
13313 + k31200bps | k33600bps )
13315 +#define kV27Rates (k2400bps | k4800bps)
13316 +#define kV29Rates (k4800bps | k7200bps | k9600bps)
13317 +#define kBell103Rates k300bps
13318 +#define kBell212Rates k1200bps
13321 +/* Demodulator capabilities */
13322 +#define kNeecEnabled 0x00000001
13323 +#define kPFeecEnabled 0x00000002
13324 +#define kIeecEnabled 0x00000004
13325 +#define kFeecEnabled 0x00000008
13327 +#define kRapidEqualizerTraining 0x00000010
13328 +#define kRapidPECTraining 0x00000020
13329 +#define kRapidECTraining 0x00000040
13330 +#define kAutoLoadReductionEnabled 0x00000080
13332 +#define kTimingTrackingEnabled 0x00000100
13333 +#define kPhaseLockedLoopEnabled 0x00000200
13334 +#define kFeecPhaseLockedLoopEnabled 0x00000400
13335 +#define kPhaseJitterTrackingEnabled 0x00000800
13337 +#define kClockErrorTrackingEnabled 0x00001000
13338 +#define kFreqOffsetTrackingEnabled 0x00002000
13339 +#define kFeecFreqOffsetTrackingEnabled 0x00004000
13341 +#define kShorterNeecEnabled 0x00008000
13342 +#define kShorterPFeecEnabled 0x00010000
13343 +#define kFrondEndHPFilterEnabled 0x00020000
13344 +#define kGainControlEnabled 0x00040000
13345 +#define kPhaseHitControlEnabled 0x00080000
13346 +#define kBandEdgeCorrectorEnabled 0x00100000
13347 +#define kDisableFaxFastClearDown 0x00200000
13349 +#define kImdOffsetCompensationEnabled 0x00400000
13351 +#define kV34ShortEqlLengthExtShift 23
13352 +#define kV34ShortEqlLengthExtMask (0x3<<kV34ShortEqlLengthExtShift)
13353 +#define kV34EqlLengthReductionEnabled (1<<(kV34ShortEqlLengthExtShift+2))
13354 +#define kPCMIeecLengthReductionEnabled (1<<(kV34ShortEqlLengthExtShift+3))
13358 +#define kAllFeatures 0xFFFFFFFF
13360 +#define kAutomodingEnabled 0x00000001 /* bit 1 */
13361 +#define kAutomodingDisabled 0x00000000 /* bit 1 */
13363 +#define kV8SendCIEnabled 0x00000002 /* bit 2 */
13364 +#define kV8SendCIDisabled 0x00000000 /* bit 2 */
13366 +#define kV34CMEModem 0x00000004 /* bit 3 */
13367 +#define kV34NotCMEModem 0x00000000 /* bit 3 */
13369 +#define kV34ExtraINFOPreamble 0x00000008 /* bit 4 */
13371 +#define kRetrainingEnabled 0x00000010
13372 +#define kRateRenegotiationEnabled 0x00000020
13373 +#define kTrellisCodingEnabled 0x00000040
13375 +/* Fax specific features */
13376 +#define kFaxShortTraining 0x00000080
13377 +#define kFaxEchoSuppressionEnabled 0x00000100
13379 +/* V.22/V.22bis specific features */
13380 +#define kV22GuardTone1800HzEnabled 0x00000200
13381 +#define kV22GuardTone550HzEnabled 0x00000400
13384 +/* V.34 specific features */
13386 +#define kV34bisEnabled 0x00000800
13388 +#define kV34PowerReductionAllowed 0x00001000
13389 +#define kAuxChannelEnabled 0x00002000
13390 +#define kAuxChannelDisabled 0x00000000
13391 +#define kV34TrellisEncoderTypeMask 0x0000C000
13392 +#define kV34TrellisEncoderTypeShift 14
13394 +#define kTRN16 0x00010000
13395 +#define kAssymDataRatesEnabled 0x00020000
13396 +#define kNonLinearCodingEnabled 0x00040000
13397 +#define kConstShapingEnabled 0x00080000
13398 +#define kPrecodingEnabled 0x00100000
13400 +#define kV34LoFcAt2400HzEnabled 0x00200000
13401 +#define kV34HiFcAt2400HzEnabled 0x00400000
13402 +#define kV34LoFcAt2743HzEnabled 0x00800000
13403 +#define kV34HiFcAt2743HzEnabled 0x01000000
13404 +#define kV34LoFcAt2800HzEnabled 0x02000000
13405 +#define kV34HiFcAt2800HzEnabled 0x04000000
13406 +#define kV34LoFcAt3000HzEnabled 0x08000000
13407 +#define kV34HiFcAt3000HzEnabled 0x10000000
13408 +#define kV34LoFcAt3200HzEnabled 0x20000000
13409 +#define kV34HiFcAt3200HzEnabled 0x40000000
13410 +#define kV34LoFcAt3429HzEnabled 0x80000000
13411 +#define kV34HiFcAt3429HzEnabled 0x80000000
13413 +/* auxiliary features definintions map */
13415 +#define kLoopbackTestFinish 0x00000000
13416 +#define kLoopbackTestV54Loop1 0x00000001
13417 +#define kLoopbackTestV54Loop2 0x00000002
13418 +#define kLoopbackTestV54Loop3 0x00000003
13419 +#define kLoopbackTestTypeMask 0x00000003
13420 +#define kLoopbackTestAutoRespondEnabled 0x00000004
13421 +#define kLoopbackSelfTest 0x00000008
13423 +#define kPreempFilterMask 0x000000F0
13424 +#define kPreempFilterShift 4
13426 +#define kPcmCodingTypeMuLaw 0x00000100
13427 +#define kPcmServerToServerEnabled 0x00000200
13428 +#define kPcmIsServerModem 0x00000400
13429 +#define kPcmAnalogModemAvailable 0x00000800
13430 +#define kPcmDigitalModemAvailable 0x00001000
13431 +#define kPcmDceOnDigitalNetwork 0x00002000
13432 +#define kPcmDModemPwrCalAtCodecOut 0x00004000
13433 +#define kPcm3429UpstreamAvailable 0x00008000
13435 +#define kPcmSpectralShapingBitsMask 0x00070000
13436 +#define kPcmSpectralShapingBitsShift 16
13437 +#define kV90ServerNotDetSbarAfterJdbarFix 0x00080000
13439 +#define kAutomoderPassive 0x00400000
13441 +#define kV8HoldANSamUntilDetCI 0x00800000
13442 +#define kFaxSendFromOrgSide 0x01000000
13443 +#define kFaxV34HDX2400bpsCtrlChan 0x02000000
13444 +#define kFaxV34HDXAllowAsymCtrlChan 0x04000000
13445 +#define kV8ANSamStageDisabled 0x08000000
13447 +#define kFlexSkipV8bis 0x10000000
13448 +#define kV34ControlChannelEnabled 0x20000000
13449 +#define kV34SeamlessRateChangeEnabled 0x40000000
13451 +#define kPTTTest 0x80000000
13453 +/* call progress detection Map */
13455 +#define kDialTone 0x00000001
13456 +#define kRingBack 0x00000002
13457 +#define kBusy 0x00000004
13458 +#define kReorder 0x00000008
13459 +#define k2ndDTn 0x00000010
13460 +#define kBongTone 0x00000020
13462 +/* Break type bit settings */
13463 +#define kExpedited 0x0001
13464 +#define kDestructive 0x0002
13466 +/* async Framer setup map */
13468 +#define kNDataBitsMask 0x03
13469 +#define k5DataBits 0x00
13470 +#define k6DataBits 0x01
13471 +#define k7DataBits 0x02
13472 +#define k8DataBits 0x03
13474 +#define kNDataBitsShift 0
13475 +#define kNDataBitsOffset 5
13477 +#define kParityTypeMask 0x1C
13478 +#define kNoParity 0x00
13479 +#define kOddParity 0x04
13480 +#define kEvenParity 0x08
13481 +#define kMarkParity 0x0C
13482 +#define kSpaceParity 0x10
13484 +#define kNStopBitsMask 0x60
13485 +#define k1StopBits 0x00
13486 +#define k2StopBits 0x20
13488 +#define kNStopBitsShift 5
13489 +#define kNStopBitsOffset 1
13491 +/* Sync Framer setup map */
13493 +#define kUnderrunCharMask 0xff
13494 +#define kRepeatLastCharOnUnderrun 0x100
13496 +/* HDLC sync framer setup maps */
13497 +#define kNFlagsBeforeFramesMask 0x3F
13498 +#define kNFlagsBeforeFramesShift 0
13500 +#define kNFlagsBetweenFramesMask 0x3F
13501 +#define kNFlagsBetweenFramesShift 6
13503 +#define k32BitCRC 0x1000
13504 +#define kFlagSharingEnabled 0x2000
13506 +#define kNFlagsBeforeReportMask 0x03 /* no. of *extra* flags reqd before frame */
13507 +#define kNFlagsBeforeReportShift 14
13509 +#define kTxDeferredCRC 0x10000
13510 +#define kRxDeferredCRC 0x20000
13511 +#define kTxIdleMarks 0x40000
13512 +#define kNoCRC 0x80000
13514 +/* SAM framer setup maps */
13516 +#define kSAMTransparentIdleTypeMask 0x00000003
13517 +#define kSAMTransparentIdleTypeShift 0
13518 +#define kSAMFramedIdleTypeMask 0x00000004
13519 +#define kSAMFramedIdleTypeShift 2
13520 +#define kSAMFramedOverrunActionMask 0x00000010
13521 +#define kSAMFramedOverrunActionShift 4
13522 +#define kSAMHalfDuplexModeMask 0x00000020
13523 +#define kSAMHalfDuplexModeShift 5
13524 +#define kSAMCRCTypeMask 0x000000C0
13525 +#define kSAMCRCTypeShift 6
13526 +#define kSAMNRZIEnabledMask 0x00000100
13527 +#define kSAMNRZIEnabledShift 8
13528 +#define kSAMSyn1Mask 0x00FF0000
13529 +#define kSAMSyn1Shift 16
13530 +#define kSAMSyn2Mask 0xFF000000
13531 +#define kSAMSyn2Shift 24
13533 +/* <trans_idle> */
13534 +#define kSAM8bitSYNHuntDisabled 0
13535 +#define kSAM8bitSYNHuntEnabled ((ulong)1 << kSAMTransparentIdleTypeShift)
13536 +#define kSAM16bitSYNHuntEnabled ((ulong)2 << kSAMTransparentIdleTypeShift)
13538 +/* <framed_idle> */
13539 +#define kSAMSendFlagsOnIdle 0
13540 +#define kSAMSendMarksOnIdle ((ulong)1 << kSAMFramedIdleTypeShift)
13542 +/* <framed_un_ov> */
13543 +#define kSAMAbortOnUnderrun 0
13544 +#define kSAMFlagsOnUnderrun ((ulong)1 << kSAMFramedOverrunActionShift)
13547 +#define kSAMHalfDuplexNoAuto 0
13548 +#define kSAMHalfDuplexAuto ((ulong)1 << kSAMHalfDuplexModeShift)
13552 +#define kSAMNoCRC 0
13553 +#define kSAM16bitCRC ((ulong)1 << kSAMCRCTypeShift)
13554 +#define kSAM32bitCRC ((ulong)2 << kSAMCRCTypeShift)
13557 +#define kSAMNRZIDisabled 0
13558 +#define kSAMNRZIEnabled ((ulong)1 << kSAMNRZIEnabledShift)
13561 +/* LAPM setup maps */
13562 +#define kLapmDirection 0x00000001 /* Bit 0 */
13563 +#define kLapmSREJEnabled 0x00000002 /* Bit 1 */
13564 +#define kLapmDetectionEnabled 0x00000004 /* Bit 2 */
13565 +#define kLapmLongADPEnabled 0x00000008 /* Bit 3 */
13567 +#define kLapmCompressionEnabledMask 0x00000030
13568 +#define kLapmTxCompressionEnabled 0x00000010 /* Bit 4 */
13569 +#define kLapmRxCompressionEnabled 0x00000020 /* Bit 5 */
13570 +#define kLapmCompressionEnabledShift 4
13572 +#define kLapmRetryLimitMask 0x000000C0 /* Bits 6,7 */
13574 +#define kLapmNoRetryLimit 0x00000000
13575 +#define kLapm4Retries 0x00000040
13576 +#define kLapm8Retries 0x00000080
13577 +#define kLapm20Retries 0x000000C0
13579 +#define kLapmWindowSizeMask 0x00001F00 /* Bits 8-12 */
13580 +#define kLapmWindowSizeShift 8
13582 +#define kLapmWindowSize8 0x00000800
13583 +#define kLapmWindowSize15 0x00000F00
13586 +#define kLapmInfoFieldSizeMask 0x0000E000 /* Bits 13-15 */
13587 +#define kLapmInfoField8Bytes 0x00000000
13588 +#define kLapmInfoField16Bytes 0x00002000
13589 +#define kLapmInfoField32Bytes 0x00004000
13590 +#define kLapmInfoField64Bytes 0x00006000
13591 +#define kLapmInfoField128Bytes 0x00008000
13592 +#define kLapmInfoField192Bytes 0x0000A000
13593 +#define kLapmInfoField256Bytes 0x0000C000
13594 +#define kLapmInfoField512Bytes 0x0000E000
13595 +#define kLapmInfoFieldSizeShift 13
13597 +#define kLapmT400Mask 0x00030000 /* Bits 16-17 */
13598 +#define kLapmAutoT400 0x00000000
13599 +#define kLapm750msT400 0x00010000
13600 +#define kLapm3secT400 0x00020000
13601 +#define kLapm30secT400 0x00030000
13603 +#define kLapmT401Mask 0x000C0000 /* Bits 18-19 */
13604 +#define kLapmAutoT401 0x00000000
13605 +#define kLapm750msT401 0x00040000
13606 +#define kLapm3secT401 0x00080000
13607 +#define kLapm6secT401 0x000C0000
13609 +#define kLapmT403Mask 0x00300000 /* Bits 20-21 */
13610 +#define kLapmAutoT403 0x00000000
13611 +#define kLapm750msT403 0x00100000
13612 +#define kLapm2secT403 0x00200000
13613 +#define kLapm4secT403 0x00300000
13617 +#define kLapmDictSizeMask 0x00C00000 /* Bits 22-23 */
13618 +#define kLapmDictSize512 0x00000000
13619 +#define kLapmDictSize1024 0x00400000
13620 +#define kLapmDictSize2048 0x00800000
13621 +#define kLapmDictSize4096 0x00C00000
13623 +#define kLapmStringSizeMask 0xFF000000 /* Bits 24-31 */
13624 +#define kLapmStringSizeShift 24
13626 +/* MNP setup maps */
13628 +#define kMnpMinPLevel 0x00000001 /* Bit 0: 1 - Minimal, 0 - Standard */
13629 +#define kMnpStdPLevel 0x00000000 /* Bit 0: 1 - Minimal, 0 - Standard */
13631 +#define kMnpOptimizationEnabled 0x00000002 /* Bit 1 */
13632 +#define kMnpOptimizationDisabled 0x00000000 /* Bit 1 */
13634 +#define kMnpCompressionEnabled 0x00000004 /* Bit 2 */
13635 +#define kMnpCompressionDisabled 0x00000000 /* Bit 2 */
13637 +#define kMnpClassMask 0x00000018
13638 +#define kMnpClassShift 3
13639 +#define kMnpClass1 0x00000008
13640 +#define kMnpClass2 0x00000010
13641 +#define kMnpClass3 0x00000018 /* Bits 3,4 */
13643 +#define kMnpMaxRetryMask 0x00000060 /* Bits 5,6 */
13644 +#define kMnpMaxRetryShift 5
13645 +#define kMnpNoRetryLimit 0x00000000
13646 +#define kMnp4Retries 0x00000020
13647 +#define kMnp8Retries 0x00000040
13648 +#define kMnp20Retries 0x00000060
13650 +#define kMnpInfoFieldSizeMask 0x00000380 /* Bits 7-9 */
13651 +#define kMnpInfoFieldSizeShift 7
13652 +#define kMnpInfoField8Bytes 0x00000000
13653 +#define kMnpInfoField16Bytes 0x00000080
13654 +#define kMnpInfoField32Bytes 0x00000100
13655 +#define kMnpInfoField64Bytes 0x00000180
13656 +#define kMnpInfoField128Bytes 0x00000200
13657 +#define kMnpInfoField192Bytes 0x00000280
13658 +#define kMnpInfoField256Bytes 0x00000300
13659 +#define kMnpInfoField260Bytes 0x00000380
13661 +#define kMnpT400Mask 0x00003000 /* Bits 12,13 */
13662 +#define kMnpT400Shift 12
13663 +#define kMnpAutoT400 0x00000000
13664 +#define kMnp750msT400 0x00001000
13665 +#define kMnp3secT400 0x00002000
13666 +#define kMnp6secT400 0x00003000
13668 +#define kMnpT401Mask 0x0000C000 /* Bits 14,15 */
13669 +#define kMnpT401Shift 14
13670 +#define kMnpAutoT401 0x00000000
13671 +#define kMnp750msT401 0x00004000
13672 +#define kMnp3secT401 0x00008000
13673 +#define kMnp6secT401 0x0000C000
13675 +#define kMnpT403Mask 0x00030000 /* Bits 16,17 */
13676 +#define kMnpT403Shift 16
13677 +#define kMnpAutoT403 0x00000000
13678 +#define kMnp60secT403 0x00010000
13679 +#define kMnp600secT403 0x00020000
13680 +#define kMnp3600secT403 0x00030000
13682 +#define kMnpFallbackTypeMask 0x000C0000 /* Bits 18,19 */
13683 +#define kMnpFallbackTypeShift 18
13684 +#define kMnpNoFallback 0x00000000
13685 +#define kMnpFallbackTime 0x00040000
13686 +#define kMnpFallback200 0x00080000
13687 +#define kMnpFallbackChar 0x000C0000
13689 +#define kMnpWindowSizeMask 0x00300000 /* Bits 20,21 */
13690 +#define kMnpWindowSizeShift 20
13691 +#define kMnp1Frame 0x00000000
13692 +#define kMnp4Frames 0x00100000
13693 +#define kMnp8Frames 0x00200000
13694 +#define kMnp16Frames 0x00300000
13696 +#define kMnpDirection 0x00800000 /* Bit 22 */
13698 +#define kMnpFallbackCharMask 0xFF000000 /* Bit 24-31 */
13699 +#define kMnpFallbackCharShift 24
13701 +/* kV34HDXTurnOffCurrentModeCmd state parameter values */
13703 +#define kV34HDXTurnOffAsClearDown 0
13704 +#define kV34HDXTurnOffFromControlSource 1
13705 +#define kV34HDXTurnOffFromControlDestination 2
13706 +#define kV34HDXTurnOffFromPrimarySource 3
13707 +#define kV34HDXTurnOffFromPrimaryDestination 4
13709 +/* V70 setup maps */
13711 +#define kV70Direction 0x00000001 /* Bit 0 */
13712 +#define kV70uIHEnabled 0x00000002 /* Bit 1 */
13713 +#define kV70AudioHeaderEnabled 0x00000004 /* Bit 2 */
13714 +#define kV70SilenceSupprEnabled 0x00000008 /* Bit 3 */
13716 +#define kV70SuspendResumeShift 4
13717 +#define kV70SuspendResumeMask (3 << kV70SuspendResumeShift)
13718 +#define kV70SuspendResumeDisabled 0x00000000 /* Bit 4,5 */
13719 +#define kV70SuspendResumeWAddr 0x00000010 /* Bit 4 */
13720 +#define kV70SuspendResumeWoAddr 0x00000020 /* Bit 5 */
13722 +#define kV70CrcLengthShift 6
13723 +#define kV70CrcLengthMask (3 << kV70CrcLengthShift)
13724 +#define kV70CrcLength16 0x00000000 /* Bit 6,7 */
13725 +#define kV70CrcLength8 0x00000040 /* Bit 6 */
13726 +#define kV70CrcLength32 0x00000080 /* Bit 7 */
13728 +#define kV70BlockingFactorShift 8
13729 +#define kV70BlockingFactorMask (3 << kV70BlockingFactorShift)
13730 +#define kV70BlockingFactor1 0x00000000 /* Bit 8,9 */
13731 +#define kV70BlockingFactor2 0x00000100 /* Bit 8 */
13732 +#define kV70BlockingFactor3 0x00000200 /* Bit 9 */
13733 +#define kV70BlockingFactor4 0x00000300 /* Bit 8,9 */
13735 +#define kV70InitChannelsShift 10
13736 +#define kV70InitChannelsMask (1 << kV70InitChannelsShift)
13737 +#define kV70InitNoChannels 0x00000000 /* Bit 10,11 */
13738 +#define kV70InitDataChannel 0x00000400 /* Bit 10,11 */
13739 +#define kV70InitAudioChannel 0x00000800 /* Bit 10,11 */
13740 +#define kV70InitBothChannels 0x00000C00 /* Bit 10,11 */
13742 +#define kV70OOBEnabled 0x00001000 /* Bit 12 */
13744 +/* V80 setup maps */
13746 +#define kV80Direction 0x00000001 /* Bit 0 */
13748 +#define kV80ModeShift 1
13749 +#define kV80ModeMask (3 << kV80ModeShift)
13750 +#define kV80SyncMode (0 << kV80ModeShift)
13751 +#define kV80TunnellingMode (1 << kV80ModeShift)
13752 +#define kV80SamMode (2 << kV80ModeShift)
13753 +#define kV80SamTransparentMode (2 << kV80ModeShift)
13754 +#define kV80SamFramedMode (3 << kV80ModeShift)
13756 +#define kV80TransIdleShift 3
13757 +#define kV80TransIdleMask (3 << kV80TransIdleShift)
13758 +#define kV80TransIdleNoHunt (0 << kV80TransIdleShift)
13759 +#define kV80TransIdleHunt8 (1 << kV80TransIdleShift)
13760 +#define kV80TransIdleHunt16 (2 << kV80TransIdleShift)
13762 +#define kV80FrameIdleShift 5
13763 +#define kV80FrameIdleMask (1 << kV80FrameIdleShift)
13764 +#define kV80FrameIdleFlags (0 << kV80FrameIdleShift)
13765 +#define kV80FrameIdleMarks (1 << kV80FrameIdleShift)
13767 +#define kV80FrameUnOvShift 6
13768 +#define kV80FrameUnOvMask (1 << kV80FrameUnOvShift)
13769 +#define kV80FrameUnOvAbort (0 << kV80FrameUnOvShift)
13770 +#define kV80FrameUnOvFlag (1 << kV80FrameUnOvShift)
13772 +#define kV80HdAutoShift 7
13773 +#define kV80HdAutoMask (1 << kV80HdAutoShift)
13774 +#define kV80HdAutoNormal (0 << kV80HdAutoShift)
13775 +#define kV80HdAutoExtended (1 << kV80HdAutoShift)
13777 +#define kV80CrcTypeShift 8
13778 +#define kV80CrcTypeMask (3 << kV80CrcTypeShift)
13779 +#define kV80NoCrc (0 << kV80CrcTypeShift)
13780 +#define kV80Crc16 (1 << kV80CrcTypeShift)
13781 +#define kV80Crc32 (2 << kV80CrcTypeShift)
13783 +#define kV80NrziShift 10
13784 +#define kV80NrziMask (1 << kV80NrziShift)
13785 +#define kV80NrziDisabled (0 << kV80NrziShift)
13786 +#define kV80NrziEnabled (1 << kV80NrziShift)
13788 +#define kV80Syn1Mask 0x00FF0000 /* Bit 16-23 */
13789 +#define kV80Syn1Shift 16
13790 +#define kV80Syn2Mask 0xFF000000 /* Bit 24-31 */
13791 +#define kV80Syn2Shift 24
13793 +/* kStartCallProgressMonitorCmd setup masks */
13795 +#define kDTMFDetectorDebouncerEnabled 0x0001
13796 +#define kModemSignalDetectorDebouncerEnabled 0x0002
13797 +#define kCallProgressDetectorDebouncerEnabled 0x0004
13798 +#define kCustomSignalDebouncerEnabled 0x0008
13799 +#define kFaxCallingToneSuppressionEnabled 0x0010
13800 +#define kDataCallingToneSuppressionEnabled 0x0020
13801 +#define kCISuppressionEnabled 0x0040
13802 +#define kAnsSuppressionEnabled 0x0080
13804 +/* kDialCmd setup masks (dialerSetup bit fields) */
13806 +#define kDTMFDialingEnabled 0x0001
13807 +#define kPulseDialingEnabled 0x0002
13808 +#define kModeSwitchEnabled 0x0004
13809 +#define kBlindDialingEnabled 0x0008
13810 +#define kPulseDialingMethodMask 0x0030
13811 +#define kDialModifierTranslationMask 0x00C0
13812 +#define kFlashWhilePulseDialingEnabled 0x0100
13814 +/* Pulse dialing method */
13815 +#define kPulseDialingNPulsesPerDigit 0x0000
13816 +#define kPulseDialingNplusOnePulsesPerDigit 0x0010
13817 +#define kPulseDialingTenMinusNPulsesPerDigit 0x0020
13819 +/* Dial modifier translation */
13820 +#define kTreatWasPause 0x0040 /* Tread 'W' modifier as pause */
13821 +#define kTreatCommaAsWaitForDialtone 0x0080
13824 +#include "C6xDefs.h"
13826 +#ifdef PENTIUM_MMX
13827 +#include "PentiumDefs.h"
13831 +#if defined(DSP16K) && !defined(SoftModemGlobals)
13832 +/* ensure that code generator does not use r5 */
13833 +register int *softmodem_h_should_not_be_included_after_softmodem_gh asm("r5");
13836 +/****************************************************************************/
13837 +/* 3. Interface functions. */
13839 +/****************************************************************************/
13843 +#ifndef SoftDslHeader
13844 +#include "SoftDsl.h"
13846 +extern char* SM_DECL SoftModemGetRevString(void);
13847 +extern char* SM_DECL SoftModemGetProductName(void);
13848 +extern char* SM_DECL SoftModemGetBuildDate(void);
13849 +extern char* SM_DECL SoftModemGetFullManufacturerName(void);
13850 +extern char* SM_DECL SoftModemGetShortManufacturerName(void);
13851 +extern int SM_DECL SoftModemRevStringSize(void);
13852 +extern char* SM_DECL SoftModemGetVendorIDString(void);
13853 +extern char* SM_DECL SoftModemGetT1413VendorIDString(void);
13854 +extern char* SM_DECL SoftModemGetSerialNumberString(void);
13855 +extern int SM_DECL SoftModemSerNumStringSize(void);
13856 +#define SoftDslGetProductName SoftModemGetProductName
13857 +#define SoftDslGetBuildDate SoftModemGetBuildDate
13858 +#define SoftDslGetFullManufacturerName SoftModemGetFullManufacturerName
13859 +#define SoftDslGetShortManufacturerName SoftModemGetShortManufacturerName
13861 +#else /* !ADSL_MODEM */
13863 +extern void SM_DECL SoftModemSetMemoryPtr (void *varsPtr);
13864 +extern void* SM_DECL SoftModemGetMemoryPtr (void);
13865 +extern void SM_DECL SoftModemSetRefData (void *varsPtr);
13866 +extern void* SM_DECL SoftModemGetRefData (void);
13867 +extern int SM_DECL SoftModemGetMemorySize (void);
13868 +extern void SM_DECL SoftModemInit (void);
13869 +extern void SM_DECL SoftModemReset (void);
13870 +extern void SM_DECL SoftModemLineHandler (int sampleCount, short *srcPtr, short *dstPtr);
13871 +extern void SM_DECL SoftModemTimer (long timeQ24ms);
13872 +extern Boolean SM_DECL SoftModemCommandHandler (modemCommandStruct *cmdPtr);
13873 +extern int SM_DECL SoftModemGetExternalMemorySize(void);
13874 +extern void SM_DECL SoftModemSetExternalMemoryPtr(void *varsPtr);
13876 +extern void SM_DECL SoftModemSetPcmCoding (pcmCodingType pcmCoding);
13877 +extern void SM_DECL SoftModemPcmLineHandler (int sampleCount, uchar *srcPtr, uchar *dstPtr);
13879 +/* SoftModem IO functions */
13880 +extern int SM_DECL SoftModemWrite(int nBytes, uchar* srcPtr);
13881 +extern int SM_DECL SoftModemRead(int nBytes, uchar* dstPtr);
13882 +extern int SM_DECL SoftModemWriteFrame(int nBytes, uchar* srcPtr);
13883 +extern int SM_DECL SoftModemReadFrame(int maxFrameSize, uchar* dstPtr);
13884 +extern int SM_DECL SoftModemCountWritePending(void);
13885 +extern int SM_DECL SoftModemCountReadPending(void);
13886 +extern int SM_DECL SoftModemWriteSpaceAvailable(void);
13887 +extern void SM_DECL SoftModemWriteFlush(void);
13888 +extern void SM_DECL SoftModemReadFlush(void);
13889 +extern int SM_DECL SoftModemGetWriteBufferSize(void);
13890 +extern int SM_DECL SoftModemGetReadBufferSize(void);
13893 +extern int SM_DECL SoftModemAudioHandler(int sampleCount, short *srcPtr, short *dstPtr);
13894 +extern int SM_DECL SoftModemAudioRxDataHandler(int nBytes, uchar* srcPtr);
13895 +extern int SM_DECL SoftModemAudioTxDataHandler(int nBytes, uchar* dstPtr);
13899 +#define SoftModemSetGlobalPtr SoftModemSetMemoryPtr
13900 +#define SoftModem SoftModemLineHandler
13901 +#ifndef LINKLAYER_V42BIS_LARGE_DICTIONARY
13902 +#define kSoftModemMaxMemorySize (65536)
13904 +#define kSoftModemMaxMemorySize (65536 + 8192)
13908 + * Internal functions
13910 +extern long SM_DECL SoftModemGetDCOffset(void);
13911 +extern void SM_DECL SoftModemDisableDCOffsetTracking(void);
13912 +extern void SM_DECL SoftModemEnableDCOffsetTracking(void);
13913 +extern long SM_DECL SoftModemGetRcvPower(void);
13914 +extern ulong SM_DECL SoftModemGetHybridDelay(void);
13915 +extern void SM_DECL SoftModemStatusHandler (modemStatusStruct *status);
13916 +extern Boolean SM_DECL SoftModemInternalCommandHandler (modemCommandStruct *cmdPtr);
13917 +extern void SM_DECL SoftModemInternalStatusHandler (modemStatusStruct *status);
13918 +extern void SM_DECL SoftModemSetControllerOnlyMode(commandHandlerType externalDataPumpCommandHandlerPtr);
13919 +extern char* SM_DECL SoftModemGetRevString(void);
13920 +extern char* SM_DECL SoftModemGetProductName(void);
13921 +extern char* SM_DECL SoftModemGetBuildDate(void);
13922 +extern char* SM_DECL SoftModemGetFullManufacturerName(void);
13923 +extern char* SM_DECL SoftModemGetShortManufacturerName(void);
13924 +extern int SM_DECL SoftModemRevStringSize(void);
13925 +extern char* SM_DECL SoftModemGetVendorIDString(void);
13926 +extern char* SM_DECL SoftModemGetSerialNumberString(void);
13927 +extern void SM_DECL SoftModemAuxTxDataHandler(int nBytes, uchar *dataPtr);
13928 +extern void SM_DECL SoftModemAuxRxDataHandler(int nBytes, uchar *dataPtr);
13929 +extern void SM_DECL SoftModemTxDataHandler(int nBytes, uchar *dataPtr);
13930 +extern void SM_DECL SoftModemRxDataHandler(int nBytes, uchar *dataPtr);
13931 +extern void SM_DECL SoftModemATPrintf(uchar *format, void *arg1, void *arg2, void *arg3);
13933 +#define SoftModemSetInputSaturationLimit(limit) (gSystemVars.inputSignalLimit = limit)
13934 +#define SoftModemResetInputSaturationLimit() (gSystemVars.inputSignalLimit = 0)
13936 +#endif /* !ADSL_MODEM */
13938 +#endif /* SoftModemPh */
13939 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/SoftModemTypes.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/SoftModemTypes.h
13940 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/SoftModemTypes.h 1970-01-01 01:00:00.000000000 +0100
13941 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/bcm96348/softdsl/SoftModemTypes.h 2006-06-26 09:07:10.000000000 +0200
13944 +<:copyright-broadcom
13946 + Copyright (c) 2002 Broadcom Corporation
13947 + All Rights Reserved
13948 + No portions of this material may be reproduced in any form without the
13949 + written permission of:
13950 + Broadcom Corporation
13951 + 16215 Alton Parkway
13952 + Irvine, California 92619
13953 + All information contained in this document is Broadcom Corporation
13954 + company private, proprietary, and trade secret.
13958 +/****************************************************************************
13960 + * SoftModemTypes.h
13964 + * This file contains some of the type declarations for SoftModem
13966 + * Copyright (c) 1993-1997 AltoCom, Inc. All rights reserved.
13967 + * Authors: Mark Gonikberg, Haixiang Liang.
13969 + * $Revision: 1.9 $
13971 + * $Id: SoftModemTypes.h,v 1.9 2004/04/13 00:16:59 ilyas Exp $
13973 + * $Log: SoftModemTypes.h,v $
13974 + * Revision 1.9 2004/04/13 00:16:59 ilyas
13975 + * Merged the latest ADSL driver changes
13977 + * Revision 1.8 2004/01/24 01:35:33 ytan
13978 + * add multi-section lmem swap
13980 + * Revision 1.7 2001/09/21 19:19:01 ilyas
13981 + * Minor fixes for VxWorks build
13983 + * Revision 1.6 2001/08/16 02:16:39 khp
13984 + * - added definitions for SLOW_DATA and FAST_TEXT, defined to nothing
13985 + * except when bcm47xx && USE_SLOW_DATA or USE_FAST_TEXT. Any function
13986 + * that needs to run fast should be marked with FAST_TEXT. Any data that
13987 + * is not referenced often should be marked with SLOW_DATA.
13989 + * Revision 1.5 2001/03/30 00:49:59 liang
13990 + * Changed warning output message.
13992 + * Revision 1.4 2000/06/21 22:24:40 yongbing
13993 + * Modify WARN micro to limit the number of same warnings printed
13995 + * Revision 1.3 1999/08/05 20:02:13 liang
13996 + * Merged with the softmodem top of the tree on 08/04/99.
13998 + * Revision 1.2 1999/01/27 22:14:29 liang
13999 + * Merge with SoftModem_3_1_02.
14001 + * Revision 1.19 1998/11/17 04:02:39 yura
14002 + * Fixed WARN and ASSERT redefinition warning for WinNT targets
14004 + * Revision 1.18 1998/08/26 19:20:43 scott
14005 + * Commented out EXCLUDE_CYGWIN32_TYPES define
14007 + * Revision 1.17 1998/08/13 19:03:06 scott
14008 + * Added BitField definition and INT_IS_LONG
14010 + * Revision 1.16 1998/08/08 03:39:55 scott
14011 + * The DEBUG_PTR_ENABLED macro can be used to enable only the DEBUG_PTR macros
14013 + * Revision 1.15 1998/07/28 22:21:31 mwg
14014 + * Fixed problems with NULL & nil being defined incorrectly
14016 + * Revision 1.14 1998/07/08 17:09:17 scott
14017 + * Define ASSERT and WARN only if not already defined
14019 + * Revision 1.13 1998/07/02 20:46:34 scott
14020 + * Added workaround for building certain builds with older SunOS
14022 + * Revision 1.12 1998/02/09 18:24:49 scott
14023 + * Defined "Private" as nothing for GreenHill (to prevent erroneous section
14024 + * allocations for data)
14026 + * Revision 1.11 1997/08/29 21:39:24 scott
14027 + * Added check for LONG_IS_INT define (for TI C6X support)
14029 + * Revision 1.10 1997/05/29 19:50:23 mwg
14030 + * Added code to avoid type redefintions under SunOS.
14032 + * Revision 1.9 1997/03/19 18:35:08 mwg
14033 + * Changed copyright notice.
14035 + * Revision 1.8 1997/02/11 00:05:53 mwg
14036 + * Minor adjustments for Pentium optimization.
14038 + * Revision 1.7 1997/01/11 01:30:47 mwg
14039 + * Added new macro WARN -- the same as ASSERT but without exit.
14041 + * Revision 1.6 1996/08/22 20:07:39 liang
14042 + * When ASSERT fires, only print out information, don't exit.
14044 + * Revision 1.5 1996/05/06 06:49:10 mwg
14045 + * Fixed linux problems.
14047 + * Revision 1.4 1996/05/02 08:40:16 mwg
14048 + * Merged in Chromatic bug fixes.
14050 + * Revision 1.3 1996/04/01 20:59:53 mwg
14051 + * Added macros to setup and use debug pointer.
14053 + * Revision 1.2 1996/02/27 01:50:04 mwg
14054 + * Added ASSERT() macro.
14056 + * Revision 1.1.1.1 1996/02/14 02:35:13 mwg
14057 + * Redesigned the project directory structure. Merged V.34 into the project.
14059 + * Revision 1.2 1995/12/03 06:59:31 mwg
14060 + * Fixed all gcc varnings. We are now running under Linux on a PC!
14062 + *****************************************************************************/
14063 +#ifndef SoftModemTypesh
14064 +#define SoftModemTypesh
14066 +#ifdef LONG_SHORTS
14067 +#define short long
14068 +#define ushort unsigned long
14071 +typedef signed char schar;
14072 +typedef unsigned char uchar;
14074 +#if 0 /* This is not currently required */
14075 +#if defined(_CYGWIN32) && defined(DEBUG)
14076 +#define EXCLUDE_CYGWIN32_TYPES
14080 +#if !defined(_SYS_TYPES_H) || !defined(TARG_OS_RTEMS)
14081 +#if defined(_CFE_)
14082 + typedef unsigned int uint;
14083 + typedef unsigned long ulong;
14084 + typedef unsigned short ushort;
14085 +#elif defined(TARG_OS_RTEMS)
14086 +#if defined(HOST_ARCH_LINUX)
14087 + typedef unsigned int uint;
14089 + typedef unsigned long ulong;
14090 +#if defined(HOST_ARCH_LINUX)
14091 + typedef unsigned short ushort;
14093 +#elif defined(EXCLUDE_CYGWIN32_TYPES) || (!defined _NO_TYPE_DEFS_ && !defined _SYS_TYPES_H && !defined __SYS_TYPES_H__ && !defined _SYS_BSD_TYPES_H && !defined _LINUX_TYPES_H) || defined(__sparc__)
14094 +#ifndef EXCLUDE_CYGWIN32_TYPES
14095 + typedef unsigned int uint;
14097 +#ifndef _LINUX_TYPES_H
14098 + typedef unsigned long ulong;
14100 +#if !defined(ushort) && !defined(EXCLUDE_CYGWIN32_TYPES) && !defined(__INCvxTypesOldh)
14101 + typedef unsigned short ushort;
14105 +typedef unsigned long ulong;
14108 +#if defined(GREENHILL) || defined(GNUTX39) /* GH allocates private data to incorrect section */
14111 +#define Private static
14128 +typedef unsigned char Boolean;
14129 +typedef unsigned int BitField; /* this must occur BEFORE long_is_int/int_is_long defs */
14131 +#ifdef LONG_IS_INT
14133 +#define ulong uint
14136 +#ifdef INT_IS_LONG
14138 +#define uint ulong
14141 +#define POSTULATE(postulate) \
14146 + char NegativeSizeIfPostulateFalse[((int)(postulate))*2 - 1]; \
14147 + } PostulateCheckStruct; \
14151 +#if defined(DEBUG) && !defined(__KERNEL__)
14153 +#define kDSLNumberWarnTimes 10
14154 +#define WARN(assertion) \
14155 + { static int warnSeveralTimes=0; \
14156 + if ((!(assertion))&(warnSeveralTimes<kDSLNumberWarnTimes)) \
14158 + fprintf(stderr, "Warning, failed: %s\n", #assertion); \
14159 + fprintf(stderr, "%s:%d\n", __FILE__, __LINE__); \
14160 + warnSeveralTimes++; \
14165 +#define ASSERT(assertion) \
14166 + { if (!(assertion)) \
14168 + fprintf(stderr, "Assertion failed: %s\n", #assertion); \
14169 + fprintf(stderr, "%s:%d\n", __FILE__, __LINE__); \
14185 + * memory allocation macros
14188 +#if defined(bcm47xx) && defined(USE_SLOW_DATA)
14189 +#define SLOW_DATA __attribute__ ((section(".slow_data")))
14194 +#if defined(bcm47xx) && defined(USE_FAST_TEXT)
14195 +#define FAST_TEXT __attribute__ ((section(".fast_text")))
14200 +#if defined(bcm47xx) && defined(SWAP_LMEM)
14201 +#define SWAP_TEXT1_1 __attribute__ ((section(".swap_text1_1")))
14202 +#define SWAP_TEXT1_2 __attribute__ ((section(".swap_text1_2")))
14203 +#define SWAP_TEXT2_1 __attribute__ ((section(".swap_text2_1")))
14204 +#define SWAP_TEXT2_2 __attribute__ ((section(".swap_text2_2")))
14205 +#define SWAP_TEXT3_1 __attribute__ ((section(".swap_text3_1")))
14206 +#define SWAP_TEXT3_2 __attribute__ ((section(".swap_text3_2")))
14208 +#define SWAP_TEXT1_1 FAST_TEXT
14209 +#define SWAP_TEXT1_2 FAST_TEXT
14210 +#define SWAP_TEXT2_1 FAST_TEXT
14211 +#define SWAP_TEXT2_2 FAST_TEXT
14212 +#define SWAP_TEXT3_1 FAST_TEXT
14213 +#define SWAP_TEXT3_2 FAST_TEXT
14219 +#if defined(DEBUG) || defined(DEBUG_PTR_ENABLED)
14220 +#define DECLARE_DEBUG_PTR(type) static type *gv;
14221 +#define SETUP_DEBUG_PTR() gv = &globalVar
14223 +#define DECLARE_DEBUG_PTR(type)
14224 +#define SETUP_DEBUG_PTR()
14230 +#define HereIsTheGlobalVarPointerMacro SETUP_DEBUG_PTR();
14232 +#define HereIsTheGlobalVarPointerMacro
14235 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/adslcore6348/adsl_defs.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/adslcore6348/adsl_defs.h
14236 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/adslcore6348/adsl_defs.h 1970-01-01 01:00:00.000000000 +0100
14237 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/adslcore6348/adsl_defs.h 2006-06-26 09:07:10.000000000 +0200
14239 +/* TARGET=bcm6348-dmt-T1-dmtbis-adsl2plus-L2-SRA-firmware-Qproc-HW-RTL-pipeline-IncOneBit-Readsl2-doubleUS */
14241 +#define SOURCE_FILE_
14242 +#define BCM6348_SRC
14243 +#define G994_T1P413_1024_FFT
14244 +#define ENABLE_DIG_USPWR_CUTBACK
14245 +#define ADSLCORE_ONLY
14247 +#define LOOP_TIMING_PLL
14248 +#define RCV_PHASE_TWEAK_ONLY
14249 +#define ADSL_MAX_POSSIBLE_RCV_RATE
14250 +#define HARDWARE_CHANNEL
14251 +#define ADSL_HARDWARE_AGC
14252 +#define HW_CHANNEL_ADC
14253 +#define HW_CHANNEL_DAC
14255 +#define DIGITALEC_SINGLE_TAP_UPDATE
14256 +#define ANALOGEC_SINGLE_TAP_UPDATE
14258 +#define G992_TRELLIS_CODE_CLAMPING
14259 +#define G992DECODERTRELLISBOUNDARY
14260 +#define MEMORYLIMIT64K
14262 +#define DSL_BIG_ENDIAN
14264 +#define VP_INLINE -Winline
14265 +#define USE_ASM_API
14267 +#define RSENC_INLINE
14268 +#define BITENC_INLINE
14269 +#define USE_SLOW_DATA
14270 +#define USE_FAST_TEXT
14271 +#define PROFILE_INLINE
14273 +#define G992_RESYNC_PILOT_PHASE_IN_SHOWTIME
14274 +#define G992_APPLY_SSVI
14275 +#define SHARE_TEQ_VARS
14277 +#define DOUBLE_UP_STREAM
14278 +#define G994P1_SUPPORT_A43C
14279 +#define USE_ASM_API
14281 +#define MEMORYLIMIT64K
14282 +#define ADSL_FIRMWARE
14283 +#define G992DATA_XMT_COMPACT_WORD
14284 +#define ADSL_MAX_POSSIBLE_RCV_RATE
14285 +#define DSP_FRONTEND_ONLY
14286 +#define G992P3_ONE_BIT_CONSTELLATION
14287 +#define ADSL_MODEM
14290 +#define ADSL_SOFTWARE_TIME_ERROR_CALCULATION
14291 +#define DSL_REPORT_ALL_COUNTERS
14292 +#define ADSL_MONITOR_LCD
14294 +#define G994P1_ATUR
14297 +#define ADSL_FRAMER
14301 +#define G992_ATUR_UPSTREAM_SAMPLING_FREQ_276KHZ
14302 +#define G994P1_ATUR_UPSTREAM_SAMPLING_FREQ_276KHZ
14303 +#define G992_TRELLISCODE
14304 +#define ADSL_HARDWARE_ECHO_CANCELLOR
14306 +#define G992P1_ATUR
14307 +#define G992P1_ANNEX_A
14308 +#define ADSL_HARDWARE_TIME_ERROR_TRACKING
14309 +#define G992P1_NEWFRAME
14310 +#define G992P1_NEWFRAME_ATUR
14311 +#define G992P1_ANNEX_A_USED_FOR_G992P2
14313 +#define G992_ATUR_UPSTREAM_SAMPLING_FREQ_276KHZ
14314 +#define G992_CALC_DEBUG_SNR_BEFORE_TEQ
14316 +#define RATE_SELECT_E14
14317 +#define G992P3_ATUR
14318 +#define G992P3AMENDMENT
14319 +#define GLOBESPAN_DM
14320 +#define G992P3_COMB_MSG_THREE_COPIES
14321 +#define G992P3_POWER_MANAGEMENT
14322 +#define G992P3_SRA
14324 +#define G992P5_ATUR
14325 +#define ADSL_PIPELINE_CODE
14326 +#define ADSL_HARDWARE_TIME_ERROR_TRACKING
14327 +#define G994P1RCV_QPROC
14328 +#define G994P1XMT_QPROC
14329 +#define G992RCV_QPROC
14330 +#define G992XMT_QPROC
14331 +#define G992RCV_RS
14332 +#define VP_SIMULATOR
14333 +#define T1P413RCV_QPROC
14334 +#define T1P413XMT_QPROC
14335 +#define G992ENC_HW_DATAMODE
14336 +#define G992DATA_XMT_HW_RS
14337 +#define G992DATA_XMT_COMPACT_WORD
14338 +#define G992RCV_QPROC_FAST
14339 +#define G992_BIT_SWAP
14340 +#define ADSL_IDENTIFY_VENDOR_FIRMWARE
14341 +#define ADSL_ATUR_FORCE_BIGGER_UPSTREAM_MARGIN
14342 +#define G992_MORE_FRAME_MODE
14343 +#define XMT_RACT2_FOR_ADI_COMPATIBILITY
14344 +#define XMT_FFT_SIZE_2X
14345 +#define SYNCH_SYMBOL_DETECTION
14346 +#define ANSI_CACT12_PING_PONG
14347 +#define ADSL_SPECIAL_FIX_FOR_FRENCH_TELECOM
14348 +#define G994P1_CHECK_SECURITY
14349 +#define G994P1_NON_STD_INFO
14350 +#define I432_HEADER_COMPRESSION
14351 +#define TDC_IOP_FIX_ERICSSON_TI_4000C_350
14352 +#define TDC_IOP_FIX_SEIMENS_TI
14353 +#define FT_ADI_US_RATE_FIX
14354 +#define ANSI_CACT12_PING_PONG
14355 +#define G992_ATUR_UPSTREAM_SAMPLING_FREQ_276KHZ
14356 +#define G994P1_ATUR_UPSTREAM_SAMPLING_FREQ_276KHZ
14358 +#define G992_APPLY_SSVI
14359 +#define READSL2_FILTERS
14362 +#define ADSL_PHY_XFACE_OFFSET 0x21F90
14365 +#define ADSL_PHY_SDRAM_BIAS 0x1A0000
14368 +#define ADSL_PHY_SDRAM_LINK_OFFSET 0x1A0000
14371 +#define ADSL_PHY_SDRAM_PAGE_SIZE 0x200000
14372 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/adslcore6348/adsl_lmem.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/adslcore6348/adsl_lmem.h
14373 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/adslcore6348/adsl_lmem.h 1970-01-01 01:00:00.000000000 +0100
14374 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/adslcore6348/adsl_lmem.h 2006-06-26 09:07:10.000000000 +0200
14378 +** This file has been generated automatically by bin2c program
14381 +extern const unsigned char adsl_lmem[51036];
14382 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/adslcore6348/adsl_sdram.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/adslcore6348/adsl_sdram.h
14383 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/adslcore6348/adsl_sdram.h 1970-01-01 01:00:00.000000000 +0100
14384 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/adslcore6348/adsl_sdram.h 2006-06-26 09:07:10.000000000 +0200
14388 +** This file has been generated automatically by bin2c program
14391 +extern const unsigned char adsl_sdram[364348];
14392 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/AdslCoreDefs.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/AdslCoreDefs.h
14393 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/AdslCoreDefs.h 1970-01-01 01:00:00.000000000 +0100
14394 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/AdslCoreDefs.h 2006-06-26 09:07:10.000000000 +0200
14397 +<:copyright-broadcom
14399 + Copyright (c) 2002 Broadcom Corporation
14400 + All Rights Reserved
14401 + No portions of this material may be reproduced in any form without the
14402 + written permission of:
14403 + Broadcom Corporation
14404 + 16215 Alton Parkway
14405 + Irvine, California 92619
14406 + All information contained in this document is Broadcom Corporation
14407 + company private, proprietary, and trade secret.
14411 +/****************************************************************************
14413 + * AdslCore.c -- Bcm ADSL core driver
14416 + * This file contains BCM ADSL core driver
14419 + * Copyright (c) 2000-2001 Broadcom Corporation
14420 + * All Rights Reserved
14421 + * No portions of this material may be reproduced in any form without the
14422 + * written permission of:
14423 + * Broadcom Corporation
14424 + * 16215 Alton Parkway
14425 + * Irvine, California 92619
14426 + * All information contained in this document is Broadcom Corporation
14427 + * company private, proprietary, and trade secret.
14428 + * Authors: Ilya Stomakhin
14430 + * $Revision: 1.4 $
14432 + * $Id: AdslCoreDefs.h,v 1.4 2004/07/20 23:45:48 ilyas Exp $
14434 + * $Log: AdslCoreDefs.h,v $
14435 + * Revision 1.4 2004/07/20 23:45:48 ilyas
14436 + * Added driver version info, SoftDslPrintf support. Fixed G.997 related issues
14438 + * Revision 1.3 2004/06/10 00:20:33 ilyas
14439 + * Added L2/L3 and SRA
14441 + * Revision 1.2 2004/04/12 23:24:38 ilyas
14442 + * Added default G992P5 PHY definition
14444 + * Revision 1.1 2004/04/08 23:59:15 ilyas
14445 + * Initial CVS checkin
14447 + ****************************************************************************/
14449 +#ifndef _ADSL_CORE_DEFS_H
14450 +#define _ADSL_CORE_DEFS_H
14452 +#if defined(__KERNEL__)
14453 +#include <linux/config.h>
14456 +#if defined(CONFIG_BCM96348) || defined(BOARD_bcm96348) || defined(_BCM96348_) || defined(CONFIG_BCM96338) || defined(BOARD_bcm96338) || defined(_BCM96338_)
14457 +#ifdef ADSL_ANNEXC
14458 +#include "../adslcore6348C/adsl_defs.h"
14459 +#elif defined(ADSL_ANNEXB)
14460 +#include "../adslcore6348B/adsl_defs.h"
14461 +#elif defined(ADSL_SADSL)
14462 +#include "../adslcore6348SA/adsl_defs.h"
14464 +#include "../adslcore6348/adsl_defs.h"
14468 +#if defined(__KERNEL__) || defined(TARG_OS_RTEMS) || defined(_CFE_)
14469 +#if defined(CONFIG_BCM96345) || defined(BOARD_bcm96345) || defined(_BCM96345_)
14470 +#ifdef ADSL_ANNEXC
14471 +#include "../adslcore6345C/adsl_defs.h"
14472 +#elif defined(ADSL_ANNEXB)
14473 +#include "../adslcore6345B/adsl_defs.h"
14474 +#elif defined(ADSL_SADSL)
14475 +#include "../adslcore6345SA/adsl_defs.h"
14477 +#include "../adslcore6345/adsl_defs.h"
14479 +#endif /* of CONFIG_BCM96345 */
14481 +#if defined(CONFIG_BCM96345)
14482 +#ifdef ADSL_ANNEXC
14483 +#include "../adslcoreC/adsl_defs.h"
14484 +#elif defined(ADSL_ANNEXB)
14485 +#include "../adslcoreB/adsl_defs.h"
14486 +#elif defined(ADSL_SADSL)
14487 +#include "../adslcoreSA/adsl_defs.h"
14489 +#include "../adslcore/adsl_defs.h"
14491 +#endif /* of CONFIG_BCM96345 */
14492 +#endif /* __KERNEL__ */
14498 +#include "AdslXfaceData.h"
14500 +/* adjust some definitions for the HOST */
14502 +#undef GLOBAL_PTR_BIAS
14503 +#undef ADSLCORE_ONLY
14504 +#undef USE_SLOW_DATA
14505 +#undef USE_FAST_TEXT
14506 +#undef VP_SIMULATOR
14508 +#undef ADSL_FRAMER
14514 +#define G997_1_FRAMER
14517 +#ifndef FLATTEN_ADDR_ADJUST
14518 +#define FLATTEN_ADDR_ADJUST 0xFFF00000
14521 +/* definitions for combo PHY (AnnexA(ADSL2) and AnnexB) */
14523 +#if !(defined(ADSL_SINGLE_PHY) || defined(G992_ANNEXC))
14525 +#undef G992P1_ANNEX_A
14526 +#define G992P1_ANNEX_A
14531 +#define G992P1_ANNEX_A
14534 +#undef G992P1_ANNEX_A_USED_FOR_G992P2
14535 +#define G992P1_ANNEX_A_USED_FOR_G992P2
14539 +#undef G992P1_ANNEX_B
14540 +#define G992P1_ANNEX_B
14544 +/* ADSL PHY definition */
14547 + unsigned long sdramPageAddr;
14548 + unsigned long sdramImageAddr;
14549 + unsigned long sdramImageSize;
14550 + unsigned long sdramPhyImageAddr;
14551 + unsigned short fwType;
14552 + unsigned short chipType;
14553 + unsigned short mjVerNum;
14554 + unsigned short mnVerNum;
14556 + unsigned long features[4];
14558 +extern adslPhyInfo adslCorePhyDesc;
14562 +#define kAdslPhyChipMjMask 0xFF00
14563 +#define kAdslPhyChipMnMask 0x00FF
14564 +#define kAdslPhyChipUnknown 0
14565 +#define kAdslPhyChip6345 0x100
14566 +#define kAdslPhyChip6348 0x200
14567 +#define kAdslPhyChipRev0 0
14568 +#define kAdslPhyChipRev1 1
14569 +#define kAdslPhyChipRev2 2
14570 +#define kAdslPhyChipRev3 3
14571 +#define kAdslPhyChipRev4 4
14572 +#define kAdslPhyChipRev5 5
14574 +#define ADSL_PHY_SUPPORT(f) AdslFeatureSupported(adslCorePhyDesc.features,f)
14575 +#define ADSL_PHY_SET_SUPPORT(p,f) AdslFeatureSet((p)->features,f)
14577 +/* ADSL Driver to/from PHY address and data conversion macros */
14579 +#ifdef ADSLDRV_LITTLE_ENDIAN
14580 +#define ADSL_ENDIAN_CONV_LONG(x) ( ((x) << 24) | (((x) << 8) & 0x00FF0000) | (((x) >> 8) & 0x0000FF00) | ((unsigned long)(x) >> 24) )
14581 +#define ADSL_ENDIAN_CONV_SHORT(x) ( ((x) << 8) | ((unsigned short)(x) >> 8) )
14582 +#define ADSL_ENDIAN_CONV_2SHORTS(x) ( ((x) << 16) | ((unsigned long)(x) >> 16) )
14584 +#define ADSL_ENDIAN_CONV_LONG(x) x
14585 +#define ADSL_ENDIAN_CONV_SHORT(x) x
14586 +#define ADSL_ENDIAN_CONV_2SHORTS(x) x
14589 +#ifndef ADSL_PHY_XFACE_OFFSET
14590 +#define ADSL_PHY_XFACE_OFFSET 0x00017F90
14592 +#define ADSL_LMEM_XFACE_DATA (0xFFF00000 | ADSL_PHY_XFACE_OFFSET)
14594 +#ifndef ADSL_PHY_SDRAM_START
14595 +#define ADSL_PHY_SDRAM_START 0x10000000
14597 +#ifndef ADSL_PHY_SDRAM_BIAS
14598 +#define ADSL_PHY_SDRAM_BIAS 0x00040000
14600 +#define ADSL_PHY_SDRAM_START_4 (ADSL_PHY_SDRAM_START + ADSL_PHY_SDRAM_BIAS)
14602 +#ifndef ADSL_PHY_SDRAM_PAGE_SIZE
14603 +#define ADSL_PHY_SDRAM_PAGE_SIZE 0x00080000
14606 +#ifdef ADSL_PHY_SDRAM_BIAS
14607 +#define ADSL_SDRAM_IMAGE_SIZE (ADSL_PHY_SDRAM_PAGE_SIZE - ADSL_PHY_SDRAM_BIAS)
14609 +#define ADSL_SDRAM_IMAGE_SIZE (256*1024)
14613 +#ifndef ADSL_PHY_SDRAM_LINK_OFFSET
14614 +#define ADSL_PHY_SDRAM_LINK_OFFSET 0x00040000
14617 +#define ADSL_SDRAM_TOTAL_SIZE 0x00800000
14618 +#define ADSL_SDRAM_HOST_MIPS_DEFAULT (0xA0000000 | (ADSL_SDRAM_TOTAL_SIZE - ADSL_PHY_SDRAM_PAGE_SIZE + ADSL_PHY_SDRAM_BIAS))
14620 +#define ADSLXF ((AdslXfaceData *) ADSL_LMEM_XFACE_DATA)
14622 +#define ADSL_MIPS_LMEM_ADDR(a) (((ulong)(a) & 0x19000000) == 0x19000000)
14623 +#define SDRAM_ADDR_TO_HOST(a) ((void *) ((ulong)(a) - adslCorePhyDesc.sdramPhyImageAddr + \
14624 + (ADSLXF->sdramBaseAddr ? (unsigned long) ADSLXF->sdramBaseAddr : ADSL_SDRAM_HOST_MIPS_DEFAULT)))
14625 +#define SDRAM_ADDR_TO_ADSL(a) ((void *) (adslCorePhyDesc.sdramPhyImageAddr + ((ulong)(a) - \
14626 + (ADSLXF->sdramBaseAddr ? (unsigned long) ADSLXF->sdramBaseAddr : ADSL_SDRAM_HOST_MIPS_DEFAULT))))
14628 +#define ADSL_ADDR_TO_HOST(addr) ADSL_MIPS_LMEM_ADDR(addr) ? (void *) ((ulong) (addr) | FLATTEN_ADDR_ADJUST) : SDRAM_ADDR_TO_HOST(addr)
14635 +#ifndef __SoftDslPrintf
14636 +void __SoftDslPrintf(void *gDslVars, char *fmt, int argNum, ...);
14641 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/AdslMib.gh linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/AdslMib.gh
14642 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/AdslMib.gh 1970-01-01 01:00:00.000000000 +0100
14643 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/AdslMib.gh 2006-06-26 09:07:10.000000000 +0200
14645 +/****************************************************************************
14650 + * This is a header file which defines the type for AdslMib
14651 + * global variable structure.
14654 + * Copyright (c) 1993-1998 AltoCom, Inc. All rights reserved.
14655 + * Authors: Ilya Stomakhin
14657 + * $Revision: 1.8 $
14659 + * $Id: AdslMib.gh,v 1.8 2004/06/04 18:56:01 ilyas Exp $
14661 + * $Log: AdslMib.gh,v $
14662 + * Revision 1.8 2004/06/04 18:56:01 ilyas
14663 + * Added counter for ADSL2 framing and performance
14665 + * Revision 1.7 2003/10/17 21:02:12 ilyas
14666 + * Added more data for ADSL2
14668 + * Revision 1.6 2003/10/14 00:55:27 ilyas
14669 + * Added UAS, LOSS, SES error seconds counters.
14670 + * Support for 512 tones (AnnexI)
14672 + * Revision 1.5 2003/07/18 19:07:15 ilyas
14673 + * Merged with ADSL driver
14675 + * Revision 1.4 2002/11/13 21:32:49 ilyas
14676 + * Added adjustK support for Centillium non-standard framing mode
14678 + * Revision 1.3 2002/10/31 20:27:13 ilyas
14679 + * Merged with the latest changes for VxWorks/Linux driver
14681 + * Revision 1.2 2002/07/20 00:51:41 ilyas
14682 + * Merged witchanges made for VxWorks/Linux driver.
14684 + * Revision 1.1 2001/12/21 22:39:30 ilyas
14685 + * Added support for ADSL MIB data objects (RFC2662)
14688 + *****************************************************************************/
14690 +#ifndef AdslMibGlobals
14691 +#define AdslMibGlobals
14693 +#include "AdslMib.h"
14699 + adslMibInfo adslMib;
14701 + /* ADSL state data */
14703 + adslMibNotifyHandlerType notifyHandlerPtr;
14706 + Boolean currSecondErrored;
14707 + Boolean currSecondLOS;
14708 + Boolean currSecondSES;
14709 + Boolean currSecondFEC;
14711 + ulong rcvRateBps;
14712 + ulong xmtRateBps;
14713 + ulong linkStatus;
14714 + G992CodingParams rcvParams;
14715 + G992CodingParams xmtParams;
14716 + ulong shtCounters[kG992ShowtimeNumOfMonitorCounters];
14717 + ulong scratchData;
14718 + long showtimeMarginThld;
14720 + /* ADSL diag data */
14722 + short snr[kAdslMibMaxToneNum];
14723 + short showtimeMargin[kAdslMibMaxToneNum];
14724 + uchar bitAlloc[kAdslMibMaxToneNum];
14725 + short gain[kAdslMibMaxToneNum];
14726 + ComplexShort chanCharLin[kAdslMibMaxToneNum];
14727 + short chanCharLog[kAdslMibMaxToneNum];
14728 + short quietLineNoise[kAdslMibMaxToneNum];
14732 + ulong g992MsgType;
14733 + uchar rsOption[1+4];
14734 + Boolean rsOptionValid;
14736 + adslMibVarsStruct;
14738 +#endif /* AdslMibGlobals */
14739 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/AdslMib.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/AdslMib.h
14740 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/AdslMib.h 1970-01-01 01:00:00.000000000 +0100
14741 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/AdslMib.h 2006-06-26 09:07:10.000000000 +0200
14744 +<:copyright-broadcom
14746 + Copyright (c) 2002 Broadcom Corporation
14747 + All Rights Reserved
14748 + No portions of this material may be reproduced in any form without the
14749 + written permission of:
14750 + Broadcom Corporation
14751 + 16215 Alton Parkway
14752 + Irvine, California 92619
14753 + All information contained in this document is Broadcom Corporation
14754 + company private, proprietary, and trade secret.
14758 +/****************************************************************************
14763 + * This file contains the exported functions and definitions for AdslMib
14766 + * Copyright (c) 1993-1998 AltoCom, Inc. All rights reserved.
14767 + * Authors: Ilya Stomakhin
14769 + * $Revision: 1.9 $
14771 + * $Id: AdslMib.h,v 1.9 2004/04/12 23:34:52 ilyas Exp $
14773 + * $Log: AdslMib.h,v $
14774 + * Revision 1.9 2004/04/12 23:34:52 ilyas
14775 + * Merged the latest ADSL driver chnages for ADSL2+
14777 + * Revision 1.8 2004/03/03 20:14:05 ilyas
14778 + * Merged changes for ADSL2+ from ADSL driver
14780 + * Revision 1.7 2003/10/14 00:55:27 ilyas
14781 + * Added UAS, LOSS, SES error seconds counters.
14782 + * Support for 512 tones (AnnexI)
14784 + * Revision 1.6 2003/07/18 19:07:15 ilyas
14785 + * Merged with ADSL driver
14787 + * Revision 1.5 2002/10/31 20:27:13 ilyas
14788 + * Merged with the latest changes for VxWorks/Linux driver
14790 + * Revision 1.4 2002/07/20 00:51:41 ilyas
14791 + * Merged witchanges made for VxWorks/Linux driver.
14793 + * Revision 1.3 2002/01/13 22:25:40 ilyas
14794 + * Added functions to get channels rate
14796 + * Revision 1.2 2002/01/03 06:03:36 ilyas
14797 + * Handle byte moves tha are not multiple of 2
14799 + * Revision 1.1 2001/12/21 22:39:30 ilyas
14800 + * Added support for ADSL MIB data objects (RFC2662)
14803 + *****************************************************************************/
14805 +#ifndef AdslMibHeader
14806 +#define AdslMibHeader
14808 +#if defined(_CFE_)
14809 +#include "lib_types.h"
14810 +#include "lib_string.h"
14813 +#include "AdslMibDef.h"
14815 +/* Interface functions */
14817 +typedef int (SM_DECL *adslMibNotifyHandlerType) (void *gDslVars, ulong event);
14819 +extern Boolean AdslMibInit(void *gDslVars);
14820 +extern void AdslMibTimer(void *gDslVars, long timeMs);
14821 +extern void AdslMibStatusSnooper (void *gDslVars, dslStatusStruct *status);
14822 +extern void AdslMibSetNotifyHandler(void *gDslVars, adslMibNotifyHandlerType notifyHandlerPtr);
14823 +extern int AdslMibGetModulationType(void *gDslVars);
14824 +extern Boolean AdslMibIsAdsl2Mod(void *gDslVars);
14825 +extern int AdslMibGetActiveChannel(void *gDslVars);
14826 +extern int AdslMibGetGetChannelRate(void *gDslVars, int dir, int channel);
14827 +extern Boolean AdslMibIsLinkActive(void *gDslVars);
14828 +extern int AdslMibPowerState(void *gDslVars);
14829 +extern int AdslMibTrainingState (void *gDslVars);
14830 +extern void AdslMibClearData(void *gDslVars);
14831 +extern void AdslMibClearBertResults(void *gDslVars);
14832 +extern void AdslMibBertStartEx(void *gDslVars, ulong bertSec);
14833 +extern void AdslMibBertStopEx(void *gDslVars);
14834 +extern ulong AdslMibBertContinueEx(void *gDslVars, ulong totalBits, ulong errBits);
14835 +extern void AdslMibSetLPR(void *gDslVars);
14836 +extern void AdslMibSetShowtimeMargin(void *gDslVars, long showtimeMargin);
14837 +extern void AdslMibResetConectionStatCounters(void *gDslVars);
14839 +extern void AdslMibByteMove (int size, void* srcPtr, void* dstPtr);
14840 +extern void AdslMibByteClear(int size, void* dstPtr);
14841 +extern int AdslMibStrCopy(char *srcPtr, char *dstPtr);
14843 +/* AdslMibGetData dataId codes */
14845 +#define kAdslMibDataAll 0
14847 +extern void *AdslMibGetData (void *gDslVars, int dataId, void *pAdslMibData);
14849 +extern int AdslMibGetObjectValue (
14854 + ulong *dataBufLen);
14856 +#endif /* AdslMibHeader */
14857 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/AdslMibOid.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/AdslMibOid.h
14858 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/AdslMibOid.h 1970-01-01 01:00:00.000000000 +0100
14859 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/AdslMibOid.h 2006-06-26 09:07:10.000000000 +0200
14862 +<:copyright-broadcom
14864 + Copyright (c) 2002 Broadcom Corporation
14865 + All Rights Reserved
14866 + No portions of this material may be reproduced in any form without the
14867 + written permission of:
14868 + Broadcom Corporation
14869 + 16215 Alton Parkway
14870 + Irvine, California 92619
14871 + All information contained in this document is Broadcom Corporation
14872 + company private, proprietary, and trade secret.
14876 +/****************************************************************************
14881 + * SNMP object identifiers for ADSL MIB and other related MIBs
14883 + * Copyright (c) 1993-1998 AltoCom, Inc. All rights reserved.
14884 + * Authors: Ilya Stomakhin
14886 + * $Revision: 1.5 $
14888 + * $Id: AdslMibOid.h,v 1.5 2004/06/04 18:56:01 ilyas Exp $
14890 + * $Log: AdslMibOid.h,v $
14891 + * Revision 1.5 2004/06/04 18:56:01 ilyas
14892 + * Added counter for ADSL2 framing and performance
14894 + * Revision 1.4 2003/10/17 21:02:12 ilyas
14895 + * Added more data for ADSL2
14897 + * Revision 1.3 2003/10/14 00:55:27 ilyas
14898 + * Added UAS, LOSS, SES error seconds counters.
14899 + * Support for 512 tones (AnnexI)
14901 + * Revision 1.2 2002/07/20 00:51:41 ilyas
14902 + * Merged witchanges made for VxWorks/Linux driver.
14904 + * Revision 1.1 2001/12/21 22:39:30 ilyas
14905 + * Added support for ADSL MIB data objects (RFC2662)
14908 + *****************************************************************************/
14910 +#ifndef AdslMibOidHeader
14911 +#define AdslMibOidHeader
14913 +#define kOidAdsl 94
14914 +#define kOidAdslInterleave 124
14915 +#define kOidAdslFast 125
14916 +#define kOidAtm 37
14918 +#define kOidAdslLine 1
14919 +#define kOidAdslMibObjects 1
14921 +#define kOidAdslLineTable 1
14922 +#define kOidAdslLineEntry 1
14923 +#define kOidAdslLineCoding 1
14924 +#define kOidAdslLineType 2
14925 +#define kOidAdslLineSpecific 3
14926 +#define kOidAdslLineConfProfile 4
14927 +#define kOidAdslLineAlarmConfProfile 5
14929 +#define kOidAdslAtucPhysTable 2
14930 +#define kOidAdslAturPhysTable 3
14931 +#define kOidAdslPhysEntry 1
14932 +#define kOidAdslPhysInvSerialNumber 1
14933 +#define kOidAdslPhysInvVendorID 2
14934 +#define kOidAdslPhysInvVersionNumber 3
14935 +#define kOidAdslPhysCurrSnrMgn 4
14936 +#define kOidAdslPhysCurrAtn 5
14937 +#define kOidAdslPhysCurrStatus 6
14938 +#define kOidAdslPhysCurrOutputPwr 7
14939 +#define kOidAdslPhysCurrAttainableRate 8
14941 +#define kOidAdslAtucChanTable 4
14942 +#define kOidAdslAturChanTable 5
14943 +#define kOidAdslChanEntry 1
14944 +#define kOidAdslChanInterleaveDelay 1
14945 +#define kOidAdslChanCurrTxRate 2
14946 +#define kOidAdslChanPrevTxRate 3
14947 +#define kOidAdslChanCrcBlockLength 4
14949 +#define kOidAdslAtucPerfDataTable 6
14950 +#define kOidAdslAturPerfDataTable 7
14951 +#define kOidAdslPerfDataEntry 1
14952 +#define kOidAdslPerfLofs 1
14953 +#define kOidAdslPerfLoss 2
14954 +#define kOidAdslPerfLprs 3
14955 +#define kOidAdslPerfESs 4
14956 +#define kOidAdslPerfValidIntervals 5
14957 +#define kOidAdslPerfInvalidIntervals 6
14958 +#define kOidAdslPerfCurr15MinTimeElapsed 7
14959 +#define kOidAdslPerfCurr15MinLofs 8
14960 +#define kOidAdslPerfCurr15MinLoss 9
14961 +#define kOidAdslPerfCurr15MinLprs 10
14962 +#define kOidAdslPerfCurr15MinESs 11
14963 +#define kOidAdslPerfCurr1DayTimeElapsed 12
14964 +#define kOidAdslPerfCurr1DayLofs 13
14965 +#define kOidAdslPerfCurr1DayLoss 14
14966 +#define kOidAdslPerfCurr1DayLprs 15
14967 +#define kOidAdslPerfCurr1DayESs 16
14968 +#define kOidAdslPerfPrev1DayMoniSecs 17
14969 +#define kOidAdslPerfPrev1DayLofs 18
14970 +#define kOidAdslPerfPrev1DayLoss 19
14971 +#define kOidAdslPerfPrev1DayLprs 20
14972 +#define kOidAdslPerfPrev1DayESs 21
14974 +#define kOidAdslAtucPerfIntervalTable 8
14975 +#define kOidAdslAturPerfIntervalTable 9
14976 +#define kOidAdslPerfIntervalEntry 1
14977 +#define kOidAdslIntervalNumber 1
14978 +#define kOidAdslIntervalLofs 2
14979 +#define kOidAdslIntervalLoss 3
14980 +#define kOidAdslIntervalLprs 4
14981 +#define kOidAdslIntervalESs 5
14982 +#define kOidAdslIntervalValidData 6
14984 +#define kOidAdslAtucChanPerfTable 10
14985 +#define kOidAdslAturChanPerfTable 11
14986 +#define kOidAdslChanPerfEntry 1
14987 +#define kOidAdslChanReceivedBlks 1
14988 +#define kOidAdslChanTransmittedBlks 2
14989 +#define kOidAdslChanCorrectedBlks 3
14990 +#define kOidAdslChanUncorrectBlks 4
14991 +#define kOidAdslChanPerfValidIntervals 5
14992 +#define kOidAdslChanPerfInvalidIntervals 6
14993 +#define kOidAdslChanPerfCurr15MinTimeElapsed 7
14994 +#define kOidAdslChanPerfCurr15MinReceivedBlks 8
14995 +#define kOidAdslChanPerfCurr15MinTransmittedBlks 9
14996 +#define kOidAdslChanPerfCurr15MinCorrectedBlks 10
14997 +#define kOidAdslChanPerfCurr15MinUncorrectBlks 11
14998 +#define kOidAdslChanPerfCurr1DayTimeElapsed 12
14999 +#define kOidAdslChanPerfCurr1DayReceivedBlks 13
15000 +#define kOidAdslChanPerfCurr1DayTransmittedBlks 14
15001 +#define kOidAdslChanPerfCurr1DayCorrectedBlks 15
15002 +#define kOidAdslChanPerfCurr1DayUncorrectBlks 16
15003 +#define kOidAdslChanPerfPrev1DayMoniSecs 17
15004 +#define kOidAdslChanPerfPrev1DayReceivedBlks 18
15005 +#define kOidAdslChanPerfPrev1DayTransmittedBlks 19
15006 +#define kOidAdslChanPerfPrev1DayCorrectedBlks 20
15007 +#define kOidAdslChanPerfPrev1DayUncorrectBlks 21
15009 +#define kOidAdslAtucChanIntervalTable 12
15010 +#define kOidAdslAturChanIntervalTable 13
15011 +#define kOidAdslChanIntervalEntry 1
15012 +#define kOidAdslChanIntervalNumber 1
15013 +#define kOidAdslChanIntervalReceivedBlks 2
15014 +#define kOidAdslChanIntervalTransmittedBlks 3
15015 +#define kOidAdslChanIntervalCorrectedBlks 4
15016 +#define kOidAdslChanIntervalUncorrectBlks 5
15017 +#define kOidAdslChanIntervalValidData 6
15019 +/* AdslExtra OIDs for kOidAdslPrivate, kOidAdslPrivExtraInfo (defined in AdslMibDef.h) */
15021 +#define kOidAdslExtraConnectionInfo 1
15022 +#define kOidAdslExtraConnectionStat 2
15023 +#define kOidAdslExtraFramingMode 3
15024 +#define kOidAdslExtraTrainingState 4
15025 +#define kOidAdslExtraNonStdFramingAdjustK 5
15026 +#define kOidAdslExtraAtmStat 6
15027 +#define kOidAdslExtraDiagModeData 7
15028 +#define kOidAdslExtraAdsl2Info 8
15029 +#define kOidAdslExtraTxPerfCounterInfo 9
15031 +#define kOidAtmMibObjects 1
15032 +#define kOidAtmTcTable 4
15033 +#define kOidAtmTcEntry 1
15034 +#define kOidAtmOcdEvents 1
15035 +#define kOidAtmAlarmState 2
15037 +#endif /* AdslMibOidHeader */
15038 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/AdslXfaceData.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/AdslXfaceData.h
15039 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/AdslXfaceData.h 1970-01-01 01:00:00.000000000 +0100
15040 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/AdslXfaceData.h 2006-06-26 09:07:10.000000000 +0200
15043 +<:copyright-broadcom
15045 + Copyright (c) 2002 Broadcom Corporation
15046 + All Rights Reserved
15047 + No portions of this material may be reproduced in any form without the
15048 + written permission of:
15049 + Broadcom Corporation
15050 + 16215 Alton Parkway
15051 + Irvine, California 92619
15052 + All information contained in this document is Broadcom Corporation
15053 + company private, proprietary, and trade secret.
15057 +/****************************************************************************
15059 + * AdslXfaceData.h -- ADSL Core interface data structure
15062 + * To be included both in SoftDsl and BcmAdslCore driver
15065 + * Copyright (c) 2000-2001 Broadcom Corporation
15066 + * All Rights Reserved
15067 + * No portions of this material may be reproduced in any form without the
15068 + * written permission of:
15069 + * Broadcom Corporation
15070 + * 16215 Alton Parkway
15071 + * Irvine, California 92619
15072 + * All information contained in this document is Broadcom Corporation
15073 + * company private, proprietary, and trade secret.
15074 + * Authors: Ilya Stomakhin
15076 + * $Revision: 1.9 $
15078 + * $Id: AdslXfaceData.h,v 1.9 2004/02/03 02:57:22 ilyas Exp $
15080 + * $Log: AdslXfaceData.h,v $
15081 + * Revision 1.9 2004/02/03 02:57:22 ilyas
15082 + * Added PHY feature settings
15084 + * Revision 1.8 2003/07/18 04:50:21 ilyas
15085 + * Added shared buffer for clEoc messages to avoid copying thru command buffer
15087 + * Revision 1.7 2003/02/25 00:46:32 ilyas
15088 + * Added T1.413 EOC vendor ID
15090 + * Revision 1.6 2003/02/21 23:29:13 ilyas
15091 + * Added OEM vendor ID parameter for T1.413 mode
15093 + * Revision 1.5 2002/09/13 21:17:12 ilyas
15094 + * Added pointers to version and build string to OEM interface structure
15096 + * Revision 1.4 2002/09/07 04:16:29 ilyas
15097 + * Fixed HOST to ADSL MIPS SDRAM address translation for relocatable images
15099 + * Revision 1.3 2002/09/07 01:43:59 ilyas
15100 + * Added support for OEM parameters
15102 + * Revision 1.2 2002/01/22 19:03:10 khp
15103 + * -put sdramBaseAddr at end of Xface struct
15105 + * Revision 1.1 2002/01/15 06:25:08 ilyas
15106 + * Initial implementation of ADSL core firmware
15108 + ****************************************************************************/
15110 +#ifndef AdslXfaceDataHeader
15111 +#define AdslXfaceDataHeader
15113 +#include "CircBuf.h"
15115 +typedef struct _AdslXfaceData {
15116 + stretchBufferStruct sbSta;
15117 + stretchBufferStruct sbCmd;
15118 + unsigned long gfcTable[15];
15119 + void *sdramBaseAddr;
15122 +/* Shared SDRAM configuration data */
15124 +#define kAdslOemVendorIdMaxSize 8
15125 +#define kAdslOemVersionMaxSize 32
15126 +#define kAdslOemSerNumMaxSize 32
15127 +#define kAdslOemNonStdInfoMaxSize 64
15129 +typedef struct _AdslOemSharedData {
15130 + unsigned long g994VendorIdLen;
15131 + unsigned long g994XmtNonStdInfoLen;
15132 + unsigned long g994RcvNonStdInfoLen;
15133 + unsigned long eocVendorIdLen;
15134 + unsigned long eocVersionLen;
15135 + unsigned long eocSerNumLen;
15136 + unsigned char g994VendorId[kAdslOemVendorIdMaxSize];
15137 + unsigned char eocVendorId[kAdslOemVendorIdMaxSize];
15138 + unsigned char eocVersion[kAdslOemVersionMaxSize];
15139 + unsigned char eocSerNum[kAdslOemSerNumMaxSize];
15140 + unsigned char g994XmtNonStdInfo[kAdslOemNonStdInfoMaxSize];
15141 + unsigned char g994RcvNonStdInfo[kAdslOemNonStdInfoMaxSize];
15142 + char *gDslVerionStringPtr;
15143 + char *gDslBuildDataStringPtr;
15144 + unsigned long t1413VendorIdLen;
15145 + unsigned char t1413VendorId[kAdslOemVendorIdMaxSize];
15146 + unsigned long t1413EocVendorIdLen;
15147 + unsigned char t1413EocVendorId[kAdslOemVendorIdMaxSize];
15148 + unsigned long clEocBufLen;
15149 + unsigned char *clEocBufPtr;
15150 +} AdslOemSharedData;
15152 +/* feature list */
15154 +#define kAdslPhyAnnexA 0
15155 +#define kAdslPhyAnnexB 1
15156 +#define kAdslPhyAnnexC 2
15157 +#define kAdslPhySADSL 3
15158 +#define kAdslPhyAdsl2 4
15159 +#define kAdslPhyAdslG992p3 4
15160 +#define kAdslPhyAdsl2p 5
15161 +#define kAdslPhyAdslG992p5 5
15162 +#define kAdslPhyAnnexI 6
15163 +#define kAdslPhyAdslReAdsl2 7
15164 +#define kAdslPhyG992p2Init 8
15165 +#define kAdslPhyT1P413 9
15167 +#define AdslFeatureSupported(fa,f) ((fa)[(f) >> 5] & (1 << ((f) & 0x1F)))
15168 +#define AdslFeatureSet(fa,f) (fa)[(f) >> 5] |= (1 << ((f) & 0x1F))
15170 +#endif /* AdslXfaceDataHeader */
15171 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/BlankList.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/BlankList.h
15172 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/BlankList.h 1970-01-01 01:00:00.000000000 +0100
15173 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/BlankList.h 2006-06-26 09:07:10.000000000 +0200
15176 +<:copyright-broadcom
15178 + Copyright (c) 2002 Broadcom Corporation
15179 + All Rights Reserved
15180 + No portions of this material may be reproduced in any form without the
15181 + written permission of:
15182 + Broadcom Corporation
15183 + 16215 Alton Parkway
15184 + Irvine, California 92619
15185 + All information contained in this document is Broadcom Corporation
15186 + company private, proprietary, and trade secret.
15190 +/****************************************************************************
15195 + * Definition and implementation (via macros and inline functions)
15196 + * of blank list - list of unused items of any size (not less than
15199 + * Copyright (c) 1993-1998 AltoCom, Inc. All rights reserved.
15200 + * Authors: Ilya Stomakhin
15202 + *****************************************************************************/
15204 +#ifndef BlankListHeader
15205 +#define BlankListHeader
15207 +#define BlankListPeek(head) ((void *) (head))
15208 +#define BlankListNext(p) (*(void **) (p))
15210 +#define BlankListAdd(pHead,p) do { \
15211 + BlankListNext(p) = BlankListNext(pHead); \
15212 + BlankListNext(pHead) = (void *) (p); \
15215 +#define BlankListAddList(pHead,pFirst,pLast) do { \
15216 + if (NULL != (pLast)) { \
15217 + BlankListNext(pLast) = BlankListNext(pHead); \
15218 + BlankListNext(pHead) = (void *) (pFirst); \
15222 +#define BlankListGet(pHead) \
15223 + BlankListNext(pHead); \
15226 + __p = (void **) BlankListNext(pHead); \
15227 + if (NULL != __p) \
15228 + BlankListNext(pHead) = *__p; \
15232 +#define BlankListForEach(pHead,f,ref) do { \
15233 + void *p = BlankListNext(pHead); \
15235 + while (NULL != p) { \
15236 + if ( (f)((p), ref) ) break; \
15237 + p = BlankListNext(p); \
15244 +#define BlankListAddQue(pHead,pqHdr) do { \
15245 + if (NULL != ((QueHeader *)(pqHdr))->tail) { \
15246 + BlankListNext(((QueHeader *)(pqHdr))->tail) = BlankListNext(pHead); \
15247 + BlankListNext(pHead) = ((QueHeader *)(pqHdr))->head; \
15251 +#include "DList.h"
15253 +#define BlankListAddDList(pHead,pDListHead) do { \
15254 + if (!DListEmpty(pDListHead)) { \
15255 + BlankListNext(DListLast(pDListHead)) = BlankListNext(pHead); \
15256 + BlankListNext(pHead) = DListFirst(pDListHead); \
15260 +#endif /* BlankListHeader */
15262 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/BlockUtil.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/BlockUtil.h
15263 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/BlockUtil.h 1970-01-01 01:00:00.000000000 +0100
15264 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/BlockUtil.h 2006-06-26 09:07:10.000000000 +0200
15267 +<:copyright-broadcom
15269 + Copyright (c) 2002 Broadcom Corporation
15270 + All Rights Reserved
15271 + No portions of this material may be reproduced in any form without the
15272 + written permission of:
15273 + Broadcom Corporation
15274 + 16215 Alton Parkway
15275 + Irvine, California 92619
15276 + All information contained in this document is Broadcom Corporation
15277 + company private, proprietary, and trade secret.
15284 + * This file contains the interfaces for the fixed point block
15285 + * processing utilities.
15287 + * Copyright (c) 1993-1998 AltoCom, Inc. All rights reserved.
15288 + * Authors: Mark Gonikberg, Haixiang Liang.
15290 + * $Revision: 1.23 $
15292 + * $Id: BlockUtil.h,v 1.23 2004/04/13 00:31:10 ilyas Exp $
15294 + * $Log: BlockUtil.h,v $
15295 + * Revision 1.23 2004/04/13 00:31:10 ilyas
15296 + * Added standard header for shared ADSL driver files
15298 + * Revision 1.22 2003/07/11 01:49:01 gsyu
15299 + * Added BlockShortClearByLong to speed up performance
15301 + * Revision 1.21 2003/07/10 22:35:23 gsyu
15302 + * Speed up BlockByteXXX performance
15304 + * Revision 1.20 2003/07/10 22:15:51 gsyu
15305 + * Added BlockByteMoveByWord to speed up performance
15307 + * Revision 1.19 2002/03/12 00:03:03 yongbing
15308 + * Modify cplxScaleCplxSymbols to accept a shift value instead of an array of shifts
15310 + * Revision 1.18 2001/03/14 00:50:25 georgep
15311 + * All targets use FEQ_PASS_FFTSHIFT, remove code for case where its not defined
15313 + * Revision 1.17 2000/11/30 03:54:09 khp
15314 + * -BlockRealScaleCplxSymbols instead of BlockScaleComplexSymbols
15316 + * Revision 1.16 2000/11/29 20:42:12 liang
15317 + * Add function for ADSL xmt gains with fixed shift.
15319 + * Revision 1.15 2000/10/02 19:24:08 georgep
15320 + * Modify FEQ for new fft, fft outputs a shift for each block
15322 + * Revision 1.14 2000/09/09 00:23:48 liang
15323 + * Add corresponding functions for the ComplexLong FEQ coef.
15325 + * Revision 1.13 2000/05/17 01:36:52 yongbing
15326 + * Add Pentium MMX assembly codes for more block related functions
15328 + * Revision 1.12 2000/04/19 19:22:22 yongbing
15329 + * Add BlockShortScaleby2 function used in G994p1
15331 + * Revision 1.11 2000/04/04 02:28:01 liang
15332 + * Merged with SoftDsl_0_2 from old tree.
15334 + * Revision 1.11 2000/03/14 23:29:01 yongbing
15335 + * Add Pentim MMX codes for BlockCplxSymbolUpdateCplxScale function
15337 + * Revision 1.10 2000/02/16 01:53:00 yongbing
15338 + * Add Pentium MMX module for FEQ
15340 + * Revision 1.9 1999/11/02 02:49:55 liang
15341 + * Add BlockComplexPower function.
15343 + * Revision 1.8 1999/08/05 19:42:34 liang
15344 + * Merged with the softmodem top of the tree on 08/04/99 for assembly files.
15346 + * Revision 1.7 1999/06/16 00:54:39 liang
15347 + * BlockRealScaleComplexSymbols takes a scale shift buffer now.
15349 + * Revision 1.6 1999/05/22 02:18:29 liang
15350 + * Add one more parameter to BlockCplxSymbolUpdateCplxScale function.
15352 + * Revision 1.5 1999/05/14 22:49:39 liang
15353 + * Added two more functions.
15355 + * Revision 1.4 1999/03/26 03:29:57 liang
15356 + * Add function BlockComplexMultLongAcc.
15358 + * Revision 1.3 1999/02/22 22:40:59 liang
15359 + * BlockByteSum takes uchar inputs instead of schar.
15361 + * Revision 1.2 1999/02/10 01:56:44 liang
15362 + * Added BlockByteSum, BlockRealScaleComplexSymbols and BlockCplxScaleComplexSymbols.
15364 + * Revision 1.1 1998/10/28 01:35:38 liang
15365 + * *** empty log message ***
15367 + * Revision 1.12 1998/07/08 17:09:25 scott
15368 + * Removed unnecessary undefs
15370 + * Revision 1.11 1998/04/02 06:19:44 mwg
15371 + * Added two new utilities.
15373 + * Revision 1.10 1998/03/26 23:20:55 liang
15374 + * Added function BlockShortMultiply.
15376 + * Revision 1.9 1998/02/16 18:41:00 scott
15377 + * Added MMX autodetect support
15379 + * Revision 1.8 1997/12/13 06:11:35 mwg
15380 + * Added new functions:
15381 + * BlockLongSubtract()
15383 + * BlockLong2ShortSubtract()
15384 + * BlockShort2LongMove()
15385 + * BlockShortInterpolate()
15386 + * BlockLongCorrelate()
15387 + * BlockMapShort2Short()
15389 + * Revision 1.7 1997/03/19 18:35:10 mwg
15390 + * Changed copyright notice.
15392 + * Revision 1.6 1997/02/11 00:08:18 mwg
15393 + * Added BlockByteMove function
15395 + * Revision 1.5 1997/02/04 08:40:08 mwg
15396 + * Changed interface forBlockReal2ComplexMacc()
15398 + * Revision 1.4 1997/01/23 02:04:28 mwg
15399 + * Added return value to BlockShortMove
15401 + * Revision 1.3 1996/12/19 22:34:55 mwg
15402 + * Added new function BlockFullPower().
15404 + * Revision 1.2 1996/02/21 03:59:15 mwg
15405 + * Added new function BlockReal2ComplexMacc
15407 + * Revision 1.1.1.1 1996/02/14 02:35:13 mwg
15408 + * Redesigned the project directory structure. Merged V.34 into the project.
15410 + * Revision 1.5 1995/04/04 06:09:32 mwg
15411 + * Changed the SoftModem status reporting: now the status is a structure/union
15412 + * where different fields used for different status code. This will enable
15413 + * efficient status snooping for high level protocols on top of the softmodem.
15417 +#ifndef BlockUtilPh
15418 +#define BlockUtilPh
15420 +extern void BlockLongAdd (int, long*, long*, long*);
15421 +extern void BlockLong2ShortSubtract (int, long*, long*, short*);
15422 +extern void BlockShort2LongMove (int, short*, long*);
15423 +extern void BlockShortMultiply (int, int, short*, short*, short*);
15424 +extern void BlockByteMoveUnaligned (int size, uchar *srcPtr, uchar *dstPtr);
15425 +extern void BlockShortOffset (int, short, short*, short*);
15426 +extern long BlockShortInterpolateWithIncrement (int size, long scaleFactor, long increment, int shift, short* src1Ptr, short* src2Ptr, short* dstPtr);
15427 +extern void BlockReal2ComplexMult (int, short*, ComplexShort*, ComplexShort*);
15428 +extern void BlockComplexConjigateMult (int, ComplexShort*, ComplexShort*, ComplexShort*);
15430 +extern long BlockSum (int, short*);
15431 +extern long BlockByteSum (int, uchar*);
15432 +extern void BlockComplexSum (int, ComplexShort*, ComplexLong*);
15433 +extern void BlockComplexPower (int, int, ComplexShort*, long*);
15434 +extern long BlockFullPower (int, short*);
15435 +extern long BlockLongCorrelate (int, long*, long*);
15437 +extern int BlockSymbol2Byte (int, int, ushort*, uchar*);
15438 +extern int BlockByte2Symbol (int, int, uchar*, ushort*);
15440 +extern void BlockMapShort2Complex (int, ushort*, ComplexByte*, ComplexShort*);
15441 +extern void BlockMapShort2Short (int size, ushort *srcPtr, short *mapPtr, short *dstPtr);
15442 +extern void BlockMapByte2Byte (int size, uchar *srcPtr, uchar *mapPtr, uchar *dstPtr);
15443 +extern void BlockMapByte2Short (int size, uchar *srcPtr, short *mapPtr, short *dstPtr);
15444 +extern void BlockShortMult (int size, int shift, short* src1Ptr, short* src2Ptr, short* dstPtr);
15446 +extern int SM_DECL Idle(void);
15448 +extern void BlockGenerateAngles(int size, ComplexShort *anglePtr, ComplexShort *incPtr, ComplexShort *dstPtr);
15449 +extern void BlockExtractRealPart(int size, ComplexShort *srcPtr, short *dstPtr);
15450 +extern void BlockShortScaleByShift (int size, int shift, short* srcPtr, short* dstPtr);
15452 +#ifndef PENTIUM_REDEFS /* only if these have not been redefined to function pointers */
15453 +extern long BlockPower (int, short*);
15454 +extern void BlockReal2ComplexMacc (int, int, short*, ComplexShort*, ComplexLong*);
15455 +extern void BlockComplexMult (int, ComplexShort*, ComplexShort*, ComplexShort*);
15456 +extern void BlockShortScale (int, short, int, short*, short*);
15457 +extern int SM_DECL BlockShortMove (int, short*, short*);
15458 +extern long BlockCorrelate (int, short*, short*);
15460 +extern void BlockRealScaleComplexSymbols(int, int, uchar*, short*, ComplexShort*, ComplexShort*);
15461 +/* FIXME -- the following 3 functions can be removed */
15462 +extern void BlockCplxScaleComplexSymbols(int, int, int, ComplexShort*, ComplexShort*, ComplexShort*);
15463 +extern void BlockCplxSymbolUpdateCplxScale(int, int, int, uchar*, ComplexShort*,
15464 + ComplexShort*, ComplexShort*, ComplexShort*);
15465 +extern void BlockComplexShortFill (int, short, short, ComplexShort*);
15468 +extern void BlockRealScaleCplxSymbols(int, int, int, short*, ComplexShort*, ComplexShort*);
15469 +extern void BlockCplxLongConjigateMultCplxShort(int, ComplexLong*, ComplexShort*, ComplexLong*);
15471 +extern void BlockCplxLongScaleCplxSymbols(int, int, int, ComplexLong*, ComplexShort*, short*, ComplexShort*);
15472 +extern void BlockCplxSymbolUpdateCplxLongScale(int, int, int, int,
15473 + ComplexShort*, short *, ComplexLong*, ComplexShort*);
15475 +extern void BlockComplexLongFill (int, long, long, ComplexLong*);
15477 +extern void BlockShortSubtract (int, short*, short*, short*);
15478 +extern void BlockLongSubtract (int, long*, long*, long*);
15479 +extern void BlockShortAdd (int, short*, short*, short*);
15480 +extern void BlockByteMove (int, uchar*, uchar*);
15481 +extern void BlockByteMoveByLong (int, uchar*, uchar*);
15482 +extern void SM_DECL BlockByteFill (int, uchar, uchar*);
15483 +extern void BlockByteFillByLong (int, uchar, uchar*);
15484 +extern void BlockByteClear (int, uchar*);
15485 +extern void BlockByteClearByLong (int, uchar*);
15486 +extern void BlockShortFill (int, short, short*);
15487 +extern void BlockShortClear (int, short*);
15488 +extern void BlockShortClearByLong (int, short*);
15489 +extern void BlockLongFill (int, long, long*);
15490 +extern void BlockLongClear (int, long*);
15491 +extern void BlockComplexShortClear (int, ComplexShort*);
15492 +extern void BlockShortInvert (int, short*, short*);
15493 +extern void BlockShortScaleDown (int, short*);
15494 +extern void BlockLongMove (int, long*, long*);
15495 +extern void BlockShortInterpolate (int, short, int, short*, short*, short*);
15496 +extern void BlockComplexMultLongAcc (int, int, ComplexShort*, ComplexShort*, ComplexLong*);
15500 +#endif /* BlockUtilPh */
15501 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/CircBuf.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/CircBuf.h
15502 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/CircBuf.h 1970-01-01 01:00:00.000000000 +0100
15503 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/CircBuf.h 2006-06-26 09:07:10.000000000 +0200
15506 +<:copyright-broadcom
15508 + Copyright (c) 2002 Broadcom Corporation
15509 + All Rights Reserved
15510 + No portions of this material may be reproduced in any form without the
15511 + written permission of:
15512 + Broadcom Corporation
15513 + 16215 Alton Parkway
15514 + Irvine, California 92619
15515 + All information contained in this document is Broadcom Corporation
15516 + company private, proprietary, and trade secret.
15520 +/****************************************************************************
15522 + * CircBuf -- Generic Circular Buffer
15525 + * Implementation of generic circular buffer algorithms
15528 + * Copyright (c) 1993-1998 AltoCom, Inc. All rights reserved.
15529 + * Authors: Ilya Stomakhin
15531 + * $Revision: 1.14 $
15533 + * $Id: CircBuf.h,v 1.14 2004/06/24 03:10:37 ilyas Exp $
15535 + * $Log: CircBuf.h,v $
15536 + * Revision 1.14 2004/06/24 03:10:37 ilyas
15537 + * Added extra macro to be able to use un-cached variable (for status write)
15539 + * Revision 1.13 2004/02/09 23:47:02 ilyas
15540 + * Fixed last change
15542 + * Revision 1.12 2004/02/06 22:52:58 ilyas
15543 + * Improved stretch buffer write
15545 + * Revision 1.11 2002/12/30 23:27:55 ilyas
15546 + * Added macro for HostDma optimizations
15548 + * Revision 1.10 2002/10/26 02:15:02 ilyas
15549 + * Optimized and added new macros for HostDma
15551 + * Revision 1.9 2002/01/22 23:59:29 ilyas
15552 + * Added paraenthesis around macro argument
15554 + * Revision 1.8 2002/01/15 22:28:38 ilyas
15555 + * Extended macro to support readPtr from uncached address
15557 + * Revision 1.7 2001/09/21 19:47:05 ilyas
15558 + * Fixed compiler warnings for VxWorks build
15560 + * Revision 1.6 2001/06/07 18:47:56 ilyas
15561 + * Added more macros for circular buffer arithmetics
15563 + * Revision 1.5 2001/04/18 03:58:34 ilyas
15564 + * Added LOG file write granularity
15566 + * Revision 1.4 2001/01/19 04:34:12 ilyas
15567 + * Added more macros to circular buffer implementation
15569 + * Revision 1.3 2001/01/06 04:01:41 ilyas
15570 + * Changed the way we write status messages
15572 + * Revision 1.2 2001/01/04 05:52:21 ilyas
15573 + * Added implementation of stretchable circular buffer used in LOG and Status
15576 + * Revision 1.1 2000/05/03 03:45:55 ilyas
15577 + * Original implementation
15580 + *****************************************************************************/
15582 +#ifndef CircBufHeader_H_
15583 +#define CircBufHeader_H_
15591 +} circBufferStruct;
15593 +/* Initialize circular buffer */
15595 +#define CircBufferInit(pCB,buf,size) do { \
15596 + (pCB)->pStart = (char *) (buf); \
15597 + (pCB)->pRead = (pCB)->pWrite = (pCB)->pStart; \
15598 + (pCB)->pEnd = (pCB)->pStart + size; \
15601 +#define CircBufferGetSize(pCB) ((pCB)->pEnd - (pCB)->pStart)
15602 +#define CircBufferGetStartPtr(pCB) ((void *) (pCB)->pStart)
15603 +#define CircBufferGetEndPtr(pCB) ((void *) (pCB)->pEnd)
15605 +#define CircBufferReset(pCB) (pCB)->pRead = (pCB)->pWrite = (pCB)->pStart
15608 +#define CircBufferGetReadPtr(pCB) ((void *) (pCB)->pRead)
15609 +#define CircBufferGetWritePtr(pCB) ((void *) (pCB)->pWrite)
15613 +#define CircBufferDistance(pCB,p1,p2,d) ((char*)(p2) - (char*)(p1) - d >= 0 ? \
15614 + (char*)(p2) - (char*)(p1) - d : \
15615 + ((char*)(p2)- (char*)(p1) - d + ((pCB)->pEnd - (pCB)->pStart)))
15617 +#define CircBufferAddContig(pCB,p,n) ((char*)(p) + (n) == (pCB)->pEnd ? (pCB)->pStart : (char*)(p) + (n))
15619 +static __inline int CircBufferDistance(circBufferStruct *pCB, char *p1, char *p2, int d)
15621 + int tmp = p2 - p1 - d;
15623 + return (tmp >= 0 ? tmp : tmp + (pCB->pEnd - pCB->pStart));
15626 +static __inline char * CircBufferAddContig(circBufferStruct *pCB, char *p, int n)
15629 + return (p == pCB->pEnd ? pCB->pStart : p);
15633 +#define CircBufferAdd(pCB,p,n) ((char*)(p) + (n) >= (pCB)->pEnd ? \
15634 + (pCB)->pStart + ((char*)(p) + (n) - (pCB)->pEnd) : \
15635 + (char*)(p) + (n))
15637 +#define CircBufferReadUpdate(pCB,n) (pCB)->pRead = CircBufferAdd(pCB,(pCB)->pRead,n)
15638 +#define CircBufferWriteUpdate(pCB,n) (pCB)->pWrite= CircBufferAdd(pCB,(pCB)->pWrite,n)
15640 +#define CircBufferReadUpdateContig(pCB,n) (pCB)->pRead = CircBufferAddContig(pCB,(pCB)->pRead,n)
15641 +#define CircBufferWriteUpdateContig(pCB,n) (pCB)->pWrite= CircBufferAddContig(pCB,(pCB)->pWrite,n)
15643 +#define CircBufferGetReadAvail(pCB) CircBufferDistance(pCB,(pCB)->pRead,(pCB)->pWrite,0)
15644 +#define CircBufferIsReadEmpty(pCB) ((pCB)->pRead == (pCB)->pWrite)
15645 +#define CircBufferGetWriteAvail(pCB) CircBufferDistance(pCB,(pCB)->pWrite,(pCB)->pRead,1)
15646 +#define CircBufferGetWriteAvailN(pCB,n) CircBufferDistance(pCB,(pCB)->pWrite,(pCB)->pRead,n)
15648 +#define CircBufferGetReadContig(pCB) ((unsigned long)(pCB)->pWrite >= (unsigned long) (pCB)->pRead ? \
15649 + (pCB)->pWrite - (pCB)->pRead : \
15650 + (pCB)->pEnd - (pCB)->pRead)
15652 +#define CircBufferGetWriteContig(pCB) ((pCB)->pEnd - (pCB)->pWrite > CircBufferGetWriteAvail(pCB) ? \
15653 + CircBufferGetWriteAvail(pCB) : \
15654 + (pCB)->pEnd - (pCB)->pWrite)
15658 +** structure and macros for "strectch" buffer
15666 + char *pStretchEnd;
15669 +} stretchBufferStruct;
15671 +#define StretchBufferInit(pSB,buf,size,extra) do { \
15672 + (pSB)->pStart = (char *) (buf); \
15673 + (pSB)->pRead = (pSB)->pWrite = (pSB)->pStart; \
15674 + (pSB)->pEnd = (pSB)->pStart + (size); \
15675 + (pSB)->pStretchEnd = (pSB)->pEnd; \
15676 + (pSB)->pExtraEnd = (pSB)->pEnd+(extra); \
15679 +#define StretchBufferGetSize(pSB) ((pSB)->pEnd - (pSB)->pStart)
15680 +#define StretchBufferGetStartPtr(pSB) ((void *) (pSB)->pStart)
15681 +#define StretchBufferGetReadPtr(pSB) ((void *) (pSB)->pRead)
15682 +#define StretchBufferGetWritePtr(pSB) ((void *) (pSB)->pWrite)
15683 +#define StretchBufferReset(pSB) ((pSB)->pRead = (pSB)->pWrite = (pSB)->pStart)
15685 +#define StretchBufferGetReadToEnd(pSB) ((pSB)->pStretchEnd - (pSB)->pRead)
15687 +#define StretchBufferGetReadAvail(pSB) ((pSB)->pWrite - (pSB)->pRead >= 0 ? \
15688 + (pSB)->pWrite - (pSB)->pRead : \
15689 + (pSB)->pStretchEnd - (pSB)->pRead)
15690 +#define _StretchBufferGetWriteAvail(pSB,rd) ((rd) - (pSB)->pWrite > 0 ? \
15691 + (rd) - (pSB)->pWrite - 1 : \
15692 + ((pSB)->pExtraEnd - (pSB)->pWrite))
15693 +#define StretchBufferGetWriteAvail(pSB) _StretchBufferGetWriteAvail(pSB, (pSB)->pRead)
15695 +#define StretchBufferReadUpdate(pSB,n) do { \
15698 + p = (pSB)->pRead + (n); \
15699 + (pSB)->pRead = (p >= (pSB)->pStretchEnd ? (pSB)->pStart : p); \
15702 +#define _StretchBufferWriteUpdate(pSB,rd,n) do { \
15705 + p = (pSB)->pWrite + (n); \
15706 + if (p >= (pSB)->pEnd) { \
15707 + if ((rd) != (pSB)->pStart) { \
15708 + (pSB)->pStretchEnd = p; \
15709 + (pSB)->pWrite = (pSB)->pStart; \
15713 + (pSB)->pWrite = p; \
15716 +#define StretchBufferWriteUpdate(pSB,n) _StretchBufferWriteUpdate(pSB,(pSB)->pRead,n)
15718 +#endif /* CircBufHeader_H_ */
15722 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/DList.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/DList.h
15723 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/DList.h 1970-01-01 01:00:00.000000000 +0100
15724 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/DList.h 2006-06-26 09:07:10.000000000 +0200
15727 +<:copyright-broadcom
15729 + Copyright (c) 2002 Broadcom Corporation
15730 + All Rights Reserved
15731 + No portions of this material may be reproduced in any form without the
15732 + written permission of:
15733 + Broadcom Corporation
15734 + 16215 Alton Parkway
15735 + Irvine, California 92619
15736 + All information contained in this document is Broadcom Corporation
15737 + company private, proprietary, and trade secret.
15741 +/****************************************************************************
15746 + * Definition and implementation (via macros and inline functions)
15747 + * of double-linked list
15749 + * Copyright (c) 1993-1998 AltoCom, Inc. All rights reserved.
15750 + * Authors: Ilya Stomakhin
15752 + *****************************************************************************/
15754 +#ifndef DListHeader_H_
15755 +#define DListHeader_H_
15757 +typedef struct _DListHeader
15759 + struct _DListHeader *next; /* next item in the list */
15760 + struct _DListHeader *prev; /* prev item in the list */
15763 +typedef struct _DListUpHeader
15765 + struct _DListUpHeader *next; /* next item in the list */
15766 + struct _DListUpHeader *prev; /* prev item in the list */
15767 + struct _DListUpHeader *head; /* head of the list */
15770 +/* Double linked list DList management macros */
15772 +#define DListInit(pDListHead) do { \
15773 + ((DListHeader *)(pDListHead))->next = pDListHead; \
15774 + ((DListHeader *)(pDListHead))->prev = pDListHead; \
15777 +#define DListNext(pDListEntry) (((DListHeader *)(pDListEntry))->next)
15778 +#define DListPrev(pDListEntry) (((DListHeader *)(pDListEntry))->prev)
15780 +#define DListEntryLinked(pDListEntry) (NULL != DListNext(pDListEntry))
15781 +#define DListUnlinkEntry(pDListEntry) (DListNext(pDListEntry) = DListPrev(pDListEntry) = NULL)
15783 +#define DListFirst(pDListHead) DListNext(pDListHead)
15784 +#define DListLast(pDListHead) DListPrev(pDListHead)
15785 +#define DListValid(pDListHead,pEntry) ((void *)(pDListHead) != (pEntry))
15786 +#define DListEmpty(pDListHead) ((void *)pDListHead == ((DListHeader *)pDListHead)->next)
15788 +#define DListInsertAfter(pDListEntry,pEntry) do { \
15789 + ((DListHeader *)(pEntry))->next = ((DListHeader *)(pDListEntry))->next; \
15790 + ((DListHeader *)(pEntry))->prev = (DListHeader *)(pDListEntry); \
15791 + ((DListHeader *)(pDListEntry))->next->prev = (DListHeader *) (pEntry); \
15792 + ((DListHeader *)(pDListEntry))->next = (DListHeader *) (pEntry); \
15795 +#define DListInsertBefore(pDListEntry,pEntry) do { \
15796 + ((DListHeader *)(pEntry))->next = (DListHeader *)(pDListEntry); \
15797 + ((DListHeader *)(pEntry))->prev = ((DListHeader *)(pDListEntry))->prev; \
15798 + ((DListHeader *)(pDListEntry))->prev->next = (DListHeader *) (pEntry); \
15799 + ((DListHeader *)(pDListEntry))->prev = (DListHeader *) (pEntry); \
15802 +#define DListInsertTail(pDListHead,pEntry) DListInsertBefore(pDListHead,pEntry)
15803 +#define DListInsertHead(pDListHead,pEntry) DListInsertAfter(pDListHead,pEntry)
15805 +#define DListRemove(pDListEntry) do { \
15806 + ((DListHeader *)(pDListEntry))->prev->next = ((DListHeader *)(pDListEntry))->next; \
15807 + ((DListHeader *)(pDListEntry))->next->prev = ((DListHeader *)(pDListEntry))->prev; \
15811 +#define DListForEach(pDListHead,f,ref) do { \
15812 + DListHeader *p = ((DListHeader *)(pDListHead))->next; \
15814 + while (DListValid(pDListHead,p)) { \
15815 + DListHeader *p0 = p; \
15816 + p = DListNext(p); \
15817 + if ( (f)((void *)p0, ref) ) break; \
15822 +/* Double linked list with up link DListUp management macros */
15824 +#define DListUpInit(pDListHead) do { \
15825 + ((DListUpHeader *)(pDListHead))->next = (DListUpHeader *) (pDListHead); \
15826 + ((DListUpHeader *)(pDListHead))->prev = (DListUpHeader *) (pDListHead); \
15827 + ((DListUpHeader *)(pDListHead))->head = (DListUpHeader *) (pDListHead); \
15830 +#define DListUpNext(pDListEntry) ((DListUpHeader *) DListNext(pDListEntry))
15831 +#define DListUpPrev(pDListEntry) ((DListUpHeader *) DListPrev(pDListEntry))
15832 +#define DListUpHead(pDListEntry) (((DListUpHeader *)(pDListEntry))->head)
15834 +#define DListUpFirst(pDListHead) DListUpNext(pDListHead)
15835 +#define DListUpLast(pDListHead) DListUpPrev(pDListHead)
15836 +#define DListUpValid(pEntry) (((DListUpHeader *)(pEntry))->head != (void *) pEntry)
15837 +#define DListUpEmpty(pDListHead) DListEmpty(pDListHead)
15839 +#define DListUpInsertAfter(pDListEntry,pEntry) do { \
15840 + DListInsertAfter(pDListEntry,pEntry); \
15841 + ((DListUpHeader *)(pEntry))->head = ((DListUpHeader *)(pDListEntry))->head; \
15844 +#define DListUpInsertBefore(pDListEntry,pEntry) do { \
15845 + DListInsertBefore(pDListEntry,pEntry); \
15846 + ((DListUpHeader *)(pEntry))->head = ((DListUpHeader *)(pDListEntry))->head; \
15849 +#define DListUpInsertTail(pDListHead,pEntry) DListUpInsertBefore(pDListHead,pEntry)
15850 +#define DListUpInsertHead(pDListHead,pEntry) DListUpInsertAfter(pDListHead,pEntry)
15852 +#define DListUpRemove(pDListEntry) DListRemove(pDListEntry)
15853 +#define DListUpForEach(pDListHead,f,ref) DListForEach((DListHeader *)(pDListHead),f,ref)
15855 +#endif /* DListHeader_H_ */
15857 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/DslFramer.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/DslFramer.h
15858 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/DslFramer.h 1970-01-01 01:00:00.000000000 +0100
15859 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/DslFramer.h 2006-06-26 09:07:10.000000000 +0200
15862 +<:copyright-broadcom
15864 + Copyright (c) 2002 Broadcom Corporation
15865 + All Rights Reserved
15866 + No portions of this material may be reproduced in any form without the
15867 + written permission of:
15868 + Broadcom Corporation
15869 + 16215 Alton Parkway
15870 + Irvine, California 92619
15871 + All information contained in this document is Broadcom Corporation
15872 + company private, proprietary, and trade secret.
15876 +/****************************************************************************
15881 + * This file contains common DSL framer definitions
15884 + * Copyright (c) 1993-1998 AltoCom, Inc. All rights reserved.
15885 + * Authors: Ilya Stomakhin
15887 + * $Revision: 1.3 $
15889 + * $Id: DslFramer.h,v 1.3 2004/07/21 01:39:41 ilyas Exp $
15891 + * $Log: DslFramer.h,v $
15892 + * Revision 1.3 2004/07/21 01:39:41 ilyas
15893 + * Reset entire G.997 state on retrain. Timeout in G.997 if no ACK
15895 + * Revision 1.2 2004/04/12 23:41:10 ilyas
15896 + * Added standard header for shared ADSL driver files
15898 + * Revision 1.1 2001/12/13 02:28:27 ilyas
15899 + * Added common framer (DslPacket and G997) and G997 module
15903 + *****************************************************************************/
15905 +#ifndef DslFramerHeader
15906 +#define DslFramerHeader
15908 +#include "DList.h"
15910 +#define kDslFramerInitialized 0x80000000
15912 +/* status codes */
15914 +#define kDslFramerRxFrame 1
15915 +#define kDslFramerRxFrameErr 2
15916 +#define kDslFramerTxFrame 3
15917 +#define kDslFramerTxFrameErr 4
15919 +#define kDslFramerRxFrameErrFlushed 1
15920 +#define kDslFramerRxFrameErrAbort 2
15921 +#define kDslFramerRxFrameErrPhy 3
15923 +#define kDslFramerTxFrameErrFlushed 1
15926 +typedef struct _dslFramerBufDesc {
15931 +} dslFramerBufDesc;
15933 +/* data bufDesc flags */
15935 +#define kDslFramerStartNewFrame 1
15936 +#define kDslFramerEndOfFrame 2
15937 +#define kDslFramerAbortFrame 4
15939 +#define kDslFramerExtraByteShift 3
15940 +#define kDslFramerExtraByteMask (0x7 << kDslFramerExtraByteShift)
15942 +typedef struct _dslFramerControl {
15944 + dslFrameHandlerType rxIndicateHandlerPtr;
15945 + dslFrameHandlerType txCompleteHandlerPtr;
15946 + dslStatusHandlerType statusHandlerPtr;
15947 + ulong statusCode;
15948 + ulong statusOffset;
15954 + dslFrame *freeBufListPtr;
15955 + void *freeBufPool;
15956 + void *pBufMemory;
15958 + dslFrame *freePacketListPtr;
15959 + void *freePacketPool;
15961 + /* RX working data set */
15963 + dslFrame *pRxFrame;
15964 + dslFrameBuffer *pRxBuf;
15965 + uchar *pRxBufData;
15966 + uchar *pRxBufDataEnd;
15969 + /* TX working data set */
15971 + DListHeader dlistTxWaiting;
15972 + dslFrame *pTxFrame;
15973 + dslFrameBuffer *pTxBuf;
15974 + uchar *pTxBufData;
15975 + uchar *pTxBufDataEnd;
15979 + ulong dslByteCntRxTotal;
15980 + ulong dslByteCntTxTotal;
15982 + ulong dslFrameCntRxTotal;
15983 + ulong dslFrameCntRxErr;
15984 + ulong dslFrameCntTxTotal;
15986 +} dslFramerControl;
15989 +extern Boolean DslFramerInit(
15991 + dslFramerControl *dfCtrl,
15993 + ulong statusCode,
15994 + ulong statusOffset,
15995 + dslFrameHandlerType rxIndicateHandlerPtr,
15996 + dslFrameHandlerType txCompleteHandlerPtr,
15997 + dslStatusHandlerType statusHandlerPtr,
16000 + ulong rxPacketNum);
16001 +extern void DslFramerClose(void *gDslVars, dslFramerControl *dfCtrl);
16002 +extern void DslFramerSendFrame(void *gDslVars, dslFramerControl *dfCtrl, dslFrame *pFrame);
16003 +extern void DslFramerReturnFrame(void *gDslVars, dslFramerControl *dfCtrl, dslFrame *pFrame);
16006 +extern Boolean DslFramerRxGetPtr(void *gDslVars, dslFramerControl *dfCtrl, dslFramerBufDesc *pBufDesc);
16007 +extern void DslFramerRxDone (void *gDslVars, dslFramerControl *dfCtrl, dslFramerBufDesc *pBufDesc);
16008 +extern Boolean DslFramerTxGetPtr(void *gDslVars, dslFramerControl *dfCtrl, dslFramerBufDesc *pBufDesc);
16009 +extern void DslFramerTxDone(void *gDslVars, dslFramerControl *dfCtrl, dslFramerBufDesc *pBufDesc);
16010 +extern Boolean DslFramerTxIdle (void *gDslVars, dslFramerControl *dfCtrl);
16011 +extern void DslFramerTxFlush(void *gDslVars, dslFramerControl *dfCtrl);
16013 +extern void * DslFramerGetFramePoolHandler(dslFramerControl *dfCtrl);
16014 +extern void DslFramerClearStat(dslFramerControl *dfCtrl);
16016 +extern void DslFramerRxFlushFrame (void *gDslVars, dslFramerControl *dfCtrl, int errCode);
16017 +extern void DslFramerRxFlush(void *gDslVars, dslFramerControl *dfCtrl);
16019 +#endif /* DslFramerHeader */
16020 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/Flatten.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/Flatten.h
16021 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/Flatten.h 1970-01-01 01:00:00.000000000 +0100
16022 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/Flatten.h 2006-06-26 09:07:10.000000000 +0200
16025 +<:copyright-broadcom
16027 + Copyright (c) 2002 Broadcom Corporation
16028 + All Rights Reserved
16029 + No portions of this material may be reproduced in any form without the
16030 + written permission of:
16031 + Broadcom Corporation
16032 + 16215 Alton Parkway
16033 + Irvine, California 92619
16034 + All information contained in this document is Broadcom Corporation
16035 + company private, proprietary, and trade secret.
16039 +/****************************************************************************
16041 + * Flatten.h -- Header for Flatten/Unflatten command/status
16043 + * Copyright (c) 1998 AltoCom, Inc. All rights reserved.
16044 + * Authors: Ilya Stomakhin
16046 + * $Revision: 1.14 $
16048 + * $Id: Flatten.h,v 1.14 2004/03/04 19:48:52 linyin Exp $
16050 + * $Log: Flatten.h,v $
16051 + * Revision 1.14 2004/03/04 19:48:52 linyin
16052 + * Support adsl2plus
16054 + * Revision 1.13 2003/10/17 22:45:14 yongbing
16055 + * Increase buffer size for large B&G table of G992P3
16057 + * Revision 1.12 2003/08/12 23:16:26 khp
16058 + * - for Haixiang: added support for ADSL_MARGIN_TWEAK_TEST
16060 + * Revision 1.11 2003/02/27 06:33:03 ilyas
16061 + * Improved free space checking in command buffer (became a problem with
16062 + * 2 commands SetXmtgain and StartPhy)
16064 + * Revision 1.10 2003/01/11 01:27:07 ilyas
16065 + * Improved checking for available space in status buffer
16067 + * Revision 1.9 2002/09/07 01:43:59 ilyas
16068 + * Added support for OEM parameters
16070 + * Revision 1.8 2002/05/16 00:01:52 khp
16071 + * -added missing #endif
16073 + * Revision 1.7 2002/05/15 00:04:48 mprahlad
16074 + * increase the status buffer size - prevent memory overflow for annexC cases
16076 + * Revision 1.6 2002/04/05 04:10:33 linyin
16077 + * -hack to fit in Annex C firmware in LMEM
16079 + * Revision 1.5 2002/04/05 02:45:25 linyin
16080 + * Make the buffer side larger for annexC
16082 + * Revision 1.4 2002/01/30 07:19:06 ilyas
16083 + * Moved showtime code to LMEM
16085 + * Revision 1.3 2001/08/29 02:56:01 ilyas
16086 + * Added tests for flattening/unflatenning command and statuses (dual mode)
16088 + * Revision 1.2 2001/04/25 00:30:54 ilyas
16089 + * Adjusted MaxFrameLen
16091 + * Revision 1.1 2001/04/24 21:41:21 ilyas
16092 + * Implemented status flattening/unflattaning to transfer statuses between
16093 + * modules asynchronously through the circular buffer
16096 + *****************************************************************************/
16098 +#ifndef _Flatten_H_
16099 +#define _Flatten_H_
16101 +#include "CircBuf.h"
16103 +#ifdef ADSL_MARGIN_TWEAK_TEST
16104 +#define kMaxFlattenedCommandSize 272 /* maximum no. of bytes in flattened cmd */
16106 +#define kMaxFlattenedCommandSize 128 /* maximum no. of bytes in flattened cmd */
16108 +#if defined(G992_ANNEXC) || defined(G992P3)
16109 +#if defined(G992P5)
16110 +#define kMaxFlattenedStatusSize 2200 /* maximum no. of bytes in flattened status */
16112 +#define kMaxFlattenedStatusSize 1100 /* maximum no. of bytes in flattened status */
16115 +#define kMaxFlattenedStatusSize 550 /* maximum no. of bytes in flattened status */
16118 +#define kMaxFlattenFramelength (kMaxFlattenedStatusSize - (4*sizeof(long)) - 20)
16120 +extern int SM_DECL FlattenCommand (dslCommandStruct *cmd, ulong *dstPtr, ulong nAvail);
16121 +extern int SM_DECL UnflattenCommand(ulong *srcPtr, dslCommandStruct *cmd);
16122 +extern int SM_DECL FlattenStatus (dslStatusStruct *status, ulong *dstPtr, ulong nAvail);
16123 +extern int SM_DECL UnflattenStatus (ulong *srcPtr, dslStatusStruct *status);
16125 +#define FlattenBufferInit(fb,fbData,bufSize,itemSize) \
16126 + StretchBufferInit(fb, fbData, bufSize, itemSize)
16128 +extern int SM_DECL FlattenBufferStatusWrite(stretchBufferStruct *fBuf, dslStatusStruct *status);
16129 +extern int SM_DECL FlattenBufferStatusRead(stretchBufferStruct *fBuf, dslStatusStruct *status);
16131 +extern int SM_DECL FlattenBufferCommandWrite(stretchBufferStruct *fBuf, dslCommandStruct *cmd);
16132 +extern int SM_DECL FlattenBufferCommandRead(stretchBufferStruct *fBuf, dslCommandStruct *cmd);
16134 +#define FlattenBufferReadComplete(fb,nBytes) \
16135 + StretchBufferReadUpdate (fb, nBytes)
16137 +#endif /* _Flatten_H_ */
16139 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/G992p3OvhMsg.gh linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/G992p3OvhMsg.gh
16140 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/G992p3OvhMsg.gh 1970-01-01 01:00:00.000000000 +0100
16141 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/G992p3OvhMsg.gh 2006-06-26 09:07:10.000000000 +0200
16144 +<:copyright-broadcom
16146 + Copyright (c) 2002 Broadcom Corporation
16147 + All Rights Reserved
16148 + No portions of this material may be reproduced in any form without the
16149 + written permission of:
16150 + Broadcom Corporation
16151 + 16215 Alton Parkway
16152 + Irvine, California 92619
16153 + All information contained in this document is Broadcom Corporation
16154 + company private, proprietary, and trade secret.
16158 +/****************************************************************************
16160 + * G992p3OvhMsg.gh
16163 + * This is a header file which defines the type for the G992p3 overhead
16164 + * channel messages global variable structure.
16167 + * Copyright (c) 1999-2003 BroadCom, Inc. All rights reserved.
16168 + * Authors: Ilya Stomakhin
16170 + * $Revision: 1.5 $
16172 + * $Id: G992p3OvhMsg.gh,v 1.5 2004/09/11 03:52:25 ilyas Exp $
16174 + * $Log: G992p3OvhMsg.gh,v $
16175 + * Revision 1.5 2004/09/11 03:52:25 ilyas
16176 + * Added support for overhead message segmentation
16178 + * Revision 1.4 2004/07/07 01:27:20 ilyas
16179 + * Fixed OHC message stuck problem on L2 entry/exit
16181 + * Revision 1.3 2004/06/10 00:13:31 ilyas
16182 + * Added L2/L3 and SRA
16184 + * Revision 1.2 2004/04/12 23:34:52 ilyas
16185 + * Merged the latest ADSL driver chnages for ADSL2+
16187 + * Revision 1.1 2003/07/18 19:39:18 ilyas
16188 + * Initial G.992.3 overhead channel message implementation (from ADSL driver)
16191 + *****************************************************************************/
16193 +#ifndef G992p3OvhMsgFramerGlobals
16194 +#define G992p3OvhMsgFramerGlobals
16196 +#define kG992p3OvhMsgMaxCmdSize (16 + 16)
16197 +#define kG992p3OvhMsgMaxRspSize (16 + 2*512)
16201 + dslFrame *segFrame;
16202 + dslFrameBuffer *segFrBufCur;
16203 + dslFrameBuffer segFrBuf;
16204 + ulong timeSegOut;
16209 + g992p3SegFrameCtlStruct;
16214 + dslFrameHandlerType rxReturnFramePtr;
16215 + dslFrameHandlerType txSendFramePtr;
16216 + dslCommandHandlerType cmdHandlerPtr;
16217 + dslStatusHandlerType statusHandlerPtr;
16219 + dslFrame txRspFrame;
16220 + dslFrameBuffer txRspFrBuf;
16221 + dslFrameBuffer txRspFrBuf1;
16222 + uchar txRspBuf[kG992p3OvhMsgMaxRspSize];
16223 + dslFrame txPwrRspFrame;
16224 + dslFrameBuffer txPwrRspFrBuf0;
16225 + dslFrameBuffer txPwrRspFrBuf0a;
16226 + dslFrameBuffer txPwrRspFrBuf1;
16227 + uchar txPwrRspBuf0[8];
16228 + dslFrame txCmdFrame;
16229 + dslFrameBuffer txCmdFrBuf0;
16230 + dslFrameBuffer txCmdFrBuf0a;
16231 + dslFrameBuffer txCmdFrBuf1;
16232 + uchar txCmdBuf[kG992p3OvhMsgMaxCmdSize];
16233 + g992p3SegFrameCtlStruct txSegFrameCtl;
16239 + ulong timeCmdOut;
16242 + ulong timeRspOut;
16245 + uchar rxCmdMsgNum;
16246 + uchar rxRspMsgNum;
16247 + uchar txCmdMsgNum;
16248 + uchar txRspMsgNum;
16250 + g992p3OvhMsgVarsStruct;
16252 +#endif /* G992p3OvhMsgFramerGlobals */
16253 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/G992p3OvhMsg.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/G992p3OvhMsg.h
16254 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/G992p3OvhMsg.h 1970-01-01 01:00:00.000000000 +0100
16255 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/G992p3OvhMsg.h 2006-06-26 09:07:10.000000000 +0200
16258 +<:copyright-broadcom
16260 + Copyright (c) 2002 Broadcom Corporation
16261 + All Rights Reserved
16262 + No portions of this material may be reproduced in any form without the
16263 + written permission of:
16264 + Broadcom Corporation
16265 + 16215 Alton Parkway
16266 + Irvine, California 92619
16267 + All information contained in this document is Broadcom Corporation
16268 + company private, proprietary, and trade secret.
16272 +/****************************************************************************
16277 + * This file contains the exported functions and definitions for G992p3
16278 + * overhead channel messages
16281 + * Copyright (c) 1999-2003 BroadCom, Inc. All rights reserved.
16282 + * Authors: Ilya Stomakhin
16284 + * $Revision: 1.1 $
16286 + * $Id: G992p3OvhMsg.h,v 1.1 2003/07/18 19:39:18 ilyas Exp $
16288 + * $Log: G992p3OvhMsg.h,v $
16289 + * Revision 1.1 2003/07/18 19:39:18 ilyas
16290 + * Initial G.992.3 overhead channel message implementation (from ADSL driver)
16293 + *****************************************************************************/
16295 +#ifndef G992p3OvhMsgFramerHeader
16296 +#define G992p3OvhMsgFramerHeader
16298 +#define kG992p3OvhMsgFrameBufCnt -1
16300 +extern Boolean G992p3OvhMsgInit(
16303 + dslFrameHandlerType rxReturnFramePtr,
16304 + dslFrameHandlerType txSendFramePtr,
16305 + dslCommandHandlerType commandHandler,
16306 + dslStatusHandlerType statusHandler);
16308 +extern void G992p3OvhMsgReset(void *gDslVars);
16309 +extern void G992p3OvhMsgClose(void *gDslVars);
16310 +extern void G992p3OvhMsgTimer(void *gDslVars, long timeQ24ms);
16311 +extern Boolean G992p3OvhMsgCommandHandler (void *gDslVars, dslCommandStruct *cmd);
16312 +extern void G992p3OvhMsgStatusSnooper (void *gDslVars, dslStatusStruct *status);
16314 +extern int G992p3OvhMsgSendCompleteFrame(void *gDslVars, void *pVc, ulong mid, dslFrame *pFrame);
16315 +extern int G992p3OvhMsgIndicateRcvFrame(void *gDslVars, void *pVc, ulong mid, dslFrame *pFrame);
16317 +extern void G992p3OvhMsgSetL3(void *gDslVars);
16318 +extern void G992p3OvhMsgSetL0(void *gDslVars);
16320 +#endif /* G992p3OvhMsgFramerHeader */
16321 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/G997.gh linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/G997.gh
16322 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/G997.gh 1970-01-01 01:00:00.000000000 +0100
16323 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/G997.gh 2006-06-26 09:07:10.000000000 +0200
16325 +/****************************************************************************
16330 + * This is a header file which defines the type for the G997 Framer
16331 + * global variable structure.
16334 + * Copyright (c) 1993-1998 AltoCom, Inc. All rights reserved.
16335 + * Authors: Ilya Stomakhin
16337 + * $Revision: 1.5 $
16339 + * $Id: G997.gh,v 1.5 2004/07/21 01:39:41 ilyas Exp $
16341 + * $Log: G997.gh,v $
16342 + * Revision 1.5 2004/07/21 01:39:41 ilyas
16343 + * Reset entire G.997 state on retrain. Timeout in G.997 if no ACK
16345 + * Revision 1.4 2004/04/27 00:27:16 ilyas
16346 + * Implemented double buffering to ensure G.997 HDLC frame is continuous
16348 + * Revision 1.3 2003/07/18 18:56:59 ilyas
16349 + * Added support for shared TX buffer (for ADSL driver)
16351 + * Revision 1.2 2002/01/11 06:48:27 ilyas
16352 + * Added command handler pointer
16354 + * Revision 1.1 2001/12/13 02:28:27 ilyas
16355 + * Added common framer (DslPacket and G997) and G997 module
16358 + *****************************************************************************/
16360 +#ifndef G997FramerGlobals
16361 +#define G997FramerGlobals
16363 +#include "DslFramer.h"
16364 +#include "HdlcFramer.h"
16366 +#define kG997MsgBufSize 64
16371 + dslFramerControl dslFramer;
16372 + hdlcByteControl hdlcByte;
16373 + dslCommandHandlerType commandHandler;
16376 + ulong timeCmdOut;
16381 + uchar txMsgBuf[kG997MsgBufSize];
16382 + ulong txMsgBufLen;
16383 + uchar *txMsgBufPtr;
16386 + ulong txMsgBufNum;
16390 +#endif /* G997FramerGlobals */
16391 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/G997.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/G997.h
16392 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/G997.h 1970-01-01 01:00:00.000000000 +0100
16393 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/G997.h 2006-06-26 09:07:10.000000000 +0200
16396 +<:copyright-broadcom
16398 + Copyright (c) 2002 Broadcom Corporation
16399 + All Rights Reserved
16400 + No portions of this material may be reproduced in any form without the
16401 + written permission of:
16402 + Broadcom Corporation
16403 + 16215 Alton Parkway
16404 + Irvine, California 92619
16405 + All information contained in this document is Broadcom Corporation
16406 + company private, proprietary, and trade secret.
16410 +/****************************************************************************
16415 + * This file contains the exported functions and definitions for G97Framer
16418 + * Copyright (c) 1993-1998 AltoCom, Inc. All rights reserved.
16419 + * Authors: Ilya Stomakhin
16421 + * $Revision: 1.3 $
16423 + * $Id: G997.h,v 1.3 2003/07/18 18:56:59 ilyas Exp $
16425 + * $Log: G997.h,v $
16426 + * Revision 1.3 2003/07/18 18:56:59 ilyas
16427 + * Added support for shared TX buffer (for ADSL driver)
16429 + * Revision 1.2 2002/07/20 00:51:41 ilyas
16430 + * Merged witchanges made for VxWorks/Linux driver.
16432 + * Revision 1.1 2001/12/13 02:28:27 ilyas
16433 + * Added common framer (DslPacket and G997) and G997 module
16437 + *****************************************************************************/
16439 +#ifndef G997FramerHeader
16440 +#define G997FramerHeader
16442 +extern Boolean G997Init(
16447 + ulong rxPacketNum,
16448 + upperLayerFunctions *pUpperLayerFunctions,
16449 + dslCommandHandlerType g997PhyCommandHandler);
16451 +extern void G997Close(void *gDslVars);
16452 +extern void G997Timer(void *gDslVars, long timeQ24ms);
16453 +extern Boolean G997CommandHandler (void *gDslVars, dslCommandStruct *cmd);
16454 +extern void G997StatusSnooper (void *gDslVars, dslStatusStruct *status);
16456 +extern int G997SendFrame(void *gDslVars, void *pVc, ulong mid, dslFrame *pFrame);
16457 +extern int G997ReturnFrame(void *gDslVars, void *pVc, ulong mid, dslFrame *pFrame);
16459 +extern Boolean G997SetTxBuffer(void *gDslVars, ulong len, void *bufPtr);
16460 +extern void * G997GetFramePoolHandler(void *gDslVars);
16462 +#endif /* G997FramerHeader */
16463 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/HdlcFramer.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/HdlcFramer.h
16464 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/HdlcFramer.h 1970-01-01 01:00:00.000000000 +0100
16465 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/HdlcFramer.h 2006-06-26 09:07:10.000000000 +0200
16468 +<:copyright-broadcom
16470 + Copyright (c) 2002 Broadcom Corporation
16471 + All Rights Reserved
16472 + No portions of this material may be reproduced in any form without the
16473 + written permission of:
16474 + Broadcom Corporation
16475 + 16215 Alton Parkway
16476 + Irvine, California 92619
16477 + All information contained in this document is Broadcom Corporation
16478 + company private, proprietary, and trade secret.
16482 +/****************************************************************************
16487 + * This file contains common HDLC definitions for bit/byte stuffing
16490 + * Copyright (c) 1993-1998 AltoCom, Inc. All rights reserved.
16491 + * Authors: Ilya Stomakhin
16493 + * $Revision: 1.3 $
16495 + * $Id: HdlcFramer.h,v 1.3 2004/07/21 01:39:41 ilyas Exp $
16497 + * $Log: HdlcFramer.h,v $
16498 + * Revision 1.3 2004/07/21 01:39:41 ilyas
16499 + * Reset entire G.997 state on retrain. Timeout in G.997 if no ACK
16501 + * Revision 1.2 2003/07/18 18:51:05 ilyas
16502 + * Added mode (default) to pass address and control field
16504 + * Revision 1.1 2001/12/13 02:28:27 ilyas
16505 + * Added common framer (DslPacket and G997) and G997 module
16509 + *****************************************************************************/
16511 +#ifndef HdlcFramerHeader
16512 +#define HdlcFramerHeader
16514 +/* setup bitmap definitions */
16516 +#define kHdlcSetupShift 16
16517 +#define kHdlcSetupMask ((long)0xFFFF << kHdlcSetupShift)
16519 +#define kHdlcCrcMask 0x00030000
16520 +#define kHdlcCrcNone 0x00000000
16521 +#define kHdlcCrc16 0x00010000
16522 +#define kHdlcCrc32 0x00020000
16524 +#define kHdlcTxIdleStop 0x00040000
16525 +#define kHdlcSpecialAddrCtrl 0x00080000
16527 +extern ushort HdlcCrc16Table[];
16529 +#define HDLC16_CRC_INIT 0xFFFF
16530 +#define HDLC16_CRC_FINAL(crc) ((crc) ^ 0xFFFF)
16531 +#define HDLC16_GOOD_CRC 0xF0B8
16532 +#define Hdlc16UpdateCrc(crc,b) ((crc) >> 8) ^ HdlcCrc16Table[((crc) ^ (b)) & 0xFF]
16534 +extern ulong HdlcCrc32Table[];
16536 +#define HDLC32_CRC_INIT 0xFFFFFFFF
16537 +#define HDLC32_CRC_FINAL(crc) ((crc) ^ 0xFFFFFFFF)
16538 +#define HDLC32_GOOD_CRC 0xDEBB20E3
16539 +#define Hdlc32UpdateCrc(crc,b) ((crc) >> 8) ^ HdlcCrc32Table[((crc) ^ (b)) & 0xFF]
16541 +extern ulong HdlcCrc32Table[];
16543 +/* HDLC common fields */
16545 +#define HDLC_ADDR 0xFF
16546 +#define HDLC_CTRL 0x3
16548 +#define HDLC_BYTE_FLAG 0x7E
16549 +#define HDLC_BYTE_ESC 0x7D
16551 +/* HDLC frame assembly states */
16553 +#define HDLC_STATE_START_FLAG 0
16554 +#define HDLC_STATE_ADDRESS (HDLC_STATE_START_FLAG + 1)
16555 +#define HDLC_STATE_CONTROL (HDLC_STATE_START_FLAG + 2)
16556 +#define HDLC_STATE_DATA (HDLC_STATE_START_FLAG + 3)
16557 +#define HDLC_STATE_FCS1 (HDLC_STATE_START_FLAG + 4)
16558 +#define HDLC_STATE_FCS2 (HDLC_STATE_START_FLAG + 5)
16559 +#define HDLC_STATE_END_FLAG (HDLC_STATE_START_FLAG + 6)
16562 +/* HDLC common types */
16564 +typedef struct _hdlcByteControl {
16566 + dslFramerDataGetPtrHandlerType rxDataGetPtrHandler;
16567 + dslFramerDataDoneHandlerType rxDataDoneHandler;
16568 + dslFramerDataGetPtrHandlerType txDataGetPtrHandler;
16569 + dslFramerDataDoneHandlerType txDataDoneHandler;
16571 + /* RX working data set */
16573 + uchar rxFrameState;
16576 + Boolean rxEscChar;
16579 + uchar *pRxDataEnd;
16582 + /* TX working data set */
16584 + uchar txFrameState;
16587 + int txCharPending;
16590 + uchar *pTxDataEnd;
16592 +} hdlcByteControl;
16594 +typedef struct _hdlcBitControl {
16596 + dslFramerDataGetPtrHandlerType rxDataGetPtrHandler;
16597 + dslFramerDataDoneHandlerType rxDataDoneHandler;
16598 + dslFramerDataGetPtrHandlerType txDataGetPtrHandler;
16599 + dslFramerDataDoneHandlerType txDataDoneHandler;
16601 + /* RX working data set */
16603 + uchar rxFrameState;
16606 + int rxNibblePending;
16609 + uchar rxRem1Bits;
16610 + Boolean rxEscChar; /* ???? */
16613 + uchar *pRxDataEnd;
16616 + /* TX working data set */
16618 + uchar txFrameState;
16623 + uchar txLast1Bits;
16624 + int txCharPending; /* ???? */
16627 + uchar *pTxDataEnd;
16631 +/* HDLC common functions */
16633 +#define HdlcFramerTxFrameInit(ctrl) do { \
16634 + ctrl->txFrameState = HDLC_STATE_START_FLAG; \
16635 + ctrl->txFrameLen = 0; \
16636 + ctrl->txCrc = HDLC16_CRC_INIT; \
16637 + ctrl->txCharPending= -1; \
16640 +#define HdlcFramerRxFrameInit(ctrl) do { \
16641 + ctrl->rxFrameState = HDLC_STATE_START_FLAG; \
16642 + ctrl->rxFrameLen = 0; \
16643 + ctrl->rxCrc = HDLC16_CRC_INIT; \
16644 + ctrl->rxEscChar = false; \
16647 +#define HdlcFramerTxGetData(ctrl) do { \
16648 + dslFramerBufDesc bufDesc; \
16650 + if ((ctrl->txDataGetPtrHandler) (gDslVars, &bufDesc)) { \
16651 + ctrl->pTxData = bufDesc.bufPtr; \
16652 + ctrl->pTxDataEnd = (uchar*)bufDesc.bufPtr + bufDesc.bufLen; \
16653 + ctrl->txDataLen = bufDesc.bufLen; \
16654 + if (bufDesc.bufFlags & kDslFramerStartNewFrame) \
16655 + HdlcFramerTxFrameInit(ctrl); \
16658 + HdlcFramerTxFrameInit(ctrl); \
16662 +#define HdlcFramerRxGetData(ctrl, frFlag) do { \
16663 + dslFramerBufDesc bufDesc; \
16665 + bufDesc.bufFlags = frFlag; \
16666 + if ((ctrl->rxDataGetPtrHandler) (gDslVars, &bufDesc)) { \
16667 + ctrl->pRxData = bufDesc.bufPtr; \
16668 + ctrl->pRxDataEnd = (uchar*)bufDesc.bufPtr + bufDesc.bufLen; \
16669 + ctrl->rxDataLen = bufDesc.bufLen; \
16673 +/* HDLC functions headers */
16675 +extern Boolean HdlcByteInit(
16677 + hdlcByteControl *hbyCtrl,
16679 + dslFramerDataGetPtrHandlerType rxDataGetPtrHandler,
16680 + dslFramerDataDoneHandlerType rxDataDoneHandler,
16681 + dslFramerDataGetPtrHandlerType txDataGetPtrHandler,
16682 + dslFramerDataDoneHandlerType txDataDoneHandler);
16684 +extern void HdlcByteReset(void *gDslVars, hdlcByteControl *hbyCtrl);
16685 +extern void HdlcByteRxFlush(void *gDslVars, hdlcByteControl *hbyCtrl);
16686 +extern int HdlcByteRx(void *gDslVars, hdlcByteControl *hbyCtrl, int nBytes, uchar *srcPtr) FAST_TEXT;
16687 +extern int HdlcByteTx(void *gDslVars, hdlcByteControl *hbyCtrl, int nBytes, uchar *dstPtr) FAST_TEXT;
16688 +extern Boolean HdlcByteTxIdle(void *gDslVars, hdlcByteControl *hbyCtrl);
16690 +extern Boolean HdlcBitInit(
16692 + hdlcBitControl *hbiCtrl,
16694 + dslFramerDataGetPtrHandlerType rxDataGetPtrHandler,
16695 + dslFramerDataDoneHandlerType rxDataDoneHandler,
16696 + dslFramerDataGetPtrHandlerType txDataGetPtrHandler,
16697 + dslFramerDataDoneHandlerType txDataDoneHandler);
16699 +extern void HdlcBitReset(void *gDslVars, hdlcByteControl *hbiCtrl);
16700 +extern int HdlcBitRx(void *gDslVars, hdlcBitControl *hbiCtrl, int nBytes, uchar *srcPtr) FAST_TEXT;
16701 +extern int HdlcBitTx(void *gDslVars, hdlcBitControl *hbiCtrl, int nBytes, uchar *dstPtr) FAST_TEXT;
16703 +#endif /* HdlcFramerHeader */
16704 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/MathUtil.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/MathUtil.h
16705 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/MathUtil.h 1970-01-01 01:00:00.000000000 +0100
16706 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/MathUtil.h 2006-06-26 09:07:10.000000000 +0200
16709 +<:copyright-broadcom
16711 + Copyright (c) 2002 Broadcom Corporation
16712 + All Rights Reserved
16713 + No portions of this material may be reproduced in any form without the
16714 + written permission of:
16715 + Broadcom Corporation
16716 + 16215 Alton Parkway
16717 + Irvine, California 92619
16718 + All information contained in this document is Broadcom Corporation
16719 + company private, proprietary, and trade secret.
16723 +/************************************************************************
16728 + * This file contains the exported interface for MathUtil.c module.
16731 + * Copyright (c) 1993-1997 AltoCom, Inc. All rights reserved.
16732 + * Authors: Mark Gonikberg, Haixiang Liang.
16734 + * $Revision: 1.6 $
16736 + * $Id: MathUtil.h,v 1.6 2004/04/13 00:21:13 ilyas Exp $
16738 + * $Log: MathUtil.h,v $
16739 + * Revision 1.6 2004/04/13 00:21:13 ilyas
16740 + * Added standard header for shared ADSL driver files
16742 + * Revision 1.5 2001/08/16 02:18:08 khp
16743 + * - mark functions with FAST_TEXT to reduce cycle counts for QPROC targets
16744 + * (replaces use of LMEM_INSN)
16746 + * Revision 1.4 1999/10/06 04:55:22 liang
16747 + * Added function to multiply two long values to save result as VeryLong.
16749 + * Revision 1.3 1999/08/05 19:42:52 liang
16750 + * Merged with the softmodem top of the tree on 08/04/99 for assembly files.
16752 + * Revision 1.2 1999/03/26 03:29:59 liang
16753 + * Export CosSin table.
16755 + * Revision 1.1 1998/10/28 01:28:07 liang
16756 + * *** empty log message ***
16758 + * Revision 1.12 1998/02/10 17:19:49 scott
16759 + * Changed MathVL routines to return arguments using pointers
16761 + * Revision 1.11 1997/12/13 06:12:07 mwg
16762 + * Added more Atan2 flavors
16764 + * Revision 1.10 1997/11/18 01:11:48 mwg
16765 + * Removed <CR> symbols which accidently slipped in.
16767 + * Revision 1.9 1997/11/03 19:07:52 scott
16768 + * No longer redefine max() and min() if already defined
16770 + * Revision 1.8 1997/07/30 01:35:20 liang
16771 + * Add more accurate atan2 function UtilLongLongAtan2.
16773 + * Revision 1.7 1997/07/21 20:23:19 mwg
16774 + * Added new function: UtilBlockCos()
16776 + * Revision 1.6 1997/03/21 23:50:10 liang
16777 + * Added initial version of V8bis module to CVS tree.
16779 + * Revision 1.5 1997/03/19 18:35:34 mwg
16780 + * Changed copyright notice.
16782 + * Revision 1.4 1997/01/21 00:36:15 mwg
16783 + * Added new function: UtilBlockCosSin()
16785 + * Revision 1.3 1996/06/18 21:14:45 mwg
16786 + * Modified VLDivVL by allowing to specify the result scaling.
16788 + * Revision 1.2 1996/06/12 02:31:59 mwg
16789 + * Added 64bit arithmetic functions.
16791 + * Revision 1.1.1.1 1996/02/14 02:35:15 mwg
16792 + * Redesigned the project directory structure. Merged V.34 into the project.
16794 + * Revision 1.4 1995/12/04 23:08:15 liang
16795 + * Add file Math/LinearToLog.c.
16797 + ************************************************************************/
16798 +#ifndef MathUtilPh
16799 +#define MathUtilPh
16801 +/* Exported tables */
16802 +extern const short UtilCosTable[];
16804 +/* Exported functions */
16805 +extern ComplexShort UtilCosSin(ushort angle);
16806 +extern long UtilBlockCosSin (int nValues, long angle, long delta, ComplexShort *dstPtr);
16807 +extern long UtilBlockCos (int nValues, long angle, long delta, short *dstPtr);
16808 +extern ushort UtilShortShortAtan2(ComplexShort point);
16809 +extern ushort UtilLongShortAtan2(ComplexLong point);
16810 +extern ulong UtilShortLongAtan2(ComplexShort point) FAST_TEXT;
16811 +extern ulong UtilLongLongAtan2(ComplexLong point) FAST_TEXT;
16812 +extern ushort UtilSqrt(ulong y);
16813 +extern ushort UtilMaxMagnitude(int blkSize, ComplexShort *dataPtr);
16814 +extern short UtilQ0LinearToQ4dB (ulong x);
16815 +extern ulong UtilQ4dBToQ12Linear (short x);
16816 +extern void UtilAdjustComplexMagnitude(ComplexShort *srcPtr, short mag, short adjustment);
16818 +extern void VLMultLongByLong(long x, long y, VeryLong *dst);
16819 +extern void VLMultShort (VeryLong x, short y, VeryLong *dst);
16820 +extern void VLAddVL (VeryLong x, VeryLong y, VeryLong *dst);
16821 +extern void VLAddLong (VeryLong x, long y, VeryLong *dst);
16822 +extern void VLSubVL (VeryLong x, VeryLong y, VeryLong *dst);
16823 +extern void VLSubLong (VeryLong x, long y, VeryLong *dst);
16824 +extern void VLDivVL (VeryLong x, VeryLong y, int scale, long *dst);
16825 +extern void VLShiftLeft(VeryLong x, int shift, VeryLong *dst);
16826 +extern void VLShiftRight(VeryLong x, int shift, VeryLong *dst);
16829 +#define UtilAtan2 UtilShortShortAtan2
16830 +#define UtilLongAtan2 UtilLongShortAtan2
16832 +/* Standard Macros */
16834 +#define abs(x) ((x) >= 0 ? (x) : -(x))
16837 +#define max(x, y) ((x) >= (y) ? (x) : (y))
16840 +#define min(x, y) ((x) <= (y) ? (x) : (y))
16842 +#endif /* MathUtilPh */
16843 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/MipsAsm.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/MipsAsm.h
16844 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/MipsAsm.h 1970-01-01 01:00:00.000000000 +0100
16845 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/MipsAsm.h 2006-06-26 09:07:10.000000000 +0200
16848 +<:copyright-broadcom
16850 + Copyright (c) 2002 Broadcom Corporation
16851 + All Rights Reserved
16852 + No portions of this material may be reproduced in any form without the
16853 + written permission of:
16854 + Broadcom Corporation
16855 + 16215 Alton Parkway
16856 + Irvine, California 92619
16857 + All information contained in this document is Broadcom Corporation
16858 + company private, proprietary, and trade secret.
16862 +/************************************************************************
16867 + * This file contains definitions specific to MIPS assembly
16870 + * Copyright (c) 1993-1997 AltoCom, Inc. All rights reserved.
16871 + * Authors: Mark Gonikberg, Haixiang Liang.
16873 + * $Revision: 1.5 $
16875 + * $Id: MipsAsm.h,v 1.5 2004/04/13 00:16:59 ilyas Exp $
16877 + * $Log: MipsAsm.h,v $
16878 + * Revision 1.5 2004/04/13 00:16:59 ilyas
16879 + * Merged the latest ADSL driver changes
16881 + * Revision 1.4 2002/09/12 04:08:50 ilyas
16882 + * Added macros for BCM MIPS specific instructions
16884 + * Revision 1.3 2000/11/18 21:28:19 mprahlad
16885 + * ifdef bcm47xx -
16886 + * define MSUB(src1,src2) msub src1, src2
16887 + * change Mult(dst, src1, src2) to use "mul" instead of "mult; mflo"
16888 + * define Mul(src1, src2) mult src1, src2
16890 + * Revision 1.2 2000/07/28 21:05:05 mprahlad
16891 + * Macros specific to bcm47xx added.
16893 + * Revision 1.1 1999/08/05 19:52:57 liang
16894 + * Copied from the softmodem top of the tree on 08/04/99.
16896 + * Revision 1.5 1999/04/02 23:16:21 mwg
16897 + * Fixed a minor comatibility issue with mult
16899 + * Revision 1.4 1999/02/03 20:25:43 mwg
16900 + * Added an option for R4010
16902 + * Revision 1.3 1998/10/30 02:21:34 mwg
16903 + * Added targets for 4640
16905 + * Revision 1.2 1998/10/16 18:52:09 ilyas
16906 + * Added ASM_PROLOG[5-7] macros to save on stores
16908 + * Revision 1.1 1998/06/03 23:28:39 mwg
16909 + * Renamed from DinoDefs.h
16911 + * Revision 1.6 1998/02/09 18:23:11 scott
16912 + * Added EMBEDDED_CALLING_CONVENTION (GreenHill) and R3900/R4102
16914 + * Revision 1.5 1997/03/19 18:35:02 mwg
16915 + * Changed copyright notice.
16917 + * Revision 1.4 1996/10/02 20:28:41 liang
16918 + * Remove parameter "acc" from the non-DINO version of MAD.
16920 + * Revision 1.3 1996/10/02 19:44:36 liang
16921 + * Separated MultAdd into MAD and MADW, added NO_DINO_WRITEBACK option.
16923 + * Revision 1.2 1996/08/14 03:06:07 liang
16924 + * Modified macro MultAdd so that the assembly code build works.
16926 + * Revision 1.1.1.1 1996/02/14 02:35:13 mwg
16927 + * Redesigned the project directory structure. Merged V.34 into the project.
16929 + * Revision 1.5 1994/11/04 22:41:29 mwg
16930 + * Added #ifdefs for different targets.
16932 + ************************************************************************/
16934 +#ifndef _MIPS_ASM_H_
16935 +#define _MIPS_ASM_H_
16970 +#ifdef EMBEDDED_CALLING_CONVENTION
16972 +/* Support for GreenHills embedded calling convention */
16974 +#define ASM_PROLOG subu sp, 32; \
16977 + sw $10, 24(sp); \
16980 +#define ASM_PROLOG5 subu sp, 32; \
16983 +#define ASM_PROLOG6 subu sp, 32; \
16987 +#define ASM_PROLOG7 subu sp, 32; \
16992 +#define ASM_EPILOG addu sp, 32
16995 +#define ASM_PROLOG
16996 +#define ASM_PROLOG5
16997 +#define ASM_PROLOG6
16998 +#define ASM_PROLOG7
16999 +#define ASM_EPILOG
17002 +#ifdef DINO /* Special DSP extensions to MIPS core */
17004 +#ifndef NO_DINO_WRITEBACK /* DSP extensions with writeback register */
17006 +#define MAD(src1, src2) .set noreorder ; mad $0, src1, src2 ; .set reorder
17007 +#define MADW(acc, src1, src2) .set noreorder ; mad acc, src1, src2 ; .set reorder
17008 +#define Mult(dst, src1, src2) .set noreorder ; mult dst, src1, src2 ; .set reorder
17009 +#define MultU(dst, src1, src2) .set noreorder ; multu dst, src1, src2 ; .set reorder
17011 +#else /* NO_DINO_WRITEBACK */
17013 +#define MAD(src1, src2) .set noreorder ; mad $0, src1, src2 ; .set reorder
17014 +#define MADW(acc, src1, src2) .set noreorder ; mad $0, src1, src2 ; mflo acc ; .set reorder
17015 +#define Mult(dst, src1, src2) multu src1, src2 ; mflo dst
17016 +#define MultU(dst, src1, src2) multu src1, src2 ; mflo dst
17018 +#endif /* NO_DINO_WRITEBACK */
17022 +#if defined(R3900)
17024 +#define MAD(src1, src2) madd $0, src1, src2
17025 +#define MADW(acc, src1, src2) madd acc, src1, src2
17026 +#define Mult(dst, src1, src2) mult dst, src1, src2
17027 +#define MultU(dst, src1, src2) multu dst, src1, src2
17029 +#elif defined(bcm47xx_INSTR_MACROS) && defined(bcm47xx)
17031 +#define mips_froo(s1,s2,s3) s1##s2##s3
17032 +#define MSUB(s1,s2) .set noreorder ; mips_froo(msub_,s1,s2) ; .set reorder
17033 +#define MAD(s1,s2) .set noreorder ; mips_froo(mad_,s1,s2) ; .set reorder
17034 +#define MADW(acc, s1,s2) .set noreorder ; mips_froo(mad_,s1,s2) ; mflo acc ; .set reorder
17036 +#include "BCM4710.h"
17038 +#define Mult(dst, src1, src2) mul dst, src1, src2
17039 +#define Mul( src1, src2) mult src1, src2 ;
17040 +#define MultU(dst, src1, src2) multu src1, src2 ; mflo dst
17042 +#elif defined(bcm47xx)
17043 +#define MSUB(src1, src2) msub src1, src2
17044 +#define MAD(src1, src2) madd src1, src2
17045 +#define MADW(acc, src1, src2) .set noreorder ; madd src1, src2; mflo acc ; .set reorder
17047 +#define Mult(dst, src1, src2) mult src1, src2 ; mflo dst
17049 +#define Mult(dst, src1, src2) mul dst , src1, src2 ;
17050 +#define Mul( src1, src2) mult src1, src2 ;
17051 +#define MultU(dst, src1, src2) multu src1, src2 ; mflo dst
17056 +#define MAD(src1, src2) madd16 src1, src2
17057 +#define MADW(acc, src1, src2) madd16 src1, src2 ; mflo acc
17062 +#define MAD(src1, src2) madd $0, src1, src2
17063 +#define MADW(acc, src1, src2) madd src1, src2; mflo acc
17069 +#define MAD(src1, src2) madd src1, src2
17070 +#define MADW(acc, src1, src2) madd src1, src2; mflo acc
17073 +#define MAD(src1, src2) .set noat ;\
17076 + multu src1, src2 ;\
17078 + addu $at, $2, $at ;\
17083 +#define MADW(acc, src1, src2) .set noat ;\
17086 + multu src1, src2 ;\
17088 + addu $at, $2, $at ;\
17093 +#endif /* R4010 */
17094 +#endif /* R4102 */
17095 +#endif /* R4640 */
17097 +#define Mult(dst, src1, src2) mul dst, src1, src2
17098 +#define MultU(dst, src1, src2) multu src1, src2 ; mflo dst
17100 +#endif /* !3900 */
17110 +#endif /* _MIPS_ASM_H_ */
17111 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/MiscUtil.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/MiscUtil.h
17112 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/MiscUtil.h 1970-01-01 01:00:00.000000000 +0100
17113 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/MiscUtil.h 2006-06-26 09:07:10.000000000 +0200
17116 +<:copyright-broadcom
17118 + Copyright (c) 2002 Broadcom Corporation
17119 + All Rights Reserved
17120 + No portions of this material may be reproduced in any form without the
17121 + written permission of:
17122 + Broadcom Corporation
17123 + 16215 Alton Parkway
17124 + Irvine, California 92619
17125 + All information contained in this document is Broadcom Corporation
17126 + company private, proprietary, and trade secret.
17130 +/****************************************************************************
17132 + * MiscUtil.h -- Miscellaneous utilities
17137 + * Copyright (c) 1993-1997 AltoCom, Inc. All rights reserved.
17138 + * Authors: Mark Gonikberg Haixiang Liang
17140 + * $Revision: 1.4 $
17142 + * $Id: MiscUtil.h,v 1.4 2004/04/13 00:21:46 ilyas Exp $
17144 + * $Log: MiscUtil.h,v $
17145 + * Revision 1.4 2004/04/13 00:21:46 ilyas
17146 + * Added standard header for shared ADSL driver files
17148 + * Revision 1.3 2001/07/21 01:21:06 ilyas
17149 + * Added more functions for int to string conversion used by log file
17151 + * Revision 1.2 1999/08/05 19:42:56 liang
17152 + * Merged with the softmodem top of the tree on 08/04/99 for assembly files.
17154 + * Revision 1.1 1999/01/27 22:10:12 liang
17155 + * Initial version.
17157 + * Revision 1.1 1997/07/10 01:18:45 mwg
17158 + * Initial revision.
17162 + *****************************************************************************/
17163 +#ifndef _MISC_UTIL_H_
17164 +#define _MISC_UTIL_H_
17166 +extern long SM_DECL GetRateValue(dataRateMap rate);
17167 +extern int SM_DECL DecToString(ulong value, uchar *dstPtr, uint nDigits);
17168 +extern int SM_DECL HexToString(ulong value, uchar *dstPtr, uint nDigits);
17169 +extern char * SM_DECL DecToStr(char *s, ulong num);
17170 +extern char * SM_DECL SignedToStr(char *s, long num);
17171 +extern char * SM_DECL HexToStr(char *s, ulong num);
17173 +#define EvenParityBit(x) ((z = (y = x ^ (x >> 4)) ^ (y >> 2)) ^ (z >> 1))
17174 +#define OddParityBit(x) (EvenParityBit(x) ^ 1)
17176 +extern void ParityApply(int nBytes, int nDataBits, int parity, uchar *srcPtr, uchar *dstPtr);
17177 +extern void ParityStrip(int nBytes, int nDataBits, int parity, uchar *srcPtr, uchar *dstPtr, statusHandlerType statusHandler);
17180 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/Que.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/Que.h
17181 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/Que.h 1970-01-01 01:00:00.000000000 +0100
17182 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/Que.h 2006-06-26 09:07:10.000000000 +0200
17185 +<:copyright-broadcom
17187 + Copyright (c) 2002 Broadcom Corporation
17188 + All Rights Reserved
17189 + No portions of this material may be reproduced in any form without the
17190 + written permission of:
17191 + Broadcom Corporation
17192 + 16215 Alton Parkway
17193 + Irvine, California 92619
17194 + All information contained in this document is Broadcom Corporation
17195 + company private, proprietary, and trade secret.
17199 +/****************************************************************************
17204 + * Definition and implementation (via macros and inline functions)
17205 + * of a simple queue
17207 + * Copyright (c) 1993-1998 AltoCom, Inc. All rights reserved.
17208 + * Authors: Ilya Stomakhin
17210 + *****************************************************************************/
17212 +#ifndef QueHeader_H_
17213 +#define QueHeader_H_
17215 +typedef void * _QueItem;
17217 +typedef struct _QueHeader
17219 + _QueItem *head; /* first item in the queue */
17220 + _QueItem *tail; /* last item in the queue */
17223 +/* Queue management macros */
17225 +#define QueInit(pqHdr) (((QueHeader *)(pqHdr))->head = ((QueHeader *)(pqHdr))->tail = NULL)
17226 +#define QueEmpty(pqHdr) (NULL == ((QueHeader *)(pqHdr))->head)
17228 +#define QueFirst(pqHdr) ((QueHeader *)(pqHdr))->head
17229 +#define QueLast(pqHdr) ((QueHeader *)(pqHdr))->tail
17230 +#define QueNext(pqItem) (*((void **)(pqItem)))
17233 +#define QueRemoveFirst(pqHdr) do { \
17234 + if (!QueEmpty(pqHdr)) { \
17235 + ((QueHeader *)(pqHdr))->head = *((QueHeader *)(pqHdr))->head; \
17236 + if (QueEmpty(pqHdr)) \
17237 + ((QueHeader *)(pqHdr))->tail = NULL; \
17240 +#define QueRemove(pqHdr) QueRemoveFirst(pqHdr)
17243 +#define QueAddLast(pqHdr,pqItem) do { \
17244 + QueNext(pqItem) = NULL; \
17245 + if (NULL != ((QueHeader *)(pqHdr))->tail) \
17246 + *((QueHeader *)(pqHdr))->tail = (pqItem); \
17248 + ((QueHeader *)(pqHdr))->head = (_QueItem *)(pqItem); \
17249 + ((QueHeader *)(pqHdr))->tail = (_QueItem *)(pqItem); \
17251 +#define QueAdd(pqHdr,pItem) QueAddLast(pqHdr,pItem)
17253 +#define QueAddFirst(pqHdr,pqItem) do { \
17254 + if (NULL == ((QueHeader *)(pqHdr))->tail) \
17255 + ((QueHeader *)(pqHdr))->tail = (_QueItem *)(pqItem); \
17256 + QueNext(pqItem) = ((QueHeader *)(pqHdr))->head; \
17257 + ((QueHeader *)(pqHdr))->head = (_QueItem *)(pqItem); \
17261 +#define QueGet(pqHdr) \
17262 + (void *) QueFirst(pqHdr); \
17263 + QueRemove(pqHdr);
17265 +#define QueMerge(pqHdr1,pqHdr2) do { \
17266 + if (NULL == ((QueHeader *)(pqHdr1))->tail) \
17267 + ((QueHeader *)(pqHdr1))->head = ((QueHeader *)(pqHdr2))->head; \
17269 + QueNext(((QueHeader *)(pqHdr1))->tail) = ((QueHeader *)(pqHdr2))->head; \
17270 + if (NULL != ((QueHeader *)(pqHdr2))->tail) \
17271 + ((QueHeader *)(pqHdr1))->tail = ((QueHeader *)(pqHdr2))->tail; \
17274 +#define QueCopy(pqHdr1,pqHdr2) do { \
17275 + ((QueHeader *)(pqHdr1))->head = ((QueHeader *)(pqHdr2))->head; \
17276 + ((QueHeader *)(pqHdr1))->tail = ((QueHeader *)(pqHdr2))->tail; \
17279 +#define QueForEach(pqHdr,f,ref) do { \
17280 + _QueItem *p = ((QueHeader *)(pqHdr))->head; \
17282 + while (NULL != p) { \
17283 + if ( (f)((void *)p, ref) ) break; \
17284 + p = QueNext(p); \
17288 +#endif /* QueHeader_H_ */
17290 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/SoftAtmVc.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/SoftAtmVc.h
17291 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/SoftAtmVc.h 1970-01-01 01:00:00.000000000 +0100
17292 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/SoftAtmVc.h 2006-06-26 09:07:10.000000000 +0200
17295 +<:copyright-broadcom
17297 + Copyright (c) 2002 Broadcom Corporation
17298 + All Rights Reserved
17299 + No portions of this material may be reproduced in any form without the
17300 + written permission of:
17301 + Broadcom Corporation
17302 + 16215 Alton Parkway
17303 + Irvine, California 92619
17304 + All information contained in this document is Broadcom Corporation
17305 + company private, proprietary, and trade secret.
17309 +/****************************************************************************
17314 + * This file contains ATM VC definitions
17317 + * Copyright (c) 1993-1998 AltoCom, Inc. All rights reserved.
17318 + * Authors: Ilya Stomakhin
17320 + * $Revision: 1.27 $
17322 + * $Id: SoftAtmVc.h,v 1.27 2004/06/02 22:26:17 ilyas Exp $
17324 + * $Log: SoftAtmVc.h,v $
17325 + * Revision 1.27 2004/06/02 22:26:17 ilyas
17326 + * Added ATM counters for G.992.3
17328 + * Revision 1.26 2004/03/10 22:57:20 ilyas
17329 + * Added I.432 scramling control
17331 + * Revision 1.25 2003/09/23 00:21:59 ilyas
17332 + * Added status to indicate ATM header compression
17334 + * Revision 1.24 2003/08/27 02:00:50 ilyas
17335 + * Original implementation of ATM header compression
17337 + * Revision 1.23 2003/02/25 04:13:15 ilyas
17338 + * Added standard Broadcom header
17340 + * Revision 1.22 2003/01/10 23:25:48 ilyas
17341 + * Added ATM status definition
17343 + * Revision 1.21 2002/09/12 21:07:19 ilyas
17344 + * Added HEC, OCD and LCD counters
17346 + * Revision 1.20 2002/04/02 09:58:00 ilyas
17347 + * Initial implementatoin of BERT
17349 + * Revision 1.19 2001/10/09 22:35:14 ilyas
17350 + * Added more ATM statistics and OAM support
17352 + * Revision 1.18 2001/06/18 19:49:36 ilyas
17353 + * Changes to include support for HOST_ONLY mode
17355 + * Revision 1.17 2001/02/23 05:49:57 ilyas
17356 + * Added routed 1483 encapsulation
17358 + * Revision 1.16 2001/02/09 04:18:18 ilyas
17359 + * Added framer for bridged ethernet PDUs
17361 + * Revision 1.15 2001/02/09 01:55:27 ilyas
17362 + * Added status codes and macros to support printing of AAL packets
17364 + * Revision 1.14 2000/09/21 17:28:35 ilyas
17365 + * Added VBR support to traffic management code, separated UBR to a different
17366 + * Tx list, changed some of the algorithms
17368 + * Revision 1.13 2000/08/23 18:42:13 ilyas
17369 + * Added AAL2, added VcConfigure functions, moved commonly used look-up
17370 + * tables for CRC calculation to AtmLayer
17372 + * Revision 1.12 2000/08/02 03:06:22 ilyas
17373 + * Added support for reserving space in RX packets for ATm protocols
17375 + * Revision 1.11 2000/07/28 17:23:39 ilyas
17376 + * Added ATM connect/disconnect statuses
17378 + * Revision 1.10 2000/07/25 02:16:12 ilyas
17379 + * Added EClip (with Eth to ATM ARP translation) implementation
17381 + * Revision 1.9 2000/07/23 20:57:14 ilyas
17382 + * Added ATM framer and protocol layers
17384 + * Revision 1.8 2000/07/17 21:08:16 lkaplan
17385 + * removed global pointer
17387 + * Revision 1.7 2000/06/09 18:33:04 liang
17388 + * Fixed Irix compiler warnings.
17390 + * Revision 1.6 2000/05/18 21:47:31 ilyas
17391 + * Added detection of preassigned cells such as OAM F4, F5
17393 + * Revision 1.5 2000/05/14 01:50:11 ilyas
17394 + * Added more statuses to ATM code
17396 + * Revision 1.4 2000/05/10 02:41:28 liang
17397 + * Added status report for no cell memory
17399 + * Revision 1.3 2000/05/09 23:00:27 ilyas
17400 + * Added ATM status messages, ATM timer, Tx frames flush on timeout
17401 + * Fixed a bug - adding flushed Tx frames to the list of free Rx frames
17403 + * Revision 1.2 2000/05/03 03:53:00 ilyas
17404 + * Added support for pVc to vcID translation needed for LOG file and other
17405 + * definitions for ATM data in LOG file
17407 + * Revision 1.1 2000/04/19 00:21:35 ilyas
17408 + * Fixed some problems and added Out Of Band (OOB) support to ATM packets
17411 + *****************************************************************************/
17413 +#ifndef SoftAtmVcHeader
17414 +#define SoftAtmVcHeader
17422 +#define AtmLinkFlags(bMap,name) (((bMap) >> name##Shift) & name##Mask)
17424 +/* ATM service category types */
17426 +#define kAtmSrvcCBR 1 /* Constant Bit Rate */
17427 +#define kAtmSrvcVBR 2 /* Variable Bit Rate */
17428 +#define kAtmSrvcUBR 4 /* Unspecified Bit Rate */
17429 +#define kAtmSrvcABR 8 /* Available Bit Rate */
17430 +#define kAtmSrvcUnknown 0xFF
17432 +/* ATM AAL types (as encoded at UNI) */
17434 +#define kAtmAalIE 0x58
17437 +#define kAtmAal1 1
17438 +#define kAtmAal2 2
17439 +#define kAtmAal34 3
17440 +#define kAtmAal5 5
17441 +#define kAtmAalUser 16
17442 +#define kAtmAalUnknown 0xFF
17444 +/* ATM AAL1 parameters */
17446 +#define kAal1SubTypeId 0x85
17448 +#define kAal1TransportShift 0
17449 +#define kAal1TransportMask 0x7
17451 +#define kAal1NullTransport 0
17452 +#define kAal1VoiceTransport 1
17453 +#define kAal1CircuitTransport 2
17454 +#define kAal1AudioTransport 4
17455 +#define kAal1VideoTransport 5
17458 +#define kAal1CBRId 0x86
17460 +#define kAal1CBRShift 24
17461 +#define kAal1CBRMask 0xFF
17463 +#define kAal1CBR64 1
17464 +#define kAal1CBR1544 4 /* DS1 */
17465 +#define kAal1CBR6312 5 /* DS2 */
17466 +#define kAal1CBR32064 6
17467 +#define kAal1CBR44736 7 /* DS3 */
17468 +#define kAal1CBR97728 8
17469 +#define kAal1CBR2048 0x10 /* E1 */
17470 +#define kAal1CBR8448 0x11 /* E2 */
17471 +#define kAal1CBR34368 0x12 /* E3 */
17472 +#define kAal1CBR139264 0x13
17473 +#define kAal1CBR64xN 0x40
17474 +#define kAal1CBR8xN 0x41
17477 +#define kAal1MultiplierId 0x87
17479 +#define kAal1ClockRecoveryId 0x88
17481 +#define kAal1ClockRecoveryShift 3
17482 +#define kAal1ClockRecoveryMask 0x3
17484 +#define kAal1ClockRecoveryNull 1 /* synchronous transport */
17485 +#define kAal1ClockRecoverySRTS 1 /* asynchronous transport */
17486 +#define kAal1ClockRecoveryAdaptive 2
17489 +#define kAal1ECMId 0x89 /* Error correction method */
17491 +#define kAal1ECMShift (kAal1ClockRecoveryShift + 2)
17492 +#define kAal1ECMMask 0x3
17494 +#define kAal1ECMNull 0
17495 +#define kAal1ECMLossSensitive 1
17496 +#define kAal1ECMDelaySensitive 2
17499 +#define kAal1SDTBlockSizeId 0x8A
17501 +#define kAal1CellFillId 0x8B
17503 +/* ATM AAL34 and AAL5 parameters */
17505 +#define kAalFwdMaxSDUSizeId 0x8C
17506 +#define kAalBacMaxkSDUSizeId 0x81
17508 +#define kAal34MidRangeId 0x82
17510 +#define kAalSSCSTypeId 0x84
17512 +#define kAalSSCSAssured 1
17513 +#define kAalSSCSNonAssured 2
17514 +#define kAalSSCSFrameRelay 4
17516 +/* ATM AAL2 parameters */
17518 +#define kAal2SSNone 0
17519 +#define kAal2SSSAR 1
17520 +#define kAal2SSTED 2
17521 +#define kAal2SSSARMask 3
17522 +#define kAal2SSType1 4
17523 +#define kAal2SSType3 5
17529 + bitMap aal1Flags;
17535 + ushort fwdMaxCpSize; /* Max "common part" packet size */
17536 + ushort backMaxCpSize;
17539 + ushort fwdMaxSsSize; /* Max "service specific" packet size */
17540 + ushort backMaxSsSize;
17544 + ushort fwdMaxSDUSize;
17545 + ushort backMaxSDUSize;
17551 + ushort fwdMaxSDUSize;
17552 + ushort backMaxSDUSize;
17558 +/* ATM Traffic Descriptor types (as encoded at UNI) */
17560 +#define kAtmTrafficIE 0x59
17562 +#define kTrafficFwdPeakCellRateId0 0x82
17563 +#define kTrafficBackPeakCellRateId0 0x83
17564 +#define kTrafficFwdPeakCellRateId 0x84
17565 +#define kTrafficBackPeakCellRateId 0x85
17567 +#define kTrafficFwdSustainCellRateId0 0x88
17568 +#define kTrafficBackSustainCellRateId0 0x89
17569 +#define kTrafficFwdSustainCellRateId 0x90
17570 +#define kTrafficBackSustainCellRateId 0x91
17572 +#define kTrafficFwdMaxBurstSizeId0 0xA0
17573 +#define kTrafficBackMaxBurstSizeId0 0xA1
17574 +#define kTrafficFwdMaxBurstSizeId 0xB0
17575 +#define kTrafficBackMaxBurstSizeId 0xB1
17577 +#define kTrafficBestEffortId 0xBE
17578 +#define kTrafficMgrOptionsId 0xBF
17580 +#define kTrafficMaxTolerance 0x7FFFFFFF
17582 +/* trafficFlags coding */
17584 +#define kTrafficTagFwd 1
17585 +#define kTrafficTagBack 2
17586 +#define kTrafficBestEffort 4
17589 + ulong tPCR0; /* CLP = 0, time between cells in us */
17590 + ulong tPCR; /* CLP = 0+1 */
17591 + ulong tolPCR; /* tolerance for PCR in us */
17593 + ulong tSCR0; /* CLP = 0 */
17594 + ulong tSCR; /* CLP = 0+1 */
17595 + ulong tolSCR; /* tolerance for SCR in us */
17597 + uchar atmServiceType; /* CBR, VBR, UBR, etc. */
17598 + uchar trafficFlags;
17599 +} atmTrafficParams;
17601 +/* ATM Broadband Bearer Capabilty (BBC) types (as encoded at UNI) */
17603 +#define kAtmBBCIE 0x5E
17605 +#define kBBCClassShift 0
17606 +#define kBBCClassMask 0x1F
17608 +#define kBBCClassA 0x1
17609 +#define kBBCClassC 0x3
17610 +#define kBBCClassX 0x10
17613 +#define kBBCTrafficShift (kBBCClassShift + 5)
17614 +#define kBBCTrafficMask 0x7
17616 +#define kBBCTrafficNull 0
17617 +#define kBBCTrafficCBR 1
17618 +#define kBBCTrafficVBR 2
17621 +#define kBBCTimingShift (kBBCTrafficShift + 3)
17622 +#define kBBCTimingMask 0x3
17624 +#define kBBCTimingNull 0
17625 +#define kBBCTimingRequired 1
17626 +#define kBBCTimingNotRequired 2
17629 +#define kBBCClippingShift (kBBCTimingShift + 2)
17630 +#define kBBCClippingMask 0x3
17632 +#define kBBCNoClipping 0
17633 +#define kBBCClippingOk 1
17635 +#define kBBCConnectionShift (kBBCClippingShift + 2)
17636 +#define kBBCConnectionMask 0x3
17638 +#define kBBCPoint2Point 0
17639 +#define kBBCPoint2MPoint 1
17641 +/* ATM Broadband High/Low Layer Information (BHLI/BLLI) types (as encoded at UNI) */
17643 +#define kAtmBHLIIE 0x5D
17644 +#define kAtmBLLIIE 0x5F
17646 +/* ATM QoS types (as encoded at UNI) */
17648 +#define kAtmQoSIE 0x5C
17650 +#define kQoSNull 0
17651 +#define kQoSClass1 1
17652 +#define kQoSClass2 2
17653 +#define kQoSClass3 3
17654 +#define kQoSClass4 4
17655 +#define kQoSReserved 0xFF
17658 + uchar fwdQoSClass;
17659 + uchar backQoSClass;
17662 +/* ATM MID definitions (ConfigureHandler) */
17664 +#define kAtmMidEntireVc ((ulong) -1)
17667 + void *pUserVc; /* VC id from the caller: has to be 1st !!! */
17669 + uchar defaultCLP; /* default CLP for tx packets on this VC */
17672 + uchar protoRxBytesReserved; /* # bytes reserved by protocol in the beginning of Rx packet */
17673 + uchar protoTxBytesReserved; /* # bytes reserved by protocol in the beginning of Tx packet */
17675 + atmAalParams aalParams;
17676 + atmTrafficParams rxTrafficParams;
17677 + atmTrafficParams txTrafficParams;
17679 + atmQoSParams qosParams;
17684 +** ATM Out of Band (OOB) packet information
17689 + Boolean clp; /* Cell Loss Prioroty */
17693 + uchar payloadType;
17696 + uchar payloadType;
17700 + uchar uui; /* Uses to user indicator */
17701 + uchar cpi; /* common part indicator */
17704 +} atmOobPacketInfo;
17708 +** ATM setup bit definition
17712 +#define kAtmCorrectHecErrors 1
17713 +#define kCorrectHecErrors kAtmCorrectHecErrors
17714 +#define kAtmPhyHeaderCompression 2
17715 +#define kAtmPhyNoDataScrambling 4
17717 +#define kAtmTxIdleTimeoutMask 0x6
17718 +#define kAtmTxIdleNoTimeout 0
17719 +#define kAtmTxIdleTimeout10s 2
17720 +#define kAtmTxIdleTimeout30s 4
17721 +#define kAtmTxIdleTimeout60s 6
17725 +** ATM framer modes and protocol definitions
17729 +#define kAtmFramerNone 0
17730 +#define kAtmFramerISO 1
17731 +#define kAtmFramerIP 2
17732 +#define kAtmFramerEth 3
17733 +#define kAtmFramerEthWithCRC 4
17735 +#define kAtmProtoNone 0
17736 +#define kAtmProtoEClip 1
17737 +#define kAtmProtoERouted1483 2
17738 +#define kAtmProtoPPP 3
17743 +** ATM status codes
17747 +typedef void (*atmStatusHandler) (void *gDslVars, ulong statusCode, ...);
17749 +/* physical layer I.432 */
17751 +#define kAtmStatRxHunt 1
17752 +#define kAtmStatRxPreSync 2
17753 +#define kAtmStatRxSync 3
17754 +#define kAtmStatRxPlOamCell 4
17755 +#define kAtmStatBertResult 5
17756 +#define kAtmStatHec 6
17757 +#define kAtmStatHdrCompr 7
17758 +#define kAtmStatCounters 8
17762 +#define kAtmLayerStatFirst 100
17763 +#define kAtmStatRxDiscarded 100
17764 +#define kAtmStatTxDelayed 101
17766 +#define kAtmStatVcCreated 102
17767 +#define kAtmStatVcStarted 103
17768 +#define kAtmStatVcStopped 104
17769 +#define kAtmStatVcDeleted 105
17771 +#define kAtmStatTimeout 106
17772 +#define kAtmStatNoCellMemory 107
17773 +#define kAtmStatPrintCell 108
17774 +#define kAtmStatInvalidCell 109
17775 +#define kAtmStatUnassignedCell 110
17776 +#define kAtmStatOamF4SegmentCell 111
17777 +#define kAtmStatOamF4End2EndCell 112
17778 +#define kAtmStatOamI371Cell 113
17779 +#define kAtmStatOamF5SegmentCell 114
17780 +#define kAtmStatOamF5End2EndCell 115
17781 +#define kAtmStatReservedCell 116
17783 +#define kAtmStatConnected 117
17784 +#define kAtmStatDisconnected 118
17786 +#define kAtmStatRxPacket 119
17787 +#define kAtmStatTxPacket 120
17789 +#define kAtmStatOamLoopback 121
17792 +typedef struct _atmPhyCounters {
17794 + ushort bertStatus;
17795 + ulong bertCellTotal;
17796 + ulong bertCellCnt;
17797 + ulong bertBitErrors;
17800 + ulong rxCellTotal;
17801 + ulong rxCellData;
17802 + ulong rxCellDrop;
17811 +** ATM log file definitions
17815 +/* ATM log file flags */
17817 +#define kAtmLogFrameFlagMask 3 /* mask */
17819 +#define kAtmLogFrameFlagNone 0 /* nothing */
17820 +#define kAtmLogFrameFlagNoData 1 /* no data only frame size */
17821 +#define kAtmLogFrameFlagBinData 2 /* data in binary form */
17822 +#define kAtmLogFrameFlagTextData 3 /* data in text form */
17824 +#define kAtmLogSendFrameShift 0
17825 +#define kAtmLogSendFrameNoData (kAtmLogFrameFlagNoData << kAtmLogSendFrameShift)
17826 +#define kAtmLogSendFrameBinData (kAtmLogFrameFlagBinData << kAtmLogSendFrameShift)
17827 +#define kAtmLogSendFrameTextData (kAtmLogFrameFlagTextData << kAtmLogSendFrameShift)
17829 +#define kAtmLogRcvFrameShift 2
17830 +#define kAtmLogRcvFrameNone (kAtmLogFrameFlagNone << kAtmLogRcvFrameShift)
17831 +#define kAtmLogRcvFrameNoData (kAtmLogFrameFlagNoData << kAtmLogRcvFrameShift)
17832 +#define kAtmLogRcvFrameBinData (kAtmLogFrameFlagBinData << kAtmLogRcvFrameShift)
17833 +#define kAtmLogRcvFrameTextData (kAtmLogFrameFlagTextData << kAtmLogRcvFrameShift)
17835 +#define kAtmLogSendCompleteFrameShift 4
17836 +#define kAtmLogSendCompleteFrameNone (kAtmLogFrameFlagNone << kAtmLogSendCompleteFrameShift)
17837 +#define kAtmLogSendCompleteFrameNoData (kAtmLogFrameFlagNoData << kAtmLogSendCompleteFrameShift)
17839 +#define kAtmLogReturnFrameShift 6
17840 +#define kAtmLogReturnFrameNoData (kAtmLogFrameFlagNoData << kAtmLogReturnFrameShift)
17842 +#define kAtmLogCellFlag (1 << 8)
17844 +/* ATM log codes */
17846 +#define kAtmLogSendFrame 1
17847 +#define kAtmLogRcvFrame 2
17848 +#define kAtmLogSendFrameComplete 3
17849 +#define kAtmLogReturnFrame 4
17850 +#define kAtmLogVcAllocate 5
17851 +#define kAtmLogVcFree 6
17852 +#define kAtmLogVcActivate 7
17853 +#define kAtmLogVcDeactivate 8
17854 +#define kAtmLogTimer 9
17855 +#define kAtmLogCell 10
17856 +#define kAtmLogVcConfigure 11
17858 +#define kAtmLogRxCellHeader 12
17859 +#define kAtmLogRxCellData 13
17860 +#define kAtmLogTxCell 14
17862 +#endif /* SoftAtmVcHeader */
17863 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/SoftDsl.gh linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/SoftDsl.gh
17864 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/SoftDsl.gh 1970-01-01 01:00:00.000000000 +0100
17865 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/SoftDsl.gh 2006-06-26 09:07:10.000000000 +0200
17867 +/****************************************************************************
17872 + * This is a header file which defines the type for the DSL
17873 + * global variable structure.
17875 + * Copyright (c) 1993-1997 AltoCom, Inc. All rights reserved.
17876 + * Authors: Ilya Stomakhin
17878 + * $Revision: 1.72 $
17880 + * $Id: SoftDsl.gh,v 1.72 2004/04/30 23:05:19 kdu Exp $
17882 + * $Log: SoftDsl.gh,v $
17883 + * Revision 1.72 2004/04/30 23:05:19 kdu
17884 + * Fixed interop issues in TDC lab for TMM.
17886 + * Revision 1.70 2004/04/10 23:30:48 ilyas
17887 + * Defined gloval structure for slow (SDRAM) data
17889 + * Revision 1.69 2004/04/02 18:33:45 gsyu
17890 + * Share MuxFramer buffers with scratch memory
17892 + * Revision 1.68 2004/02/04 20:12:38 linyin
17893 + * Support adsl2plus
17895 + * Revision 1.67 2004/02/03 19:10:37 gsyu
17896 + * Added separated carrierInfo structures for G992P5
17898 + * Revision 1.66 2004/01/26 04:21:06 yongbing
17899 + * Merge changes in ADSL2 branch into Annex A branch
17901 + * Revision 1.65 2004/01/13 19:12:07 gsyu
17902 + * Added two more variables for Double upstream
17904 + * Revision 1.64 2003/12/04 02:10:37 linyin
17905 + * Add a variable for FbmsOL mode
17907 + * Revision 1.63 2003/11/20 00:57:50 yongbing
17908 + * Merge ADSL2 functionalities into Annex A branch
17910 + * Revision 1.62 2003/11/05 01:59:12 liang
17911 + * Add vendor ID code for Infineon.
17913 + * Revision 1.61 2003/08/12 22:59:41 khp
17914 + * - for Haixiang: added support for ADSL_MARGIN_TWEAK_TEST
17916 + * Revision 1.60 2003/08/01 00:08:19 liang
17917 + * Added firmware ID for Samsung ADI 930 DSLAM.
17919 + * Revision 1.59 2003/07/14 14:40:08 khp
17920 + * - AnnexB: added bad SNR2 retrain counter to connectin setup
17922 + * Revision 1.58 2003/06/25 02:40:22 liang
17923 + * Added firmware ID for Annex A UE9000 ADI918 (from Aliant, Canada).
17925 + * Revision 1.57 2003/06/25 00:00:40 ilyas
17926 + * -added firmware IDs for TI 4000C and AC5 (Annex B)
17928 + * Revision 1.56 2003/05/31 01:50:38 khp
17929 + * -add firmware IDs for ECI16 and ECI16A
17931 + * Revision 1.55 2003/03/27 19:30:52 liang
17932 + * Add and initialize new connectionSetup field coVendorFirmwareID under module ADSL_IDENTIFY_VENDOR_FIRMWARE.
17934 + * Revision 1.54 2002/12/13 18:35:48 yongbing
17935 + * Add support for G.992.2 Annex C in start up
17937 + * Revision 1.53 2002/12/06 02:06:33 liang
17938 + * Moved the T1.413 RAck1/RAck2 switching variables to connection setup structure.
17940 + * Revision 1.52 2002/11/26 02:49:46 liang
17941 + * Added variable codingGainDecrement to the connectionSetup structure to solve the C-Rates-RA option failure problem.
17943 + * Revision 1.51 2002/10/20 18:56:16 khp
17945 + * - #ifdef NEC_NSIF_WORKAROUND:
17946 + * - add status and fail counter for NSIF
17948 + * Revision 1.50 2002/09/28 02:36:50 yongbing
17949 + * Add retrain in T1.413 with R-Ack1 tone
17951 + * Revision 1.49 2002/09/12 21:07:19 ilyas
17952 + * Added HEC, OCD and LCD counters
17954 + * Revision 1.48 2002/07/19 01:51:35 liang
17955 + * Added vendor ID constant for Alcatel.
17957 + * Revision 1.47 2002/06/27 21:51:08 liang
17958 + * Added xmt and rcv tone selection bitmap in connection setup.
17960 + * Revision 1.46 2002/06/11 20:48:06 liang
17961 + * Added CO vendor ID field to connectionSetup structure.
17963 + * Revision 1.45 2002/06/06 03:05:43 khp
17964 + * -use boolean in connectup setup instead of localCapabilities.features to indicate FBM mode
17966 + * Revision 1.44 2002/03/22 19:38:58 yongbing
17967 + * Modify for co-exist of G994P1 and T1P413
17969 + * Revision 1.43 2002/03/02 00:52:40 ilyas
17970 + * AnnexC delay needs to be long for prototype
17972 + * Revision 1.42 2002/01/19 23:59:17 ilyas
17973 + * Added support for LOG and eye data to ADSL core target
17975 + * Revision 1.41 2002/01/16 19:03:59 ilyas
17976 + * Added HOST_ONLY ifdefs around ADSL core data
17978 + * Revision 1.40 2002/01/14 17:41:04 liang
17979 + * Move xmt & rcv sample buffers to top level.
17981 + * Revision 1.39 2001/12/21 22:45:34 ilyas
17982 + * Added support for ADSL MIB data object
17984 + * Revision 1.38 2001/12/13 02:24:22 ilyas
17985 + * Added G997 (Clear EOC and G997 framer) support
17987 + * Revision 1.37 2001/11/30 05:56:31 liang
17988 + * Merged top of the branch AnnexBDevelopment onto top of the tree.
17990 + * Revision 1.36 2001/10/19 00:12:07 ilyas
17991 + * Added support for frame oriented (no ATM) data link layer
17993 + * Revision 1.29.2.5 2001/10/03 01:44:00 liang
17994 + * Merged with codes from main tree (tag SoftDsl_2_18).
17996 + * Revision 1.29.2.4 2001/08/18 00:00:36 georgep
17997 + * Add variable to store annexC pathDelay
17999 + * Revision 1.29.2.3 2001/08/08 17:33:27 yongbing
18000 + * Merge with tag SoftDsl_2_17
18002 + * Revision 1.35 2001/08/29 02:56:01 ilyas
18003 + * Added tests for flattening/unflatenning command and statuses (dual mode)
18005 + * Revision 1.34 2001/08/28 03:26:32 ilyas
18006 + * Added support for running host and adsl core parts separately ("dual" mode)
18008 + * Revision 1.33 2001/06/18 19:49:36 ilyas
18009 + * Changes to include support for HOST_ONLY mode
18011 + * Revision 1.32 2001/05/18 21:21:44 liang
18012 + * Save the current number of rcv samples to line handler for QProc test.
18014 + * Revision 1.31 2001/04/25 01:20:11 ilyas
18016 + * Don't use DSL frame functions if ATM_LAYER is not defined
18018 + * Revision 1.30 2001/03/25 06:11:20 liang
18019 + * Combined separate loop attenuation status for ATUR & ATUC into one status.
18020 + * Replace separate hardware AGC info status for ATUR & ATUC into hardware AGC
18021 + * request status and hardware AGC obtained status.
18022 + * Use store AGC command to save hardware AGC value instead of returning value
18023 + * from status report.
18025 + * Revision 1.29 2001/03/17 03:00:46 georgep
18026 + * Added agcInfo to connectionSetupStruct
18028 + * Revision 1.28 2001/02/10 03:03:09 ilyas
18029 + * Added one more DslFrame function
18031 + * Revision 1.27 2000/08/31 19:04:24 liang
18032 + * Added scratch buffer structure definition.
18034 + * Revision 1.26 2000/07/23 20:52:52 ilyas
18035 + * Added xxxFrameBufSetAddress() function for ATM framer layers
18036 + * Rearranged linkLayer functions in one structure which is passed as a
18037 + * parameter to xxxLinkLayerInit() function to be set there
18039 + * Revision 1.25 2000/07/18 21:42:25 ilyas
18040 + * Fixed compiler warning about pointer casting
18042 + * Revision 1.24 2000/07/18 21:18:45 ilyas
18043 + * Added GLOBAL_PTR_BIAS feature to utilize full 64K MIPS relative addressing space
18045 + * Revision 1.23 2000/07/18 20:03:24 ilyas
18046 + * Changed DslFrame functions definitions to macros,
18047 + * Removed gDslVars from their parameter list
18049 + * Revision 1.22 2000/07/17 21:08:15 lkaplan
18050 + * removed global pointer
18052 + * Revision 1.21 2000/05/09 23:00:26 ilyas
18053 + * Added ATM status messages, ATM timer, Tx frames flush on timeout
18054 + * Fixed a bug - adding flushed Tx frames to the list of free Rx frames
18056 + * Revision 1.20 2000/05/03 03:57:04 ilyas
18057 + * Added LOG file support for writing ATM data
18059 + * Revision 1.19 2000/04/19 00:31:47 ilyas
18060 + * Added global SoftDsl functions for Vc, added OOB info functions
18062 + * Revision 1.18 2000/04/13 08:36:22 yura
18063 + * Added SoftDslSetRefData, SoftDslGetRefData functions
18065 + * Revision 1.17 2000/04/13 05:38:54 georgep
18066 + * Added T1p413 "Activation and Acknowledgement" which can substitute G994P1
18068 + * Revision 1.16 2000/04/05 22:30:42 liang
18069 + * Changed function & constant names from G992p2 to G992 for the Main module.
18071 + * Revision 1.15 2000/04/04 04:16:06 liang
18072 + * Merged with SoftDsl_0_03 from old tree.
18074 + * Revision 1.15 2000/04/04 01:47:21 ilyas
18075 + * Implemented abstract dslFrame and dslFrameBuffer objects
18077 + * Revision 1.14 2000/04/01 02:53:33 georgep
18078 + * Added pointer to G992p2Profile inside connectionSetup
18080 + * Revision 1.13 2000/03/18 01:27:56 georgep
18081 + * Changed connectionSetup to include G992p1 Capabilities
18083 + * Revision 1.12 2000/02/29 01:39:05 georgep
18084 + * put variable haveRemoteCapabilities inside connectionSetupStruct
18086 + * Revision 1.11 2000/02/08 00:44:36 liang
18087 + * Fix the gDslVars definition for Irix environment.
18089 + * Revision 1.10 1999/11/19 00:59:29 george
18090 + * Define physicalLayerVars as a union
18092 + * Revision 1.9 1999/11/11 19:19:42 george
18093 + * Porting to 16Bit Compiler
18095 + * Revision 1.8 1999/11/09 20:26:17 george
18096 + * Added G992P2_PROFILE to modules list
18098 + * Revision 1.7 1999/10/27 23:01:54 wan
18099 + * Add G.994.1 setup in dslConnectionSetupStruct for setting up Initiation side
18101 + * Revision 1.6 1999/08/12 21:16:27 george
18102 + * Move profileVars definition to G992p2/G992p2Profile.gh
18104 + * Revision 1.5 1999/08/10 18:20:43 george
18105 + * Define fastRetrainVars
18107 + * Revision 1.4 1999/07/16 02:03:02 liang
18108 + * Added Tx & Rx data handler function pointers.
18110 + * Revision 1.3 1999/07/03 01:40:15 liang
18111 + * Redefined dsl command parameter list and added connection setup struct.
18113 + * Revision 1.2 1999/02/10 01:56:37 liang
18114 + * Added hooks for G994.1 and G992.2.
18117 + *****************************************************************************/
18119 +#ifndef SoftDslGlobals
18120 +#define SoftDslGlobals
18122 +#include "SoftDsl.h"
18124 +#ifdef G992P2_PROFILE
18125 +#include "G992p2Profile.gh"
18130 + kVendorUnknown = 0,
18132 + kVendorGlobespan,
18135 + kVendorCentillium,
18140 +#define kDslVendorFirwareUnknown 0
18143 + kVendorADI_Anaconda = 1,
18144 + kVendorADI_ECI918,
18145 + kVendorADI_ECI930,
18146 + kVendorADI_Cisco,
18147 + kVendorADI_UE9000_918,
18148 + kVendorADI_Samsung_930,
18149 + kVendorTI_4000C_ERICSSON_350,
18150 + kVendorTI_4000C_SEIMENS,
18151 + kVendorADI_ECI16_AnnexB = 50, /* leave space for more Annex A types */
18152 + kVendorADI_ECI16A_AnnexB,
18153 + kVendorTI_4000C_AnnexB,
18154 + kVendorTI_AC5_AnnexB
18155 + } VendorFirmwareIDType;
18157 +#define kDslXmtToneSelectionStartTone 0
18158 +#ifdef G992P1_ANNEX_B
18159 +#define kDslXmtToneSelectionEndTone 63
18161 +#define kDslXmtToneSelectionEndTone 31
18163 +#define kDslXmtToneSelectionNumOfTones (kDslXmtToneSelectionEndTone-kDslXmtToneSelectionStartTone+1)
18164 +#define kDslXmtToneSelectionNumOfBytes ((kDslXmtToneSelectionNumOfTones+7)/8)
18165 +#define kDslRcvToneSelectionStartTone 32
18166 +#define kDslRcvToneSelectionEndTone 255
18167 +#define kDslRcvToneSelectionNumOfTones (kDslRcvToneSelectionEndTone-kDslRcvToneSelectionStartTone+1)
18168 +#define kDslRcvToneSelectionNumOfBytes ((kDslRcvToneSelectionNumOfTones+7)/8)
18170 +#define kDslT1p413RAckModeTryRAck1 0x01
18171 +#define kDslT1p413RAckModeTryRAck2 0x02
18172 +#define kDslT1p413RAckModeTrialMask 0x0F
18173 +#define kDslT1p413RAckModeSelected 0x10
18174 +#define kDslT1p413RAckModeTrialCount 10 /* when in trial mode */
18175 +#define kDslT1p413RAckModeSwitchCount 20 /* when mode is selected */
18177 +#ifdef ADSL_MARGIN_TWEAK_TEST
18178 +#define kDslMarginTweakNumOfTones 256
18183 + Boolean haveRemoteCapabilities;
18184 + dslModulationType selectedModulation;
18185 + dslModulationType startupModulation;
18186 +#if defined(G992P1_ANNEX_I) || defined(G992P5)
18187 + ushort downstreamMinCarr, downstreamMaxCarr;
18189 + uchar downstreamMinCarr, downstreamMaxCarr;
18191 + uchar upstreamMinCarr, upstreamMaxCarr;
18192 +#if defined(DOUBLE_UP_STREAM)
18193 + Boolean isDoubleUsEnabled;
18194 + short selectedPilotTone;
18196 + dslDataPumpCapabilities localCapabilities, remoteCapabilities;
18198 + g992p3DataPumpCapabilities localCarrierInfoG992p3AnnexA;
18199 + g992p3DataPumpCapabilities remoteCarrierInfoG992p3AnnexA;
18200 + g992p3DataPumpCapabilities selectedCarrierInfoG992p3AnnexA;
18201 + uchar xmtG992p3State;
18203 + g992p3DataPumpCapabilities localCarrierInfoG992p5AnnexA;
18204 + g992p3DataPumpCapabilities remoteCarrierInfoG992p5AnnexA;
18205 + g992p3DataPumpCapabilities selectedCarrierInfoG992p5AnnexA;
18206 +#endif /* G992P5 */
18207 +#endif /* G992P3 */
18208 + uchar handshakingDuplexMode;
18209 + Boolean handshakingClientInitiation;
18210 + short handshakingXmtPowerLevel;
18211 + uchar handshakingXmtCarrierSet;
18212 + short hwAgcQ4dB; /* for loop attenuation calculation */
18213 + uchar coVendorID;
18214 +#ifdef ADSL_IDENTIFY_VENDOR_FIRMWARE
18215 + uchar coVendorFirmwareID;
18217 + uchar codingGainDecrement; /* coding gain decrement in Q4dB for initial rate calculation */
18218 + uchar xmtToneSelection[kDslXmtToneSelectionNumOfBytes];
18219 + uchar rcvToneSelection[kDslRcvToneSelectionNumOfBytes];
18220 +#ifdef G992_ANNEXC
18221 + Boolean isFbmMode;
18222 + Boolean isFbmsOLMode;
18223 + long xmtToRcvPathDelay;
18225 +#if defined(T1P413) && defined(XMT_RACT2_FOR_ADI_COMPATIBILITY)
18226 + uchar t1p413RAckModeUsed;
18227 + uchar t1p413RAckModeCounter;
18229 +#ifdef G992P1_ANNEX_B
18230 + uchar badSNR2RetrainCounter;
18232 +#ifdef ADSL_MARGIN_TWEAK_TEST
18233 + short marginTweakExtraPowerQ4dB;
18234 + char marginTweakTableQ4dB[kDslMarginTweakNumOfTones];
18236 +#ifdef G992P2_PROFILE
18237 + G992p2ProfileVarsStruct* profileVarsPtr;
18239 +#ifdef TDC_IOP_FIX_SEIMENS_TI
18240 + char t1p413RetrainCounter; /* 0: no retrain needed; 1: force to T1.413 mode and retrain after R-MSG1; 2: 2nd T1.413 session, go to showtime */
18242 +#ifdef ANSI_CACT12_PING_PONG
18243 + char t1p413SkipToneIndex; /* to alternate between CAct1 and CAct2 detection */
18245 + } dslConnectionSetupStruct;
18247 +#ifdef ADSL_FRAMER
18248 +#include "MuxFramer.gh"
18252 +#include "SoftAtm.gh"
18256 +#include "DslPacket.gh"
18259 +#ifdef G997_1_FRAMER
18260 +#include "G997.gh"
18262 +#include "G992p3OvhMsg.gh"
18267 +#include "AdslMib.gh"
18272 +#include "T1p413Main.gh"
18276 +#include "G994p1Main.gh"
18280 +#include "G992Main.gh"
18283 +#include "SoftDslSampleBuffers.gh"
18286 +typedef struct __dslSlowVarsStruct
18290 + dslSlowVarsStruct;
18292 +typedef struct __dslVarsStruct
18295 + eyeHandlerType eyeHandlerPtr;
18296 + logHandlerType logHandlerPtr;
18297 + dslDriverCallbackType driverCallback;
18299 + rcvHandlerType rcvHandlerPtr;
18300 + xmtHandlerType xmtHandlerPtr;
18302 +#ifndef ADSLCORE_ONLY
18303 + dslCommandHandlerType adslCoreCommandHandlerPtr;
18305 + dslCommandHandlerType dataPumpCommandHandlerPtr;
18307 + dslStatusHandlerType internalStatusHandlerPtr;
18308 + dslStatusHandlerType externalStatusHandlerPtr;
18309 +#ifndef ADSLCORE_ONLY
18310 + dslStatusHandlerType externalLinkLayerStatusHandlerPtr;
18313 + dslDirectionType direction;
18314 + dslConnectionSetupStruct connectionSetup;
18316 +#ifdef NEC_NSIF_WORKAROUND
18317 + uchar G994NsStatus;
18318 + uchar G994NsFailCounter;
18321 + dslFrameHandlerType rxIndicateHandlerPtr;
18322 + dslFrameHandlerType txCompleteHandlerPtr;
18324 + linkLayerFunctions LinkLayerFunctions;
18325 + dslSlowVarsStruct *dslSlowVars;
18327 +#ifdef DSL_FRAME_FUNCTIONS
18328 + dslFrameFunctions DslFrameFunctions;
18332 + int currRcvNSamps;
18335 + DslSampleBuffersStruct sampleBuffersVars;
18337 +#ifdef G992P2_PROFILE
18338 + G992p2ProfileVarsStruct G992p2ProfileVars;
18341 +#ifdef ADSL_FRAMER
18342 + muxFramerVarsStruct muxFramerVars;
18344 +#endif /* HOST_ONLY */
18346 +#ifdef DSL_LINKLAYER
18350 + atmVarsStruct atmVars;
18353 + dslPacketVarsStruct dslPacketVars;
18358 +#ifdef G997_1_FRAMER
18359 + g997VarsStruct G997Vars;
18361 + g992p3OvhMsgVarsStruct G992p3OvhMsgVars;
18366 + adslMibVarsStruct adslMibVars;
18373 + T1p413VarsStruct T1p413Vars;
18376 + G994p1VarsStruct G994p1Vars;
18379 + G992VarsStruct G992Vars;
18381 + } physicalLayerVars;
18385 + G992ScratchVarsStruct G992ScratchVars;
18387 +#if defined(ADSL_FRAMER) && defined(SHARE_MUX_FRAMER_VARS)
18388 + muxFramerSharedVarsStruct muxFramerSharedVars;
18391 +#endif /* HOST_ONLY */
18396 +#ifndef GLOBAL_PTR_BIAS
18397 +#define gDslGlobalVarPtr ((struct __dslVarsStruct *)gDslVars)
18398 +#define gDslGlobalSlowVarPtr (gDslGlobalVarPtr->dslSlowVars)
18400 +#define gDslGlobalVarPtr ((struct __dslVarsStruct *) (void*)((uchar*)(gDslVars) - GLOBAL_PTR_BIAS))
18401 +#define gDslGlobalSlowVarPtr ((struct __dslSlowVarsStruct *) (void*)((uchar*)(gDslGlobalVarPtr->dslSlowVars) - GLOBAL_PTR_BIAS))
18404 +#define gDslSampleBuffersVars (gDslGlobalVarPtr->sampleBuffersVars)
18406 +#define gDslMuxFramerVars (gDslGlobalVarPtr->muxFramerVars)
18407 +#define gDslMuxFramerSharedVars (gDslGlobalVarPtr->scratchVars.muxFramerSharedVars)
18408 +#define gDslLinkLayerVars (gDslGlobalVarPtr->linkLayerVars)
18409 +#define gDslAtmVars (gDslGlobalVarPtr->linkLayerVars.atmVars)
18410 +#define gDslPacketVars (gDslGlobalVarPtr->linkLayerVars.dslPacketVars)
18411 +#define gG997Vars (gDslGlobalVarPtr->G997Vars)
18414 +#define gG992p3OvhMsgVars (gDslGlobalVarPtr->G992p3OvhMsgVars)
18417 +#define gAdslMibVars (gDslGlobalVarPtr->adslMibVars)
18419 +#define gT1p413Vars (gDslGlobalVarPtr->physicalLayerVars.T1p413Vars)
18420 +#define gG994p1Vars (gDslGlobalVarPtr->physicalLayerVars.G994p1Vars)
18421 +#define gG992Vars (gDslGlobalVarPtr->physicalLayerVars.G992Vars)
18422 +#define gG992p2ProfileVars (gDslGlobalVarPtr->G992p2ProfileVars)
18424 +#define gG992ScratchVars (gDslGlobalVarPtr->scratchVars.G992ScratchVars)
18426 +#ifndef gEyeHandlerPtr
18427 +#define gEyeHandlerPtr (gDslGlobalVarPtr->eyeHandlerPtr)
18430 +#ifndef gLogHandlerPtr
18431 +#define gLogHandlerPtr (gDslGlobalVarPtr->logHandlerPtr)
18434 +#ifdef VP_SIMULATOR
18435 +#define gDriverCallback(x) (gDslGlobalVarPtr->driverCallback)(x)
18437 +#define gDriverCallback(x)
18442 +** Frame functions callouts
18446 +#define gDslFrameFunc (gDslGlobalVarPtr->DslFrameFunctions)
18448 +#define DslFrameBufferGetLength(gDslVars, fb) \
18449 + gDslFrameFunc.__DslFrameBufferGetLength(fb)
18451 +#define DslFrameBufferGetAddress(gDslVars, fb) \
18452 + gDslFrameFunc.__DslFrameBufferGetAddress(fb)
18454 +#define DslFrameBufferSetLength(gDslVars, fb, l) \
18455 + gDslFrameFunc.__DslFrameBufferSetLength(fb, l)
18457 +#define DslFrameBufferSetAddress(gDslVars, fb, p) \
18458 + gDslFrameFunc.__DslFrameBufferSetAddress(fb, p)
18460 +#define DslFrameInit(gDslVars, f) \
18461 + gDslFrameFunc.__DslFrameInit(f)
18463 +#define DslFrameGetLength(gDslVars, pFrame) \
18464 + gDslFrameFunc.__DslFrameGetLength(pFrame)
18466 +#define DslFrameGetBufCnt(gDslVars, pFrame) \
18467 + gDslFrameFunc.__DslFrameGetBufCnt(pFrame)
18469 +#define DslFrameGetFirstBuffer(gDslVars, pFrame) \
18470 + gDslFrameFunc.__DslFrameGetFirstBuffer(pFrame)
18472 +#define DslFrameGetNextBuffer(gDslVars, pFrBuffer) \
18473 + gDslFrameFunc.__DslFrameGetNextBuffer(pFrBuffer)
18475 +#define DslFrameSetNextBuffer(gDslVars, pFrBuf, pFrBufNext) \
18476 + gDslFrameFunc.__DslFrameSetNextBuffer(pFrBuf, pFrBufNext)
18478 +#define DslFrameGetLastBuffer(gDslVars, pFrame) \
18479 + gDslFrameFunc.__DslFrameGetLastBuffer(pFrame)
18481 +#define DslFrameGetLinkFieldAddress(gDslVars, f) \
18482 + gDslFrameFunc.__DslFrameGetLinkFieldAddress(f)
18484 +#define DslFrameGetFrameAddressFromLink(gDslVars, lnk) \
18485 + gDslFrameFunc.__DslFrameGetFrameAddressFromLink(lnk)
18488 +#define DslFrameGetOobInfo(gDslVars, f, pOobInfo) \
18489 + gDslFrameFunc.__DslFrameGetOobInfo(f, pOobInfo)
18491 +#define DslFrameSetOobInfo(gDslVars, f, pOobInfo) \
18492 + gDslFrameFunc.__DslFrameSetOobInfo(f, pOobInfo)
18495 +#define DslFrameEnqueBufferAtBack(gDslVars, f, b) \
18496 + gDslFrameFunc.__DslFrameEnqueBufferAtBack(f, b)
18498 +#define DslFrameEnqueFrameAtBack(gDslVars, fMain, f) \
18499 + gDslFrameFunc.__DslFrameEnqueFrameAtBack(fMain, f)
18501 +#define DslFrameEnqueBufferAtFront(gDslVars, f, b) \
18502 + gDslFrameFunc.__DslFrameEnqueBufferAtFront(f, b)
18504 +#define DslFrameEnqueFrameAtFront(gDslVars, fMain, f) \
18505 + gDslFrameFunc.__DslFrameEnqueFrameAtFront(fMain, f)
18507 +#define DslFrameDequeBuffer(gDslVars, pFrame) \
18508 + gDslFrameFunc.__DslFrameDequeBuffer(pFrame)
18510 +#define DslFrameAllocMemForFrames(gDslVars, frameNum) \
18511 + gDslFrameFunc.__DslFrameAllocMemForFrames(frameNum)
18513 +#define DslFrameFreeMemForFrames(gDslVars, hMem) \
18514 + gDslFrameFunc.__DslFrameFreeMemForFrames(hMem)
18516 +#define DslFrameAllocFrame(gDslVars, handle) \
18517 + gDslFrameFunc.__DslFrameAllocFrame(handle)
18519 +#define DslFrameFreeFrame(gDslVars, handle, pFrame) \
18520 + gDslFrameFunc.__DslFrameFreeFrame(handle, pFrame)
18522 +#define DslFrameAllocMemForBuffers(gDslVars, ppMemPool, bufNum, memSize) \
18523 + gDslFrameFunc.__DslFrameAllocMemForBuffers(ppMemPool, bufNum, memSize)
18525 +#define DslFrameFreeMemForBuffers(gDslVars, hMem, memSize, pMemPool) \
18526 + gDslFrameFunc.__DslFrameFreeMemForBuffers(hMem, memSize, pMemPool)
18528 +#define DslFrameAllocBuffer(gDslVars, handle, pMem, length) \
18529 + gDslFrameFunc.__DslFrameAllocBuffer(handle, pMem, length)
18531 +#define DslFrameFreeBuffer(gDslVars, handle, pBuf) \
18532 + gDslFrameFunc.__DslFrameFreeBuffer(handle, pBuf)
18534 +#define DslFrame2Id(gDslVars, handle, pFrame) \
18535 + gDslFrameFunc.__DslFrame2Id(handle, pFrame)
18537 +#define DslFrameId2Frame(gDslVars, handle, frameId) \
18538 + gDslFrameFunc.__DslFrameId2Frame (handle, frameId)
18541 +#endif /* SoftDslGlobals */
18542 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/SoftDsl.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/SoftDsl.h
18543 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/SoftDsl.h 1970-01-01 01:00:00.000000000 +0100
18544 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/SoftDsl.h 2006-06-26 09:07:10.000000000 +0200
18546 +/****************************************************************************
18552 + * This file contains the exported interface for SoftDsl.c
18555 + * Copyright (c) 1993-1998 AltoCom, Inc. All rights reserved.
18556 + * Authors: Ilya Stomakhin
18558 + * $Revision: 1.275 $
18560 + * $Id: SoftDsl.h,v 1.275 2005/04/28 22:55:36 ilyas Exp $
18562 + * $Log: SoftDsl.h,v $
18563 + * Revision 1.275 2005/04/28 22:55:36 ilyas
18564 + * Cleaned up kDslG992RunAnnexaP3ModeInAnnexaP5, kG992EnableAnnexM and kDslAtuChangeTxFilterRequest definitions
18566 + * Revision 1.274 2005/04/27 20:57:32 yongbing
18567 + * Implement 32 frequency break points for TSSI, PR 30211
18569 + * Revision 1.273 2005/04/02 03:27:52 kdu
18570 + * PR30236: Define kDslEnableRoundUpDSLoopAttn, this is shared with kDslCentilliumCRCWorkAroundEnabled.
18572 + * Revision 1.272 2005/04/01 21:56:39 ilyas
18573 + * Added more test commands definitions
18575 + * Revision 1.271 2005/02/11 05:03:57 ilyas
18576 + * Added support for DslOs
18578 + * Revision 1.270 2005/02/11 03:33:22 lke
18579 + * Support 2X, 4X, and 8X spectrum in ANNEX_I DS
18581 + * Revision 1.269 2005/01/08 00:11:58 ilyas
18582 + * Added definition for AnnexL status
18584 + * Revision 1.268 2004/12/18 00:52:35 mprahlad
18585 + * Add Dig US Pwr cutback status
18587 + * Revision 1.267 2004/11/08 22:21:38 ytan
18588 + * init swap state after retrain
18590 + * Revision 1.266 2004/11/05 21:16:50 ilyas
18591 + * Added support for pwmSyncClock
18593 + * Revision 1.265 2004/10/28 20:05:17 gsyu
18594 + * Fixed compilation errors for simulation targets
18596 + * Revision 1.264 2004/10/23 00:16:35 nino
18597 + * Added kDslHardwareSetRcvAGC status to set absolute rcv agc gain.
18599 + * Revision 1.263 2004/10/22 21:21:06 ilyas
18600 + * Fixed bit definition overlap in demodCapabilities
18602 + * Revision 1.262 2004/10/20 00:43:20 gsyu
18603 + * Added constants to support new xmt sample buffer control scheme
18605 + * Revision 1.261 2004/10/12 01:09:28 nino
18606 + * Remove kDslHardwareEnablePwmSyncClk and kDslHardwareSetPwmSyncClkFreq
18607 + * status definitions. Add kDslEnablePwmSyncClk and kDslSetPwmSyncClkFreq
18608 + * command definitions.
18610 + * Revision 1.260 2004/10/11 20:21:26 nino
18611 + * Added kDslHardwareEnablePwmSyncClk and kDslHardwareSetPwmSynClkFreq hardware statuses.
18613 + * Revision 1.259 2004/10/07 19:17:29 nino
18614 + * Added kDslHardwareGetRcvAGC status.
18616 + * Revision 1.258 2004/10/02 00:17:14 nino
18617 + * Added kDslHardwareAGCSetPga2 and kDslSetPilotEyeDisplay status definitions.
18619 + * Revision 1.257 2004/08/27 01:00:30 mprahlad
18621 + * Keep kDslAtuChangeTxFilterRequest defined by default so ADSL1 only targets can
18624 + * Revision 1.256 2004/08/20 19:00:34 ilyas
18625 + * Added power management code for 2+
18627 + * Revision 1.255 2004/08/17 23:18:25 kdu
18628 + * Merged interop changes for TDC lab from a023e9.
18630 + * Revision 1.254 2004/07/22 00:56:03 yongbing
18631 + * Add ADSL2 Annex B modulation definition
18633 + * Revision 1.253 2004/07/16 22:23:28 nino
18634 + * - Defined macros to extract subcarrier and supported set information
18635 + * for tssi. Subcarrier and suported set indicator is packed into
18636 + * dsSubcarrier index array.
18638 + * Revision 1.252 2004/07/01 00:11:22 nino
18639 + * Added preliminary code for debugDataHandler (inside of #if DEBUG_DATA_HANDLER).
18641 + * Revision 1.251 2004/06/24 03:08:39 ilyas
18642 + * Added GFC mapping control for ATM bonding
18644 + * Revision 1.250 2004/06/23 00:03:20 khp
18645 + * - shorten self test result register length to 1 (satisfied requirement
18646 + * at DT, no known requirement anywhere else)
18648 + * Revision 1.249 2004/06/15 20:18:33 ilyas
18649 + * Made D uchar again for compatibility with older ADSl drivers that use this structure. ADSL driver will rely on G992p3 parameters for large D
18651 + * Revision 1.248 2004/06/12 00:26:03 gsyu
18652 + * Added constants for AnnexM
18654 + * Revision 1.247 2004/06/10 18:53:24 yjchen
18655 + * add large D support
18657 + * Revision 1.246 2004/06/04 01:55:00 linyin
18658 + * Add a constant for SRA enable/disable
18660 + * Revision 1.245 2004/05/19 23:22:23 linyin
18663 + * Revision 1.244 2004/05/15 03:04:58 ilyas
18664 + * Added L3 test definition
18666 + * Revision 1.243 2004/05/14 03:04:38 ilyas
18667 + * Fixed structure name typo
18669 + * Revision 1.242 2004/05/14 02:01:01 ilyas
18670 + * Fixed structure name typo
18672 + * Revision 1.241 2004/05/14 01:21:49 nino
18673 + * Added kDslSignalAttenuation, kDslAttainableNetDataRate kDslHLinScale constant definitions.
18675 + * Revision 1.240 2004/05/13 19:07:58 ilyas
18676 + * Added new statuses for ADSL2
18678 + * Revision 1.239 2004/05/01 01:09:51 ilyas
18679 + * Added power management command and statuses
18681 + * Revision 1.238 2004/04/23 22:50:38 ilyas
18682 + * Implemented double buffering to ensure G.997 HDLC frame (OvhMsg) is continuous
18684 + * Revision 1.237 2004/03/31 18:57:39 ilyas
18685 + * Added drop on data error capability control
18687 + * Revision 1.236 2004/03/30 03:11:30 ilyas
18688 + * Added #ifdef for CFE build
18690 + * Revision 1.235 2004/03/29 23:06:39 ilyas
18691 + * Added status for BG table update
18693 + * Revision 1.234 2004/03/17 02:49:49 ilyas
18694 + * Turn off ATM bit reversal for Alcatel DSLAM only
18696 + * Revision 1.233 2004/03/11 03:09:48 mprahlad
18697 + * Add test mode for afeloopback test
18699 + * Revision 1.232 2004/03/10 23:15:53 ilyas
18700 + * Added ETSI modem support
18702 + * Revision 1.231 2004/03/04 19:28:14 linyin
18703 + * Support adsl2plus
18705 + * Revision 1.230 2004/02/28 00:06:21 ilyas
18706 + * Added OLR message definitions for ADSL2+
18708 + * Revision 1.229 2004/02/13 03:21:15 mprahlad
18709 + * define kDslAturHwAgcMaxGain correctly for 6348
18711 + * Revision 1.228 2004/02/09 05:06:17 yongbing
18712 + * Add ADSL2 bit swap function
18714 + * Revision 1.227 2004/02/04 02:08:19 linyin
18715 + * remove the redefined kG992p5AnnexA
18717 + * Revision 1.226 2004/02/04 01:41:48 linyin
18718 + * Add some variables for G992P5
18720 + * Revision 1.225 2004/02/03 19:12:22 gsyu
18721 + * Added a dedicate structure and constants for G992P5
18723 + * Revision 1.224 2004/01/24 01:18:34 ytan
18724 + * add multi-section swapping flag
18726 + * Revision 1.223 2004/01/17 00:21:48 ilyas
18727 + * Added commands and statuses for OLR
18729 + * Revision 1.222 2004/01/13 19:12:37 gsyu
18730 + * Added more constants for Double upstream
18732 + * Revision 1.221 2003/12/23 21:19:04 mprahlad
18733 + * Define BCM6348_TEMP_MOVE_TO_LMEM to FAST_TEXT for 6348 targets - this is for
18734 + * ADSL2/AnnexA multimode builds - move a few functions to Lmem for now to avoid
18735 + * changes for swap on 6348.
18737 + * Revision 1.220 2003/12/19 21:21:53 ilyas
18738 + * Added dying gasp support for ADSL2
18740 + * Revision 1.219 2003/12/05 02:09:51 mprahlad
18741 + * Leave the AnalogEC defs in - saves ifdef-ing all uses of these defines.
18742 + * Include Bcm6345_To_Bcm6348.h - to be able to pick up macros for the
18745 + * Revision 1.218 2003/12/04 02:10:58 linyin
18746 + * Redefine some constants for supporting different pilot and TTR
18748 + * Revision 1.217 2003/12/03 02:24:39 gsyu
18749 + * Reverse previous check in for Double Upstream demo
18751 + * Revision 1.215 2003/11/20 00:58:47 yongbing
18752 + * Merge ADSL2 functionalities into Annex A branch
18754 + * Revision 1.214 2003/11/06 00:35:06 nino
18755 + * Added kDslWriteAfeRegCmd and kDslReadAfeRegCmd commands.
18757 + * Revision 1.213 2003/11/05 21:04:23 ilyas
18758 + * Added more codes for LOG data
18760 + * Revision 1.212 2003/10/22 00:51:52 yjchen
18761 + * define constant for quiet line noise
18763 + * Revision 1.211 2003/10/20 22:08:57 nino
18764 + * Added kDslSetRcvGainCmd and kDslBypassRcvHpfCmd debug commands.
18766 + * Revision 1.210 2003/10/18 00:04:59 yjchen
18767 + * define constants for G992P3 diagnostic mode channel response
18769 + * Revision 1.209 2003/10/17 22:41:29 yongbing
18770 + * Add INP message support
18772 + * Revision 1.208 2003/10/16 00:06:09 uid1249
18773 + * Moved G.994 definitions from G.994p1MainTypes.h
18775 + * Revision 1.207 2003/10/15 20:45:11 linyin
18776 + * Add some constants for support Revision 2
18778 + * Revision 1.206 2003/10/14 22:04:02 ilyas
18779 + * Added Nino's AFE statuses for 6348
18781 + * Revision 1.205 2003/10/10 18:49:26 gsyu
18782 + * Added test modes to workaround the clock domain crossing bug, PR18038
18784 + * Revision 1.204 2003/09/30 19:27:46 mprahlad
18785 + * ifdef AnalogEC definies with #ifndef BCM6348_SRC
18787 + * Revision 1.203 2003/09/26 19:36:34 linyin
18788 + * Add annexi constant and vars
18790 + * Revision 1.202 2003/09/25 20:16:13 yjchen
18791 + * remove featureNTR definition
18793 + * Revision 1.201 2003/09/08 20:29:51 ilyas
18794 + * Added test commands for chip regression tests
18796 + * Revision 1.200 2003/08/26 00:58:14 ilyas
18797 + * Added I432 reset command (for header compression)
18798 + * Fixed SoftDsl time (for I432 header compression)
18800 + * Revision 1.199 2003/08/26 00:37:29 ilyas
18801 + * #ifdef'ed DslFrameFunctions in dslCommand structure to save space
18803 + * Revision 1.198 2003/08/22 22:45:00 liang
18804 + * Change the NF field in G992CodingParams from uchar to ushort to support K=256 (dataRate=255*32kbps) in fast path.
18806 + * Revision 1.197 2003/08/21 21:19:05 ilyas
18807 + * Changed dataPumpCapabilities structure for G992P3
18809 + * Revision 1.196 2003/08/12 22:44:28 khp
18810 + * - for Haixiang: added kDslTestMarginTweak command and marginTweakSpec
18812 + * Revision 1.195 2003/07/24 17:28:16 ovandewi
18813 + * added Tx filter change request code
18815 + * Revision 1.194 2003/07/24 15:48:55 yongbing
18816 + * Reduce TSSI buffer size to avoid crash at the beginning of G.994.1. Need to find out why
18818 + * Revision 1.193 2003/07/19 07:11:47 nino
18819 + * Revert back to version 1.191.
18821 + * Revision 1.191 2003/07/17 21:25:25 yongbing
18822 + * Add support for READSL2 and TSSI
18824 + * Revision 1.190 2003/07/14 19:42:33 yjchen
18825 + * add constants for G992P3
18827 + * Revision 1.189 2003/07/10 23:07:11 liang
18828 + * Add demodCapability bit to minimize showtime ATUC xmt power through b&g table.
18830 + * Revision 1.188 2003/07/08 22:18:50 liang
18831 + * Added demodCapability bit for G.994.1 Annex A multimode operation.
18833 + * Revision 1.187 2003/07/07 23:24:43 ilyas
18834 + * Added G.dmt.bis definitions
18836 + * Revision 1.186 2003/06/25 02:44:02 liang
18837 + * Added demod capability bit kDslUE9000ADI918FECFixEnabled.
18838 + * Added back kDslHWEnableAnalogECUpdate & kDslHWEnableAnalogEC for backward compatibility (annex A).
18840 + * Revision 1.185 2003/06/18 01:39:19 ilyas
18841 + * Added AFE test commands. Add #defines for driver's builds
18843 + * Revision 1.184 2003/06/06 23:58:09 ilyas
18844 + * Added command and status for standalone AFE tests
18846 + * Revision 1.183 2003/05/29 21:09:32 nino
18847 + * - kDslHWEnableAnalogECUpdate define replaced with kDslHWSetDigitalEcUpdateMode
18848 + * - kDslHWEnableAnalogEC define replaced with kDslHWDisableDigitalECUpdate
18850 + * Revision 1.182 2003/04/15 22:08:15 liang
18851 + * Changed one of the demodCapability bit name from last checkin.
18853 + * Revision 1.181 2003/04/13 19:25:54 liang
18854 + * Added three more demodCapability bits.
18856 + * Revision 1.180 2003/04/02 02:09:17 liang
18857 + * Added demodCapability bit for ADI low rate option fix disable.
18859 + * Revision 1.179 2003/03/18 18:22:06 yongbing
18860 + * Use 32 tap TEQ for Annex I
18862 + * Revision 1.178 2003/03/06 00:58:07 ilyas
18863 + * Added SetStausBuffer command
18865 + * Revision 1.177 2003/02/25 00:46:26 ilyas
18866 + * Added T1.413 EOC vendor ID
18868 + * Revision 1.176 2003/02/21 23:30:54 ilyas
18869 + * Added Xmtgain command framing mode status and T1413VendorId parameters
18871 + * Revision 1.175 2003/02/07 22:13:55 liang
18872 + * Add demodCapabilities bits for sub-sample alignment and higher T1.413 level (used internally only).
18874 + * Revision 1.174 2003/01/23 02:54:07 liang
18875 + * Added demod capability bit for bitswap enable.
18877 + * Revision 1.173 2002/12/13 18:36:33 yongbing
18878 + * Add support for G.992.2 Annex C
18880 + * Revision 1.172 2002/12/10 23:27:12 ilyas
18881 + * Extended dslException parameter structure to allow printout from DslDiags
18883 + * Revision 1.171 2002/12/06 02:10:19 liang
18884 + * Moved the T1.413 RAck1/RAck2 switching variables to connection setup structure.
18885 + * Added/Modified the training progress codes for T1.413 RAck1/RAck2 and upstream 2x IFFT disable.
18887 + * Revision 1.170 2002/11/11 00:20:05 liang
18888 + * Add demod capability constant for internally disabling upstream 2x IFFT in T1.413 mode.
18890 + * Revision 1.169 2002/11/06 03:46:19 liang
18891 + * Add training progress code for upstream 2x IFFT disable.
18893 + * Revision 1.168 2002/11/01 01:41:06 ilyas
18894 + * Added flags for Centillium 4103 workarround
18896 + * Revision 1.167 2002/10/26 01:26:11 gsyu
18897 + * Move SoftDslLineHandler from SDRAM to LMEM
18899 + * Revision 1.166 2002/10/20 18:56:20 khp
18901 + * - #ifdef NEC_NSIF_WORKAROUND:
18902 + * - add macros to extract NSIF status and fail counter vars
18904 + * Revision 1.165 2002/10/14 05:24:35 liang
18905 + * Add training status code to request alternate xmt filter (for Samsung 6-port ADI918 DSLAMs) to meet KT 2km spec.
18907 + * Revision 1.164 2002/10/08 21:44:50 ilyas
18908 + * Fixed EOC stuffing byte to indicate "no synchronization" action
18910 + * Revision 1.163 2002/10/03 19:34:24 ilyas
18911 + * Added size for EOC serial number register
18913 + * Revision 1.162 2002/09/28 02:42:27 yongbing
18914 + * Add retrain in T1.413 with R-Ack1 tone
18916 + * Revision 1.161 2002/09/28 01:23:35 gsyu
18917 + * Reverse us2xifft change so that we can install new us2xifft on the tree
18919 + * Revision 1.160 2002/09/26 23:30:48 yongbing
18920 + * Add synch symbol detection in Showtime
18922 + * Revision 1.159 2002/09/20 23:47:52 khp
18923 + * - for gsyu: enable 2X IFFT for Annex A (XMT_FFT_SIZE_2X)
18925 + * Revision 1.158 2002/09/14 03:26:39 ilyas
18926 + * Changed far-end RDI reporting
18928 + * Revision 1.157 2002/09/13 21:10:54 ilyas
18929 + * Added reporting of remote modem LOS and RDI.
18930 + * Moved G992CodingParams definition to SoftDsl.h
18932 + * Revision 1.156 2002/09/12 21:07:19 ilyas
18933 + * Added HEC, OCD and LCD counters
18935 + * Revision 1.155 2002/09/09 21:31:30 linyin
18936 + * Add two constant to support long reach
18938 + * Revision 1.154 2002/09/07 01:31:51 ilyas
18939 + * Added support for OEM parameters
18941 + * Revision 1.153 2002/09/04 22:36:14 mprahlad
18942 + * defines for non standard info added
18944 + * Revision 1.152 2002/08/02 21:59:09 liang
18945 + * Enable G.992.2 carrierInfo in capabitilities when G.992.1 annex A is used for G.992.2.
18947 + * Revision 1.151 2002/07/29 20:01:03 ilyas
18948 + * Added command for Atm VC map table change
18950 + * Revision 1.150 2002/07/18 22:30:47 liang
18951 + * Add xmt power and power cutback related constants.
18953 + * Revision 1.149 2002/07/11 01:30:58 ilyas
18954 + * Changed status for ShowtimeMargin reporting
18956 + * Revision 1.148 2002/07/09 19:19:09 ilyas
18957 + * Added status parameters for ShowtimeSNRMargin info and command to filter
18958 + * out SNR margin data
18960 + * Revision 1.147 2002/06/27 21:50:24 liang
18961 + * Added test command related demodCapabilities bits.
18963 + * Revision 1.146 2002/06/26 21:29:00 liang
18964 + * Added dsl test cmd structure and showtime margin connection info status.
18966 + * Revision 1.145 2002/06/15 05:15:51 ilyas
18967 + * Added definitions for Ping, Dying Gasp and other test commands
18969 + * Revision 1.144 2002/05/30 19:55:15 ilyas
18970 + * Added status for ADSL PHY MIPS exception
18971 + * Changed conflicting definition for higher rates (S=1/2)
18973 + * Revision 1.143 2002/05/21 23:41:07 yongbing
18974 + * First check-in of Annex C S=1/2 codes
18976 + * Revision 1.142 2002/04/29 22:25:09 georgep
18977 + * Merge from branch annexC_demo - add status message constants
18979 + * Revision 1.141 2002/04/18 19:00:35 ilyas
18980 + * Added include file for builds in CommEngine environment
18982 + * Revision 1.140 2002/04/18 00:18:36 yongbing
18983 + * Add detailed timeout error messages
18985 + * Revision 1.139 2002/04/02 10:03:18 ilyas
18986 + * Merged BERT from AnnexA branch
18988 + * Revision 1.138 2002/03/26 01:42:29 ilyas
18989 + * Added timeout message constants for annex C
18991 + * Revision 1.137 2002/03/22 19:39:22 yongbing
18992 + * Modify for co-exist of G994P1 and T1P413
18994 + * Revision 1.136 2002/03/22 01:19:40 ilyas
18995 + * Add status message constants for total FEXT Bits, NEXT bits
18997 + * Revision 1.135 2002/03/10 22:32:24 liang
18998 + * Added report constants for LOS recovery and timing tone index.
19000 + * Revision 1.134 2002/03/07 22:06:32 georgep
19001 + * Replace ifdef G992P1 with G992P1_ANNEX_A for annex A variables
19003 + * Revision 1.133 2002/02/16 01:08:18 georgep
19004 + * Add log constant for showtime mse
19006 + * Revision 1.132 2002/02/08 04:36:27 ilyas
19007 + * Added commands for LOG file and fixed Idle mode pointer update
19009 + * Revision 1.131 2002/01/24 20:21:30 georgep
19010 + * Add logging defines, remove fast retrain defines
19012 + * Revision 1.130 2002/01/19 23:59:17 ilyas
19013 + * Added support for LOG and eye data to ADSL core target
19015 + * Revision 1.129 2002/01/16 23:43:54 liang
19016 + * Remove the carriage return character from last checkin.
19018 + * Revision 1.128 2002/01/15 22:27:13 ilyas
19019 + * Added command for ADSL loopback
19021 + * Revision 1.127 2002/01/10 07:18:22 ilyas
19022 + * Added status for printf (mainly for ADSL core debugging)
19024 + * Revision 1.126 2001/12/21 22:45:34 ilyas
19025 + * Added support for ADSL MIB data object
19027 + * Revision 1.125 2001/12/13 02:24:22 ilyas
19028 + * Added G997 (Clear EOC and G997 framer) support
19030 + * Revision 1.124 2001/11/30 05:56:31 liang
19031 + * Merged top of the branch AnnexBDevelopment onto top of the tree.
19033 + * Revision 1.123 2001/11/15 19:01:07 yongbing
19034 + * Modify only T1.413 part to the top of tree based on AnnexBDevelopment branch
19036 + * Revision 1.122 2001/10/19 00:12:07 ilyas
19037 + * Added support for frame oriented (no ATM) data link layer
19039 + * Revision 1.121 2001/10/09 22:35:13 ilyas
19040 + * Added more ATM statistics and OAM support
19042 + * Revision 1.105.2.20 2001/11/27 02:32:03 liang
19043 + * Combine vendor ID, serial #, and version number into SoftModemVersionNumber.c.
19045 + * Revision 1.105.2.19 2001/11/21 01:29:14 georgep
19046 + * Add a status message define for annexC
19048 + * Revision 1.105.2.18 2001/11/08 23:26:28 yongbing
19049 + * Add carrier selection function for Annex A and B
19051 + * Revision 1.105.2.17 2001/11/07 22:55:30 liang
19052 + * Report G992 rcv msg CRC error as what it is instead of time out.
19054 + * Revision 1.105.2.16 2001/11/05 19:56:21 liang
19055 + * Add DC offset info code.
19057 + * Revision 1.105.2.15 2001/10/16 00:47:16 yongbing
19058 + * Add return-to-T1p413 starting point if in error
19060 + * Revision 1.105.2.14 2001/10/15 23:14:01 yjchen
19061 + * remove ADSL_SINGLE_SYMBOL_BLOCK
19063 + * Revision 1.105.2.13 2001/10/12 18:07:16 yongbing
19064 + * Add support for T1.413
19066 + * Revision 1.105.2.12 2001/10/04 00:23:52 liang
19067 + * Add connection info constants for TEQ coef and PSD.
19069 + * Revision 1.105.2.11 2001/10/03 01:44:01 liang
19070 + * Merged with codes from main tree (tag SoftDsl_2_18).
19072 + * Revision 1.105.2.10 2001/09/28 22:10:04 liang
19073 + * Add G994 exchange message status reports.
19075 + * Revision 1.105.2.9 2001/09/26 18:08:21 georgep
19076 + * Send status error message in case features field is not setup properly
19078 + * Revision 1.105.2.8 2001/09/05 01:58:13 georgep
19079 + * Added status message for annexC measured delay
19081 + * Revision 1.105.2.7 2001/08/29 00:37:52 georgep
19082 + * Add log constants for annexC
19084 + * Revision 1.105.2.6 2001/08/18 00:01:34 georgep
19085 + * Add constants for annexC
19087 + * Revision 1.105.2.5 2001/08/08 17:33:28 yongbing
19088 + * Merge with tag SoftDsl_2_17
19090 + * Revision 1.120 2001/08/29 02:56:01 ilyas
19091 + * Added tests for flattening/unflatenning command and statuses (dual mode)
19093 + * Revision 1.119 2001/08/28 03:26:32 ilyas
19094 + * Added support for running host and adsl core parts separately ("dual" mode)
19096 + * Revision 1.118 2001/08/16 02:16:10 khp
19097 + * - mark functions with FAST_TEXT to reduce cycle counts for QPROC targets
19098 + * (replaces use of LMEM_INSN)
19100 + * Revision 1.117 2001/06/18 20:06:35 ilyas
19101 + * Added forward declaration of dslCommandStruc to avoid gcc warnings
19103 + * Revision 1.116 2001/06/18 19:49:36 ilyas
19104 + * Changes to include support for HOST_ONLY mode
19106 + * Revision 1.115 2001/06/01 22:00:33 ilyas
19107 + * Changed ATM PHY interface to accomodate UTOPIA needs
19109 + * Revision 1.114 2001/05/16 06:22:24 liang
19110 + * Added status reports for xmt & rcv prefix enable position.
19112 + * Revision 1.113 2001/05/02 20:34:32 georgep
19113 + * Added log constants for snr1 calculation
19115 + * Revision 1.112 2001/04/25 01:20:11 ilyas
19117 + * Don't use DSL frame functions if ATM_LAYER is not defined
19119 + * Revision 1.111 2001/04/17 21:13:00 georgep
19120 + * Define status constant kDslHWSetDigitalEcUpdateShift
19122 + * Revision 1.110 2001/04/16 23:38:36 georgep
19123 + * Add HW AGC constants for ATUR
19125 + * Revision 1.109 2001/04/06 23:44:53 georgep
19126 + * Added status constant for setting up digitalEcGainShift
19128 + * Revision 1.108 2001/03/29 05:58:34 liang
19129 + * Replaced the Aware compatibility codes with automatic detection codes.
19131 + * Revision 1.107 2001/03/25 06:11:22 liang
19132 + * Combined separate loop attenuation status for ATUR & ATUC into one status.
19133 + * Replace separate hardware AGC info status for ATUR & ATUC into hardware AGC
19134 + * request status and hardware AGC obtained status.
19135 + * Use store AGC command to save hardware AGC value instead of returning value
19136 + * from status report.
19138 + * Revision 1.106 2001/03/24 00:43:22 liang
19139 + * Report more checksum results (NumOfCalls, txSignal, rxSignal & eyeData).
19141 + * Revision 1.105 2001/03/16 23:57:31 georgep
19142 + * Added more loop attenuation reporting status constants
19144 + * Revision 1.104 2001/03/15 00:22:07 liang
19145 + * Back to version 1.101.
19147 + * Revision 1.103 2001/03/15 00:03:44 yjchen
19148 + * use kDslATURHardwareAGCInfo for AltoE14 AGC as well
19150 + * Revision 1.102 2001/03/14 23:10:56 yjchen
19151 + * add defns for AltoE14 AGC
19153 + * Revision 1.101 2001/03/08 23:31:34 georgep
19154 + * Added R, S, D, coding parameters to dslDataPumpCapabilities
19156 + * Revision 1.100 2001/02/10 03:03:09 ilyas
19157 + * Added one more DslFrame function
19159 + * Revision 1.99 2001/02/09 01:55:27 ilyas
19160 + * Added status codes and macros to support printing of AAL packets
19162 + * Revision 1.98 2001/01/30 23:28:10 georgep
19163 + * Added kDslDspControlStatus for handling changes to dsp params
19165 + * Revision 1.97 2001/01/12 01:17:18 georgep
19166 + * Added bit in demodCapabilities for analog echo cancellor
19168 + * Revision 1.96 2001/01/04 05:51:03 ilyas
19169 + * Added more dslStatuses
19171 + * Revision 1.95 2000/12/21 05:46:07 ilyas
19172 + * Added name for struct _dslFrame
19174 + * Revision 1.94 2000/12/13 22:04:39 liang
19175 + * Add Reed-Solomon coding enable bit in demodCapabilities.
19177 + * Revision 1.93 2000/11/29 20:42:02 liang
19178 + * Add defines for SNR & max achivable rate status and DEC enable demodCapabilities bit.
19180 + * Revision 1.92 2000/09/22 21:55:13 ilyas
19181 + * Added support for DSL + Atm physical layer only (I.432) simulations
19183 + * Revision 1.91 2000/09/10 09:20:53 lkaplan
19184 + * Improve interface for sending Eoc messages
19186 + * Revision 1.90 2000/09/08 19:37:58 lkaplan
19187 + * Added code for handling EOC messages
19189 + * Revision 1.89 2000/09/07 23:02:27 georgep
19190 + * Add HarwareAGC Bit to demod Capabilities
19192 + * Revision 1.88 2000/09/01 00:57:34 georgep
19193 + * Added Hardware AGC status defines
19195 + * Revision 1.87 2000/08/31 19:04:26 liang
19196 + * Added external reference for stack size requirement test functions.
19198 + * Revision 1.86 2000/08/24 23:16:46 liang
19199 + * Increased sample block size for noBlock.
19201 + * Revision 1.85 2000/08/23 18:34:39 ilyas
19202 + * Added XxxVcConfigure function
19204 + * Revision 1.84 2000/08/05 00:25:04 georgep
19205 + * Redefine sampling freq constants
19207 + * Revision 1.83 2000/08/03 14:04:00 liang
19208 + * Add hardware time tracking clock error reset code.
19210 + * Revision 1.82 2000/07/23 20:52:52 ilyas
19211 + * Added xxxFrameBufSetAddress() function for ATM framer layers
19212 + * Rearranged linkLayer functions in one structure which is passed as a
19213 + * parameter to xxxLinkLayerInit() function to be set there
19215 + * Revision 1.81 2000/07/18 20:03:24 ilyas
19216 + * Changed DslFrame functions definitions to macros,
19217 + * Removed gDslVars from their parameter list
19219 + * Revision 1.80 2000/07/17 21:08:15 lkaplan
19220 + * removed global pointer
19222 + * Revision 1.79 2000/06/21 20:38:44 georgep
19223 + * Added bit to demodCapabilities for HW_TIME_TRACKING
19225 + * Revision 1.78 2000/06/19 19:57:55 georgep
19226 + * Added constants for logging of HWResampler data
19228 + * Revision 1.77 2000/06/02 18:57:21 ilyas
19229 + * Added support for DSL buffers consisting of many ATM cells
19231 + * Revision 1.76 2000/05/27 02:19:28 liang
19232 + * G992MonitorParams structure is moved here, and Tx/Rx data handler type definitions changed.
19234 + * Revision 1.75 2000/05/15 18:17:21 liang
19235 + * Added statuses for sent and received frames
19237 + * Revision 1.74 2000/05/14 01:56:38 ilyas
19238 + * Added ATM cell printouts
19240 + * Revision 1.73 2000/05/09 23:00:26 ilyas
19241 + * Added ATM status messages, ATM timer, Tx frames flush on timeout
19242 + * Fixed a bug - adding flushed Tx frames to the list of free Rx frames
19244 + * Revision 1.72 2000/05/03 18:01:18 georgep
19245 + * Removed old function declarations for Eoc/Aoc
19247 + * Revision 1.71 2000/05/03 03:57:04 ilyas
19248 + * Added LOG file support for writing ATM data
19250 + * Revision 1.70 2000/05/02 00:04:36 liang
19251 + * Add showtime monitoring and message exchange info constants.
19253 + * Revision 1.69 2000/04/28 23:34:20 yongbing
19254 + * Add constants for reporting error events in performance monitoring
19256 + * Revision 1.68 2000/04/21 23:09:04 liang
19257 + * Added G992 time out training progress constant.
19259 + * Revision 1.67 2000/04/19 00:31:47 ilyas
19260 + * Added global SoftDsl functions for Vc, added OOB info functions
19262 + * Revision 1.66 2000/04/18 00:45:31 yongbing
19263 + * Add G.DMT new frame structure, define G992P1_NEWFRAME to enable, need ATM layer to work
19265 + * Revision 1.65 2000/04/15 01:48:34 georgep
19266 + * Added T1p413 status constants
19268 + * Revision 1.64 2000/04/13 08:36:22 yura
19269 + * Added SoftDslSetRefData, SoftDslGetRefData functions
19271 + * Revision 1.63 2000/04/13 05:42:35 georgep
19272 + * Added constant for T1p413
19274 + * Revision 1.62 2000/04/05 21:49:54 liang
19277 + * Revision 1.61 2000/04/04 04:16:06 liang
19278 + * Merged with SoftDsl_0_03 from old tree.
19280 + * Revision 1.65 2000/04/04 01:47:21 ilyas
19281 + * Implemented abstract dslFrame and dslFrameBuffer objects
19283 + * Revision 1.64 2000/04/01 08:12:10 yura
19284 + * Added preliminary revision of the SoftDsl driver architecture
19286 + * Revision 1.63 2000/04/01 02:55:33 georgep
19287 + * New defines for G992p2Profile Structure
19289 + * Revision 1.62 2000/04/01 00:50:36 yongbing
19290 + * Add initial version of new frame structure for full-rate
19292 + * Revision 1.61 2000/03/24 03:30:45 georgep
19293 + * Define new constant kDslUpstreamSamplingFreq
19295 + * Revision 1.60 2000/03/23 19:51:30 georgep
19296 + * Define new features bits for G992p1
19298 + * Revision 1.59 2000/03/18 01:28:41 georgep
19299 + * Changed connectionSetup to include G992p1 Capabilities
19301 + * Revision 1.58 2000/02/29 01:40:03 georgep
19302 + * Changed modulationtype defines to be the same as SPAR1 in G994p1
19304 + * Revision 1.57 1999/11/19 01:03:19 george
19305 + * Use Block Size 256 for single symbol Mode
19307 + * Revision 1.56 1999/11/18 02:37:43 george
19308 + * Porting to 16Bit
19310 + * Revision 1.55 1999/11/12 02:12:55 george
19311 + * Added status constant for reporting of profile channel matching calculation
19313 + * Revision 1.54 1999/11/11 19:19:42 george
19314 + * Porting to 16Bit Compiler
19316 + * Revision 1.53 1999/11/05 01:27:06 liang
19317 + * Add recovery-from-inpulse-noise progress report.
19319 + * Revision 1.52 1999/11/02 02:06:27 george
19320 + * Added SNRMargin training status value
19322 + * Revision 1.51 1999/10/27 23:02:03 wan
19323 + * Add G.994.1 setup in dslConnectionSetupStruct for setting up Initiation side
19325 + * Revision 1.50 1999/10/25 21:55:36 liang
19326 + * Renamed the constant for FEQ output error.
19328 + * Revision 1.49 1999/10/23 02:20:55 george
19329 + * Add debug data codes
19331 + * Revision 1.48 1999/10/19 23:59:06 liang
19332 + * Change line handler interface to work with nonsymmetric sampling freq.
19334 + * Revision 1.47 1999/10/09 01:38:04 george
19335 + * Define maxProfileNumber
19337 + * Revision 1.46 1999/10/07 23:30:51 wan
19338 + * Add G.994.1 Tone and Fast Retrain Recov detections in G.992p2 SHOWTIME and Fast Retrain
19340 + * Revision 1.45 1999/10/06 13:59:27 liang
19341 + * Escape to G994.1 should be done through status instead of command.
19343 + * Revision 1.44 1999/10/06 02:01:28 george
19344 + * Add kDslReturnToG994p1Cmd
19346 + * Revision 1.43 1999/09/30 19:29:58 george
19347 + * Add reporting constant for Fast Retrain
19349 + * Revision 1.42 1999/09/16 23:41:56 liang
19350 + * Added command for host forced retrain.
19352 + * Revision 1.41 1999/08/20 00:47:25 wan
19353 + * Add constants for Fast Retrain progress status
19355 + * Revision 1.40 1999/08/16 18:06:01 wan
19356 + * Add more reporting constants for Fast Retrain
19358 + * Revision 1.39 1999/08/12 00:18:10 wan
19359 + * Add several Fast Retrain Status constants
19361 + * Revision 1.38 1999/08/10 18:25:38 george
19362 + * Define constants used for Fast Retrain
19364 + * Revision 1.37 1999/07/31 01:47:43 george
19365 + * Add status constants for eoc/aoc
19367 + * Revision 1.36 1999/07/27 18:19:52 george
19368 + * declare aoc/eoc functions
19370 + * Revision 1.35 1999/07/19 22:44:47 george
19371 + * Add constants for G994p1 Message Exchange
19373 + * Revision 1.34 1999/07/16 02:03:03 liang
19374 + * Modified Dsl link layer command spec structure.
19376 + * Revision 1.33 1999/07/14 22:53:16 george
19377 + * Add Constants for G994p1
19379 + * Revision 1.32 1999/07/13 00:02:26 liang
19380 + * Added more feature bits.
19382 + * Revision 1.31 1999/07/09 01:58:14 wan
19383 + * Added more constants G.994.1 testing reports
19385 + * Revision 1.30 1999/07/07 23:51:04 liang
19386 + * Added rcv power and loop attenuation reports.
19388 + * Revision 1.29 1999/07/06 21:32:01 liang
19389 + * Added some aux. feature bits, and field performanceMargin was changed to noiseMargin in Capabilities.
19391 + * Revision 1.28 1999/07/03 01:40:17 liang
19392 + * Redefined dsl command parameter list and added connection setup struct.
19394 + * Revision 1.27 1999/07/02 00:41:18 liang
19395 + * Add bit and gain logging as well as rcv carrier range status.
19397 + * Revision 1.26 1999/06/25 21:37:10 wan
19398 + * Work in progress for G994.1.
19400 + * Revision 1.25 1999/06/16 00:54:36 liang
19401 + * Added Tx/Rx SHOWTIME active training progress codes.
19403 + * Revision 1.24 1999/06/11 21:59:37 wan
19404 + * Added G994.1 fail status constant.
19406 + * Revision 1.23 1999/06/11 21:29:01 liang
19407 + * Constants for C/R-Msgs was changed to C/R-Msg.
19409 + * Revision 1.22 1999/06/08 02:49:42 liang
19410 + * Added SNR data logging.
19412 + * Revision 1.21 1999/06/07 21:05:08 liang
19413 + * Added more training status values.
19415 + * Revision 1.20 1999/05/22 02:18:26 liang
19416 + * More constant defines.
19418 + * Revision 1.19 1999/05/14 22:49:35 liang
19419 + * Added more status codes and debug data codes.
19421 + * Revision 1.18 1999/04/12 22:41:39 liang
19422 + * Work in progress.
19424 + * Revision 1.17 1999/04/01 20:28:07 liang
19425 + * Added RReverb detect event status.
19427 + * Revision 1.16 1999/03/26 03:29:54 liang
19428 + * Add DSL debug data constants.
19430 + * Revision 1.15 1999/03/08 21:58:00 liang
19431 + * Added more constant definitions.
19433 + * Revision 1.14 1999/03/02 01:49:36 liang
19434 + * Added more connection info codes.
19436 + * Revision 1.13 1999/03/02 00:25:55 liang
19437 + * Added DSL tx and rx data handler type definitions.
19439 + * Revision 1.12 1999/02/27 01:16:55 liang
19440 + * Increase allowable static memory size to a VERY large number for now.
19442 + * Revision 1.11 1999/02/25 00:24:06 liang
19443 + * Increased symbol block size to 16.
19445 + * Revision 1.10 1999/02/23 22:03:26 liang
19446 + * Increased maximal static memory size allowed.
19448 + * Revision 1.9 1999/02/17 02:39:21 ilyas
19449 + * Changes for NDIS
19451 + * Revision 1.8 1999/02/11 22:44:30 ilyas
19452 + * More definitions for ATM
19454 + * Revision 1.7 1999/02/10 01:56:38 liang
19455 + * Added hooks for G994.1 and G992.2.
19458 + *****************************************************************************/
19460 +#ifndef SoftDslHeader
19461 +#define SoftDslHeader
19463 +/* for builds in Linux/VxWorks CommEngine environment */
19464 +#if (defined(__KERNEL__) && !defined(LINUX_DRIVER)) || defined(VXWORKS) || defined(_WIN32_WCE) || defined(TARG_OS_RTEMS) || defined(_CFE_)
19465 +#include "AdslCoreDefs.h"
19467 +#include "Bcm6345_To_Bcm6348.h" /* File for 45->48 changes */
19470 +#ifndef SoftModemPh
19471 +#include "SoftModem.h"
19475 +#include "DslOs.h"
19480 +** Type definitions
19484 +#if defined(ATM) || defined(DSL_PACKET)
19485 +#define DSL_LINKLAYER
19488 +#if defined(ATM_LAYER) || defined(DSL_PACKET_LAYER) || defined(G997_1_FRAMER)
19489 +#define DSL_FRAME_FUNCTIONS
19492 +#define FLD_OFFSET(type,fld) ((int)(void *)&(((type *)0)->fld))
19495 +#include "SoftAtmVc.h"
19497 +typedef struct _dslFrameBuffer
19499 + struct _dslFrameBuffer *next; /* link to the next buffer in the frame */
19500 + void *pData; /* pointer to data */
19501 + ulong length; /* size (in bytes) of data */
19502 + } dslFrameBuffer;
19504 +typedef struct _dslFrame
19506 + ulong Reserved[3];
19508 + ulong totalLength; /* total amount of data in the packet */
19509 + int bufCnt; /* buffer counter */
19510 + struct _dslFrameBuffer *head; /* first buffer in the chain */
19511 + struct _dslFrameBuffer *tail; /* last buffer in the chain */
19515 +/* VC types and parameters */
19517 +#define kDslVcAtm 1
19524 + atmVcParams atmParams;
19529 +** Assuming that dslVcParams.params is the first field in VC
19530 +** and RefData is the first field in dslVcParams.params
19533 +#define DslVcGetRefData(pVc) (*(void **) (pVc))
19535 +/* Frame OOB types */
19537 +#define kDslFrameAtm 1
19544 + atmOobPacketInfo atmInfo;
19546 + } dslOobFrameInfo;
19551 + ulong (SM_DECL *__DslFrameBufferGetLength) (dslFrameBuffer *fb);
19552 + void * (SM_DECL *__DslFrameBufferGetAddress) (dslFrameBuffer *fb);
19553 + void (SM_DECL *__DslFrameBufferSetLength) (dslFrameBuffer *fb, ulong l);
19554 + void (SM_DECL *__DslFrameBufferSetAddress) (dslFrameBuffer *fb, void *p);
19556 + void (SM_DECL *__DslFrameInit) (dslFrame *f);
19557 + ulong (SM_DECL *__DslFrameGetLength) (dslFrame *pFrame);
19558 + ulong (SM_DECL *__DslFrameGetBufCnt) (dslFrame *pFrame);
19559 + dslFrameBuffer * (SM_DECL *__DslFrameGetFirstBuffer) (dslFrame *pFrame);
19560 + dslFrameBuffer * (SM_DECL *__DslFrameGetNextBuffer) (dslFrameBuffer *pFrBuffer);
19561 + void (SM_DECL *__DslFrameSetNextBuffer) (dslFrameBuffer *pFrBuf, dslFrameBuffer *pFrBufNext);
19562 + dslFrameBuffer * (SM_DECL *__DslFrameGetLastBuffer) (dslFrame *pFrame);
19563 + void * (SM_DECL *__DslFrameGetLinkFieldAddress) (dslFrame *f);
19564 + dslFrame * (SM_DECL *__DslFrameGetFrameAddressFromLink) (void *lnk);
19566 + Boolean (SM_DECL *__DslFrameGetOobInfo) (dslFrame *f, dslOobFrameInfo *pOobInfo);
19567 + Boolean (SM_DECL *__DslFrameSetOobInfo) (dslFrame *f, dslOobFrameInfo *pOobInfo);
19569 + void (SM_DECL *__DslFrameEnqueBufferAtBack) (dslFrame *f, dslFrameBuffer *b);
19570 + void (SM_DECL *__DslFrameEnqueFrameAtBack) (dslFrame *fMain, dslFrame *f);
19571 + void (SM_DECL *__DslFrameEnqueBufferAtFront) (dslFrame *f, dslFrameBuffer *b);
19572 + void (SM_DECL *__DslFrameEnqueFrameAtFront) (dslFrame *fMain, dslFrame *f);
19573 + dslFrameBuffer * (SM_DECL *__DslFrameDequeBuffer) (dslFrame *pFrame);
19575 + void * (SM_DECL *__DslFrameAllocMemForFrames) (ulong frameNum);
19576 + void (SM_DECL *__DslFrameFreeMemForFrames) (void *hMem);
19577 + dslFrame * (SM_DECL *__DslFrameAllocFrame) (void *handle);
19578 + void (SM_DECL *__DslFrameFreeFrame) (void *handle, dslFrame *pFrame);
19579 + void * (SM_DECL *__DslFrameAllocMemForBuffers) (void **ppMemPool, ulong bufNum, ulong memSize);
19580 + void (SM_DECL *__DslFrameFreeMemForBuffers) (void *hMem, ulong memSize, void *pMemPool);
19581 + dslFrameBuffer * (SM_DECL *__DslFrameAllocBuffer) (void *handle, void *pMem, ulong length);
19582 + void (SM_DECL *__DslFrameFreeBuffer) (void *handle, dslFrameBuffer *pBuf);
19584 + /* for LOG file support */
19586 + ulong (SM_DECL *__DslFrame2Id)(void *handle, dslFrame *pFrame);
19587 + void * (SM_DECL *__DslFrameId2Frame)(void *handle, ulong frameId);
19588 + } dslFrameFunctions;
19590 +#define DslFrameDeclareFunctions( name_prefix ) \
19591 +extern ulong SM_DECL name_prefix##BufferGetLength(dslFrameBuffer *fb); \
19592 +extern void * SM_DECL name_prefix##BufferGetAddress(dslFrameBuffer *fb); \
19593 +extern void SM_DECL name_prefix##BufferSetLength(dslFrameBuffer *fb, ulong l); \
19594 +extern void SM_DECL name_prefix##BufferSetAddress(dslFrameBuffer *fb, void *p); \
19596 +extern void SM_DECL name_prefix##Init(dslFrame *f); \
19597 +extern ulong SM_DECL name_prefix##GetLength (dslFrame *pFrame); \
19598 +extern ulong SM_DECL name_prefix##GetBufCnt(dslFrame *pFrame); \
19599 +extern dslFrameBuffer * SM_DECL name_prefix##GetFirstBuffer(dslFrame *pFrame); \
19600 +extern dslFrameBuffer * SM_DECL name_prefix##GetNextBuffer(dslFrameBuffer *pFrBuffer); \
19601 +extern void SM_DECL name_prefix##SetNextBuffer(dslFrameBuffer *pFrBuf, dslFrameBuffer *pFrBufNext); \
19602 +extern dslFrameBuffer * SM_DECL name_prefix##GetLastBuffer(dslFrame *pFrame); \
19603 +extern void * SM_DECL name_prefix##GetLinkFieldAddress(dslFrame *f); \
19604 +extern Boolean SM_DECL name_prefix##GetOobInfo(dslFrame *f, dslOobFrameInfo *pOobInfo); \
19605 +extern Boolean SM_DECL name_prefix##SetOobInfo(dslFrame *f, dslOobFrameInfo *pOobInfo); \
19606 +extern dslFrame* SM_DECL name_prefix##GetFrameAddressFromLink(void *lnk); \
19607 +extern void SM_DECL name_prefix##EnqueBufferAtBack(dslFrame *f, dslFrameBuffer *b); \
19608 +extern void SM_DECL name_prefix##EnqueFrameAtBack(dslFrame *fMain, dslFrame *f); \
19609 +extern void SM_DECL name_prefix##EnqueBufferAtFront(dslFrame *f, dslFrameBuffer *b); \
19610 +extern void SM_DECL name_prefix##EnqueFrameAtFront(dslFrame *fMain, dslFrame *f); \
19611 +extern dslFrameBuffer * SM_DECL name_prefix##DequeBuffer(dslFrame *pFrame); \
19613 +extern void * SM_DECL name_prefix##AllocMemForFrames(ulong frameNum); \
19614 +extern void SM_DECL name_prefix##FreeMemForFrames(void *hMem); \
19615 +extern dslFrame * SM_DECL name_prefix##AllocFrame(void *handle); \
19616 +extern void SM_DECL name_prefix##FreeFrame(void *handle, dslFrame *pFrame); \
19617 +extern void * SM_DECL name_prefix##AllocMemForBuffers(void **ppMemPool, ulong bufNum, ulong memSize); \
19618 +extern void SM_DECL name_prefix##FreeMemForBuffers(void *hMem, ulong memSize, void *pMemPool); \
19619 +extern dslFrameBuffer * SM_DECL name_prefix##AllocBuffer(void *handle, void *pMem, ulong length); \
19620 +extern void SM_DECL name_prefix##FreeBuffer(void *handle, dslFrameBuffer *pBuf); \
19621 +extern ulong SM_DECL name_prefix##2Id(void *handle, dslFrame *pFrame); \
19622 +extern void * SM_DECL name_prefix##Id2Frame(void *handle, ulong frameId);
19625 +#define DslFrameAssignFunctions( var, name_prefix ) do { \
19626 + (var).__DslFrameBufferGetLength = name_prefix##BufferGetLength; \
19627 + (var).__DslFrameBufferGetAddress= name_prefix##BufferGetAddress; \
19628 + (var).__DslFrameBufferSetLength = name_prefix##BufferSetLength; \
19629 + (var).__DslFrameBufferSetAddress= name_prefix##BufferSetAddress; \
19631 + (var).__DslFrameInit = name_prefix##Init; \
19632 + (var).__DslFrameGetLength = name_prefix##GetLength; \
19633 + (var).__DslFrameGetBufCnt = name_prefix##GetBufCnt; \
19634 + (var).__DslFrameGetFirstBuffer = name_prefix##GetFirstBuffer; \
19635 + (var).__DslFrameGetNextBuffer = name_prefix##GetNextBuffer; \
19636 + (var).__DslFrameSetNextBuffer = name_prefix##SetNextBuffer; \
19637 + (var).__DslFrameGetLastBuffer = name_prefix##GetLastBuffer; \
19638 + (var).__DslFrameGetLinkFieldAddress = name_prefix##GetLinkFieldAddress; \
19639 + (var).__DslFrameGetFrameAddressFromLink = name_prefix##GetFrameAddressFromLink; \
19641 + (var).__DslFrameGetOobInfo = name_prefix##GetOobInfo; \
19642 + (var).__DslFrameSetOobInfo = name_prefix##SetOobInfo; \
19644 + (var).__DslFrameEnqueBufferAtBack = name_prefix##EnqueBufferAtBack; \
19645 + (var).__DslFrameEnqueFrameAtBack = name_prefix##EnqueFrameAtBack; \
19646 + (var).__DslFrameEnqueBufferAtFront= name_prefix##EnqueBufferAtFront; \
19647 + (var).__DslFrameEnqueFrameAtFront = name_prefix##EnqueFrameAtFront; \
19648 + (var).__DslFrameDequeBuffer = name_prefix##DequeBuffer; \
19650 + (var).__DslFrameAllocMemForFrames = name_prefix##AllocMemForFrames; \
19651 + (var).__DslFrameFreeMemForFrames = name_prefix##FreeMemForFrames; \
19652 + (var).__DslFrameAllocFrame = name_prefix##AllocFrame; \
19653 + (var).__DslFrameFreeFrame = name_prefix##FreeFrame; \
19654 + (var).__DslFrameAllocMemForBuffers= name_prefix##AllocMemForBuffers; \
19655 + (var).__DslFrameFreeMemForBuffers = name_prefix##FreeMemForBuffers; \
19656 + (var).__DslFrameAllocBuffer = name_prefix##AllocBuffer; \
19657 + (var).__DslFrameFreeBuffer = name_prefix##FreeBuffer; \
19659 + (var).__DslFrame2Id = name_prefix##2Id; \
19660 + (var).__DslFrameId2Frame = name_prefix##Id2Frame; \
19667 + Boolean los, rdi;
19674 +#ifdef G992P1_NEWFRAME
19682 + } G992MonitorParams;
19692 + directionType direction;
19694 +#ifdef G992P1_NEWFRAME
19700 + uchar AS0BF, AS1BF, AS2BF, AS3BF, AEXAF;
19702 + uchar AS1BI, AS2BI, AS3BI, AEXAI;
19704 + uchar LS0CF, LS1BF, LS2BF, LEXLF;
19705 + uchar LS0CI, LS1BI, LS2BI, LEXLI;
19707 + uchar mergedModeEnabled;
19711 + } G992CodingParams;
19726 + } G992p3CodingParams;
19728 +/* Power Management Message definitions (used in command and status) */
19744 +/* Power Management commands and responses */
19746 +#define kPwrSimpleRequest 1
19747 +#define kPwrL2Request 2
19748 +#define kPwrL2TrimRequest 3
19750 +#define kPwrGrant 0x80
19751 +#define kPwrReject 0x81
19752 +#define kPwrL2Grant 0x82
19753 +#define kPwrL2Reject 0x83
19754 +#define kPwrL2TrimGrant 0x84
19755 +#define kPwrL2TrimReject 0x85
19756 +#define kPwrL2Grant2p 0x86
19758 +#define kPwrBusy 0x01
19759 +#define kPwrInvalid 0x02
19760 +#define kPwrNotDesired 0x03
19761 +#define kPwrInfeasibleParam 0x04
19763 +/* Power Management reason codes */
19765 +/* OLR definitions (used in command and status) */
19773 + void *carrParamPtr;
19781 + } dslOLRCarrParam;
19788 + } dslOLRCarrParam2p;
19790 +/* OLR messages */
19792 +#define kOLRRequestType1 1
19793 +#define kOLRRequestType2 2
19794 +#define kOLRRequestType3 3
19795 +#define kOLRRequestType4 4
19796 +#define kOLRRequestType5 5
19797 +#define kOLRRequestType6 6
19799 +#define kOLRDeferType1 0x81
19800 +#define kOLRRejectType2 0x82
19801 +#define kOLRRejectType3 0x83
19803 +/* OLR reason codes */
19805 +#define kOLRBusy 1
19806 +#define kOLRInvalidParam 2
19807 +#define kOLRNotEnabled 3
19808 +#define kOLRNotSupported 4
19810 +/* common EOC definitions */
19811 +#define kG992EocStuffingByte 0x0C
19813 +/* showtime monitor counters */
19814 +#define kG992ShowtimeRSCodewordsRcved 0 /* number of Reed-Solomon codewords received */
19815 +#define kG992ShowtimeRSCodewordsRcvedOK 1 /* number of Reed-Solomon codewords received with all symdromes zero */
19816 +#define kG992ShowtimeRSCodewordsRcvedCorrectable 2 /* number of Reed-Solomon codewords received with correctable errors */
19817 +#define kG992ShowtimeRSCodewordsRcvedUncorrectable 3 /* number of Reed-Solomon codewords received with un-correctable errors */
19818 +#define kG992ShowtimeSuperFramesRcvd 4 /* number of super frames received */
19819 +#define kG992ShowtimeSuperFramesRcvdWrong 5 /* number of super frames received with CRC error */
19820 +#define kG992ShowtimeLastUncorrectableRSCount 6 /* last recorded value for kG992ShowtimeRSCodewordsRcvedUncorrectable */
19821 +#define kG992ShowtimeLastWrongSuperFrameCount 7 /* last recorded value for kG992ShowtimeSuperFramesRcvdWrong */
19822 +#define kG992ShowtimeNumOfShortResync 8 /* number of short interrupt recoveries by FEQ */
19824 +#define kG992ShowtimeNumOfFEBE 9 /* number of other side superframe errors */
19825 +#define kG992ShowtimeNumOfFECC 10 /* number of other side superframe FEC errors */
19826 +#define kG992ShowtimeNumOfFHEC 11 /* number of far-end ATM header CRC errors */
19827 +#define kG992ShowtimeNumOfFOCD 12 /* number of far-end OCD events */
19828 +#define kG992ShowtimeNumOfFLCD 13 /* number of far-end LCD events */
19829 +#define kG992ShowtimeNumOfHEC 14 /* number of ATM header CRC errors */
19830 +#define kG992ShowtimeNumOfOCD 15 /* number of OCD events */
19831 +#define kG992ShowtimeNumOfLCD 16 /* number of LCD events */
19833 +#define kG992ShowtimeNumOfMonitorCounters (kG992ShowtimeNumOfLCD+1) /* always last number + 1 */
19834 +#define kG992ShowtimeMonitorReportNumber 9
19836 +#define kG992ShowtimeLCDNumShift 1
19837 +#define kG992ShowtimeLCDFlag 1
19839 +typedef int (SM_DECL *dslFrameHandlerType) (void *gDslVars, void *pVc, ulong mid, dslFrame *);
19841 +typedef void* (SM_DECL *dslHeaderHandlerType) (void *gDslVars, ulong hdr, uchar hdrHec);
19842 +typedef void* (SM_DECL *dslTxFrameBufferHandlerType) (void *gDslVars, int*, void*);
19843 +typedef void* (SM_DECL *dslRxFrameBufferHandlerType) (void *gDslVars, int, void*);
19845 +typedef void* (SM_DECL *dslVcAllocateHandlerType) (void *gDslVars, void *);
19846 +typedef void (SM_DECL *dslVcFreeHandlerType) (void *gDslVars, void *);
19847 +typedef Boolean (SM_DECL *dslVcActivateHandlerType) (void *gDslVars, void *);
19848 +typedef void (SM_DECL *dslVcDeactivateHandlerType) (void *gDslVars, void *);
19849 +typedef Boolean (SM_DECL *dslVcConfigureHandlerType) (void *gDslVars, void *pVc, ulong mid, void *);
19851 +typedef ulong (SM_DECL *dslLinkVc2IdHandlerType) (void *gDslVars, void *);
19852 +typedef void* (SM_DECL *dslLinkVcId2VcHandlerType) (void *gDslVars, ulong);
19853 +typedef void* (SM_DECL *dslGetFramePoolHandlerType) (void *gDslVars);
19855 +typedef void (SM_DECL *dslLinkCloseHandlerType) (void *gDslVars);
19856 +typedef int (SM_DECL *dslTxDataHandlerType)(void *gDslVars, int, int, uchar*, G992MonitorParams*);
19857 +typedef int (SM_DECL *dslRxDataHandlerType)(void *gDslVars, int, uchar*, G992MonitorParams*);
19859 +typedef void (SM_DECL *dslLinkStatusHandler) (void *gDslVars, ulong statusCode, ...);
19861 +typedef Boolean (SM_DECL *dslPhyInitType) (
19864 + dslHeaderHandlerType rxCellHeaderHandlerPtr,
19865 + dslRxFrameBufferHandlerType rxFrameHandlerPtr,
19866 + dslTxFrameBufferHandlerType txFrameHandlerPtr,
19867 + atmStatusHandler statusHandlerPtr);
19869 +struct _dslFramerBufDesc;
19871 +typedef Boolean (SM_DECL *dslFramerDataGetPtrHandlerType) (void *gDslVars, struct _dslFramerBufDesc *pBufDesc);
19872 +typedef void (SM_DECL *dslFramerDataDoneHandlerType) (void *gDslVars, struct _dslFramerBufDesc *pBufDesc);
19874 +typedef void (SM_DECL *dslDriverCallbackType) (void *gDslVars);
19880 + dslFramerDataGetPtrHandlerType rxDataGetPtrHandler;
19881 + dslFramerDataDoneHandlerType rxDataDoneHandler;
19882 + dslFramerDataGetPtrHandlerType txDataGetPtrHandler;
19883 + dslFramerDataDoneHandlerType txDataDoneHandler;
19884 + } dslPacketPhyFunctions;
19886 +typedef Boolean (SM_DECL *dslPacketPhyInitType) (
19889 + dslPacketPhyFunctions dslPhyFunctions,
19890 + dslLinkStatusHandler statusHandlerPtr);
19893 +#endif /* DSL_PACKET */
19896 +typedef int dslDirectionType;
19897 +typedef bitMap dslModulationType;
19898 +typedef bitMap dslLinkLayerType;
19906 +#define kDslEyeData eyeData
19908 +#define kDslLogComplete (inputSignalData - 1)
19909 +#define kDslLogInputData inputSignalData
19910 +#define kDslLogInputData1 (inputSignalData + 1)
19911 +#define kDslLogInputData2 (inputSignalData + 2)
19912 +#define kDslLogInputData3 (inputSignalData + 3)
19920 +typedef long dslStatusCode;
19921 +#define kFirstDslStatusCode 256
19922 +#define kDslError (kFirstDslStatusCode + 0)
19923 +#define kAtmStatus (kFirstDslStatusCode + 1)
19924 +#define kDslTrainingStatus (kFirstDslStatusCode + 2)
19925 +#define kDslConnectInfoStatus (kFirstDslStatusCode + 3)
19926 +#define kDslEscapeToG994p1Status (kFirstDslStatusCode + 4)
19927 +#define kDslFrameStatus (kFirstDslStatusCode + 5)
19928 +#define kDslReceivedEocCommand (kFirstDslStatusCode + 6)
19929 +#define kDslSendEocCommandDone (kFirstDslStatusCode + 7)
19930 +#define kDslSendEocCommandFailed (kFirstDslStatusCode + 8)
19931 +#define kDslWriteRemoteRegisterDone (kFirstDslStatusCode + 9)
19932 +#define kDslReadRemoteRegisterDone (kFirstDslStatusCode + 10)
19933 +#define kDslExternalError (kFirstDslStatusCode + 11)
19934 +#define kDslDspControlStatus (kFirstDslStatusCode + 12)
19935 +#define kDslATUHardwareAGCRequest (kFirstDslStatusCode + 13)
19936 +#define kDslPacketStatus (kFirstDslStatusCode + 14)
19937 +#define kDslG997Status (kFirstDslStatusCode + 15)
19938 +#define kDslPrintfStatus (kFirstDslStatusCode + 16)
19939 +#define kDslPrintfStatus1 (kFirstDslStatusCode + 17)
19940 +#define kDslExceptionStatus (kFirstDslStatusCode + 18)
19941 +#define kDslPingResponse (kFirstDslStatusCode + 19)
19942 +#define kDslShowtimeSNRMarginInfo (kFirstDslStatusCode + 20)
19943 +#define kDslGetOemParameter (kFirstDslStatusCode + 21)
19944 +#define kDslOemDataAddrStatus (kFirstDslStatusCode + 22)
19945 +#define kDslDataAvailStatus (kFirstDslStatusCode + 23)
19946 +/* #define kDslAtuChangeTxFilterRequest (kFirstDslStatusCode + 24) */
19947 +#define kDslTestPllPhaseResult (kFirstDslStatusCode + 25)
19948 +#ifdef BCM6348_SRC
19949 +#define kDslHardwareAGCSetPga1 (kFirstDslStatusCode + 26)
19950 +#define kDslHardwareAGCDecPga1 (kFirstDslStatusCode + 27)
19951 +#define kDslHardwareAGCIncPga1 (kFirstDslStatusCode + 28)
19952 +#define kDslHardwareAGCSetPga2Delta (kFirstDslStatusCode + 29)
19954 +#define kDslOLRRequestStatus (kFirstDslStatusCode + 30)
19955 +#define kDslOLRResponseStatus (kFirstDslStatusCode + 31)
19956 +#define kDslOLRBitGainUpdateStatus (kFirstDslStatusCode + 32)
19957 +#define kDslPwrMgrStatus (kFirstDslStatusCode + 33)
19958 +#define kDslEscapeToT1p413Status (kFirstDslStatusCode + 34)
19959 +#ifdef BCM6348_SRC
19960 +#define kDslHardwareAGCSetPga2 (kFirstDslStatusCode + 35)
19961 +#define kDslHardwareGetRcvAGC (kFirstDslStatusCode + 36)
19963 +#define kDslUpdateXmtReadPtr (kFirstDslStatusCode + 37)
19964 +#define kDslHardwareSetRcvAGC (kFirstDslStatusCode + 38)
19965 +#ifdef BCM6348_SRC
19966 +#define kDslSetDigUsPwrCutback (kFirstDslStatusCode + 39)
19969 +#define kClientSideInitiation 0
19970 +#define kClientSideRespond 1
19971 +#define kCentralSideInitiation 2
19972 +#define kCentralSideRespond 3
19974 +/* OEM parameter ID definition */
19976 +#define kDslOemG994VendorId 1
19977 +#define kDslOemG994XmtNSInfo 2
19978 +#define kDslOemG994RcvNSInfo 3
19979 +#define kDslOemEocVendorId 4
19980 +#define kDslOemEocVersion 5
19981 +#define kDslOemEocSerNum 6
19982 +#define kDslOemT1413VendorId 7
19983 +#define kDslOemT1413EocVendorId 8
19985 +typedef long dslErrorCode;
19987 +typedef long atmStatusCode;
19988 +typedef long dslFramerStatusCode;
19990 +typedef long atmErrorCode;
19992 +typedef long dslTrainingStatusCode;
19994 +#define kDslStartedG994p1 0
19995 +#define kDslStartedT1p413HS 1
19997 +/* reserved for G.994.1: 1 ~ 8 */
19999 +#define kDslG994p1MessageDet 100
20000 +#define kDslG994p1ToneDet 101
20001 +#define kDslG994p1RToneDet 102
20002 +#define kDslG994p1FlagDet 103
20003 +#define kDslG994p1GalfDet 104
20004 +#define kDslG994p1ErrorFrameDet 105
20005 +#define kDslG994p1BadFrameDet 106
20006 +#define kDslG994p1SilenceDet 107
20007 +#define kDslG994p1RcvTimeout 108
20008 +#define kDslG994p1XmtFinished 109
20009 +#define kDslG994p1ReturntoStartup 110
20010 +#define kDslG994p1InitiateCleardown 111
20011 +#define kDslG994p1StartupFinished 112
20012 +#define kDslG994p1RcvNonStandardInfo 113
20013 +#define kDslG994p1XmtNonStandardInfo 114
20015 +#define kG994p1MaxNonstdMessageLength 64
20017 +#define kDslFinishedT1p413 1100
20018 +#define kDslT1p413DetectedCTone 1101
20019 +#define kDslT1p413DetectedCAct 1102
20020 +#define kDslT1p413DetectedCReveille 1103
20021 +#define kDslT1p413DetectedRActReq 1104
20022 +#define kDslT1p413DetectedRQuiet1 1105
20023 +#define kDslT1p413DetectedRAct 1106
20024 +#define kDslT1p413TimeoutCReveille 1107
20025 +#define kDslT1p413ReturntoStartup 1108
20027 +#define kDslG994p1Timeout 8
20028 +#define kDslFinishedG994p1 9
20029 +#define kDslStartedG992p2Training 10
20030 +#define kDslG992p2DetectedPilotSymbol 11
20031 +#define kDslG992p2DetectedReverbSymbol 12
20032 +#define kDslG992p2TEQCalculationDone 13
20033 +#define kDslG992p2TrainingFEQ 14
20034 +#define kDslG992p2Phase3Started 15
20035 +#define kDslG992p2ReceivedRates1 16
20036 +#define kDslG992p2ReceivedMsg1 17
20037 +#define kDslG992p2Phase4Started 18
20038 +#define kDslG992p2ReceivedRatesRA 19
20039 +#define kDslG992p2ReceivedMsgRA 20
20040 +#define kDslG992p2ReceivedRates2 21
20041 +#define kDslG992p2ReceivedMsg2 22
20042 +#define kDslG992p2ReceivedBitGainTable 23
20043 +#define kDslG992p2TxShowtimeActive 24
20044 +#define kDslG992p2RxShowtimeActive 25
20045 +#define kDslG992p2TxAocMessage 26
20046 +#define kDslG992p2RxAocMessage 27
20047 +#define kDslG992p2TxEocMessage 28
20048 +#define kDslG992p2RxEocMessage 29
20049 +#define kDslFinishedG992p2Training 30
20050 +#define kDslRecoveredFromImpulseNoise 31
20051 +#define kDslG992Timeout 32
20052 +#define kDslT1p413Isu1SglByteSymDetected 33 /* detected T1.413 Issue 1 single byte per symbol mode */
20053 +#define kDslG992RxPrefixOnInAFewSymbols 34
20054 +#define kDslG992TxPrefixOnInAFewSymbols 35
20055 +#define kDslAnnexCXmtCPilot1Starting 36
20056 +#define kDslXmtToRcvPathDelay 37
20057 +#define kDslFeaturesUnsupported 38
20058 +#define kDslG992RcvMsgCrcError 39
20059 +#define kDslAnnexCDetectedStartHyperframe 40
20061 +#define kDslG992AnnexCTimeoutCPilot1Detection 41
20062 +#define kDslG992AnnexCTimeoutCReverb1Detection 42
20063 +#define kDslG992AnnexCTimeoutECTraining 43
20064 +#define kDslG992AnnexCTimeoutHyperframeDetector 44
20065 +#define kDslG992AnnexCTimeoutSendRSegue2 45
20066 +#define kDslG992AnnexCTimeoutDetectCSegue1 46
20067 +#define kDslG992AnnexCAlignmentErrDetected 47
20068 +#define kDslG992AnnexCTimeoutSendRSegueRA 48
20069 +#define kDslG992AnnexCTimeoutSendRSegue4 49
20070 +#define kDslG992AnnexCTimeoutCSegue2Detection 50
20071 +#define kDslG992AnnexCTimeoutCSegue3Detection 51
20072 +/* Progress report for fast retrain */
20074 +#define kG994p1EventToneDetected 54
20075 +#define kDslG992p2RcvVerifiedBitAndGain 55
20076 +#define kDslG992p2ProfileChannelResponseCalc 56
20077 +#define kDslG992AnnexCTotalFEXTBits 57
20078 +#define kDslG992AnnexCTotalNEXTBits 58
20079 +#define kDslG992AnnexCTotalFEXTCarrs 59
20080 +#define kDslG992AnnexCTotalNEXTCarrs 60
20082 +#define kDslG992p3ReceivedMsgFmt 61
20083 +#define kDslG992p3ReceivedMsgPcb 62
20085 +#define kDslG992p3AnnexLMode 63
20087 +/* performance monitoring report */
20089 +#define kG992DataRcvDetectFastRSCorrection 70
20090 +#define kG992DataRcvDetectInterleaveRSCorrection 71
20091 +#define kG992DataRcvDetectFastCRCError 72
20092 +#define kG992DataRcvDetectInterleaveCRCError 73
20093 +#define kG992DataRcvDetectFastRSError 74
20094 +#define kG992DataRcvDetectInterleaveRSError 75
20095 +#define kG992DataRcvDetectLOS 76
20096 +#define kG992DecoderDetectRDI 77
20097 +#define kG992DataRcvDetectLOSRecovery 78
20098 +#define kG992AtmDetectHEC 79
20099 +#define kG992AtmDetectOCD 180
20100 +#define kG992AtmDetectCD 181
20101 +#define kG992DecoderDetectRemoteLOS 182
20102 +#define kG992DecoderDetectRemoteLOSRecovery 183
20103 +#define kG992DecoderDetectRemoteRDI 184
20104 +#define kG992DecoderDetectRemoteRDIRecovery 185
20105 +#define kG992RcvDetectSyncSymbolOffset 186
20106 +#define kG992Upstream2xIfftDisabled 187
20107 +#if defined(G992P5)
20108 +#define kDslG992RunAnnexaP3ModeInAnnexaP5 188 /* run Annex C mode in Annex I compiled codes */
20110 +#define kDslG992RunAnnexCModeInAnnexI 188 /* run Annex C mode in Annex I compiled codes */
20113 +/* OLR PHY status */
20115 +#define kG992EventSynchSymbolDetected 189
20116 +#define kG992EventReverseSynchSymbolDetected 190
20117 +#define kG992EventL2CReverbSymbolDetected 191
20118 +#define kG992EventL2CSegueSymbolDetected 192
20121 +#define kG992EnableAnnexM 191
20123 +#define kDslAtuChangeTxFilterRequest 192
20125 +/* detailed error messages reports */
20127 +#define kDslG992XmtRReverbRAOver4000 80
20128 +#define kDslG992XmtRReverb5Over4000 81
20129 +#define kDslG992RcvCSegue2Failed 82
20130 +#define kDslG992RcvCSegueRAFailed 83
20131 +#define kDslG992RcvCSegue3Failed 84
20132 +#define kDslG992RcvShowtimeStartedTooLate 85
20133 +#define kDslG992XmtRReverb3Over4000 86
20134 +#define kDslG992RcvFailDetCSegue1InWindow 87
20135 +#define kDslG992RcvCPilot1Failed 88
20136 +#define kDslG992RcvCReverb1Failed 89
20137 +#define kG992ControlAllRateOptionsFailedErr 90
20138 +#define kG992ControlInvalidRateOptionErr 91
20139 +#define kDslG992XmtInvalidXmtDErr 92
20140 +#define kDslG992BitAndGainCalcFailed 93
20141 +#define kDslG992BitAndGainVerifyFailed 94
20143 +#define kDslT1p413RetrainToUseCorrectRAck 95
20144 +#define kDslUseAlternateTxFilter 96
20145 +#define kDslT1p413RetrainToUseCorrectIFFT 97
20147 +typedef long dslConnectInfoStatusCode;
20148 +#define kG992p2XmtToneOrderingInfo 0
20149 +#define kG992p2RcvToneOrderingInfo 1
20150 +#define kG992p2XmtCodingParamsInfo 2
20151 +#define kG992p2RcvCodingParamsInfo 3
20152 +#define kG992p2TrainingRcvCarrEdgeInfo 4
20153 +#define kG992ShowtimeMonitoringStatus 5
20154 +#define kG992MessageExchangeRcvInfo 6
20155 +#define kG992MessageExchangeXmtInfo 7
20156 +#define kG994MessageExchangeRcvInfo 8
20157 +#define kG994MessageExchangeXmtInfo 9
20159 +#define kDslATURClockErrorInfo 10
20160 +#define kDslATURcvPowerInfo 11
20161 +#define kDslATUAvgLoopAttenuationInfo 12
20162 +#define kDslHWTimeTrackingResetClockError 13
20163 +#define kDslHWTimeTrackingClockTweak 14
20164 +#define kDslATUHardwareAGCObtained 15
20165 +#define kDslTEQCoefInfo 16
20166 +#define kDslRcvCarrierSNRInfo 17
20167 +#define kDslMaxReceivableBitRateInfo 18
20168 +#define kDslHWSetDigitalEcUpdateMode 19
20169 +#define kDslHWEnableDigitalECUpdate 20
20170 +#define kDslHWDisableDigitalECUpdate 21
20171 +#define kDslHWEnableDigitalEC 22
20172 +#define kDslHWSetDigitalEcGainShift 23
20173 +#define kDslHWSetDigitalEcUpdateShift 24
20174 +#define kDslRcvPsdInfo 25
20175 +#define kDslHWdcOffsetInfo 26
20176 +#define kG994SelectedG994p1CarrierIndex 27
20177 +#define kDslSelectedTimingTone 28
20179 +#define kDslHWEnableAnalogECUpdate kDslHWSetDigitalEcUpdateMode
20180 +#define kDslHWEnableAnalogEC kDslHWDisableDigitalECUpdate
20182 +#define kG992AocMessageExchangeRcvInfo 29
20183 +#define kG992AocMessageExchangeXmtInfo 30
20184 +#define kG992AocBitswapTxStarted 31
20185 +#define kG992AocBitswapRxStarted 32
20186 +#define kG992AocBitswapTxCompleted 33
20187 +#define kG992AocBitswapRxCompleted 34
20188 +#define kDslChannelResponseLog 35
20189 +#define kDslChannelResponseLinear 36
20190 +#define kDslChannelQuietLineNoise 37
20192 +#define kDslATUCXmtPowerCutbackInfo 40
20193 +#define kDslATURXmtPowerCutbackInfo 41
20194 +#define kDslATUCXmtPowerInfo 42
20195 +#define kDslATURXmtPowerInfo 43
20197 +#define kDslFramingModeInfo 50
20198 +#define kDslG992VendorID 51
20200 +#ifdef BCM6348_SRC
20201 +#define kDslHWSetRcvFir2OutputScale 52
20204 +#define kDslSignalAttenuation 53
20205 +#define kDslAttainableNetDataRate 54
20206 +#define kDslHLinScale 55
20208 +#define kG992p3XmtCodingParamsInfo 60
20209 +#define kG992p3RcvCodingParamsInfo 61
20210 +#define kG992p3PwrStateInfo 62
20211 +#define kG992PilotToneInfo 63
20213 +#define kDslSetPilotEyeDisplay 64
20215 +#define kDslAturHwAgcResolutionMask (0xFFFFFFF8)
20216 +#define kDslAturHwAgcMinGain ((-12)<<4)
20217 +#ifndef BCM6348_SRC
20218 +#define kDslAturHwAgcMaxGain (30<<4)
20220 +#define kDslAturHwAgcMaxGain (36<<4)
20223 +#define kDslFrameStatusSend 1
20224 +#define kDslFrameStatusSendComplete 2
20225 +#define kDslFrameStatusRcv 3
20226 +#define kDslFrameStatusReturn 4
20228 +typedef struct _dslFramerStatus
20230 + dslFramerStatusCode code;
20234 + dslErrorCode error;
20242 + long nRxFrameTotal;
20243 + long nRxFrameError;
20244 + long nTxFrameTotal;
20247 + } dslFramerStatus;
20251 + dslStatusCode code;
20255 + dslErrorCode error;
20258 + atmStatusCode code;
20262 + dslErrorCode error;
20274 + long nFrameErrors;
20281 + ulong fwdPeakCellTime;
20282 + ulong backPeakCellTime;
20304 + dslFramerStatus dslPacketStatus;
20306 +#ifdef G997_1_FRAMER
20307 + dslFramerStatus g997Status;
20311 + dslTrainingStatusCode code;
20313 + } dslTrainingInfo;
20316 + dslConnectInfoStatusCode code;
20319 + } dslConnectInfo;
20322 + long maxMarginCarrier;
20323 + long maxSNRMargin;
20324 + long minMarginCarrier;
20325 + long minSNRMargin;
20326 + long avgSNRMargin;
20329 + } dslShowtimeSNRMarginInfo;
20342 + } dslClearEocMsg;
20354 + ulong nBitErrors;
20355 + ulong nBlockErrors;
20357 + ulong nAudioBits;
20358 + ulong nAudioBlocks;
20359 + ulong nAudioSyncErrors;
20360 + ulong nAudioBlockErrors;
20367 + } dslDataRegister;
20372 + } dslExternalError;
20375 + ulong numberOfCalls;
20376 + ulong txSignalChecksum;
20377 + ulong rxSignalChecksum;
20378 + ulong eyeDataChecksum;
20393 + } dslOemParameter;
20399 + dslOLRMessage dslOLRRequest;
20400 + dslPwrMessage dslPwrMsg;
20402 + } dslStatusStruct;
20404 +typedef void (SM_DECL *dslStatusHandlerType) (void *gDslVars, dslStatusStruct*);
20413 +typedef long dslCommandCode;
20414 +#define kFirstDslCommandCode 256
20415 +#define kDslIdleCmd (kFirstDslCommandCode + 0)
20416 +#define kDslIdleRcvCmd (kFirstDslCommandCode + 1)
20417 +#define kDslIdleXmtCmd (kFirstDslCommandCode + 2)
20418 +#define kDslStartPhysicalLayerCmd (kFirstDslCommandCode + 3)
20419 +#define kDslStartRetrainCmd (kFirstDslCommandCode + 4)
20420 +#define kDslSetFrameFunctions (kFirstDslCommandCode + 5)
20421 +#define kDslSendEocCommand (kFirstDslCommandCode + 6)
20422 +#define kDslWriteRemoteRegister (kFirstDslCommandCode + 7)
20423 +#define kDslReadRemoteRegister (kFirstDslCommandCode + 8)
20424 +#define kDslWriteLocalRegister (kFirstDslCommandCode + 9)
20425 +#define kDslReadLocalRegister (kFirstDslCommandCode + 10)
20426 +#define kDslStoreHardwareAGCCmd (kFirstDslCommandCode + 11)
20427 +#define kDslSetCommandHandlerCmd (kFirstDslCommandCode + 12)
20428 +#define kSetLinkLayerStatusHandlerCmd (kFirstDslCommandCode + 13)
20429 +#define kDslSetG997Cmd (kFirstDslCommandCode + 14)
20430 +#define kDslLoopbackCmd (kFirstDslCommandCode + 15)
20431 +#define kDslDiagSetupCmd (kFirstDslCommandCode + 16)
20432 +#define kDslSetDriverCallbackCmd (kFirstDslCommandCode + 17)
20433 +#define kDslDiagStopLogCmd (kFirstDslCommandCode + 18)
20434 +#define kDslDiagStartBERT (kFirstDslCommandCode + 19)
20435 +#define kDslDiagStopBERT (kFirstDslCommandCode + 20)
20436 +#define kDslPingCmd (kFirstDslCommandCode + 21)
20437 +#define kDslDyingGaspCmd (kFirstDslCommandCode + 22)
20438 +#define kDslTestCmd (kFirstDslCommandCode + 23)
20439 +#define kDslFilterSNRMarginCmd (kFirstDslCommandCode + 24)
20440 +#define kDslAtmVcMapTableChanged (kFirstDslCommandCode + 25)
20441 +#define kDslGetOemDataAddrCmd (kFirstDslCommandCode + 26)
20442 +#define kDslAtmReportHEC (kFirstDslCommandCode + 27)
20443 +#define kDslAtmReportCD (kFirstDslCommandCode + 28)
20444 +#define kDslSetXmtGainCmd (kFirstDslCommandCode + 29)
20445 +#define kDslSetStatusBufferCmd (kFirstDslCommandCode + 30)
20446 +#define kDslAfeTestCmd (kFirstDslCommandCode + 31)
20447 +#define kDslI432ResetCmd (kFirstDslCommandCode + 32)
20448 +#define kDslSetRcvGainCmd (kFirstDslCommandCode + 33)
20449 +#define kDslBypassRcvHpfCmd (kFirstDslCommandCode + 34)
20450 +#define kDslWriteAfeRegCmd (kFirstDslCommandCode + 35)
20451 +#define kDslReadAfeRegCmd (kFirstDslCommandCode + 36)
20452 +#define kDslOLRRequestCmd (kFirstDslCommandCode + 37)
20453 +#define kDslOLRResponseCmd (kFirstDslCommandCode + 38)
20454 +#define kDslI432SetScrambleCmd (kFirstDslCommandCode + 39)
20455 +#define kDslPwrMgrCmd (kFirstDslCommandCode + 40)
20456 +#define kDslAtmGfcMappingCmd (kFirstDslCommandCode + 41)
20458 +#ifdef BCM6348_SRC
20459 +#define kDslEnablePwmSyncClk (kFirstDslCommandCode + 42)
20460 +#define kDslSetPwmSyncClkFreq (kFirstDslCommandCode + 43)
20463 +#define kG994p1Duplex 1
20464 +#define kG994p1HalfDuplex 2
20466 +/* Eoc Messages from ATU-C to ATU-R */
20467 +#define kDslEocHoldStateCmd 1
20468 +#define kDslEocReturnToNormalCmd 2
20469 +#define kDslEocPerformSelfTestCmd 3
20470 +#define kDslEocRequestCorruptCRCCmd 4
20471 +#define kDslEocRequestEndCorruptCRCCmd 5
20472 +#define kDslEocNotifyCorruptCRCCmd 6
20473 +#define kDslEocNotifyEndCorruptCRCCmd 7
20474 +#define kDslEocRequestTestParametersUpdateCmd 8
20475 +#define kDslEocGrantPowerDownCmd 9
20476 +#define kDslEocRejectPowerDownCmd 10
20478 +/* Eoc Messages from ATU-R to ATU-C */
20479 +#define kDslEocRequestPowerDownCmd 11
20480 +#define kDslEocDyingGaspCmd 12
20482 +/* Clear Eoc Messages */
20483 +#define kDslClearEocFirstCmd 100
20484 +#define kDslClearEocSendFrame 100
20485 +#define kDslClearEocSendComplete 101
20486 +#define kDslClearEocRcvedFrame 102
20487 +#define kDslClearEocSendComplete2 103
20489 +#define kDslClearEocMsgLengthMask 0xFFFF
20490 +#define kDslClearEocMsgNumMask 0xFF0000
20491 +#define kDslClearEocMsgDataVolatileMask 0x1000000
20492 +#define kDslClearEocMsgDataVolatile kDslClearEocMsgDataVolatileMask
20493 +#define kDslClearEocMsgExtraSendComplete 0x2000000
20495 +/* ADSL Link Power States */
20496 +#define kDslPowerFullOn 0
20497 +#define kDslPowerLow 1
20498 +#define kDslPowerIdle 3
20500 +/* ATU-R Data Registers */
20501 +#define kDslVendorIDRegister 1
20502 +#define kDslRevisionNumberRegister 2
20503 +#define kDslSerialNumberRegister 3
20504 +#define kDslSelfTestResultsRegister 4
20505 +#define kDslLineAttenuationRegister 5
20506 +#define kDslSnrMarginRegister 6
20507 +#define kDslAturConfigurationRegister 7
20508 +#define kDslLinkStateRegister 8
20510 +#define kDslVendorIDRegisterLength 8
20511 +#define kDslRevisionNumberRegisterLength 32
20512 +#define kDslSerialNumberRegisterLength 32
20513 +#define kDslSelfTestResultsRegisterLength 1
20514 +#define kDslLineAttenuationRegisterLength 1
20515 +#define kDslSnrMarginRegisterLength 1
20516 +#define kDslAturConfigurationRegisterLength 30
20517 +#define kDslLinkStateRegisterLength 1
20519 +/* Dsl Diags setup flags */
20520 +#define kDslDiagEnableEyeData 1
20521 +#define kDslDiagEnableLogData 2
20523 +/* Dsl test commands */
20524 +typedef long dslTestCmdType;
20525 +#define kDslTestBackToNormal 0
20526 +#define kDslTestReverb 1
20527 +#define kDslTestMedley 2
20528 +#define kDslTestToneSelection 3
20529 +#define kDslTestNoAutoRetrain 4
20530 +#define kDslTestMarginTweak 5
20531 +#define kDslTestEstimatePllPhase 6
20532 +#define kDslTestReportPllPhaseStatus 7
20533 +#define kDslTestAfeLoopback 8
20534 +#define kDslTestL3 9
20535 +#define kDslTestAdsl2DiagMode 10
20536 +#define kDslTestRetL0 11
20538 +/* Xmt gain default setting */
20539 +#define kDslXmtGainAuto 0x80000000
20541 +/* Unit (AFE) test commands */
20542 +#define kDslAfeTestLoadImage 0
20543 +#define kDslAfeTestPatternSend 1
20544 +#define kDslAfeTestLoadImageOnly 2
20545 +#define kDslAfeTestPhyRun 3
20546 +#define kDslAfeTestLoadBuffer 4
20550 +#if defined(G992P1_ANNEX_I) || defined(G992P5)
20551 + ushort downstreamMinCarr, downstreamMaxCarr;
20553 + uchar downstreamMinCarr, downstreamMaxCarr;
20555 + uchar upstreamMinCarr, upstreamMaxCarr;
20558 +#if defined(G992P3) && !defined(BCM6348_SRC)
20559 +#define FAST_TEXT_TYPE
20561 +#define FAST_TEXT_TYPE FAST_TEXT
20564 +#if defined(BCM6348_SRC)
20565 +#define BCM6348_TEMP_MOVE_TO_LMEM
20567 +#define BCM6348_TEMP_MOVE_TO_LMEM
20571 +#define PRINT_DEBUG_INFO
20573 +#define PRINT_DEBUG_INFO
20578 +#define kG992p3MaxSpectBoundsUpSize 16
20579 +#define kG992p3MaxSpectBoundsDownSize 16
20581 +/* G.994 definitions */
20583 +/*** Standard Info SPar2: G.992.3 Annex A Octet 1 ***/
20585 +#define kG994p1G992p3AnnexASpectrumBoundsUpstream 0x01
20586 +#define kG994p1G992p3AnnexASpectrumShapingUpstream 0x02
20587 +#define kG994p1G992p3AnnexASpectrumBoundsDownstream 0x04
20588 +#define kG994p1G992p3AnnexASpectrumShapingDownstream 0x08
20589 +#define kG994p1G992p3AnnexATxImageAboveNyquistFreq 0x10
20590 +#define kG994p1G992p3AnnexLReachExtended 0x20
20591 +#define kG994p1G992p3AnnexMSubModePSDMasks 0x20
20593 +#define kG994p1G992p3AnnexLUpNarrowband 0x02
20594 +#define kG994p1G992p3AnnexLUpWideband 0x01
20595 +#define kG994p1G992p3AnnexLDownNonoverlap 0x01
20597 +/*** Standard Info SPar2: G.992.3 Annex A Octet 2 ***/
20599 +#define kG994p1G992p3AnnexADownOverheadDataRate 0x01
20600 +#define kG994p1G992p3AnnexAUpOverheadDataRate 0x02
20601 +#define kG994p1G992p3AnnexAMaxNumberDownTPSTC 0x04
20602 +#define kG994p1G992p3AnnexAMaxNumberUpTPSTC 0x08
20604 +/*** Standard Info SPar2: G.992.3 Annex A Octet 3,5,7,9 ***/
20606 +#define kG994p1G992p3AnnexADownSTM_TPS_TC 0x01
20607 +#define kG994p1G992p3AnnexAUpSTM_TPS_TC 0x02
20608 +#define kG994p1G992p3AnnexADownATM_TPS_TC 0x04
20609 +#define kG994p1G992p3AnnexAUpATM_TPS_TC 0x08
20610 +#define kG994p1G992p3AnnexADownPTM_TPS_TC 0x10
20611 +#define kG994p1G992p3AnnexAUpPTM_TPS_TC 0x20
20613 +/*** Standard Info SPar2: G.992.3 Annex A Octet 4,6,8,10 ***/
20615 +#define kG994p1G992p3AnnexADownPMS_TC_Latency 0x01
20616 +#define kG994p1G992p3AnnexAUpPMS_TC_Latency 0x02
20621 + * TSSI information is specified in 2 parts: subcarrier index,
20622 + * tssi value, and an indication of whether or no the tone specified
20623 + * is part of the supported set.
20625 + * The subcarrier index information is currently stored in the
20626 + * dsSubcarrierIndex array defined below. The tssi value are stored
20627 + * in the dsLog_tss array.
20629 + * The subcarrier index information only occupies the lower 12 bits
20630 + * of the available 16 bits (short type). Therefore, we will pack the
20631 + * supported set information in bit 15.
20633 +#define kG992DsSubCarrierIndexMask (0x0fff) /* AND mask to ectract ds subcarrier index */
20634 +#define kG992DsSubCarrierSuppSetMask (0x8000) /* AND mask to extract supported set indication */
20636 +#define G992GetDsSubCarrierIndex(arg) ((arg) & kG992DsSubCarrierIndexMask)
20637 +#define G992GetDsSubCarrierSuppSetIndication(arg) (((arg) & kG992DsSubCarrierSuppSetMask) >> 15)
20639 +/* Caution: Do not change anything in this structure definition, including associated constant */
20640 +/* This structure definition is used only by the driver and any change impose incompatibility issue in driver */
20641 +/* The structure following this structure (g992p3PhyDataPumpCapabilities) can be changed in PHY application */
20645 + Boolean rcvNTREnabled, shortInitEnabled, diagnosticsModeEnabled;
20647 + char featureSpectrum, featureOverhead;
20648 + char featureTPS_TC[4], featurePMS_TC[4];
20650 + short rcvNOMPSDus, rcvMAXNOMPSDus, rcvMAXNOMATPus;
20651 + short usSubcarrierIndex[kG992p3MaxSpectBoundsUpSize],
20652 + usLog_tss[kG992p3MaxSpectBoundsUpSize];
20653 + short numUsSubcarrier;
20654 + short rcvNOMPSDds, rcvMAXNOMPSDds, rcvMAXNOMATPds;
20655 + short dsSubcarrierIndex[kG992p3MaxSpectBoundsDownSize],
20656 + dsLog_tss[kG992p3MaxSpectBoundsDownSize];
20657 + short numDsSubcarrier;
20658 + uchar sizeIDFT, fillIFFT;
20659 + uchar readsl2Upstream, readsl2Downstream;
20660 + uchar minDownOverheadDataRate, minUpOverheadDataRate;
20661 + uchar maxDownSTM_TPSTC, maxDownATM_TPSTC, maxDownPTM_TPSTC;
20662 + uchar maxUpSTM_TPSTC, maxUpATM_TPSTC, maxUpPTM_TPSTC;
20664 + short minDownSTM_TPS_TC[4], maxDownSTM_TPS_TC[4],
20665 + minRevDownSTM_TPS_TC[4], maxDelayDownSTM_TPS_TC[4];
20666 + uchar maxErrorDownSTM_TPS_TC[4], minINPDownSTM_TPS_TC[4];
20667 + short minUpSTM_TPS_TC[4], maxUpSTM_TPS_TC[4],
20668 + minRevUpSTM_TPS_TC[4], maxDelayUpSTM_TPS_TC[4];
20669 + uchar maxErrorUpSTM_TPS_TC[4], minINPUpSTM_TPS_TC[4];
20671 + short maxDownPMS_TC_Latency[4], maxUpPMS_TC_Latency[4];
20672 + short maxDownR_PMS_TC_Latency[4], maxDownD_PMS_TC_Latency[4];
20673 + short maxUpR_PMS_TC_Latency[4], maxUpD_PMS_TC_Latency[4];
20675 + short minDownATM_TPS_TC[4], maxDownATM_TPS_TC[4],
20676 + minRevDownATM_TPS_TC[4], maxDelayDownATM_TPS_TC[4];
20677 + uchar maxErrorDownATM_TPS_TC[4], minINPDownATM_TPS_TC[4];
20678 + short minUpATM_TPS_TC[4], maxUpATM_TPS_TC[4],
20679 + minRevUpATM_TPS_TC[4], maxDelayUpATM_TPS_TC[4];
20680 + uchar maxErrorUpATM_TPS_TC[4], minINPUpATM_TPS_TC[4];
20682 + short minDownPTM_TPS_TC[4], maxDownPTM_TPS_TC[4],
20683 + minRevDownPTM_TPS_TC[4], maxDelayDownPTM_TPS_TC[4];
20684 + uchar maxErrorDownPTM_TPS_TC[4], minINPDownPTM_TPS_TC[4];
20685 + short minUpPTM_TPS_TC[4], maxUpPTM_TPS_TC[4],
20686 + minRevUpPTM_TPS_TC[4], maxDelayUpPTM_TPS_TC[4];
20687 + uchar maxErrorUpPTM_TPS_TC[4], minINPUpPTM_TPS_TC[4];
20689 + ushort subModePSDMasks;
20690 + } g992p3DataPumpCapabilities;
20692 +#define kG992p3p5MaxSpectBoundsUpSize 16
20693 +#define kG992p3p5MaxSpectBoundsDownSize 32
20697 + Boolean rcvNTREnabled, shortInitEnabled, diagnosticsModeEnabled;
20699 + char featureSpectrum, featureOverhead;
20700 + char featureTPS_TC[4], featurePMS_TC[4];
20702 + short rcvNOMPSDus, rcvMAXNOMPSDus, rcvMAXNOMATPus;
20703 + short usSubcarrierIndex[kG992p3p5MaxSpectBoundsUpSize],
20704 + usLog_tss[kG992p3p5MaxSpectBoundsUpSize];
20705 + short numUsSubcarrier;
20706 + short rcvNOMPSDds, rcvMAXNOMPSDds, rcvMAXNOMATPds;
20707 + short dsSubcarrierIndex[kG992p3p5MaxSpectBoundsDownSize],
20708 + dsLog_tss[kG992p3p5MaxSpectBoundsDownSize];
20709 + short numDsSubcarrier;
20710 + uchar sizeIDFT, fillIFFT;
20711 + uchar readsl2Upstream, readsl2Downstream;
20712 + uchar minDownOverheadDataRate, minUpOverheadDataRate;
20713 + uchar maxDownSTM_TPSTC, maxDownATM_TPSTC, maxDownPTM_TPSTC;
20714 + uchar maxUpSTM_TPSTC, maxUpATM_TPSTC, maxUpPTM_TPSTC;
20716 + short minDownSTM_TPS_TC[4], maxDownSTM_TPS_TC[4],
20717 + minRevDownSTM_TPS_TC[4], maxDelayDownSTM_TPS_TC[4];
20718 + uchar maxErrorDownSTM_TPS_TC[4], minINPDownSTM_TPS_TC[4];
20719 + short minUpSTM_TPS_TC[4], maxUpSTM_TPS_TC[4],
20720 + minRevUpSTM_TPS_TC[4], maxDelayUpSTM_TPS_TC[4];
20721 + uchar maxErrorUpSTM_TPS_TC[4], minINPUpSTM_TPS_TC[4];
20723 + short maxDownPMS_TC_Latency[4], maxUpPMS_TC_Latency[4];
20724 + short maxDownR_PMS_TC_Latency[4], maxDownD_PMS_TC_Latency[4];
20725 + short maxUpR_PMS_TC_Latency[4], maxUpD_PMS_TC_Latency[4];
20727 + short minDownATM_TPS_TC[4], maxDownATM_TPS_TC[4],
20728 + minRevDownATM_TPS_TC[4], maxDelayDownATM_TPS_TC[4];
20729 + uchar maxErrorDownATM_TPS_TC[4], minINPDownATM_TPS_TC[4];
20730 + short minUpATM_TPS_TC[4], maxUpATM_TPS_TC[4],
20731 + minRevUpATM_TPS_TC[4], maxDelayUpATM_TPS_TC[4];
20732 + uchar maxErrorUpATM_TPS_TC[4], minINPUpATM_TPS_TC[4];
20734 + short minDownPTM_TPS_TC[4], maxDownPTM_TPS_TC[4],
20735 + minRevDownPTM_TPS_TC[4], maxDelayDownPTM_TPS_TC[4];
20736 + uchar maxErrorDownPTM_TPS_TC[4], minINPDownPTM_TPS_TC[4];
20737 + short minUpPTM_TPS_TC[4], maxUpPTM_TPS_TC[4],
20738 + minRevUpPTM_TPS_TC[4], maxDelayUpPTM_TPS_TC[4];
20739 + uchar maxErrorUpPTM_TPS_TC[4], minINPUpPTM_TPS_TC[4];
20741 + ushort subModePSDMasks;
20742 + } g992p3PhyDataPumpCapabilities;
20747 + dslModulationType modulations;
20748 + bitMap auxFeatures;
20750 + bitMap demodCapabilities;
20751 + bitMap demodCapabilities2;
20752 + ushort noiseMargin; /* Q4 dB */
20754 + short xmtRSf, xmtRS, xmtS, xmtD;
20755 + short rcvRSf, rcvRS, rcvS, rcvD;
20757 +#ifdef G992P1_ANNEX_A
20758 + bitMap subChannelInfo;
20759 + carrierInfo carrierInfoG992p1;
20761 +#ifdef G992P1_ANNEX_B
20762 + bitMap subChannelInfoAnnexB;
20763 + carrierInfo carrierInfoG992p1AnnexB;
20765 +#ifdef G992_ANNEXC
20766 + bitMap subChannelInfoAnnexC;
20767 + carrierInfo carrierInfoG992p1AnnexC;
20769 +#if defined(G992P1_ANNEX_I)
20770 + bitMap subChannelInfoAnnexI;
20771 + carrierInfo carrierInfoG992p1AnnexI;
20774 + bitMap subChannelInfop5;
20775 + carrierInfo carrierInfoG992p5;
20777 +#if defined(G992P2) || (defined(G992P1_ANNEX_A) && defined(G992P1_ANNEX_A_USED_FOR_G992P2))
20778 + carrierInfo carrierInfoG992p2;
20780 + ushort maxDataRate;
20781 + uchar minDataRate;
20783 + g992p3DataPumpCapabilities *carrierInfoG992p3AnnexA;
20786 + g992p3DataPumpCapabilities *carrierInfoG992p5AnnexA;
20788 + } dslDataPumpCapabilities;
20790 +struct __dslCommandStruct;
20791 +typedef Boolean (*dslCommandHandlerType) (void *gDslVars, struct __dslCommandStruct*);
20792 +typedef struct __dslCommandStruct
20794 + dslCommandCode command;
20801 + dslTestCmdType type;
20806 + ulong xmtStartTone, xmtNumOfTones;
20807 + ulong rcvStartTone, rcvNumOfTones;
20808 + uchar *xmtMap, *rcvMap;
20809 + } toneSelectSpec;
20812 + long extraPowerRequestQ4dB;
20813 + long numOfCarriers;
20814 + char *marginTweakTableQ4dB;
20815 + } marginTweakSpec;
20820 + dslDirectionType direction;
20821 + dslDataPumpCapabilities capabilities;
20826 + ulong eyeConstIndex1;
20827 + ulong eyeConstIndex2;
20834 + } dslStatusBufSpec;
20838 + void *afeParamPtr;
20839 + ulong afeParamSize;
20842 + } dslAfeTestSpec;
20845 + dslLinkLayerType type;
20851 + dataRateMap rxDataRate;
20852 + dataRateMap txDataRate;
20853 + long rtDelayQ4ms;
20855 + ulong rxCellsInBuf;
20856 + ulong rxPacketNum;
20857 + dslFrameHandlerType rxIndicateHandlerPtr;
20858 + dslFrameHandlerType txCompleteHandlerPtr;
20859 + dslPhyInitType atmPhyInitPtr;
20863 + dslHeaderHandlerType rxHeaderHandlerPtr;
20864 + dslRxFrameBufferHandlerType rxDataHandlerPtr;
20865 + dslTxFrameBufferHandlerType txHandlerPtr;
20866 + } atmPhyLinkSpec;
20872 + ulong rxPacketNum;
20873 + dslFrameHandlerType rxIndicateHandlerPtr;
20874 + dslFrameHandlerType txCompleteHandlerPtr;
20875 + dslPacketPhyInitType dslPhyInitPtr;
20876 + } dslPacketLinkSpec;
20877 + dslPacketPhyFunctions dslPacketPhyLinkSpec;
20881 + txDataHandlerType txDataHandlerPtr;
20882 + rxDataHandlerType rxDataHandlerPtr;
20885 + } dslLinkLayerSpec;
20887 +#ifdef G997_1_FRAMER
20893 + ulong rxPacketNum;
20894 + dslFrameHandlerType rxIndicateHandlerPtr;
20895 + dslFrameHandlerType txCompleteHandlerPtr;
20903 + } dslClearEocMsg;
20910 + } dslDataRegister;
20913 + dslStatusHandlerType statusHandlerPtr;
20914 + dslCommandHandlerType commandHandlerPtr;
20915 + eyeHandlerType eyeHandlerPtr;
20916 + logHandlerType logHandlerPtr;
20917 +#if defined(DEBUG_DATA_HANDLER)
20918 + debugDataHandlerType debugDataHandlerPtr;
20920 + dslFrameHandlerType rxIndicateHandlerPtr;
20921 + dslFrameHandlerType txCompleteHandlerPtr;
20922 + dslDriverCallbackType driverCallback;
20924 +#if !defined(CHIP_SRC) || defined(DSL_FRAME_FUNCTIONS)
20925 + dslFrameFunctions DslFunctions;
20927 + dslOLRMessage dslOLRRequest;
20928 + dslPwrMessage dslPwrMsg;
20930 + } dslCommandStruct;
20937 + dslCommandHandlerType linkCommandHandlerPtr;
20938 + timerHandlerType linkTimerHandlerPtr;
20939 + dslLinkCloseHandlerType linkCloseHandlerPtr;
20941 + dslFrameHandlerType linkSendHandlerPtr;
20942 + dslFrameHandlerType linkReturnHandlerPtr;
20944 + dslVcAllocateHandlerType linkVcAllocateHandlerPtr;
20945 + dslVcFreeHandlerType linkVcFreeHandlerPtr;
20946 + dslVcActivateHandlerType linkVcActivateHandlerPtr;
20947 + dslVcDeactivateHandlerType linkVcDeactivateHandlerPtr;
20948 + dslVcConfigureHandlerType linkVcConfigureHandlerPtr;
20950 + dslLinkVc2IdHandlerType linkVc2IdHandlerPtr;
20951 + dslLinkVcId2VcHandlerType linkVcId2VcHandlerPtr;
20952 + dslGetFramePoolHandlerType linkGetFramePoolHandlerPtr;
20954 +#ifndef ADSLCORE_ONLY
20955 + dslHeaderHandlerType linkRxCellHeaderHandlerPtr;
20956 + dslRxFrameBufferHandlerType linkRxCellDataHandlerPtr;
20957 + dslTxFrameBufferHandlerType linkTxCellHandlerPtr;
20960 + txDataHandlerType linkTxDataHandlerPtr;
20961 + rxDataHandlerType linkRxDataHandlerPtr;
20962 + } linkLayerFunctions;
20964 +#ifndef ADSLCORE_ONLY
20966 +#define LinkLayerAssignFunctions( var, name_prefix ) do { \
20967 + (var).linkCommandHandlerPtr = name_prefix##CommandHandler; \
20968 + (var).linkTimerHandlerPtr = name_prefix##TimerHandler; \
20969 + (var).linkCloseHandlerPtr = name_prefix##CloseHandler; \
20971 + (var).linkSendHandlerPtr = name_prefix##SendFrameHandler; \
20972 + (var).linkReturnHandlerPtr = name_prefix##ReturnFrameHandler; \
20974 + (var).linkVcAllocateHandlerPtr = name_prefix##VcAllocateHandler; \
20975 + (var).linkVcFreeHandlerPtr = name_prefix##VcFreeHandler; \
20976 + (var).linkVcActivateHandlerPtr = name_prefix##VcActivateHandler; \
20977 + (var).linkVcDeactivateHandlerPtr = name_prefix##VcDeactivateHandler; \
20978 + (var).linkVcConfigureHandlerPtr = name_prefix##VcConfigureHandler; \
20980 + (var).linkVc2IdHandlerPtr = name_prefix##Vc2IdHandler; \
20981 + (var).linkVcId2VcHandlerPtr = name_prefix##VcId2VcHandler; \
20982 + (var).linkGetFramePoolHandlerPtr = name_prefix##GetFramePoolHandler; \
20984 + (var).linkRxCellHeaderHandlerPtr = name_prefix##RxCellHeaderHandler; \
20985 + (var).linkRxCellDataHandlerPtr = name_prefix##RxCellDataHandler; \
20986 + (var).linkTxCellHandlerPtr = name_prefix##TxCellHandler; \
20988 + (var).linkTxDataHandlerPtr = name_prefix##TxDataHandler; \
20989 + (var).linkRxDataHandlerPtr = name_prefix##RxDataHandler; \
20994 +#define LinkLayerAssignFunctions( var, name_prefix ) do { \
20995 + (var).linkCommandHandlerPtr = name_prefix##CommandHandler; \
20996 + (var).linkTimerHandlerPtr = name_prefix##TimerHandler; \
20997 + (var).linkCloseHandlerPtr = name_prefix##CloseHandler; \
20999 + (var).linkSendHandlerPtr = name_prefix##SendFrameHandler; \
21000 + (var).linkReturnHandlerPtr = name_prefix##ReturnFrameHandler; \
21002 + (var).linkVcAllocateHandlerPtr = name_prefix##VcAllocateHandler; \
21003 + (var).linkVcFreeHandlerPtr = name_prefix##VcFreeHandler; \
21004 + (var).linkVcActivateHandlerPtr = name_prefix##VcActivateHandler; \
21005 + (var).linkVcDeactivateHandlerPtr = name_prefix##VcDeactivateHandler; \
21006 + (var).linkVcConfigureHandlerPtr = name_prefix##VcConfigureHandler; \
21008 + (var).linkVc2IdHandlerPtr = name_prefix##Vc2IdHandler; \
21009 + (var).linkVcId2VcHandlerPtr = name_prefix##VcId2VcHandler; \
21010 + (var).linkGetFramePoolHandlerPtr = name_prefix##GetFramePoolHandler; \
21012 + (var).linkTxDataHandlerPtr = name_prefix##TxDataHandler; \
21013 + (var).linkRxDataHandlerPtr = name_prefix##RxDataHandler; \
21020 + dslFrameHandlerType rxIndicateHandlerPtr;
21021 + dslFrameHandlerType txCompleteHandlerPtr;
21022 + dslStatusHandlerType statusHandlerPtr;
21023 + } upperLayerFunctions;
21029 +#define kDslFirstDebugData 1000
21030 +#define kDslXmtPerSymTimeCompData (kDslFirstDebugData + 0)
21031 +#define kDslRcvPerSymTimeCompData (kDslFirstDebugData + 1)
21032 +#define kDslXmtAccTimeCompData (kDslFirstDebugData + 2)
21033 +#define kDslRcvAccTimeCompData (kDslFirstDebugData + 3)
21034 +#define kDslRcvPilotToneData (kDslFirstDebugData + 4)
21035 +#define kDslTEQCoefData (kDslFirstDebugData + 5)
21036 +#define kDslTEQInputData (kDslFirstDebugData + 6)
21037 +#define kDslTEQOutputData (kDslFirstDebugData + 7)
21038 +#define kDslRcvFFTInputData (kDslFirstDebugData + 8)
21039 +#define kDslRcvFFTOutputData (kDslFirstDebugData + 9)
21040 +#define kDslRcvCarrierSNRData (kDslFirstDebugData + 10)
21041 +#define kDslXmtToneOrderingData (kDslFirstDebugData + 11)
21042 +#define kDslRcvToneOrderingData (kDslFirstDebugData + 12)
21043 +#define kDslXmtGainData (kDslFirstDebugData + 13)
21044 +#define kDslRcvGainData (kDslFirstDebugData + 14)
21045 +#define kDslMseData (kDslFirstDebugData + 15)
21046 +#define kDslFEQOutErrData (kDslFirstDebugData + 16)
21047 +#define kDslFEQCoefData (kDslFirstDebugData + 17)
21048 +#define kDslShowtimeMseData (kDslFirstDebugData + 18)
21049 +#define kDslTimeEstimationHWPhaseTweak (kDslFirstDebugData + 24)
21050 +#define kDslSlicerInput (kDslFirstDebugData + 40)
21051 +#define kDslXmtConstellations (kDslFirstDebugData + 41)
21052 +#define kDslSnr1ShiftData (kDslFirstDebugData + 50)
21053 +#define kDslSnr1InputData (kDslFirstDebugData + 51)
21054 +#define kDslSnr1ReverbAvgData (kDslFirstDebugData + 52)
21055 +#define kDslAnnexCFextSnrData (kDslFirstDebugData + 53)
21056 +#define kDslAnnexCNextSnrData (kDslFirstDebugData + 54)
21057 +#define kG994p1OutputXmtSample (kDslFirstDebugData + 100)
21058 +#define kG994p1OutputMicroBit (kDslFirstDebugData + 101)
21059 +#define kG994p1OutputBit (kDslFirstDebugData + 102)
21060 +#define kG994p1OutputTimer (kDslFirstDebugData + 103)
21062 +/****************************************************************************/
21063 +/* 2. Constant definitions. */
21065 +/* 2.1 Defininitive constants */
21066 +/****************************************************************************/
21068 +/* dslDirectionType */
21073 +/* ATM setup maps */
21075 +#define kAtmCallMgrEnabled 0x00000001 /* Bit 0 */
21076 +#define kAtmAAL1FecEnabledMask 0x00000006 /* Bit 1 */
21077 +#define kAtmAAL1HiDelayFecEnabled 0x00000002 /* Bit 2 */
21078 +#define kAtmAAL1LoDelayFecEnabled 0x00000004 /* Bit 3 */
21080 +/* dslLinkLayerType */
21082 +#define kNoDataLink 0
21083 +#define kAtmLink 0x00000001
21084 +#define kAtmPhyLink 0x00000002
21085 +#define kDslPacketLink 0x00000003
21086 +#define kDslPacketPhyLink 0x00000004
21088 +/* dslModulationType */
21089 +#define kNoCommonModulation 0x00000000
21090 +#define kG994p1 0x00000020 /* G.994.1 or G.hs */
21091 +#define kT1p413 0x00000040 /* T1.413 handshaking */
21092 +#define kG992p1AnnexA 0x00000001 /* G.992.1 or G.dmt Annex A */
21093 +#define kG992p1AnnexB 0x00000002 /* G.992.1 or G.dmt Annex B */
21094 +#define kG992p1AnnexC 0x00000004 /* G.992.1 or G.dmt Annex C */
21095 +#define kG992p2AnnexAB 0x00000008 /* G.992.2 or G.lite Annex A/B */
21096 +#define kG992p2AnnexC 0x00000010 /* G.992.2 or G.lite Annex C */
21097 +#define kG992p3AnnexA 0x00000100 /* G.992.3 or G.DMTbis Annex A */
21098 +#define kG992p3AnnexB 0x00000200 /* G.992.3 or G.DMTbis Annex A */
21099 +#define kG992p1AnnexI 0x00000400 /* G.992.1 Annex I */
21100 +#define kG992p5AnnexA 0x00010000 /* G.992.5 Annex A */
21101 +#define kG992p5AnnexB 0x00020000 /* G.992.5 Annex B */
21102 +#define kG992p5AnnexI 0x00040000 /* G.992.5 Annex I */
21103 +#define kG992p3AnnexM 0x00080000 /* G.992.3 Annex M */
21104 +#define kG992p5AnnexM 0x01000000 /* G.992.5 Annex M */
21106 +/* demodCapabilities bitmap */
21107 +#define kEchoCancellorEnabled 0x00000001
21108 +#define kSoftwareTimeErrorDetectionEnabled 0x00000002
21109 +#define kSoftwareTimeTrackingEnabled 0x00000004
21110 +#define kDslTrellisEnabled 0x00000008
21111 +#define kHardwareTimeTrackingEnabled 0x00000010
21112 +#define kHardwareAGCEnabled 0x00000020
21113 +#define kDigitalEchoCancellorEnabled 0x00000040
21114 +#define kReedSolomonCodingEnabled 0x00000080
21115 +#define kAnalogEchoCancellorEnabled 0x00000100
21116 +#define kT1p413Issue1SingleByteSymMode 0x00000200
21117 +#define kDslAturXmtPowerCutbackEnabled 0x00000400
21118 +#ifdef G992_ANNEXC_LONG_REACH
21119 +#define kDslAnnexCPilot48 0x00000800
21120 +#define kDslAnnexCReverb33_63 0x00001000
21122 +#ifdef G992_ANNEXC
21123 +#define kDslCentilliumCRCWorkAroundEnabled 0x00002000
21125 +#define kDslEnableRoundUpDSLoopAttn 0x00002000
21127 +#define kDslBitSwapEnabled 0x00004000
21128 +#define kDslADILowRateOptionFixDisabled 0x00008000
21129 +#define kDslAnymediaGSPNCrcFixEnabled 0x00010000
21130 +#define kDslMultiModesPreferT1p413 0x00020000
21131 +#define kDslT1p413UseRAck1Only 0x00040000
21132 +#define kDslUE9000ADI918FECFixEnabled 0x00080000
21133 +#define kDslG994AnnexAMultimodeEnabled 0x00100000
21134 +#define kDslATUCXmtPowerMinimizeEnabled 0x00200000
21135 +#define kDropOnDataErrorsDisabled 0x00400000
21136 +#define kDslSRAEnabled 0x00800000
21138 +#define kDslT1p413HigherToneLevelNeeded 0x01000000
21139 +#define kDslT1p413SubsampleAlignmentEnabled 0x02000000
21140 +#define kDslT1p413DisableUpstream2xIfftMode 0x04000000
21142 +/* test mode related demodCapabilities, for internal use only */
21143 +#define kDslTestDemodCapMask 0xF8000000
21144 +#define kDslSendReverbModeEnabled 0x10000000
21145 +#define kDslSendMedleyModeEnabled 0x20000000
21146 +#define kDslAutoRetrainDisabled 0x40000000
21147 +#define kDslPllWorkaroundEnabled 0x80000000
21148 +#define kDslAfeLoopbackModeEnabled 0x08000000
21150 +/* demodCapabilities bitmap2 */
21152 +#define kDslAnnexCProfile1 0x00000001
21153 +#define kDslAnnexCProfile2 0x00000002
21154 +#define kDslAnnexCProfile3 0x00000004
21155 +#define kDslAnnexCProfile4 0x00000008
21156 +#define kDslAnnexCProfile5 0x00000010
21157 +#define kDslAnnexCProfile6 0x00000020
21158 +#define kDslAnnexCPilot64 0x00000040
21159 +#define kDslAnnexCPilot48 0x00000080
21160 +#define kDslAnnexCPilot32 0x00000100
21161 +#define kDslAnnexCPilot16 0x00000200
21162 +#define kDslAnnexCA48B48 0x00000400
21163 +#define kDslAnnexCA24B24 0x00000800
21164 +#define kDslAnnexCReverb33_63 0x00001000
21165 +#define kDslAnnexCCReverb6_31 0x00002000
21167 +#define kDslAnnexIShapedSSVI 0x00004000
21168 +#define kDslAnnexIFlatSSVI 0x00008000
21170 +#define kDslAnnexIPilot64 0x00010000
21171 +#define kDslAnnexIA48B48 0x00020000
21172 +#define kDslAnnexIPilot128 0x00040000
21173 +#define kDslAnnexIPilot96 0x00080000
21175 +/* Features bitmap */
21176 +#define kG992p2RACK1 0x00000001
21177 +#define kG992p2RACK2 0x00000002
21178 +#define kG992p2DBM 0x00000004
21179 +#define kG992p2FastRetrain 0x00000008
21180 +#define kG992p2RS16 0x00000010
21181 +#define kG992p2ClearEOCOAM 0x00000020
21182 +#define kG992NTREnabled 0x00000040
21183 +#define kG992p2EraseAllStoredProfiles 0x00000080
21184 +#define kG992p2FeaturesNPar2Mask 0x0000003B
21185 +#define kG992p2FeaturesNPar2Shift 0
21187 +#define kG992p1RACK1 0x00000100
21188 +#define kG992p1RACK2 0x00000200
21189 +#define kG992p1STM 0x00000800
21190 +#define kG992p1ATM 0x00001000
21191 +#define kG992p1ClearEOCOAM 0x00002000
21192 +#define kG992p1FeaturesNPar2Mask 0x00003B00
21193 +#define kG992p1FeaturesNPar2Shift 8
21194 +#define kG992p1DualLatencyUpstream 0x00004000
21195 +#define kG992p1DualLatencyDownstream 0x00008000
21196 +#define kG992p1HigherBitRates 0x40000000
21198 +#if defined(G992P1_ANNEX_I)
21199 +#define kG992p1HigherBitRates1over3 0x80000000
21200 +#define kG992p1AnnexIShapedSSVI 0x00000001
21201 +#define kG992p1AnnexIFlatSSVI 0x00000002
21202 +#define kG992p1AnnexIPilotFlag 0x00000008
21203 +#define kG992p1AnnexIPilot64 0x00000001
21204 +#define kG992p1AnnexIPilot128 0x00000004
21205 +#define kG992p1AnnexIPilot96 0x00000008
21206 +#define kG992p1AnnexIPilotA48B48 0x00000010
21209 +#define kG992p1AnnexBRACK1 0x00010000
21210 +#define kG992p1AnnexBRACK2 0x00020000
21211 +#define kG992p1AnnexBUpstreamTones1to32 0x00040000
21212 +#define kG992p1AnnexBSTM 0x00080000
21213 +#define kG992p1AnnexBATM 0x00100000
21214 +#define kG992p1AnnexBClearEOCOAM 0x00200000
21215 +#define kG992p1AnnexBFeaturesNPar2Mask 0x003F0000
21216 +#define kG992p1AnnexBFeaturesNPar2Shift 16
21218 +#define kG992p1AnnexCRACK1 0x01000000
21219 +#define kG992p1AnnexCRACK2 0x02000000
21220 +#define kG992p1AnnexCDBM 0x04000000
21221 +#define kG992p1AnnexCSTM 0x08000000
21222 +#define kG992p1AnnexCATM 0x10000000
21223 +#define kG992p1AnnexCClearEOCOAM 0x20000000
21224 +#define kG992p1AnnexCFeaturesNPar2Mask 0x3F000000
21225 +#define kG992p1AnnexCFeaturesNPar2Shift 24
21227 +#define kG992p1HigherBitRates1over3 0x80000000
21229 +/* auxFeatures bitmap */
21230 +#define kG994p1PreferToExchangeCaps 0x00000001
21231 +#define kG994p1PreferToDecideMode 0x00000002
21232 +#define kG994p1PreferToMPMode 0x00000004
21233 +#define kAfePwmSyncClockShift 3
21234 +#define kAfePwmSyncClockMask (0xF << kAfePwmSyncClockShift)
21235 +#define AfePwmSyncClockEnabled(val) (((val) & kAfePwmSyncClockMask) != 0)
21236 +#define AfePwmGetSyncClockFreq(val) ((((val) & kAfePwmSyncClockMask) >> kAfePwmSyncClockShift) - 1)
21237 +#define AfePwmSetSyncClockFreq(val,freq) ((val) |= ((((freq)+1) << kAfePwmSyncClockShift) & kAfePwmSyncClockMask))
21239 +/* SubChannel Info bitMap for G992p1 */
21240 +#define kSubChannelASODownstream 0x00000001
21241 +#define kSubChannelAS1Downstream 0x00000002
21242 +#define kSubChannelAS2Downstream 0x00000004
21243 +#define kSubChannelAS3Downstream 0x00000008
21244 +#define kSubChannelLSODownstream 0x00000010
21245 +#define kSubChannelLS1Downstream 0x00000020
21246 +#define kSubChannelLS2Downstream 0x00000040
21247 +#define kSubChannelLS0Upstream 0x00000080
21248 +#define kSubChannelLS1Upstream 0x00000100
21249 +#define kSubChannelLS2Upstream 0x00000200
21250 +#define kSubChannelInfoOctet1Mask 0x0000001F
21251 +#define kSubChannelInfoOctet2Mask 0x000003E0
21252 +#define kSubChannelInfoOctet1Shift 0
21253 +#define kSubChannelInfoOctet2Shift 5
21255 +/****************************************************************************/
21256 +/* 3. Interface functions. */
21258 +/****************************************************************************/
21261 +#if defined(G992P1_ANNEX_I2X) || defined(G992P5)
21263 +#define kDslSamplingFreq 4416000
21264 +#define kDslMaxFFTSize 1024
21265 +#define kDslMaxFFTSizeShift 10
21266 +#elif defined(G992P1_ANNEX_I4X)
21267 +#define kDslSamplingFreq 8832000
21268 +#define kDslMaxFFTSize 2048
21269 +#define kDslMaxFFTSizeShift 11
21270 +#elif defined(G992P1_ANNEX_I8X)
21271 +#define kDslSamplingFreq 17664000
21272 +#define kDslMaxFFTSize 4096
21273 +#define kDslMaxFFTSizeShift 12
21275 +#define kDslSamplingFreq 2208000
21276 +#define kDslMaxFFTSize 512
21277 +#define kDslMaxFFTSizeShift 9
21280 +#define kDslSamplingFreq 1104000
21281 +#define kDslMaxFFTSize 256
21282 +#define kDslMaxFFTSizeShift 8
21285 +#if defined(G992_ATUR_UPSTREAM_SAMPLING_FREQ_276KHZ)
21286 +#define kDslATURUpstreamSamplingFreq 276000
21287 +#define kDslATURFFTSizeShiftUpstream 6
21288 +#elif defined(G992_ATUR_UPSTREAM_SAMPLING_FREQ_552KHZ)
21289 +#define kDslATURUpstreamSamplingFreq 552000
21290 +#define kDslATURFFTSizeShiftUpstream 7
21292 +#define kDslATURUpstreamSamplingFreq kDslSamplingFreq
21293 +#define kDslATURFFTSizeShiftUpstream kDslMaxFFTSizeShift
21296 +#if defined(G992_ATUC_UPSTREAM_SAMPLING_FREQ_276KHZ)
21297 +#define kDslATUCUpstreamSamplingFreq 276000
21298 +#define kDslATUCFFTSizeShiftUpstream 6
21299 +#elif defined(G992_ATUC_UPSTREAM_SAMPLING_FREQ_552KHZ)
21300 +#define kDslATUCUpstreamSamplingFreq 552000
21301 +#define kDslATUCFFTSizeShiftUpstream 7
21303 +#define kDslATUCUpstreamSamplingFreq kDslSamplingFreq
21304 +#define kDslATUCFFTSizeShiftUpstream kDslMaxFFTSizeShift
21307 +#define kDslMaxSamplesPerSymbol (kDslMaxFFTSize+kDslMaxFFTSize/16)
21309 +#if defined(G992P1_ANNEX_I) || defined(G992P5)
21310 +#define kDslMaxTEQLength 32
21312 +#define kDslMaxTEQLength 16
21315 +#define kDslMaxSymbolBlockSize 1
21316 +#define kDslMaxSampleBlockSize (kDslMaxSymbolBlockSize*kDslMaxSamplesPerSymbol)
21318 +#ifdef G992_ANNEXC
21319 +#define kG992AnnexCXmtToRcvPathDelay 512 /* In samples at kDslSamplingFreq */
21322 +/*** For compatibility with existing test codes ***/
21323 +#if !defined(TARG_OS_RTEMS)
21324 +typedef dslStatusCode modemStatusCode;
21325 +typedef dslStatusStruct modemStatusStruct;
21326 +typedef dslStatusHandlerType statusHandlerType;
21327 +typedef dslCommandCode modemCommandCode;
21328 +typedef dslCommandStruct modemCommandStruct;
21329 +typedef dslCommandHandlerType commandHandlerType;
21332 +extern void SM_DECL SoftDslSetRefData (void *gDslVars, ulong refData);
21333 +extern ulong SM_DECL SoftDslGetRefData (void *gDslVars);
21334 +extern int SM_DECL SoftDslGetMemorySize(void);
21335 +extern void SM_DECL SoftDslInit (void *gDslVars);
21336 +extern void SM_DECL SoftDslReset (void *gDslVars);
21337 +extern void SM_DECL SoftDslLineHandler (void *gDslVars, int rxNSamps, int txNSamps, short *rcvPtr, short *xmtPtr) FAST_TEXT;
21338 +extern Boolean SM_DECL SoftDslCommandHandler (void *gDslVars, dslCommandStruct *cmdPtr);
21340 +/* swap Lmem functions */
21341 +#if defined(bcm47xx) && defined(SWAP_LMEM)
21342 +extern int SoftDslSwapLmem(void *gDslVars, int sectionN, int imageN);
21343 +extern void init_SoftDslSwapLmem(void);
21346 +/* SoftDsl time functions */
21348 +extern ulong SM_DECL SoftDslGetTime(void *gDslVars);
21349 +#define __SoftDslGetTime(gv) gDslGlobalVarPtr->execTime
21351 +extern void SM_DECL SoftDslTimer(void *gDslVars, ulong timeMs);
21353 +/* SoftDsl IO functions */
21355 +extern void SM_DECL SoftDslClose (void *gDslVars);
21356 +extern int SM_DECL SoftDslSendFrame (void *gDslVars, void *pVc, ulong mid, dslFrame * pFrame);
21357 +extern int SM_DECL SoftDslReturnFrame (void *gDslVars, void *pVc, ulong mid, dslFrame * pFrame);
21359 +/* SoftDsl connection functions */
21361 +extern void* SM_DECL SoftDslVcAllocate(void *gDslVars, dslVcParams *pVcParams);
21362 +extern void SM_DECL SoftDslVcFree(void *gDslVars, void *pVc);
21363 +extern Boolean SM_DECL SoftDslVcActivate(void *gDslVars, void *pVc);
21364 +extern void SM_DECL SoftDslVcDeactivate(void *gDslVars, void *pVc);
21365 +extern Boolean SM_DECL SoftDslVcConfigure(void *gDslVars, void *pVc, ulong mid, dslVcParams *pVcParams);
21367 +/* Special functions for LOG support */
21369 +extern ulong SM_DECL SoftDslVc2Id(void *gDslVars, void *pVc);
21370 +extern void* SM_DECL SoftDslVcId2Vc(void *gDslVars, ulong vcId);
21371 +extern void* SM_DECL SoftDslGetFramePool(void *gDslVars);
21373 +/* Functions for host mode execution */
21375 +extern void* SM_DECL SoftDslRxCellHeaderHandler (void *gDslVars, ulong hdr, uchar hdrHec);
21376 +extern void* SM_DECL SoftDslRxCellDataHandler (void *gDslVars, int, void*);
21377 +extern void* SM_DECL SoftDslTxCellHandler (void *gDslVars, int*, void*);
21378 +extern Boolean SM_DECL SoftDslPhyCommandHandler (void *gDslVars, dslCommandStruct *cmdPtr);
21380 +/* Functions getting OEM parameters including G994 non standard info management */
21382 +extern char* SM_DECL SoftDslGetTrainingVendorIDString(void *gDslVars);
21383 +extern char* SM_DECL SoftDslGetVendorIDString(void *gDslVars);
21384 +extern char* SM_DECL SoftDslGetSerialNumberString(void *gDslVars);
21385 +extern char* SM_DECL SoftDslGetRevString(void *gDslVars);
21386 +extern int SM_DECL SoftDslRevStringSize(void *gDslVars);
21387 +extern int SM_DECL SoftDslSerNumStringSize(void *gDslVars);
21389 +extern void* SM_DECL SoftDslGetG994p1RcvNonStdInfo(void *gDslVars, ulong *pLen);
21390 +extern void* SM_DECL SoftDslGetG994p1XmtNonStdInfo(void *gDslVars, ulong *pLen);
21392 +#ifdef G997_1_FRAMER
21394 +/* G997 functions */
21396 +extern int SM_DECL SoftDslG997SendFrame (void *gDslVars, void *pVc, ulong mid, dslFrame * pFrame);
21397 +extern int SM_DECL SoftDslG997ReturnFrame (void *gDslVars, void *pVc, ulong mid, dslFrame * pFrame);
21402 +extern void * SM_DECL SoftDslMibGetData (void *gDslVars, int dataId, void *pAdslMibData);
21405 +#define SoftDsl SoftDslLineHandler
21406 +#define kSoftDslMaxMemorySize (32768*16384)
21409 + * Internal functions
21412 +extern void SoftDslStatusHandler (void *gDslVars, dslStatusStruct *status) FAST_TEXT;
21413 +extern void SoftDslInternalStatusHandler (void *gDslVars, dslStatusStruct *status);
21416 + * DSL OS functions
21421 +#define SoftDslIsBgAvailable(gDslVars) (DSLOS_THREAD_INACTIVE == DslOsGetThreadState(&(gDslGlobalVarPtr->tcbDslBg)))
21422 +#define SoftDslGetBgThread(gDslVars) \
21423 + ((DSLOS_THREAD_INACTIVE != DslOsGetThreadState(&(gDslGlobalVarPtr->tcbDslBg))) ? &gDslGlobalVarPtr->tcbDslBg : NULL)
21424 +#define SoftDslBgStart(gDslVars, pFunc) \
21425 + DslOsCreateThread(&gDslGlobalVarPtr->tcbDslBg, DSLOS_PRIO_HIGHEST - 10, pFunc, gDslVars, \
21426 + WB_ADDR(gDslGlobalVarPtr->bgStack), sizeof(gDslGlobalVarPtr->bgStack))
21427 +#define SoftDslBgStop(gDslVars) DslOsDeleteThread(&gDslGlobalVarPtr->tcbDslBg)
21429 +#define SoftDslEnterCritical() DslOsEnterCritical()
21430 +#define SoftDslLeaveCritical(id) DslOsLeaveCritical(id)
21434 +#define SoftDslIsBgAvailable(gDslVars) 1
21435 +#define SoftDslGetBgThread(gDslVars) 1
21436 +#define SoftDslBgStart(gDslVars, pFunc) (*pFunc)(gDslVars)
21437 +#define SoftDslBgStop(gDslVars)
21439 +#define SoftDslEnterCritical() 0
21440 +#define SoftDslLeaveCritical(id)
21445 + * DSL frames and native frame functions
21448 +DslFrameDeclareFunctions (DslFrameNative)
21451 + * These functions are for testing purpose, they are defined outside.
21453 +#ifdef STACK_SIZE_REQUIREMENT_TEST
21454 +extern void StackSizeTestInitializeStackBeforeEntry(void);
21455 +extern void StackSizeTestCheckStackAfterExit(void);
21456 +extern void StackSizeTestBackupStack(void);
21457 +extern void StackSizeTestRestoreStack(void);
21458 +#endif /* STACK_SIZE_REQUIREMENT_TEST */
21460 +#ifdef NEC_NSIF_WORKAROUND
21461 +#define SoftDslGetG994NsStatus(gDslVars) (gDslGlobalVarPtr->G994NsStatus)
21462 +#define SoftDslGetG994NsFailCounter(gDslVars) (gDslGlobalVarPtr->G994NsFailCounter)
21465 +#endif /* SoftDslHeader */
21466 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/SoftModem.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/SoftModem.h
21467 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/SoftModem.h 1970-01-01 01:00:00.000000000 +0100
21468 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/SoftModem.h 2006-06-26 09:07:10.000000000 +0200
21471 +<:copyright-broadcom
21473 + Copyright (c) 2002 Broadcom Corporation
21474 + All Rights Reserved
21475 + No portions of this material may be reproduced in any form without the
21476 + written permission of:
21477 + Broadcom Corporation
21478 + 16215 Alton Parkway
21479 + Irvine, California 92619
21480 + All information contained in this document is Broadcom Corporation
21481 + company private, proprietary, and trade secret.
21485 +/****************************************************************************
21491 + * This file contains the exported interface for SoftModem.c
21494 + * Copyright (c) 1993-1998 AltoCom, Inc. All rights reserved.
21495 + * Authors: Mark Gonikberg, Haixiang Liang.
21497 + * $Revision: 1.16 $
21499 + * $Id: SoftModem.h,v 1.16 2004/04/14 21:16:51 ilyas Exp $
21501 + * $Log: SoftModem.h,v $
21502 + * Revision 1.16 2004/04/14 21:16:51 ilyas
21503 + * Merged with the latest changes in ADSL driver
21505 + * Revision 1.15 2004/04/13 00:56:10 ilyas
21506 + * Merged the latest ADSL driver changes for RTEMS
21508 + * Revision 1.14 2004/04/13 00:16:59 ilyas
21509 + * Merged the latest ADSL driver changes
21511 + * Revision 1.13 2003/02/22 05:07:11 ilyas
21512 + * Added VendorID for T1.413 mode
21514 + * Revision 1.12 2002/10/03 19:34:24 ilyas
21515 + * Added size for EOC serial number register
21517 + * Revision 1.11 2002/09/07 01:37:22 ilyas
21518 + * Added support for OEM parameters
21520 + * Revision 1.10 2001/12/13 02:25:34 ilyas
21521 + * Added definitions for G997
21523 + * Revision 1.9 2001/11/30 05:56:34 liang
21524 + * Merged top of the branch AnnexBDevelopment onto top of the tree.
21526 + * Revision 1.7.2.2 2001/11/27 02:32:05 liang
21527 + * Combine vendor ID, serial #, and version number into SoftModemVersionNumber.c.
21529 + * Revision 1.7.2.1 2001/10/03 01:44:10 liang
21530 + * Merged with codes from main tree (tag SoftDsl_2_18).
21532 + * Revision 1.8 2001/09/21 19:19:01 ilyas
21533 + * Minor fixes for VxWorks build
21535 + * Revision 1.7 2000/07/17 21:08:16 lkaplan
21536 + * removed global pointer
21538 + * Revision 1.6 2000/05/03 04:09:11 ilyas
21539 + * Added ID for ATM log data
21541 + * Revision 1.5 2000/04/01 01:07:44 liang
21542 + * Changed file names and some module names.
21544 + * Revision 1.4 2000/03/02 20:18:12 ilyas
21545 + * Added test status code for ATM VC finished
21547 + * Revision 1.3 1999/08/05 20:02:11 liang
21548 + * Merged with the softmodem top of the tree on 08/04/99.
21550 + * Revision 1.2 1999/01/27 22:19:08 liang
21551 + * Merge with SoftModem_3_1_02.
21552 + * Include SoftDsl.h conditionlly so that the test utilities from SoftModem
21553 + * can be used without major change. It can be merged easily to SoftModem.
21555 + * Revision 1.170 1998/12/22 00:52:52 liang
21556 + * Added auxFeatures bit kV8HoldANSamUntilDetCI. When it is set, ANSam won't be
21557 + * sent until CI is detected (normally ANSam will be sent after 200ms). This is
21558 + * useful in V34 half duplex fax mode.
21560 + * Revision 1.169 1998/12/19 04:46:52 mwg
21561 + * Added bits for fax/data calling tones
21563 + * Revision 1.168 1998/12/17 02:46:10 scott
21564 + * Removed overlay-related commands/statuses and added
21565 + * kSetTrainingDelayReductionCmd
21567 + * Revision 1.167 1998/12/12 03:17:42 scott
21568 + * Added overlay commands and statuses
21570 + * Revision 1.166 1998/12/02 05:34:23 mwg
21571 + * Fixed a problem with bong tone detection
21573 + * Revision 1.165 1998/11/26 00:22:44 yura
21574 + * Added two more log data types: modulatorInputData & modulatorOutputData
21576 + * Revision 1.164 1998/11/19 03:08:04 mwg
21577 + * Added kSetCallProgressParamsCmd
21579 + * Revision 1.163 1998/11/18 23:00:03 liang
21580 + * Added a separate command kLoopbackTestAutoRespEnableCmd to enable or disable
21581 + * the loopback test auto respond feature when the modem is already on-line.
21583 + * Revision 1.162 1998/11/13 20:50:21 scott
21584 + * SoftModemInternalStatusHandler is now SM_DECL as well
21586 + * Revision 1.161 1998/11/13 20:42:25 scott
21587 + * Added SM_DECL type to entrypoint functions
21589 + * Revision 1.160 1998/11/13 03:02:54 scott
21590 + * Added SoftModemTimer prototype.
21591 + * Also include V.8bis types if AT_COMMANDS_V8BIS is defined.
21593 + * Revision 1.159 1998/11/12 01:22:46 scott
21594 + * Increased number of AT registers to 46
21596 + * Revision 1.158 1998/11/05 22:35:18 yura
21597 + * Added two more S-registers
21599 + * Revision 1.157 1998/11/05 03:09:54 mwg
21600 + * Added kLapmRetryFailed to the list of LAPM errors
21602 + * Revision 1.156 1998/11/05 00:13:20 liang
21603 + * Add new connectionInfo status kLoopbackSelfTestNewErrs to report
21604 + * new bit errors whenever it happens.
21606 + * Revision 1.155 1998/11/04 07:11:33 mwg
21607 + * Moved declaration for SoftModemATPrintf() to SoftModem.h
21609 + * Revision 1.154 1998/10/29 07:24:49 mwg
21610 + * *** empty log message ***
21612 + * Revision 1.153 1998/10/15 02:09:37 luisgm
21613 + * added separate data rate mask for Flex to dataPumpCapabilities structure
21615 + * Revision 1.152 1998/10/14 00:12:15 scott
21616 + * Added kMnpOOBFrameCmd and command.frameSpec
21618 + * Revision 1.151 1998/10/09 02:19:22 luisgm
21619 + * added FlexV8bisStruct member to dataPumpCapabilities struc to store flex v8bis info, added define for kFlexSkipV8bis
21621 + * Revision 1.150 1998/10/06 19:36:33 mwg
21622 + * Limited 56K rates to 53K
21624 + * Revision 1.149 1998/10/03 03:43:38 ilyas
21625 + * Added status codes for Audio
21627 + * Revision 1.148 1998/10/01 02:03:17 mwg
21628 + * Added external pulse dialer option
21630 + * Revision 1.147 1998/09/30 01:44:26 mwg
21631 + * Added new functions SoftModemGetWriteBufferSize() & SoftModemGetReadBufferSize()
21633 + * Revision 1.146 1998/09/22 03:44:38 scott
21634 + * Added ALWAYS_LONG_ALIGN() macro
21636 + * Revision 1.145 1998/09/21 21:49:22 scott
21637 + * Added logDataCodes for mnpDecoder(Input/Output)Data
21639 + * Revision 1.144 1998/08/31 22:57:21 luisgm
21640 + * added constants for Flex data rates + kFlexEventTRN2AFinished
21642 + * Revision 1.143 1998/08/18 05:09:53 mwg
21643 + * Increased AT command buffer size to 128
21645 + * Revision 1.142 1998/08/18 03:45:54 ilyas
21646 + * Integrated Audio into V70 test
21648 + * Revision 1.141 1998/08/14 17:46:04 ilyas
21649 + * Integrated Audio and G729a
21651 + * Revision 1.140 1998/08/10 21:42:19 mwg
21652 + * Added space and mark parity
21654 + * Revision 1.139 1998/08/08 03:39:33 scott
21655 + * Moved the C6xDefs and PentiumDefs includes before the internal function
21656 + * prototypes (to permit their redefinitions)
21658 + * Revision 1.138 1998/08/07 20:37:27 yura
21659 + * Added new S-register for &T commands
21661 + * Revision 1.137 1998/08/01 05:22:09 mwg
21662 + * Implemented split memory model
21664 + * Revision 1.136 1998/07/22 02:12:22 liang
21665 + * Added self test mode for loopback test.
21667 + * Revision 1.135 1998/07/21 01:19:03 liang
21668 + * Changed loopback test command parameter interface to use regular modeSpec.
21670 + * Revision 1.134 1998/07/18 03:52:10 liang
21671 + * Added V54 loop 2 test for V22.
21673 + * Revision 1.133 1998/07/15 02:45:03 mwg
21674 + * Added new connection info code: kPCMSpectralShapingBits
21676 + * Revision 1.132 1998/07/15 00:18:48 liang
21677 + * Add special turn off command for V34 fax to handle different turn off procedures.
21679 + * Revision 1.131 1998/07/13 22:19:49 liang
21680 + * Add V8 CI detection status and ANSam disable aux feature.
21682 + * Revision 1.130 1998/07/08 17:09:13 scott
21683 + * Added USE_LONG_ALIGN; support for 6 and PentiumDefs.h files
21685 + * Revision 1.129 1998/07/03 23:28:13 mwg
21686 + * Added Fax Class 2 defines
21688 + * Revision 1.128 1998/07/03 23:17:33 mwg
21689 + * Insuread command/status structures are long aligned
21691 + * Revision 1.127 1998/06/23 16:48:01 mwg
21692 + * Fixed a longstanding problem typical for Win95 VxD: whenever new
21693 + * VxD is intalled the confuguration profile may not match the old one but
21694 + * since the crc is correct it is still being downloaded. To avoid the problem
21695 + * a crc for the version number was added to avoid confusion between profiles
21696 + * of different versions.
21698 + * Revision 1.126 1998/06/19 21:04:06 liang
21699 + * Add auxiliary feature bit kV90ServerNotDetSbarAfterJdbarFix.
21701 + * Revision 1.125 1998/06/11 22:48:14 liang
21702 + * Add kPCM28000bpsShift constant.
21704 + * Revision 1.124 1998/06/05 22:11:51 liang
21705 + * New V90 DIL works through data mode.
21707 + * Revision 1.123 1998/06/01 23:03:41 liang
21708 + * Add v90RcvdDilDiffData logging.
21710 + * Revision 1.122 1998/06/01 21:24:38 mwg
21711 + * Changed some of the names.
21713 + * Revision 1.121 1998/05/13 04:55:22 mwg
21714 + * Now passing the number of spectral shaping bits in aux features
21716 + * Revision 1.120 1998/05/13 02:53:13 liang
21717 + * Add field "value" to command param structure.
21719 + * Revision 1.119 1998/05/12 04:42:23 mwg
21720 + * Replaced some of the status messages
21722 + * Revision 1.118 1998/05/11 23:36:10 mwg
21723 + * Added 8000Hz symbol rate to the map
21725 + * Revision 1.117 1998/05/05 04:28:39 liang
21726 + * V90 works up to data mode first version.
21728 + * Revision 1.116 1998/04/21 09:36:45 mwg
21729 + * Fixed a few problems for 16Khz and added 32Khz.
21731 + * Revision 1.115 1998/04/17 22:33:54 liang
21732 + * Added V90 DIL for mu-law PCM.
21734 + * Revision 1.114 1998/04/15 22:36:39 mwg
21735 + * Added new parameters to kDialCmd to allow individual control of each
21736 + * DTMF group attenuation.
21738 + * Revision 1.113 1998/04/15 18:16:22 ilyas
21739 + * Integrated V.8bis and changed coding of LinkLayerType to bitMap
21741 + * Revision 1.112 1998/04/15 07:59:06 mwg
21742 + * Added new status codes for V.90
21744 + * Revision 1.111 1998/04/11 00:29:16 mwg
21745 + * Fixed the warnings which appeared when Irix builds were upgraded to
21748 + * Revision 1.110 1998/04/11 00:25:01 ilyas
21749 + * More V.70 statuses
21751 + * Revision 1.109 1998/04/10 23:29:31 mwg
21752 + * Added new field to capabilities: dataRates56K
21754 + * Revision 1.108 1998/04/09 02:02:56 mwg
21755 + * Added status for Ja detection.
21757 + * Revision 1.107 1998/04/03 02:05:30 ilyas
21758 + * More V.70 commands added
21760 + * Revision 1.106 1998/04/02 06:15:39 mwg
21761 + * Added coding type (Mu-law/A-law) status reporting.
21763 + * Revision 1.105 1998/03/30 09:53:57 mwg
21764 + * Added definition for k56Flex modulation for future use.
21766 + * Revision 1.104 1998/03/27 17:56:09 ilyas
21767 + * Added definitions for V.70
21769 + * Revision 1.103 1998/03/26 23:29:04 liang
21770 + * Added first version of IMD estimation.
21772 + * Revision 1.102 1998/03/20 04:37:26 mwg
21773 + * Increased the size of the nominal variance to 32 bit.
21775 + * Revision 1.101 1998/03/06 01:22:04 yura
21776 + * Improved Win95 VxD segmentation handling
21778 + * Revision 1.100 1998/03/06 01:06:18 liang
21779 + * Add initial version of V90 phase 1 and 2.
21781 + * Revision 1.99 1998/03/05 23:42:22 mwg
21782 + * (hxl) Implemented enable/disable call waiting command.
21784 + * Revision 1.98 1998/02/26 06:13:06 mwg
21785 + * Increased the number of AT S-registers to account for newly introduced
21788 + * Revision 1.97 1998/02/25 18:18:25 scott
21789 + * Added v42bisCycleCount for V42BIS_THROUGHPUT_CONTROL
21791 + * Revision 1.96 1998/02/24 05:31:20 mwg
21792 + * Added stuff required by international version of AT command processor.
21794 + * Revision 1.95 1998/02/17 01:14:10 scott
21795 + * Reenabled sys/types.h for Linux builds
21797 + * Revision 1.94 1998/02/16 22:32:23 scott
21798 + * Changed copyright notice
21800 + * Revision 1.93 1998/02/16 22:17:44 scott
21801 + * Turned off include of sys/types.h for normal builds
21803 + * Revision 1.92 1998/02/16 21:53:28 scott
21804 + * Exclude sys/types.h for another compiler
21806 + * Revision 1.91 1998/02/09 18:24:10 scott
21807 + * Fixed ComplexShort type to work around bugs in MS and GreenHill compilers
21809 + * Revision 1.90 1998/01/27 01:37:36 mwg
21810 + * Added new log identifier for pcm infidelity data.
21812 + * Revision 1.89 1998/01/22 19:49:32 liang
21813 + * Add auxFeature bit kFaxV34HDXAllowAsymCtrlChan.
21815 + * Revision 1.88 1998/01/21 02:32:01 liang
21816 + * Add more V34 half duplex training progress codes.
21818 + * Revision 1.87 1997/12/23 03:28:25 liang
21819 + * Add more half duplex V34 related constants.
21821 + * Revision 1.86 1997/12/18 19:38:50 scott
21822 + * Added agcData log type.
21823 + * Added kDisableFaxFastClearDown demod capability
21825 + * Revision 1.85 1997/12/18 06:02:45 mwg
21826 + * Added a function to reenable DC offset tracking.
21828 + * Revision 1.84 1997/12/17 22:46:30 mwg
21829 + * Minor modifications to X2 escape status reporting.
21831 + * Revision 1.83 1997/12/16 06:49:45 mwg
21832 + * Implemented proper data rate reporting for PCM modem.
21834 + * Revision 1.82 1997/12/13 06:11:08 mwg
21835 + * Added X2 interface hooks
21837 + * Revision 1.81 1997/12/02 06:21:33 mwg
21838 + * Implemented kSetATRegister command.
21840 + * Revision 1.80 1997/11/27 02:11:41 liang
21841 + * Add code for half duplex V34 control channel.
21843 + * Revision 1.79 1997/11/19 19:52:48 guy
21844 + * Added constant to define V.34 half duplex operation
21846 + * Revision 1.78 1997/10/24 05:15:53 scott
21847 + * Added AGC and phase hit recovery to demodCapabilities
21849 + * Revision 1.77 1997/10/01 02:47:50 liang
21850 + * Add PCM interface.
21852 + * Revision 1.76 1997/09/29 15:48:04 yura
21853 + * Added #pragma statement for W95 Vxd
21855 + * Revision 1.75 1997/09/18 20:32:39 scott
21856 + * Do not include VxD support files if GENERATE_DEPENDENCIES is defined.
21858 + * Revision 1.74 1997/09/18 12:40:55 yura
21859 + * Removed #ifdef statments to be more robust
21861 + * Revision 1.73 1997/09/17 17:32:41 scott
21862 + * Do not include sys/types.h for 6
21864 + * Revision 1.72 1997/08/08 00:53:48 mwg
21865 + * Added fields for LAP-M frames printout.
21866 + * Added fields in auxFeatures to pass preemphasis filter parameters
21867 + * to V.34 phase 3 when doing PTT testing.
21869 + * Revision 1.71 1997/08/06 03:41:45 yura
21870 + * Added a few includes and defines needed by Win 95 driver.
21872 + * Revision 1.70 1997/08/05 03:22:10 liang
21873 + * Add equalizer center tap adjustment calculation related constants.
21875 + * Revision 1.69 1997/07/29 02:44:19 mwg
21876 + * Added new field to dataPumpCapabilities structure. This field is not
21877 + * yet exposed to external interface and currently is only used to
21878 + * enable PTT testing.
21879 + * Added new commands: kStartDataModemPTTTestCmd & kStartDataModemLoopbackTestCmd
21881 + * Revision 1.68 1997/07/22 22:05:10 liang
21882 + * Change sample rate setup as a normal command.
21884 + * Revision 1.67 1997/07/21 23:23:30 liang
21885 + * Define SoftModemSetSampleRate as null when SAMPLE_RATE_CONVERSION is not defined.
21887 + * Revision 1.66 1997/07/21 22:38:36 liang
21888 + * Change sample rate converter structure so that sample rate can be changed
21889 + * on the fly (at very begining) to either 8KHz or 9600Hz.
21891 + * Revision 1.65 1997/07/21 20:22:01 mwg
21892 + * Added statusInfoData to the log identifiers.
21894 + * Revision 1.64 1997/07/16 20:40:07 scott
21895 + * Added multitone monitor fields
21897 + * Revision 1.63 1997/07/10 02:31:08 mwg
21898 + * 1. Added kRxFrameHDLCFlags detected status for the
21900 + * 2. Added kLapmMNPFrameDetected status to lapmStatusCode.
21901 + * 3. Increased the number of AT registers to 35
21902 + * 4. Modified LinkLayerSpec structure in modemCommandStruc
21903 + * to provide the initial values of rxDataRate &
21904 + * txDataRate and RT delay for the cases when
21905 + * link layer is started *after* the data connection
21906 + * is established and the status snooper is unable
21907 + * to determine the rates and RT delay.
21908 + * 5. Added a few extra *empty* constant definitions for
21909 + * disabled features.
21911 + * Revision 1.62 1997/07/02 19:15:05 scott
21912 + * Added bits for Bel103 & Bel212 modulations.
21914 + * Revision 1.61 1997/07/02 05:15:16 mwg
21915 + * Added MNP code.
21917 + * Revision 1.60 1997/07/01 23:52:48 mwg
21918 + * Modified the record test setup to log and use all the commands.
21920 + * Revision 1.59 1997/06/25 19:11:26 mwg
21921 + * 1. Added new framingInfoCode values for Async framing error reporting;
21922 + * 2. Added a substructure to pass serial data format for kSetDTERate cmd;
21924 + * Revision 1.58 1997/05/28 02:05:08 liang
21925 + * Add PCM modem phase 2 codes.
21927 + * Revision 1.57 1997/05/12 21:55:08 liang
21928 + * Add call waiting tone detector module.
21930 + * Revision 1.56 1997/03/21 23:50:08 liang
21931 + * Added initial version of V8bis module to CVS tree.
21933 + * Revision 1.55 1997/03/19 18:35:05 mwg
21934 + * Changed copyright notice.
21936 + * Revision 1.54 1997/03/11 11:11:45 mwg
21937 + * Added code to report V42bis statistics.
21939 + * Revision 1.53 1997/03/04 06:21:08 mwg
21940 + * Added logging of most commands.
21942 + * Revision 1.52 1997/02/28 23:45:13 liang
21943 + * Added training progress status report kPhaseJitterDeactivated.
21945 + * Revision 1.51 1997/02/28 22:23:22 mwg
21946 + * Implemented the following features:
21947 + * - Cleardown for fax modulations V.27, V.29 V.17
21948 + * - Rockwell compatible bitmap report (needed by a customer)
21950 + * Revision 1.50 1997/02/28 03:05:31 mwg
21951 + * Added more logging data types.
21953 + * Revision 1.49 1997/02/27 05:28:58 mwg
21954 + * Added RxFrameOK report.
21956 + * Revision 1.48 1997/02/27 01:48:53 liang
21957 + * Add kV8MenuDataWord1 and kV8MenuDataWord2 connectionInfo status.
21959 + * Revision 1.47 1997/02/24 02:30:27 mwg
21960 + * Added new log data: predictorErrData
21962 + * Revision 1.46 1997/02/22 03:00:22 liang
21963 + * Add echoCancelledSignalData.
21965 + * Revision 1.45 1997/02/21 01:26:42 liang
21966 + * Add six more bits for the Demodulator capabilities to deal with 2nd order
21967 + * time tracking & PLLs, as well as shorter NEEC & PFEEC, and front end HBF.
21969 + * Revision 1.44 1997/02/17 03:09:00 mwg
21970 + * Added LAPM statistics printout.
21972 + * Revision 1.43 1997/02/04 08:38:47 mwg
21973 + * Added dc cancelled samples printout.
21975 + * Revision 1.42 1997/01/29 21:40:28 mwg
21976 + * Changed the way timers work: now time is passed as Q4 ms instead of ticks.
21977 + * Completed the 8KHz front end implementation.
21978 + * Got rid of kSamplesPerSecond constant.
21980 + * Revision 1.41 1997/01/24 07:13:50 mwg
21981 + * Added new statuses for automoder.
21983 + * Revision 1.40 1997/01/23 02:03:08 mwg
21984 + * Replaced old sample rate conversion with the newer one.
21985 + * Still has to resolve the automoding issue.
21987 + * Revision 1.39 1997/01/21 00:55:04 mwg
21988 + * Added 8KHz front end functionality.
21990 + * Revision 1.38 1996/11/13 00:30:55 liang
21991 + * Add kAutoLoadReductionEnabled to demodCapabilities so that PFEEC, FEEC, IEEC
21992 + * can be disabled automatically, but for worst processor loading test they
21993 + * won't be disabled when this bit is not set.
21995 + * Revision 1.37 1996/11/07 23:07:18 mwg
21996 + * Rearranged global variables to allow V.17 short training.
21998 + * Revision 1.36 1996/09/17 23:55:05 liang
21999 + * Change kMaxDataBlockSize from 16 to 24 to handle high data rates.
22001 + * Revision 1.35 1996/09/05 19:43:39 liang
22002 + * Removed caller ID error status code kCallerIDUnknownMessageType, and
22003 + * added caller ID status codes kCallerIDUnknownMessage & kCallerIDWholeMessage.
22004 + * Changed the callerIDStatus report structure.
22006 + * Revision 1.34 1996/08/29 00:36:57 liang
22007 + * Added kLapmTxFrameStatus and kLapmRxFrameStatus.
22009 + * Revision 1.33 1996/08/27 22:56:01 liang
22010 + * Added kResetHardware status code.
22012 + * Revision 1.32 1996/08/23 23:35:35 liang
22013 + * Add kATDebugStatus and function SoftModemGetHybridDelay.
22015 + * Revision 1.31 1996/08/22 01:13:19 yg
22016 + * Added AT command processor.
22018 + * Revision 1.30 1996/08/12 21:46:47 mwg
22019 + * Added code to report capabilities.
22021 + * Revision 1.29 1996/08/10 01:59:59 mwg
22022 + * Added report of the sent rate sequence;
22024 + * Revision 1.28 1996/08/07 22:15:02 mwg
22025 + * Added new status reports:
22026 + * kRemoteFreqOffset
22027 + * kIEECDeactivated
22028 + * kPFEECDeactivated
22030 + * Revision 1.27 1996/06/27 05:15:48 mwg
22031 + * Added V.24 circuit status.
22033 + * Revision 1.26 1996/06/27 02:12:43 mwg
22034 + * Cleaned the code.
22036 + * Revision 1.25 1996/06/20 23:57:30 mwg
22037 + * Added new training progress status.
22039 + * Revision 1.24 1996/06/18 21:13:50 mwg
22040 + * Added trellis MSE data logging.
22042 + * Revision 1.23 1996/06/12 02:31:10 mwg
22043 + * Added new type: VeryLong
22045 + * Revision 1.22 1996/06/08 22:15:39 mwg
22046 + * Added new status report: kCleardownStarted
22047 + * Added new field for the features: kV34bisEnabled
22049 + * Revision 1.21 1996/05/31 00:29:11 liang
22050 + * Add feature bit kV34ExtraINFOPreamble.
22052 + * Revision 1.20 1996/05/30 23:28:31 mwg
22053 + * Replaced enums with #defines
22055 + * Revision 1.19 1996/05/25 00:38:27 mwg
22056 + * Added kProjectedDataRate training progress report.
22058 + * Revision 1.18 1996/05/24 23:27:15 mwg
22059 + * Added mode status codes.
22061 + * Revision 1.17 1996/05/10 05:39:59 liang
22062 + * Move the includes for DEBUG inside "ifndef SoftModemTypes" so that
22063 + * cap build won't break.
22065 + * Revision 1.16 1996/05/08 01:49:34 mwg
22066 + * Added capability to setup auxiliary data channel handlers.
22068 + * Revision 1.15 1996/05/07 22:51:08 liang
22069 + * Added group delay estimation and improved symbol rate selection process.
22071 + * Revision 1.14 1996/05/06 06:49:09 mwg
22072 + * Fixed linux problems.
22074 + * Revision 1.13 1996/05/02 08:40:16 mwg
22075 + * Merged in Chromatic bug fixes.
22077 + * Revision 1.12 1996/05/02 02:26:21 mwg
22078 + * Added code to implement dozing functionality for v.34.
22080 + * Revision 1.11 1996/05/01 22:43:13 mwg
22081 + * Added new command: kDozeCmd;
22083 + * Revision 1.10 1996/05/01 19:20:16 liang
22084 + * Add command codes kInitiateRetrainCmd and kInitiateRateRenegotiationCmd.
22086 + * Revision 1.9 1996/04/25 01:12:37 mwg
22087 + * Added new flag: rapid preliminary EC training.
22089 + * Revision 1.8 1996/04/20 02:26:22 mwg
22090 + * Added preliminary far-end echo support
22092 + * Revision 1.7 1996/04/15 23:26:16 mwg
22093 + * Changed flag definitions for v34 modem.
22095 + * Revision 1.6 1996/04/04 02:35:50 liang
22096 + * Change kCid from 0x0080 to 0x0004 (0x0080 is defined as kV32).
22098 + * Revision 1.5 1996/03/08 23:07:01 mwg
22099 + * Added name for the struct.
22101 + * Revision 1.4 1996/03/02 00:59:27 liang
22102 + * Added typedef for V34CodingParameters structure.
22104 + * Revision 1.3 1996/02/27 02:28:31 mwg
22105 + * Fixed a bug in kLapmLongADPEnabled definition.
22107 + * Revision 1.2 1996/02/19 23:50:59 liang
22108 + * Removed compressionSetup parameter from the link layer command structure.
22110 + * Revision 1.1.1.1 1996/02/14 02:35:13 mwg
22111 + * Redesigned the project directory structure. Merged V.34 into the project.
22113 + * Revision 1.5 1996/01/15 23:26:04 liang
22114 + * Change the softmodem command structure name from SoftwareModemCommand
22115 + * to SoftwareModemCommandParameters.
22117 + *****************************************************************************/
22118 +#ifndef SoftModemPh
22119 +#define SoftModemPh
22121 +/****************************************************************************/
22122 +/* 1. Type definitions. */
22124 +/* 1.1 General types */
22125 +/****************************************************************************/
22131 +#ifdef __VxWORKS__
22132 +#include <types/vxTypesOld.h>
22136 +/* We have to define __wchar_t for Linux */
22137 +#if defined __linux__ && !defined _NO_WHCAR_DEF_
22138 +typedef long int __wchar_t;
22140 +#if !defined(__KERNEL__) && !defined(_CFE_)
22141 +#include <stdio.h>
22142 +#include <stdlib.h>
22145 +#if defined(__linux__) || defined (__unix__) || defined (__unix) || (defined (__mips__) && !defined(_CFE_) && !defined(VXWORKS) && !defined(TARG_OS_RTEMS))/* enable if necessary, but not for dos-based builds */
22146 +#include <linux/types.h>
22150 +#endif /* DEBUG */
22152 +#if defined(W95_DRIVER)
22153 +#pragma code_seg("_LTEXT", "LCODE")
22154 +#pragma data_seg("_LDATA", "LCODE")
22155 +#pragma const_seg("_LDATA", "LCODE")
22156 +#pragma bss_seg("_LDATA", "LCODE")
22158 +#endif /* W95_DRIVER */
22160 +#ifndef SoftModemTypes
22161 +#include "SoftModemTypes.h"
22162 +#endif /* SoftModemTypes */
22173 + uchar denominator;
22203 + ushort x0, x1, x2;
22212 + uchar defaultValue; /* default value */
22213 + uchar maxValue; /* max allowed value */
22214 + uchar minValue; /* should be greater then maxValue to make reg readonly */
22217 + } SRegisterDefinition;
22219 +#define MacroPaste2(a,b) a##b
22220 +#define MacroPaste(a,b) MacroPaste2(a,b)
22221 +#define ALWAYS_LONG_ALIGN() long MacroPaste(ALIGNMENT,__LINE__);
22223 +#ifdef USE_LONG_ALIGN
22224 +#define LONG_ALIGN() ALWAYS_LONG_ALIGN()
22226 +#define LONG_ALIGN()
22229 +typedef ulong bitMap;
22233 +#define kVerySlow 1
22239 +/****************************************************************************/
22240 +/* 1. Type definitions. */
22242 +/* 1.2 Modem specific types */
22243 +/****************************************************************************/
22245 +typedef long directionType;
22251 +#define originating kXmt
22252 +#define answering kRcv
22255 +#define kOrgAns kXmtRcv
22257 +#define ORIGINATING originating
22258 +#define ANSWERING answering
22260 +typedef int pcmCodingType;
22261 +#define kMuLawPCM 0
22262 +#define kALawPCM 1
22264 +#define kMuLawPCMScaleShift 2
22265 +#define kALawPCMScaleShift 3
22267 +/* link layer and framer share defines */
22268 +typedef bitMap framerType;
22269 +typedef bitMap linkLayerType;
22270 +#define kNoFramer 0
22271 +#define kSync 0x00000001
22272 +#define kAsync 0x00000002
22273 +#define kHDLC 0x00000004
22274 +#define kLapm 0x00000008
22275 +#define kMnp 0x00000010
22276 +#define kV70 0x00000020
22277 +#define kSAM 0x00000040
22280 +typedef bitMap modulationMap;
22281 +typedef bitMap symbolRateMap;
22282 +typedef bitMap dataRateMap;
22283 +typedef bitMap featureMap;
22284 +typedef bitMap breakType;
22286 +typedef bitMap audioType;
22287 +#define kRawAudio 0
22288 +#define kAudioG729A 1
22289 +#define kAudioG729 2
22290 +#define kAudioG723 3
22293 +#ifndef ADSL_MODEM
22294 +typedef long modemStatusCode;
22296 + /* Information status Codes: 1-31 */
22297 +#define kSetSampleRate 1
22298 +#define kModulationKnown 2
22299 +#define kRxSymbolRate 3
22300 +#define kTxSymbolRate 4
22301 +#define kRxCarrierFreq 5
22302 +#define kTxCarrierFreq 6
22303 +#define kTxPreemphasisFilter 7
22304 +#define kTxPowerAdjustment 8
22305 +#define kRemoteTxPreemphasisFilter 9
22306 +#define kRemoteTxPowerAdjustment 10
22307 +#define kRxRateKnown 11
22308 +#define kTxRateKnown 12
22309 +#define kRxDataModeActive 13
22310 +#define kTxDataModeActive 14
22311 +#define kTxSignalCompleted 15
22312 +#define kDTMFSignalDetected 16
22313 +#define kModemSignalDetected 17
22314 +#define kCallProgressSignalDetected 18
22315 +#define kCustomSignalDetected 19
22316 +#define kFaxPreambleDetected 20
22317 +#define kV24CircuitStatusChange 21
22318 +#define kHookStateChange 22
22319 +#define kCallWaitingToneDetected 23
22320 +#define kMultiToneSignalDetected 24
22321 +#define kPulseShuntStateChange 25
22322 +#define kRingFrequency 26
22325 + /* Warning status Codes: 32-64 */
22327 +#define kV34Exception 33
22328 +#define kClearDownLocal 34
22329 +#define kClearDownRemote 35
22330 +#define kCarrierPresent 36
22331 +#define kCarrierLost 37
22332 +#define kRetrainingLocal 38
22333 +#define kRetrainingRemote 39
22334 +#define kRateRenegotiationLocal 40
22335 +#define kRateRenegotiationRemote 41
22336 +#define kFallbackStarted 42
22337 +#define kFallForwardStarted 43
22338 +#define kCleardownStarted 44
22339 +#define kIllegalCommand 45
22341 + /* Auxiliary status Codes: 64-.. */
22342 +#define kTrainingProgress 64
22343 +#define kConnectionInfo 65
22344 +#define kDialerStatus 66
22345 +#define kFramingInfo 67
22346 +#define kBreakReceived 68
22347 +#define kLapmStatus 69
22348 +#define kLapmParameter 70
22349 +#define kV42bisStatus 71
22350 +#define kCallerIDStatus 72
22351 +#define kIOStatus 73
22352 +#define kCapabilitiesStatus 74
22353 +#define kSpeakerStatus 75
22354 +#define kATProfileChanged 76
22355 +#define kATDebugStatus 77
22356 +#define kResetHardware 78
22357 +#define kV8bisStatus 79
22358 +#define kMnpStatus 80
22359 +#define kMnpParameter 81
22360 +#define kV70Status 82
22361 +#define kV70Parameter 83
22362 +#define kFaxClass2Status 84
22363 +#define kAudioStatus 85
22364 +#define kAudioParameter 86
22365 +#define kOverlayStatus 87
22366 +#define kCallerIDCircuitStatus 88
22367 +#define kV80Status 89
22368 +#define kV80Parameter 90
22369 +#define kLocalCountryChanged 91
22370 +#define kDTERateChanged 92
22371 +#define kATResponse 93
22372 +#define kFramerConfigured 94
22373 +#define kA8RStatus 95
22374 +#define kA8TStatus 96
22375 +#define kVersionStatus 97
22377 + /* Testing status codes: 128-... */
22378 + /* These statuses are generated by modem test suit */
22379 +#define kTestFinished 128
22380 +#define kConnectivityTestFinished 129
22381 +#define kTestCheckSum 130
22382 +#define kLogFileControl 131
22383 +#define kTestAtmVcFinished 132
22384 +#define kTestClearEocFinished 133
22385 +#define kTestG997Finished 134
22387 +typedef long modemErrorCode;
22388 +#define kNoError 0
22389 +#define kErrorTimerExpired 1
22390 +#define kErrorNoSReceived 2
22391 +#define kErrorNoSbarReceived 3
22394 +typedef long dialerStatusCode;
22395 +#define kDialCompleted 0
22396 +#define kNoDialToneDetected 1
22397 +#define kBongToneDetected 2
22398 +#define kNoBongToneDetected 3
22399 +#define kErrorIllegalDialModifier 5
22400 +#define kDialStarted 6
22401 +#define kExternalPulseDialDigit 7
22404 +typedef long framingInfoCode;
22405 +#define kRxFrameOK 0
22406 +#define kRxFrameTooLong 1
22407 +#define kRxFrameCRCError 2
22408 +#define kTxFrameUnderrun 3
22409 +#define kRxFrameOverrun 4
22410 +#define kRxFrameAborted 5
22411 +#define kRxFrameParityError 6
22412 +#define kRxFrameFormatError 7
22413 +#define kRxFrameHDLCFlagsDetected 8
22416 +typedef long IOStatusCode;
22417 +#define kRxDataReady 0
22418 +#define kRxBufferOverflow 1
22419 +#define kTxSpaceAvailable 2
22420 +#define kTxBufferEmpty 3
22422 +typedef long capabilitiesStatusCode;
22423 +#define kSymbolRates 0
22424 +#define kDataRates 1
22425 +#define kFeatures 2
22426 +#define kDemodCapabilities 3
22427 +#define kRateThresholdAdjustment 4
22428 +#define kXmtLevel 5
22429 +#define kHybridDelay 6
22430 +#define kAuxFeatures 7
22433 +typedef long A8TStatusCode;
22434 +#define kA8TFinished 0
22436 +typedef long callerIDStatusCode;
22437 +#define kCallerIDError 0
22438 +#define kCallerIDChannelSeizureReceived 1
22439 +#define kCallerIDMarkSignalReceived 2
22440 +#define kCallerIDTime 3
22441 +#define kCallerIDTelnum 4
22442 +#define kCallerIDName 5
22443 +#define kCallerIDEnd 6
22444 +#define kCallerIDUnknownMessage 7
22445 +#define kCallerIDWholeMessage 8
22448 +typedef long callerIDErrorCode;
22449 +#define kCallerIDNoError 0
22450 +#define kCallerIDMarkSignalError 1
22451 +#define kCallerIDTooManyMarkBits 2
22452 +#define kCallerIDMessageTooLong 3
22453 +#define kCallerIDChecksumError 4
22456 +typedef long connectionInfoCode;
22457 +#define kRTDelay 1
22458 +#define kRxSignalLevel 2
22459 +#define kTimingOffset 3
22460 +#define kFreqOffset 4
22461 +#define kPhaseJitter 5
22463 +#define kNearEchoLevel 7
22465 +#define kNearEndDelay 9
22466 +#define kFarEchoLevel 10
22467 +#define kL1L2SNRDifference 11
22468 +#define kDCOffset 12
22469 +#define kTotalRxPower 13
22470 +#define kRemoteFreqOffset 14
22471 +/* obsolete #define kV8MenuDataWord1 15 */
22472 +/* obsolete #define kV8MenuDataWord2 16 */
22473 +#define kPCMP2AnalogDetSNR 17
22474 +#define kPCMP2DigitalDetSNR 18
22475 +#define kPCMP2RBSDetSNR 19
22476 +#define kEqCenterTapOffset 20
22477 +#define kPCMPadValue 21
22478 +#define kPCMRBSMap 22
22479 +#define kPCMCodingType 23
22480 +#define kPCMSpectralShapingBits 24
22481 +#define kLoopbackSelfTestResult 25
22482 +#define kEyeQuality 26
22483 +#define kLoopbackSelfTestNewErrs 27
22484 +#define kV34EqlLengthStatus 28
22485 +#define kV34EqlOffsetStatus 29
22486 +#define kV8CallMenuData 30
22487 +#define kV8JointMenuData 31
22488 +#define kPCMClientIeecLengthStatus 32
22489 +#define kPCMClientIeecOffsetStatus 33
22490 +#define kSeamlessRateChange 34
22492 +typedef long trainingProgressCode;
22493 +#define kPeriodicalSignalDetected 0
22494 +#define kPhaseReversalDetected 1
22495 +#define kSignalStartDetected 2
22496 +#define kSignalEndDetected 3
22497 +#define kSSignalDetected 4
22498 +#define kSbarSignalDetected 5
22499 +#define kJ4SignalDetected 6
22500 +#define kJ16SignalDetected 7
22501 +#define kJprimeSignalDetected 8
22502 +#define kMPSignalDetected 9
22503 +#define kMPprimeSignalDetected 10
22504 +#define kMPSignalSent 11
22505 +#define kMPprimeSignalSent 12
22506 +#define kRateSignalDetected 13
22507 +#define kESignalDetected 14
22508 +#define kRateSignalSent 15
22510 +#define kAutomodingTryModulation 16
22511 +#define kAutomodingCompleted 17
22512 +#define kRCFaxBitMapStatus 18
22514 +#define kV8CIDetected 19
22515 +#define kV8ANSToneDetected 20
22516 +#define kV8ANSamDetected 21
22517 +#define kV8CMDetected 22
22518 +#define kV8JMDetected 23
22519 +#define kV8CJDetected 24
22520 +#define kV8Finished 25
22522 +#define kV34Phase2Started 26
22523 +#define kV34Phase2INFOSequenceDetected 27
22524 +#define kV34Phase2NearEndEchoDetected 28
22525 +#define kV34Phase2L1Receiving 29
22526 +#define kV34Phase2L2Receiving 30
22527 +#define kV34Phase2Finished 31
22528 +#define kV34Phase3Started 32
22529 +#define kV34Phase3Finished 33
22530 +#define kV34Phase4Started 34
22531 +#define kV34Phase4Finished 35
22532 +#define kV34DecoderParameters 36
22533 +#define kV34EncoderParameters 37
22535 +#define kMaxLocalRxDataRate 38
22536 +#define kMaxLocalTxDataRate 39
22537 +#define kMaxRemoteRxDataRate 40
22538 +#define kMaxRemoteTxDataRate 41
22539 +#define kProjectedDataRate 42
22540 +#define kFEECDeactivated 43
22541 +#define kIEECDeactivated 44
22542 +#define kPFEECDeactivated 45
22543 +#define kPhaseJitterDeactivated 46
22545 +#define kPCMP2DetectedDigitalConnection 47
22546 +#define kPCMP2DetectedRBS 48
22547 +#define kX2DetectedPhase1Escape 49
22549 +#define kStarted1200BpsTraining 50
22550 +#define kStarted2400BpsTraining 51
22551 +#define kUnscrambledOneDetected 52
22552 +#define kScrambled1200BpsOneDetected 53
22553 +#define kScrambled2400BpsOneDetected 54
22554 +#define kV22BisS1Detected 55
22555 +#define kV22InitiateLoop2Test 56
22556 +#define kV22RespondLoop2Test 57
22557 +#define kV22Loop2TestAlt01Detected 58
22559 +#define kDataModemLoop1TestStarted 59
22560 +#define kDataModemLoop1TestFinished 60
22561 +#define kDataModemLoop2TestStarted 61
22562 +#define kDataModemLoop2TestFinished 62
22563 +#define kDataModemLoop3TestStarted 63
22564 +#define kDataModemLoop3TestFinished 64
22565 +#define kDataModemSelfLoopTestEnabled 65
22567 +#define kPCMPhase3Started 70
22568 +#define kPCMPhase3Finished 71
22569 +#define kPCMPhase4Started 72
22570 +#define kPCMPhase4Finished 73
22572 +#define kV90JaSignalDetected 74
22573 +#define kV90JdSignalDetected 75
22574 +#define kV90JdPrimeSignalDetected 76
22575 +#define kV90RSignalDetected 77
22576 +#define kV90RBarSignalDetected 78
22577 +#define kV90CPSignalDetected 79
22579 +#define kV90CPtSignalSent 80
22580 +#define kV90CPSignalSent 81
22581 +#define kV90CPprimeSignalSent 82
22584 +#define kV34SeamlessRateChangeRequestSent 83
22585 +#define kV34SeamlessRateChangeUpdateSent 84
22586 +#define kV34SeamlessRateChangeRequestReceived 85
22587 +#define kV34SeamlessRateChangeUpdateReceived 86
22588 +#define kV34SeamlessRateChangeUpdateTimeout 87
22590 +#define kV90JaSignalAcknowledged 88
22592 +#define kV34HCtrlChanPPhDetected 100
22593 +#define kV34HCtrlChanMPhDetected 101
22594 +#define kV34HCtrlChanRatesKnown 102
22595 +#define kV34HDXCtrlChanBinary1Detected 103
22596 +#define kV34HDXPhase3Started 104
22597 +#define kV34HDXPhase3Finished 105
22598 +#define kV34HDXPrimChanBinary1Detected 106
22599 +#define kFlexEventTRN2AFinished 107
22601 +#define kV32RanginigStarted 108
22602 +#define kV32RangingStarted 108
22603 +#define kV32RanginigFinished 109
22604 +#define kV32RangingFinished 109
22607 +typedef long lapmStatusCode;
22608 +#define kLapmDisconnected 0 /* LAPM disconnected */
22609 +#define kLapmConnected 1 /* LAPM is connected */
22610 +#define kLapmV42ODPDetected 2 /* LAPM ODP is detected */
22611 +#define kLapmV42ADPDetected 3 /* LAPM V.42 ADP is detected */
22612 +#define kLapmUnknownADPDetected 4 /* LAPM Unsupported ADP is detected */
22613 +#define kLapmTimeout 5 /* LAPM Timeout */
22614 +#define kLapmMNPFrameDetected 6 /* LAPM detected MNP frame */
22615 +#define kLapmDPDetectionTimedOut 7 /* LAPM Unsupported ADP is detected */
22616 +#define kLapmError 8 /* LAPM Error */
22617 +#define kLapmTestResult 9 /* LAPM loopback test result */
22618 +#define kLapmTxFrameStatus 10
22619 +#define kLapmRxFrameStatus 11
22620 +#define kLapmTxStatistics 12
22621 +#define kLapmRxStatistics 13
22623 +typedef long lapmTakedownReason;
22624 +#define kLapmRemoteDisconnect 0
22625 +#define kLapmLocalDisconnect 1
22626 +#define kLapmCannotConnect 2
22627 +#define kLapmProtocolError 3
22628 +#define kLapmCompressionError 4
22629 +#define kLapmInactivityTimer 5
22630 +#define kLapmRetryFailed 6
22633 +typedef long lapmParameterCode;
22634 +#define kLapmXmtK 0
22635 +#define kLapmRcvK 1
22636 +#define kLapmXmtN401 2
22637 +#define kLapmRcvN401 3
22638 +#define kLapmTESTSupport 4
22639 +#define kLapmSREJSupport 5
22640 +#define kLapmCompDir 6
22641 +#define kLapmCompDictSize 7
22642 +#define kLapmCompStringSize 8
22645 +typedef long lapmErrorCode;
22646 +#define kLapmNoError 0
22647 +#define kLapmBufferOverflow 1
22648 +#define kLapmFrameTooLong 2
22649 +#define kLapmBadFrame 3
22650 +#define kLapmUnknownEvent 4
22651 +/* 6 is reserved for kLapmRetryFailed defined above */
22654 +typedef long lapmTestResultCode;
22655 +#define kLapmTestPassed 0
22656 +#define kLapmTestRequestIgnored 1
22657 +#define kLapmTestAlreadyInProgress 2
22658 +#define kLapmTestNotSupported 3
22659 +#define kLapmTestFailed 4
22662 +typedef long v42bisStatusCode;
22663 +#define kV42bisEncoderTransparentMode 0 /* V.42bis encoder transparent mode active */
22664 +#define kV42bisEncoderCompressedMode 1 /* V.42bis encoder compressed mode active */
22665 +#define kV42bisDecoderTransparentMode 2 /* V.42bis decoder transparent mode active */
22666 +#define kV42bisDecoderCompressedMode 3 /* V.42bis decoder compressed mode active */
22667 +#define kV42bisError 4 /* V.42bis error */
22668 +#define kV42bisEncoderStatistics 5
22669 +#define kV42bisDecoderStatistics 6
22672 +typedef long v42bisErrorCode;
22673 +#define kV42bisUndefinedEscSequence 0 /* V.42bis undefined escape sequence */
22674 +#define kV42bisCodewordSizeOverflow 1 /* V.42bis codeword size overflow */
22675 +#define kV42bisUndefinedCodeword 2 /* V.42bis undefined codeword */
22677 +typedef long mnpStatusCode;
22678 +#define kMnpDisconnected 0 /* Mnp disconnected */
22679 +#define kMnpConnected 1 /* Mnp is connected */
22680 +#define kMnpFallback 2 /* Mnp is falling back to buffer mode */
22681 +#define kMnpError 3 /* Mnp Error */
22682 +#define kMnpTimeout 4 /* Mnp Timeout */
22683 +#define kMnpInvalidLT 5 /* Invalid LT received */
22684 +#define kMnpRetransmitFrame 6
22685 +#define kMnpNack 7
22686 +#define kMnpTxFrameStatus 8
22687 +#define kMnpRxFrameStatus 9
22688 +#define kMnpTxStatistics 10
22689 +#define kMnpRxStatistics 11
22691 +typedef long mnpTakedownReason;
22692 +#define kMnpRemoteDisconnect 0
22693 +#define kMnpLocalDisconnect 1
22694 +#define kMnpCannotConnect 2
22695 +#define kMnpProtocolError 3
22696 +#define kMnpCompressionError 4
22697 +#define kMnpInactivityTimer 5
22698 +#define kMnpRetryFailed 6
22701 +typedef long mnpParameterCode;
22702 +#define kMnpProtocolLevel 0
22703 +#define kMnpServiceClass 1
22704 +#define kMnpOptimizationSupport 2
22705 +#define kMnpCompressionSupport 3
22706 +#define kMnpN401 4
22710 +typedef long mnpErrorCode;
22711 +#define kMnpNoError 0
22712 +#define kMnpBufferOverflow 1
22713 +#define kMnpFrameTooLong 2
22714 +#define kMnpBadFrame 3
22715 +#define kMnpUnknownEvent 4
22718 +typedef long v70StatusCode;
22719 +#define kV70Disconnected 0 /* V70 disconnected */
22720 +#define kV70Connected 1 /* V70 is connected */
22721 +#define kV70Error 2 /* V70 Error */
22722 +#define kV70Timeout 3 /* V70 Timeout */
22723 +#define kV70ChannelDown 4 /* V70 channel released */
22724 +#define kV70ChannelUp 5 /* V70 channel established */
22725 +#define kV70AudioChannelDown 6 /* V70 audio channel released */
22726 +#define kV70AudioChannelUp 7 /* V70 audio channel established */
22727 +#define kV70DataChannelDown 8 /* V70 data channel released */
22728 +#define kV70DataChannelUp 9 /* V70 data channel established */
22729 +#define kV70OOBChannelDown 10 /* V70 out-of-band channel released */
22730 +#define kV70OOBChannelUp 11 /* V70 out-of-band channel established */
22731 +#define kV70TxFrameStatus 12
22732 +#define kV70RxFrameStatus 13
22733 +#define kV70TxStatistics 14
22734 +#define kV70RxStatistics 15
22735 +#define kV70StateTransition 16
22737 +typedef long v70TakedownReason;
22738 +#define kV70RemoteDisconnect 0
22739 +#define kV70LocalDisconnect 1
22740 +#define kV70CannotConnect 2
22741 +#define kV70ProtocolError 3
22742 +#define kV70CompressionError 4
22743 +#define kV70InactivityTimer 5
22744 +#define kV70RetryFailed 6
22747 +typedef long v70ParameterCode;
22748 +#define kV70SuspendResume 0
22749 +#define kV70CrcLength 1
22750 +#define kV70NumberOfDLCs 2
22753 +#define kV70LapmXmtK 10
22754 +#define kV70LapmRcvK 11
22755 +#define kV70LapmXmtN401 12
22756 +#define kV70LapmRcvN401 13
22757 +#define kV70LapmTESTSupport 14
22758 +#define kV70LapmSREJSupport 15
22759 +#define kV70LapmCompDir 16
22760 +#define kV70LapmCompDictSize 17
22761 +#define kV70LapmCompStringSize 18
22763 +#define kV70AudioHeader 20 /* if audio header is present in audio frames */
22764 +#define kV70BlockingFactor 21 /* audio blocking factor (default 1) */
22765 +#define kV70SilenceSuppression 22 /* audio silence suppression */
22769 +typedef long v70ErrorCode;
22770 +#define kV70NoError 0
22771 +#define kV70BadFrame 1
22773 +typedef long audioStatusCode;
22774 +#define kAudioFramesLost 0 /* One or more audio frames were lost */
22775 +#define kAudioTxBufferOverflow 1
22776 +#define kAudioRxBufferOverflow 2
22777 +#define kAudioRxBufferUnderflow 3
22780 +typedef long v80StatusCode;
22781 +#define kV80Disconnected 0 /* V80 disconnected */
22782 +#define kV80Connected 1 /* V80 is connected */
22783 +#define kV80Error 2 /* V80 Error */
22784 +#define kV80InBandStatus 3 /* V80 in-band SAM status */
22785 +#define kV80TxFrameStatus 12
22786 +#define kV80RxFrameStatus 13
22787 +#define kV80TxStatistics 14
22788 +#define kV80RxStatistics 15
22790 +typedef long v80TakedownReason;
22791 +#define kV80RemoteDisconnect 0
22792 +#define kV80LocalDisconnect 1
22794 +typedef long v80ErrorCode;
22795 +#define kV80NoError 0
22796 +#define kV80BadFrame 1
22798 +typedef long overlayStatusCode;
22799 +#define kOverlayBegin 0 /* DSP has halted */
22800 +#define kOverlayEnd 1 /* DSP has received entire overlay */
22801 +#define kOverlayElapsedTime 2 /* time elapsed(as viewed by datapump) during overlay */
22802 +#define kOverlayRecordingData 3 /* ms of data that we are recording */
22803 +#define kOverlayReplayingData 4 /* ms of data that we have replayed so far */
22804 +#define kOverlayReplayDone 5 /* playback is done */
22806 +/* types for kOverlayRecording/ReplayingData */
22807 +#define kOverlayTxData 0
22808 +#define kOverlayRxData 1
22811 + * Rockwell faxmodem compatible bitmap (kRCFaxBitMapStatus)
22813 +#define kRCFaxFCD 0x01
22814 +#define kRCFaxP2 0x02
22815 +#define kRCFaxPN 0x04
22816 +#define kRCFaxDCD 0x08
22817 +#define kRCFaxTX 0x10
22818 +#define kRCFaxCTS 0x20
22821 +#ifndef ADSL_MODEM
22822 +typedef long modemCommandCode;
22824 + /* Basic Action commands 00-63 */
22825 +#define kIdleCmd 0
22826 +#define kStartFaxModemCmd 1
22827 +#define kStartDataModemCmd 2
22828 +#define kStartCallProgressMonitorCmd 3
22829 +#define kSendTonesCmd 4
22830 +#define kStartCallerIDRcvCmd 5
22831 +#define kSetLinkLayerCmd 6
22832 +#define kSetFramerCmd 7
22833 +#define kTestLinkLayerCmd 8
22834 +#define kIdleRcvCmd 9
22835 +#define kIdleXmtCmd 10
22836 +#define kSetStatusHandlerCmd 11
22837 +#define kSetEyeHandlerCmd 12
22838 +#define kSetLogHandlerCmd 13
22839 +#define kSendBreakCmd 14
22840 +#define kSendTestCmd 15
22841 +#define kDisconnectLinkCmd 16
22842 +#define kSetXmtGainCmd 17
22843 +#define kStartADSICmd 18
22844 +#define kSetHybridDelayCmd 19
22845 +#define kCleardownCmd 20
22846 +#define kInitiateRetrainCmd 21
22847 +#define kInitiateRateRenegotiationCmd 22
22848 +#define kDialToneIndicator 23
22849 +#define kSetRxDataHandler 24 /* not used yet */
22850 +#define kSetTxDataHandler 25 /* not used yet */
22851 +#define kSetAuxRxDataHandler 26
22852 +#define kSetAuxTxDataHandler 27
22853 +#define kRingIndicatorCmd 28
22854 +#define kDTERateIndicatorCmd 29
22855 +#define kStartV8bisCmd 30
22856 +#define kSendMultiTonesCmd 31
22857 +#define kSetMultiToneParamsCmd 32
22858 +#define kSetModemSampleRateCmd 33
22859 +#define kStartDataModemPTTTestCmd 34
22860 +#define kStartDataModemLoopbackTestCmd 35
22861 +#define kRingFrequencyCmd 36
22862 +#define kSetCallWaitingDetectorStateCmd 37
22863 +#define kV34HDXTurnOffCurrentModeCmd 38
22864 +#define kSetAudioCmd 39
22865 +#define kLoopbackTestAutoRespEnableCmd 40
22866 +#define kSetCallProgressParamsCmd 41
22867 +#define kSetTrainingDelayReductionCmd 42
22868 +#define kSetFaxECMPageBufferPtrCmd 43
22869 +#define kSetLineCurrentStateCmd 44
22870 +#define kSetFramerParameterCmd 45
22871 +#define kStartDozeCmd 46
22872 +#define kEndDozeCmd 47
22873 +#define kStartRingFrequencyDetectorCmd 48
22874 +#define kSetBufferingDelayAdjustmentCmd 49
22876 + /* Composite action commands 64-127 */
22877 +#define kDialCmd 64
22878 +#define kSendCallingToneCmd 65
22879 +#define kV24CircuitChangeCmd 66
22880 +#define kStartATModeCmd 67
22881 +#define kStopATModeCmd 68
22882 +#define kSetATRegister 69
22883 +#define kSetATRegisterLimits 70
22884 +#define kSetATIResponse 71
22885 +#define kEnableATDebugMode 72
22886 +#define kSetWhiteListEntry 73
22887 +#define kSetBlackListEntry 74
22889 +#define kV70Setup 75 /* additional V70 configuration */
22890 +#define kEstablishChannel 76 /* Establish new link layer channel (V70) */
22891 +#define kReleaseChannel 77 /* Release link layer channel (V70) */
22892 +#define kWaitChannelEstablished 78 /* Wait for establishment of the new link layer channel (V70) */
22895 +#define kMnpOOBFrameCmd 80
22896 +#define kV80InBandCmd 81 /* V80 In-band commands */
22897 +#define kSetV250IdString 82
22898 +#define kSetInternationalTablesCmd 83
22899 +#define kConfigureCountryCmd 84
22900 +#define kConigureCountryCmd 84
22901 +#define kV8ControlCmd 85
22902 +#define kV8bisSendMessage 86
22903 +#define kSetHWIdCmd 87
22904 +#define kSetCodecIdCmd 88
22905 +#define kOverCurrentDetected 89
22909 +typedef long v8ControlType;
22910 +#define kEnableDTEControl 1
22911 +#define kSetV8ControlTimeout 2
22912 +#define kSetCIValue 3
22913 +#define kSetCMValue 4
22914 +#define kSetJMValue 5
22916 +#define kSetCallFunctionCategory 7
22918 +typedef long v250IdStringCode;
22919 +#define kGMIString 1
22920 +#define kGMMString 2
22921 +#define kGMRString 3
22922 +#define kGSNString 4
22923 +#define kGOIString 5
22925 +typedef long kCallProgressParameterCode;
22926 +#define kModemSignalPowerThreshold 1
22927 +#define kDialtonePowerThreshold 2
22928 +#define kRingBackPowerThreshold 3
22929 +#define kBusyPowerThreshold 4
22930 +#define kReorderPowerThreshold 5
22931 +#define k2ndDTnPowerThreshold 6
22932 +#define kMinDialtoneTime 7
22933 +#define kDialtoneFreqRange 8
22934 +#define kRingBackFreqRange 9
22935 +#define kBusyFreqRange 10
22936 +#define kReorderFreqRange 11
22937 +#define k2ndDTnFreqRange 12
22940 +typedef long framerParameterCode;
22941 +#define kSetHDLCLeadingFlags 0
22942 +#define kHDLCResetFlagDetection 1
22943 +#define kSyncFramerSetup 2
22944 +#define kHDLCSendCRC 3
22945 +#define kHDLCSendFlags 4
22946 +#define kHDLCSendAborts 5
22949 +typedef long logDataCode;
22954 +#define neecData 4
22956 +#define ieecData 6
22957 +#define feecData 7
22958 +#define eqlPllData 8
22959 +#define feecPllData 9
22960 +#define timingData 10
22961 +#define pjPhaseErrData 11
22962 +#define pjEstimateData 12
22963 +#define pjEstDiffData 13
22964 +#define pjCoefData 14
22965 +#define inputSignalData 15
22966 +#define outputSignalData 16
22967 +#define agcGainData 17
22968 +#define automoderData 18
22969 +#define v8CMData 19
22970 +#define v8JMData 20
22971 +#define inputAfterNeecData 21
22972 +#define eqlErrData 22
22973 +#define dpskMicrobitsData 23
22974 +#define v34P2LSamplesData 24
22975 +#define phaseSplittedLData 25
22976 +#define fftedLData 26
22977 +#define channelSNRData 27
22978 +#define noiseEstimateData 28
22979 +#define signalEstimateData 29
22980 +#define v34INFOData 30
22981 +#define v34ChanProbData 31
22982 +#define v34P2OutputData 32
22983 +#define v8ANSamDetectData 33
22984 +#define pFeecData 34
22985 +#define channelDelayData 35
22986 +#define timingOffsetData 36
22987 +#define trellisMSEData 37
22988 +#define interpolatedSignalData 38
22989 +#define dcCancelledSignalData 39
22990 +#define echoCancelledSignalData 40
22991 +#define predictorErrData 41
22992 +#define commandInfoData 42
22993 +#define unusedInfoData 43
22994 +#define atCommandInfoData 44
22995 +#define atResponseInfoData 45
22996 +#define hwTerminalTxData 46
22997 +#define hwTerminalRxData 47
22998 +#define statusInfoData 48
22999 +#define channelResponseData 49
23000 +#define channelImpulseRespData 50
23001 +#define x2PcmP1DetectorInData 51
23002 +#define x2PcmP1DetectorOutData 52
23003 +#define eqlRealData 53
23004 +#define ieecRealData 54
23005 +#define neecOutputData 55
23006 +#define precodedEqlOutputData 56
23007 +#define eqlRealErrData 57
23008 +#define idealEqlOutputData 58
23009 +#define agcData 59
23010 +#define pcmInfidelityData 60
23011 +#define v42bisCycleCount 61
23012 +#define pcmImdOffsetCoefData 62
23013 +#define pcmImdOffsetData 63
23014 +#define v90RcvdDilLongData 64
23015 +#define v90RcvdDilShortData 65
23016 +#define v90DilProducedData 66
23017 +#define pcmEncoderKbitsData 67
23018 +#define pcmEncoderMbitsData 68
23019 +#define pcmEncoderSbitsData 69
23020 +#define pcmDecoderKbitsData 70
23021 +#define pcmDecoderMbitsData 71
23022 +#define pcmDecoderSbitsData 72
23023 +#define v90CPorCPtData 73
23024 +#define mnpDecoderInputData 74
23025 +#define mnpDecoderOutputData 75
23026 +#define v42bisEncoderInputData 76
23027 +#define v42bisDecoderInputData 77
23028 +#define modulatorInputData 78
23029 +#define modulatorOutputData 79
23030 +#define encodedStatusData 80
23031 +#define blockFramerTxData 81
23032 +#define blockFramerRxData 82
23033 +#define framerTxData 83
23034 +#define framerRxData 84
23035 +#define dpskBasebandData 85
23036 +#define dpskBasebandLPFedData 86
23037 +#define dpskRealData 87
23038 +#define bandEdgeCorrectedSignalData 88
23039 +#define atmLogData 89
23040 +#define clearEocLogData 90
23041 +#define g997LogData 91
23044 +#define kLogDataDelimiter 0xFEFEFEFE
23046 +/****************************************************************************/
23047 +/* 1. Type definitions. */
23049 +/* 1.3 Handlers */
23050 +/****************************************************************************/
23052 +typedef void (SM_DECL *rcvHandlerType) (void *gDslVars, int, short*);
23053 +typedef void (SM_DECL *xmtHandlerType) (void *gDslVars, int, short*);
23054 +typedef int (SM_DECL *xmtHandlerWithRtnValType) (void *gDslVars, int, short*);
23055 +typedef void (SM_DECL *timerHandlerType) (void *gDslVars, long);
23056 +typedef int (SM_DECL *interpolatorHandlerType) (void *gDslVars, int, short*, short*);
23057 +typedef void (SM_DECL *controlHandlerType) (void *gDslVars, int);
23059 +typedef int (SM_DECL *txDataHandlerType) (void *gDslVars, int, uchar*);
23060 +typedef int (SM_DECL *rxDataHandlerType) (void *gDslVars, int, uchar*);
23062 +typedef bitMap (SM_DECL *signalDetectorType) (void *gDslVars, int, long, long*);
23065 +typedef void (SM_DECL *hookHandlerType) (void *gDslVars, Boolean);
23067 +typedef short* (SM_DECL *sampBuffPtrType) (void *gDslVars, int);
23069 +typedef void (SM_DECL *eyeHandlerType) (void *gDslVars, int, ComplexShort*);
23070 +typedef void (SM_DECL *logHandlerType) (void *gDslVars, logDataCode, ...);
23072 +typedef void (SM_DECL *voidFuncType) (void *gDslVars);
23074 +typedef int (SM_DECL *txAudioHandlerType) (void *gDslVars, int, short*);
23075 +typedef int (SM_DECL *rxAudioHandlerType) (void *gDslVars, int, short*);
23078 +/****************************************************************************/
23079 +/* 1. Type definitions. */
23081 +/* 1.4 Structures */
23082 +/****************************************************************************/
23085 + * AT command processor definitions
23087 +#define kATRegistersNumber 56
23088 +#define kFirstConfigurationRegister 500
23089 +#define kLastConfigurationRegister 515
23090 +#define kFirstInternationalRegister 516
23091 +#define kLastInternationalRegister 595
23095 +#define kATMaxDialStringSize 128
23100 + uchar loadNumber; /* Which profile to load upon powerup/reset */
23101 + uchar countryCode; /* T.35 Country Code */
23102 + uchar profile[2][kATRegistersNumber];
23103 + uchar dialString[4][kATMaxDialStringSize + 1];
23105 + ulong versionCode;
23106 + ulong crcCheckSum;
23107 + } NVRAMConfiguration;
23109 +/* Structure to hold international settings */
23114 + const SRegisterDefinition *userRegisters;
23115 + const ulong *configRegisters;
23116 + } CountryDescriptor;
23119 + * V.34 coding parameters structure
23124 + /* DO NOT CHANGE THE ORDER OF FIELDS IN THIS STRUCTURE!
23125 + * (Some assembly code depends on it!) If you
23126 + * must add fields, please do so at the bottom.
23129 + int symbolRateIndex,
23131 + userSNRAdjustment;
23132 + Boolean auxChannel,
23133 + expConstellation,
23136 + schar J, /* number of data frames in superframe */
23137 + P, /* number of mapping frames in a data frame */
23138 + r, /* number of high mapping frames in a data frame */
23139 + b, /* number of data bits in a mapping frame */
23140 + W, /* number of aux bits in a data frame */
23141 + K, /* number of S bits in a mapping frame */
23142 + q, /* number of Q bits in a 2D symbol */
23143 + M; /* number of rings in shell mapping */
23144 + long nominalVariance; /* the signal variance which gives 1e-2 BLER Q10 */
23145 + int bitsPerDataFrame;
23146 + short quantRoundOff,
23148 + uchar nTrellisStates,
23149 + log2NTrellisStates;
23154 + ushort bitInversionPattern;
23155 + } V34CodingParams;
23157 +typedef long v8bisStatusCode;
23158 +typedef bitMap v8bisConnectionSetup;
23159 +#if defined(V8BIS) || defined(AT_COMMANDS_V8BIS)
23160 +#include "V8bisMainTypes.h"
23163 +#define kMaxMultiTones 4 /* MultiTone: search for up to this many tones at once */
23165 +#ifndef ADSL_MODEM
23168 + modemStatusCode code;
23173 + modemErrorCode error;
23174 + modulationMap modulation;
23175 + modulationMap modemSignal;
23176 + dataRateMap dataRate;
23178 + bitMap callProgressSignal;
23179 + bitMap customSignal;
23185 + long tones[kMaxMultiTones];
23189 + v8bisStatusCode code;
23194 + trainingProgressCode code;
23204 + trainingProgressCode code;
23206 + } advancedTrainingInfo;
23209 + capabilitiesStatusCode code;
23211 + } capabilitiesStatusInfo;
23214 + connectionInfoCode code;
23216 + } connectionInfo;
23219 + connectionInfoCode code;
23222 + } advancedConnectionInfo;
23225 + dialerStatusCode code;
23235 + framingInfoCode framingInfo;
23236 + IOStatusCode ioStatus;
23239 + lapmStatusCode code;
23243 + lapmTakedownReason reason;
23244 + lapmErrorCode error;
23245 + lapmTestResultCode testResult;
23254 + long nFrameErrors;
23260 + lapmParameterCode code;
23265 + v42bisStatusCode code;
23269 + v42bisErrorCode error;
23279 + mnpStatusCode code;
23283 + mnpTakedownReason reason;
23284 + mnpErrorCode error;
23288 + long nFrameErrors;
23308 + long framesPending;
23314 + mnpParameterCode code;
23319 + v70StatusCode code;
23323 + v70TakedownReason reason;
23324 + v70ErrorCode error;
23328 + long nFrameErrors;
23343 + long framesPending;
23350 + v70TakedownReason reason;
23363 + audioStatusCode code;
23375 + long nFrameErrors;
23386 + v80StatusCode code;
23390 + v80TakedownReason reason;
23391 + v80ErrorCode error;
23395 + long nFrameErrors;
23412 + v70ParameterCode code;
23422 + callerIDStatusCode code;
23428 + callerIDErrorCode code;
23437 + } callerIDStatus;
23448 + overlayStatusCode code;
23456 + ulong nBitErrors;
23457 + ulong nBlockErrors;
23459 + ulong nAudioBits;
23460 + ulong nAudioBlocks;
23461 + ulong nAudioSyncErrors;
23462 + ulong nAudioBlockErrors;
23469 + } logFileControlStatus;
23480 + } modemStatusStruct;
23482 +typedef void (SM_DECL *statusHandlerType) (void *gDslVars, modemStatusStruct*);
23483 +#endif /* ADSL_MODEM */
23485 +/****************************************************************************/
23486 +/* 1. Type definitions. */
23488 +/* 1.5 Command structure */
23489 +/****************************************************************************/
23493 + Boolean remoteModemIsFlex;
23494 + uchar countryCode;
23495 + ushort manufacturerId;
23496 + uchar licenseeId;
23497 + uchar productCapabilities;
23498 + Boolean digitalModeFlag;
23499 + Boolean prototypeFlag;
23506 + symbolRateMap symbolRates;
23507 + dataRateMap dataRates;
23508 + dataRateMap dataRates56k;
23509 + dataRateMap dataRatesFlex;
23510 + featureMap features;
23511 + bitMap auxFeatures;
23512 + bitMap demodCapabilities;
23513 + long rateThresholdAdjustment; /* dB Q4 */
23514 + FlexV8bisStruct flexRemoteV8bisInfo;
23515 + } dataPumpCapabilities;
23517 +#ifndef ADSL_MODEM
23518 +typedef struct SoftwareModemCommandParameters
23520 + modemCommandCode command;
23524 + ulong hybridDelayQ4ms;
23525 + long modemSampleRate;
23529 + NVRAMConfiguration *nvramConfigurationPtr;
23532 + uchar *phoneNumber;
23533 + uchar *faxECMPageBufferPtr;
23534 + CountryDescriptor *countryDescriptorTable;
23537 + dataRateMap dteRate;
23542 + v8ControlType code;
23548 + directionType direction;
23549 + v8bisConnectionSetup setup;
23551 + voidFuncType confirmMsFunc;
23552 + voidFuncType genMsFunc;
23553 + xmtHandlerWithRtnValType ogmFunc;
23557 + directionType direction;
23561 + directionType direction;
23562 + modulationMap modulations;
23563 + dataPumpCapabilities capabilities;
23588 + v8bisMessageSpec;
23591 + linkLayerType type;
23593 + dataRateMap rxDataRate;
23594 + dataRateMap txDataRate;
23595 + long rtDelayQ4ms;
23596 + rxDataHandlerType rxDataHandlerPtr;
23597 + txDataHandlerType txDataHandlerPtr;
23603 + directionType direction;
23604 + long fill[2]; /* need to match linkLayerSpec */
23605 + rxDataHandlerType rxDataHandlerPtr;
23606 + txDataHandlerType txDataHandlerPtr;
23610 + framerParameterCode code;
23612 + } framerParameterSpec;
23615 + bitMap callProgressDetectorSetup;
23616 + signalDetectorType callProgressDetectorPtr; /* if nil, use defaults */
23617 + signalDetectorType customDetectorPtr; /* if nil, no custom detector */
23618 + } callProgressMonitorSpec;
23621 + ulong maxTones; /* maximum number of simultaneous tones to detect */
23622 + ulong allowableVariance; /* maximum cumulative variance in the eight interpolated frequencies */
23623 + ulong totalPowerThreshold; /* ignore complete block if power less than this */
23624 + ulong powerShiftThreshold; /* ignore a bin if its power is less than (totalPowerValue >> powerShiftThreshold) */
23625 + ulong toneMatchThresholdHz; /* tones within +/- this many Hz of original tone are considered the same tone */
23626 + ulong binSeparation; /* ignore tones with a spacing of less than this */
23627 + ulong outsideFreqDeviation; /* an individual value in the interpolated array can be up to this many Hz outside of the expected angle range */
23631 + uchar *dialString; /* nil limited string for DTMF dialing sequence */
23632 + long pulseBreakTime,
23634 + pulseInterDigitTime,
23636 + toneInterDigitTime,
23641 + signalWaitTimeout,
23642 + blindDialingTimeout;
23643 + bitMap dialerSetup;
23644 + bitMap callProgressDetectorSetup;
23645 + signalDetectorType callProgressDetectorPtr; /* if nil, use defaults */
23646 + signalDetectorType customDetectorPtr; /* if nil, no custom detector */
23647 + hookHandlerType hookHandlerPtr; /* nil if DTMF dialing specified*/
23654 + } callingToneSpec;
23657 + statusHandlerType statusHandlerPtr;
23658 + eyeHandlerType eyeHandlerPtr;
23659 + logHandlerType logHandlerPtr;
23660 + rxDataHandlerType rxDataHandlerPtr;
23661 + txDataHandlerType txDataHandlerPtr;
23675 + bitMap setupLapm;
23676 + rxDataHandlerType rxAudioHandlerPtr;
23677 + txDataHandlerType txAudioHandlerPtr;
23682 + ulong LogChannelNum;
23684 + } EstChannelSpec;
23688 + } WaitChannelSpec;
23692 + ulong LogChannelNum;
23695 + } RelChannelSpec;
23700 + dataRateMap rxAudioRate;
23701 + dataRateMap txAudioRate;
23702 + rxAudioHandlerType rxAudioHandlerPtr;
23703 + txAudioHandlerType txAudioHandlerPtr;
23741 + } callProgressParamSpec;
23744 + v250IdStringCode v250IdCode;
23745 + uchar *v250IdString;
23749 + } modemCommandStruct;
23751 +typedef Boolean (*commandHandlerType) (modemCommandStruct*);
23752 +#endif /* ADSL_MODEM */
23756 +/****************************************************************************/
23757 +/* 2. Constant definitions. */
23759 +/* 2.1 Definitive constants */
23760 +/****************************************************************************/
23762 +#define kMaxSampleBlockSize 48
23763 +#define kMaxDataBlockSize 48
23765 +#define kMaxDialStringLength 127
23766 +#define kCallProgressSampleRate 7200
23768 +#define kMaxCallerIDMessageLength 80
23770 +/****************************************************************************/
23771 +/* 2. Constant definitions. */
23773 +/* 2.2 Bit maps */
23774 +/****************************************************************************/
23776 +/* modulationMap */
23778 +#define kIdle 0x00000000
23779 +#define kV25 0x00000001
23780 +#define kV8 0x00000002
23781 +#define kCid 0x00000004
23782 +#define kV8bis 0x00000008
23783 +#define kV21 0x00000010
23784 +#define kV22 0x00000020
23785 +#define kV23 0x00000040
23786 +#define kV32 0x00000080
23787 +#define kV34 0x00000100
23788 +#define kX2 0x00000200
23789 +#define kV90 0x00000400
23790 +#define k56Flex 0x00000800
23791 +#define kV27 0x00001000
23792 +#define kV29 0x00002000
23793 +#define kV17 0x00004000
23794 +#define kV34HDX 0x00008000
23795 +#define kV34HDXC 0x00010000
23796 +#define kBell103 0x00100000
23797 +#define kBell212 0x00200000
23798 +#define kDataCallingTone 0x01000000
23799 +#define kFaxCallingTone 0x02000000
23801 +#define kV22FastNZConnect 0x04000000
23802 +#define kV22FastNNZConnect 0x08000000
23803 +#define kV22FastConnect (kV22FastNZConnect|kV22FastNNZConnect)
23804 +#define kV22bisFastConnect 0x10000000
23807 +#define kDataModulations (kV25 | kV8 | kV21 | kV22FastConnect | kV22bisFastConnect | kV22 | kV23 | kV32 | kV34 | kBell103 | kBell212)
23808 +#define kDataOnlyModulations (kV21 | kV22 | kV23 | kV32 | kBell103 | kBell212)
23809 +#define kPCMModulations (kV90 | kX2 | k56Flex)
23811 +#define kFaxModulations (kV25 | kV21 | kV27 | kV29 | kV17)
23812 +#define kFaxOnlyModulations (kV27 | kV29 | kV17)
23813 +#define kFaxModulationShift 12
23815 +/* symbolRateMap */
23817 +#define k1200Hz 0x00000001
23818 +#define k1600Hz 0x00000002
23819 +#define k2400Hz 0x00000004
23820 +#define k2743Hz 0x00000008
23821 +#define k2800Hz 0x00000010
23822 +#define k3000Hz 0x00000020
23823 +#define k3200Hz 0x00000040
23824 +#define k3429Hz 0x00000080
23825 +#define k8000Hz 0x00000100
23827 +#define kAllSymbolRates ( k1200Hz | k1600Hz | k2400Hz | k2743Hz | \
23828 + k2800Hz | k3000Hz | k3429Hz | k8000Hz )
23832 +#define k75bps 0x00000002
23833 +#define k300bps 0x00000004
23834 +#define k600bps 0x00000008
23835 +#define k1200bps 0x00000010
23836 +#define k2400bps 0x00000020
23837 +#define k4800bps 0x00000040
23838 +#define k7200bps 0x00000080
23839 +#define k9600bps 0x00000100
23840 +#define k12000bps 0x00000200
23841 +#define k14400bps 0x00000400
23842 +#define k16800bps 0x00000800
23843 +#define k19200bps 0x00001000
23844 +#define k21600bps 0x00002000
23845 +#define k24000bps 0x00004000
23846 +#define k26400bps 0x00008000
23847 +#define k28800bps 0x00010000
23848 +#define k31200bps 0x00020000
23849 +#define k33600bps 0x00040000
23850 +#define k36000bps 0x00080000
23851 +#define k38400bps 0x00100000
23852 +#define k57600bps 0x00200000
23853 +#define k115200bps 0x00400000
23854 +#define k230400bps 0x00800000
23855 +#define k460800bps 0x01000000
23856 +#define k921600bps 0x02000000
23858 + * kPCMRate is used to identify that the reported rate is
23859 + * PCM modulation rate, and is only used for PCM modulation while
23860 + * reporting rate !!!!
23862 +#define kPCMRate 0x40000000
23863 +#define kPCMFlexRate 0x80000000
23864 +#define kAllDataRates 0x0FFFFFFF
23866 +/* rates specific for X2 and V.90 */
23867 +#define kPCM25333bps 0x00000001
23868 +#define kPCM26666bps 0x00000002
23869 +#define kPCM28000bps 0x00000004
23870 +#define kPCM29333bps 0x00000008
23871 +#define kPCM30666bps 0x00000010
23872 +#define kPCM32000bps 0x00000020
23873 +#define kPCM33333bps 0x00000040
23874 +#define kPCM34666bps 0x00000080
23875 +#define kPCM36000bps 0x00000100
23876 +#define kPCM37333bps 0x00000200
23877 +#define kPCM38666bps 0x00000400
23878 +#define kPCM40000bps 0x00000800
23879 +#define kPCM41333bps 0x00001000
23880 +#define kPCM42666bps 0x00002000
23881 +#define kPCM44000bps 0x00004000
23882 +#define kPCM45333bps 0x00008000
23883 +#define kPCM46666bps 0x00010000
23884 +#define kPCM48000bps 0x00020000
23885 +#define kPCM49333bps 0x00040000
23886 +#define kPCM50666bps 0x00080000
23887 +#define kPCM52000bps 0x00100000
23888 +#define kPCM53333bps 0x00200000
23889 +#define kPCM54666bps 0x00400000
23890 +#define kPCM56000bps 0x00800000
23891 +#define kPCM57333bps 0x01000000
23893 +#define kV90ServerToClientDataRates \
23894 + ( kPCM28000bps | kPCM29333bps | kPCM30666bps | \
23895 + kPCM32000bps | kPCM33333bps | kPCM34666bps | \
23896 + kPCM36000bps | kPCM37333bps | kPCM38666bps | \
23897 + kPCM40000bps | kPCM41333bps | kPCM42666bps | \
23898 + kPCM44000bps | kPCM45333bps | kPCM46666bps | \
23899 + kPCM48000bps | kPCM49333bps | kPCM50666bps | \
23900 + kPCM52000bps | kPCM53333bps | kPCM54666bps | \
23901 + kPCM56000bps | kPCM57333bps )
23903 +#define kV90ClientToServerDataRates \
23904 + ( k4800bps | k7200bps | k9600bps | k12000bps | \
23905 + k14400bps | k16800bps | k19200bps | k21600bps | \
23906 + k24000bps | k26400bps | k28800bps | k31200bps | \
23911 +#define kX2ServerToClientDataRates \
23912 + ( kPCM25333bps | kPCM26666bps | kPCM28000bps | \
23913 + kPCM29333bps | kPCM30666bps | kPCM32000bps | \
23915 + kPCM34666bps | kPCM36000bps | kPCM37333bps | \
23916 + kPCM38666bps | kPCM40000bps | kPCM41333bps | \
23917 + kPCM42666bps | kPCM44000bps | kPCM45333bps | \
23918 + kPCM46666bps | kPCM48000bps | kPCM49333bps | \
23919 + kPCM50666bps | kPCM52000bps | kPCM53333bps | \
23920 + kPCM54666bps | kPCM56000bps | kPCM57333bps )
23921 +#define kX2ClientToServerDataRates \
23922 + ( k4800bps | k7200bps | k9600bps | k12000bps | k14400bps | \
23923 + k16800bps | k19200bps | k21600bps | k24000bps | k26400bps | k28800bps | \
23927 + Rates specific for Flex
23929 +#define kPCMFlex32000bps 0x00000001
23930 +#define kPCMFlex34000bps 0x00000002
23931 +#define kPCMFlex36000bps 0x00000004
23932 +#define kPCMFlex38000bps 0x00000008
23933 +#define kPCMFlex40000bps 0x00000010
23934 +#define kPCMFlex42000bps 0x00000020
23935 +#define kPCMFlex44000bps 0x00000040
23936 +#define kPCMFlex46000bps 0x00000080
23937 +#define kPCMFlex48000bps 0x00000100
23938 +#define kPCMFlex50000bps 0x00000200
23939 +#define kPCMFlex52000bps 0x00000400
23940 +#define kPCMFlex54000bps 0x00000800
23941 +#define kPCMFlex56000bps 0x00001000
23942 +#define kPCMFlex58000bps 0x00002000
23943 +#define kPCMFlex60000bps 0x00004000
23945 +#define kFlexServerToClientDataRates \
23946 + ( kPCMFlex32000bps | kPCMFlex34000bps | kPCMFlex36000bps | kPCMFlex38000bps | \
23947 + kPCMFlex40000bps | kPCMFlex42000bps | kPCMFlex44000bps | kPCMFlex46000bps | \
23948 + kPCMFlex48000bps | kPCMFlex50000bps | kPCMFlex52000bps | kPCMFlex52000bps | \
23949 + kPCMFlex54000bps | kPCMFlex56000bps | kPCMFlex58000bps | kPCMFlex60000bps )
23951 +#define kFlexClientToServerDataRates \
23952 + ( k4800bps | k7200bps | k9600bps | k12000bps | \
23953 + k14400bps | k16800bps | k19200bps | k21600bps | \
23954 + k24000bps | k26400bps | k28800bps | k31200bps )
23957 +#define k2400BitShift 5
23958 +#define k4800BitShift 6
23960 +#define kPCM28000bpsShift 2
23962 +#define kV21Rates k300bps
23963 +#define kV22Rates k1200bps
23964 +#define kV22bisRates (k1200bps | k2400bps)
23965 +#define kV23Rates (k75bps | k1200bps)
23966 +#define kCidRates (k1200bps)
23967 +#define kV32Rates (k4800bps | k9600bps)
23968 +#define kV32bisRates (kV32Rates | k7200bps | k12000bps | k14400bps)
23969 +#define kV32terboRates (kV32bisRates | k16800bps | k19200bps)
23970 +#define kV34Rates ( k2400bps | k4800bps | k7200bps | k9600bps | k12000bps | k14400bps | \
23971 + k16800bps | k19200bps | k21600bps | k24000bps | k26400bps | k28800bps | \
23972 + k31200bps | k33600bps )
23974 +#define kV27Rates (k2400bps | k4800bps)
23975 +#define kV29Rates (k4800bps | k7200bps | k9600bps)
23976 +#define kBell103Rates k300bps
23977 +#define kBell212Rates k1200bps
23980 +/* Demodulator capabilities */
23981 +#define kNeecEnabled 0x00000001
23982 +#define kPFeecEnabled 0x00000002
23983 +#define kIeecEnabled 0x00000004
23984 +#define kFeecEnabled 0x00000008
23986 +#define kRapidEqualizerTraining 0x00000010
23987 +#define kRapidPECTraining 0x00000020
23988 +#define kRapidECTraining 0x00000040
23989 +#define kAutoLoadReductionEnabled 0x00000080
23991 +#define kTimingTrackingEnabled 0x00000100
23992 +#define kPhaseLockedLoopEnabled 0x00000200
23993 +#define kFeecPhaseLockedLoopEnabled 0x00000400
23994 +#define kPhaseJitterTrackingEnabled 0x00000800
23996 +#define kClockErrorTrackingEnabled 0x00001000
23997 +#define kFreqOffsetTrackingEnabled 0x00002000
23998 +#define kFeecFreqOffsetTrackingEnabled 0x00004000
24000 +#define kShorterNeecEnabled 0x00008000
24001 +#define kShorterPFeecEnabled 0x00010000
24002 +#define kFrondEndHPFilterEnabled 0x00020000
24003 +#define kGainControlEnabled 0x00040000
24004 +#define kPhaseHitControlEnabled 0x00080000
24005 +#define kBandEdgeCorrectorEnabled 0x00100000
24006 +#define kDisableFaxFastClearDown 0x00200000
24008 +#define kImdOffsetCompensationEnabled 0x00400000
24010 +#define kV34ShortEqlLengthExtShift 23
24011 +#define kV34ShortEqlLengthExtMask (0x3<<kV34ShortEqlLengthExtShift)
24012 +#define kV34EqlLengthReductionEnabled (1<<(kV34ShortEqlLengthExtShift+2))
24013 +#define kPCMIeecLengthReductionEnabled (1<<(kV34ShortEqlLengthExtShift+3))
24017 +#define kAllFeatures 0xFFFFFFFF
24019 +#define kAutomodingEnabled 0x00000001 /* bit 1 */
24020 +#define kAutomodingDisabled 0x00000000 /* bit 1 */
24022 +#define kV8SendCIEnabled 0x00000002 /* bit 2 */
24023 +#define kV8SendCIDisabled 0x00000000 /* bit 2 */
24025 +#define kV34CMEModem 0x00000004 /* bit 3 */
24026 +#define kV34NotCMEModem 0x00000000 /* bit 3 */
24028 +#define kV34ExtraINFOPreamble 0x00000008 /* bit 4 */
24030 +#define kRetrainingEnabled 0x00000010
24031 +#define kRateRenegotiationEnabled 0x00000020
24032 +#define kTrellisCodingEnabled 0x00000040
24034 +/* Fax specific features */
24035 +#define kFaxShortTraining 0x00000080
24036 +#define kFaxEchoSuppressionEnabled 0x00000100
24038 +/* V.22/V.22bis specific features */
24039 +#define kV22GuardTone1800HzEnabled 0x00000200
24040 +#define kV22GuardTone550HzEnabled 0x00000400
24043 +/* V.34 specific features */
24045 +#define kV34bisEnabled 0x00000800
24047 +#define kV34PowerReductionAllowed 0x00001000
24048 +#define kAuxChannelEnabled 0x00002000
24049 +#define kAuxChannelDisabled 0x00000000
24050 +#define kV34TrellisEncoderTypeMask 0x0000C000
24051 +#define kV34TrellisEncoderTypeShift 14
24053 +#define kTRN16 0x00010000
24054 +#define kAssymDataRatesEnabled 0x00020000
24055 +#define kNonLinearCodingEnabled 0x00040000
24056 +#define kConstShapingEnabled 0x00080000
24057 +#define kPrecodingEnabled 0x00100000
24059 +#define kV34LoFcAt2400HzEnabled 0x00200000
24060 +#define kV34HiFcAt2400HzEnabled 0x00400000
24061 +#define kV34LoFcAt2743HzEnabled 0x00800000
24062 +#define kV34HiFcAt2743HzEnabled 0x01000000
24063 +#define kV34LoFcAt2800HzEnabled 0x02000000
24064 +#define kV34HiFcAt2800HzEnabled 0x04000000
24065 +#define kV34LoFcAt3000HzEnabled 0x08000000
24066 +#define kV34HiFcAt3000HzEnabled 0x10000000
24067 +#define kV34LoFcAt3200HzEnabled 0x20000000
24068 +#define kV34HiFcAt3200HzEnabled 0x40000000
24069 +#define kV34LoFcAt3429HzEnabled 0x80000000
24070 +#define kV34HiFcAt3429HzEnabled 0x80000000
24072 +/* auxiliary features definintions map */
24074 +#define kLoopbackTestFinish 0x00000000
24075 +#define kLoopbackTestV54Loop1 0x00000001
24076 +#define kLoopbackTestV54Loop2 0x00000002
24077 +#define kLoopbackTestV54Loop3 0x00000003
24078 +#define kLoopbackTestTypeMask 0x00000003
24079 +#define kLoopbackTestAutoRespondEnabled 0x00000004
24080 +#define kLoopbackSelfTest 0x00000008
24082 +#define kPreempFilterMask 0x000000F0
24083 +#define kPreempFilterShift 4
24085 +#define kPcmCodingTypeMuLaw 0x00000100
24086 +#define kPcmServerToServerEnabled 0x00000200
24087 +#define kPcmIsServerModem 0x00000400
24088 +#define kPcmAnalogModemAvailable 0x00000800
24089 +#define kPcmDigitalModemAvailable 0x00001000
24090 +#define kPcmDceOnDigitalNetwork 0x00002000
24091 +#define kPcmDModemPwrCalAtCodecOut 0x00004000
24092 +#define kPcm3429UpstreamAvailable 0x00008000
24094 +#define kPcmSpectralShapingBitsMask 0x00070000
24095 +#define kPcmSpectralShapingBitsShift 16
24096 +#define kV90ServerNotDetSbarAfterJdbarFix 0x00080000
24098 +#define kAutomoderPassive 0x00400000
24100 +#define kV8HoldANSamUntilDetCI 0x00800000
24101 +#define kFaxSendFromOrgSide 0x01000000
24102 +#define kFaxV34HDX2400bpsCtrlChan 0x02000000
24103 +#define kFaxV34HDXAllowAsymCtrlChan 0x04000000
24104 +#define kV8ANSamStageDisabled 0x08000000
24106 +#define kFlexSkipV8bis 0x10000000
24107 +#define kV34ControlChannelEnabled 0x20000000
24108 +#define kV34SeamlessRateChangeEnabled 0x40000000
24110 +#define kPTTTest 0x80000000
24112 +/* call progress detection Map */
24114 +#define kDialTone 0x00000001
24115 +#define kRingBack 0x00000002
24116 +#define kBusy 0x00000004
24117 +#define kReorder 0x00000008
24118 +#define k2ndDTn 0x00000010
24119 +#define kBongTone 0x00000020
24121 +/* Break type bit settings */
24122 +#define kExpedited 0x0001
24123 +#define kDestructive 0x0002
24125 +/* async Framer setup map */
24127 +#define kNDataBitsMask 0x03
24128 +#define k5DataBits 0x00
24129 +#define k6DataBits 0x01
24130 +#define k7DataBits 0x02
24131 +#define k8DataBits 0x03
24133 +#define kNDataBitsShift 0
24134 +#define kNDataBitsOffset 5
24136 +#define kParityTypeMask 0x1C
24137 +#define kNoParity 0x00
24138 +#define kOddParity 0x04
24139 +#define kEvenParity 0x08
24140 +#define kMarkParity 0x0C
24141 +#define kSpaceParity 0x10
24143 +#define kNStopBitsMask 0x60
24144 +#define k1StopBits 0x00
24145 +#define k2StopBits 0x20
24147 +#define kNStopBitsShift 5
24148 +#define kNStopBitsOffset 1
24150 +/* Sync Framer setup map */
24152 +#define kUnderrunCharMask 0xff
24153 +#define kRepeatLastCharOnUnderrun 0x100
24155 +/* HDLC sync framer setup maps */
24156 +#define kNFlagsBeforeFramesMask 0x3F
24157 +#define kNFlagsBeforeFramesShift 0
24159 +#define kNFlagsBetweenFramesMask 0x3F
24160 +#define kNFlagsBetweenFramesShift 6
24162 +#define k32BitCRC 0x1000
24163 +#define kFlagSharingEnabled 0x2000
24165 +#define kNFlagsBeforeReportMask 0x03 /* no. of *extra* flags reqd before frame */
24166 +#define kNFlagsBeforeReportShift 14
24168 +#define kTxDeferredCRC 0x10000
24169 +#define kRxDeferredCRC 0x20000
24170 +#define kTxIdleMarks 0x40000
24171 +#define kNoCRC 0x80000
24173 +/* SAM framer setup maps */
24175 +#define kSAMTransparentIdleTypeMask 0x00000003
24176 +#define kSAMTransparentIdleTypeShift 0
24177 +#define kSAMFramedIdleTypeMask 0x00000004
24178 +#define kSAMFramedIdleTypeShift 2
24179 +#define kSAMFramedOverrunActionMask 0x00000010
24180 +#define kSAMFramedOverrunActionShift 4
24181 +#define kSAMHalfDuplexModeMask 0x00000020
24182 +#define kSAMHalfDuplexModeShift 5
24183 +#define kSAMCRCTypeMask 0x000000C0
24184 +#define kSAMCRCTypeShift 6
24185 +#define kSAMNRZIEnabledMask 0x00000100
24186 +#define kSAMNRZIEnabledShift 8
24187 +#define kSAMSyn1Mask 0x00FF0000
24188 +#define kSAMSyn1Shift 16
24189 +#define kSAMSyn2Mask 0xFF000000
24190 +#define kSAMSyn2Shift 24
24192 +/* <trans_idle> */
24193 +#define kSAM8bitSYNHuntDisabled 0
24194 +#define kSAM8bitSYNHuntEnabled ((ulong)1 << kSAMTransparentIdleTypeShift)
24195 +#define kSAM16bitSYNHuntEnabled ((ulong)2 << kSAMTransparentIdleTypeShift)
24197 +/* <framed_idle> */
24198 +#define kSAMSendFlagsOnIdle 0
24199 +#define kSAMSendMarksOnIdle ((ulong)1 << kSAMFramedIdleTypeShift)
24201 +/* <framed_un_ov> */
24202 +#define kSAMAbortOnUnderrun 0
24203 +#define kSAMFlagsOnUnderrun ((ulong)1 << kSAMFramedOverrunActionShift)
24206 +#define kSAMHalfDuplexNoAuto 0
24207 +#define kSAMHalfDuplexAuto ((ulong)1 << kSAMHalfDuplexModeShift)
24211 +#define kSAMNoCRC 0
24212 +#define kSAM16bitCRC ((ulong)1 << kSAMCRCTypeShift)
24213 +#define kSAM32bitCRC ((ulong)2 << kSAMCRCTypeShift)
24216 +#define kSAMNRZIDisabled 0
24217 +#define kSAMNRZIEnabled ((ulong)1 << kSAMNRZIEnabledShift)
24220 +/* LAPM setup maps */
24221 +#define kLapmDirection 0x00000001 /* Bit 0 */
24222 +#define kLapmSREJEnabled 0x00000002 /* Bit 1 */
24223 +#define kLapmDetectionEnabled 0x00000004 /* Bit 2 */
24224 +#define kLapmLongADPEnabled 0x00000008 /* Bit 3 */
24226 +#define kLapmCompressionEnabledMask 0x00000030
24227 +#define kLapmTxCompressionEnabled 0x00000010 /* Bit 4 */
24228 +#define kLapmRxCompressionEnabled 0x00000020 /* Bit 5 */
24229 +#define kLapmCompressionEnabledShift 4
24231 +#define kLapmRetryLimitMask 0x000000C0 /* Bits 6,7 */
24233 +#define kLapmNoRetryLimit 0x00000000
24234 +#define kLapm4Retries 0x00000040
24235 +#define kLapm8Retries 0x00000080
24236 +#define kLapm20Retries 0x000000C0
24238 +#define kLapmWindowSizeMask 0x00001F00 /* Bits 8-12 */
24239 +#define kLapmWindowSizeShift 8
24241 +#define kLapmWindowSize8 0x00000800
24242 +#define kLapmWindowSize15 0x00000F00
24245 +#define kLapmInfoFieldSizeMask 0x0000E000 /* Bits 13-15 */
24246 +#define kLapmInfoField8Bytes 0x00000000
24247 +#define kLapmInfoField16Bytes 0x00002000
24248 +#define kLapmInfoField32Bytes 0x00004000
24249 +#define kLapmInfoField64Bytes 0x00006000
24250 +#define kLapmInfoField128Bytes 0x00008000
24251 +#define kLapmInfoField192Bytes 0x0000A000
24252 +#define kLapmInfoField256Bytes 0x0000C000
24253 +#define kLapmInfoField512Bytes 0x0000E000
24254 +#define kLapmInfoFieldSizeShift 13
24256 +#define kLapmT400Mask 0x00030000 /* Bits 16-17 */
24257 +#define kLapmAutoT400 0x00000000
24258 +#define kLapm750msT400 0x00010000
24259 +#define kLapm3secT400 0x00020000
24260 +#define kLapm30secT400 0x00030000
24262 +#define kLapmT401Mask 0x000C0000 /* Bits 18-19 */
24263 +#define kLapmAutoT401 0x00000000
24264 +#define kLapm750msT401 0x00040000
24265 +#define kLapm3secT401 0x00080000
24266 +#define kLapm6secT401 0x000C0000
24268 +#define kLapmT403Mask 0x00300000 /* Bits 20-21 */
24269 +#define kLapmAutoT403 0x00000000
24270 +#define kLapm750msT403 0x00100000
24271 +#define kLapm2secT403 0x00200000
24272 +#define kLapm4secT403 0x00300000
24276 +#define kLapmDictSizeMask 0x00C00000 /* Bits 22-23 */
24277 +#define kLapmDictSize512 0x00000000
24278 +#define kLapmDictSize1024 0x00400000
24279 +#define kLapmDictSize2048 0x00800000
24280 +#define kLapmDictSize4096 0x00C00000
24282 +#define kLapmStringSizeMask 0xFF000000 /* Bits 24-31 */
24283 +#define kLapmStringSizeShift 24
24285 +/* MNP setup maps */
24287 +#define kMnpMinPLevel 0x00000001 /* Bit 0: 1 - Minimal, 0 - Standard */
24288 +#define kMnpStdPLevel 0x00000000 /* Bit 0: 1 - Minimal, 0 - Standard */
24290 +#define kMnpOptimizationEnabled 0x00000002 /* Bit 1 */
24291 +#define kMnpOptimizationDisabled 0x00000000 /* Bit 1 */
24293 +#define kMnpCompressionEnabled 0x00000004 /* Bit 2 */
24294 +#define kMnpCompressionDisabled 0x00000000 /* Bit 2 */
24296 +#define kMnpClassMask 0x00000018
24297 +#define kMnpClassShift 3
24298 +#define kMnpClass1 0x00000008
24299 +#define kMnpClass2 0x00000010
24300 +#define kMnpClass3 0x00000018 /* Bits 3,4 */
24302 +#define kMnpMaxRetryMask 0x00000060 /* Bits 5,6 */
24303 +#define kMnpMaxRetryShift 5
24304 +#define kMnpNoRetryLimit 0x00000000
24305 +#define kMnp4Retries 0x00000020
24306 +#define kMnp8Retries 0x00000040
24307 +#define kMnp20Retries 0x00000060
24309 +#define kMnpInfoFieldSizeMask 0x00000380 /* Bits 7-9 */
24310 +#define kMnpInfoFieldSizeShift 7
24311 +#define kMnpInfoField8Bytes 0x00000000
24312 +#define kMnpInfoField16Bytes 0x00000080
24313 +#define kMnpInfoField32Bytes 0x00000100
24314 +#define kMnpInfoField64Bytes 0x00000180
24315 +#define kMnpInfoField128Bytes 0x00000200
24316 +#define kMnpInfoField192Bytes 0x00000280
24317 +#define kMnpInfoField256Bytes 0x00000300
24318 +#define kMnpInfoField260Bytes 0x00000380
24320 +#define kMnpT400Mask 0x00003000 /* Bits 12,13 */
24321 +#define kMnpT400Shift 12
24322 +#define kMnpAutoT400 0x00000000
24323 +#define kMnp750msT400 0x00001000
24324 +#define kMnp3secT400 0x00002000
24325 +#define kMnp6secT400 0x00003000
24327 +#define kMnpT401Mask 0x0000C000 /* Bits 14,15 */
24328 +#define kMnpT401Shift 14
24329 +#define kMnpAutoT401 0x00000000
24330 +#define kMnp750msT401 0x00004000
24331 +#define kMnp3secT401 0x00008000
24332 +#define kMnp6secT401 0x0000C000
24334 +#define kMnpT403Mask 0x00030000 /* Bits 16,17 */
24335 +#define kMnpT403Shift 16
24336 +#define kMnpAutoT403 0x00000000
24337 +#define kMnp60secT403 0x00010000
24338 +#define kMnp600secT403 0x00020000
24339 +#define kMnp3600secT403 0x00030000
24341 +#define kMnpFallbackTypeMask 0x000C0000 /* Bits 18,19 */
24342 +#define kMnpFallbackTypeShift 18
24343 +#define kMnpNoFallback 0x00000000
24344 +#define kMnpFallbackTime 0x00040000
24345 +#define kMnpFallback200 0x00080000
24346 +#define kMnpFallbackChar 0x000C0000
24348 +#define kMnpWindowSizeMask 0x00300000 /* Bits 20,21 */
24349 +#define kMnpWindowSizeShift 20
24350 +#define kMnp1Frame 0x00000000
24351 +#define kMnp4Frames 0x00100000
24352 +#define kMnp8Frames 0x00200000
24353 +#define kMnp16Frames 0x00300000
24355 +#define kMnpDirection 0x00800000 /* Bit 22 */
24357 +#define kMnpFallbackCharMask 0xFF000000 /* Bit 24-31 */
24358 +#define kMnpFallbackCharShift 24
24360 +/* kV34HDXTurnOffCurrentModeCmd state parameter values */
24362 +#define kV34HDXTurnOffAsClearDown 0
24363 +#define kV34HDXTurnOffFromControlSource 1
24364 +#define kV34HDXTurnOffFromControlDestination 2
24365 +#define kV34HDXTurnOffFromPrimarySource 3
24366 +#define kV34HDXTurnOffFromPrimaryDestination 4
24368 +/* V70 setup maps */
24370 +#define kV70Direction 0x00000001 /* Bit 0 */
24371 +#define kV70uIHEnabled 0x00000002 /* Bit 1 */
24372 +#define kV70AudioHeaderEnabled 0x00000004 /* Bit 2 */
24373 +#define kV70SilenceSupprEnabled 0x00000008 /* Bit 3 */
24375 +#define kV70SuspendResumeShift 4
24376 +#define kV70SuspendResumeMask (3 << kV70SuspendResumeShift)
24377 +#define kV70SuspendResumeDisabled 0x00000000 /* Bit 4,5 */
24378 +#define kV70SuspendResumeWAddr 0x00000010 /* Bit 4 */
24379 +#define kV70SuspendResumeWoAddr 0x00000020 /* Bit 5 */
24381 +#define kV70CrcLengthShift 6
24382 +#define kV70CrcLengthMask (3 << kV70CrcLengthShift)
24383 +#define kV70CrcLength16 0x00000000 /* Bit 6,7 */
24384 +#define kV70CrcLength8 0x00000040 /* Bit 6 */
24385 +#define kV70CrcLength32 0x00000080 /* Bit 7 */
24387 +#define kV70BlockingFactorShift 8
24388 +#define kV70BlockingFactorMask (3 << kV70BlockingFactorShift)
24389 +#define kV70BlockingFactor1 0x00000000 /* Bit 8,9 */
24390 +#define kV70BlockingFactor2 0x00000100 /* Bit 8 */
24391 +#define kV70BlockingFactor3 0x00000200 /* Bit 9 */
24392 +#define kV70BlockingFactor4 0x00000300 /* Bit 8,9 */
24394 +#define kV70InitChannelsShift 10
24395 +#define kV70InitChannelsMask (1 << kV70InitChannelsShift)
24396 +#define kV70InitNoChannels 0x00000000 /* Bit 10,11 */
24397 +#define kV70InitDataChannel 0x00000400 /* Bit 10,11 */
24398 +#define kV70InitAudioChannel 0x00000800 /* Bit 10,11 */
24399 +#define kV70InitBothChannels 0x00000C00 /* Bit 10,11 */
24401 +#define kV70OOBEnabled 0x00001000 /* Bit 12 */
24403 +/* V80 setup maps */
24405 +#define kV80Direction 0x00000001 /* Bit 0 */
24407 +#define kV80ModeShift 1
24408 +#define kV80ModeMask (3 << kV80ModeShift)
24409 +#define kV80SyncMode (0 << kV80ModeShift)
24410 +#define kV80TunnellingMode (1 << kV80ModeShift)
24411 +#define kV80SamMode (2 << kV80ModeShift)
24412 +#define kV80SamTransparentMode (2 << kV80ModeShift)
24413 +#define kV80SamFramedMode (3 << kV80ModeShift)
24415 +#define kV80TransIdleShift 3
24416 +#define kV80TransIdleMask (3 << kV80TransIdleShift)
24417 +#define kV80TransIdleNoHunt (0 << kV80TransIdleShift)
24418 +#define kV80TransIdleHunt8 (1 << kV80TransIdleShift)
24419 +#define kV80TransIdleHunt16 (2 << kV80TransIdleShift)
24421 +#define kV80FrameIdleShift 5
24422 +#define kV80FrameIdleMask (1 << kV80FrameIdleShift)
24423 +#define kV80FrameIdleFlags (0 << kV80FrameIdleShift)
24424 +#define kV80FrameIdleMarks (1 << kV80FrameIdleShift)
24426 +#define kV80FrameUnOvShift 6
24427 +#define kV80FrameUnOvMask (1 << kV80FrameUnOvShift)
24428 +#define kV80FrameUnOvAbort (0 << kV80FrameUnOvShift)
24429 +#define kV80FrameUnOvFlag (1 << kV80FrameUnOvShift)
24431 +#define kV80HdAutoShift 7
24432 +#define kV80HdAutoMask (1 << kV80HdAutoShift)
24433 +#define kV80HdAutoNormal (0 << kV80HdAutoShift)
24434 +#define kV80HdAutoExtended (1 << kV80HdAutoShift)
24436 +#define kV80CrcTypeShift 8
24437 +#define kV80CrcTypeMask (3 << kV80CrcTypeShift)
24438 +#define kV80NoCrc (0 << kV80CrcTypeShift)
24439 +#define kV80Crc16 (1 << kV80CrcTypeShift)
24440 +#define kV80Crc32 (2 << kV80CrcTypeShift)
24442 +#define kV80NrziShift 10
24443 +#define kV80NrziMask (1 << kV80NrziShift)
24444 +#define kV80NrziDisabled (0 << kV80NrziShift)
24445 +#define kV80NrziEnabled (1 << kV80NrziShift)
24447 +#define kV80Syn1Mask 0x00FF0000 /* Bit 16-23 */
24448 +#define kV80Syn1Shift 16
24449 +#define kV80Syn2Mask 0xFF000000 /* Bit 24-31 */
24450 +#define kV80Syn2Shift 24
24452 +/* kStartCallProgressMonitorCmd setup masks */
24454 +#define kDTMFDetectorDebouncerEnabled 0x0001
24455 +#define kModemSignalDetectorDebouncerEnabled 0x0002
24456 +#define kCallProgressDetectorDebouncerEnabled 0x0004
24457 +#define kCustomSignalDebouncerEnabled 0x0008
24458 +#define kFaxCallingToneSuppressionEnabled 0x0010
24459 +#define kDataCallingToneSuppressionEnabled 0x0020
24460 +#define kCISuppressionEnabled 0x0040
24461 +#define kAnsSuppressionEnabled 0x0080
24463 +/* kDialCmd setup masks (dialerSetup bit fields) */
24465 +#define kDTMFDialingEnabled 0x0001
24466 +#define kPulseDialingEnabled 0x0002
24467 +#define kModeSwitchEnabled 0x0004
24468 +#define kBlindDialingEnabled 0x0008
24469 +#define kPulseDialingMethodMask 0x0030
24470 +#define kDialModifierTranslationMask 0x00C0
24471 +#define kFlashWhilePulseDialingEnabled 0x0100
24473 +/* Pulse dialing method */
24474 +#define kPulseDialingNPulsesPerDigit 0x0000
24475 +#define kPulseDialingNplusOnePulsesPerDigit 0x0010
24476 +#define kPulseDialingTenMinusNPulsesPerDigit 0x0020
24478 +/* Dial modifier translation */
24479 +#define kTreatWasPause 0x0040 /* Tread 'W' modifier as pause */
24480 +#define kTreatCommaAsWaitForDialtone 0x0080
24483 +#include "C6xDefs.h"
24485 +#ifdef PENTIUM_MMX
24486 +#include "PentiumDefs.h"
24490 +#if defined(DSP16K) && !defined(SoftModemGlobals)
24491 +/* ensure that code generator does not use r5 */
24492 +register int *softmodem_h_should_not_be_included_after_softmodem_gh asm("r5");
24495 +/****************************************************************************/
24496 +/* 3. Interface functions. */
24498 +/****************************************************************************/
24502 +#ifndef SoftDslHeader
24503 +#include "SoftDsl.h"
24505 +extern char* SM_DECL SoftModemGetRevString(void);
24506 +extern char* SM_DECL SoftModemGetProductName(void);
24507 +extern char* SM_DECL SoftModemGetBuildDate(void);
24508 +extern char* SM_DECL SoftModemGetFullManufacturerName(void);
24509 +extern char* SM_DECL SoftModemGetShortManufacturerName(void);
24510 +extern int SM_DECL SoftModemRevStringSize(void);
24511 +extern char* SM_DECL SoftModemGetVendorIDString(void);
24512 +extern char* SM_DECL SoftModemGetT1413VendorIDString(void);
24513 +extern char* SM_DECL SoftModemGetSerialNumberString(void);
24514 +extern int SM_DECL SoftModemSerNumStringSize(void);
24515 +#define SoftDslGetProductName SoftModemGetProductName
24516 +#define SoftDslGetBuildDate SoftModemGetBuildDate
24517 +#define SoftDslGetFullManufacturerName SoftModemGetFullManufacturerName
24518 +#define SoftDslGetShortManufacturerName SoftModemGetShortManufacturerName
24520 +#else /* !ADSL_MODEM */
24522 +extern void SM_DECL SoftModemSetMemoryPtr (void *varsPtr);
24523 +extern void* SM_DECL SoftModemGetMemoryPtr (void);
24524 +extern void SM_DECL SoftModemSetRefData (void *varsPtr);
24525 +extern void* SM_DECL SoftModemGetRefData (void);
24526 +extern int SM_DECL SoftModemGetMemorySize (void);
24527 +extern void SM_DECL SoftModemInit (void);
24528 +extern void SM_DECL SoftModemReset (void);
24529 +extern void SM_DECL SoftModemLineHandler (int sampleCount, short *srcPtr, short *dstPtr);
24530 +extern void SM_DECL SoftModemTimer (long timeQ24ms);
24531 +extern Boolean SM_DECL SoftModemCommandHandler (modemCommandStruct *cmdPtr);
24532 +extern int SM_DECL SoftModemGetExternalMemorySize(void);
24533 +extern void SM_DECL SoftModemSetExternalMemoryPtr(void *varsPtr);
24535 +extern void SM_DECL SoftModemSetPcmCoding (pcmCodingType pcmCoding);
24536 +extern void SM_DECL SoftModemPcmLineHandler (int sampleCount, uchar *srcPtr, uchar *dstPtr);
24538 +/* SoftModem IO functions */
24539 +extern int SM_DECL SoftModemWrite(int nBytes, uchar* srcPtr);
24540 +extern int SM_DECL SoftModemRead(int nBytes, uchar* dstPtr);
24541 +extern int SM_DECL SoftModemWriteFrame(int nBytes, uchar* srcPtr);
24542 +extern int SM_DECL SoftModemReadFrame(int maxFrameSize, uchar* dstPtr);
24543 +extern int SM_DECL SoftModemCountWritePending(void);
24544 +extern int SM_DECL SoftModemCountReadPending(void);
24545 +extern int SM_DECL SoftModemWriteSpaceAvailable(void);
24546 +extern void SM_DECL SoftModemWriteFlush(void);
24547 +extern void SM_DECL SoftModemReadFlush(void);
24548 +extern int SM_DECL SoftModemGetWriteBufferSize(void);
24549 +extern int SM_DECL SoftModemGetReadBufferSize(void);
24552 +extern int SM_DECL SoftModemAudioHandler(int sampleCount, short *srcPtr, short *dstPtr);
24553 +extern int SM_DECL SoftModemAudioRxDataHandler(int nBytes, uchar* srcPtr);
24554 +extern int SM_DECL SoftModemAudioTxDataHandler(int nBytes, uchar* dstPtr);
24558 +#define SoftModemSetGlobalPtr SoftModemSetMemoryPtr
24559 +#define SoftModem SoftModemLineHandler
24560 +#ifndef LINKLAYER_V42BIS_LARGE_DICTIONARY
24561 +#define kSoftModemMaxMemorySize (65536)
24563 +#define kSoftModemMaxMemorySize (65536 + 8192)
24567 + * Internal functions
24569 +extern long SM_DECL SoftModemGetDCOffset(void);
24570 +extern void SM_DECL SoftModemDisableDCOffsetTracking(void);
24571 +extern void SM_DECL SoftModemEnableDCOffsetTracking(void);
24572 +extern long SM_DECL SoftModemGetRcvPower(void);
24573 +extern ulong SM_DECL SoftModemGetHybridDelay(void);
24574 +extern void SM_DECL SoftModemStatusHandler (modemStatusStruct *status);
24575 +extern Boolean SM_DECL SoftModemInternalCommandHandler (modemCommandStruct *cmdPtr);
24576 +extern void SM_DECL SoftModemInternalStatusHandler (modemStatusStruct *status);
24577 +extern void SM_DECL SoftModemSetControllerOnlyMode(commandHandlerType externalDataPumpCommandHandlerPtr);
24578 +extern char* SM_DECL SoftModemGetRevString(void);
24579 +extern char* SM_DECL SoftModemGetProductName(void);
24580 +extern char* SM_DECL SoftModemGetBuildDate(void);
24581 +extern char* SM_DECL SoftModemGetFullManufacturerName(void);
24582 +extern char* SM_DECL SoftModemGetShortManufacturerName(void);
24583 +extern int SM_DECL SoftModemRevStringSize(void);
24584 +extern char* SM_DECL SoftModemGetVendorIDString(void);
24585 +extern char* SM_DECL SoftModemGetSerialNumberString(void);
24586 +extern void SM_DECL SoftModemAuxTxDataHandler(int nBytes, uchar *dataPtr);
24587 +extern void SM_DECL SoftModemAuxRxDataHandler(int nBytes, uchar *dataPtr);
24588 +extern void SM_DECL SoftModemTxDataHandler(int nBytes, uchar *dataPtr);
24589 +extern void SM_DECL SoftModemRxDataHandler(int nBytes, uchar *dataPtr);
24590 +extern void SM_DECL SoftModemATPrintf(uchar *format, void *arg1, void *arg2, void *arg3);
24592 +#define SoftModemSetInputSaturationLimit(limit) (gSystemVars.inputSignalLimit = limit)
24593 +#define SoftModemResetInputSaturationLimit() (gSystemVars.inputSignalLimit = 0)
24595 +#endif /* !ADSL_MODEM */
24597 +#endif /* SoftModemPh */
24598 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/SoftModemTypes.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/SoftModemTypes.h
24599 --- linux-2.6.8.1/bcmdrivers/broadcom/char/adsl/impl1/softdsl/SoftModemTypes.h 1970-01-01 01:00:00.000000000 +0100
24600 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/char/adsl/impl1/softdsl/SoftModemTypes.h 2006-06-26 09:07:10.000000000 +0200
24603 +<:copyright-broadcom
24605 + Copyright (c) 2002 Broadcom Corporation
24606 + All Rights Reserved
24607 + No portions of this material may be reproduced in any form without the
24608 + written permission of:
24609 + Broadcom Corporation
24610 + 16215 Alton Parkway
24611 + Irvine, California 92619
24612 + All information contained in this document is Broadcom Corporation
24613 + company private, proprietary, and trade secret.
24617 +/****************************************************************************
24619 + * SoftModemTypes.h
24623 + * This file contains some of the type declarations for SoftModem
24625 + * Copyright (c) 1993-1997 AltoCom, Inc. All rights reserved.
24626 + * Authors: Mark Gonikberg, Haixiang Liang.
24628 + * $Revision: 1.9 $
24630 + * $Id: SoftModemTypes.h,v 1.9 2004/04/13 00:16:59 ilyas Exp $
24632 + * $Log: SoftModemTypes.h,v $
24633 + * Revision 1.9 2004/04/13 00:16:59 ilyas
24634 + * Merged the latest ADSL driver changes
24636 + * Revision 1.8 2004/01/24 01:35:33 ytan
24637 + * add multi-section lmem swap
24639 + * Revision 1.7 2001/09/21 19:19:01 ilyas
24640 + * Minor fixes for VxWorks build
24642 + * Revision 1.6 2001/08/16 02:16:39 khp
24643 + * - added definitions for SLOW_DATA and FAST_TEXT, defined to nothing
24644 + * except when bcm47xx && USE_SLOW_DATA or USE_FAST_TEXT. Any function
24645 + * that needs to run fast should be marked with FAST_TEXT. Any data that
24646 + * is not referenced often should be marked with SLOW_DATA.
24648 + * Revision 1.5 2001/03/30 00:49:59 liang
24649 + * Changed warning output message.
24651 + * Revision 1.4 2000/06/21 22:24:40 yongbing
24652 + * Modify WARN micro to limit the number of same warnings printed
24654 + * Revision 1.3 1999/08/05 20:02:13 liang
24655 + * Merged with the softmodem top of the tree on 08/04/99.
24657 + * Revision 1.2 1999/01/27 22:14:29 liang
24658 + * Merge with SoftModem_3_1_02.
24660 + * Revision 1.19 1998/11/17 04:02:39 yura
24661 + * Fixed WARN and ASSERT redefinition warning for WinNT targets
24663 + * Revision 1.18 1998/08/26 19:20:43 scott
24664 + * Commented out EXCLUDE_CYGWIN32_TYPES define
24666 + * Revision 1.17 1998/08/13 19:03:06 scott
24667 + * Added BitField definition and INT_IS_LONG
24669 + * Revision 1.16 1998/08/08 03:39:55 scott
24670 + * The DEBUG_PTR_ENABLED macro can be used to enable only the DEBUG_PTR macros
24672 + * Revision 1.15 1998/07/28 22:21:31 mwg
24673 + * Fixed problems with NULL & nil being defined incorrectly
24675 + * Revision 1.14 1998/07/08 17:09:17 scott
24676 + * Define ASSERT and WARN only if not already defined
24678 + * Revision 1.13 1998/07/02 20:46:34 scott
24679 + * Added workaround for building certain builds with older SunOS
24681 + * Revision 1.12 1998/02/09 18:24:49 scott
24682 + * Defined "Private" as nothing for GreenHill (to prevent erroneous section
24683 + * allocations for data)
24685 + * Revision 1.11 1997/08/29 21:39:24 scott
24686 + * Added check for LONG_IS_INT define (for TI C6X support)
24688 + * Revision 1.10 1997/05/29 19:50:23 mwg
24689 + * Added code to avoid type redefintions under SunOS.
24691 + * Revision 1.9 1997/03/19 18:35:08 mwg
24692 + * Changed copyright notice.
24694 + * Revision 1.8 1997/02/11 00:05:53 mwg
24695 + * Minor adjustments for Pentium optimization.
24697 + * Revision 1.7 1997/01/11 01:30:47 mwg
24698 + * Added new macro WARN -- the same as ASSERT but without exit.
24700 + * Revision 1.6 1996/08/22 20:07:39 liang
24701 + * When ASSERT fires, only print out information, don't exit.
24703 + * Revision 1.5 1996/05/06 06:49:10 mwg
24704 + * Fixed linux problems.
24706 + * Revision 1.4 1996/05/02 08:40:16 mwg
24707 + * Merged in Chromatic bug fixes.
24709 + * Revision 1.3 1996/04/01 20:59:53 mwg
24710 + * Added macros to setup and use debug pointer.
24712 + * Revision 1.2 1996/02/27 01:50:04 mwg
24713 + * Added ASSERT() macro.
24715 + * Revision 1.1.1.1 1996/02/14 02:35:13 mwg
24716 + * Redesigned the project directory structure. Merged V.34 into the project.
24718 + * Revision 1.2 1995/12/03 06:59:31 mwg
24719 + * Fixed all gcc varnings. We are now running under Linux on a PC!
24721 + *****************************************************************************/
24722 +#ifndef SoftModemTypesh
24723 +#define SoftModemTypesh
24725 +#ifdef LONG_SHORTS
24726 +#define short long
24727 +#define ushort unsigned long
24730 +typedef signed char schar;
24731 +typedef unsigned char uchar;
24733 +#if 0 /* This is not currently required */
24734 +#if defined(_CYGWIN32) && defined(DEBUG)
24735 +#define EXCLUDE_CYGWIN32_TYPES
24739 +#if !defined(_SYS_TYPES_H) || !defined(TARG_OS_RTEMS)
24740 +#if defined(_CFE_)
24741 + typedef unsigned int uint;
24742 + typedef unsigned long ulong;
24743 + typedef unsigned short ushort;
24744 +#elif defined(TARG_OS_RTEMS)
24745 +#if defined(HOST_ARCH_LINUX)
24746 + typedef unsigned int uint;
24748 + typedef unsigned long ulong;
24749 +#if defined(HOST_ARCH_LINUX)
24750 + typedef unsigned short ushort;
24752 +#elif defined(EXCLUDE_CYGWIN32_TYPES) || (!defined _NO_TYPE_DEFS_ && !defined _SYS_TYPES_H && !defined __SYS_TYPES_H__ && !defined _SYS_BSD_TYPES_H && !defined _LINUX_TYPES_H) || defined(__sparc__)
24753 +#ifndef EXCLUDE_CYGWIN32_TYPES
24754 + typedef unsigned int uint;
24756 +#ifndef _LINUX_TYPES_H
24757 + typedef unsigned long ulong;
24759 +#if !defined(ushort) && !defined(EXCLUDE_CYGWIN32_TYPES) && !defined(__INCvxTypesOldh)
24760 + typedef unsigned short ushort;
24764 +typedef unsigned long ulong;
24767 +#if defined(GREENHILL) || defined(GNUTX39) /* GH allocates private data to incorrect section */
24770 +#define Private static
24787 +typedef unsigned char Boolean;
24788 +typedef unsigned int BitField; /* this must occur BEFORE long_is_int/int_is_long defs */
24790 +#ifdef LONG_IS_INT
24792 +#define ulong uint
24795 +#ifdef INT_IS_LONG
24797 +#define uint ulong
24800 +#define POSTULATE(postulate) \
24805 + char NegativeSizeIfPostulateFalse[((int)(postulate))*2 - 1]; \
24806 + } PostulateCheckStruct; \
24810 +#if defined(DEBUG) && !defined(__KERNEL__)
24812 +#define kDSLNumberWarnTimes 10
24813 +#define WARN(assertion) \
24814 + { static int warnSeveralTimes=0; \
24815 + if ((!(assertion))&(warnSeveralTimes<kDSLNumberWarnTimes)) \
24817 + fprintf(stderr, "Warning, failed: %s\n", #assertion); \
24818 + fprintf(stderr, "%s:%d\n", __FILE__, __LINE__); \
24819 + warnSeveralTimes++; \
24824 +#define ASSERT(assertion) \
24825 + { if (!(assertion)) \
24827 + fprintf(stderr, "Assertion failed: %s\n", #assertion); \
24828 + fprintf(stderr, "%s:%d\n", __FILE__, __LINE__); \
24844 + * memory allocation macros
24847 +#if defined(bcm47xx) && defined(USE_SLOW_DATA)
24848 +#define SLOW_DATA __attribute__ ((section(".slow_data")))
24853 +#if defined(bcm47xx) && defined(USE_FAST_TEXT)
24854 +#define FAST_TEXT __attribute__ ((section(".fast_text")))
24859 +#if defined(bcm47xx) && defined(SWAP_LMEM)
24860 +#define SWAP_TEXT1_1 __attribute__ ((section(".swap_text1_1")))
24861 +#define SWAP_TEXT1_2 __attribute__ ((section(".swap_text1_2")))
24862 +#define SWAP_TEXT2_1 __attribute__ ((section(".swap_text2_1")))
24863 +#define SWAP_TEXT2_2 __attribute__ ((section(".swap_text2_2")))
24864 +#define SWAP_TEXT3_1 __attribute__ ((section(".swap_text3_1")))
24865 +#define SWAP_TEXT3_2 __attribute__ ((section(".swap_text3_2")))
24867 +#define SWAP_TEXT1_1 FAST_TEXT
24868 +#define SWAP_TEXT1_2 FAST_TEXT
24869 +#define SWAP_TEXT2_1 FAST_TEXT
24870 +#define SWAP_TEXT2_2 FAST_TEXT
24871 +#define SWAP_TEXT3_1 FAST_TEXT
24872 +#define SWAP_TEXT3_2 FAST_TEXT
24878 +#if defined(DEBUG) || defined(DEBUG_PTR_ENABLED)
24879 +#define DECLARE_DEBUG_PTR(type) static type *gv;
24880 +#define SETUP_DEBUG_PTR() gv = &globalVar
24882 +#define DECLARE_DEBUG_PTR(type)
24883 +#define SETUP_DEBUG_PTR()
24889 +#define HereIsTheGlobalVarPointerMacro SETUP_DEBUG_PTR();
24891 +#define HereIsTheGlobalVarPointerMacro
24894 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/6338_common.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/6338_common.h
24895 --- linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/6338_common.h 1970-01-01 01:00:00.000000000 +0100
24896 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/6338_common.h 2006-06-26 09:07:10.000000000 +0200
24899 +<:copyright-broadcom
24901 + Copyright (c) 2002 Broadcom Corporation
24902 + All Rights Reserved
24903 + No portions of this material may be reproduced in any form without the
24904 + written permission of:
24905 + Broadcom Corporation
24906 + 16215 Alton Parkway
24907 + Irvine, California 92619
24908 + All information contained in this document is Broadcom Corporation
24909 + company private, proprietary, and trade secret.
24913 +/***********************************************************************/
24915 +/* MODULE: 6338_common.h */
24916 +/* DATE: 05/10/04 */
24917 +/* PURPOSE: Define addresses of major hardware components of */
24920 +/***********************************************************************/
24921 +#ifndef __BCM6338_MAP_COMMON_H
24922 +#define __BCM6338_MAP_COMMON_H
24928 +#define PERF_BASE 0xfffe0000 /* chip control registers */
24929 +#define BB_BASE 0xfffe0100 /* bus bridge registers */
24930 +#define TIMR_BASE 0xfffe0200 /* timer registers */
24931 +#define UART_BASE 0xfffe0300 /* uart registers */
24932 +#define GPIO_BASE 0xfffe0400 /* gpio registers */
24933 +#define SPI_BASE 0xfffe0c00 /* SPI master controller registers */
24935 +#define ADSL_BASE 0xfffe1000 /* ADSL core control registers */
24936 +#define ATM_BASE 0xfffe2000 /* ATM SAR control registers */
24937 +#define EMAC_DMA_BASE 0xfffe2400 /* EMAC DMA control registers */
24938 +#define USB_DMA_BASE 0xfffe2400 /* USB DMA control registers */
24939 +#define EMAC1_BASE 0xfffe2800 /* EMAC1 control registers */
24940 +#define USB_CTL_BASE 0xfffe3000 /* USB control registers */
24941 +#define SDRAM_BASE 0xfffe3100 /* SDRAM control registers */
24945 +#####################################################################
24946 +# System PLL Control Register
24947 +#####################################################################
24950 +#define SOFT_RESET 0x00000001
24953 +#####################################################################
24954 +# SDRAM Control Registers
24955 +#####################################################################
24957 +#define SDR_INIT_CTL 0x00
24958 + /* Control Bits */
24959 +#define SDR_PFEN1 (1<<16)
24960 +#define SDR_PFEN0 (1<<15)
24961 +#define SDR_EMPRS (1<<14)
24962 +#define SDR_2_BANKS (1<<13)
24963 +#define SDR_1_BANK (0<<13)
24964 +#define SDR_CS1_EN (1<<12)
24965 +#define SDR_PEND (1<<11)
24966 +#define SDR_32_BIT (1<<10)
24967 +#define SDR_POWER_DOWN (1<<9)
24968 +#define SDR_SELF_REFRESH (1<<8)
24969 +#define SDR_11_COLS (3<<6)
24970 +#define SDR_10_COLS (2<<6)
24971 +#define SDR_9_COLS (1<<6)
24972 +#define SDR_8_COLS (0<<6)
24973 +#define SDR_13_ROWS (2<<4)
24974 +#define SDR_12_ROWS (1<<4)
24975 +#define SDR_11_ROWS (0<<4)
24976 +#define SDR_MASTER_EN (1<<3)
24977 +#define SDR_MRS_CMD (1<<2)
24978 +#define SDR_PRE_CMD (1<<1)
24979 +#define SDR_CBR_CMD (1<<0)
24981 +#define SDR_CFG_REG 0x04
24982 + /* Control Bits */
24983 +#define SDR_FULL_PG 0
24984 +#define SDR_BURST8 1
24985 +#define SDR_BURST4 2
24986 +#define SDR_BURST2 3
24987 +#define SDR_FAST_MEM (1<<2)
24988 +#define SDR_SLOW_MEM (0<<2)
24990 +#define SDR_REF_CTL 0x0C
24991 + /* Control Bits */
24992 +#define SDR_REF_EN (1<<15)
24995 + /* Control Bits */
24996 +#define SDR_EN_PRIOR (1<<31)
25000 +#####################################################################
25001 +# MPI Control Registers
25002 +#####################################################################
25004 +#define CS0BASE 0x00
25005 +#define CS0CNTL 0x04
25008 +# CSxBASE settings
25009 +# Size in low 4 bits
25010 +# Base Address for match in upper 24 bits
25012 +#define EBI_SIZE_8K 0
25013 +#define EBI_SIZE_16K 1
25014 +#define EBI_SIZE_32K 2
25015 +#define EBI_SIZE_64K 3
25016 +#define EBI_SIZE_128K 4
25017 +#define EBI_SIZE_256K 5
25018 +#define EBI_SIZE_512K 6
25019 +#define EBI_SIZE_1M 7
25020 +#define EBI_SIZE_2M 8
25021 +#define EBI_SIZE_4M 9
25022 +#define EBI_SIZE_8M 10
25023 +#define EBI_SIZE_16M 11
25024 +#define EBI_SIZE_32M 12
25025 +#define EBI_SIZE_64M 13
25026 +#define EBI_SIZE_128M 14
25027 +#define EBI_SIZE_256M 15
25029 +/* CSxCNTL settings */
25030 +#define EBI_ENABLE 0x00000001 /* .. enable this range */
25031 +#define EBI_WAIT_STATES 0x0000000e /* .. mask for wait states */
25032 +#define ZEROWT 0x00000000 /* .. 0 WS */
25033 +#define ONEWT 0x00000002 /* .. 1 WS */
25034 +#define TWOWT 0x00000004 /* .. 2 WS */
25035 +#define THREEWT 0x00000006 /* .. 3 WS */
25036 +#define FOURWT 0x00000008 /* .. 4 WS */
25037 +#define FIVEWT 0x0000000a /* .. 5 WS */
25038 +#define SIXWT 0x0000000c /* .. 6 WS */
25039 +#define SEVENWT 0x0000000e /* .. 7 WS */
25040 +#define EBI_WORD_WIDE 0x00000010 /* .. 16-bit peripheral, else 8 */
25041 +#define EBI_POLARITY 0x00000040 /* .. set to invert chip select polarity */
25042 +#define EBI_TS_TA_MODE 0x00000080 /* .. use TS/TA mode */
25043 +#define EBI_TS_SEL 0x00000100 /* .. drive tsize, not bs_b */
25044 +#define EBI_FIFO 0x00000200 /* .. enable fifo */
25045 +#define EBI_RE 0x00000400 /* .. Reverse Endian */
25048 +#####################################################################
25049 +# UART Control Registers
25050 +#####################################################################
25052 +#define UART0CONTROL 0x01
25053 +#define UART0CONFIG 0x02
25054 +#define UART0RXTIMEOUT 0x03
25055 +#define UART0BAUD 0x04
25056 +#define UART0FIFOCFG 0x0a
25057 +#define UART0INTMASK 0x10
25058 +#define UART0INTSTAT 0x12
25059 +#define UART0DATA 0x17
25061 +#define BRGEN 0x80 /* Control register bit defs */
25064 +#define LOOPBK 0x10
25065 +#define TXPARITYEN 0x08
25066 +#define TXPARITYEVEN 0x04
25067 +#define RXPARITYEN 0x02
25068 +#define RXPARITYEVEN 0x01
25070 +#define XMITBREAK 0x40 /* Config register */
25071 +#define BITS5SYM 0x00
25072 +#define BITS6SYM 0x10
25073 +#define BITS7SYM 0x20
25074 +#define BITS8SYM 0x30
25075 +#define ONESTOP 0x07
25076 +#define TWOSTOP 0x0f
25078 +#define RSTTXFIFOS 0x80 /* Rx Timeout register */
25079 +#define RSTRXFIFOS 0x40
25081 +#define TX4 0x40 /* FIFO config register */
25084 +#define DELTAIP 0x0001 /* Interrupt Status and Mask registers */
25085 +#define TXUNDERR 0x0002
25086 +#define TXOVFERR 0x0004
25087 +#define TXFIFOTHOLD 0x0008
25088 +#define TXREADLATCH 0x0010
25089 +#define TXFIFOEMT 0x0020
25090 +#define RXUNDERR 0x0040
25091 +#define RXOVFERR 0x0080
25092 +#define RXTIMEOUT 0x0100
25093 +#define RXFIFOFULL 0x0200
25094 +#define RXFIFOTHOLD 0x0400
25095 +#define RXFIFONE 0x0800
25096 +#define RXFRAMERR 0x1000
25097 +#define RXPARERR 0x2000
25098 +#define RXBRK 0x4000
25105 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/6338_map.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/6338_map.h
25106 --- linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/6338_map.h 1970-01-01 01:00:00.000000000 +0100
25107 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/6338_map.h 2006-06-26 09:07:10.000000000 +0200
25110 +<:copyright-broadcom
25112 + Copyright (c) 2002 Broadcom Corporation
25113 + All Rights Reserved
25114 + No portions of this material may be reproduced in any form without the
25115 + written permission of:
25116 + Broadcom Corporation
25117 + 16215 Alton Parkway
25118 + Irvine, California 92619
25119 + All information contained in this document is Broadcom Corporation
25120 + company private, proprietary, and trade secret.
25124 +/***********************************************************************/
25126 +/* MODULE: 6338_map.h */
25127 +/* DATE: 05/10/04 */
25128 +/* PURPOSE: Define addresses of major hardware components of */
25131 +/***********************************************************************/
25132 +#ifndef __BCM6338_MAP_H
25133 +#define __BCM6338_MAP_H
25139 +#include "bcmtypes.h"
25140 +#include "6338_common.h"
25141 +#include "6338_intr.h"
25143 +/* macro to convert logical data addresses to physical */
25144 +/* DMA hardware must see physical address */
25145 +#define LtoP( x ) ( (uint32)x & 0x1fffffff )
25146 +#define PtoL( x ) ( LtoP(x) | 0xa0000000 )
25149 +** Interrupt Controller
25151 +typedef struct PerfControl {
25152 + uint32 RevID; /* (00) */
25153 + uint16 testControl; /* (04) */
25154 + uint16 blkEnables; /* (06) */
25156 +#define ADSL_CLK_EN 0x0001
25157 +#define MPI_CLK_EN 0x0002
25158 +#define DRAM_CLK_EN 0x0004
25159 +#define EMAC_CLK_EN 0x0010
25160 +#define USBS_CLK_EN 0x0010
25161 +#define SAR_CLK_EN 0x0020
25162 +#define SPI_CLK_EN 0x0200
25164 + uint32 pll_control; /* (08) */
25165 +#define CHIP_SOFT_RESET 0x00000001
25167 + uint32 IrqMask; /* (0c) */
25168 + uint32 IrqStatus; /* (10) */
25170 + uint32 ExtIrqCfg;
25171 +#define EI_SENSE_SHFT 0
25172 +#define EI_STATUS_SHFT 5
25173 +#define EI_CLEAR_SHFT 10
25174 +#define EI_MASK_SHFT 15
25175 +#define EI_INSENS_SHFT 20
25176 +#define EI_LEVEL_SHFT 25
25178 + uint32 unused[4]; /* (18) */
25179 + uint32 BlockSoftReset; /* (28) */
25180 +#define BSR_SPI 0x00000001
25181 +#define BSR_EMAC 0x00000004
25182 +#define BSR_USBH 0x00000008
25183 +#define BSR_USBS 0x00000010
25184 +#define BSR_ADSL 0x00000020
25185 +#define BSR_DMAMEM 0x00000040
25186 +#define BSR_SAR 0x00000080
25187 +#define BSR_ACLC 0x00000100
25188 +#define BSR_ADSL_MIPS_PLL 0x00000400
25189 +#define BSR_ALL_BLOCKS \
25190 + (BSR_SPI | BSR_EMAC | BSR_USBH | BSR_USBS | BSR_ADSL | BSR_DMAMEM | \
25191 + BSR_SAR | BSR_ACLC | BSR_ADSL_MIPS_PLL)
25194 +#define PERF ((volatile PerfControl * const) PERF_BASE)
25197 +** Bus Bridge Registers
25199 +typedef struct BusBridge {
25201 +#define BB_BUSY 0x8000 /* posted operation in progress */
25202 +#define BB_RD_PND 0x4000 /* read pending */
25203 +#define BB_RD_CMPLT 0x2000 /* read complete */
25204 +#define BB_ERROR 0x1000 /* posted write error */
25205 +#define BB_TEA 0x0800 /* transfer aborted */
25206 + uint16 abortTimeoutCnt; /* abort timeout value */
25208 + byte writePostEnable;
25209 +#define BB_POST_TIMR_EN 0x08 /* post writes to timer regs */
25210 +#define BB_POST_GPIO_EN 0x04 /* post writes to gpio regs */
25211 +#define BB_POST_INTC_EN 0x02 /* post writes to interrupt controller regs */
25212 +#define BB_POST_UART_EN 0x01 /* post writes to uart regs */
25214 + uint16 postAddr; /* posted read address (lower half) */
25216 + byte postData; /* posted read data */
25219 +/* register offsets (needed for EBI master access) */
25220 +#define BB_STATUS 0
25221 +#define BB_ABORT_TO_CNT 2
25222 +#define BB_WR_POST_EN 4
25223 +#define BB_RD_POST_ADDR 10
25224 +#define BB_RD_POST_DATA 12
25226 +#define BRIDGE *bridge ((volatile BusBridge * const) BB_BASE)
25231 +typedef struct Timer {
25234 +#define TIMER0EN 0x01
25235 +#define TIMER1EN 0x02
25236 +#define TIMER2EN 0x04
25238 +#define TIMER0 0x01
25239 +#define TIMER1 0x02
25240 +#define TIMER2 0x04
25241 +#define WATCHDOG 0x08
25242 + uint32 TimerCtl0;
25243 + uint32 TimerCtl1;
25244 + uint32 TimerCtl2;
25245 +#define TIMERENABLE 0x80000000
25246 +#define RSTCNTCLR 0x40000000
25247 + uint32 TimerCnt0;
25248 + uint32 TimerCnt1;
25249 + uint32 TimerCnt2;
25250 + uint32 WatchDogDefCount;
25252 + /* Write 0xff00 0x00ff to Start timer
25253 + * Write 0xee00 0x00ee to Stop and re-load default count
25254 + * Read from this register returns current watch dog count
25256 + uint32 WatchDogCtl;
25258 + /* Number of 40-MHz ticks for WD Reset pulse to last */
25259 + uint32 WDResetCount;
25262 +#define TIMER ((volatile Timer * const) TIMR_BASE)
25267 +typedef struct UartChannel {
25270 +#define BRGEN 0x80 /* Control register bit defs */
25273 +#define LOOPBK 0x10
25274 +#define TXPARITYEN 0x08
25275 +#define TXPARITYEVEN 0x04
25276 +#define RXPARITYEN 0x02
25277 +#define RXPARITYEVEN 0x01
25280 +#define XMITBREAK 0x40
25281 +#define BITS5SYM 0x00
25282 +#define BITS6SYM 0x10
25283 +#define BITS7SYM 0x20
25284 +#define BITS8SYM 0x30
25285 +#define ONESTOP 0x07
25286 +#define TWOSTOP 0x0f
25287 + /* 4-LSBS represent STOP bits/char
25288 + * in 1/8 bit-time intervals. Zero
25289 + * represents 1/8 stop bit interval.
25290 + * Fifteen represents 2 stop bits.
25293 +#define RSTTXFIFOS 0x80
25294 +#define RSTRXFIFOS 0x40
25295 + /* 5-bit TimeoutCnt is in low bits of this register.
25296 + * This count represents the number of characters
25297 + * idle times before setting receive Irq when below threshold
25300 + /* When divide SysClk/2/(1+baudword) we should get 32*bit-rate
25303 + byte txf_levl; /* Read-only fifo depth */
25304 + byte rxf_levl; /* Read-only fifo depth */
25305 + byte fifocfg; /* Upper 4-bits are TxThresh, Lower are
25306 + * RxThreshold. Irq can be asserted
25307 + * when rx fifo> thresh, txfifo<thresh
25309 + byte prog_out; /* Set value of DTR (Bit0), RTS (Bit1)
25310 + * if these bits are also enabled to GPIO_o
25312 +#define DTREN 0x01
25313 +#define RTSEN 0x02
25316 + byte DeltaIPEdgeNoSense; /* Low 4-bits, set corr bit to 1 to
25317 + * detect irq on rising AND falling
25318 + * edges for corresponding GPIO_i
25319 + * if enabled (edge insensitive)
25321 + byte DeltaIPConfig_Mask; /* Upper 4 bits: 1 for posedge sense
25322 + * 0 for negedge sense if
25323 + * not configured for edge
25324 + * insensitive (see above)
25325 + * Lower 4 bits: Mask to enable change
25326 + * detection IRQ for corresponding
25329 + byte DeltaIP_SyncIP; /* Upper 4 bits show which bits
25330 + * have changed (may set IRQ).
25331 + * read automatically clears bit
25332 + * Lower 4 bits are actual status
25335 + uint16 intMask; /* Same Bit defs for Mask and status */
25336 + uint16 intStatus;
25337 +#define DELTAIP 0x0001
25338 +#define TXUNDERR 0x0002
25339 +#define TXOVFERR 0x0004
25340 +#define TXFIFOTHOLD 0x0008
25341 +#define TXREADLATCH 0x0010
25342 +#define TXFIFOEMT 0x0020
25343 +#define RXUNDERR 0x0040
25344 +#define RXOVFERR 0x0080
25345 +#define RXTIMEOUT 0x0100
25346 +#define RXFIFOFULL 0x0200
25347 +#define RXFIFOTHOLD 0x0400
25348 +#define RXFIFONE 0x0800
25349 +#define RXFRAMERR 0x1000
25350 +#define RXPARERR 0x2000
25351 +#define RXBRK 0x4000
25354 + uint16 Data; /* Write to TX, Read from RX */
25355 + /* bits 11:8 are BRK,PAR,FRM errors */
25361 +#define UART ((volatile Uart * const) UART_BASE)
25364 +** Gpio Controller
25367 +typedef struct GpioControl {
25369 + uint32 GPIODir; /* bits 7:0 */
25370 + uint32 unused1; /* bits 36:32 */
25373 +#define LED3_STROBE 0x08000000
25374 +#define LED2_STROBE 0x04000000
25375 +#define LED1_STROBE 0x02000000
25376 +#define LED0_STROBE 0x01000000
25377 +#define LED_TEST 0x00010000
25378 +#define LED3_DISABLE_LINK_ACT 0x00008000
25379 +#define LED2_DISABLE_LINK_ACT 0x00004000
25380 +#define LED1_DISABLE_LINK_ACT 0x00002000
25381 +#define LED0_DISABLE_LINK_ACT 0x00001000
25382 +#define LED_INTERVAL_SET_MASK 0x00000f00
25383 +#define LED_INTERVAL_SET_320MS 0x00000500
25384 +#define LED_INTERVAL_SET_160MS 0x00000400
25385 +#define LED_INTERVAL_SET_80MS 0x00000300
25386 +#define LED_INTERVAL_SET_40MS 0x00000200
25387 +#define LED_INTERVAL_SET_20MS 0x00000100
25388 +#define LED3_ON 0x00000080
25389 +#define LED2_ON 0x00000040
25390 +#define LED1_ON 0x00000020
25391 +#define LED0_ON 0x00000010
25392 +#define LED3_ENABLE 0x00000008
25393 +#define LED2_ENABLE 0x00000004
25394 +#define LED1_ENABLE 0x00000002
25395 +#define LED0_ENABLE 0x00000001
25396 + uint32 SpiSlaveCfg;
25397 +#define SPI_SLAVE_RESET 0x00010000
25398 +#define SPI_RESTRICT 0x00000400
25399 +#define SPI_DELAY_DISABLE 0x00000200
25400 +#define SPI_PROBE_MUX_SEL_MASK 0x000001e0
25401 +#define SPI_SER_ADDR_CFG_MASK 0x0000000c
25402 +#define SPI_MODE 0x00000001
25403 + uint32 vRegConfig;
25406 +#define GPIO ((volatile GpioControl * const) GPIO_BASE)
25408 +/* Number to mask conversion macro used for GPIODir and GPIOio */
25409 +#define GPIO_NUM_MAX_BITS_MASK 0x0f
25410 +#define GPIO_NUM_TO_MASK(X) (1 << ((X) & GPIO_NUM_MAX_BITS_MASK))
25416 +typedef struct SpiControl {
25417 + uint16 spiCmd; /* (0x0): SPI command */
25418 +#define SPI_CMD_NOOP 0
25419 +#define SPI_CMD_SOFT_RESET 1
25420 +#define SPI_CMD_HARD_RESET 2
25421 +#define SPI_CMD_START_IMMEDIATE 3
25423 +#define SPI_CMD_COMMAND_SHIFT 0
25424 +#define SPI_CMD_DEVICE_ID_SHIFT 4
25425 +#define SPI_CMD_PREPEND_BYTE_CNT_SHIFT 8
25426 +#define SPI_CMD_ONE_BYTE_SHIFT 11
25427 +#define SPI_CMD_ONE_WIRE_SHIFT 12
25428 +#define SPI_DEV_ID_0 0
25429 +#define SPI_DEV_ID_1 1
25430 +#define SPI_DEV_ID_2 2
25431 +#define SPI_DEV_ID_3 3
25433 + byte spiIntStatus; /* (0x2): SPI interrupt status */
25434 + byte spiMaskIntStatus; /* (0x3): SPI masked interrupt status */
25436 + byte spiIntMask; /* (0x4): SPI interrupt mask */
25437 +#define SPI_INTR_CMD_DONE 0x01
25438 +#define SPI_INTR_RX_OVERFLOW 0x02
25439 +#define SPI_INTR_INTR_TX_UNDERFLOW 0x04
25440 +#define SPI_INTR_TX_OVERFLOW 0x08
25441 +#define SPI_INTR_RX_UNDERFLOW 0x10
25442 +#define SPI_INTR_CLEAR_ALL 0x1f
25444 + byte spiStatus; /* (0x5): SPI status */
25445 +#define SPI_RX_EMPTY 0x02
25446 +#define SPI_CMD_BUSY 0x04
25447 +#define SPI_SERIAL_BUSY 0x08
25449 + byte spiClkCfg; /* (0x6): SPI clock configuration */
25450 +#define SPI_CLK_0_391MHZ 1
25451 +#define SPI_CLK_0_781MHZ 2 /* default */
25452 +#define SPI_CLK_1_563MHZ 3
25453 +#define SPI_CLK_3_125MHZ 4
25454 +#define SPI_CLK_6_250MHZ 5
25455 +#define SPI_CLK_12_50MHZ 6
25456 +#define SPI_CLK_MASK 0x07
25457 +#define SPI_SSOFFTIME_MASK 0x38
25458 +#define SPI_SSOFFTIME_SHIFT 3
25459 +#define SPI_BYTE_SWAP 0x80
25461 + byte spiFillByte; /* (0x7): SPI fill byte */
25464 + byte spiMsgTail; /* (0x9): msgtail */
25466 + byte spiRxTail; /* (0xB): rxtail */
25468 + uint32 unused2[13]; /* (0x0c - 0x3c) reserved */
25470 + byte spiMsgCtl; /* (0x40) control byte */
25471 +#define FULL_DUPLEX_RW 0
25472 +#define HALF_DUPLEX_W 1
25473 +#define HALF_DUPLEX_R 2
25474 +#define SPI_MSG_TYPE_SHIFT 6
25475 +#define SPI_BYTE_CNT_SHIFT 0
25476 + byte spiMsgData[63]; /* (0x41 - 0x7f) msg data */
25477 + byte spiRxDataFifo[64]; /* (0x80 - 0xbf) rx data */
25478 + byte unused3[64]; /* (0xc0 - 0xff) reserved */
25481 +#define SPI ((volatile SpiControl * const) SPI_BASE)
25483 +#define IUDMA_MAX_CHANNELS 16
25486 +** DMA Channel Configuration (1 .. 16)
25488 +typedef struct DmaChannelCfg {
25489 + uint32 cfg; /* (00) assorted configuration */
25490 +#define DMA_BURST_HALT 0x00000004 /* idle after finish current memory burst */
25491 +#define DMA_PKT_HALT 0x00000002 /* idle after an EOP flag is detected */
25492 +#define DMA_ENABLE 0x00000001 /* set to enable channel */
25493 + uint32 intStat; /* (04) interrupts control and status */
25494 + uint32 intMask; /* (08) interrupts mask */
25495 +#define DMA_BUFF_DONE 0x00000001 /* buffer done */
25496 +#define DMA_DONE 0x00000002 /* packet xfer complete */
25497 +#define DMA_NO_DESC 0x00000004 /* no valid descriptors */
25498 + uint32 maxBurst; /* (0C) max burst length permitted */
25502 +** DMA State RAM (1 .. 16)
25504 +typedef struct DmaStateRam {
25505 + uint32 baseDescPtr; /* (00) descriptor ring start address */
25506 + uint32 state_data; /* (04) state/bytes done/ring offset */
25507 + uint32 desc_len_status; /* (08) buffer descriptor status and len */
25508 + uint32 desc_base_bufptr; /* (0C) buffer descrpitor current processing */
25514 +typedef struct DmaRegs {
25515 +#define DMA_MASTER_EN 0x00000001
25516 +#define DMA_FLOWC_CH1_EN 0x00000002
25517 +#define DMA_FLOWC_CH3_EN 0x00000004
25518 +#define DMA_NUM_CHS_MASK 0x0f000000
25519 +#define DMA_NUM_CHS_SHIFT 24
25520 +#define DMA_FLOWCTL_MASK 0x30000000
25521 +#define DMA_FLOWCTL_CH1 0x10000000
25522 +#define DMA_FLOWCTL_CH3 0x20000000
25523 +#define DMA_FLOWCTL_SHIFT 28
25524 + uint32 controller_cfg; /* (00) controller configuration */
25526 + // Flow control Ch1
25527 + uint32 flowctl_ch1_thresh_lo; /* (04) EMAC1 RX DMA channel */
25528 + uint32 flowctl_ch1_thresh_hi; /* (08) EMAC1 RX DMA channel */
25529 + uint32 flowctl_ch1_alloc; /* (0C) EMAC1 RX DMA channel */
25530 +#define DMA_BUF_ALLOC_FORCE 0x80000000
25532 + // Flow control Ch3
25533 + uint32 flowctl_ch3_thresh_lo; /* (10) EMAC2 RX DMA channel */
25534 + uint32 flowctl_ch3_thresh_hi; /* (14) EMAC2 RX DMA channel */
25535 + uint32 flowctl_ch3_alloc; /* (18) EMAC2 RX DMA channel */
25540 + // Per channel registers/state ram
25541 + DmaChannelCfg chcfg[IUDMA_MAX_CHANNELS]; /* (100) Channel configuration */
25543 + DmaStateRam s[IUDMA_MAX_CHANNELS];
25544 + uint32 u32[4 * IUDMA_MAX_CHANNELS];
25545 + } stram; /* (200) state ram */
25551 +typedef struct DmaDesc {
25552 + uint16 length; /* in bytes of data in buffer */
25553 +#define DMA_DESC_USEFPM 0x8000
25554 +#define DMA_DESC_MULTICAST 0x4000
25555 +#define DMA_DESC_BUFLENGTH 0x0fff
25556 + uint16 status; /* buffer status */
25557 +#define DMA_OWN 0x8000 /* cleared by DMA, set by SW */
25558 +#define DMA_EOP 0x4000 /* last buffer in packet */
25559 +#define DMA_SOP 0x2000 /* first buffer in packet */
25560 +#define DMA_WRAP 0x1000 /* */
25561 +#define DMA_APPEND_CRC 0x0100
25563 +/* EMAC Descriptor Status definitions */
25564 +#define EMAC_MISS 0x0080 /* framed address recognition failed (promiscuous) */
25565 +#define EMAC_BRDCAST 0x0040 /* DA is Broadcast */
25566 +#define EMAC_MULT 0x0020 /* DA is multicast */
25567 +#define EMAC_LG 0x0010 /* frame length > RX_LENGTH register value */
25568 +#define EMAC_NO 0x0008 /* Non-Octet aligned */
25569 +#define EMAC_RXER 0x0004 /* RX_ERR on MII while RX_DV assereted */
25570 +#define EMAC_CRC_ERROR 0x0002 /* CRC error */
25571 +#define EMAC_OV 0x0001 /* Overflow */
25573 +/* HDLC Descriptor Status definitions */
25574 +#define DMA_HDLC_TX_ABORT 0x0100
25575 +#define DMA_HDLC_RX_OVERRUN 0x4000
25576 +#define DMA_HDLC_RX_TOO_LONG 0x2000
25577 +#define DMA_HDLC_RX_CRC_OK 0x1000
25578 +#define DMA_HDLC_RX_ABORT 0x0100
25580 + uint32 address; /* address of data */
25584 +** Sdram Controller
25586 +typedef struct SdramControllerRegs {
25588 + uint16 initControl; /* 02 */
25589 +#define SD_POWER_DOWN 0x200 /* put sdram into power down */
25590 +#define SD_SELF_REFRESH 0x100 /* enable self refresh mode */
25591 +#define SD_SOFT_RESET 0x080 /* soft reset all sdram controller regs */
25592 +#define SD_EDO_SELECT 0x040 /* select EDO mode */
25593 +#define SD_EDO_WAIT_STATE 0x020 /* add an EDO wait state */
25594 +#define SD_8MEG 0x010 /* map sdram to 8 megs */
25595 +#define SD_MASTER_ENABLE 0x008 /* enable accesses to external sdram */
25596 +#define SD_MRS 0x004 /* generate a mode register select cycle */
25597 +#define SD_PRECHARGE 0x002 /* generate a precharge cycle */
25598 +#define SD_CBR 0x001 /* generate a refresh cycle */
25599 + uint8 unused2[3];
25600 + uint8 config; /* 07 */
25601 +#define SD_FAST_MEM 0x04 /* 1=CAS latency of 2, 0 = CAS latency of 3 */
25602 +#define SD_BURST_LEN 0x03 /* set burst length */
25603 +#define SD_BURST_FULL_PAGE 0x00 /* .. full page */
25604 +#define SD_BURST_8 0x01 /* .. 8 words */
25605 +#define SD_BURST_4 0x02 /* .. 4 words */
25606 +#define SD_BURST_2 0x03 /* .. 2 words */
25608 + uint16 refreshControl; /* 0a */
25609 +#define SD_REFRESH_ENABLE 0x8000 /* refresh enable */
25610 +#define SD_REFRESH_PERIOD 0x00ff /* refresh period (16 x n x clock_period) */
25612 + uint32 memoryBase; /* 0c */
25613 +#define SD_MEMBASE_MASK 0xffffe000 /* base address mask */
25614 +#define SD_MEMSIZE_8MEG 0x00000001 /* memory is 8 meg */
25615 +#define SD_MEMSIZE_2MEG 0x00000001 /* memory is 2 meg */
25617 +} SdramControllerRegs;
25620 +** External Bus Interface
25622 +typedef struct EbiChipSelect {
25623 + uint32 base; /* base address in upper 24 bits */
25624 +#define EBI_SIZE_8K 0
25625 +#define EBI_SIZE_16K 1
25626 +#define EBI_SIZE_32K 2
25627 +#define EBI_SIZE_64K 3
25628 +#define EBI_SIZE_128K 4
25629 +#define EBI_SIZE_256K 5
25630 +#define EBI_SIZE_512K 6
25631 +#define EBI_SIZE_1M 7
25632 +#define EBI_SIZE_2M 8
25633 +#define EBI_SIZE_4M 9
25634 +#define EBI_SIZE_8M 10
25635 +#define EBI_SIZE_16M 11
25636 +#define EBI_SIZE_32M 12
25637 +#define EBI_SIZE_64M 13
25638 +#define EBI_SIZE_128M 14
25639 +#define EBI_SIZE_256M 15
25641 +#define EBI_ENABLE 0x00000001 /* .. enable this range */
25642 +#define EBI_WAIT_STATES 0x0000000e /* .. mask for wait states */
25643 +#define EBI_WTST_SHIFT 1 /* .. for shifting wait states */
25644 +#define EBI_WORD_WIDE 0x00000010 /* .. 16-bit peripheral, else 8 */
25645 +#define EBI_WREN 0x00000020 /* enable posted writes */
25646 +#define EBI_POLARITY 0x00000040 /* .. set to invert something,
25647 + ** don't know what yet */
25648 +#define EBI_FIFO 0x00000200 /* .. use fifo */
25649 +#define EBI_RE 0x00000400 /* .. Reverse Endian */
25652 +typedef struct MpiRegisters {
25653 + EbiChipSelect cs[1]; /* size chip select configuration */
25656 +#define MPI ((volatile MpiRegisters * const) MPI_BASE)
25659 +** EMAC transmit MIB counters
25661 +typedef struct EmacTxMib {
25662 + uint32 tx_good_octets; /* (200) good byte count */
25663 + uint32 tx_good_pkts; /* (204) good pkt count */
25664 + uint32 tx_octets; /* (208) good and bad byte count */
25665 + uint32 tx_pkts; /* (20c) good and bad pkt count */
25666 + uint32 tx_broadcasts_pkts; /* (210) good broadcast packets */
25667 + uint32 tx_multicasts_pkts; /* (214) good mulitcast packets */
25668 + uint32 tx_len_64; /* (218) RMON tx pkt size buckets */
25669 + uint32 tx_len_65_to_127; /* (21c) */
25670 + uint32 tx_len_128_to_255; /* (220) */
25671 + uint32 tx_len_256_to_511; /* (224) */
25672 + uint32 tx_len_512_to_1023; /* (228) */
25673 + uint32 tx_len_1024_to_max; /* (22c) */
25674 + uint32 tx_jabber_pkts; /* (230) > 1518 with bad crc */
25675 + uint32 tx_oversize_pkts; /* (234) > 1518 with good crc */
25676 + uint32 tx_fragment_pkts; /* (238) < 63 with bad crc */
25677 + uint32 tx_underruns; /* (23c) fifo underrun */
25678 + uint32 tx_total_cols; /* (240) total collisions in all tx pkts */
25679 + uint32 tx_single_cols; /* (244) tx pkts with single collisions */
25680 + uint32 tx_multiple_cols; /* (248) tx pkts with multiple collisions */
25681 + uint32 tx_excessive_cols; /* (24c) tx pkts with excessive cols */
25682 + uint32 tx_late_cols; /* (250) tx pkts with late cols */
25683 + uint32 tx_defered; /* (254) tx pkts deferred */
25684 + uint32 tx_carrier_lost; /* (258) tx pkts with CRS lost */
25685 + uint32 tx_pause_pkts; /* (25c) tx pause pkts sent */
25686 +#define NumEmacTxMibVars 24
25690 +** EMAC receive MIB counters
25692 +typedef struct EmacRxMib {
25693 + uint32 rx_good_octets; /* (280) good byte count */
25694 + uint32 rx_good_pkts; /* (284) good pkt count */
25695 + uint32 rx_octets; /* (288) good and bad byte count */
25696 + uint32 rx_pkts; /* (28c) good and bad pkt count */
25697 + uint32 rx_broadcasts_pkts; /* (290) good broadcast packets */
25698 + uint32 rx_multicasts_pkts; /* (294) good mulitcast packets */
25699 + uint32 rx_len_64; /* (298) RMON rx pkt size buckets */
25700 + uint32 rx_len_65_to_127; /* (29c) */
25701 + uint32 rx_len_128_to_255; /* (2a0) */
25702 + uint32 rx_len_256_to_511; /* (2a4) */
25703 + uint32 rx_len_512_to_1023; /* (2a8) */
25704 + uint32 rx_len_1024_to_max; /* (2ac) */
25705 + uint32 rx_jabber_pkts; /* (2b0) > 1518 with bad crc */
25706 + uint32 rx_oversize_pkts; /* (2b4) > 1518 with good crc */
25707 + uint32 rx_fragment_pkts; /* (2b8) < 63 with bad crc */
25708 + uint32 rx_missed_pkts; /* (2bc) missed packets */
25709 + uint32 rx_crc_align_errs; /* (2c0) both or either */
25710 + uint32 rx_undersize; /* (2c4) < 63 with good crc */
25711 + uint32 rx_crc_errs; /* (2c8) crc errors (only) */
25712 + uint32 rx_align_errs; /* (2cc) alignment errors (only) */
25713 + uint32 rx_symbol_errs; /* (2d0) pkts with RXERR assertions (symbol errs) */
25714 + uint32 rx_pause_pkts; /* (2d4) MAC control, PAUSE */
25715 + uint32 rx_nonpause_pkts; /* (2d8) MAC control, not PAUSE */
25716 +#define NumEmacRxMibVars 23
25719 +typedef struct EmacRegisters {
25720 + uint32 rxControl; /* (00) receive control */
25721 +#define EMAC_PM_REJ 0x80 /* - reject DA match in PMx regs */
25722 +#define EMAC_UNIFLOW 0x40 /* - accept cam match fc */
25723 +#define EMAC_FC_EN 0x20 /* - enable flow control */
25724 +#define EMAC_LOOPBACK 0x10 /* - loopback */
25725 +#define EMAC_PROM 0x08 /* - promiscuous */
25726 +#define EMAC_RDT 0x04 /* - ignore transmissions */
25727 +#define EMAC_ALL_MCAST 0x02 /* - ignore transmissions */
25728 +#define EMAC_NO_BCAST 0x01 /* - ignore transmissions */
25731 + uint32 rxMaxLength; /* (04) receive max length */
25732 + uint32 txMaxLength; /* (08) transmit max length */
25733 + uint32 unused1[1];
25734 + uint32 mdioFreq; /* (10) mdio frequency */
25735 +#define EMAC_MII_PRE_EN 0x00000080 /* prepend preamble sequence */
25736 +#define EMAC_MDIO_PRE 0x00000080 /* - enable MDIO preamble */
25737 +#define EMAC_MDC_FREQ 0x0000007f /* - mdio frequency */
25739 + uint32 mdioData; /* (14) mdio data */
25740 +#define MDIO_WR 0x50020000 /* - write framing */
25741 +#define MDIO_RD 0x60020000 /* - read framing */
25742 +#define MDIO_PMD_SHIFT 23
25743 +#define MDIO_REG_SHIFT 18
25745 + uint32 intMask; /* (18) int mask */
25746 + uint32 intStatus; /* (1c) int status */
25747 +#define EMAC_FLOW_INT 0x04 /* - flow control event */
25748 +#define EMAC_MIB_INT 0x02 /* - mib event */
25749 +#define EMAC_MDIO_INT 0x01 /* - mdio event */
25751 + uint32 unused2[3];
25752 + uint32 config; /* (2c) config */
25753 +#define EMAC_ENABLE 0x001 /* - enable emac */
25754 +#define EMAC_DISABLE 0x002 /* - disable emac */
25755 +#define EMAC_SOFT_RST 0x004 /* - soft reset */
25756 +#define EMAC_SOFT_RESET 0x004 /* - emac soft reset */
25757 +#define EMAC_EXT_PHY 0x008 /* - external PHY select */
25759 + uint32 txControl; /* (30) transmit control */
25760 +#define EMAC_FD 0x001 /* - full duplex */
25761 +#define EMAC_FLOWMODE 0x002 /* - flow mode */
25762 +#define EMAC_NOBKOFF 0x004 /* - no backoff in */
25763 +#define EMAC_SMALLSLT 0x008 /* - small slot time */
25765 + uint32 txThreshold; /* (34) transmit threshold */
25766 + uint32 mibControl; /* (38) mib control */
25767 +#define EMAC_NO_CLEAR 0x001 /* don't clear on read */
25769 + uint32 unused3[7];
25771 + uint32 pm0DataLo; /* (58) perfect match 0 data lo */
25772 + uint32 pm0DataHi; /* (5C) perfect match 0 data hi (15:0) */
25773 + uint32 pm1DataLo; /* (60) perfect match 1 data lo */
25774 + uint32 pm1DataHi; /* (64) perfect match 1 data hi (15:0) */
25775 + uint32 pm2DataLo; /* (68) perfect match 2 data lo */
25776 + uint32 pm2DataHi; /* (6C) perfect match 2 data hi (15:0) */
25777 + uint32 pm3DataLo; /* (70) perfect match 3 data lo */
25778 + uint32 pm3DataHi; /* (74) perfect match 3 data hi (15:0) */
25779 +#define EMAC_CAM_V 0x10000 /* - cam index */
25780 +#define EMAC_CAM_VALID 0x00010000
25782 + uint32 unused4[98]; /* (78-1fc) */
25784 + EmacTxMib tx_mib; /* (200) emac tx mib */
25785 + uint32 unused5[8]; /* (260-27c) */
25787 + EmacRxMib rx_mib; /* (280) rx mib */
25791 +/* register offsets for subrouting access */
25792 +#define EMAC_RX_CONTROL 0x00
25793 +#define EMAC_RX_MAX_LENGTH 0x04
25794 +#define EMAC_TX_MAC_LENGTH 0x08
25795 +#define EMAC_MDIO_FREQ 0x10
25796 +#define EMAC_MDIO_DATA 0x14
25797 +#define EMAC_INT_MASK 0x18
25798 +#define EMAC_INT_STATUS 0x1C
25799 +#define EMAC_CAM_DATA_LO 0x20
25800 +#define EMAC_CAM_DATA_HI 0x24
25801 +#define EMAC_CAM_CONTROL 0x28
25802 +#define EMAC_CONTROL 0x2C
25803 +#define EMAC_TX_CONTROL 0x30
25804 +#define EMAC_TX_THRESHOLD 0x34
25805 +#define EMAC_MIB_CONTROL 0x38
25808 +#define EMAC1 ((volatile EmacRegisters * const) EMAC1_BASE)
25813 +typedef struct UsbRegisters {
25814 + byte inttf_setting;
25815 + byte current_config;
25816 + uint16 status_frameNum;
25817 +#define USB_LINK 0x2000
25818 +#define USB_BUS_RESET 0x1000
25819 +#define USB_SUSPENDED 0x0800
25823 + byte endpt_status;
25824 +#define USB_ENDPOINT_0 0x01
25825 +#define USB_ENDPOINT_1 0x02
25826 +#define USB_ENDPOINT_2 0x04
25827 +#define USB_ENDPOINT_3 0x08
25828 +#define USB_ENDPOINT_4 0x10
25829 +#define USB_ENDPOINT_5 0x20
25830 +#define USB_ENDPOINT_6 0x40
25831 +#define USB_ENDPOINT_7 0x80
25833 + byte conf_mem_ctl;
25834 +#define USB_CONF_MEM_RD 0x80
25835 +#define USB_CONF_MEM_RDY 0x40
25837 + byte conf_mem_read_address;
25838 + byte conf_mem_write_address;
25841 + byte dev_req_bytesel;
25842 + uint16 ext_dev_data;
25846 + byte endpt_stall_reset; // use same endpoint #'s from above
25848 +#define USB_FORCE_ERR 0x20
25849 +#define USB_SOFT_RESET 0x10
25850 +#define USB_RESUME 0x08
25851 +#define USB_COMMAND_ERR 0x04
25852 +#define USB_COMMAND_OVER 0x02
25854 + byte iso_out_in_addr;
25855 + byte blk_out_in_addr;
25857 + uint32 unusedx[2];
25858 + uint32 tx_ram_write_port;
25859 + uint32 fifo_status; // (see bcm6338 data sheet for definition)
25861 + uint32 irq_status;
25863 +#define USB_NEW_CONFIG 0x00000001
25864 +#define USB_SETUP_COMMAND_RECV 0x00000002 // non-standard setup cmd rcvd
25865 +#define USB_OUT_FIFO_OV 0x00000004
25866 +#define USB_RESET_RECV 0x00000008
25867 +#define USB_SUSPEND_RECV 0x00000010
25868 +#define USB_FIFO_REWIND 0x00000020
25869 +#define USB_RX_BULK_FIFO_DATA_AVAIL 0x00000040
25870 +#define USB_RX_ISO_FIFO_DATA_AVAIL 0x00000080
25871 +#define USB_LINK_CHANGE 0x00010000
25872 + uint32 endpt_cntl;
25873 +#define USB_R_WK_EN 0x0100
25874 +#define USB_TX_EOP 0x0200
25875 +#define USB_TX_CNTL_DMA_EN 0x0400
25876 +#define USB_TX_BULK_DMA_EN 0x0800
25877 +#define USB_TX_ISO_DMA_EN 0x1000
25878 +#define USB_RX_CNTL_DMA_EN 0x2000
25879 +#define USB_RX_BULK_DMA_EN 0x4800
25880 +#define USB_RX_ISO_DMA_EN 0x8000
25881 + uint32 rx_status_read_port;
25882 + uint32 confmem_read_port;
25883 + uint32 confmem_write_port;
25884 + uint32 fifo_ovf_count;
25885 + uint32 fifo_rewind_cnt;
25886 + uint32 terminal_count;
25889 +#define USB ((volatile UsbRegisters * const) USB_CTL_BASE)
25892 +** ADSL core Registers
25895 +#define _PADLINE(line) pad ## line
25896 +#define _XSTR(line) _PADLINE(line)
25897 +#define PAD _XSTR(__LINE__)
25899 +typedef struct AdslRegisters {
25900 + uint32 core_control;
25901 +#define ADSL_RESET 0x01
25903 + uint32 core_status;
25904 +#define ADSL_HOST_MSG 0x01
25907 + uint32 bist_status;
25909 + uint32 int_status_i; /* 0x20 */
25910 + uint32 int_mask_i;
25911 + uint32 int_status_f;
25912 + uint32 int_mask_f;
25913 +#define ADSL_INT_HOST_MSG 0x00000020
25914 +#define ADSL_INT_DESC_ERR 0x00000400
25915 +#define ADSL_INT_DATA_ERR 0x00000800
25916 +#define ADSL_INT_DESC_PROTO_ERR 0x00001000
25917 +#define ADSL_INT_RCV_DESC_UF 0x00002000
25918 +#define ADSL_INT_RCV_FIFO_OF 0x00004000
25919 +#define ADSL_INT_XMT_FIFO_UF 0x00008000
25920 +#define ADSL_INT_RCV 0x00010000
25921 +#define ADSL_INT_XMT 0x01000000
25925 + uint32 xmtcontrol_intr; /* 0x200 */
25926 +#define ADSL_DMA_XMT_EN 0x00000001
25927 +#define ADSL_DMA_XMT_LE 0x00000004
25928 + uint32 xmtaddr_intr;
25929 +#define ADSL_DMA_ADDR_MASK 0xFFFFF000
25930 + uint32 xmtptr_intr;
25931 +#define ADSL_DMA_LAST_DESC_MASK 0x00000FFF
25932 + uint32 xmtstatus_intr;
25933 +#define ADSL_DMA_CURR_DESC_MASK 0x00000FFF
25934 +#define ADSL_DMA_XMT_STATE_MASK 0x0000F000
25935 +#define ADSL_DMA_XMT_STATE_DIS 0x00000000
25936 +#define ADSL_DMA_XMT_STATE_ACT 0x00001000
25937 +#define ADSL_DMA_XMT_STATE_IDLE 0x00002000
25938 +#define ADSL_DMA_XMT_STATE_STOP 0x00003000
25940 +#define ADSL_DMA_XMT_ERR_MASK 0x000F0000
25941 +#define ADSL_DMA_XMT_ERR_NONE 0x00000000
25942 +#define ADSL_DMA_XMT_ERR_DPE 0x00010000
25943 +#define ADSL_DMA_XMT_ERR_FIFO 0x00020000
25944 +#define ADSL_DMA_XMT_ERR_DTE 0x00030000
25945 +#define ADSL_DMA_XMT_ERR_DRE 0x00040000
25947 + uint32 rcvcontrol_intr;
25948 +#define ADSL_DMA_RCV_EN 0x00000001
25949 +#define ADSL_DMA_RCV_FO 0x000000FE
25950 + uint32 rcvaddr_intr;
25951 + uint32 rcvptr_intr;
25952 + uint32 rcvstatus_intr;
25953 +#define ADSL_DMA_RCV_STATE_MASK 0x0000F000
25954 +#define ADSL_DMA_RCV_STATE_DIS 0x00000000
25955 +#define ADSL_DMA_RCV_STATE_ACT 0x00001000
25956 +#define ADSL_DMA_RCV_STATE_IDLE 0x00002000
25957 +#define ADSL_DMA_RCV_STATE_STOP 0x00003000
25959 +#define ADSL_DMA_RCV_ERR_MASK 0x000F0000
25960 +#define ADSL_DMA_RCV_ERR_NONE 0x00000000
25961 +#define ADSL_DMA_RCV_ERR_DPE 0x00010000
25962 +#define ADSL_DMA_RCV_ERR_FIFO 0x00020000
25963 +#define ADSL_DMA_RCV_ERR_DTE 0x00030000
25964 +#define ADSL_DMA_RCV_ERR_DRE 0x00040000
25966 + uint32 xmtcontrol_fast;
25967 + uint32 xmtaddr_fast;
25968 + uint32 xmtptr_fast;
25969 + uint32 xmtstatus_fast;
25970 + uint32 rcvcontrol_fast;
25971 + uint32 rcvaddr_fast;
25972 + uint32 rcvptr_fast;
25973 + uint32 rcvstatus_fast;
25976 + uint32 host_message; /* 0x300 */
25978 + uint32 core_reset;
25979 + uint32 core_error;
25980 + uint32 core_revision;
25982 +#define ADSL_CORE_REV 0x0000000F
25983 +#define ADSL_CORE_TYPE 0x0000FFF0
25986 +#define ADSL ((volatile AdslRegisters * const) ADSL_BASE)
25994 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/6345_common.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/6345_common.h
25995 --- linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/6345_common.h 1970-01-01 01:00:00.000000000 +0100
25996 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/6345_common.h 2006-06-26 09:07:10.000000000 +0200
25999 +<:copyright-broadcom
26001 + Copyright (c) 2002 Broadcom Corporation
26002 + All Rights Reserved
26003 + No portions of this material may be reproduced in any form without the
26004 + written permission of:
26005 + Broadcom Corporation
26006 + 16215 Alton Parkway
26007 + Irvine, California 92619
26008 + All information contained in this document is Broadcom Corporation
26009 + company private, proprietary, and trade secret.
26013 +/***********************************************************************/
26015 +/* MODULE: 6345_common.h */
26016 +/* DATE: 96/12/19 */
26017 +/* PURPOSE: Define addresses of major hardware components of */
26020 +/***********************************************************************/
26021 +#ifndef __BCM6345_MAP_COMMON_H
26022 +#define __BCM6345_MAP_COMMON_H
26028 +/* matches isb_decoder.v */
26029 +#define INTC_BASE 0xfffe0000 /* interrupts controller registers */
26030 +#define BB_BASE 0xfffe0100 /* bus bridge registers */
26031 +#define TIMR_BASE 0xfffe0200 /* timer registers */
26032 +#define UART_BASE 0xfffe0300 /* uart registers */
26033 +#define GPIO_BASE 0xfffe0400 /* gpio registers */
26034 +#define EMAC_BASE 0xfffe1800 /* EMAC control registers */
26035 +#define EBIC_BASE 0xfffe2000 /* EBI control registers */
26036 +#define PCMCIA_BASE 0xfffe2028 /* PCMCIA control registers */
26037 +#define USB_BASE 0xfffe2100 /* USB controll registers */
26038 +#define SDRAM_BASE 0xfffe2300 /* SDRAM control registers */
26039 +#define DMA_BASE 0xfffe2800 /* DMA control registers */
26041 +/* DMA channel assignments */
26042 +#define EMAC_RX_CHAN 1
26043 +#define EMAC_TX_CHAN 2
26044 +#define EBI_RX_CHAN 5
26045 +#define EBI_TX_CHAN 6
26046 +#define RESERVED_RX_CHAN 9
26047 +#define RESERVED_TX_CHAN 10
26048 +#define USB_BULK_RX_CHAN 13
26049 +#define USB_BULK_TX_CHAN 14
26050 +#define USB_ISO_RX_CHAN 15
26051 +#define USB_ISO_TX_CHAN 16
26052 +#define USB_CNTL_RX_CHAN 17
26053 +#define USB_CNTL_TX_CHAN 18
26056 +#-----------------------------------------------------------------------*
26058 +#************************************************************************
26060 +#define SDR_INIT_CTL 0x00
26061 + /* Control Bits */
26062 +#define SDR_9BIT_COL (1<<11)
26063 +#define SDR_32BIT (1<<10)
26064 +#define SDR_PWR_DN (1<<9)
26065 +#define SDR_SELF_REF (1<<8)
26066 +#define SDR_SOFT_RST (1<<7)
26067 +#define SDR_64x32 (3<<4)
26068 +#define SDR_128MEG (2<<4)
26069 +#define SDR_64MEG (1<<4)
26070 +#define SDR_16MEG (0<<4)
26071 +#define SDR_ENABLE (1<<3)
26072 +#define SDR_MRS_CMD (1<<2)
26073 +#define SDR_PRE_CMD (1<<1)
26074 +#define SDR_CBR_CMD (1<<0)
26076 +#define SDR_CFG_REG 0x04
26077 + /* Control Bits */
26078 +#define SDR_FULL_PG 0x00
26079 +#define SDR_BURST8 0x01
26080 +#define SDR_BURST4 0x02
26081 +#define SDR_BURST2 0x03
26082 +#define SDR_FAST_MEM (1<<2)
26083 +#define SDR_SLOW_MEM 0x00
26085 +#define SDR_REF_CTL 0x08
26086 + /* Control Bits */
26087 +#define SDR_REF_EN (1<<15)
26089 +#define SDR_MEM_BASE 0x0c
26090 + /* Control Bits */
26091 +#define DRAM2MBSPC 0x00000000
26092 +#define DRAM8MBSPC 0x00000001
26093 +#define DRAM16MBSPC 0x00000002
26094 +#define DRAM32MBSPC 0x00000003
26095 +#define DRAM64MBSPC 0x00000004
26097 +#define DRAM2MEG 0x00000000 /* See SDRAM config */
26098 +#define DRAM8MEG 0x00000001 /* See SDRAM config */
26099 +#define DRAM16MEG 0x00000002 /* See SDRAM config */
26100 +#define DRAM32MEG 0x00000003 /* See SDRAM config */
26101 +#define DRAM64MEG 0x00000004 /* See SDRAM config */
26104 +#-----------------------------------------------------------------------*
26106 +#************************************************************************
26108 +#define CS0BASE 0x00
26109 +#define CS0CNTL 0x04
26110 +#define CS1BASE 0x08
26111 +#define CS1CNTL 0x0c
26112 +#define CS2BASE 0x10
26113 +#define CS2CNTL 0x14
26114 +#define CS3BASE 0x18
26115 +#define CS3CNTL 0x1c
26116 +#define CS4BASE 0x20
26117 +#define CS4CNTL 0x24
26118 +#define CS5BASE 0x28
26119 +#define CS5CNTL 0x2c
26120 +#define CS6BASE 0x30
26121 +#define CS6CNTL 0x34
26122 +#define CS7BASE 0x38
26123 +#define CS7CNTL 0x3c
26124 +#define EBICONFIG 0x40
26127 +# CSxBASE settings
26128 +# Size in low 4 bits
26129 +# Base Address for match in upper 24 bits
26131 +#define EBI_SIZE_8K 0
26132 +#define EBI_SIZE_16K 1
26133 +#define EBI_SIZE_32K 2
26134 +#define EBI_SIZE_64K 3
26135 +#define EBI_SIZE_128K 4
26136 +#define EBI_SIZE_256K 5
26137 +#define EBI_SIZE_512K 6
26138 +#define EBI_SIZE_1M 7
26139 +#define EBI_SIZE_2M 8
26140 +#define EBI_SIZE_4M 9
26141 +#define EBI_SIZE_8M 10
26142 +#define EBI_SIZE_16M 11
26143 +#define EBI_SIZE_32M 12
26144 +#define EBI_SIZE_64M 13
26145 +#define EBI_SIZE_128M 14
26146 +#define EBI_SIZE_256M 15
26148 +/* CSxCNTL settings */
26149 +#define EBI_ENABLE 0x00000001 /* .. enable this range */
26150 +#define EBI_WAIT_STATES 0x0000000e /* .. mask for wait states */
26151 +#define ZEROWT 0x00000000 /* .. 0 WS */
26152 +#define ONEWT 0x00000002 /* .. 1 WS */
26153 +#define TWOWT 0x00000004 /* .. 2 WS */
26154 +#define THREEWT 0x00000006 /* .. 3 WS */
26155 +#define FOURWT 0x00000008 /* .. 4 WS */
26156 +#define FIVEWT 0x0000000a /* .. 5 WS */
26157 +#define SIXWT 0x0000000c /* .. 6 WS */
26158 +#define SEVENWT 0x0000000e /* .. 7 WS */
26159 +#define EBI_WORD_WIDE 0x00000010 /* .. 16-bit peripheral, else 8 */
26160 +#define EBI_POLARITY 0x00000040 /* .. set to invert chip select polarity */
26161 +#define EBI_TS_TA_MODE 0x00000080 /* .. use TS/TA mode */
26162 +#define EBI_TS_SEL 0x00000100 /* .. drive tsize, not bs_b */
26163 +#define EBI_FIFO 0x00000200 /* .. enable fifo */
26164 +#define EBI_RE 0x00000400 /* .. Reverse Endian */
26166 +/* EBICONFIG settings */
26167 +#define EBI_MASTER_ENABLE 0x80000000 /* allow external masters */
26168 +#define EBI_EXT_MAST_PRIO 0x40000000 /* maximize ext master priority */
26169 +#define EBI_CTRL_ENABLE 0x20000000
26170 +#define EBI_TA_ENABLE 0x10000000
26172 +#define BRGEN 0x80 /* Control register bit defs */
26175 +#define LOOPBK 0x10
26176 +#define TXPARITYEN 0x08
26177 +#define TXPARITYEVEN 0x04
26178 +#define RXPARITYEN 0x02
26179 +#define RXPARITYEVEN 0x01
26180 +#define XMITBREAK 0x40
26181 +#define BITS5SYM 0x00
26182 +#define BITS6SYM 0x10
26183 +#define BITS7SYM 0x20
26184 +#define BITS8SYM 0x30
26185 +#define BAUD115200 0x0a
26186 +#define ONESTOP 0x07
26187 +#define TWOSTOP 0x0f
26190 +#define RSTTXFIFOS 0x80
26191 +#define RSTRXFIFOS 0x40
26192 +#define DELTAIP 0x0001
26193 +#define TXUNDERR 0x0002
26194 +#define TXOVFERR 0x0004
26195 +#define TXFIFOTHOLD 0x0008
26196 +#define TXREADLATCH 0x0010
26197 +#define TXFIFOEMT 0x0020
26198 +#define RXUNDERR 0x0040
26199 +#define RXOVFERR 0x0080
26200 +#define RXTIMEOUT 0x0100
26201 +#define RXFIFOFULL 0x0200
26202 +#define RXFIFOTHOLD 0x0400
26203 +#define RXFIFONE 0x0800
26204 +#define RXFRAMERR 0x1000
26205 +#define RXPARERR 0x2000
26206 +#define RXBRK 0x4000
26208 +#define RXIRQS 0x7fc0
26209 +#define TXIRQS 0x003e
26211 +#define CPU_CLK_EN 0x0001
26212 +#define UART_CLK_EN 0x0008
26216 +#define FMSEL_MASK 0xf0000000 // 31:28
26217 +#define FMSEL_SHFT 28
26218 +#define FM_HI_GEAR 0x08000000 // 27
26219 +#define FMCLKSEL 0x04000000 // 26
26220 +#define FMDIV_MASK 0x03000000 // 25:24
26221 +#define FMDIV_SHFT 24
26222 +#define FBDIV_MASK 0x00f00000 // 23:20
26223 +#define FBDIV_SHFT 20
26224 +#define FB_SEL 0x00010000 // 16
26225 +#define FU2SEL_MASK 0x0000f000 // 15:12
26226 +#define FU2SEL_SHFT 12
26227 +#define FU1SEL_MASK 0x00000f00 // 11:8
26228 +#define FU1SEL_SHFT 8
26229 +#define FU1PRS_MASK 0x000000e0 // 7:5
26230 +#define FU1PRS_SHFT 5
26231 +#define FU1POS_MASK 0x00000018 // 4:3
26232 +#define FU1POS_SHFT 3
26233 +#define SOFT_RESET 0x00000001
26235 +#define FMSEL 0x08
26237 +#define UART0CONTROL 0x01
26238 +#define UART0CONFIG 0x02
26239 +#define UART0RXTIMEOUT 0x03
26240 +#define UART0BAUD 0x04
26241 +#define UART0FIFOCFG 0x0a
26242 +#define UART0INTMASK 0x10
26243 +#define UART0INTSTAT 0x12
26244 +#define UART0DATA 0x17
26246 +#define GPIOTBUSSEL 0x03
26247 +#define GPIODIR 0x06
26248 +#define GPIOLED 0x09
26249 +#define GPIOIO 0x0a
26250 +#define GPIOUARTCTL 0x0c
26252 +/*Defines below show which bit enables which UART signals */
26253 +#define RI1_EN 0x0001
26254 +#define CTS1_EN 0x0002
26255 +#define DCD1_EN 0x0004
26256 +#define DSR1_EN 0x0008
26257 +#define DTR1_EN 0x0010
26258 +#define RTS1_EN 0x0020
26259 +#define DO1_EN 0x0040
26260 +#define DI1_EN 0x0080
26261 +#define RI0_EN 0x0100
26262 +#define CTS0_EN 0x0200
26263 +#define DCD0_EN 0x0400
26264 +#define DSR0_EN 0x0800
26265 +#define DTR0_EN 0x1000
26266 +#define RTS0_EN 0x2000
26273 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/6345_map.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/6345_map.h
26274 --- linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/6345_map.h 1970-01-01 01:00:00.000000000 +0100
26275 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/6345_map.h 2006-06-26 09:07:10.000000000 +0200
26278 +<:copyright-broadcom
26280 + Copyright (c) 2002 Broadcom Corporation
26281 + All Rights Reserved
26282 + No portions of this material may be reproduced in any form without the
26283 + written permission of:
26284 + Broadcom Corporation
26285 + 16215 Alton Parkway
26286 + Irvine, California 92619
26287 + All information contained in this document is Broadcom Corporation
26288 + company private, proprietary, and trade secret.
26292 +/***********************************************************************/
26294 +/* MODULE: 6345_map.h */
26295 +/* DATE: 96/12/19 */
26296 +/* PURPOSE: Define addresses of major hardware components of */
26299 +/***********************************************************************/
26300 +#ifndef __BCM6345_MAP_H
26301 +#define __BCM6345_MAP_H
26307 +#include "bcmtypes.h"
26308 +#include "6345_common.h"
26309 +#include "6345_intr.h"
26311 +/* macro to convert logical data addresses to physical */
26312 +/* DMA hardware must see physical address */
26313 +#define LtoP( x ) ( (uint32)x & 0x1fffffff )
26314 +#define PtoL( x ) ( LtoP(x) | 0xa0000000 )
26317 +** Interrupt Controller
26319 +typedef struct IntControl {
26320 + uint32 RevID; /* (00) */
26321 + uint16 testControl; /* (04) */
26322 + uint16 blkEnables; /* (06) */
26324 +#define USB_CLK_EN 0x0100
26325 +#define EMAC_CLK_EN 0x0080
26326 +#define ADSL_CLK_EN 0x0010
26327 +#define UART_CLK_EN 0x0008
26328 +#define EBI_CLK_EN 0x0004
26329 +#define BUS_CLK_EN 0x0002
26330 +#define CPU_CLK_EN 0x0001
26332 + uint32 pll_control; /* (08) */
26333 +#define FMSEL_MASK 0xf0000000 // 31:28
26334 +#define FMSEL_SHFT 28
26335 +#define FM_HI_GEAR 0x08000000 // 27
26336 +#define FMCLKSEL 0x04000000 // 26
26337 +#define FMDIV_MASK 0x03000000 // 25:24
26338 +#define FMDIV_SHFT 24
26339 +#define FBDIV_MASK 0x00f00000 // 23:20
26340 +#define FBDIV_SHFT 20
26341 +#define FB_SEL 0x00010000 // 16
26342 +#define FU2SEL_MASK 0x0000f000 // 15:12
26343 +#define FU2SEL_SHFT 12
26344 +#define FU1SEL_MASK 0x00000f00 // 11:8
26345 +#define FU1SEL_SHFT 8
26346 +#define FU1PRS_MASK 0x000000e0 // 7:5
26347 +#define FU1PRS_SHFT 5
26348 +#define FU1POS_MASK 0x00000018 // 4:3
26349 +#define FU1POS_SHFT 3
26350 +#define SOFT_RESET 0x00000001
26352 + uint32 IrqMask; /* (0c) */
26353 + uint32 IrqStatus; /* (10) */
26355 + uint32 ExtIrqCfg;
26356 +#define EI_SENSE_SHFT 0
26357 +#define EI_STATUS_SHFT 4
26358 +#define EI_CLEAR_SHFT 8
26359 +#define EI_MASK_SHFT 12
26360 +#define EI_INSENS_SHFT 16
26361 +#define EI_LEVEL_SHFT 20
26364 +#define PERF ((volatile IntControl * const) INTC_BASE)
26367 +** Bus Bridge Registers
26369 +typedef struct BusBridge {
26371 +#define BB_BUSY 0x8000 /* posted operation in progress */
26372 +#define BB_RD_PND 0x4000 /* read pending */
26373 +#define BB_RD_CMPLT 0x2000 /* read complete */
26374 +#define BB_ERROR 0x1000 /* posted write error */
26375 +#define BB_TEA 0x0800 /* transfer aborted */
26376 + uint16 abortTimeoutCnt; /* abort timeout value */
26378 + byte writePostEnable;
26379 +#define BB_POST_TIMR_EN 0x08 /* post writes to timer regs */
26380 +#define BB_POST_GPIO_EN 0x04 /* post writes to gpio regs */
26381 +#define BB_POST_INTC_EN 0x02 /* post writes to interrupt controller regs */
26382 +#define BB_POST_UART_EN 0x01 /* post writes to uart regs */
26384 + uint16 postAddr; /* posted read address (lower half) */
26386 + byte postData; /* posted read data */
26389 +/* register offsets (needed for EBI master access) */
26390 +#define BB_STATUS 0
26391 +#define BB_ABORT_TO_CNT 2
26392 +#define BB_WR_POST_EN 4
26393 +#define BB_RD_POST_ADDR 10
26394 +#define BB_RD_POST_DATA 12
26396 +#define BRIDGE *bridge ((volatile BusBridge * const) BB_BASE)
26401 +typedef struct Timer {
26404 +#define TIMER0EN 0x01
26405 +#define TIMER1EN 0x02
26406 +#define TIMER2EN 0x04
26408 +#define TIMER0 0x01
26409 +#define TIMER1 0x02
26410 +#define TIMER2 0x04
26411 +#define WATCHDOG 0x08
26412 + uint32 TimerCtl0;
26413 + uint32 TimerCtl1;
26414 + uint32 TimerCtl2;
26415 +#define TIMERENABLE 0x80000000
26416 +#define RSTCNTCLR 0x40000000
26417 + uint32 TimerCnt0;
26418 + uint32 TimerCnt1;
26419 + uint32 TimerCnt2;
26420 + uint32 WatchDogDefCount;
26422 + /* Write 0xff00 0x00ff to Start timer
26423 + * Write 0xee00 0x00ee to Stop and re-load default count
26424 + * Read from this register returns current watch dog count
26426 + uint32 WatchDogCtl;
26428 + /* Number of 40-MHz ticks for WD Reset pulse to last */
26429 + uint32 WDResetCount;
26432 +#define TIMER ((volatile Timer * const) TIMR_BASE)
26437 +typedef struct UartChannel {
26440 +#define BRGEN 0x80 /* Control register bit defs */
26443 +#define LOOPBK 0x10
26444 +#define TXPARITYEN 0x08
26445 +#define TXPARITYEVEN 0x04
26446 +#define RXPARITYEN 0x02
26447 +#define RXPARITYEVEN 0x01
26450 +#define XMITBREAK 0x40
26451 +#define BITS5SYM 0x00
26452 +#define BITS6SYM 0x10
26453 +#define BITS7SYM 0x20
26454 +#define BITS8SYM 0x30
26455 +#define ONESTOP 0x07
26456 +#define TWOSTOP 0x0f
26457 + /* 4-LSBS represent STOP bits/char
26458 + * in 1/8 bit-time intervals. Zero
26459 + * represents 1/8 stop bit interval.
26460 + * Fifteen represents 2 stop bits.
26463 +#define RSTTXFIFOS 0x80
26464 +#define RSTRXFIFOS 0x40
26465 + /* 5-bit TimeoutCnt is in low bits of this register.
26466 + * This count represents the number of characters
26467 + * idle times before setting receive Irq when below threshold
26470 + /* When divide SysClk/2/(1+baudword) we should get 32*bit-rate
26473 + byte txf_levl; /* Read-only fifo depth */
26474 + byte rxf_levl; /* Read-only fifo depth */
26475 + byte fifocfg; /* Upper 4-bits are TxThresh, Lower are
26476 + * RxThreshold. Irq can be asserted
26477 + * when rx fifo> thresh, txfifo<thresh
26479 + byte prog_out; /* Set value of DTR (Bit0), RTS (Bit1)
26480 + * if these bits are also enabled to GPIO_o
26482 +#define DTREN 0x01
26483 +#define RTSEN 0x02
26486 + byte DeltaIPEdgeNoSense; /* Low 4-bits, set corr bit to 1 to
26487 + * detect irq on rising AND falling
26488 + * edges for corresponding GPIO_i
26489 + * if enabled (edge insensitive)
26491 + byte DeltaIPConfig_Mask; /* Upper 4 bits: 1 for posedge sense
26492 + * 0 for negedge sense if
26493 + * not configured for edge
26494 + * insensitive (see above)
26495 + * Lower 4 bits: Mask to enable change
26496 + * detection IRQ for corresponding
26499 + byte DeltaIP_SyncIP; /* Upper 4 bits show which bits
26500 + * have changed (may set IRQ).
26501 + * read automatically clears bit
26502 + * Lower 4 bits are actual status
26505 + uint16 intMask; /* Same Bit defs for Mask and status */
26506 + uint16 intStatus;
26507 +#define DELTAIP 0x0001
26508 +#define TXUNDERR 0x0002
26509 +#define TXOVFERR 0x0004
26510 +#define TXFIFOTHOLD 0x0008
26511 +#define TXREADLATCH 0x0010
26512 +#define TXFIFOEMT 0x0020
26513 +#define RXUNDERR 0x0040
26514 +#define RXOVFERR 0x0080
26515 +#define RXTIMEOUT 0x0100
26516 +#define RXFIFOFULL 0x0200
26517 +#define RXFIFOTHOLD 0x0400
26518 +#define RXFIFONE 0x0800
26519 +#define RXFRAMERR 0x1000
26520 +#define RXPARERR 0x2000
26521 +#define RXBRK 0x4000
26524 + uint16 Data; /* Write to TX, Read from RX */
26525 + /* bits 11:8 are BRK,PAR,FRM errors */
26531 +#define UART ((volatile Uart * const) UART_BASE)
26534 +** Gpio Controller
26536 +typedef struct GpioControl {
26541 + /* High in bit location enables output */
26545 + byte Leds; //Only bits [3:0]
26548 + /* Defines below show which bit enables which UART signals */
26550 +#define RI1_EN 0x0001
26551 +#define CTS1_EN 0x0002
26552 +#define DCD1_EN 0x0004
26553 +#define DSR1_EN 0x0008
26554 +#define DTR1_EN 0x0010
26555 +#define RTS1_EN 0x0020
26556 +#define DO1_EN 0x0040
26557 +#define DI1_EN 0x0080
26558 +#define RI0_EN 0x0100
26559 +#define CTS0_EN 0x0200
26560 +#define DCD0_EN 0x0400
26561 +#define DSR0_EN 0x0800
26562 +#define DTR0_EN 0x1000
26563 +#define RTS0_EN 0x2000
26565 + /*********************************************************************
26566 + * Multiple Use Muxed GPIO
26567 + * -----------------------
26573 + * GPIO[0] -> RI1 I Controlled by UartCtl[0] ELSE 0
26574 + * GPIO[0] -> DMATC_i I Always
26575 + * GPIO[0] -> DMATC_o O Controlled by dma_enable_n|dma_drive_n
26576 + * GPIO[0] -> ebi_bsize[0] I Always
26578 + * GPIO[1] -> CTS1 I Controlled by UartCtl[1] ELSE 0
26579 + * GPIO[1] -> DMAACK1 (18) O Controlled by dma_enable_n
26580 + * GPIO[1] -> ebi_bg_b O Controlled by ebi_master_n
26582 + * GPIO[2] -> DCD1 I Controlled by UartCtl[2] ELSE 0
26583 + * GPIO[2] -> ebi_bsize[1] I Always
26585 + * GPIO[3] -> DSR1 I Controlled by UartCtl[3] ELSE 0
26586 + * GPIO[3] -> INT2 I Always
26587 + * GPIO[3] -> ebi_bsize[2] I Always
26589 + * GPIO[4] -> DTR1 O Controlled by UartCtl[4]&GpioDir[4]
26590 + * GPIO[4] -> INT3 I Always
26591 + * GPIO[4] -> ebi_burst I Always
26593 + * GPIO[5] -> RTS1 O Controlled by UartCtl[5]&GpioDir[5]
26594 + * GPIO[5] -> DMAACK0 (17) O Controlled by dma_enable_n
26595 + * GPIO[5] -> ebi_tsize I Always
26597 + * GPIO[6] -> sDout1 O Controlled by UartCtl[6]&GpioDir[6]
26598 + * GPIO[6] -> DMARQ1 (18) I Always
26599 + * GPIO[6] -> ebi_bb_i I Always
26600 + * GPIO[6] -> ebi_bb_o O Controlled by ebi_master_n|ebi_bb_oen
26602 + * GPIO[7] -> sDin1 I Controlled by UartCtl[7] ELSE 0
26603 + * GPIO[7] -> ebi_br_b I Always
26604 + * GPIO[7] -> DMARQ0 (17) I Always
26610 + * GPIO[8] -> RI0 I Controlled by UartCtl[8] ELSE 0
26611 + * GPIO[8] -> ebi_cs_b[6] O Controlled by ebi_cs_en[6]
26613 + * GPIO[9] -> CTS0 I Controlled by UartCtl[9] ELSE 0
26615 + * GPIO[a] -> DCD0 I Controlled by UartCtl[a] ELSE 0
26616 + * GPIO[a] -> ebi_cs_b[7] O Controlled by ebi_cs_en[7]
26618 + * GPIO[b] -> DSR0 I Controlled by UartCtl[b] ELSE 0
26619 + * GPIO[b] -> ebi_int_cs_b I Always
26621 + * GPIO[c] -> DTR0 O Controlled by UartCtl[c]&GpioDir[c]
26623 + * GPIO[d] -> RTS0 O Controlled by UartCtl[d]&&GpioDir[d]
26625 + * GPIO[e] -> INT0 I Always
26627 + * GPIO[f] -> INT1 I Always
26629 + * sDout0 -> (bist_en[15]) ? pll_clk48:sDout0_int
26631 + *********************************************************************/
26635 +#define GPIO ((volatile GpioControl * const) GPIO_BASE)
26637 +#define GPIO_NUM_MAX_BITS_MASK 0x0f
26638 +#define GPIO_NUM_TO_MASK(X) (1 << ((X) & GPIO_NUM_MAX_BITS_MASK))
26641 +** DMA Channel (1 .. 20)
26643 +typedef struct DmaChannel {
26644 + uint32 cfg; /* (00) assorted configuration */
26645 +#define DMA_FLOWC_EN 0x00000010 /* flow control enable */
26646 +#define DMA_WRAP_EN 0x00000008 /* use DMA_WRAP bit */
26647 +#define DMA_CHAINING 0x00000004 /* chaining mode */
26648 +#define DMA_STALL 0x00000002
26649 +#define DMA_ENABLE 0x00000001 /* set to enable channel */
26650 + uint32 maxBurst; /* (04) max burst length permitted */
26651 + /* non-chaining / chaining */
26652 + uint32 startAddr; /* (08) source addr / ring start address */
26653 + uint32 length; /* (0c) xfer len / ring len */
26654 +#define DMA_KICKOFF 0x80000000 /* start non-chaining xfer */
26656 + uint32 bufStat; /* (10) buffer status for non-chaining */
26657 + uint32 intStat; /* (14) interrupts control and status */
26658 + uint32 intMask; /* (18) interrupts mask */
26659 +#define DMA_BUFF_DONE 0x00000001 /* buffer done */
26660 +#define DMA_DONE 0x00000002 /* packet xfer complete */
26661 +#define DMA_NO_DESC 0x00000004 /* no valid descriptors */
26663 +// DMA HW bits are clugy in this version of chip (mask/status shifted)
26664 +#define DMA_BUFF_DONE_MASK 0x00000004 /* buffer done */
26665 +#define DMA_DONE_MASK 0x00000001 /* packet xfer complete */
26666 +#define DMA_NO_DESC_MASK 0x00000002 /* no valid descriptors */
26668 + uint32 fcThreshold; /* (1c) flow control threshold */
26669 + uint32 numAlloc; /* */
26670 + uint32 unused[7]; /* (20-3c) pad to next descriptor */
26672 +/* register offsets, useful for ebi master access */
26674 +#define DMA_MAX_BURST 4
26675 +#define DMA_START_ADDR 8
26676 +#define DMA_LENGTH 12
26677 +#define DMA_BUF_STAT 16
26678 +#define DMA_INT_STAT 20
26679 +#define DMA_FC_THRESHOLD 24
26680 +#define DMA_NUM_ALLOC 28
26683 +/* paste in your program ...
26684 +DmaChannel *dmaChannels = (DmaChannel *)DMA_BASE;
26685 +DmaChannel *dma1 = dmaChannels[1];
26692 +typedef struct DmaDesc {
26693 + uint16 length; /* in bytes of data in buffer */
26694 + uint16 status; /* buffer status */
26695 +#define DMA_OWN 0x8000 /* cleared by DMA, set by SW */
26696 +#define DMA_EOP 0x0800 /* last buffer in packet */
26697 +#define DMA_SOP 0x0400 /* first buffer in packet */
26698 +#define DMA_WRAP 0x0200 /* */
26699 +#define DMA_APPEND_CRC 0x0100 /* .. for emac tx */
26700 +#define DATA_FLAG 0x0100 /* .. for secmod rx */
26701 +#define AUTH_FAIL_FLAG 0x0100 /* .. for secmod tx */
26703 +/* EMAC Descriptor Status definitions */
26704 +#define EMAC_UNDERRUN 0x4000 /* Tx underrun, dg-mod ???) */
26705 +#define EMAC_MISS 0x0080 /* framed address recognition failed (promiscuous) */
26706 +#define EMAC_BRDCAST 0x0040 /* DA is Broadcast */
26707 +#define EMAC_MULT 0x0020 /* DA is multicast */
26708 +#define EMAC_LG 0x0010 /* frame length > RX_LENGTH register value */
26709 +#define EMAC_NO 0x0008 /* Non-Octet aligned */
26710 +#define EMAC_RXER 0x0004 /* RX_ERR on MII while RX_DV assereted */
26711 +#define EMAC_CRC_ERROR 0x0002 /* CRC error */
26712 +#define EMAC_OV 0x0001 /* Overflow */
26714 +/* HDLC Descriptor Status definitions */
26715 +#define DMA_HDLC_TX_ABORT 0x0100
26716 +#define DMA_HDLC_RX_OVERRUN 0x4000
26717 +#define DMA_HDLC_RX_TOO_LONG 0x2000
26718 +#define DMA_HDLC_RX_CRC_OK 0x1000
26719 +#define DMA_HDLC_RX_ABORT 0x0100
26721 + uint32 address; /* address of data */
26725 +** Sdram Controller
26727 +typedef struct SdramControllerRegs {
26729 + uint16 initControl; /* 02 */
26730 +#define SD_POWER_DOWN 0x200 /* put sdram into power down */
26731 +#define SD_SELF_REFRESH 0x100 /* enable self refresh mode */
26732 +#define SD_SOFT_RESET 0x080 /* soft reset all sdram controller regs */
26733 +#define SD_EDO_SELECT 0x040 /* select EDO mode */
26734 +#define SD_EDO_WAIT_STATE 0x020 /* add an EDO wait state */
26735 +#define SD_8MEG 0x010 /* map sdram to 8 megs */
26736 +#define SD_MASTER_ENABLE 0x008 /* enable accesses to external sdram */
26737 +#define SD_MRS 0x004 /* generate a mode register select cycle */
26738 +#define SD_PRECHARGE 0x002 /* generate a precharge cycle */
26739 +#define SD_CBR 0x001 /* generate a refresh cycle */
26740 + uint8 unused2[3];
26741 + uint8 config; /* 07 */
26742 +#define SD_FAST_MEM 0x04 /* 1=CAS latency of 2, 0 = CAS latency of 3 */
26743 +#define SD_BURST_LEN 0x03 /* set burst length */
26744 +#define SD_BURST_FULL_PAGE 0x00 /* .. full page */
26745 +#define SD_BURST_8 0x01 /* .. 8 words */
26746 +#define SD_BURST_4 0x02 /* .. 4 words */
26747 +#define SD_BURST_2 0x03 /* .. 2 words */
26749 + uint16 refreshControl; /* 0a */
26750 +#define SD_REFRESH_ENABLE 0x8000 /* refresh enable */
26751 +#define SD_REFRESH_PERIOD 0x00ff /* refresh period (16 x n x clock_period) */
26753 + uint32 memoryBase; /* 0c */
26754 +#define SD_MEMBASE_MASK 0xffffe000 /* base address mask */
26755 +#define SD_MEMSIZE_8MEG 0x00000001 /* memory is 8 meg */
26756 +#define SD_MEMSIZE_2MEG 0x00000001 /* memory is 2 meg */
26758 +} SdramControllerRegs;
26761 +** External Bus Interface
26763 +typedef struct EbiChipSelect {
26764 + uint32 base; /* base address in upper 24 bits */
26765 +#define EBI_SIZE_8K 0
26766 +#define EBI_SIZE_16K 1
26767 +#define EBI_SIZE_32K 2
26768 +#define EBI_SIZE_64K 3
26769 +#define EBI_SIZE_128K 4
26770 +#define EBI_SIZE_256K 5
26771 +#define EBI_SIZE_512K 6
26772 +#define EBI_SIZE_1M 7
26773 +#define EBI_SIZE_2M 8
26774 +#define EBI_SIZE_4M 9
26775 +#define EBI_SIZE_8M 10
26776 +#define EBI_SIZE_16M 11
26777 +#define EBI_SIZE_32M 12
26778 +#define EBI_SIZE_64M 13
26779 +#define EBI_SIZE_128M 14
26780 +#define EBI_SIZE_256M 15
26782 +#define EBI_ENABLE 0x00000001 /* .. enable this range */
26783 +#define EBI_WAIT_STATES 0x0000000e /* .. mask for wait states */
26784 +#define EBI_WTST_SHIFT 1 /* .. for shifting wait states */
26785 +#define EBI_WORD_WIDE 0x00000010 /* .. 16-bit peripheral, else 8 */
26786 +#define EBI_WREN 0x00000020 /* enable posted writes */
26787 +#define EBI_POLARITY 0x00000040 /* .. set to invert something,
26788 + ** don't know what yet */
26789 +#define EBI_TS_TA_MODE 0x00000080 /* .. use TS/TA mode */
26790 +#define EBI_TS_SEL 0x00000100 /* .. drive tsize, not bs_b */
26791 +#define EBI_FIFO 0x00000200 /* .. use fifo */
26792 +#define EBI_RE 0x00000400 /* .. Reverse Endian */
26795 +typedef struct EbiRegisters {
26796 + EbiChipSelect cs[5]; /* size chip select configuration */
26797 + uint32 reserved[6];
26798 + uint32 ebi_config; /* configuration */
26799 +#define EBI_MASTER_ENABLE 0x80000000 /* allow external masters */
26800 +#define EBI_EXT_MAST_PRIO 0x40000000 /* maximize ext master priority */
26801 +#define EBI_CTRL_ENABLE 0x20000000
26802 +#define EBI_TA_ENABLE 0x10000000
26803 + uint32 dma_control;
26804 +#define EBI_TX_INV_IRQ_EN 0x00080000
26805 +#define EBI_RX_INV_IRQ_EN 0x00040000
26806 +#define EBI_TX_PKT_DN_IRQ_EN 0x00020000
26807 +#define EBI_RX_PKT_DN_IRQ_EN 0x00010000
26808 +#define EBI_TX_INV_CLR 0x00001000
26809 +#define EBI_RX_INV_CLR 0x00000800
26810 +#define EBI_CHAINING 0x00000400
26811 +#define EBI_EXT_MODE 0x00000200
26812 +#define EBI_HALF_WORD 0x00000100
26813 +#define EBI_TX_PKT_DN_CLR 0x00000080
26814 +#define EBI_RX_PKT_DN_CLR 0x00000040
26815 +#define EBI_TX_BUF_DN_CLR 0x00000020
26816 +#define EBI_RX_BUF_DN_CLR 0x00000010
26817 +#define EBI_TX_BUF_DN_IRQ_EN 0x00000008
26818 +#define EBI_RX_BUF_DN_IRQ_EN 0x00000004
26819 +#define EBI_TX_EN 0x00000002
26820 +#define EBI_RX_EN 0x00000001
26821 + uint32 dma_rx_start_addr;
26822 + uint32 dma_rx_buf_size;
26823 + uint32 dma_tx_start_addr;
26824 + uint32 dma_tx_buf_size;
26825 + uint32 dma_status;
26826 +#define EBI_TX_INV_DESC 0x00000020
26827 +#define EBI_RX_INV_DESC 0x00000010
26828 +#define EBI_TX_PKT_DN 0x00000008
26829 +#define EBI_RX_PKT_DN 0x00000004
26830 +#define EBI_TX_BUF_DN 0x00000002
26831 +#define EBI_RX_BUF_DN 0x00000001
26834 +#define EBIC ((volatile EbiRegisters * const) EBIC_BASE)
26836 +typedef struct PcmciaRegisters {
26837 + /*Each of base has 24 bits of base address followed by size select field*/
26839 + uint32 mem_cntrl;
26840 + uint32 attr_base;
26841 + uint32 attr_cntrl;
26844 +#define PCMCIA_CS_ENABLE 0x00000001
26845 +#define PCMCIA_CS_FIFO_ENABLE 0x00000200
26846 +#define PCMCIA_DSTSIZE_16 0x00000010 // 0 -8bit, 1- 16bit
26847 +#define PCMCIA_RENDIAN 0x00000400
26848 + /* Skip ECR and EBI-DMA registers */
26849 + uint32 other1[7];
26851 + byte mem_waitcnt4; // Only bits [5:0]
26852 + byte mem_waitcnt3; // Only bits [4:0]
26853 + byte mem_waitcnt2; // Only bits [4:0]
26854 + byte mem_waitcnt1; // Only bits [4:0]
26856 + byte attr_waitcnt4; // Only bits [5:0]
26857 + byte attr_waitcnt3; // Only bits [4:0]
26858 + byte attr_waitcnt2; // Only bits [4:0]
26859 + byte attr_waitcnt1; // Only bits [4:0]
26861 + byte io_waitcnt4; // Only bits [5:0]
26862 + byte io_waitcnt3; // Only bits [4:0]
26863 + byte io_waitcnt2; // Only bits [4:0]
26864 + byte io_waitcnt1; // Only bits [4:0]
26866 +} PcmciaRegisters;
26868 +#define PCMCIA ((volatile PcmciaRegisters * const) PCMCIA_BASE)
26871 +** EMAC transmit MIB counters
26873 +typedef struct EmacTxMib {
26874 + uint32 tx_good_octets; /* (200) good byte count */
26875 + uint32 tx_good_pkts; /* (204) good pkt count */
26876 + uint32 tx_octets; /* (208) good and bad byte count */
26877 + uint32 tx_pkts; /* (20c) good and bad pkt count */
26878 + uint32 tx_broadcasts_pkts; /* (210) good broadcast packets */
26879 + uint32 tx_multicasts_pkts; /* (214) good mulitcast packets */
26880 + uint32 tx_len_64; /* (218) RMON tx pkt size buckets */
26881 + uint32 tx_len_65_to_127; /* (21c) */
26882 + uint32 tx_len_128_to_255; /* (220) */
26883 + uint32 tx_len_256_to_511; /* (224) */
26884 + uint32 tx_len_512_to_1023; /* (228) */
26885 + uint32 tx_len_1024_to_max; /* (22c) */
26886 + uint32 tx_jabber_pkts; /* (230) > 1518 with bad crc */
26887 + uint32 tx_oversize_pkts; /* (234) > 1518 with good crc */
26888 + uint32 tx_fragment_pkts; /* (238) < 63 with bad crc */
26889 + uint32 tx_underruns; /* (23c) fifo underrun */
26890 + uint32 tx_total_cols; /* (240) total collisions in all tx pkts */
26891 + uint32 tx_single_cols; /* (244) tx pkts with single collisions */
26892 + uint32 tx_multiple_cols; /* (248) tx pkts with multiple collisions */
26893 + uint32 tx_excessive_cols; /* (24c) tx pkts with excessive cols */
26894 + uint32 tx_late_cols; /* (250) tx pkts with late cols */
26895 + uint32 tx_defered; /* (254) tx pkts deferred */
26896 + uint32 tx_carrier_lost; /* (258) tx pkts with CRS lost */
26897 + uint32 tx_pause_pkts; /* (25c) tx pause pkts sent */
26898 +#define NumEmacTxMibVars 24
26902 +** EMAC receive MIB counters
26904 +typedef struct EmacRxMib {
26905 + uint32 rx_good_octets; /* (280) good byte count */
26906 + uint32 rx_good_pkts; /* (284) good pkt count */
26907 + uint32 rx_octets; /* (288) good and bad byte count */
26908 + uint32 rx_pkts; /* (28c) good and bad pkt count */
26909 + uint32 rx_broadcasts_pkts; /* (290) good broadcast packets */
26910 + uint32 rx_multicasts_pkts; /* (294) good mulitcast packets */
26911 + uint32 rx_len_64; /* (298) RMON rx pkt size buckets */
26912 + uint32 rx_len_65_to_127; /* (29c) */
26913 + uint32 rx_len_128_to_255; /* (2a0) */
26914 + uint32 rx_len_256_to_511; /* (2a4) */
26915 + uint32 rx_len_512_to_1023; /* (2a8) */
26916 + uint32 rx_len_1024_to_max; /* (2ac) */
26917 + uint32 rx_jabber_pkts; /* (2b0) > 1518 with bad crc */
26918 + uint32 rx_oversize_pkts; /* (2b4) > 1518 with good crc */
26919 + uint32 rx_fragment_pkts; /* (2b8) < 63 with bad crc */
26920 + uint32 rx_missed_pkts; /* (2bc) missed packets */
26921 + uint32 rx_crc_align_errs; /* (2c0) both or either */
26922 + uint32 rx_undersize; /* (2c4) < 63 with good crc */
26923 + uint32 rx_crc_errs; /* (2c8) crc errors (only) */
26924 + uint32 rx_align_errs; /* (2cc) alignment errors (only) */
26925 + uint32 rx_symbol_errs; /* (2d0) pkts with RXERR assertions (symbol errs) */
26926 + uint32 rx_pause_pkts; /* (2d4) MAC control, PAUSE */
26927 + uint32 rx_nonpause_pkts; /* (2d8) MAC control, not PAUSE */
26928 +#define NumEmacRxMibVars 23
26931 +typedef struct EmacRegisters {
26932 + uint32 rxControl; /* (00) receive control */
26933 +#define EMAC_PM_REJ 0x80 /* - reject DA match in PMx regs */
26934 +#define EMAC_UNIFLOW 0x40 /* - accept cam match fc */
26935 +#define EMAC_FC_EN 0x20 /* - enable flow control */
26936 +#define EMAC_LOOPBACK 0x10 /* - loopback */
26937 +#define EMAC_PROM 0x08 /* - promiscuous */
26938 +#define EMAC_RDT 0x04 /* - ignore transmissions */
26939 +#define EMAC_ALL_MCAST 0x02 /* - ignore transmissions */
26940 +#define EMAC_NO_BCAST 0x01 /* - ignore transmissions */
26943 + uint32 rxMaxLength; /* (04) receive max length */
26944 + uint32 txMaxLength; /* (08) transmit max length */
26945 + uint32 unused1[1];
26946 + uint32 mdioFreq; /* (10) mdio frequency */
26947 +#define EMAC_MII_PRE_EN 0x0100 /* prepend preamble sequence */
26948 +#define EMAC_MDIO_PRE 0x100 /* - enable MDIO preamble */
26949 +#define EMAC_MDC_FREQ 0x0ff /* - mdio frequency */
26951 + uint32 mdioData; /* (14) mdio data */
26952 +#define MDIO_WR 0x50020000 /* - write framing */
26953 +#define MDIO_RD 0x60020000 /* - read framing */
26954 +#define MDIO_PMD_SHIFT 23
26955 +#define MDIO_REG_SHIFT 18
26957 + uint32 intMask; /* (18) int mask */
26958 + uint32 intStatus; /* (1c) int status */
26959 +#define EMAC_FLOW_INT 0x04 /* - flow control event */
26960 +#define EMAC_MIB_INT 0x02 /* - mib event */
26961 +#define EMAC_MDIO_INT 0x01 /* - mdio event */
26963 + uint32 unused2[3];
26964 + uint32 config; /* (2c) config */
26965 +#define EMAC_ENABLE 0x001 /* - enable emac */
26966 +#define EMAC_DISABLE 0x002 /* - disable emac */
26967 +#define EMAC_SOFT_RST 0x004 /* - soft reset */
26968 +#define EMAC_SOFT_RESET 0x004 /* - emac soft reset */
26969 +#define EMAC_EXT_PHY 0x008 /* - external PHY select */
26971 + uint32 txControl; /* (30) transmit control */
26972 +#define EMAC_FD 0x001 /* - full duplex */
26973 +#define EMAC_FLOWMODE 0x002 /* - flow mode */
26974 +#define EMAC_NOBKOFF 0x004 /* - no backoff in */
26975 +#define EMAC_SMALLSLT 0x008 /* - small slot time */
26977 + uint32 txThreshold; /* (34) transmit threshold */
26978 + uint32 mibControl; /* (38) mib control */
26979 +#define EMAC_NO_CLEAR 0x001 /* don't clear on read */
26981 + uint32 unused3[7];
26983 + uint32 pm0DataLo; /* (58) perfect match 0 data lo */
26984 + uint32 pm0DataHi; /* (5C) perfect match 0 data hi (15:0) */
26985 + uint32 pm1DataLo; /* (60) perfect match 1 data lo */
26986 + uint32 pm1DataHi; /* (64) perfect match 1 data hi (15:0) */
26987 + uint32 pm2DataLo; /* (68) perfect match 2 data lo */
26988 + uint32 pm2DataHi; /* (6C) perfect match 2 data hi (15:0) */
26989 + uint32 pm3DataLo; /* (70) perfect match 3 data lo */
26990 + uint32 pm3DataHi; /* (74) perfect match 3 data hi (15:0) */
26991 +#define EMAC_CAM_V 0x10000 /* - cam index */
26992 +#define EMAC_CAM_VALID 0x00010000
26994 + uint32 unused4[98]; /* (78-1fc) */
26996 + EmacTxMib tx_mib; /* (200) emac tx mib */
26997 + uint32 unused5[8]; /* (260-27c) */
26999 + EmacRxMib rx_mib; /* (280) rx mib */
27003 +/* register offsets for subrouting access */
27004 +#define EMAC_RX_CONTROL 0x00
27005 +#define EMAC_RX_MAX_LENGTH 0x04
27006 +#define EMAC_TX_MAC_LENGTH 0x08
27007 +#define EMAC_MDIO_FREQ 0x10
27008 +#define EMAC_MDIO_DATA 0x14
27009 +#define EMAC_INT_MASK 0x18
27010 +#define EMAC_INT_STATUS 0x1C
27011 +#define EMAC_CAM_DATA_LO 0x20
27012 +#define EMAC_CAM_DATA_HI 0x24
27013 +#define EMAC_CAM_CONTROL 0x28
27014 +#define EMAC_CONTROL 0x2C
27015 +#define EMAC_TX_CONTROL 0x30
27016 +#define EMAC_TX_THRESHOLD 0x34
27017 +#define EMAC_MIB_CONTROL 0x38
27020 +#define EMAC ((volatile EmacRegisters * const) EMAC_BASE)
27025 +typedef struct UsbRegisters {
27026 + byte inttf_setting;
27027 + byte current_config;
27028 + uint16 status_frameNum;
27029 +#define USB_BUS_RESET 0x1000
27030 +#define USB_SUSPENDED 0x0800
27034 + byte endpt_status;
27035 +#define USB_ENDPOINT_0 0x01
27036 +#define USB_ENDPOINT_1 0x02
27037 +#define USB_ENDPOINT_2 0x04
27038 +#define USB_ENDPOINT_3 0x08
27039 +#define USB_ENDPOINT_4 0x10
27040 +#define USB_ENDPOINT_5 0x20
27041 +#define USB_ENDPOINT_6 0x40
27042 +#define USB_ENDPOINT_7 0x80
27044 + byte conf_mem_ctl;
27045 +#define USB_CONF_MEM_RD 0x80
27046 +#define USB_CONF_MEM_RDY 0x40
27048 + byte conf_mem_read_address;
27049 + byte conf_mem_write_address;
27052 + byte dev_req_bytesel;
27053 + uint16 ext_dev_data;
27057 + byte endpt_stall_reset; // use same endpoint #'s from above
27059 +#define USB_FORCE_ERR 0x20
27060 +#define USB_SOFT_RESET 0x10
27061 +#define USB_RESUME 0x08
27062 +#define USB_COMMAND_ERR 0x04
27063 +#define USB_COMMAND_OVER 0x02
27065 + byte iso_out_in_addr;
27066 + byte blk_out_in_addr;
27069 +#define USB_TX_DMA_OPER 0x00000000
27070 +#define USB_TX_CNTL_FIFO_OPER 0x00000004
27071 +#define USB_TX_BULK_FIFO_OPER 0x00000008
27072 +#define USB_TX_ISO_FIFO_OPER 0x0000000c
27073 +#define USB_TX_IRQ_OPER 0x00000010
27074 +#define USB_RX_DMA_OPER 0x00000000
27075 +#define USB_RX_CNTL_FIFO_OPER 0x00000001
27076 +#define USB_RX_BULK_FIFO_OPER 0x00000002
27077 +#define USB_RX_ISO_FIFO_OPER 0x00000003
27078 + uint32 rx_ram_read_port;
27079 + uint32 tx_ram_write_port;
27080 + uint32 fifo_status;
27081 +#define USB_CTRLI_FIFO_FULL 0x00000001
27082 +#define USB_CTRLI_FIFO_EMPTY 0x00000002
27083 +#define USB_CTRLO_FIFO_FULL 0x00000100
27084 +#define USB_CTRLO_FIFO_EMPTY 0x00000200
27085 + uint32 irq_status;
27087 +#define USB_NEW_CONFIG 0x01
27088 +#define USB_SETUP_COMMAND_RECV 0x02 // non-standard setup command received
27089 +#define USB_OUT_FIFO_OV 0x04
27090 +#define USB_RESET_RECV 0x08
27091 +#define USB_SUSPEND_RECV 0x10
27092 +#define USB_FIFO_REWIND 0x20
27093 +#define USB_RX_BULK_FIFO_DATA_AVAIL 0x40
27094 +#define USB_RX_ISO_FIFO_DATA_AVAIL 0x80
27095 + uint32 endpt_cntl;
27096 +#define USB_R_WK_EN 0x0100
27097 +#define USB_TX_EOP 0x0200
27098 +#define USB_TX_CNTL_DMA_EN 0x0400
27099 +#define USB_TX_BULK_DMA_EN 0x0800
27100 +#define USB_TX_ISO_DMA_EN 0x1000
27101 +#define USB_RX_CNTL_DMA_EN 0x2000
27102 +#define USB_RX_BULK_DMA_EN 0x4800
27103 +#define USB_RX_ISO_DMA_EN 0x8000
27104 + uint32 rx_status_read_port;
27105 + uint32 confmem_read_port;
27106 + uint32 confmem_write_port;
27107 + uint32 fifo_ovf_count;
27108 + uint32 fifo_rewind_cnt;
27111 +#define USB ((volatile UsbRegisters * const) USB_BASE)
27114 +** ADSL core Registers
27117 +#define _PADLINE(line) pad ## line
27118 +#define _XSTR(line) _PADLINE(line)
27119 +#define PAD _XSTR(__LINE__)
27121 +typedef struct AdslRegisters {
27122 + uint32 core_control;
27123 +#define ADSL_RESET 0x01
27125 + uint32 core_status;
27126 +#define ADSL_HOST_MSG 0x01
27129 + uint32 bist_status;
27131 + uint32 int_status_i; /* 0x20 */
27132 + uint32 int_mask_i;
27133 + uint32 int_status_f;
27134 + uint32 int_mask_f;
27135 +#define ADSL_INT_HOST_MSG 0x00000020
27136 +#define ADSL_INT_DESC_ERR 0x00000400
27137 +#define ADSL_INT_DATA_ERR 0x00000800
27138 +#define ADSL_INT_DESC_PROTO_ERR 0x00001000
27139 +#define ADSL_INT_RCV_DESC_UF 0x00002000
27140 +#define ADSL_INT_RCV_FIFO_OF 0x00004000
27141 +#define ADSL_INT_XMT_FIFO_UF 0x00008000
27142 +#define ADSL_INT_RCV 0x00010000
27143 +#define ADSL_INT_XMT 0x01000000
27147 + uint32 xmtcontrol_intr; /* 0x200 */
27148 +#define ADSL_DMA_XMT_EN 0x00000001
27149 +#define ADSL_DMA_XMT_LE 0x00000004
27150 + uint32 xmtaddr_intr;
27151 +#define ADSL_DMA_ADDR_MASK 0xFFFFF000
27152 + uint32 xmtptr_intr;
27153 +#define ADSL_DMA_LAST_DESC_MASK 0x00000FFF
27154 + uint32 xmtstatus_intr;
27155 +#define ADSL_DMA_CURR_DESC_MASK 0x00000FFF
27156 +#define ADSL_DMA_XMT_STATE_MASK 0x0000F000
27157 +#define ADSL_DMA_XMT_STATE_DIS 0x00000000
27158 +#define ADSL_DMA_XMT_STATE_ACT 0x00001000
27159 +#define ADSL_DMA_XMT_STATE_IDLE 0x00002000
27160 +#define ADSL_DMA_XMT_STATE_STOP 0x00003000
27162 +#define ADSL_DMA_XMT_ERR_MASK 0x000F0000
27163 +#define ADSL_DMA_XMT_ERR_NONE 0x00000000
27164 +#define ADSL_DMA_XMT_ERR_DPE 0x00010000
27165 +#define ADSL_DMA_XMT_ERR_FIFO 0x00020000
27166 +#define ADSL_DMA_XMT_ERR_DTE 0x00030000
27167 +#define ADSL_DMA_XMT_ERR_DRE 0x00040000
27169 + uint32 rcvcontrol_intr;
27170 +#define ADSL_DMA_RCV_EN 0x00000001
27171 +#define ADSL_DMA_RCV_FO 0x000000FE
27172 + uint32 rcvaddr_intr;
27173 + uint32 rcvptr_intr;
27174 + uint32 rcvstatus_intr;
27175 +#define ADSL_DMA_RCV_STATE_MASK 0x0000F000
27176 +#define ADSL_DMA_RCV_STATE_DIS 0x00000000
27177 +#define ADSL_DMA_RCV_STATE_ACT 0x00001000
27178 +#define ADSL_DMA_RCV_STATE_IDLE 0x00002000
27179 +#define ADSL_DMA_RCV_STATE_STOP 0x00003000
27181 +#define ADSL_DMA_RCV_ERR_MASK 0x000F0000
27182 +#define ADSL_DMA_RCV_ERR_NONE 0x00000000
27183 +#define ADSL_DMA_RCV_ERR_DPE 0x00010000
27184 +#define ADSL_DMA_RCV_ERR_FIFO 0x00020000
27185 +#define ADSL_DMA_RCV_ERR_DTE 0x00030000
27186 +#define ADSL_DMA_RCV_ERR_DRE 0x00040000
27188 + uint32 xmtcontrol_fast;
27189 + uint32 xmtaddr_fast;
27190 + uint32 xmtptr_fast;
27191 + uint32 xmtstatus_fast;
27192 + uint32 rcvcontrol_fast;
27193 + uint32 rcvaddr_fast;
27194 + uint32 rcvptr_fast;
27195 + uint32 rcvstatus_fast;
27198 + uint32 host_message; /* 0x300 */
27200 + uint32 core_reset;
27201 + uint32 core_error;
27202 + uint32 core_revision;
27204 +#define ADSL_CORE_REV 0x0000000F
27205 +#define ADSL_CORE_TYPE 0x0000FFF0
27208 +#define ADSL ((volatile AdslRegisters * const) ADSL_BASE)
27216 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/6348_common.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/6348_common.h
27217 --- linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/6348_common.h 1970-01-01 01:00:00.000000000 +0100
27218 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/6348_common.h 2006-06-26 09:07:10.000000000 +0200
27221 +<:copyright-broadcom
27223 + Copyright (c) 2002 Broadcom Corporation
27224 + All Rights Reserved
27225 + No portions of this material may be reproduced in any form without the
27226 + written permission of:
27227 + Broadcom Corporation
27228 + 16215 Alton Parkway
27229 + Irvine, California 92619
27230 + All information contained in this document is Broadcom Corporation
27231 + company private, proprietary, and trade secret.
27235 +/***********************************************************************/
27237 +/* MODULE: 6348_common.h */
27238 +/* DATE: 04/12/19 */
27239 +/* PURPOSE: Define addresses of major hardware components of */
27242 +/***********************************************************************/
27243 +#ifndef __BCM6348_MAP_COMMON_H
27244 +#define __BCM6348_MAP_COMMON_H
27250 +#define PERF_BASE 0xfffe0000 /* chip control registers */
27251 +#define BB_BASE 0xfffe0100 /* bus bridge registers */
27252 +#define TIMR_BASE 0xfffe0200 /* timer registers */
27253 +#define UART_BASE 0xfffe0300 /* uart registers */
27254 +#define GPIO_BASE 0xfffe0400 /* gpio registers */
27255 +#define SPI_BASE 0xfffe0c00 /* SPI master controller registers */
27257 +#define USB_CTL_BASE 0xfffe1000 /* USB control registers */
27258 +#define USB_DMA_BASE 0xfffe1400 /* USB DMA control registers */
27259 +#define USB_HOST_BASE 0xfffe1b00 /* USB host registers */
27261 +#define MPI_BASE 0xfffe2000 /* MPI control registers */
27262 +#define SDRAM_BASE 0xfffe2300 /* SDRAM control registers */
27264 +#define ADSL_BASE 0xfffe3000 /* ADSL core control registers */
27265 +#define ATM_BASE 0xfffe4000 /* ATM SAR control registers */
27266 +#define UBUS_BASE 0xfffe5000 /* UBUS status registers */
27267 +#define EMAC1_BASE 0xfffe6000 /* EMAC1 control registers */
27268 +#define EMAC2_BASE 0xfffe6800 /* EMAC2 control registers */
27269 +#define EMAC_DMA_BASE 0xfffe7000 /* EMAC DMA control registers */
27272 +#####################################################################
27273 +# System PLL Control Register
27274 +#####################################################################
27276 +#define SYSPLLCFG 0x08
27278 +#define M_MPI_MASK 0x00000018 // 4:3
27279 +#define M_MPI_SHFT 3
27280 +#define M_MPI_50MHZ 0
27281 +#define M_MPI_40MHZ 1
27282 +#define M_MPI_33MHZ 2
27283 +#define M_MPI_25MHZ 3
27285 +#define M_UTO_MASK 0x00000002 // 1:1
27286 +#define M_UTO_SHFT 1
27288 +#define SOFT_RESET 0x00000001
27290 +#define PLL_STRAP_VALUE 0x34
27293 +#####################################################################
27294 +# SDRAM Control Registers
27295 +#####################################################################
27297 +#define SDR_INIT_CTL 0x00
27298 + /* Control Bits */
27299 +#define SDR_PFEN1 (1<<16)
27300 +#define SDR_PFEN0 (1<<15)
27301 +#define SDR_EMPRS (1<<14)
27302 +#define SDR_2_BANKS (1<<13)
27303 +#define SDR_1_BANK (0<<13)
27304 +#define SDR_CS1_EN (1<<12)
27305 +#define SDR_PEND (1<<11)
27306 +#define SDR_32_BIT (1<<10)
27307 +#define SDR_POWER_DOWN (1<<9)
27308 +#define SDR_SELF_REFRESH (1<<8)
27309 +#define SDR_11_COLS (3<<6)
27310 +#define SDR_10_COLS (2<<6)
27311 +#define SDR_9_COLS (1<<6)
27312 +#define SDR_8_COLS (0<<6)
27313 +#define SDR_13_ROWS (2<<4)
27314 +#define SDR_12_ROWS (1<<4)
27315 +#define SDR_11_ROWS (0<<4)
27316 +#define SDR_MASTER_EN (1<<3)
27317 +#define SDR_MRS_CMD (1<<2)
27318 +#define SDR_PRE_CMD (1<<1)
27319 +#define SDR_CBR_CMD (1<<0)
27321 +#define SDR_CFG_REG 0x04
27322 + /* Control Bits */
27323 +#define SDR_FULL_PG 0
27324 +#define SDR_BURST8 1
27325 +#define SDR_BURST4 2
27326 +#define SDR_BURST2 3
27327 +#define SDR_FAST_MEM (1<<2)
27328 +#define SDR_SLOW_MEM (0<<2)
27330 +#define SDR_REF_CTL 0x0C
27331 + /* Control Bits */
27332 +#define SDR_REF_EN (1<<15)
27335 + /* Control Bits */
27336 +#define SDR_EN_PRIOR (1<<31)
27340 +#####################################################################
27341 +# MPI Control Registers
27342 +#####################################################################
27344 +#define CS0BASE 0x00
27345 +#define CS0CNTL 0x04
27348 +# CSxBASE settings
27349 +# Size in low 4 bits
27350 +# Base Address for match in upper 24 bits
27352 +#define EBI_SIZE_8K 0
27353 +#define EBI_SIZE_16K 1
27354 +#define EBI_SIZE_32K 2
27355 +#define EBI_SIZE_64K 3
27356 +#define EBI_SIZE_128K 4
27357 +#define EBI_SIZE_256K 5
27358 +#define EBI_SIZE_512K 6
27359 +#define EBI_SIZE_1M 7
27360 +#define EBI_SIZE_2M 8
27361 +#define EBI_SIZE_4M 9
27362 +#define EBI_SIZE_8M 10
27363 +#define EBI_SIZE_16M 11
27364 +#define EBI_SIZE_32M 12
27365 +#define EBI_SIZE_64M 13
27366 +#define EBI_SIZE_128M 14
27367 +#define EBI_SIZE_256M 15
27369 +/* CSxCNTL settings */
27370 +#define EBI_ENABLE 0x00000001 /* .. enable this range */
27371 +#define EBI_WAIT_STATES 0x0000000e /* .. mask for wait states */
27372 +#define ZEROWT 0x00000000 /* .. 0 WS */
27373 +#define ONEWT 0x00000002 /* .. 1 WS */
27374 +#define TWOWT 0x00000004 /* .. 2 WS */
27375 +#define THREEWT 0x00000006 /* .. 3 WS */
27376 +#define FOURWT 0x00000008 /* .. 4 WS */
27377 +#define FIVEWT 0x0000000a /* .. 5 WS */
27378 +#define SIXWT 0x0000000c /* .. 6 WS */
27379 +#define SEVENWT 0x0000000e /* .. 7 WS */
27380 +#define EBI_WORD_WIDE 0x00000010 /* .. 16-bit peripheral, else 8 */
27381 +#define EBI_POLARITY 0x00000040 /* .. set to invert chip select polarity */
27382 +#define EBI_TS_TA_MODE 0x00000080 /* .. use TS/TA mode */
27383 +#define EBI_TS_SEL 0x00000100 /* .. drive tsize, not bs_b */
27384 +#define EBI_FIFO 0x00000200 /* .. enable fifo */
27385 +#define EBI_RE 0x00000400 /* .. Reverse Endian */
27388 +#####################################################################
27389 +# UART Control Registers
27390 +#####################################################################
27392 +#define UART0CONTROL 0x01
27393 +#define UART0CONFIG 0x02
27394 +#define UART0RXTIMEOUT 0x03
27395 +#define UART0BAUD 0x04
27396 +#define UART0FIFOCFG 0x0a
27397 +#define UART0INTMASK 0x10
27398 +#define UART0INTSTAT 0x12
27399 +#define UART0DATA 0x17
27401 +#define BRGEN 0x80 /* Control register bit defs */
27404 +#define LOOPBK 0x10
27405 +#define TXPARITYEN 0x08
27406 +#define TXPARITYEVEN 0x04
27407 +#define RXPARITYEN 0x02
27408 +#define RXPARITYEVEN 0x01
27410 +#define XMITBREAK 0x40 /* Config register */
27411 +#define BITS5SYM 0x00
27412 +#define BITS6SYM 0x10
27413 +#define BITS7SYM 0x20
27414 +#define BITS8SYM 0x30
27415 +#define ONESTOP 0x07
27416 +#define TWOSTOP 0x0f
27418 +#define RSTTXFIFOS 0x80 /* Rx Timeout register */
27419 +#define RSTRXFIFOS 0x40
27421 +#define TX4 0x40 /* FIFO config register */
27424 +#define DELTAIP 0x0001 /* Interrupt Status and Mask registers */
27425 +#define TXUNDERR 0x0002
27426 +#define TXOVFERR 0x0004
27427 +#define TXFIFOTHOLD 0x0008
27428 +#define TXREADLATCH 0x0010
27429 +#define TXFIFOEMT 0x0020
27430 +#define RXUNDERR 0x0040
27431 +#define RXOVFERR 0x0080
27432 +#define RXTIMEOUT 0x0100
27433 +#define RXFIFOFULL 0x0200
27434 +#define RXFIFOTHOLD 0x0400
27435 +#define RXFIFONE 0x0800
27436 +#define RXFRAMERR 0x1000
27437 +#define RXPARERR 0x2000
27438 +#define RXBRK 0x4000
27445 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/6348_map.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/6348_map.h
27446 --- linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/6348_map.h 1970-01-01 01:00:00.000000000 +0100
27447 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/6348_map.h 2006-06-26 09:07:10.000000000 +0200
27450 +<:copyright-broadcom
27452 + Copyright (c) 2002 Broadcom Corporation
27453 + All Rights Reserved
27454 + No portions of this material may be reproduced in any form without the
27455 + written permission of:
27456 + Broadcom Corporation
27457 + 16215 Alton Parkway
27458 + Irvine, California 92619
27459 + All information contained in this document is Broadcom Corporation
27460 + company private, proprietary, and trade secret.
27464 +/***********************************************************************/
27466 +/* MODULE: 6348_map.h */
27467 +/* DATE: 11/06/03 */
27468 +/* PURPOSE: Define addresses of major hardware components of */
27471 +/***********************************************************************/
27472 +#ifndef __BCM6348_MAP_H
27473 +#define __BCM6348_MAP_H
27479 +#include "bcmtypes.h"
27480 +#include "6348_common.h"
27481 +#include "6348_intr.h"
27483 +/* macro to convert logical data addresses to physical */
27484 +/* DMA hardware must see physical address */
27485 +#define LtoP( x ) ( (uint32)x & 0x1fffffff )
27486 +#define PtoL( x ) ( LtoP(x) | 0xa0000000 )
27489 +** Interrupt Controller
27491 +typedef struct PerfControl {
27492 + uint32 RevID; /* (00) */
27493 + uint16 testControl; /* (04) */
27494 + uint16 blkEnables; /* (06) */
27496 +#define ADSL_CLK_EN 0x0001
27497 +#define MPI_CLK_EN 0x0002
27498 +#define DRAM_CLK_EN 0x0004
27499 +#define M2M_CLK_EN 0x0008
27500 +#define EMAC_CLK_EN 0x0010
27501 +#define SAR_CLK_EN 0x0020
27502 +#define USBS_CLK_EN 0x0040
27503 +#define USBH_CLK_EN 0x0100
27504 +#define SPI_CLK_EN 0x0200
27506 + uint32 pll_control; /* (08) */
27507 +#define CHIP_SOFT_RESET 0x00000001
27508 +#define MPI_CLK_50MHZ 0x00000000
27509 +#define MPI_CLK_40MHZ 0x00000008
27510 +#define MPI_CLK_33MHZ 0x00000010
27511 +#define MPI_CLK_25MHZ 0x00000018
27512 +#define MPI_CLK_MASK 0x00000018
27514 + uint32 IrqMask; /* (0c) */
27515 + uint32 IrqStatus; /* (10) */
27517 + uint32 ExtIrqCfg;
27518 +#define EI_SENSE_SHFT 0
27519 +#define EI_STATUS_SHFT 5
27520 +#define EI_CLEAR_SHFT 10
27521 +#define EI_MASK_SHFT 15
27522 +#define EI_INSENS_SHFT 20
27523 +#define EI_LEVEL_SHFT 25
27525 + uint32 unused[4]; /* (18) */
27526 + uint32 BlockSoftReset; /* (28) */
27527 +#define BSR_SPI 0x00000001
27528 +#define BSR_EMAC 0x00000004
27529 +#define BSR_USBH 0x00000008
27530 +#define BSR_USBS 0x00000010
27531 +#define BSR_ADSL 0x00000020
27532 +#define BSR_DMAMEM 0x00000040
27533 +#define BSR_SAR 0x00000080
27534 +#define BSR_ACLC 0x00000100
27535 +#define BSR_ADSL_MIPS_PLL 0x00000400
27536 +#define BSR_ALL_BLOCKS \
27537 + (BSR_SPI | BSR_EMAC | BSR_USBH | BSR_USBS | BSR_ADSL | BSR_DMAMEM | \
27538 + BSR_SAR | BSR_ACLC | BSR_ADSL_MIPS_PLL)
27539 + uint32 unused2[2]; /* (2c) */
27540 + uint32 PllStrap; /* (34) */
27541 +#define PLL_N1_SHFT 20
27542 +#define PLL_N1_MASK (7<<PLL_N1_SHFT)
27543 +#define PLL_N2_SHFT 15
27544 +#define PLL_N2_MASK (0x1f<<PLL_N2_SHFT)
27545 +#define PLL_M1_REF_SHFT 12
27546 +#define PLL_M1_REF_MASK (7<<PLL_M1_REF_SHFT)
27547 +#define PLL_M2_REF_SHFT 9
27548 +#define PLL_M2_REF_MASK (7<<PLL_M2_REF_SHFT)
27549 +#define PLL_M1_CPU_SHFT 6
27550 +#define PLL_M1_CPU_MASK (7<<PLL_M1_CPU_SHFT)
27551 +#define PLL_M1_BUS_SHFT 3
27552 +#define PLL_M1_BUS_MASK (7<<PLL_M1_BUS_SHFT)
27553 +#define PLL_M2_BUS_SHFT 0
27554 +#define PLL_M2_BUS_MASK (7<<PLL_M2_BUS_SHFT)
27557 +#define PERF ((volatile PerfControl * const) PERF_BASE)
27560 +** Bus Bridge Registers
27562 +typedef struct BusBridge {
27564 +#define BB_BUSY 0x8000 /* posted operation in progress */
27565 +#define BB_RD_PND 0x4000 /* read pending */
27566 +#define BB_RD_CMPLT 0x2000 /* read complete */
27567 +#define BB_ERROR 0x1000 /* posted write error */
27568 +#define BB_TEA 0x0800 /* transfer aborted */
27569 + uint16 abortTimeoutCnt; /* abort timeout value */
27571 + byte writePostEnable;
27572 +#define BB_POST_TIMR_EN 0x08 /* post writes to timer regs */
27573 +#define BB_POST_GPIO_EN 0x04 /* post writes to gpio regs */
27574 +#define BB_POST_INTC_EN 0x02 /* post writes to interrupt controller regs */
27575 +#define BB_POST_UART_EN 0x01 /* post writes to uart regs */
27577 + uint16 postAddr; /* posted read address (lower half) */
27579 + byte postData; /* posted read data */
27582 +/* register offsets (needed for EBI master access) */
27583 +#define BB_STATUS 0
27584 +#define BB_ABORT_TO_CNT 2
27585 +#define BB_WR_POST_EN 4
27586 +#define BB_RD_POST_ADDR 10
27587 +#define BB_RD_POST_DATA 12
27589 +#define BRIDGE *bridge ((volatile BusBridge * const) BB_BASE)
27594 +typedef struct Timer {
27597 +#define TIMER0EN 0x01
27598 +#define TIMER1EN 0x02
27599 +#define TIMER2EN 0x04
27601 +#define TIMER0 0x01
27602 +#define TIMER1 0x02
27603 +#define TIMER2 0x04
27604 +#define WATCHDOG 0x08
27605 + uint32 TimerCtl0;
27606 + uint32 TimerCtl1;
27607 + uint32 TimerCtl2;
27608 +#define TIMERENABLE 0x80000000
27609 +#define RSTCNTCLR 0x40000000
27610 + uint32 TimerCnt0;
27611 + uint32 TimerCnt1;
27612 + uint32 TimerCnt2;
27613 + uint32 WatchDogDefCount;
27615 + /* Write 0xff00 0x00ff to Start timer
27616 + * Write 0xee00 0x00ee to Stop and re-load default count
27617 + * Read from this register returns current watch dog count
27619 + uint32 WatchDogCtl;
27621 + /* Number of 40-MHz ticks for WD Reset pulse to last */
27622 + uint32 WDResetCount;
27625 +#define TIMER ((volatile Timer * const) TIMR_BASE)
27630 +typedef struct UartChannel {
27633 +#define BRGEN 0x80 /* Control register bit defs */
27636 +#define LOOPBK 0x10
27637 +#define TXPARITYEN 0x08
27638 +#define TXPARITYEVEN 0x04
27639 +#define RXPARITYEN 0x02
27640 +#define RXPARITYEVEN 0x01
27643 +#define XMITBREAK 0x40
27644 +#define BITS5SYM 0x00
27645 +#define BITS6SYM 0x10
27646 +#define BITS7SYM 0x20
27647 +#define BITS8SYM 0x30
27648 +#define ONESTOP 0x07
27649 +#define TWOSTOP 0x0f
27650 + /* 4-LSBS represent STOP bits/char
27651 + * in 1/8 bit-time intervals. Zero
27652 + * represents 1/8 stop bit interval.
27653 + * Fifteen represents 2 stop bits.
27656 +#define RSTTXFIFOS 0x80
27657 +#define RSTRXFIFOS 0x40
27658 + /* 5-bit TimeoutCnt is in low bits of this register.
27659 + * This count represents the number of characters
27660 + * idle times before setting receive Irq when below threshold
27663 + /* When divide SysClk/2/(1+baudword) we should get 32*bit-rate
27666 + byte txf_levl; /* Read-only fifo depth */
27667 + byte rxf_levl; /* Read-only fifo depth */
27668 + byte fifocfg; /* Upper 4-bits are TxThresh, Lower are
27669 + * RxThreshold. Irq can be asserted
27670 + * when rx fifo> thresh, txfifo<thresh
27672 + byte prog_out; /* Set value of DTR (Bit0), RTS (Bit1)
27673 + * if these bits are also enabled to GPIO_o
27675 +#define DTREN 0x01
27676 +#define RTSEN 0x02
27679 + byte DeltaIPEdgeNoSense; /* Low 4-bits, set corr bit to 1 to
27680 + * detect irq on rising AND falling
27681 + * edges for corresponding GPIO_i
27682 + * if enabled (edge insensitive)
27684 + byte DeltaIPConfig_Mask; /* Upper 4 bits: 1 for posedge sense
27685 + * 0 for negedge sense if
27686 + * not configured for edge
27687 + * insensitive (see above)
27688 + * Lower 4 bits: Mask to enable change
27689 + * detection IRQ for corresponding
27692 + byte DeltaIP_SyncIP; /* Upper 4 bits show which bits
27693 + * have changed (may set IRQ).
27694 + * read automatically clears bit
27695 + * Lower 4 bits are actual status
27698 + uint16 intMask; /* Same Bit defs for Mask and status */
27699 + uint16 intStatus;
27700 +#define DELTAIP 0x0001
27701 +#define TXUNDERR 0x0002
27702 +#define TXOVFERR 0x0004
27703 +#define TXFIFOTHOLD 0x0008
27704 +#define TXREADLATCH 0x0010
27705 +#define TXFIFOEMT 0x0020
27706 +#define RXUNDERR 0x0040
27707 +#define RXOVFERR 0x0080
27708 +#define RXTIMEOUT 0x0100
27709 +#define RXFIFOFULL 0x0200
27710 +#define RXFIFOTHOLD 0x0400
27711 +#define RXFIFONE 0x0800
27712 +#define RXFRAMERR 0x1000
27713 +#define RXPARERR 0x2000
27714 +#define RXBRK 0x4000
27717 + uint16 Data; /* Write to TX, Read from RX */
27718 + /* bits 11:8 are BRK,PAR,FRM errors */
27724 +#define UART ((volatile Uart * const) UART_BASE)
27727 +** Gpio Controller
27730 +typedef struct GpioControl {
27731 + uint32 GPIODir_high; /* bits 36:32 */
27732 + uint32 GPIODir; /* bits 31:00 */
27733 + uint32 GPIOio_high; /* bits 36:32 */
27734 + uint32 GPIOio; /* bits 31:00 */
27736 +#define LED3_STROBE 0x08000000
27737 +#define LED2_STROBE 0x04000000
27738 +#define LED1_STROBE 0x02000000
27739 +#define LED0_STROBE 0x01000000
27740 +#define LED_TEST 0x00010000
27741 +#define LED3_DISABLE_LINK_ACT 0x00008000
27742 +#define LED2_DISABLE_LINK_ACT 0x00004000
27743 +#define LED1_DISABLE_LINK_ACT 0x00002000
27744 +#define LED0_DISABLE_LINK_ACT 0x00001000
27745 +#define LED_INTERVAL_SET_MASK 0x00000f00
27746 +#define LED_INTERVAL_SET_320MS 0x00000500
27747 +#define LED_INTERVAL_SET_160MS 0x00000400
27748 +#define LED_INTERVAL_SET_80MS 0x00000300
27749 +#define LED_INTERVAL_SET_40MS 0x00000200
27750 +#define LED_INTERVAL_SET_20MS 0x00000100
27751 +#define LED3_ON 0x00000080
27752 +#define LED2_ON 0x00000040
27753 +#define LED1_ON 0x00000020
27754 +#define LED0_ON 0x00000010
27755 +#define LED3_ENABLE 0x00000008
27756 +#define LED2_ENABLE 0x00000004
27757 +#define LED1_ENABLE 0x00000002
27758 +#define LED0_ENABLE 0x00000001
27759 + uint32 SpiSlaveCfg;
27760 +#define SPI_SLAVE_RESET 0x00010000
27761 +#define SPI_RESTRICT 0x00000400
27762 +#define SPI_DELAY_DISABLE 0x00000200
27763 +#define SPI_PROBE_MUX_SEL_MASK 0x000001e0
27764 +#define SPI_SER_ADDR_CFG_MASK 0x0000000c
27765 +#define SPI_MODE 0x00000001
27767 +#define GROUP4_DIAG 0x00090000
27768 +#define GROUP4_UTOPIA 0x00080000
27769 +#define GROUP4_LEGACY_LED 0x00030000
27770 +#define GROUP4_MII_SNOOP 0x00020000
27771 +#define GROUP4_EXT_EPHY 0x00010000
27772 +#define GROUP3_DIAG 0x00009000
27773 +#define GROUP3_UTOPIA 0x00008000
27774 +#define GROUP3_EXT_MII 0x00007000
27775 +#define GROUP2_DIAG 0x00000900
27776 +#define GROUP2_PCI 0x00000500
27777 +#define GROUP1_DIAG 0x00000090
27778 +#define GROUP1_UTOPIA 0x00000080
27779 +#define GROUP1_SPI_UART 0x00000060
27780 +#define GROUP1_SPI_MASTER 0x00000060
27781 +#define GROUP1_MII_PCCARD 0x00000040
27782 +#define GROUP1_MII_SNOOP 0x00000020
27783 +#define GROUP1_EXT_EPHY 0x00000010
27784 +#define GROUP0_DIAG 0x00000009
27785 +#define GROUP0_EXT_MII 0x00000007
27789 +#define GPIO ((volatile GpioControl * const) GPIO_BASE)
27791 +/* Number to mask conversion macro used for GPIODir and GPIOio */
27792 +#define GPIO_NUM_TOTAL_BITS_MASK 0x3f
27793 +#define GPIO_NUM_MAX_BITS_MASK 0x1f
27794 +#define GPIO_NUM_TO_MASK(X) ( (((X) & GPIO_NUM_TOTAL_BITS_MASK) < 32) ? (1 << ((X) & GPIO_NUM_MAX_BITS_MASK)) : (0) )
27796 +/* Number to mask conversion macro used for GPIODir_high and GPIOio_high */
27797 +#define GPIO_NUM_MAX_BITS_MASK_HIGH 0x07
27798 +#define GPIO_NUM_TO_MASK_HIGH(X) ( (((X) & GPIO_NUM_TOTAL_BITS_MASK) >= 32) ? (1 << ((X-32) & GPIO_NUM_MAX_BITS_MASK_HIGH)) : (0) )
27805 +typedef struct SpiControl {
27806 + uint16 spiCmd; /* (0x0): SPI command */
27807 +#define SPI_CMD_NOOP 0
27808 +#define SPI_CMD_SOFT_RESET 1
27809 +#define SPI_CMD_HARD_RESET 2
27810 +#define SPI_CMD_START_IMMEDIATE 3
27812 +#define SPI_CMD_COMMAND_SHIFT 0
27813 +#define SPI_CMD_DEVICE_ID_SHIFT 4
27814 +#define SPI_CMD_PREPEND_BYTE_CNT_SHIFT 8
27815 +#define SPI_CMD_ONE_BYTE_SHIFT 11
27816 +#define SPI_CMD_ONE_WIRE_SHIFT 12
27817 +#define SPI_DEV_ID_0 0
27818 +#define SPI_DEV_ID_1 1
27819 +#define SPI_DEV_ID_2 2
27820 +#define SPI_DEV_ID_3 3
27822 + byte spiIntStatus; /* (0x2): SPI interrupt status */
27823 + byte spiMaskIntStatus; /* (0x3): SPI masked interrupt status */
27825 + byte spiIntMask; /* (0x4): SPI interrupt mask */
27826 +#define SPI_INTR_CMD_DONE 0x01
27827 +#define SPI_INTR_RX_OVERFLOW 0x02
27828 +#define SPI_INTR_INTR_TX_UNDERFLOW 0x04
27829 +#define SPI_INTR_TX_OVERFLOW 0x08
27830 +#define SPI_INTR_RX_UNDERFLOW 0x10
27831 +#define SPI_INTR_CLEAR_ALL 0x1f
27833 + byte spiStatus; /* (0x5): SPI status */
27834 +#define SPI_RX_EMPTY 0x02
27835 +#define SPI_CMD_BUSY 0x04
27836 +#define SPI_SERIAL_BUSY 0x08
27838 + byte spiClkCfg; /* (0x6): SPI clock configuration */
27839 +#define SPI_CLK_0_391MHZ 1
27840 +#define SPI_CLK_0_781MHZ 2 /* default */
27841 +#define SPI_CLK_1_563MHZ 3
27842 +#define SPI_CLK_3_125MHZ 4
27843 +#define SPI_CLK_6_250MHZ 5
27844 +#define SPI_CLK_12_50MHZ 6
27845 +#define SPI_CLK_MASK 0x07
27846 +#define SPI_SSOFFTIME_MASK 0x38
27847 +#define SPI_SSOFFTIME_SHIFT 3
27848 +#define SPI_BYTE_SWAP 0x80
27850 + byte spiFillByte; /* (0x7): SPI fill byte */
27853 + byte spiMsgTail; /* (0x9): msgtail */
27855 + byte spiRxTail; /* (0xB): rxtail */
27857 + uint32 unused2[13]; /* (0x0c - 0x3c) reserved */
27859 + byte spiMsgCtl; /* (0x40) control byte */
27860 +#define FULL_DUPLEX_RW 0
27861 +#define HALF_DUPLEX_W 1
27862 +#define HALF_DUPLEX_R 2
27863 +#define SPI_MSG_TYPE_SHIFT 6
27864 +#define SPI_BYTE_CNT_SHIFT 0
27865 + byte spiMsgData[63]; /* (0x41 - 0x7f) msg data */
27866 + byte spiRxDataFifo[64]; /* (0x80 - 0xbf) rx data */
27867 + byte unused3[64]; /* (0xc0 - 0xff) reserved */
27870 +#define SPI ((volatile SpiControl * const) SPI_BASE)
27872 +#define IUDMA_MAX_CHANNELS 16
27875 +** DMA Channel Configuration (1 .. 16)
27877 +typedef struct DmaChannelCfg {
27878 + uint32 cfg; /* (00) assorted configuration */
27879 +#define DMA_BURST_HALT 0x00000004 /* idle after finish current memory burst */
27880 +#define DMA_PKT_HALT 0x00000002 /* idle after an EOP flag is detected */
27881 +#define DMA_ENABLE 0x00000001 /* set to enable channel */
27882 + uint32 intStat; /* (04) interrupts control and status */
27883 + uint32 intMask; /* (08) interrupts mask */
27884 +#define DMA_BUFF_DONE 0x00000001 /* buffer done */
27885 +#define DMA_DONE 0x00000002 /* packet xfer complete */
27886 +#define DMA_NO_DESC 0x00000004 /* no valid descriptors */
27887 + uint32 maxBurst; /* (0C) max burst length permitted */
27891 +** DMA State RAM (1 .. 16)
27893 +typedef struct DmaStateRam {
27894 + uint32 baseDescPtr; /* (00) descriptor ring start address */
27895 + uint32 state_data; /* (04) state/bytes done/ring offset */
27896 + uint32 desc_len_status; /* (08) buffer descriptor status and len */
27897 + uint32 desc_base_bufptr; /* (0C) buffer descrpitor current processing */
27903 +typedef struct DmaRegs {
27904 +#define DMA_MASTER_EN 0x00000001
27905 +#define DMA_FLOWC_CH1_EN 0x00000002
27906 +#define DMA_FLOWC_CH3_EN 0x00000004
27907 +#define DMA_NUM_CHS_MASK 0x0f000000
27908 +#define DMA_NUM_CHS_SHIFT 24
27909 +#define DMA_FLOWCTL_MASK 0x30000000
27910 +#define DMA_FLOWCTL_CH1 0x10000000
27911 +#define DMA_FLOWCTL_CH3 0x20000000
27912 +#define DMA_FLOWCTL_SHIFT 28
27913 + uint32 controller_cfg; /* (00) controller configuration */
27915 + // Flow control Ch1
27916 + uint32 flowctl_ch1_thresh_lo; /* (04) EMAC1 RX DMA channel */
27917 + uint32 flowctl_ch1_thresh_hi; /* (08) EMAC1 RX DMA channel */
27918 + uint32 flowctl_ch1_alloc; /* (0C) EMAC1 RX DMA channel */
27919 +#define DMA_BUF_ALLOC_FORCE 0x80000000
27921 + // Flow control Ch3
27922 + uint32 flowctl_ch3_thresh_lo; /* (10) EMAC2 RX DMA channel */
27923 + uint32 flowctl_ch3_thresh_hi; /* (14) EMAC2 RX DMA channel */
27924 + uint32 flowctl_ch3_alloc; /* (18) EMAC2 RX DMA channel */
27929 + // Per channel registers/state ram
27930 + DmaChannelCfg chcfg[IUDMA_MAX_CHANNELS]; /* (100) Channel configuration */
27932 + DmaStateRam s[IUDMA_MAX_CHANNELS];
27933 + uint32 u32[4 * IUDMA_MAX_CHANNELS];
27934 + } stram; /* (200) state ram */
27940 +typedef struct DmaDesc {
27941 + uint16 length; /* in bytes of data in buffer */
27942 +#define DMA_DESC_USEFPM 0x8000
27943 +#define DMA_DESC_MULTICAST 0x4000
27944 +#define DMA_DESC_BUFLENGTH 0x0fff
27945 + uint16 status; /* buffer status */
27946 +#define DMA_OWN 0x8000 /* cleared by DMA, set by SW */
27947 +#define DMA_EOP 0x4000 /* last buffer in packet */
27948 +#define DMA_SOP 0x2000 /* first buffer in packet */
27949 +#define DMA_WRAP 0x1000 /* */
27950 +#define DMA_APPEND_CRC 0x0100
27952 +/* EMAC Descriptor Status definitions */
27953 +#define EMAC_MISS 0x0080 /* framed address recognition failed (promiscuous) */
27954 +#define EMAC_BRDCAST 0x0040 /* DA is Broadcast */
27955 +#define EMAC_MULT 0x0020 /* DA is multicast */
27956 +#define EMAC_LG 0x0010 /* frame length > RX_LENGTH register value */
27957 +#define EMAC_NO 0x0008 /* Non-Octet aligned */
27958 +#define EMAC_RXER 0x0004 /* RX_ERR on MII while RX_DV assereted */
27959 +#define EMAC_CRC_ERROR 0x0002 /* CRC error */
27960 +#define EMAC_OV 0x0001 /* Overflow */
27962 +/* HDLC Descriptor Status definitions */
27963 +#define DMA_HDLC_TX_ABORT 0x0100
27964 +#define DMA_HDLC_RX_OVERRUN 0x4000
27965 +#define DMA_HDLC_RX_TOO_LONG 0x2000
27966 +#define DMA_HDLC_RX_CRC_OK 0x1000
27967 +#define DMA_HDLC_RX_ABORT 0x0100
27969 + uint32 address; /* address of data */
27973 +** Sdram Controller
27975 +typedef struct SdramControllerRegs {
27977 + uint16 initControl; /* 02 */
27978 +#define SD_POWER_DOWN 0x200 /* put sdram into power down */
27979 +#define SD_SELF_REFRESH 0x100 /* enable self refresh mode */
27980 +#define SD_SOFT_RESET 0x080 /* soft reset all sdram controller regs */
27981 +#define SD_EDO_SELECT 0x040 /* select EDO mode */
27982 +#define SD_EDO_WAIT_STATE 0x020 /* add an EDO wait state */
27983 +#define SD_8MEG 0x010 /* map sdram to 8 megs */
27984 +#define SD_MASTER_ENABLE 0x008 /* enable accesses to external sdram */
27985 +#define SD_MRS 0x004 /* generate a mode register select cycle */
27986 +#define SD_PRECHARGE 0x002 /* generate a precharge cycle */
27987 +#define SD_CBR 0x001 /* generate a refresh cycle */
27988 + uint8 unused2[3];
27989 + uint8 config; /* 07 */
27990 +#define SD_FAST_MEM 0x04 /* 1=CAS latency of 2, 0 = CAS latency of 3 */
27991 +#define SD_BURST_LEN 0x03 /* set burst length */
27992 +#define SD_BURST_FULL_PAGE 0x00 /* .. full page */
27993 +#define SD_BURST_8 0x01 /* .. 8 words */
27994 +#define SD_BURST_4 0x02 /* .. 4 words */
27995 +#define SD_BURST_2 0x03 /* .. 2 words */
27997 + uint16 refreshControl; /* 0a */
27998 +#define SD_REFRESH_ENABLE 0x8000 /* refresh enable */
27999 +#define SD_REFRESH_PERIOD 0x00ff /* refresh period (16 x n x clock_period) */
28001 + uint32 memoryBase; /* 0c */
28002 +#define SD_MEMBASE_MASK 0xffffe000 /* base address mask */
28003 +#define SD_MEMSIZE_8MEG 0x00000001 /* memory is 8 meg */
28004 +#define SD_MEMSIZE_2MEG 0x00000001 /* memory is 2 meg */
28006 +} SdramControllerRegs;
28009 +** External Bus Interface
28011 +typedef struct EbiChipSelect {
28012 + uint32 base; /* base address in upper 24 bits */
28013 +#define EBI_SIZE_8K 0
28014 +#define EBI_SIZE_16K 1
28015 +#define EBI_SIZE_32K 2
28016 +#define EBI_SIZE_64K 3
28017 +#define EBI_SIZE_128K 4
28018 +#define EBI_SIZE_256K 5
28019 +#define EBI_SIZE_512K 6
28020 +#define EBI_SIZE_1M 7
28021 +#define EBI_SIZE_2M 8
28022 +#define EBI_SIZE_4M 9
28023 +#define EBI_SIZE_8M 10
28024 +#define EBI_SIZE_16M 11
28025 +#define EBI_SIZE_32M 12
28026 +#define EBI_SIZE_64M 13
28027 +#define EBI_SIZE_128M 14
28028 +#define EBI_SIZE_256M 15
28030 +#define EBI_ENABLE 0x00000001 /* .. enable this range */
28031 +#define EBI_WAIT_STATES 0x0000000e /* .. mask for wait states */
28032 +#define EBI_WTST_SHIFT 1 /* .. for shifting wait states */
28033 +#define EBI_WORD_WIDE 0x00000010 /* .. 16-bit peripheral, else 8 */
28034 +#define EBI_WREN 0x00000020 /* enable posted writes */
28035 +#define EBI_POLARITY 0x00000040 /* .. set to invert something,
28036 + ** don't know what yet */
28037 +#define EBI_TS_TA_MODE 0x00000080 /* .. use TS/TA mode */
28038 +#define EBI_TS_SEL 0x00000100 /* .. drive tsize, not bs_b */
28039 +#define EBI_FIFO 0x00000200 /* .. use fifo */
28040 +#define EBI_RE 0x00000400 /* .. Reverse Endian */
28043 +typedef struct MpiRegisters {
28044 + EbiChipSelect cs[7]; /* size chip select configuration */
28045 +#define EBI_CS0_BASE 0
28046 +#define EBI_CS1_BASE 1
28047 +#define EBI_CS2_BASE 2
28048 +#define EBI_CS3_BASE 3
28049 +#define PCMCIA_COMMON_BASE 4
28050 +#define PCMCIA_ATTRIBUTE_BASE 5
28051 +#define PCMCIA_IO_BASE 6
28052 + uint32 unused0[2]; /* reserved */
28053 + uint32 ebi_control; /* ebi control */
28054 + uint32 unused1[4]; /* reserved */
28055 +#define EBI_ACCESS_TIMEOUT 0x000007FF
28056 + uint32 pcmcia_cntl1; /* pcmcia control 1 */
28057 +#define PCCARD_CARD_RESET 0x00040000
28058 +#define CARDBUS_ENABLE 0x00008000
28059 +#define PCMCIA_ENABLE 0x00004000
28060 +#define PCMCIA_GPIO_ENABLE 0x00002000
28061 +#define CARDBUS_IDSEL 0x00001F00
28062 +#define VS2_OEN 0x00000080
28063 +#define VS1_OEN 0x00000040
28064 +#define VS2_OUT 0x00000020
28065 +#define VS1_OUT 0x00000010
28066 +#define VS2_IN 0x00000008
28067 +#define VS1_IN 0x00000004
28068 +#define CD2_IN 0x00000002
28069 +#define CD1_IN 0x00000001
28070 +#define VS_MASK 0x0000000C
28071 +#define CD_MASK 0x00000003
28072 + uint32 unused2; /* reserved */
28073 + uint32 pcmcia_cntl2; /* pcmcia control 2 */
28074 +#define PCMCIA_BYTESWAP_DIS 0x00000002
28075 +#define PCMCIA_HALFWORD_EN 0x00000001
28076 + uint32 unused3[40]; /* reserved */
28078 + uint32 sp0range; /* PCI to internal system bus address space */
28079 +#define ADDR_SPACE_MASK 0xFFFF0000
28086 + uint32 EndianCfg;
28088 + uint32 l2pcfgctl; /* internal system bus to PCI IO/Cfg control */
28089 +#define DIR_CFG_SEL 0x80000000 /* change from PCI I/O access to PCI config access */
28090 +#define DIR_CFG_USEREG 0x40000000 /* use this register info for PCI configuration access */
28091 +#define DEVICE_NUMBER 0x00007C00 /* device number for the PCI configuration access */
28092 +#define FUNC_NUMBER 0x00000300 /* function number for the PCI configuration access */
28093 +#define REG_NUMBER 0x000000FC /* register number for the PCI configuration access */
28094 +#define CONFIG_TYPE 0x00000003 /* configuration type for the PCI configuration access */
28096 + uint32 l2pmrange1; /* internal system bus to PCI memory space */
28097 +#define PCI_SIZE_64K 0xFFFF0000
28098 +#define PCI_SIZE_128K 0xFFFE0000
28099 +#define PCI_SIZE_256K 0xFFFC0000
28100 +#define PCI_SIZE_512K 0xFFF80000
28101 +#define PCI_SIZE_1M 0xFFF00000
28102 +#define PCI_SIZE_2M 0xFFE00000
28103 +#define PCI_SIZE_4M 0xFFC00000
28104 +#define PCI_SIZE_8M 0xFF800000
28105 +#define PCI_SIZE_16M 0xFF000000
28106 + uint32 l2pmbase1; /* kseg0 or kseg1 address & 0x1FFFFFFF */
28107 + uint32 l2pmremap1;
28108 +#define CARDBUS_MEM 0x00000004
28109 +#define MEM_WINDOW_EN 0x00000001
28110 + uint32 l2pmrange2;
28111 + uint32 l2pmbase2;
28112 + uint32 l2pmremap2;
28113 + uint32 l2piorange; /* internal system bus to PCI I/O space */
28114 + uint32 l2piobase;
28115 + uint32 l2pioremap;
28117 + uint32 pcimodesel;
28118 +#define PCI2_INT_BUS_RD_PREFECH 0x000000F0
28119 +#define PCI_BAR2_NOSWAP 0x00000002 /* BAR at offset 0x20 */
28120 +#define PCI_BAR1_NOSWAP 0x00000001 /* BAR at affset 0x1c */
28122 + uint32 pciintstat; /* PCI interrupt mask/status */
28123 +#define MAILBOX1_SENT 0x08
28124 +#define MAILBOX0_SENT 0x04
28125 +#define MAILBOX1_MSG_RCV 0x02
28126 +#define MAILBOX0_MSG_RCV 0x01
28127 + uint32 locbuscntrl; /* internal system bus control */
28128 +#define DIR_U2P_NOSWAP 0x00000002
28129 +#define EN_PCI_GPIO 0x00000001
28130 + uint32 locintstat; /* internal system bus interrupt mask/status */
28131 +#define CSERR 0x0200
28132 +#define SERR 0x0100
28133 +#define EXT_PCI_INT 0x0080
28134 +#define DIR_FAILED 0x0040
28135 +#define DIR_COMPLETE 0x0020
28136 +#define PCI_CFG 0x0010
28137 + uint32 unused4[7];
28142 + uint32 pcicfgcntrl; /* internal system bus PCI configuration control */
28143 +#define PCI_CFG_REG_WRITE_EN 0x00000080
28144 +#define PCI_CFG_ADDR 0x0000003C
28145 + uint32 pcicfgdata; /* internal system bus PCI configuration data */
28147 + uint32 locch2ctl; /* PCI to interrnal system bus DMA (downstream) local control */
28148 +#define MPI_DMA_HALT 0x00000008 /* idle after finish current memory burst */
28149 +#define MPI_DMA_PKT_HALT 0x00000004 /* idle after an EOP flag is detected */
28150 +#define MPI_DMA_STALL 0x00000002 /* idle after an EOP flag is detected */
28151 +#define MPI_DMA_ENABLE 0x00000001 /* set to enable channel */
28152 + uint32 locch2intStat;
28153 +#define MPI_DMA_NO_DESC 0x00000004 /* no valid descriptors */
28154 +#define MPI_DMA_DONE 0x00000002 /* packet xfer complete */
28155 +#define MPI_DMA_BUFF_DONE 0x00000001 /* buffer done */
28156 + uint32 locch2intMask;
28158 + uint32 locch2descaddr;
28159 + uint32 locch2status1;
28160 +#define LOCAL_DESC_STATE 0xE0000000
28161 +#define PCI_DESC_STATE 0x1C000000
28162 +#define BYTE_DONE 0x03FFC000
28163 +#define RING_ADDR 0x00003FFF
28164 + uint32 locch2status2;
28165 +#define BUFPTR_OFFSET 0x1FFF0000
28166 +#define PCI_MASTER_STATE 0x000000C0
28167 +#define LOC_MASTER_STATE 0x00000038
28168 +#define CONTROL_STATE 0x00000007
28171 + uint32 locch1Ctl; /*internal system bus to PCI DMA (upstream) local control */
28172 +#define DMA_U2P_LE 0x00000200 /* local bus is little endian */
28173 +#define DMA_U2P_NOSWAP 0x00000100 /* lccal bus is little endian but no data swapped */
28174 + uint32 locch1intstat;
28175 + uint32 locch1intmask;
28177 + uint32 locch1descaddr;
28178 + uint32 locch1status1;
28179 + uint32 locch1status2;
28182 + uint32 pcich1ctl; /* internal system bus to PCI DMA PCI control */
28183 + uint32 pcich1intstat;
28184 + uint32 pcich1intmask;
28185 + uint32 pcich1descaddr;
28186 + uint32 pcich1status1;
28187 + uint32 pcich1status2;
28189 + uint32 pcich2Ctl; /* PCI to internal system bus DMA PCI control */
28190 + uint32 pcich2intstat;
28191 + uint32 pcich2intmask;
28192 + uint32 pcich2descaddr;
28193 + uint32 pcich2status1;
28194 + uint32 pcich2status2;
28196 + uint32 perm_id; /* permanent device and vendor id */
28197 + uint32 perm_rev; /* permanent revision id */
28200 +#define MPI ((volatile MpiRegisters * const) MPI_BASE)
28202 +/* PCI configuration address space start offset 0x40 */
28203 +#define BRCM_PCI_CONFIG_TIMER 0x40
28204 +#define BRCM_PCI_CONFIG_TIMER_RETRY_MASK 0x0000FF00
28205 +#define BRCM_PCI_CONFIG_TIMER_TRDY_MASK 0x000000FF
28208 +** EMAC transmit MIB counters
28210 +typedef struct EmacTxMib {
28211 + uint32 tx_good_octets; /* (200) good byte count */
28212 + uint32 tx_good_pkts; /* (204) good pkt count */
28213 + uint32 tx_octets; /* (208) good and bad byte count */
28214 + uint32 tx_pkts; /* (20c) good and bad pkt count */
28215 + uint32 tx_broadcasts_pkts; /* (210) good broadcast packets */
28216 + uint32 tx_multicasts_pkts; /* (214) good mulitcast packets */
28217 + uint32 tx_len_64; /* (218) RMON tx pkt size buckets */
28218 + uint32 tx_len_65_to_127; /* (21c) */
28219 + uint32 tx_len_128_to_255; /* (220) */
28220 + uint32 tx_len_256_to_511; /* (224) */
28221 + uint32 tx_len_512_to_1023; /* (228) */
28222 + uint32 tx_len_1024_to_max; /* (22c) */
28223 + uint32 tx_jabber_pkts; /* (230) > 1518 with bad crc */
28224 + uint32 tx_oversize_pkts; /* (234) > 1518 with good crc */
28225 + uint32 tx_fragment_pkts; /* (238) < 63 with bad crc */
28226 + uint32 tx_underruns; /* (23c) fifo underrun */
28227 + uint32 tx_total_cols; /* (240) total collisions in all tx pkts */
28228 + uint32 tx_single_cols; /* (244) tx pkts with single collisions */
28229 + uint32 tx_multiple_cols; /* (248) tx pkts with multiple collisions */
28230 + uint32 tx_excessive_cols; /* (24c) tx pkts with excessive cols */
28231 + uint32 tx_late_cols; /* (250) tx pkts with late cols */
28232 + uint32 tx_defered; /* (254) tx pkts deferred */
28233 + uint32 tx_carrier_lost; /* (258) tx pkts with CRS lost */
28234 + uint32 tx_pause_pkts; /* (25c) tx pause pkts sent */
28235 +#define NumEmacTxMibVars 24
28239 +** EMAC receive MIB counters
28241 +typedef struct EmacRxMib {
28242 + uint32 rx_good_octets; /* (280) good byte count */
28243 + uint32 rx_good_pkts; /* (284) good pkt count */
28244 + uint32 rx_octets; /* (288) good and bad byte count */
28245 + uint32 rx_pkts; /* (28c) good and bad pkt count */
28246 + uint32 rx_broadcasts_pkts; /* (290) good broadcast packets */
28247 + uint32 rx_multicasts_pkts; /* (294) good mulitcast packets */
28248 + uint32 rx_len_64; /* (298) RMON rx pkt size buckets */
28249 + uint32 rx_len_65_to_127; /* (29c) */
28250 + uint32 rx_len_128_to_255; /* (2a0) */
28251 + uint32 rx_len_256_to_511; /* (2a4) */
28252 + uint32 rx_len_512_to_1023; /* (2a8) */
28253 + uint32 rx_len_1024_to_max; /* (2ac) */
28254 + uint32 rx_jabber_pkts; /* (2b0) > 1518 with bad crc */
28255 + uint32 rx_oversize_pkts; /* (2b4) > 1518 with good crc */
28256 + uint32 rx_fragment_pkts; /* (2b8) < 63 with bad crc */
28257 + uint32 rx_missed_pkts; /* (2bc) missed packets */
28258 + uint32 rx_crc_align_errs; /* (2c0) both or either */
28259 + uint32 rx_undersize; /* (2c4) < 63 with good crc */
28260 + uint32 rx_crc_errs; /* (2c8) crc errors (only) */
28261 + uint32 rx_align_errs; /* (2cc) alignment errors (only) */
28262 + uint32 rx_symbol_errs; /* (2d0) pkts with RXERR assertions (symbol errs) */
28263 + uint32 rx_pause_pkts; /* (2d4) MAC control, PAUSE */
28264 + uint32 rx_nonpause_pkts; /* (2d8) MAC control, not PAUSE */
28265 +#define NumEmacRxMibVars 23
28268 +typedef struct EmacRegisters {
28269 + uint32 rxControl; /* (00) receive control */
28270 +#define EMAC_PM_REJ 0x80 /* - reject DA match in PMx regs */
28271 +#define EMAC_UNIFLOW 0x40 /* - accept cam match fc */
28272 +#define EMAC_FC_EN 0x20 /* - enable flow control */
28273 +#define EMAC_LOOPBACK 0x10 /* - loopback */
28274 +#define EMAC_PROM 0x08 /* - promiscuous */
28275 +#define EMAC_RDT 0x04 /* - ignore transmissions */
28276 +#define EMAC_ALL_MCAST 0x02 /* - ignore transmissions */
28277 +#define EMAC_NO_BCAST 0x01 /* - ignore transmissions */
28280 + uint32 rxMaxLength; /* (04) receive max length */
28281 + uint32 txMaxLength; /* (08) transmit max length */
28282 + uint32 unused1[1];
28283 + uint32 mdioFreq; /* (10) mdio frequency */
28284 +#define EMAC_MII_PRE_EN 0x00000080 /* prepend preamble sequence */
28285 +#define EMAC_MDIO_PRE 0x00000080 /* - enable MDIO preamble */
28286 +#define EMAC_MDC_FREQ 0x0000007f /* - mdio frequency */
28288 + uint32 mdioData; /* (14) mdio data */
28289 +#define MDIO_WR 0x50020000 /* - write framing */
28290 +#define MDIO_RD 0x60020000 /* - read framing */
28291 +#define MDIO_PMD_SHIFT 23
28292 +#define MDIO_REG_SHIFT 18
28294 + uint32 intMask; /* (18) int mask */
28295 + uint32 intStatus; /* (1c) int status */
28296 +#define EMAC_FLOW_INT 0x04 /* - flow control event */
28297 +#define EMAC_MIB_INT 0x02 /* - mib event */
28298 +#define EMAC_MDIO_INT 0x01 /* - mdio event */
28300 + uint32 unused2[3];
28301 + uint32 config; /* (2c) config */
28302 +#define EMAC_ENABLE 0x001 /* - enable emac */
28303 +#define EMAC_DISABLE 0x002 /* - disable emac */
28304 +#define EMAC_SOFT_RST 0x004 /* - soft reset */
28305 +#define EMAC_SOFT_RESET 0x004 /* - emac soft reset */
28306 +#define EMAC_EXT_PHY 0x008 /* - external PHY select */
28308 + uint32 txControl; /* (30) transmit control */
28309 +#define EMAC_FD 0x001 /* - full duplex */
28310 +#define EMAC_FLOWMODE 0x002 /* - flow mode */
28311 +#define EMAC_NOBKOFF 0x004 /* - no backoff in */
28312 +#define EMAC_SMALLSLT 0x008 /* - small slot time */
28314 + uint32 txThreshold; /* (34) transmit threshold */
28315 + uint32 mibControl; /* (38) mib control */
28316 +#define EMAC_NO_CLEAR 0x001 /* don't clear on read */
28318 + uint32 unused3[7];
28320 + uint32 pm0DataLo; /* (58) perfect match 0 data lo */
28321 + uint32 pm0DataHi; /* (5C) perfect match 0 data hi (15:0) */
28322 + uint32 pm1DataLo; /* (60) perfect match 1 data lo */
28323 + uint32 pm1DataHi; /* (64) perfect match 1 data hi (15:0) */
28324 + uint32 pm2DataLo; /* (68) perfect match 2 data lo */
28325 + uint32 pm2DataHi; /* (6C) perfect match 2 data hi (15:0) */
28326 + uint32 pm3DataLo; /* (70) perfect match 3 data lo */
28327 + uint32 pm3DataHi; /* (74) perfect match 3 data hi (15:0) */
28328 +#define EMAC_CAM_V 0x10000 /* - cam index */
28329 +#define EMAC_CAM_VALID 0x00010000
28331 + uint32 unused4[98]; /* (78-1fc) */
28333 + EmacTxMib tx_mib; /* (200) emac tx mib */
28334 + uint32 unused5[8]; /* (260-27c) */
28336 + EmacRxMib rx_mib; /* (280) rx mib */
28340 +/* register offsets for subrouting access */
28341 +#define EMAC_RX_CONTROL 0x00
28342 +#define EMAC_RX_MAX_LENGTH 0x04
28343 +#define EMAC_TX_MAC_LENGTH 0x08
28344 +#define EMAC_MDIO_FREQ 0x10
28345 +#define EMAC_MDIO_DATA 0x14
28346 +#define EMAC_INT_MASK 0x18
28347 +#define EMAC_INT_STATUS 0x1C
28348 +#define EMAC_CAM_DATA_LO 0x20
28349 +#define EMAC_CAM_DATA_HI 0x24
28350 +#define EMAC_CAM_CONTROL 0x28
28351 +#define EMAC_CONTROL 0x2C
28352 +#define EMAC_TX_CONTROL 0x30
28353 +#define EMAC_TX_THRESHOLD 0x34
28354 +#define EMAC_MIB_CONTROL 0x38
28357 +#define EMAC1 ((volatile EmacRegisters * const) EMAC1_BASE)
28358 +#define EMAC2 ((volatile EmacRegisters * const) EMAC2_BASE)
28363 +typedef struct UsbRegisters {
28364 + byte inttf_setting;
28365 + byte current_config;
28366 + uint16 status_frameNum;
28367 +#define USB_LINK 0x2000
28368 +#define USB_BUS_RESET 0x1000
28369 +#define USB_SUSPENDED 0x0800
28373 + byte endpt_status;
28374 +#define USB_ENDPOINT_0 0x01
28375 +#define USB_ENDPOINT_1 0x02
28376 +#define USB_ENDPOINT_2 0x04
28377 +#define USB_ENDPOINT_3 0x08
28378 +#define USB_ENDPOINT_4 0x10
28379 +#define USB_ENDPOINT_5 0x20
28380 +#define USB_ENDPOINT_6 0x40
28381 +#define USB_ENDPOINT_7 0x80
28383 + byte conf_mem_ctl;
28384 +#define USB_CONF_MEM_RD 0x80
28385 +#define USB_CONF_MEM_RDY 0x40
28387 + byte conf_mem_read_address;
28388 + byte conf_mem_write_address;
28391 + byte dev_req_bytesel;
28392 + uint16 ext_dev_data;
28396 + byte endpt_stall_reset; // use same endpoint #'s from above
28398 +#define USB_FORCE_ERR 0x20
28399 +#define USB_SOFT_RESET 0x10
28400 +#define USB_RESUME 0x08
28401 +#define USB_COMMAND_ERR 0x04
28402 +#define USB_COMMAND_OVER 0x02
28404 + byte iso_out_in_addr;
28405 + byte blk_out_in_addr;
28407 + uint32 unusedx[2];
28408 + uint32 tx_ram_write_port;
28409 + uint32 fifo_status; // (see bcm6348 data sheet for definition)
28411 + uint32 irq_status;
28413 +#define USB_NEW_CONFIG 0x00000001
28414 +#define USB_SETUP_COMMAND_RECV 0x00000002 // non-standard setup cmd rcvd
28415 +#define USB_OUT_FIFO_OV 0x00000004
28416 +#define USB_RESET_RECV 0x00000008
28417 +#define USB_SUSPEND_RECV 0x00000010
28418 +#define USB_FIFO_REWIND 0x00000020
28419 +#define USB_RX_BULK_FIFO_DATA_AVAIL 0x00000040
28420 +#define USB_RX_ISO_FIFO_DATA_AVAIL 0x00000080
28421 +#define USB_LINK_CHANGE 0x00010000
28422 + uint32 endpt_cntl;
28423 +#define USB_R_WK_EN 0x0100
28424 +#define USB_TX_EOP 0x0200
28425 +#define USB_TX_CNTL_DMA_EN 0x0400
28426 +#define USB_TX_BULK_DMA_EN 0x0800
28427 +#define USB_TX_ISO_DMA_EN 0x1000
28428 +#define USB_RX_CNTL_DMA_EN 0x2000
28429 +#define USB_RX_BULK_DMA_EN 0x4800
28430 +#define USB_RX_ISO_DMA_EN 0x8000
28431 + uint32 rx_status_read_port;
28432 + uint32 confmem_read_port;
28433 + uint32 confmem_write_port;
28434 + uint32 fifo_ovf_count;
28435 + uint32 fifo_rewind_cnt;
28436 + uint32 terminal_count;
28439 +#define USB ((volatile UsbRegisters * const) USB_CTL_BASE)
28442 +** ADSL core Registers
28445 +#define _PADLINE(line) pad ## line
28446 +#define _XSTR(line) _PADLINE(line)
28447 +#define PAD _XSTR(__LINE__)
28449 +typedef struct AdslRegisters {
28450 + uint32 core_control;
28451 +#define ADSL_RESET 0x01
28453 + uint32 core_status;
28454 +#define ADSL_HOST_MSG 0x01
28457 + uint32 bist_status;
28459 + uint32 int_status_i; /* 0x20 */
28460 + uint32 int_mask_i;
28461 + uint32 int_status_f;
28462 + uint32 int_mask_f;
28463 +#define ADSL_INT_HOST_MSG 0x00000020
28464 +#define ADSL_INT_DESC_ERR 0x00000400
28465 +#define ADSL_INT_DATA_ERR 0x00000800
28466 +#define ADSL_INT_DESC_PROTO_ERR 0x00001000
28467 +#define ADSL_INT_RCV_DESC_UF 0x00002000
28468 +#define ADSL_INT_RCV_FIFO_OF 0x00004000
28469 +#define ADSL_INT_XMT_FIFO_UF 0x00008000
28470 +#define ADSL_INT_RCV 0x00010000
28471 +#define ADSL_INT_XMT 0x01000000
28475 + uint32 xmtcontrol_intr; /* 0x200 */
28476 +#define ADSL_DMA_XMT_EN 0x00000001
28477 +#define ADSL_DMA_XMT_LE 0x00000004
28478 + uint32 xmtaddr_intr;
28479 +#define ADSL_DMA_ADDR_MASK 0xFFFFF000
28480 + uint32 xmtptr_intr;
28481 +#define ADSL_DMA_LAST_DESC_MASK 0x00000FFF
28482 + uint32 xmtstatus_intr;
28483 +#define ADSL_DMA_CURR_DESC_MASK 0x00000FFF
28484 +#define ADSL_DMA_XMT_STATE_MASK 0x0000F000
28485 +#define ADSL_DMA_XMT_STATE_DIS 0x00000000
28486 +#define ADSL_DMA_XMT_STATE_ACT 0x00001000
28487 +#define ADSL_DMA_XMT_STATE_IDLE 0x00002000
28488 +#define ADSL_DMA_XMT_STATE_STOP 0x00003000
28490 +#define ADSL_DMA_XMT_ERR_MASK 0x000F0000
28491 +#define ADSL_DMA_XMT_ERR_NONE 0x00000000
28492 +#define ADSL_DMA_XMT_ERR_DPE 0x00010000
28493 +#define ADSL_DMA_XMT_ERR_FIFO 0x00020000
28494 +#define ADSL_DMA_XMT_ERR_DTE 0x00030000
28495 +#define ADSL_DMA_XMT_ERR_DRE 0x00040000
28497 + uint32 rcvcontrol_intr;
28498 +#define ADSL_DMA_RCV_EN 0x00000001
28499 +#define ADSL_DMA_RCV_FO 0x000000FE
28500 + uint32 rcvaddr_intr;
28501 + uint32 rcvptr_intr;
28502 + uint32 rcvstatus_intr;
28503 +#define ADSL_DMA_RCV_STATE_MASK 0x0000F000
28504 +#define ADSL_DMA_RCV_STATE_DIS 0x00000000
28505 +#define ADSL_DMA_RCV_STATE_ACT 0x00001000
28506 +#define ADSL_DMA_RCV_STATE_IDLE 0x00002000
28507 +#define ADSL_DMA_RCV_STATE_STOP 0x00003000
28509 +#define ADSL_DMA_RCV_ERR_MASK 0x000F0000
28510 +#define ADSL_DMA_RCV_ERR_NONE 0x00000000
28511 +#define ADSL_DMA_RCV_ERR_DPE 0x00010000
28512 +#define ADSL_DMA_RCV_ERR_FIFO 0x00020000
28513 +#define ADSL_DMA_RCV_ERR_DTE 0x00030000
28514 +#define ADSL_DMA_RCV_ERR_DRE 0x00040000
28516 + uint32 xmtcontrol_fast;
28517 + uint32 xmtaddr_fast;
28518 + uint32 xmtptr_fast;
28519 + uint32 xmtstatus_fast;
28520 + uint32 rcvcontrol_fast;
28521 + uint32 rcvaddr_fast;
28522 + uint32 rcvptr_fast;
28523 + uint32 rcvstatus_fast;
28526 + uint32 host_message; /* 0x300 */
28528 + uint32 core_reset;
28529 + uint32 core_error;
28530 + uint32 core_revision;
28532 +#define ADSL_CORE_REV 0x0000000F
28533 +#define ADSL_CORE_TYPE 0x0000FFF0
28536 +#define ADSL ((volatile AdslRegisters * const) ADSL_BASE)
28544 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/AdslMibDef.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/AdslMibDef.h
28545 --- linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/AdslMibDef.h 1970-01-01 01:00:00.000000000 +0100
28546 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/AdslMibDef.h 2006-06-26 09:07:10.000000000 +0200
28549 +<:copyright-broadcom
28551 + Copyright (c) 2002 Broadcom Corporation
28552 + All Rights Reserved
28553 + No portions of this material may be reproduced in any form without the
28554 + written permission of:
28555 + Broadcom Corporation
28556 + 16215 Alton Parkway
28557 + Irvine, California 92619
28558 + All information contained in this document is Broadcom Corporation
28559 + company private, proprietary, and trade secret.
28563 +/****************************************************************************
28568 + * SNMP object identifiers for ADSL MIB and other related MIBs
28570 + * Copyright (c) 1993-1998 AltoCom, Inc. All rights reserved.
28571 + * Authors: Ilya Stomakhin
28573 + * $Revision: 1.17 $
28575 + * $Id: AdslMibDef.h,v 1.17 2004/07/27 19:24:40 ilyas Exp $
28577 + * $Log: AdslMibDef.h,v $
28578 + * Revision 1.17 2004/07/27 19:24:40 ilyas
28579 + * Added AnnexM configuration option
28581 + * Revision 1.16 2004/06/04 18:56:01 ilyas
28582 + * Added counter for ADSL2 framing and performance
28584 + * Revision 1.15 2004/05/25 16:15:04 ilyas
28585 + * Added ADSL2 framing status
28587 + * Revision 1.14 2004/03/31 19:09:48 ilyas
28588 + * Added ADSL2+ modulation control
28590 + * Revision 1.13 2004/03/03 20:14:05 ilyas
28591 + * Merged changes for ADSL2+ from ADSL driver
28593 + * Revision 1.12 2003/10/17 21:02:12 ilyas
28594 + * Added more data for ADSL2
28596 + * Revision 1.11 2003/10/14 00:55:27 ilyas
28597 + * Added UAS, LOSS, SES error seconds counters.
28598 + * Support for 512 tones (AnnexI)
28600 + * Revision 1.10 2003/09/29 18:39:51 ilyas
28601 + * Added new definitions for AnnexI
28603 + * Revision 1.9 2003/07/18 19:14:34 ilyas
28604 + * Merged with ADSL driver
28606 + * Revision 1.8 2003/07/08 18:34:16 ilyas
28607 + * Added fields to adsl configuration structure
28609 + * Revision 1.7 2003/03/25 00:07:00 ilyas
28610 + * Added "long" BERT supprt
28612 + * Revision 1.6 2003/02/27 07:10:52 ilyas
28613 + * Added more configuration and status parameters (for EFNT)
28615 + * Revision 1.5 2003/01/23 20:29:37 ilyas
28616 + * Added structure for ADSL PHY configuration command
28618 + * Revision 1.4 2002/11/13 21:32:49 ilyas
28619 + * Added adjustK support for Centillium non-standard framing mode
28621 + * Revision 1.3 2002/10/31 01:35:50 ilyas
28622 + * Fixed size of K for S=1/2
28624 + * Revision 1.2 2002/10/05 03:28:31 ilyas
28625 + * Added extra definitions for Linux and VxWorks drivers.
28626 + * Added definitions for SelfTest support
28628 + * Revision 1.1 2002/07/20 00:51:41 ilyas
28629 + * Merged witchanges made for VxWorks/Linux driver.
28631 + * Revision 1.1 2001/12/21 22:39:30 ilyas
28632 + * Added support for ADSL MIB data objects (RFC2662)
28635 + *****************************************************************************/
28637 +#ifndef AdslMibDefHeader
28638 +#define AdslMibDefHeader
28640 +#if defined(__cplusplus)
28646 +** ADSL configuration parameters
28650 +#define kAdslCfgModMask (0x00000007 | 0x0000F000)
28651 +#define kAdslCfgModAny 0x00000000
28653 +#define kAdslCfgModGdmtOnly 0x00000001
28654 +#define kAdslCfgModGliteOnly 0x00000002
28655 +#define kAdslCfgModT1413Only 0x00000004
28656 +#define kAdslCfgModAnnexIOnly 0x00000004
28657 +#define kAdslCfgModAdsl2Only 0x00001000
28658 +#define kAdslCfgModAdsl2pOnly 0x00002000
28660 +#define kAdslCfgBitmapMask 0x00000018
28661 +#define kAdslCfgDBM 0x00000000
28662 +#define kAdslCfgFBM 0x00000008
28663 +#define kAdslCfgFBMSoL 0x00000010
28665 +#define kAdslCfgLinePairMask 0x00000020
28666 +#define kAdslCfgLineInnerPair 0x00000000
28667 +#define kAdslCfgLineOuterPair 0x00000020
28669 +#define kAdslCfgCentilliumCRCWorkAroundMask 0x00000040
28670 +#define kAdslCfgCentilliumCRCWorkAroundDisabled 0x00000000
28671 +#define kAdslCfgCentilliumCRCWorkAroundEnabled 0x00000040
28673 +#define kAdslCfgExtraData 0x00000080
28674 +#define kAdslCfgTrellisMask (0x00000100 | kAdslCfgExtraData)
28675 +#define kAdslCfgTrellisOn (0x00000100 | kAdslCfgExtraData)
28676 +#define kAdslCfgTrellisOff (0 | kAdslCfgExtraData)
28677 +#define kAdslCfgExtraMask 0xFFFFFF80
28679 +#define kAdslCfgLOSMonitoringMask 0x00000200
28680 +#define kAdslCfgLOSMonitoringOff 0x00000200
28681 +#define kAdslCfgLOSMonitoringOn 0x00000000
28683 +#define kAdslCfgMarginMonitoringMask 0x00000400
28684 +#define kAdslCfgMarginMonitoringOn 0x00000400
28685 +#define kAdslCfgMarginMonitoringOff 0x00000000
28687 +#define kAdslCfgDemodCapMask 0x00000800
28688 +#define kAdslCfgDemodCapOn 0x00000800
28689 +#define kAdslCfgDemodCapOff 0x00000000
28691 +/* Flags 0x00001000 - 0x00008000 are reserved for modulation (see above) */
28693 +/* Upstream mode flags 0x00010000 - 0x00030000 */
28695 +#define kAdslCfgUpstreamModeMask 0x00030000
28696 +#define kAdslCfgUpstreamMax 0x00000000
28697 +#define kAdslCfgUpstreamSingle 0x00010000
28698 +#define kAdslCfgUpstreamDouble 0x00020000
28699 +#define kAdslCfgUpstreamTriple 0x00030000
28701 +#define kAdslCfgNoSpectrumOverlap 0x00040000
28703 +/* Pwm sync clock configuration */
28705 +#define kAdslCfgPwmSyncClockMask 0x00080000
28706 +#define kAdslCfgPwmSyncClockOn 0x00080000
28707 +#define kAdslCfgPwmSyncClockOff 0x00000000
28709 +#define kAdslCfgDefaultTrainingMargin -1
28710 +#define kAdslCfgDefaultShowtimeMargin -1
28711 +#define kAdslCfgDefaultLOMTimeThld -1
28713 +/* ADSL2 parameters */
28715 +#define kAdsl2CfgReachExOn 0x00000001
28716 +#define kAdsl2CfgAnnexMEnabled 0x00000002
28718 +typedef struct _adslCfgProfile {
28719 + long adslAnnexCParam;
28720 + long adslAnnexAParam;
28721 + long adslTrainingMarginQ4;
28722 + long adslShowtimeMarginQ4;
28723 + long adslLOMTimeThldSec;
28724 + long adslDemodCapMask;
28725 + long adslDemodCapValue;
28727 + long adslPwmSyncClockFreq;
28732 +** ADSL PHY configuration
28736 +typedef struct _adslPhyCfg {
28737 + long demodCapMask;
28743 +** ADSL version info parameters
28747 +#define kAdslVersionStringSize 32
28749 +#define kAdslTypeUnknown 0
28750 +#define kAdslTypeAnnexA 1
28751 +#define kAdslTypeAnnexB 2
28752 +#define kAdslTypeAnnexC 3
28753 +#define kAdslTypeSADSL 4
28755 +typedef struct _adslVersionInfo {
28756 + unsigned short phyType;
28757 + unsigned short phyMjVerNum;
28758 + unsigned short phyMnVerNum;
28759 + char phyVerStr[kAdslVersionStringSize];
28760 + unsigned short drvMjVerNum;
28761 + unsigned short drvMnVerNum;
28762 + char drvVerStr[kAdslVersionStringSize];
28763 +} adslVersionInfo;
28767 +** ADSL self-test parameters
28771 +#define kAdslSelfTestLMEM 0x00000001
28772 +#define kAdslSelfTestSDRAM 0x00000002
28773 +#define kAdslSelfTestAFE 0x00000004
28774 +#define kAdslSelfTestQproc 0x00000008
28775 +#define kAdslSelfTestRS 0x00000010
28776 +#define kAdslSelfTestHostDma 0x00000020
28778 +#define kAdslSelfTestAll ((kAdslSelfTestHostDma - 1) | kAdslSelfTestHostDma)
28780 +#define kAdslSelfTestInProgress 0x40000000
28781 +#define kAdslSelfTestCompleted 0x80000000
28783 +/* MIB OID's for ADSL objects */
28785 +#define kOidMaxObjLen 80
28787 +#define kOidAdsl 94
28788 +#define kOidAdslInterleave 124
28789 +#define kOidAdslFast 125
28790 +#define kOidAtm 37
28791 +#define kOidAdslPrivate 255
28792 +#define kOidAdslPrivatePartial 254
28794 +#define kAdslMibAnnexAToneNum 256
28795 +#define kAdslMibToneNum kAdslMibAnnexAToneNum
28796 +#define kAdslMibMaxToneNum kAdslMibAnnexAToneNum*2*2
28798 +#define kOidAdslPrivSNR 1
28799 +#define kOidAdslPrivBitAlloc 2
28800 +#define kOidAdslPrivGain 3
28801 +#define kOidAdslPrivShowtimeMargin 4
28802 +#define kOidAdslPrivChanCharLin 5
28803 +#define kOidAdslPrivChanCharLog 6
28804 +#define kOidAdslPrivQuietLineNoise 7
28805 +#define kOidAdslPrivExtraInfo 255
28807 +#define kOidAdslLine 1
28808 +#define kOidAdslMibObjects 1
28810 +#define kOidAdslLineTable 1
28811 +#define kOidAdslLineEntry 1
28812 +#define kOidAdslLineCoding 1
28813 +#define kOidAdslLineType 2
28814 +#define kOidAdslLineSpecific 3
28815 +#define kOidAdslLineConfProfile 4
28816 +#define kOidAdslLineAlarmConfProfile 5
28818 +#define kOidAdslAtucPhysTable 2
28819 +#define kOidAdslAturPhysTable 3
28820 +#define kOidAdslPhysEntry 1
28821 +#define kOidAdslPhysInvSerialNumber 1
28822 +#define kOidAdslPhysInvVendorID 2
28823 +#define kOidAdslPhysInvVersionNumber 3
28824 +#define kOidAdslPhysCurrSnrMgn 4
28825 +#define kOidAdslPhysCurrAtn 5
28826 +#define kOidAdslPhysCurrStatus 6
28827 +#define kOidAdslPhysCurrOutputPwr 7
28828 +#define kOidAdslPhysCurrAttainableRate 8
28830 +#define kOidAdslAtucChanTable 4
28831 +#define kOidAdslAturChanTable 5
28832 +#define kOidAdslChanEntry 1
28833 +#define kOidAdslChanInterleaveDelay 1
28834 +#define kOidAdslChanCurrTxRate 2
28835 +#define kOidAdslChanPrevTxRate 3
28836 +#define kOidAdslChanCrcBlockLength 4
28838 +#define kOidAdslAtucPerfDataTable 6
28839 +#define kOidAdslAturPerfDataTable 7
28840 +#define kOidAdslPerfDataEntry 1
28841 +#define kOidAdslPerfLofs 1
28842 +#define kOidAdslPerfLoss 2
28843 +#define kOidAdslPerfLprs 3
28844 +#define kOidAdslPerfESs 4
28845 +#define kOidAdslPerfValidIntervals 5
28846 +#define kOidAdslPerfInvalidIntervals 6
28847 +#define kOidAdslPerfCurr15MinTimeElapsed 7
28848 +#define kOidAdslPerfCurr15MinLofs 8
28849 +#define kOidAdslPerfCurr15MinLoss 9
28850 +#define kOidAdslPerfCurr15MinLprs 10
28851 +#define kOidAdslPerfCurr15MinESs 11
28852 +#define kOidAdslPerfCurr1DayTimeElapsed 12
28853 +#define kOidAdslPerfCurr1DayLofs 13
28854 +#define kOidAdslPerfCurr1DayLoss 14
28855 +#define kOidAdslPerfCurr1DayLprs 15
28856 +#define kOidAdslPerfCurr1DayESs 16
28857 +#define kOidAdslPerfPrev1DayMoniSecs 17
28858 +#define kOidAdslPerfPrev1DayLofs 18
28859 +#define kOidAdslPerfPrev1DayLoss 19
28860 +#define kOidAdslPerfPrev1DayLprs 20
28861 +#define kOidAdslPerfPrev1DayESs 21
28863 +#define kOidAdslAtucPerfIntervalTable 8
28864 +#define kOidAdslAturPerfIntervalTable 9
28865 +#define kOidAdslPerfIntervalEntry 1
28866 +#define kOidAdslIntervalNumber 1
28867 +#define kOidAdslIntervalLofs 2
28868 +#define kOidAdslIntervalLoss 3
28869 +#define kOidAdslIntervalLprs 4
28870 +#define kOidAdslIntervalESs 5
28871 +#define kOidAdslIntervalValidData 6
28873 +#define kOidAdslAtucChanPerfTable 10
28874 +#define kOidAdslAturChanPerfTable 11
28875 +#define kOidAdslChanPerfEntry 1
28876 +#define kOidAdslChanReceivedBlks 1
28877 +#define kOidAdslChanTransmittedBlks 2
28878 +#define kOidAdslChanCorrectedBlks 3
28879 +#define kOidAdslChanUncorrectBlks 4
28880 +#define kOidAdslChanPerfValidIntervals 5
28881 +#define kOidAdslChanPerfInvalidIntervals 6
28882 +#define kOidAdslChanPerfCurr15MinTimeElapsed 7
28883 +#define kOidAdslChanPerfCurr15MinReceivedBlks 8
28884 +#define kOidAdslChanPerfCurr15MinTransmittedBlks 9
28885 +#define kOidAdslChanPerfCurr15MinCorrectedBlks 10
28886 +#define kOidAdslChanPerfCurr15MinUncorrectBlks 11
28887 +#define kOidAdslChanPerfCurr1DayTimeElapsed 12
28888 +#define kOidAdslChanPerfCurr1DayReceivedBlks 13
28889 +#define kOidAdslChanPerfCurr1DayTransmittedBlks 14
28890 +#define kOidAdslChanPerfCurr1DayCorrectedBlks 15
28891 +#define kOidAdslChanPerfCurr1DayUncorrectBlks 16
28892 +#define kOidAdslChanPerfPrev1DayMoniSecs 17
28893 +#define kOidAdslChanPerfPrev1DayReceivedBlks 18
28894 +#define kOidAdslChanPerfPrev1DayTransmittedBlks 19
28895 +#define kOidAdslChanPerfPrev1DayCorrectedBlks 20
28896 +#define kOidAdslChanPerfPrev1DayUncorrectBlks 21
28898 +#define kOidAdslAtucChanIntervalTable 12
28899 +#define kOidAdslAturChanIntervalTable 13
28900 +#define kOidAdslChanIntervalEntry 1
28901 +#define kOidAdslChanIntervalNumber 1
28902 +#define kOidAdslChanIntervalReceivedBlks 2
28903 +#define kOidAdslChanIntervalTransmittedBlks 3
28904 +#define kOidAdslChanIntervalCorrectedBlks 4
28905 +#define kOidAdslChanIntervalUncorrectBlks 5
28906 +#define kOidAdslChanIntervalValidData 6
28908 +#define kOidAtmMibObjects 1
28909 +#define kOidAtmTcTable 4
28910 +#define kOidAtmTcEntry 1
28911 +#define kOidAtmOcdEvents 1
28912 +#define kOidAtmAlarmState 2
28914 +/* Adsl Channel coding */
28916 +#define kAdslRcvDir 0
28917 +#define kAdslXmtDir 1
28919 +#define kAdslRcvActive (1 << kAdslRcvDir)
28920 +#define kAdslXmtActive (1 << kAdslXmtDir)
28922 +#define kAdslIntlChannel 0
28923 +#define kAdslFastChannel 1
28925 +#define kAdslTrellisOff 0
28926 +#define kAdslTrellisOn 1
28928 +/* AnnexC modulation and bitmap types for the field (adslConnection.modType) */
28930 +#define kAdslModMask 0x7
28932 +#define kAdslModGdmt 0
28933 +#define kAdslModT1413 1
28934 +#define kAdslModGlite 2
28935 +#define kAdslModAnnexI 3
28936 +#define kAdslModAdsl2 4
28937 +#define kAdslModAdsl2p 5
28938 +#define kAdslModReAdsl2 6
28940 +#define kAdslBitmapShift 3
28941 +#define kAdslBitmapMask kAdslCfgBitmapMask
28942 +#define kAdslDBM (0 << kAdslBitmapShift)
28943 +#define kAdslFBM (1 << kAdslBitmapShift)
28944 +#define kAdslFBMSoL (2 << kAdslBitmapShift)
28946 +#define kAdslUpstreamModeShift 5
28947 +#define kAdslUpstreamModeMask (3 << kAdslUpstreamModeShift)
28948 +#define kAdslUpstreamModeSingle (0 << kAdslUpstreamModeShift)
28949 +#define kAdslUpstreamModeDouble (1 << kAdslUpstreamModeShift)
28950 +#define kAdslUpstreamModeTriple (2 << kAdslUpstreamModeShift)
28952 +/* AdslLineCodingType definitions */
28954 +#define kAdslLineCodingOther 1
28955 +#define kAdslLineCodingDMT 2
28956 +#define kAdslLineCodingCAP 3
28957 +#define kAdslLineCodingQAM 4
28959 +/* AdslLineType definitions */
28961 +#define kAdslLineTypeNoChannel 1
28962 +#define kAdslLineTypeFastOnly 2
28963 +#define kAdslLineTypeIntlOnly 3
28964 +#define kAdslLineTypeFastOrIntl 4
28965 +#define kAdslLineTypeFastAndIntl 5
28967 +typedef struct _adslLineEntry {
28968 + unsigned char adslLineCoding;
28969 + unsigned char adslLineType;
28973 +/* AdslPhys status definitions */
28975 +#define kAdslPhysStatusNoDefect (1 << 0)
28976 +#define kAdslPhysStatusLOF (1 << 1) /* lossOfFraming (not receiving valid frame) */
28977 +#define kAdslPhysStatusLOS (1 << 2) /* lossOfSignal (not receiving signal) */
28978 +#define kAdslPhysStatusLPR (1 << 3) /* lossOfPower */
28979 +#define kAdslPhysStatusLOSQ (1 << 4) /* lossOfSignalQuality */
28980 +#define kAdslPhysStatusLOM (1 << 5) /* lossOfMargin */
28982 +typedef struct _adslPhysEntry {
28983 + long adslCurrSnrMgn;
28984 + long adslCurrAtn;
28985 + long adslCurrStatus;
28986 + long adslCurrOutputPwr;
28987 + long adslCurrAttainableRate;
28990 +#define kAdslPhysVendorIdLen 8
28991 +#define kAdslPhysSerialNumLen 32
28992 +#define kAdslPhysVersionNumLen 32
28994 +typedef struct _adslFullPhysEntry {
28995 + char adslSerialNumber[kAdslPhysSerialNumLen];
28996 + char adslVendorID[kAdslPhysVendorIdLen];
28997 + char adslVersionNumber[kAdslPhysVersionNumLen];
28998 + long adslCurrSnrMgn;
28999 + long adslCurrAtn;
29000 + long adslCurrStatus;
29001 + long adslCurrOutputPwr;
29002 + long adslCurrAttainableRate;
29003 +} adslFullPhysEntry;
29005 +/* Adsl channel entry definitions */
29007 +typedef struct _adslChanEntry {
29008 + unsigned long adslChanIntlDelay;
29009 + unsigned long adslChanCurrTxRate;
29010 + unsigned long adslChanPrevTxRate;
29011 + unsigned long adslChanCrcBlockLength;
29014 +/* Adsl performance data definitions */
29016 +typedef struct _adslPerfCounters {
29017 + unsigned long adslLofs;
29018 + unsigned long adslLoss;
29019 + unsigned long adslLols; /* Loss of Link failures (ATUC only) */
29020 + unsigned long adslLprs;
29021 + unsigned long adslESs; /* Count of Errored Seconds */
29022 + unsigned long adslInits; /* Count of Line initialization attempts (ATUC only) */
29023 + unsigned long adslUAS; /* Count of Unavailable Seconds */
29024 + unsigned long adslSES; /* Count of Severely Errored Seconds */
29025 + unsigned long adslLOSS; /* Count of LOS seconds */
29026 + unsigned long adslFECs; /* Count of FEC seconds */
29027 +} adslPerfCounters;
29029 +typedef struct _adslPerfDataEntry {
29030 + adslPerfCounters perfTotal;
29031 + unsigned long adslPerfValidIntervals;
29032 + unsigned long adslPerfInvalidIntervals;
29033 + adslPerfCounters perfCurr15Min;
29034 + unsigned long adslPerfCurr15MinTimeElapsed;
29035 + adslPerfCounters perfCurr1Day;
29036 + unsigned long adslPerfCurr1DayTimeElapsed;
29037 + adslPerfCounters perfPrev1Day;
29038 + unsigned long adslAturPerfPrev1DayMoniSecs;
29039 +} adslPerfDataEntry;
29041 +#define kAdslMibPerfIntervals 4
29043 +/* Adsl channel performance data definitions */
29045 +typedef struct _adslChanCounters {
29046 + unsigned long adslChanReceivedBlks;
29047 + unsigned long adslChanTransmittedBlks;
29048 + unsigned long adslChanCorrectedBlks;
29049 + unsigned long adslChanUncorrectBlks;
29050 +} adslChanCounters;
29052 +typedef struct _adslChanPerfDataEntry {
29053 + adslChanCounters perfTotal;
29054 + unsigned long adslChanPerfValidIntervals;
29055 + unsigned long adslChanPerfInvalidIntervals;
29056 + adslChanCounters perfCurr15Min;
29057 + unsigned long adslPerfCurr15MinTimeElapsed;
29058 + adslChanCounters perfCurr1Day;
29059 + unsigned long adslPerfCurr1DayTimeElapsed;
29060 + adslChanCounters perfPrev1Day;
29061 + unsigned long adslAturPerfPrev1DayMoniSecs;
29062 +} adslChanPerfDataEntry;
29064 +#define kAdslMibChanPerfIntervals 4
29066 +/* Adsl trap threshold definitions */
29068 +#define kAdslEventLinkChange 0x001
29069 +#define kAdslEventRateChange 0x002
29070 +#define kAdslEventLofThresh 0x004
29071 +#define kAdslEventLosThresh 0x008
29072 +#define kAdslEventLprThresh 0x010
29073 +#define kAdslEventESThresh 0x020
29074 +#define kAdslEventFastUpThresh 0x040
29075 +#define kAdslEventIntlUpThresh 0x080
29076 +#define kAdslEventFastDownThresh 0x100
29077 +#define kAdslEventIntlDwonThresh 0x200
29079 +typedef struct _adslThreshCounters {
29080 + unsigned long adslThreshLofs;
29081 + unsigned long adslThreshLoss;
29082 + unsigned long adslThreshLols; /* Loss of Link failures (ATUC only) */
29083 + unsigned long adslThreshLprs;
29084 + unsigned long adslThreshESs;
29085 + unsigned long adslThreshFastRateUp;
29086 + unsigned long adslThreshIntlRateUp;
29087 + unsigned long adslThreshFastRateDown;
29088 + unsigned long adslThreshIntlRateDown;
29089 +} adslThreshCounters;
29092 +/* Atm PHY performance data definitions */
29094 +#define kAtmPhyStateNoAlarm 1
29095 +#define kAtmPhyStateLcdFailure 2
29097 +typedef struct _atmPhyDataEntrty {
29098 + unsigned long atmInterfaceOCDEvents;
29099 + unsigned long atmInterfaceTCAlarmState;
29100 +} atmPhyDataEntrty;
29102 +typedef struct _adslBertResults {
29103 + unsigned long bertTotalBits;
29104 + unsigned long bertErrBits;
29105 +} adslBertResults;
29108 + unsigned long cntHi;
29109 + unsigned long cntLo;
29112 +typedef struct _adslBertStatusEx {
29113 + unsigned long bertSecTotal;
29114 + unsigned long bertSecElapsed;
29115 + unsigned long bertSecCur;
29116 + cnt64 bertTotalBits;
29117 + cnt64 bertErrBits;
29118 +} adslBertStatusEx;
29120 +typedef struct _adslDataConnectionInfo {
29121 + unsigned short K;
29122 + unsigned char S, R, D;
29123 +} adslDataConnectionInfo;
29125 +typedef struct _adslConnectionInfo {
29126 + unsigned char chType; /* fast or interleaved */
29127 + unsigned char modType; /* modulation type: G.DMT or T1.413 */
29128 + unsigned char trellisCoding; /* off(0) or on(1) */
29129 + adslDataConnectionInfo rcvInfo;
29130 + adslDataConnectionInfo xmtInfo;
29131 +} adslConnectionInfo;
29133 +typedef struct _adsl2DataConnectionInfo {
29134 + unsigned char Nlp;
29135 + unsigned char Nbc;
29136 + unsigned char MSGlp;
29137 + unsigned short MSGc;
29140 + unsigned short M;
29141 + unsigned short T;
29142 + unsigned short D;
29143 + unsigned short R;
29144 + unsigned short B;
29145 +} adsl2DataConnectionInfo;
29147 +typedef struct _adsl2ConnectionInfo {
29151 + unsigned char pwrState; /* Lx state: x = 0..3 */
29152 + adsl2DataConnectionInfo rcv2Info;
29153 + adsl2DataConnectionInfo xmt2Info;
29154 +} adsl2ConnectionInfo;
29156 +typedef struct _adslConnectionDataStat {
29157 + unsigned long cntRS;
29158 + unsigned long cntRSCor;
29159 + unsigned long cntRSUncor;
29160 + unsigned long cntSF;
29161 + unsigned long cntSFErr;
29162 +} adslConnectionDataStat;
29164 +typedef struct _adslConnectionStat {
29165 + adslConnectionDataStat rcvStat;
29166 + adslConnectionDataStat xmtStat;
29167 +} adslConnectionStat;
29169 +typedef struct _atmConnectionDataStat {
29170 + unsigned long cntHEC;
29171 + unsigned long cntOCD;
29172 + unsigned long cntLCD;
29173 + unsigned long cntES;
29174 + unsigned long cntCellTotal;
29175 + unsigned long cntCellData;
29176 + unsigned long cntCellDrop;
29177 + unsigned long cntBitErrs;
29178 +} atmConnectionDataStat;
29180 +typedef struct _atmConnectionStat {
29181 + atmConnectionDataStat rcvStat;
29182 + atmConnectionDataStat xmtStat;
29183 +} atmConnectionStat;
29185 +#define kAdslFramingModeMask 0x0F
29186 +#define kAtmFramingModeMask 0xF0
29187 +#define kAtmHeaderCompression 0x80
29191 +typedef struct _adslDiagModeData {
29195 + long attnDataRate;
29196 + long actXmtPower;
29197 + long hlinScaleFactor;
29198 +} adslDiagModeData;
29200 +/* AdslMibGetObjectValue return codes */
29202 +#define kAdslMibStatusSuccess 0
29203 +#define kAdslMibStatusFailure -1
29204 +#define kAdslMibStatusNoObject -2
29205 +#define kAdslMibStatusObjectInvalid -3
29206 +#define kAdslMibStatusBufferTooSmall -4
29207 +#define kAdslMibStatusLastError -4
29209 +/* Adsl training codes */
29211 +#define kAdslTrainingIdle 0
29212 +#define kAdslTrainingG994 1
29213 +#define kAdslTrainingG992Started 2
29214 +#define kAdslTrainingG992ChanAnalysis 3
29215 +#define kAdslTrainingG992Exchange 4
29216 +#define kAdslTrainingConnected 5
29218 +/* Global info structure */
29220 +typedef struct _adslMibInfo {
29221 + adslLineEntry adslLine;
29222 + adslPhysEntry adslPhys;
29223 + adslChanEntry adslChanIntl;
29224 + adslChanEntry adslChanFast;
29225 + adslPerfDataEntry adslPerfData;
29226 + adslPerfCounters adslPerfIntervals[kAdslMibPerfIntervals];
29227 + adslChanPerfDataEntry adslChanIntlPerfData;
29228 + adslChanPerfDataEntry adslChanFastPerfData;
29229 + adslChanCounters adslChanIntlPerfIntervals[kAdslMibChanPerfIntervals];
29230 + adslChanCounters adslChanFastPerfIntervals[kAdslMibChanPerfIntervals];
29232 + adslThreshCounters adslAlarm;
29234 + atmPhyDataEntrty adslChanIntlAtmPhyData;
29235 + atmPhyDataEntrty adslChanFastAtmPhyData;
29237 + adslBertResults adslBertRes;
29239 + adslConnectionInfo adslConnection;
29240 + adslConnectionStat adslStat;
29241 + unsigned char adslTrainingState;
29242 + atmConnectionStat atmStat;
29244 + adslFullPhysEntry adslAtucPhys;
29245 + unsigned char adslRxNonStdFramingAdjustK;
29246 + unsigned char adslFramingMode;
29247 + adslBertStatusEx adslBertStatus;
29248 + long afeRxPgaGainQ1;
29250 + adslDiagModeData adslDiag;
29251 + adsl2ConnectionInfo adsl2Info;
29252 + adslPerfCounters adslTxPerfTotal;
29255 +#if defined(__cplusplus)
29259 +#endif /* AdslMibDefHeader */
29260 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/DiagDef.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/DiagDef.h
29261 --- linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/DiagDef.h 1970-01-01 01:00:00.000000000 +0100
29262 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/DiagDef.h 2006-06-26 09:07:10.000000000 +0200
29265 +<:copyright-broadcom
29267 + Copyright (c) 2002 Broadcom Corporation
29268 + All Rights Reserved
29269 + No portions of this material may be reproduced in any form without the
29270 + written permission of:
29271 + Broadcom Corporation
29272 + 16215 Alton Parkway
29273 + Irvine, California 92619
29274 + All information contained in this document is Broadcom Corporation
29275 + company private, proprietary, and trade secret.
29280 +/*******************************************************************
29284 + * Diag definitions
29286 + * $Revision: 1.22 $
29288 + * $Id: DiagDef.h,v 1.22 2004/10/16 23:43:19 ilyas Exp $
29290 + * $Log: DiagDef.h,v $
29291 + * Revision 1.22 2004/10/16 23:43:19 ilyas
29292 + * Added playback resume command
29294 + * Revision 1.21 2004/10/16 23:24:08 ilyas
29295 + * Improved FileRead command support for LOG file playback (RecordTest on the board)
29297 + * Revision 1.20 2004/04/28 16:52:32 ilyas
29298 + * Added GDB frame processing
29300 + * Revision 1.19 2004/03/10 22:26:53 ilyas
29301 + * Added command-line parameter for IP port number.
29302 + * Added proxy remote termination
29304 + * Revision 1.18 2004/01/24 23:41:37 ilyas
29305 + * Added DIAG_DEBUG_CMD_LOG_SAMPLES debug command
29307 + * Revision 1.17 2003/11/19 02:25:45 ilyas
29308 + * Added definitions for LOG frame retransmission, time, ADSL2 plots
29310 + * Revision 1.16 2003/11/14 18:46:05 ilyas
29311 + * Added G992p3 debug commands
29313 + * Revision 1.15 2003/10/02 19:50:41 ilyas
29314 + * Added support for buffering data for AnnexI and statistical counters
29316 + * Revision 1.14 2003/09/03 19:45:11 ilyas
29317 + * To refuse connection with older protocol versions
29319 + * Revision 1.13 2003/08/30 00:12:39 ilyas
29320 + * Added support for running chip test regressions via DslDiags
29322 + * Revision 1.12 2003/08/12 00:19:28 ilyas
29323 + * Improved image downloading protocol.
29324 + * Added DEBUG command support
29326 + * Revision 1.11 2003/04/11 00:37:24 ilyas
29327 + * Added DiagProtoFrame definition
29329 + * Revision 1.10 2003/03/25 00:10:07 ilyas
29330 + * Added command for "long" BERT test
29332 + * Revision 1.9 2003/01/30 03:29:32 ilyas
29333 + * Added PHY_CFG support and fixed printing showtime counters
29335 + * Revision 1.8 2002/12/16 20:56:38 ilyas
29336 + * Added support for binary statuses
29338 + * Revision 1.7 2002/12/06 20:19:13 ilyas
29339 + * Added support for binary statuses and scrambled status strings
29341 + * Revision 1.6 2002/11/05 00:18:27 ilyas
29342 + * Added configuration dialog box for Eye tone selection.
29343 + * Added Centillium CRC workaround to AnnexC config dialog
29344 + * Bit allocation update on bit swap messages
29346 + * Revision 1.5 2002/07/30 23:23:43 ilyas
29347 + * Implemented DIAG configuration command for AnnexA and AnnexC
29349 + * Revision 1.4 2002/07/30 22:47:15 ilyas
29350 + * Added DIAG command for configuration
29352 + * Revision 1.3 2002/07/15 23:52:51 ilyas
29353 + * iAdded switch RJ11 pair command
29355 + * Revision 1.2 2002/04/25 17:55:51 ilyas
29356 + * Added mibGet command
29358 + * Revision 1.1 2002/04/02 22:56:39 ilyas
29359 + * Support DIAG connection at any time; BERT commands
29362 + ******************************************************************/
29364 +#define LOG_PROTO_ID "*L"
29366 +#define DIAG_PARTY_ID_MASK 0x01
29367 +#define LOG_PARTY_CLIENT 0x01
29368 +#define LOG_PARTY_SERVER 0x00
29370 +#define DIAG_DATA_MASK 0x0E
29371 +#define DIAG_DATA_LOG 0x02
29372 +#define DIAG_DATA_EYE 0x04
29373 +#define DIAG_DATA_LOG_TIME 0x08
29375 +#define DIAG_DATA_EX 0x80
29376 +#define DIAG_PARTY_ID_MASK_EX (DIAG_DATA_EX | DIAG_PARTY_ID_MASK)
29377 +#define LOG_PARTY_SERVER_EX (DIAG_DATA_EX | LOG_PARTY_SERVER)
29379 +#define DIAG_ACK_FRAME_ACK_MASK 0x000000FF
29380 +#define DIAG_ACK_FRAME_RCV_SHIFT 8
29381 +#define DIAG_ACK_FRAME_RCV_MASK 0x0000FF00
29382 +#define DIAG_ACK_FRAME_RCV_PRESENT 0x00010000
29383 +#define DIAG_ACK_TIMEOUT -1
29384 +#define DIAG_ACK_LEN_INDICATION -1
29386 +#define LOG_CMD_GDB 236
29387 +#define LOG_CMD_PROXY 237
29388 +#define LOG_CMD_RETR 238
29389 +#define LOG_CMD_DEBUG 239
29390 +#define LOG_CMD_BERT_EX 240
29391 +#define LOG_CMD_CFG_PHY 241
29392 +#define LOG_CMD_RESET 242
29393 +#define LOG_CMD_SCRAMBLED_STRING 243
29394 +#define LOG_CMD_EYE_CFG 244
29395 +#define LOG_CMD_CONFIG_A 245
29396 +#define LOG_CMD_CONFIG_C 246
29397 +#define LOG_CMD_SWITCH_RJ11_PAIR 247
29398 +#define LOG_CMD_MIB_GET 248
29399 +#define LOG_CMD_LOG_STOP 249
29400 +#define LOG_CMD_PING_REQ 250
29401 +#define LOG_CMD_PING_RSP 251
29402 +#define LOG_CMD_DISCONNECT 252
29403 +#define LOG_CMD_STRING_DATA 253
29404 +#define LOG_CMD_TEST_DATA 254
29405 +#define LOG_CMD_CONNECT 255
29407 +typedef struct _LogProtoHeader {
29408 + unsigned char logProtoId[2];
29409 + unsigned char logPartyId;
29410 + unsigned char logCommmand;
29413 +#define LOG_FILE_PORT 5100
29414 +#define LOG_MAX_BUF_SIZE 1400
29415 +#define LOG_MAX_DATA_SIZE (LOG_MAX_BUF_SIZE - sizeof(LogProtoHeader))
29418 + LogProtoHeader diagHdr;
29419 + unsigned char diagData[LOG_MAX_DATA_SIZE];
29422 +#define DIAG_PROXY_TERMINATE 1
29424 +#define DIAG_DEBUG_CMD_READ_MEM 1
29425 +#define DIAG_DEBUG_CMD_SET_MEM 2
29426 +#define DIAG_DEBUG_CMD_RESET_CONNECTION 3
29427 +#define DIAG_DEBUG_CMD_RESET_PHY 4
29428 +#define DIAG_DEBUG_CMD_RESET_CHIP 5
29429 +#define DIAG_DEBUG_CMD_EXEC_FUNC 6
29430 +#define DIAG_DEBUG_CMD_EXEC_ADSL_FUNC 7
29431 +#define DIAG_DEBUG_CMD_WRITE_FILE 8
29432 +#define DIAG_DEBUG_CMD_G992P3_DEBUG 9
29433 +#define DIAG_DEBUG_CMD_G992P3_DIAG_MODE 10
29434 +#define DIAG_DEBUG_CMD_CLEAR_TIME 11
29435 +#define DIAG_DEBUG_CMD_PRINT_TIME 12
29436 +#define DIAG_DEBUG_CMD_LOG_SAMPLES 13
29438 +#define DIAG_DEBUG_CMD_PLAYBACK_STOP 14
29439 +#define DIAG_DEBUG_CMD_PLAYBACK_RESUME 15
29441 +#define DIAG_DEBUG_CMD_PRINT_STAT 21
29442 +#define DIAG_DEBUG_CMD_CLEAR_STAT 22
29445 + unsigned short cmd;
29446 + unsigned short cmdId;
29447 + unsigned long param1;
29448 + unsigned long param2;
29449 + unsigned char diagData[1];
29452 +#define DIAG_TEST_CMD_LOAD 101
29453 +#define DIAG_TEST_CMD_READ 102
29454 +#define DIAG_TEST_CMD_WRITE 103
29455 +#define DIAG_TEST_CMD_APPEND 104
29456 +#define DIAG_TEST_CMD_TEST_COMPLETE 105
29458 +#define DIAG_TEST_FILENAME_LEN 64
29461 + unsigned short cmd;
29462 + unsigned short cmdId;
29463 + unsigned long offset;
29464 + unsigned long len;
29465 + unsigned long bufPtr;
29466 + char fileName[DIAG_TEST_FILENAME_LEN];
29470 + unsigned long frStart;
29471 + unsigned long frNum;
29472 +} DiagLogRetrData;
29473 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/adsldrv.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/adsldrv.h
29474 --- linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/adsldrv.h 1970-01-01 01:00:00.000000000 +0100
29475 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/adsldrv.h 2006-06-26 09:07:10.000000000 +0200
29478 +<:copyright-broadcom
29480 + Copyright (c) 2002 Broadcom Corporation
29481 + All Rights Reserved
29482 + No portions of this material may be reproduced in any form without the
29483 + written permission of:
29484 + Broadcom Corporation
29485 + 16215 Alton Parkway
29486 + Irvine, California 92619
29487 + All information contained in this document is Broadcom Corporation
29488 + company private, proprietary, and trade secret.
29492 +/***************************************************************************
29493 + * File Name : AdslDrv.h
29495 + * Description: This file contains the definitions and structures for the
29496 + * Linux IOCTL interface that used between the user mode ADSL
29497 + * API library and the kernel ADSL API driver.
29499 + * Updates : 11/02/2001 lkaplan. Created.
29500 + ***************************************************************************/
29502 +#if !defined(_ADSLDRV_H_)
29503 +#define _ADSLDRV_H_
29505 +#if defined(__cplusplus)
29510 +#include <bcmadsl.h>
29513 +#define DSL_IFNAME "dsl0"
29514 +#define ADSLDRV_MAJOR 208 /* arbitrary unused value */
29516 +#define ADSLIOCTL_CHECK \
29517 + _IOR(ADSLDRV_MAJOR, 0, ADSLDRV_STATUS_ONLY)
29518 +#define ADSLIOCTL_INITIALIZE \
29519 + _IOWR(ADSLDRV_MAJOR, 1, ADSLDRV_INITIALIZE)
29520 +#define ADSLIOCTL_UNINITIALIZE \
29521 + _IOR(ADSLDRV_MAJOR, 2, ADSLDRV_STATUS_ONLY)
29522 +#define ADSLIOCTL_CONNECTION_START \
29523 + _IOWR(ADSLDRV_MAJOR, 3, ADSLDRV_STATUS_ONLY)
29524 +#define ADSLIOCTL_CONNECTION_STOP \
29525 + _IOR(ADSLDRV_MAJOR, 4, ADSLDRV_STATUS_ONLY)
29526 +#define ADSLIOCTL_GET_PHY_ADDR \
29527 + _IOR(ADSLDRV_MAJOR, 5, ADSLDRV_PHY_ADDR)
29528 +#define ADSLIOCTL_SET_PHY_ADDR \
29529 + _IOWR(ADSLDRV_MAJOR, 6, ADSLDRV_PHY_ADDR)
29530 +#define ADSLIOCTL_MAP_ATM_PORT_IDS \
29531 + _IOWR(ADSLDRV_MAJOR, 7, ADSLDRV_MAP_ATM_PORT)
29532 +#define ADSLIOCTL_GET_CONNECTION_INFO \
29533 + _IOR(ADSLDRV_MAJOR, 8, ADSLDRV_CONNECTION_INFO)
29534 +#define ADSLIOCTL_DIAG_COMMAND \
29535 + _IOR(ADSLDRV_MAJOR, 9, ADSLDRV_DIAG)
29536 +#define ADSLIOCTL_GET_OBJ_VALUE \
29537 + _IOR(ADSLDRV_MAJOR, 10, ADSLDRV_GET_OBJ)
29538 +#define ADSLIOCTL_START_BERT \
29539 + _IOR(ADSLDRV_MAJOR, 11, ADSLDRV_BERT)
29540 +#define ADSLIOCTL_STOP_BERT \
29541 + _IOR(ADSLDRV_MAJOR, 12, ADSLDRV_STATUS_ONLY)
29542 +#define ADSLIOCTL_CONFIGURE \
29543 + _IOR(ADSLDRV_MAJOR, 13, ADSLDRV_CONFIGURE)
29544 +#define ADSLIOCTL_TEST \
29545 + _IOR(ADSLDRV_MAJOR, 14, ADSLDRV_TEST)
29546 +#define ADSLIOCTL_GET_CONSTEL_POINTS \
29547 + _IOR(ADSLDRV_MAJOR, 15, ADSLDRV_GET_CONSTEL_POINTS)
29548 +#define ADSLIOCTL_GET_VERSION \
29549 + _IOR(ADSLDRV_MAJOR, 16, ADSLDRV_GET_VERSION)
29550 +#define ADSLIOCTL_SET_SDRAM_BASE \
29551 + _IOR(ADSLDRV_MAJOR, 17, ADSLDRV_SET_SDRAM_BASE)
29552 +#define ADSLIOCTL_RESET_STAT_COUNTERS \
29553 + _IOR(ADSLDRV_MAJOR, 18, ADSLDRV_STATUS_ONLY)
29554 +#define ADSLIOCTL_SET_OEM_PARAM \
29555 + _IOR(ADSLDRV_MAJOR, 19, ADSLDRV_SET_OEM_PARAM)
29556 +#define ADSLIOCTL_START_BERT_EX \
29557 + _IOR(ADSLDRV_MAJOR, 20, ADSLDRV_BERT_EX)
29558 +#define ADSLIOCTL_STOP_BERT_EX \
29559 + _IOR(ADSLDRV_MAJOR, 21, ADSLDRV_STATUS_ONLY)
29561 +#define MAX_ADSLDRV_IOCTL_COMMANDS 22
29566 + BCMADSL_STATUS bvStatus;
29567 +} ADSLDRV_STATUS_ONLY, *PADSLDRV_STATUS_ONLY;
29571 + ADSL_FN_NOTIFY_CB pFnNotifyCb;
29573 + adslCfgProfile *pAdslCfg;
29574 + BCMADSL_STATUS bvStatus;
29575 +} ADSLDRV_INITIALIZE, *PADSLDRV_INITIALIZE;
29579 + ADSL_CHANNEL_ADDR ChannelAddr;
29580 + BCMADSL_STATUS bvStatus;
29581 +} ADSLDRV_PHY_ADDR, *PADSLDRV_PHY_ADDR;
29585 + UINT16 usAtmFastPortId;
29586 + UINT16 usAtmInterleavedPortId;
29587 + BCMADSL_STATUS bvStatus;
29588 +} ADSLDRV_MAP_ATM_PORT, *PADSLDRV_MAP_ATM_PORT;
29592 + ADSL_CONNECTION_INFO ConnectionInfo;
29593 + BCMADSL_STATUS bvStatus;
29594 +} ADSLDRV_CONNECTION_INFO, *PADSLDRV_CONNECTION_INFO;
29603 + BCMADSL_STATUS bvStatus;
29604 +} ADSLDRV_DIAG, *PADSLDRV_DIAG;
29612 + BCMADSL_STATUS bvStatus;
29613 +} ADSLDRV_GET_OBJ, *PADSLDRV_GET_OBJ;
29617 + unsigned long totalBits;
29618 + BCMADSL_STATUS bvStatus;
29619 +} ADSLDRV_BERT, *PADSLDRV_BERT;
29623 + unsigned long totalSec;
29624 + BCMADSL_STATUS bvStatus;
29625 +} ADSLDRV_BERT_EX, *PADSLDRV_BERT_EX;
29629 + adslCfgProfile *pAdslCfg;
29630 + BCMADSL_STATUS bvStatus;
29631 +} ADSLDRV_CONFIGURE, *PADSLDRV_CONFIGURE;
29635 + unsigned long testCmd;
29636 + unsigned long xmtStartTone;
29637 + unsigned long xmtNumTones;
29638 + unsigned long rcvStartTone;
29639 + unsigned long rcvNumTones;
29640 + char *xmtToneMap;
29641 + char *rcvToneMap;
29642 + BCMADSL_STATUS bvStatus;
29643 +} ADSLDRV_TEST, *PADSLDRV_TEST;
29648 + ADSL_CONSTELLATION_POINT *pointBuf;
29650 + BCMADSL_STATUS bvStatus;
29651 +} ADSLDRV_GET_CONSTEL_POINTS, *PADSLDRV_GET_CONSTEL_POINTS;
29655 + adslVersionInfo *pAdslVer;
29656 + BCMADSL_STATUS bvStatus;
29657 +} ADSLDRV_GET_VERSION, *PADSLDRV_GET_VERSION;
29661 + unsigned long sdramBaseAddr;
29662 + BCMADSL_STATUS bvStatus;
29663 +} ADSLDRV_SET_SDRAM_BASE, *PADSLDRV_SET_SDRAM_BASE;
29671 + BCMADSL_STATUS bvStatus;
29672 +} ADSLDRV_SET_OEM_PARAM, *PADSLDRV_SET_OEM_PARAM;
29674 +#if defined(__cplusplus)
29678 +#endif // _ADSLDRV_H_
29680 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/atmapidrv.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/atmapidrv.h
29681 --- linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/atmapidrv.h 1970-01-01 01:00:00.000000000 +0100
29682 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/atmapidrv.h 2006-06-26 09:07:10.000000000 +0200
29685 +<:copyright-broadcom
29687 + Copyright (c) 2002 Broadcom Corporation
29688 + All Rights Reserved
29689 + No portions of this material may be reproduced in any form without the
29690 + written permission of:
29691 + Broadcom Corporation
29692 + 16215 Alton Parkway
29693 + Irvine, California 92619
29694 + All information contained in this document is Broadcom Corporation
29695 + company private, proprietary, and trade secret.
29699 +/***************************************************************************
29700 + * File Name : AtmApiDrv.h
29702 + * Description: This file contains the definitions and structures for the
29703 + * Linux IOCTL interface that used between the user mode ATM
29704 + * API library and the kernel ATM API driver.
29706 + * Updates : 09/15/2000 lat. Created.
29707 + ***************************************************************************/
29709 +#if !defined(_ATMAPIDRV_H_)
29710 +#define _ATMAPIDRV_H_
29712 +#if defined(__cplusplus)
29717 +#include <bcmatmapi.h>
29720 +#define ATMDRV_MAJOR 205 /* arbitrary unused value */
29722 +#define ATMIOCTL_INITIALIZE \
29723 + _IOWR(ATMDRV_MAJOR, 0, ATMDRV_INITIALIZE)
29724 +#define ATMIOCTL_UNINITIALIZE \
29725 + _IOR(ATMDRV_MAJOR, 1, ATMDRV_STATUS_ONLY)
29726 +#define ATMIOCTL_GET_INTERFACE_ID \
29727 + _IOWR(ATMDRV_MAJOR, 2, ATMDRV_INTERFACE_ID)
29728 +#define ATMIOCTL_GET_TRAFFIC_DESCR_TABLE_SIZE \
29729 + _IOR(ATMDRV_MAJOR, 3, ATMDRV_TRAFFIC_DESCR_TABLE_SIZE)
29730 +#define ATMIOCTL_GET_TRAFFIC_DESCR_TABLE \
29731 + _IOWR(ATMDRV_MAJOR, 4, ATMDRV_TRAFFIC_DESCR_TABLE)
29732 +#define ATMIOCTL_SET_TRAFFIC_DESCR_TABLE \
29733 + _IOWR(ATMDRV_MAJOR, 5, ATMDRV_TRAFFIC_DESCR_TABLE)
29734 +#define ATMIOCTL_GET_INTERFACE_CFG \
29735 + _IOWR(ATMDRV_MAJOR, 6, ATMDRV_INTERFACE_CFG)
29736 +#define ATMIOCTL_SET_INTERFACE_CFG \
29737 + _IOWR(ATMDRV_MAJOR, 7, ATMDRV_INTERFACE_CFG)
29738 +#define ATMIOCTL_GET_VCC_CFG \
29739 + _IOWR(ATMDRV_MAJOR, 8, ATMDRV_VCC_CFG)
29740 +#define ATMIOCTL_SET_VCC_CFG \
29741 + _IOWR(ATMDRV_MAJOR, 9, ATMDRV_VCC_CFG)
29742 +#define ATMIOCTL_GET_VCC_ADDRS \
29743 + _IOWR(ATMDRV_MAJOR, 10, ATMDRV_VCC_ADDRS)
29744 +#define ATMIOCTL_GET_INTERFACE_STATISTICS \
29745 + _IOWR(ATMDRV_MAJOR, 11, ATMDRV_INTERFACE_STATISTICS)
29746 +#define ATMIOCTL_GET_VCC_STATISTICS \
29747 + _IOWR(ATMDRV_MAJOR, 12, ATMDRV_VCC_STATISTICS)
29748 +#define ATMIOCTL_SET_INTERFACE_LINK_INFO \
29749 + _IOWR(ATMDRV_MAJOR, 13, ATMDRV_INTERFACE_LINK_INFO)
29750 +#define ATMIOCTL_TEST \
29751 + _IOWR(ATMDRV_MAJOR, 14, ATMDRV_TEST)
29752 +#define ATMIOCTL_OAM_LOOPBACK_TEST \
29753 + _IOWR(ATMDRV_MAJOR, 15, ATMDRV_OAM_LOOPBACK)
29756 +#define MAX_ATMDRV_IOCTL_COMMANDS 16
29761 + BCMATM_STATUS baStatus;
29762 +} ATMDRV_STATUS_ONLY, *PATMDRV_STATUS_ONLY;
29765 +{ PATM_INITIALIZATION_PARMS pInit;
29766 + BCMATM_STATUS baStatus;
29767 +} ATMDRV_INITIALIZE, *PATMDRV_INITIALIZE;
29772 + UINT8 ucReserved[3];
29773 + UINT32 ulInterfaceId;
29774 + BCMATM_STATUS baStatus;
29775 +} ATMDRV_INTERFACE_ID, *PATMDRV_INTERFACE_ID;
29779 + UINT32 ulTrafficDescrTableSize;
29780 + BCMATM_STATUS baStatus;
29781 +} ATMDRV_TRAFFIC_DESCR_TABLE_SIZE, *PATMDRV_TRAFFIC_DESCR_TABLE_SIZE;
29785 + PATM_TRAFFIC_DESCR_PARM_ENTRY pTrafficDescrTable;
29786 + UINT32 ulTrafficDescrTableSize;
29787 + BCMATM_STATUS baStatus;
29788 +} ATMDRV_TRAFFIC_DESCR_TABLE, *PATMDRV_TRAFFIC_DESCR_TABLE;
29792 + UINT32 ulInterfaceId;
29793 + PATM_INTERFACE_CFG pInterfaceCfg;
29794 + BCMATM_STATUS baStatus;
29795 +} ATMDRV_INTERFACE_CFG, *PATMDRV_INTERFACE_CFG;
29799 + ATM_VCC_ADDR VccAddr;
29800 + PATM_VCC_CFG pVccCfg;
29801 + BCMATM_STATUS baStatus;
29802 +} ATMDRV_VCC_CFG, *PATMDRV_VCC_CFG;
29806 + UINT32 ulInterfaceId;
29807 + PATM_VCC_ADDR pVccAddrs;
29808 + UINT32 ulNumVccs;
29809 + UINT32 ulNumReturned;
29810 + BCMATM_STATUS baStatus;
29811 +} ATMDRV_VCC_ADDRS, *PATMDRV_VCC_ADDRS;
29815 + UINT32 ulInterfaceId;
29816 + PATM_INTERFACE_STATS pStatistics;
29818 + BCMATM_STATUS baStatus;
29819 +} ATMDRV_INTERFACE_STATISTICS, *PATMDRV_INTERFACE_STATISTICS;
29823 + ATM_VCC_ADDR VccAddr;
29824 + PATM_VCC_STATS pVccStatistics;
29826 + BCMATM_STATUS baStatus;
29827 +} ATMDRV_VCC_STATISTICS, *PATMDRV_VCC_STATISTICS;
29831 + UINT32 ulInterfaceId;
29832 + ATM_INTERFACE_LINK_INFO InterfaceCfg;
29833 + BCMATM_STATUS baStatus;
29834 +} ATMDRV_INTERFACE_LINK_INFO, *PATMDRV_INTERFACE_LINK_INFO;
29838 + ATM_VCC_ADDR VccAddr;
29839 + UINT32 ulNumToSend;
29840 + BCMATM_STATUS baStatus;
29841 +} ATMDRV_TEST, *PATMDRV_TEST;
29845 + ATM_VCC_ADDR VccAddr;
29847 + BCMATM_STATUS baStatus;
29848 +} ATMDRV_OAM_LOOPBACK, *PATMDRV_OAM_LOOPBACK;
29850 +#define OAM_TYPE_FUNCTION_BYTE_OFFSET 0
29851 +#define OAM_LB_INDICATION_BYTE_OFFSET 1
29852 +#define OAM_LB_CORRELATION_TAG_BYTE_OFFSET 2
29853 +#define OAM_LB_LOCATION_ID_BYTE_OFFSET 6
29854 +#define OAM_LB_SRC_ID_BYTE_OFFSET 22
29855 +#define OAM_LB_UNUSED_BYTE_OFFSET 38
29856 +#define OAM_RDI_UNUSED_BYTE_OFFSET 1
29857 +#define OAM_LB_CRC_BYTE_OFFSET 46
29858 +#define OAM_RDI_CRC_BYTE_OFFSET 46
29859 +#define OAM_LB_CORRELATION_TAG_LEN 4
29860 +#define OAM_LB_LOCATION_ID_LEN 16
29861 +#define OAM_LB_SRC_ID_LEN 16
29862 +#define OAM_LB_UNUSED_BYTE_LEN 8
29863 +#define OAM_RDI_UNUSED_BYTE_LEN 45
29864 +#define OAM_LB_CRC_BYTE_LEN 2
29865 +#define OAM_RDI_CRC_BYTE_LEN 2
29866 +#define OAM_FAULT_MANAGEMENT_LB 0x18
29867 +#define OAM_FAULT_MANAGEMENT_RDI 0x11
29868 +#define OAM_FAULT_MANAGEMENT_LB_REQUEST 1
29869 +#define OAM_FAULT_MANAGEMENT_LB_RESPOND 0
29870 +#define OAM_FAULT_MANAGEMENT_CORRELATION_VAL 0xbcbcbcbc
29871 +#define OAM_FAULT_MANAGEMENT_SRC_ID_3 0xffffffff
29872 +#define OAM_FAULT_MANAGEMENT_SRC_ID_2 0xffffffff
29873 +#define OAM_FAULT_MANAGEMENT_SRC_ID_1 0xffffffff
29874 +#define OAM_FAULT_MANAGEMENT_SRC_ID_0 0xffffffff
29875 +#define OAM_FAULT_MANAGEMENT_LOCATION_ID_3 0xffffffff
29876 +#define OAM_FAULT_MANAGEMENT_LOCATION_ID_2 0xffffffff
29877 +#define OAM_FAULT_MANAGEMENT_LOCATION_ID_1 0xffffffff
29878 +#define OAM_FAULT_MANAGEMENT_LOCATION_ID_0 0xffffffff
29879 +#define OAM_LB_UNUSED_BYTE_DEFAULT 0x6a
29880 +#define OAM_LB_SEGMENT_TYPE 0
29881 +#define OAM_LB_END_TO_END_TYPE 1
29882 +#define OAM_F4_LB_SEGMENT_TYPE 2
29883 +#define OAM_F4_LB_END_TO_END_TYPE 3
29884 +#define RM_PROT_ID_OFFSET 0
29885 +#define RM_MESSAGE_TYPE_OFFSET 1
29886 +#define RM_PROTOCOL_ID 1
29887 +#define RM_TYPE_DEFAULT 0x20 /* forward/source_generated/congested */
29888 +#define RM_UNUSED_BYTES_OFFSET 2
29889 +#define RM_UNUSED_BYTES_LEN 46
29890 +#if defined(__cplusplus)
29894 +#endif // _ATMAPIDRV_H_
29896 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/atmdiag.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/atmdiag.h
29897 --- linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/atmdiag.h 1970-01-01 01:00:00.000000000 +0100
29898 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/atmdiag.h 2006-06-26 09:07:10.000000000 +0200
29901 +<:copyright-broadcom
29903 + Copyright (c) 2002 Broadcom Corporation
29904 + All Rights Reserved
29905 + No portions of this material may be reproduced in any form without the
29906 + written permission of:
29907 + Broadcom Corporation
29908 + 16215 Alton Parkway
29909 + Irvine, California 92619
29910 + All information contained in this document is Broadcom Corporation
29911 + company private, proprietary, and trade secret.
29916 +#ifndef __ATMDIAG_H__
29917 +#define __ATMDIAG_H__
29919 +//#define BRCM_6348
29921 +#if defined(__cplusplus)
29925 +#define ATM_DIAG_FAIL -1
29926 +#define ATM_DIAG_PASS 0
29927 +#define ATM_REGADDR 0xFFFE4000
29928 +#define ATM_REGSIZE 0x800
29929 +#define ATM_TX_VPI_VCI_CAM_OFFSET 0x500
29930 +#define ATM_RX_VPI_VCI_CAM_OFFSET 0x600
29931 +#define ATM_TRAFFIC_SHAPER_OFFSET 0x700
29932 +#define ATM_TX_STATUS_OFFSET 0x40c
29933 +#define ATM_RX_STATUS_OFFSET 0x41c
29934 +#define ATM_RX_AAL_STATUS_OFFSET 0x428
29935 +#define ATM_MIP_COUNTERS_OFFSET 0x440
29936 +#define ATM_UTOPIA_SETTING_OFFSET 0x42c
29937 +#define ATM_ADSL_PHY_PORT_SETTING 0x15c
29938 +#define UT_MAX_TDT_ENTRIES 2
29939 +#define UT_MAX_MGMT_ENTRIES 4
29940 +#define UT_LINE_RATE (146200000) /* 344811 cells/sec, CIT = 29ns */
29941 +#define UT_CELL_RATE (53 * 8)
29942 +#define UT_MIN_PCR_SCR 310 /* ~128Kbps */
29943 +#define UT_MAX_PCR_SCR 344811 /* ~146.2Kpbs */
29944 +#define UT_MIN_MBS 2
29945 +#define UT_MAX_MBS 200000
29946 + //#ifdef BRCM_6348 currently, the driver only support 8 VCCS
29947 + //#define UT_MAX_VCCS 16
29949 +#define UT_MAX_VCCS 8
29951 +#define UT_MAX_PHY_PORTS 2
29952 +#define UT_BASE_PORT_NUMBER 1
29953 +#define UT_MIN_QUEUE 1
29954 +#define UT_MAX_QUEUE UT_MAX_VCCS
29955 +#define UT_MULTI_QUEUE 1
29956 +#define UT_SINGLE_QUEUE 0
29957 +#define UT_MIN_PRIORITY 1
29958 +#define UT_MAX_PRIORITY 4 /* priority ranging from 1-4 */
29959 +#define UT_BUFFER_SIZE 20
29960 +#define UT_MGMT_IDX 6
29961 +#define UT_ENABLED 1
29962 +#define UT_DISABLED 0
29963 +#define UT_MAX_TD_INDEX UT_MAX_VCCS
29964 +#define UT_SSTED_TRAILER_SIZE 8
29965 +#define UT_DIALED_DIGITS 2
29966 +#define UT_FREE_CELL_Q_SIZE 800
29967 +#define UT_FREE_PKT_Q_SIZE 800
29968 +#define UT_FREE_PKT_Q_BUF_SIZE 1600
29969 +#define UT_RX_PKT_Q_SIZE 800
29970 +#define UT_RX_CELL_Q_SIZE 800
29971 +#define UT_AAL5_MAX_SDU_LENGTH 65535
29972 +#define UT_TX_FIFO_PRIORITY 4
29973 +#define UT_MIN_DATA_LEN 48
29974 +#define UT_MAX_DATA_LEN 1500
29975 +#define UT_BASE_VPI_NUMBER 0
29976 +#define UT_MAX_VPI_NUMBER 256
29977 +#define UT_BASE_VCI_NUMBER 32
29978 +#define UT_MAX_VCI_NUMBER 65536
29979 +#define UT_UTOPIA_MODE 1
29980 +#define UT_ADSL_MODE 0
29981 +#define UT_UTOPIA_ADSL_MODE 0x11 /* utopia port 0, adsl port 1 */
29982 +#define UT_TOGGLE_DISPLAY_MODE 1
29983 +#define UT_TOGGLE_CAPTURE_MODE 0
29984 +#define UT_TOGGLE_VERIFICATION_MODE 2
29985 +#define UT_TOGGLE_MODE_ON 1
29986 +#define UT_TOGGLE_MODE_OFF 0
29987 +#define UT_DUMP_TX_VPI_VCI_TABLE 1
29988 +#define UT_DUMP_RX_VPI_VCI_TABLE 2
29989 +#define UT_DISPLAY_STATS 1
29990 +#define UT_CLEAR_STATS 2
29991 +#define UT_TRAFFIC_DESCRIPTOR_DISPLAY 1
29992 +#define UT_TRAFFIC_DESCRIPTOR_MODIFY 2
29993 +#define UT_PORT_UTOPIA_SETTING 1
29994 +#define UT_GLOBAL_UTOPIA_SETTING 2
29995 +#define UT_DISPLAY_CAPTURED 0
29996 +#define UT_ERASE_CAPTURED 1
29997 +#define UT_CAPTURED_ERROR_STATS 2
29998 +#define UT_PATTERN_INCREMENT 1
29999 +#define UT_PATTERN_FIX 0
30000 +#define UT_MODIFY_OPERATION 1
30001 +#define UT_DISPLAY_OPERATION 0
30002 +#define DIAG_ATM_MODULE "bcmatmtest"
30003 +#define DIAG_ATM_PROC "/proc/atmtest"
30005 +/* command is made up of 2_bytes_command|2_bytes_index */
30006 +/* index is ranging from 0-7 for 8 VCs */
30007 +#define UT_PROC_CMD_ADD_VC 1
30008 +#define UT_PROC_CMD_DELETE_VC 2
30009 +#define UT_PROC_CMD_START_SEND_VC 3
30010 +#define UT_PROC_CMD_SEND_MULTI_VC 4
30011 +#define UT_PROC_CMD_STOP_SEND_VC 5
30012 +#define UT_PROC_CMD_CAPTURE 6
30013 +#define UT_PROC_CMD_TOGGLE 7
30014 +#define UT_PROC_CMD_GET_STATS 8
30015 +#define UT_PROC_CMD_CLEAR_STATS 9
30016 +#define UT_PROC_CMD_SEND_MULTI_PRIORITY 10
30017 +#define UT_PROC_CMD_MODIFY_TRAFFIC_SHAPER 11
30018 +#define UT_PROC_CMD_START_SEND_ALL_VC 12
30019 +#define UT_PROC_CMD_ADSL_LOOPBACK 13
30020 +#define UT_PROC_CMD_SEND_MANAGEMENT 14
30021 +#define UT_PROC_CMD_ADD_MPVC 15
30022 +#define UT_PROC_CMD_DELETE_MPVC 16
30023 +#define UT_PROC_CMD_START_SEND_MPVC 17
30024 +#define UT_PROC_CMD_UTOPIA_SET 18
30026 +#define UT_OAM_LB_END_TO_END 10 /* was 1 */
30027 +#define UT_OAM_LB_SEGMENT 11 /* was 2 */
30028 +#define UT_OAM_RDI_END_TO_END 3
30029 +#define UT_OAM_RDI_SEGMENT 4
30030 +#define UT_VPC_RM_TYPE 5
30031 +#define UT_VCC_RM_TYPE 6
30032 +#define UT_OAM_CRC10_SOFTWARE 0
30033 +#define UT_OAM_CRC10_HARDWARE 1
30034 +#define UT_TOGGLE_DISPLAY 0
30035 +#define UT_TOGGLE_CAPTURE 1
30036 +#define UT_TOGGLE_VERIFY 2
30038 +#define AP_REG_OFFSET_END 0x7ff
30039 +#define AP_INDIRECT_RAM_ADDRESS_REG ATM_PROCESSOR_BASE + 0x7c0
30040 +#define AP_INDIRECT_RAM_REG ATM_PROCESSOR_BASE + 0x7c4
30041 +#define AP_IRQ_MASK AP_INTR_REGS_BASE+0x4
30042 +#define AP_IRQ_STATUS AP_INTR_REGS_BASE
30043 +#define AP_ROUTE_OAM_TO_RCQ 0
30044 +#define AP_ROUTE_OAM_TO_MCF 1
30045 +#define AP_IR_ASSERT 1
30046 +#define AP_IR_DEASSERT 0
30047 +#define AP_RX_STATUS_ERR_MASK 0x32ecc /* mask out idleCell, vc & unused */
30048 +#define AP_RX_AAL_STATUS_ERR_MASK 0x3008 /* only look at rx router stats, discard */
30050 +typedef struct utVccCfg {
30052 + UINT8 ulAtmVccCpcsAcceptCorruptedPdus;
30053 +}UT_VCC_CFG, *pUT_VCC_CFG;
30055 +typedef struct utTrafficDescrParmEntry {
30056 + UINT32 ulTrafficDescrIndex;
30057 + UINT32 ulTrafficDescrType;
30058 + UINT32 ulTrafficDescrParm1;
30059 + UINT32 ulTrafficDescrParm2;
30060 + UINT32 ulTrafficDescrParm3;
30061 + UINT32 ulTrafficDescrParm4;
30062 + UINT32 ulTrafficDescrParm5;
30063 + UINT32 ulTrafficDescrRowStatus;
30064 + UINT32 ulServiceCategory;
30065 +}UT_TRAFFIC_DESCR_PARM_ENTRY,*pUT_TRAFFIC_DESCR_PARM_ENTRY;
30067 +typedef struct utMultiSendInfo {
30073 + UINT8 circuitType;
30074 + UINT32 cellsPerPdu;
30077 +}UT_MULTISEND_INFO, *pUT_MULTISEND_INFO;
30079 +typedef struct utUserSendInfo {
30081 + UINT8 incremental;
30086 + UINT32 txCount; /* number of cells/pkt user want to send */
30087 + UINT8 multiQPriority;
30088 + UINT8 basePriority;
30089 + UINT8 numOfQueues;
30090 +}UT_USER_SEND_INFO, *pUT_USER_SEND_INFO;
30092 +typedef struct utVccAddrInfo {
30093 + ATM_VCC_ADDR vccAddr;
30094 + UINT8 priority; /* priority of the queue of this VCC */
30095 + UINT8 numOfQueues;
30096 +}UT_VCC_ADDR_INFO, *pUT_VCC_ADDR_INFO;
30098 +typedef struct utVccListInfo {
30100 + UINT32 managementHandle;
30101 +}UT_VCC_LIST_INFO, *pUT_VCC_LIST_INFO;
30103 +typedef struct atmCaptureHdr {
30107 + UINT8 circuitType;
30115 +} ATM_CAPTURE_HDR, *pATM_CAPTURE_HDR;
30117 +typedef struct atmTxBufferHdr {
30118 + ATM_VCC_DATA_PARMS dataParms;
30119 + struct atmTxBufferHdr *next;
30120 +} ATM_TX_BUFFER_HDR, *pATM_TX_BUFFER_HDR;
30122 +typedef struct tx_buffer_list{
30123 + pATM_TX_BUFFER_HDR headPtr;
30124 + pATM_TX_BUFFER_HDR tailPtr;
30126 + UINT32 seqNumber;
30128 + UINT32 sentInterval;
30129 + UINT32 cellsPerPdu;
30130 +} ATM_TX_BUFFER_LIST, *pATM_TX_BUFFER_LIST;
30132 +typedef struct atmTestError {
30135 + UINT32 data_length;
30136 + UINT32 sequence_err;
30137 + UINT32 aalCrcError;
30138 + UINT32 aalCpcsLen0;
30139 + UINT32 aalLenError;
30140 + UINT32 aalSduLenError;
30154 + UINT32 aal5_drop_cell;
30155 + UINT32 routerDiscard_1;
30156 + UINT32 routerDiscard_0;
30160 +} ATM_TEST_ERROR, *pATM_TEST_ERROR;
30162 +typedef struct atmMibStats {
30163 + UINT32 tx_aal5_0;
30164 + UINT32 tx_aal5_1;
30165 + UINT32 tx_aal0_0;
30166 + UINT32 tx_aal0_1;
30167 + UINT32 rx_aal5_0;
30168 + UINT32 rx_aal5_1;
30169 + UINT32 rx_aal0_0;
30170 + UINT32 rx_aal0_1;
30171 +} ATM_MIB_STATS, *pATM_MIB_STATS;
30173 +/* These are from TX status register; they are collected every 1 second interval */
30174 +typedef struct atmTxStats {
30175 + UINT32 fifoFull; /* fifoFull_port0 */
30176 + UINT32 aal2bigErr;
30177 + UINT32 aal5LenErr;
30178 + UINT32 aal5MaxLenErr;
30179 + UINT32 droppedCellErr; /* tx aal or tx atm dropped cell port 0 */
30180 + UINT32 aal5PortNotEnableErr; /* pne_err_port0 */
30181 + UINT32 fifoFullErr; /* ff_err_port0 */
30182 + UINT32 aal5CountErr;
30183 +} ATM_TX_STATS, *pATM_TX_STATS;
30185 +/* these are from RX ATM and RX AAL status registers */
30186 +typedef struct atmRxStats {
30190 + UINT32 vcamMmErr; /* vcam_mme VCAM multiple match error */
30191 + UINT32 camLookupErr; /* came_port0 */
30192 + UINT32 portNotEnableErr; /* pne_err */
30193 + UINT32 discardErr; /* dc_port0 */
30194 + UINT32 errCellErr; /* ec_port0 */
30195 + UINT32 routerDrop; /* rxRouterStat_port0 */
30196 + UINT32 aalDrop; /* aal5d */
30198 + UINT32 overflowErr;
30199 + UINT32 uto2small;
30202 +} ATM_RX_STATS, *pATM_RX_STATS;
30204 +typedef struct atmStats
30206 + ATM_MIB_STATS mibStats;
30207 + ATM_TX_STATS txStats;
30208 + ATM_RX_STATS rxStats;
30209 +}ATM_STATS, *pATM_STATS;
30211 +typedef struct atm_test_tx_info {
30214 + UINT32 lineTxInterval;
30216 + UINT8 incremental;
30219 + UINT8 numOfQueues;
30220 + UINT8 basePriority;
30224 + UINT8 managementType; /* f4, f5, rm */
30225 + UINT8 interleaveManagement;
30226 + UINT16 managementVpi;
30227 + UINT16 managementVci;
30228 + UINT16 managementCrc;
30229 + UINT32 managementInterface;
30230 +} ATM_TEST_TX_INFO, *pATM_TEST_TX_INFO;
30232 +typedef struct atm_test_info {
30233 + ATM_TEST_TX_INFO atmTestTxInfo[UT_MAX_VCCS+1]; /* one extra for f4 since it doesn't
30234 + have a vcc created, index is last one */
30235 + UT_TRAFFIC_DESCR_PARM_ENTRY ms_Tdt[UT_MAX_TD_INDEX];
30236 + UT_VCC_CFG ms_VccCfgs[UT_MAX_VCCS];
30237 + UT_VCC_ADDR_INFO ms_VccAddrs[UT_MAX_VCCS];
30238 + UINT32 commandStatus; /* command-2 bytes, status 2 bytes */
30239 + ATM_TEST_ERROR m_ucTestError[UT_MAX_VCCS+1];
30240 + ATM_STATS atmStats;
30241 + UINT8 displayData; /* current mode: 0=disable, 1=enable */
30242 + UINT8 captureData; /* current mode: 0=disable, 1=enable */
30243 + UINT8 verifyData; /* current mode: 0=disable, 1=enable */
30244 + UINT32 pduSent[UT_MAX_VCCS+1]; /* one extra for f4 */
30245 + UINT32 pduReceived[UT_MAX_VCCS+1];
30246 + UINT32 multiPriority;
30247 +} ATM_TEST_INFO, *pATM_TEST_INFO;
30249 +typedef struct atm_verfication_info {
30251 + UINT8 incremental;
30254 +} ATM_VERIFICATION_INFO, *pATM_VERIFICATION_INFO;
30256 +typedef struct atm_data_struct {
30257 + PATM_VCC_DATA_PARMS data;
30258 + ATM_VCC_ADDR vccAddr;
30259 +} ATM_DATA_STRUCT, *PATM_DATA_STRUCT;
30261 +typedef struct atmDiagCb {
30262 + ATM_TRAFFIC_DESCR_PARM_ENTRY ms_Tdt[UT_MAX_TD_INDEX];
30263 + ATM_VCC_CFG ms_VccCfgs[UT_MAX_VCCS];
30264 + UT_VCC_ADDR_INFO ms_VccAddrs[UT_MAX_VCCS];
30265 + UINT32 ms_multiPriority[UT_MAX_VCCS];
30266 + ATM_TX_BUFFER_LIST mTxHdrQ[UT_MAX_VCCS+1]; /* tx Q; an extra one for f4 cells */
30267 + UT_VCC_LIST_INFO m_ulVccList[UT_MAX_VCCS+1]; /* tx Q; an extra one for f4 cells */
30268 + UINT32 managementHandle_port0;
30269 + UINT32 managementHandle_port1;
30272 + UINT32 statsTaskId;
30273 + UINT32 rxTaskSem; /* protect Rx Q */
30274 + UINT32 txTaskSem; /* protect Tx Q */
30275 + UINT32 rxQMuSem; /* rx task semphore */
30276 + UINT32 txQMuSem; /* tx task semphore */
30277 + UINT32 txTaskExit; /* clean up purpose */
30278 + UINT32 rxTaskExit; /* clean up purpose */
30279 + ATM_DATA_STRUCT m_pDpHead; /* rx Q */
30280 + ATM_DATA_STRUCT m_pDpTail; /* rx Q */
30281 + UINT8 displayData; /* 1 to display rx data on screen; default is 0 */
30282 + UINT8 captureData;
30283 + UINT8 verifyData;
30284 + ATM_CAPTURE_HDR m_ulData[UT_BUFFER_SIZE];
30285 + int m_ulBufferPosition;
30286 + UINT32 m_ulCurSeqNumber;
30287 + ATM_TEST_ERROR m_ucTestError[UT_MAX_VCCS+1];
30288 + ATM_STATS m_atmStats;
30289 + ATM_VERIFICATION_INFO dataVerficationInfo[UT_MAX_VCCS];
30291 +} ATM_DIAG_CB, *pATM_DIAG_CB;
30294 +typedef union phyLastDescConfig {
30296 + UINT32 unused:22;
30298 + UINT32 unused1:2;
30300 + UINT32 numRxDesc:2;
30301 + UINT32 numTxDesc:2;
30304 +} PHY_LAST_DESC_CONFIG, *pPHY_LAST_DESC_CONFIG;
30306 +/* 0xfffe4500-0xfffe45ff */
30307 +typedef union txAtmVpiVciTable {
30310 + UINT32 swFlags:1;
30311 + UINT32 crcEnable:1;
30316 +} TX_ATM_VPI_VCI_TABLE, *pTX_ATM_VPI_VCI_TABLE;
30318 +/* 0xfffe4600-0xfffe46ff */
30319 +typedef union RxAtmVpiVciTable {
30326 + } camSide; /* even; */
30328 + UINT32 unused:21;
30329 + UINT32 userDataIR:1; /* assert IR for user data immediate response */
30330 + UINT32 oamIR:1; /* assert IR for OAM immediate response */
30331 + UINT32 rmIR:1; /* assert IR for RM immediate response */
30332 + UINT32 vcId:3; /* VCID */
30333 + UINT32 userDataCrcEnable:1;
30334 + UINT32 oamRouteCode:1; /* 0=route to rx cell q; 1= route to rx mips cell fifo */
30335 + UINT32 udrc:1; /* User Data Routing Code */
30336 + UINT32 circuitType:2;
30337 + } ramSide; /* odd; */
30339 +} RX_ATM_VPI_VCI_TABLE, *pRX_ATM_VPI_VCI_TABLE;
30341 +/* 6345; 0xfffe4300- 0xfffe43ff */
30342 +typedef union atmIntrRegs {
30344 + UINT32 unused:20;
30345 + UINT32 vcamMm:1; /* RX VCAM multiple match */
30346 + UINT32 rxRtDc:1; /* Rx Router discard cell due to full rx buffer */
30347 + UINT32 rpqIr:1; /* Receive Packet Queue got a packet tagged with immediate response */
30348 + UINT32 rcqIr:1; /* Receive Cell Queue got a cell tagged with immediate response */
30349 + UINT32 rpqWd:1; /* RX Pkt Q watchdog- no pkt rxed for the duration defined in RCQ wd timer */
30350 + UINT32 rcqWd:1; /* RX Cell Q watchdog */
30351 + UINT32 mibHf:1; /* one or more of the MIB coutners is half full */
30352 + UINT32 fpqAe:1; /* Free Packet Queue almost empty- has fewer buffers than FPQ watermark */
30353 + UINT32 rpqAf:1; /* Rx Packet Queue has exceeded RPQ watermark */
30354 + UINT32 fcqAe:1; /* Free Cell Queue almost Empty */
30355 + UINT32 rcqAf:1; /* Rx Cell Q almost full */
30356 + UINT32 txs:1; /* Tx SDRAM Interrupt- one of the TX SDRAM sub-channels intr is set */
30357 + }statusMaskBit; /* status & interrupt mask */
30360 + UINT32 unused1:8;
30361 + UINT32 sdqMask:8; /* TX SDRAM watchdog timer interrupt */
30363 + UINT32 irqMask:12;
30366 + UINT32 unused:28;
30367 + UINT32 sdWd:4; /* TX SDRAM Watchdog */
30371 + UINT32 unused:16;
30372 + UINT32 irqMask:16;
30374 +#endif /* BRCM_6348 */
30376 + UINT32 fcqAeWm:16; /* Free Cell Q almost empty watermark */
30377 + UINT32 rcqAfWm:16; /* Rx Cell Q almost full watermark */
30380 + UINT32 fpqAeWm:16; /* Free Packet Q almost empty watermark */
30381 + UINT32 rpqAfWm:16; /* Rx Paket Q almost full watermark */
30384 + UINT32 pktWdTo:16; /* Watchdog timeout value in 50 uSec increments */
30385 + UINT32 cellWdTo:16; /* Watchdog timeout value in 50 uSec increments */
30387 +} ATM_INTR_REGS, *pATM_INTR_REGS;
30389 +/* 0xfffe4700-0xfffe47ff */
30390 +typedef union atmShaperCtrlReg {
30394 + UINT32 rst:1; /* reset shaper */
30395 + UINT32 pcr:12; /* peak cell rate */
30396 + UINT32 mpEn:1; /* Multi-priority enabled */
30397 + UINT32 priority:2; /* source scheduling sub-priority */
30398 + UINT32 mcrEnable:1;/* Minimum Cell Rate Enabled */
30399 + UINT32 alg:2; /* source shaping algorithm */
30400 + UINT32 pid:1; /* Source destination Port ID */
30401 + UINT32 vcid:4; /* source VC ID */
30402 + UINT32 enable:1; /* source shaper enable */
30407 + UINT32 rst:1; /* reset shaper */
30408 + UINT32 pcr:12; /* peak cell rate */
30409 + UINT32 mpEn:1; /* Multi-priority enabled */
30410 + UINT32 priority:2; /* source scheduling sub-priority */
30411 + UINT32 alg:2; /* source shaping algorithm */
30412 + UINT32 pid:1; /* Source destination Port ID */
30413 + UINT32 vcid:3; /* source VC ID */
30414 + UINT32 enable:1; /* source shaper enable */
30416 +#endif /* BRCM_6348 */
30418 +} ATM_SHAPER_CTRL_REG, *pATM_SHAPER_CTRL_REG;
30420 +typedef union atmShaperVbrReg {
30427 +} ATM_SHAPER_VBR_REG, *pATM_SHAPER_VBR_REG;
30430 +typedef union atmShaperMcrReg {
30432 + UINT32 unused:20;
30436 +} ATM_SHAPER_MCR_REG, *pATM_SHAPER_MCR_REG;
30437 +#endif /* BRCM_6348 */
30439 +typedef union atmCellHdr {
30442 + UINT32 msb_vpi:4;
30444 + UINT32 msb_vci:4;
30446 + UINT32 lsb_vci:4;
30451 +} ATM_CELL_HDR, *pATM_CELL_HDR;
30452 +#define ATM_RX_AAL_STATUS_ERROR_MASK_PORT0 0x108
30455 +typedef union atmRxAalStatusReg {
30457 + UINT32 unused:22;
30458 + UINT32 rxRouterStat_port1:1; /* RX cells dropped due to full cell buffer; */
30459 + UINT32 rxRouterStat_port0:1; /* bit 8=port 0 fifo rx drop cell */
30460 + UINT32 aal0ccnt_port1:1; /* aal0 cell count has been incremented; bit 4=port0 */
30461 + UINT32 aal0ccnt_port0:1; /* aal0 cell count has been incremented; bit 4=port0 */
30462 + UINT32 aal5ccnt_port1:1; /* aal5 cell count has been incremented; bit 4=port0 */
30463 + UINT32 aal5ccnt_port0:1; /* aal5 cell count has been incremented; bit 4=port0 */
30464 + UINT32 aal5d:1; /* aal5 dropped cells */
30465 + UINT32 aal5p:1; /* aal5 pdu received */
30466 + UINT32 aalxp:1; /* non aal5 received */
30467 + UINT32 aal5c:1; /* aal5 received cells */
30470 +} ATM_RX_AAL_STATUS_REG, *pATM_RX_AAL_STATUS_REG;
30472 +#define ATM_RX_STATUS_ERROR_MASK_PORT0 0x32354
30473 +typedef union atmRxStatusReg {
30475 + UINT32 unused:14;
30476 + UINT32 gfc_err:1; /* non zero gfc detected */
30477 + UINT32 crc_err:1; /* CRC-10 error detected on OAM/RM cells */
30479 + UINT32 rx_flow_err:1; /* Receive cell dropped by RXATM layer 'cause RX cell FIFO full */
30481 + UINT32 unused1:1;
30483 + UINT32 idle_err:1; /* Idle cell detected */
30484 + UINT32 pti_err:1; /* PTI Error detected (i.e. PT=binary 111) */
30486 + UINT32 unused2:1;
30487 + UINT32 uto2small:1;/* Too small of a cell from RX Utopia */
30488 + UINT32 uto2big:1; /* Too big of a cell from RX Utopia */
30489 +#else /* BRCM_6345 */
30490 + UINT32 unused2:3;
30492 + UINT32 vcam_mme:1; /* VCAM multiple match error */
30493 + UINT32 pne_err:1; /* port not enable error */
30494 + UINT32 came_port1:1; /* PER port cam lookup error; bit6=port 0 */
30495 + UINT32 came_port0:1; /* PER port cam lookup error; bit6=port 0 */
30496 + UINT32 dc_port1:1; /* per port dropped cell; bit 4= port 0 */
30497 + UINT32 dc_port0:1; /* per port dropped cell; bit 4= port 0 */
30498 + UINT32 ec_port1:1; /* per port erred cell; bit 2=port 0 */
30499 + UINT32 ec_port0:1; /* per port erred cell; bit 2=port 0 */
30500 + UINT32 vc_port1:1; /* per port valid cell; bit 0=port 0 */
30501 + UINT32 vc_port0:1; /* per port valid cell; bit 0=port 0 */
30504 +} ATM_RX_STATUS_REG, *pATM_RX_STATUS_REG;
30506 +#define ATM_TX_STATUS_ERROR_MASK_PORT0 0x41e80c54
30507 +typedef union atmTxStatusReg {
30509 + UINT32 fifoFull_port1:1; /* per port FIFO Full Status (1=full) */
30510 + UINT32 fifoFull_port0:1; /* per port FIFO Full Status (1=full) */
30512 + UINT32 aal0_port1:1; /* aal0_port1 tx */
30513 + UINT32 aal0_port0:1; /* aal0_port0 tx */
30514 + UINT32 aal5_port1:1; /* aal5_port1 tx */
30515 + UINT32 aal5_port0:1; /* aal5_port0 tx */
30516 + UINT32 aal2big:1; /* aal too big cell input */
30517 + UINT32 aal5liErr:1;/* aal5 length indicator error */
30518 + UINT32 aal5mlErr:1;/* aal5 max length error */
30519 + UINT32 aal5ctErr:1;/* aal5 count error */
30520 + UINT32 unused1:1;
30521 + UINT32 aal5d:1; /* aal5 drop cell */
30522 + UINT32 aal5p:1; /* aal5 pdu passed */
30523 + UINT32 aalxc:1; /* non aal5 cell passed */
30524 + UINT32 aal5c:1; /* aal cell passed */
30525 + UINT32 dropCell_port1:1; /* tx aal or tx atm dropped cell */
30526 + UINT32 dropReq_port1:1; /* one of the port dropped request */
30527 + UINT32 scheCell_port1:1; /* per port scheduled cell */
30528 + UINT32 sit_port1:1; /* per port schedule interval timer count event */
30529 + UINT32 dropCell_port0:1; /* tx aal or tx atm dropped cell */
30530 + UINT32 dropReq_port0:1; /* one of the port dropped request */
30531 + UINT32 scheCell_port0:1; /* per port scheduled cell */
30532 + UINT32 sit_port0:1; /* per port schedule interval timer count event */
30533 + UINT32 pne_err_port1:1; /* port not enable error */
30534 + UINT32 pne_err_port0:1; /* port not enable error */
30535 + UINT32 ff_err_port1:1; /* fifo full error */
30536 + UINT32 ff_err_port0:1; /* fifo full error */
30537 + UINT32 dc_port1:1; /* per port dropped cell */
30538 + UINT32 dc_port0:1; /* per port dropped cell */
30539 + UINT32 pc_port1:1; /* per port processed cell */
30540 + UINT32 pc_port0:1; /* per port processed cell */
30543 +} ATM_TX_STATUS_REG, *pATM_TX_STATUS_REG;
30546 +typedef union atmTxHdrReg {
30548 + UINT32 unused1:14;
30549 + UINT32 aal5SwTrailer:1; /* software trailer enable */
30550 + UINT32 schedCrst_1:1; /* scheuler reset */
30551 + UINT32 schedCrst_0:1;
30553 + UINT32 haltShpt_1:1; /* halt shaper, used for dynamic configuration of shaper */
30554 + UINT32 haltShpt_0:1;
30555 + UINT32 altGFC:4; /* alternate GFC value */
30556 + UINT32 altGFCen_1:1;
30557 + UINT32 altGFCen_0:1; /* alternate GFC mode enable */
30560 + UINT32 oamCrcEn_1:1;
30561 + UINT32 oamCrcEn_0:1;
30566 +} ATM_TX_HDR_CFG_REG, *pATM_TX_HDR_CFG_REG;
30568 +typedef union rxAalError {
30570 + UINT8 crc:1; /* aal5 CRC error */
30571 + UINT8 cpcsLen0:1; /* aal5 cpcsLen error */
30572 + UINT8 length:1; /* aal5 len error */
30573 + UINT8 maxSduExceed:1; /* max sdu exceed error */
30579 +typedef union rxAtmError {
30581 + UINT8 pne:1; /* port not enable error */
30582 + UINT8 hec:1; /* HEC error */
30583 + UINT8 pti:1; /* pti error */
30584 + UINT8 idle:1; /* idle rx */
30585 + UINT8 camLkup:1; /* cam look up error */
30587 + UINT8 oamCrc:1; /* oam crc */
30588 + UINT8 gfc:1; /* gfc error */
30594 +typedef union atmUtopiaCfg {
30596 + UINT32 unused:26;
30597 + UINT32 rxLevel2:1; /* when set=level 2, when 0=level 1 */
30598 + UINT32 rxEn:1; /* enable RX Utopia Operation */
30599 + UINT32 unused1:2;
30600 + UINT32 txLevel2:1; /* when set=level 2, when 0=level 1 */
30601 + UINT32 txEn:1; /* enable TX Utopia Operation */
30604 +} ATM_UTOPIA_CFG, *pATM_UTOPIA_CFG;
30606 +typedef union portSchedulerCfg {
30609 + UINT32 unused:12;
30615 +} ATM_PORT_SCHEDULER_CFG, *pATM_PORT_SCHEDULER_CFG;
30617 +/* memory map operation definition */
30618 +typedef struct atm_regs {
30621 + unsigned long addr;
30622 + unsigned int size;
30623 + unsigned int offset;
30626 +int getVccNextIndex(void);
30627 +void removeVccIndex(int index);
30628 +int isVpiVciExisted(UINT32 interface, UINT16 vpi, UINT16 vci);
30629 +void atmDiagInit(void);
30630 +BCMATM_STATUS bcmAtmDiagInit(void);
30631 +BCMATM_STATUS bcmAtmDiagUnInit(void);
30632 +BCMATM_STATUS bcmAtmAddVccCommand(pUT_VCC_ADDR_INFO pVccAddrs, pUT_VCC_CFG pVccCfg,
30633 + pUT_TRAFFIC_DESCR_PARM_ENTRY pTd);
30634 +BCMATM_STATUS bcmAtmSendVccCommand(pATM_TEST_TX_INFO pAtmInfo);
30635 +BCMATM_STATUS bcmAtmCaptureCommand(int mode);
30636 +BCMATM_STATUS bcmAtmSendManagementCommand(pATM_TEST_TX_INFO pAtmInfo);
30637 +BCMATM_STATUS bcmAtmDeleteVccCommand(pUT_VCC_ADDR_INFO pVccAddrs);
30638 +BCMATM_STATUS bcmAtmSendAllVccsCommand(pATM_TEST_TX_INFO pAtmInfo);
30639 +BCMATM_STATUS bcmAtmSendMultiPriorityCommand(pATM_TEST_TX_INFO pAtmInfo);
30640 +BCMATM_STATUS bcmAtmSendLoopbackCommand(UINT8 mode);
30641 +BCMATM_STATUS bcmAtmAddMPVccCommand(pUT_VCC_ADDR_INFO pVccAddrs, pUT_VCC_CFG pVccCfg,
30642 + pUT_TRAFFIC_DESCR_PARM_ENTRY pTd);
30643 +BCMATM_STATUS bcmAtmDeleteMPVccCommand(pUT_VCC_ADDR_INFO pVccAddrs);
30644 +BCMATM_STATUS bcmAtmSendMPVccCommand(pATM_TEST_TX_INFO pAtmInfo);
30645 +BCMATM_STATUS bcmAtmSendMultiPriorityCommand(pATM_TEST_TX_INFO pAtmInfo);
30646 +BCMATM_STATUS bcmAtmModifyTDCommand(pUT_TRAFFIC_DESCR_PARM_ENTRY pTD, UINT32 index);
30647 +int bcmAtmGetStatsCommand(int reset);
30648 +int bcmAtmToggleVerifyCommand(void);
30649 +int bcmAtmToggleCaptureCommand(void);
30650 +int bcmAtmToggleDisplayCommand(void);
30651 +int bcmAtmStopTxCommand(void);
30652 +int isVpiVciExisted(UINT32 interface, UINT16 vpi, UINT16 vci);
30653 +int bcmDiag_unmapregs(atm_regs *mapregs);
30654 +atm_regs *bcmDiag_mapregs(unsigned long addr, int size);
30655 +int bcmDiagGetVerificationStats(int vcc,char *pResult);
30656 +void bcmDiagClearSARstats(void);
30657 +void bcmDiagReadSARstats(int parm);
30658 +int bcmDiagGetSARStats(char *pResult);
30659 +#if defined(__cplusplus)
30664 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/atmosservices.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/atmosservices.h
30665 --- linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/atmosservices.h 1970-01-01 01:00:00.000000000 +0100
30666 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/atmosservices.h 2006-06-26 09:07:10.000000000 +0200
30669 +<:copyright-broadcom
30671 + Copyright (c) 2002 Broadcom Corporation
30672 + All Rights Reserved
30673 + No portions of this material may be reproduced in any form without the
30674 + written permission of:
30675 + Broadcom Corporation
30676 + 16215 Alton Parkway
30677 + Irvine, California 92619
30678 + All information contained in this document is Broadcom Corporation
30679 + company private, proprietary, and trade secret.
30683 +//**************************************************************************
30684 +// File Name : BcmAtmApi.h
30686 +// Description: This file contains the definitions, structures and function
30687 +// prototypes for the Broadcom Asynchronous Transfer Mode (ATM)
30688 +// Application Program Interface (API).
30690 +// Updates : 09/15/2000 lat. Created.
30691 +//**************************************************************************
30693 +#if !defined(_ATMOSSERVICES_H_)
30694 +#define _ATMOSSERVICES_H_
30696 +#if defined(__cplusplus)
30700 +//**************************************************************************
30701 +// Constant Definitions
30702 +//**************************************************************************
30703 +#define RTN_SUCCESS 0
30704 +#define RTN_ERROR 1
30705 +#define USE_CURRENT_THREAD_PRIORITY 0
30707 +//**************************************************************************
30708 +// Type Definitions
30709 +//**************************************************************************
30710 +typedef void (*FN_GENERIC) (void *);
30711 +typedef struct AtmOsFuncs
30713 + FN_GENERIC pfnAlloc;
30714 + FN_GENERIC pfnFree;
30715 + FN_GENERIC pfnDelay;
30716 + FN_GENERIC pfnCreateSem;
30717 + FN_GENERIC pfnRequestSem;
30718 + FN_GENERIC pfnReleaseSem;
30719 + FN_GENERIC pfnDeleteSem;
30720 + FN_GENERIC pfnDisableInts;
30721 + FN_GENERIC pfnEnableInts;
30722 + FN_GENERIC pfnInvalidateCache;
30723 + FN_GENERIC pfnFlushCache;
30724 + FN_GENERIC pfnGetTopMemAddr;
30725 + FN_GENERIC pfnBlinkLed;
30726 + FN_GENERIC pfnGetSystemTick;
30727 + FN_GENERIC pfnStartTimer;
30728 + FN_GENERIC pfnPrintf;
30729 +} ATM_OS_FUNCS, *PATM_OS_FUNCS;
30731 +//**************************************************************************
30732 +// Function Prototypes
30733 +//**************************************************************************
30735 +UINT32 AtmOsInitialize( PATM_OS_FUNCS pFuncs );
30736 +char *AtmOsAlloc( UINT32 ulSize );
30737 +void AtmOsFree( char *pBuf );
30738 +UINT32 AtmOsCreateThread( char *pszName, void *pFnEntry, UINT32 ulFnParm,
30739 + UINT32 ulPriority, UINT32 ulStackSize, UINT32 *pulThreadId );
30740 +UINT32 AtmOsCreateSem( UINT32 ulInitialState );
30741 +UINT32 AtmOsRequestSem( UINT32 ulSem, UINT32 ulTimeoutMs );
30742 +void AtmOsReleaseSem( UINT32 ulSem );
30743 +void AtmOsDeleteSem( UINT32 ulSem );
30744 +UINT32 AtmOsDisableInts( void );
30745 +void AtmOsEnableInts( UINT32 ulLevel );
30746 +void AtmOsDelay( UINT32 ulTimeoutMs );
30747 +UINT32 AtmOsTickGet( void );
30748 +UINT32 AtmOsTickCheck( UINT32 ulWaitTime, UINT32 ulMsToWait );
30749 +void AtmOsInvalidateCache( void *pBuf, UINT32 ulLength );
30750 +void AtmOsFlushCache( void *pBuf, UINT32 ulLength );
30751 +char *AtmOsTopMemAddr( void );
30752 +void AtmOsBlinkLed( void );
30753 +UINT32 AtmOsInitDeferredHandler( void *pFnEntry, UINT32 ulFnParm,
30754 + UINT32 ulTimeout );
30755 +void AtmOsScheduleDeferred( UINT32 ulHandle );
30756 +void AtmOsUninitDeferredHandler( UINT32 ulHandle );
30757 +UINT32 AtmOsStartTimer( void *pFnEntry, UINT32 ulFnParm, UINT32 ulTimeout );
30758 +void AtmOsPrintf( char *, ... );
30760 +#if defined(__cplusplus)
30764 +#endif // _ATMOSSERVICES_H_
30766 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/bcm_common.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/bcm_common.h
30767 --- linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/bcm_common.h 1970-01-01 01:00:00.000000000 +0100
30768 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/bcm_common.h 2006-06-26 09:07:10.000000000 +0200
30771 +<:copyright-broadcom
30773 + Copyright (c) 2004 Broadcom Corporation
30774 + All Rights Reserved
30775 + No portions of this material may be reproduced in any form without the
30776 + written permission of:
30777 + Broadcom Corporation
30778 + 16215 Alton Parkway
30779 + Irvine, California 92619
30780 + All information contained in this document is Broadcom Corporation
30781 + company private, proprietary, and trade secret.
30786 +#ifndef __BCM_COMMON_H
30787 +#define __BCM_COMMON_H
30789 +#if defined(CONFIG_BCM96338)
30790 +#include <6338_common.h>
30792 +#if defined(CONFIG_BCM96345)
30793 +#include <6345_common.h>
30795 +#if defined(CONFIG_BCM96348)
30796 +#include <6348_common.h>
30799 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,5) /* starting from 2.4.5 */
30800 +#define skb_dataref(x) (&skb_shinfo(x)->dataref)
30802 +#define skb_dataref(x) skb_datarefp(x)
30805 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,19) /* starting from 2.4.19 */
30806 +#define VIRT_TO_PHY(a) (((unsigned long)(a)) & 0x1fffffff)
30808 +#define VIRT_TO_PHY virt_to_phys
30811 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
30812 +#define __save_and_cli save_and_cli
30813 +#define __restore_flags restore_flags
30818 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/bcm_map.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/bcm_map.h
30819 --- linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/bcm_map.h 1970-01-01 01:00:00.000000000 +0100
30820 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/bcm_map.h 2006-06-26 09:07:10.000000000 +0200
30823 +<:copyright-broadcom
30825 + Copyright (c) 2004 Broadcom Corporation
30826 + All Rights Reserved
30827 + No portions of this material may be reproduced in any form without the
30828 + written permission of:
30829 + Broadcom Corporation
30830 + 16215 Alton Parkway
30831 + Irvine, California 92619
30832 + All information contained in this document is Broadcom Corporation
30833 + company private, proprietary, and trade secret.
30838 +#ifndef __BCM_MAP_H
30839 +#define __BCM_MAP_H
30841 +#if defined(CONFIG_BCM96338)
30842 +#include <6338_map.h>
30844 +#if defined(CONFIG_BCM96345)
30845 +#include <6345_map.h>
30847 +#if defined(CONFIG_BCM96348)
30848 +#include <6348_map.h>
30853 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/bcmadsl.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/bcmadsl.h
30854 --- linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/bcmadsl.h 1970-01-01 01:00:00.000000000 +0100
30855 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/bcmadsl.h 2006-06-26 09:07:10.000000000 +0200
30858 +<:copyright-broadcom
30860 + Copyright (c) 2002 Broadcom Corporation
30861 + All Rights Reserved
30862 + No portions of this material may be reproduced in any form without the
30863 + written permission of:
30864 + Broadcom Corporation
30865 + 16215 Alton Parkway
30866 + Irvine, California 92619
30867 + All information contained in this document is Broadcom Corporation
30868 + company private, proprietary, and trade secret.
30872 +//**************************************************************************
30873 +// File Name : Adsl.h
30875 +// Description: This file contains the definitions, structures and function
30876 +// prototypes for ADSL PHY interface
30878 +//**************************************************************************
30879 +#if !defined(_BCMADSL_H_)
30880 +#define _BCMADSL_H_
30882 +#if defined(__cplusplus)
30887 +#include "AdslMibDef.h"
30889 +//**************************************************************************
30890 +// Type Definitions
30891 +//**************************************************************************
30893 +// Return status values
30894 +typedef enum BcmAdslStatus
30896 + BCMADSL_STATUS_SUCCESS = 0,
30897 + BCMADSL_STATUS_ERROR
30900 +// Return status values
30901 +typedef enum AdslLinkState
30903 + BCM_ADSL_LINK_UP = 0,
30904 + BCM_ADSL_LINK_DOWN,
30905 + BCM_ADSL_TRAINING_G992_EXCHANGE,
30906 + BCM_ADSL_TRAINING_G992_CHANNEL_ANALYSIS,
30907 + BCM_ADSL_TRAINING_G992_STARTED,
30908 + BCM_ADSL_TRAINING_G994,
30909 + BCM_ADSL_G994_NONSTDINFO_RECEIVED,
30910 + BCM_ADSL_BERT_COMPLETE,
30911 + BCM_ADSL_ATM_IDLE,
30913 + BCM_ADSL_G997_FRAME_RECEIVED,
30914 + BCM_ADSL_G997_FRAME_SENT
30915 +} ADSL_LINK_STATE;
30917 +#ifndef DISABLE_ADSL_OLD_DEF
30918 +#define ADSL_LINK_UP BCM_ADSL_LINK_UP
30919 +#define ADSL_LINK_DOWN BCM_ADSL_LINK_DOWN
30922 +/* ADSL test modes */
30923 +typedef enum AdslTestMode
30925 + ADSL_TEST_NORMAL = 0,
30926 + ADSL_TEST_REVERB,
30927 + ADSL_TEST_MEDLEY,
30928 + ADSL_TEST_SELECT_TONES,
30929 + ADSL_TEST_NO_AUTO_RETRAIN,
30930 + ADSL_TEST_MARGIN_TWEAK,
30931 + ADSL_TEST_ESTIMATE_PLL_PHASE,
30932 + ADSL_TEST_REPORT_PLL_PHASE_STATUS,
30933 + ADSL_TEST_AFELOOPBACK,
30935 + ADSL_TEST_DIAGMODE,
30939 +// ADSL_CHANNEL_ADDR Contains ADSL Utopia PHY addresses
30940 +typedef struct AdslChannelAddr
30942 + UINT16 usFastChannelAddr;
30943 + UINT16 usInterleavedChannelAddr;
30944 +} ADSL_CHANNEL_ADDR, *PADSL_CHANNEL_ADDR;
30946 +// ADSL_CONNECTION_INFO Contains ADSL Connection Info
30947 +typedef struct AdslConnectionInfo
30949 + ADSL_LINK_STATE LinkState;
30950 + UINT32 ulFastUpStreamRate;
30951 + UINT32 ulFastDnStreamRate;
30952 + UINT32 ulInterleavedUpStreamRate;
30953 + UINT32 ulInterleavedDnStreamRate;
30954 +} ADSL_CONNECTION_INFO, *PADSL_CONNECTION_INFO;
30956 +/* OEM parameter definition */
30957 +#define ADSL_OEM_G994_VENDOR_ID 1 /* Vendor ID used during G.994 handshake */
30958 +#define ADSL_OEM_G994_XMT_NS_INFO 2 /* G.994 non-standard info field to send */
30959 +#define ADSL_OEM_G994_RCV_NS_INFO 3 /* G.994 received non-standard */
30960 +#define ADSL_OEM_EOC_VENDOR_ID 4 /* EOC reg. 0 */
30961 +#define ADSL_OEM_EOC_VERSION 5 /* EOC reg. 1 */
30962 +#define ADSL_OEM_EOC_SERIAL_NUMBER 6 /* EOC reg. 2 */
30963 +#define ADSL_OEM_T1413_VENDOR_ID 7 /* Vendor ID used during T1.413 handshake */
30964 +#define ADSL_OEM_T1413_EOC_VENDOR_ID 8 /* EOC reg. 0 (vendor ID) in T1.413 mode */
30966 +/* XMT gain definitions */
30967 +#define ADSL_XMT_GAIN_AUTO 0x80000000
30976 +} ADSL_DIAG, *PADSL_DIAG;
30982 +} ADSL_CONSTELLATION_POINT, *PADSL_CONSTELLATION_POINT;
30984 +#define ADSL_CONSTEL_DATA_ID 0
30985 +#define ADSL_CONSTEL_PILOT_ID 1
30987 +#define ADSL_MIB_INFO adslMibInfo
30988 +typedef ADSL_MIB_INFO *PADSL_MIB_INFO;
30990 +typedef void (*ADSL_FN_NOTIFY_CB) (ADSL_LINK_STATE AdslLinkState, UINT32 ulParm);
30992 +//**************************************************************************
30993 +// Function Prototypes
30994 +//**************************************************************************
30996 +BCMADSL_STATUS BcmAdsl_Check(void);
30997 +BCMADSL_STATUS BcmAdsl_Initialize(ADSL_FN_NOTIFY_CB pFnNotifyCb, UINT32 ulParm, adslCfgProfile *pAdslCfg);
30999 +BCMADSL_STATUS BcmAdsl_MapAtmPortIDs(UINT16 usAtmFastPortId, UINT16 usAtmInterleavedPortId);
31001 +BCMADSL_STATUS BcmAdsl_Uninitialize(void);
31002 +BCMADSL_STATUS BcmAdsl_ConnectionStart(void);
31003 +BCMADSL_STATUS BcmAdsl_ConnectionStop(void);
31004 +BCMADSL_STATUS BcmAdsl_GetPhyAddresses(PADSL_CHANNEL_ADDR pChannelAddr);
31005 +BCMADSL_STATUS BcmAdsl_SetPhyAddresses(PADSL_CHANNEL_ADDR pChannelAddr);
31006 +BCMADSL_STATUS BcmAdsl_GetConnectionInfo(PADSL_CONNECTION_INFO pConnectionInfo);
31007 +BCMADSL_STATUS BcmAdsl_DiagCommand(PADSL_DIAG pAdslDiag);
31008 +int BcmAdsl_GetObjectValue(char *objId, int objIdLen, char *dataBuf, long *dataBufLen);
31009 +BCMADSL_STATUS BcmAdsl_StartBERT(unsigned long totalBits);
31010 +BCMADSL_STATUS BcmAdsl_StopBERT(void);
31011 +BCMADSL_STATUS BcmAdsl_BertStartEx(unsigned long bertSec);
31012 +BCMADSL_STATUS BcmAdsl_BertStopEx(void);
31013 +BCMADSL_STATUS BcmAdsl_CheckPowerLoss(void);
31014 +BCMADSL_STATUS BcmAdsl_SendDyingGasp(int powerCtl);
31015 +BCMADSL_STATUS BcmAdsl_Configure(adslCfgProfile *pAdslCfg);
31016 +BCMADSL_STATUS BcmAdsl_GetVersion(adslVersionInfo *pAdslVer);
31017 +BCMADSL_STATUS BcmAdsl_SetSDRAMBaseAddr(void *pAddr);
31018 +BCMADSL_STATUS BcmAdsl_SetVcEntry (int gfc, int port, int vpi, int vci);
31019 +BCMADSL_STATUS BcmAdsl_SetVcEntryEx (int gfc, int port, int vpi, int vci, int pti_clp);
31021 +BCMADSL_STATUS BcmAdsl_ResetStatCounters(void);
31022 +BCMADSL_STATUS BcmAdsl_SetAtmLoopbackMode(void);
31023 +BCMADSL_STATUS BcmAdsl_SetTestMode(ADSL_TEST_MODE testMode);
31024 +BCMADSL_STATUS BcmAdsl_SelectTones(
31025 + int xmtStartTone,
31027 + int rcvStartTone,
31029 + char *xmtToneMap,
31032 +BCMADSL_STATUS BcmAdsl_SetDiagMode(int diagMode);
31034 +int BcmAdsl_GetConstellationPoints (int toneId, ADSL_CONSTELLATION_POINT *pointBuf, int numPoints);
31036 +int BcmAdsl_GetOemParameter (int paramId, void *buf, int len);
31037 +int BcmAdsl_SetOemParameter (int paramId, void *buf, int len);
31038 +int BcmAdsl_SetXmtGain(int gain);
31040 +UINT32 BcmAdsl_GetSelfTestMode(void);
31041 +void BcmAdsl_SetSelfTestMode(UINT32 stMode);
31042 +UINT32 BcmAdsl_GetSelfTestResults(void);
31044 +BCMADSL_STATUS BcmAdsl_G997SendData(void *buf, int len);
31045 +void *BcmAdsl_G997FrameGet(int *pLen);
31046 +void *BcmAdsl_G997FrameGetNext(int *pLen);
31047 +void BcmAdsl_G997FrameFinished(void);
31048 +void BcmAdsl_DyingGaspHandler(void *context);
31050 +#if defined(__cplusplus)
31054 +#endif // _BCMADSL_H_
31056 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/bcmatmapi.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/bcmatmapi.h
31057 --- linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/bcmatmapi.h 1970-01-01 01:00:00.000000000 +0100
31058 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/bcmatmapi.h 2006-06-26 09:07:10.000000000 +0200
31061 +<:copyright-broadcom
31063 + Copyright (c) 2002 Broadcom Corporation
31064 + All Rights Reserved
31065 + No portions of this material may be reproduced in any form without the
31066 + written permission of:
31067 + Broadcom Corporation
31068 + 16215 Alton Parkway
31069 + Irvine, California 92619
31070 + All information contained in this document is Broadcom Corporation
31071 + company private, proprietary, and trade secret.
31075 +//**************************************************************************
31076 +// File Name : BcmAtmApi.h
31078 +// Description: This file contains the definitions, structures and function
31079 +// prototypes for the Broadcom Asynchronous Transfer Mode (ATM)
31080 +// Application Program Interface (API).
31082 +// Updates : 09/15/2000 lat. Created.
31083 +//**************************************************************************
31085 +#if !defined(_BCMATMAPI_H_)
31086 +#define _BCMATMAPI_H_
31088 +#if defined(__cplusplus)
31092 +//**************************************************************************
31093 +// Constant Definitions
31094 +//**************************************************************************
31096 +// ATM physical port constants.
31097 +#define PHY_NUM_PORTS 4
31100 +#define PHY_2 2 // [BCM635x Only]
31101 +#define PHY_3 3 // [BCM635x Only]
31103 +// Used for backwards compatibility.
31104 +#define PHY_UTOPIA0 0
31105 +#define PHY_UTOPIA1 1
31106 +#define PHY_UTOPIA2 2
31107 +#define PHY_UTOPIA3_TC_LOOPBACK 3
31109 +// Values for ATM_PORT_CFG ucPortType.
31110 +#define PT_DISABLED 0
31111 +#define PT_UTOPIA 1
31112 +#define PT_LOOPBACK 2
31113 +#define PT_TC 3 // [BCM635x Only]
31114 +#define PT_ADSL_INTERLEAVED 4 // [BCM6345 Only]
31115 +#define PT_ADSL_FAST 5 // [BCM6345 Only]
31117 +// Wildcard definitions.
31118 +#define ALL_INTERFACES 0xffffffff
31119 +#define ANY_PRIORITY 0xff
31121 +// Values for ATM_TRAFFIC_DESCR_PARM_ENTRY ulTrafficDescrType.
31122 +#define TDT_ATM_NO_TRAFFIC_DESCRIPTOR 1
31123 +#define TDT_ATM_NO_CLP_NO_SCR 2
31124 +#define TDT_ATM_CLP_NO_TAGGING_NO_SCR 3
31125 +#define TDT_ATM_CLP_TAGGING_NO_SCR 4
31126 +#define TDT_ATM_NO_CLP_SCR 5
31127 +#define TDT_ATM_CLP_NO_TAGGING_SCR 6 // [BCM635x Only]
31128 +#define TDT_ATM_CLP_TAGGING_SCR 7 // [BCM635x Only]
31129 +#define TDT_ATM_CLP_NO_TAGGING_MCR 8 // [BCM6348 Only]
31130 +#define TDT_ATM_CLP_TRANSPARENT_NO_SCR 9
31131 +#define TDT_ATM_CLP_TRANSPARENT_SCR 10
31132 +#define TDT_ATM_NO_CLP_TAGGING_NO_SCR 11
31133 +#define TDT_ATM_NO_CLP_NO_SCR_CDVT 12
31134 +#define TDT_ATM_NO_CLP_SCR_CDVT 13
31135 +#define TDT_ATM_CLP_NO_TAGGING_SCR_CDVT 14 // [BCM635x Only]
31136 +#define TDT_ATM_CLP_TAGGING_SCR_CDVT 15 // [BCM635x Only]
31138 +// Values for ATM_TRAFFIC_DESCR_PARM_ENTRY ulTrafficDescrRowStatus.
31139 +#define TDRS_ACTIVE 1
31140 +#define TDRS_NOT_IN_SERVICE 2
31142 +// Values for ATM_TRAFFIC_DESCR_PARM_ENTRY ulServiceCategory.
31143 +#define SC_OTHER 1
31145 +#define SC_RT_VBR 3
31146 +#define SC_NRT_VBR 4
31149 +// Values for ATM_INTERFACE_CFG ulIfAdminStatus and ATM_VCC_CFG
31150 +// ulAtmVclAdminStatus.
31151 +#define ADMSTS_UP 1
31152 +#define ADMSTS_DOWN 2
31153 +#define ADMSTS_TESTING 3
31155 +// Values for ATM_INTERFACE_CFG ulIfOperStatus and ATM_VCC_CFG
31156 +// ulAtmVclOperStatus.
31157 +#define OPRSTS_UP 1
31158 +#define OPRSTS_DOWN 2
31159 +#define OPRSTS_UNKNOWN 3
31161 +// Values for ATM_INTERFACE_LINK_INFO ulLinkState.
31163 +#define LINK_DOWN 2
31165 +// Values for ulAalType.
31166 +#define AAL_2 0 // [BCM635x Only]
31167 +#define AAL_TRANSPARENT 1
31168 +#define AAL_0_PACKET 2
31169 +#define AAL_0_CELL_CRC 3
31172 +// Values for ATM_VCC_CFG ulAtmVccEncapsType.
31173 +#define ET_VC_MULTIPLEX_ROUTED_PROTOCOL 1
31174 +#define ET_VC_MULTIPLEX_BRG_PROTOCOL_8023 2
31175 +#define ET_VC_MULTIPLEX_BRG_PROTOCOL_8025 3
31176 +#define ET_VC_MULTIPLEX_BRG_PROTOCOL_8026 4
31177 +#define ET_VC_MULTIPLEX_LAN_EMULATION_8023 5
31178 +#define ET_VC_MULTIPLEX_LAN_EMULATION_8025 6
31179 +#define ET_LLC_ENCAPSULATION 7
31180 +#define ET_MULTI_PROTOCOL_FRAME_RELAY_SSCS 8
31181 +#define ET_OTHER 9
31182 +#define ET_UNKNOWN 10
31184 +// [BCM635x Only] Values for ATM_AAL2_VCC_CFG ucAal2CpsOptimisation.
31185 +#define OPT_SNG_PKT_PER_PDU_NO_OVERLAP 1
31186 +#define OPT_MULT_PKTS_PER_PDU_OVERLAP 2
31188 +// [BCM635x Only] Values for ATM_INTERFACE_STATS ulTcAlarmState.
31189 +#define TCALM_NO_ALARM 1
31190 +#define TCALM_LCD_FAILURE 2
31192 +// Values for ATM_NOTIFY_PARMS ulNotificationType.
31193 +#define ATM_NOTIFY_INTERFACE_CHANGE 1
31195 +// Values for AN_INTF_CHANGE_PARMS ulInterfaceState.
31196 +#define ATM_INTERFACE_UP 1
31197 +#define ATM_INTERFACE_DOWN 2
31199 +// Values for AN_VCC_CHANGE_PARMS ulInterfaceState.
31200 +#define ATM_VCC_UP 1
31201 +#define ATM_VCC_DOWN 2
31203 +// Values for ATM_VCC_ATTACH_PARMS ulFlags.
31204 +#define AVAP_ALLOW_OAM_F5_SEGMENT_CELLS 0x0001
31205 +#define AVAP_ALLOW_OAM_F5_END_TO_END_CELLS 0x0002
31206 +#define AVAP_ALLOW_RM_CELLS 0x0004
31207 +#define AVAP_ALLOW_OAM_F4_SEGMENT_CELLS 0x0008
31208 +#define AVAP_ALLOW_OAM_F4_END_TO_END_CELLS 0x0010
31209 +#define AVAP_ALLOW_CELLS_WITH_ERRORS 0x0020
31210 +#define AVAP_ADD_AAL0_CRC10 0x0040
31211 +#define AVAP_DSP 0x8000 // [BCM635x Only]
31213 +// [BCM635x Only] Values for ATM_VCC_AAL2_CHANNEL_ID_PARMS ucVoiceRouting.
31214 +#define VOICE_ROUTE_MIPS 0
31215 +#define VOICE_ROUTE_DSP 2
31217 +// [BCM635x Only] Values for ATM_VCC_AAL2_CHANNEL_ID_PARMS ucFlags.
31218 +#define CID_USE_FRAME_MODE 0x01
31220 +// Values for ATM_VCC_DATA_PARMS ucCircuitType.
31221 +#define CT_AAL0_PACKET 0x02
31222 +#define CT_AAL0_CELL_CRC 0x03
31223 +#define CT_OAM_F5_SEGMENT 0x04
31224 +#define CT_OAM_F5_END_TO_END 0x05
31225 +#define CT_RM 0x06
31226 +#define CT_AAL5 0x07
31227 +#define CT_HDLC_PACKET 0x08 // [BCM6348 Only]
31228 +#define CT_ANY_AAL2_MASK 0x08 // [BCM635x Only]
31229 +#define CT_AAL2_ALARM 0x08 // [BCM635x Only]
31230 +#define CT_AAL2_TYPE_3 0x09 // [BCM635x Only]
31231 +#define CT_AAL2_TYPE_1 0x0A // [BCM635x Only]
31232 +#define CT_AAL2_FRAME 0x0B // [BCM635x Only]
31233 +#define CT_TRANSPARENT 0x10
31234 +#define CT_OAM_F4_ANY 0x20
31236 +// OAM F4 VCI values.
31237 +#define VCI_OAM_F4_SEGMENT 3
31238 +#define VCI_OAM_F4_END_TO_END 4
31241 +// Values for ATM_VCC_DATA_PARMS ucFlags.
31242 +#define ATMDATA_CI 0x04
31243 +#define ATMDATA_CLP 0x08
31245 +// [BCM635x Only] DSP specific values.
31246 +#define DSP_VCID 31
31248 +// ATM cell layer interface name
31249 +#define ATM_CELL_LAYER_IFNAME "atm0"
31251 +// AAL5 CPCS layer interface name
31252 +#define AAL5_CPCS_LAYER_IFNAME "cpcs0"
31254 +//**************************************************************************
31255 +// Type Definitions
31256 +//**************************************************************************
31258 +// Return status values
31259 +typedef enum BcmAtmStatus
31264 + STS_PARAMETER_ERROR,
31266 + STS_RESOURCE_ERROR,
31269 + STS_INTERFACE_DOWN,
31272 + STS_NOT_SUPPORTED,
31273 + STS_VCAM_MULT_MATCH_ERROR,
31274 + STS_CCAM_MULT_MATCH_ERROR,
31275 + STS_PKTERR_INVALID_VPI_VCI,
31276 + STS_PKTERR_PORT_NOT_ENABLED,
31277 + STS_PKTERR_HEC_ERROR,
31278 + STS_PKTERR_PTI_ERROR,
31279 + STS_PKTERR_RECEIVED_IDLE_CELL,
31280 + STS_PKTERR_CIRCUIT_TYPE_ERROR,
31281 + STS_PKTERR_OAM_RM_CRC_ERROR,
31282 + STS_PKTERR_GFC_ERROR,
31283 + STS_PKTERR_AAL5_AAL0_CRC_ERROR,
31284 + STS_PKTERR_AAL5_AAL0_SHORT_PKT_ERROR,
31285 + STS_PKTERR_AAL5_AAL0_LENGTH_ERROR,
31286 + STS_PKTERR_AAL5_AAL0_BIG_PKT_ERROR,
31287 + STS_PKTERR_AAL5_AAL0_SAR_TIMEOUT_ERROR,
31288 + STS_PKTERR_AAL2F_HEC_ERROR,
31289 + STS_PKTERR_AAL2F_SEQ_NUM_ERROR,
31290 + STS_PKTERR_AAL2F_PARITY_ERROR,
31291 + STS_PKTERR_AAL2F_CRC_ERROR,
31292 + STS_PKTERR_AAL2F_CAM_ERROR,
31293 + STS_PKTERR_AAL2F_BIG_PKT_ERROR,
31294 + STS_PKTERR_AAL2F_RAS_TIMEOUT_ERROR,
31295 + STS_PKTERR_AAL2F_SHORT_PKT_ERROR,
31296 + STS_PKTERR_AAL2F_LENGTH_MISMATCH_ERROR,
31297 + STS_PKTERR_AAL2V_HEC_ERROR,
31298 + STS_PKTERR_AAL2V_SEQ_NUM_ERROR,
31299 + STS_PKTERR_AAL2V_PARITY_ERROR,
31300 + STS_PKTERR_AAL2V_CRC_ERROR,
31301 + STS_PKTERR_AAL2V_CAM_ERROR,
31302 + STS_PKTERR_AAL2V_OSF_MISMATCH_ERROR,
31303 + STS_PKTERR_AAL2V_OSF_ERROR,
31304 + STS_PKTERR_AAL2V_HEC_OVERLAP_ERROR,
31305 + STS_PKTERR_AAL2V_BIG_PKT_ERROR,
31306 + STS_PKTERR_AAL2V_RAS_ERROR,
31307 + STS_PKTERR_AAL2V_UUI_ERROR
31311 +// ATM_VCC_ADDR identifies a Virtual Channel Connection (VCC).
31312 +typedef struct AtmVccAddr
31314 + UINT32 ulInterfaceId;
31317 +} ATM_VCC_ADDR, *PATM_VCC_ADDR;
31320 +// ATM_PORT_CFG contains ATM physical port configuration parameters.
31321 +typedef struct AtmPortCfg
31323 + UINT32 ulInterfaceId;
31324 + UINT8 ucPortType;
31325 + UINT8 ucPortAddr;
31326 + UINT8 ucReserved[2];
31327 +} ATM_PORT_CFG, *PATM_PORT_CFG;
31330 +// ATM_INITIALIZATION_PARMS contains ATM API module initialization parameters.
31331 +#define ID_ATM_INITIALIZATION_PARMS 2
31332 +typedef struct AtmInitialization
31334 + UINT32 ulStructureId;
31335 + UINT32 ulThreadPriority;
31336 + UINT16 usFreeCellQSize;
31337 + UINT16 usFreePktQSize;
31338 + UINT16 usFreePktQBufferSize;
31339 + UINT16 usFreePktQBufferOffset; // offset into buffer to start receiving data
31340 + UINT16 usReceiveCellQSize;
31341 + UINT16 usReceivePktQSize;
31342 + UINT8 ucTransmitFifoPriority; // [BCM635x Only]
31343 + UINT8 ucReserved;
31344 + UINT16 usAal5CpcsMaxSduLength;
31345 + UINT16 usAal2SscsMaxSsarSduLength; // [BCM635x Only]
31346 + ATM_PORT_CFG PortCfg[PHY_NUM_PORTS];
31347 +} ATM_INITIALIZATION_PARMS, *PATM_INITIALIZATION_PARMS;
31350 +// ATM_TRAFFIC_DESCR_PARM_ENTRY contains the fields needed to create a Traffic
31351 +// Descriptor Table parameter entry.
31352 +#define ID_ATM_TRAFFIC_DESCR_PARM_ENTRY 1
31353 +typedef struct AtmTrafficDescrParmEntry
31355 + UINT32 ulStructureId;
31356 + UINT32 ulTrafficDescrIndex;
31357 + UINT32 ulTrafficDescrType;
31358 + UINT32 ulTrafficDescrParm1;
31359 + UINT32 ulTrafficDescrParm2;
31360 + UINT32 ulTrafficDescrParm3;
31361 + UINT32 ulTrafficDescrParm4;
31362 + UINT32 ulTrafficDescrParm5;
31363 + UINT32 ulTrafficDescrRowStatus;
31364 + UINT32 ulServiceCategory;
31365 + UINT32 ulTrafficFrameDiscard;
31366 +} ATM_TRAFFIC_DESCR_PARM_ENTRY, *PATM_TRAFFIC_DESCR_PARM_ENTRY;
31369 +// ATM_INTERFACE_CFG contains configuration fields for an ATM interface.
31370 +#define ID_ATM_INTERFACE_CFG 3
31371 +typedef struct AtmInterfaceCfg
31373 + UINT32 ulStructureId;
31374 + UINT32 ulAtmInterfaceMaxVccs;
31375 + UINT32 ulAtmInterfaceConfVccs;
31376 + UINT32 ulAtmInterfaceMaxActiveVpiBits;
31377 + UINT32 ulAtmInterfaceMaxActiveVciBits;
31378 + UINT32 ulAtmInterfaceCurrentMaxVpiBits;
31379 + UINT32 ulAtmInterfaceCurrentMaxVciBits;
31380 + UINT32 ulIfAdminStatus;
31381 + UINT32 ulIfOperStatus; // read-only
31382 + UINT32 ulSendNullCells;
31383 + UINT32 ulTcScramble;
31384 + UINT32 ulPortType; // read-only
31385 + UINT32 ulIfLastChange;
31386 +} ATM_INTERFACE_CFG, *PATM_INTERFACE_CFG;
31389 +// ATM_VCC_TRANSMIT_QUEUE_PARMS contains fields for configuring an transmit
31391 +#define ID_ATM_VCC_TRANSMIT_QUEUE_PARMS 1
31392 +typedef struct AtmVccTransmitQueueParms
31394 + UINT32 ulStructureId;
31396 + UINT32 ulPriority;
31397 + UINT32 ulReserved;
31398 +} ATM_VCC_TRANSMIT_QUEUE_PARMS, *PATM_VCC_TRANSMIT_QUEUE_PARMS;
31401 +// ATM_AAL5_VCC_CFG contains configuration fields for an ATM AAL5 Virtual
31402 +// Channel Connection (VCC).
31403 +typedef struct AtmAal5VccCfg
31405 + UINT32 ulAtmVccEncapsType;
31406 + UINT32 ulAtmVccCpcsAcceptCorruptedPdus;
31407 +} ATM_AAL5_VCC_CFG, *PATM_AAL5_VCC_CFG;
31410 +// [BCM635x Only] ATM_AAL2_VCC_CFG contains configuration fields for an ATM
31411 +// AAL2 Virtual Channel Connection (VCC).
31412 +typedef struct AtmAal2VccCfg
31414 + UINT8 ucAal2CpsMaxMultiplexedChannels;
31415 + UINT8 ucAal2CpsMaxSduLength;
31416 + UINT8 ucAal2CpsCidLowerLimit;
31417 + UINT8 ucAal2CpsCidUpperLimit;
31418 + UINT8 ucAal2CpsOptimisation;
31419 + UINT8 ucReserved[3];
31420 +} ATM_AAL2_VCC_CFG, *PATM_AAL2_VCC_CFG;
31423 +// ATM_AAL0_VCC_CFG contains configuration fields for an ATM AAL0 Virtual
31424 +// Channel Connection (VCC).
31425 +typedef struct AtmAal0VccCfg
31427 + UINT8 ucReserved;
31428 + // Reserved for future use.
31429 +} ATM_AAL0_VCC_CFG, *PATM_AAL0_VCC_CFG;
31432 +// ATM_VCC_CFG contains configuration fields for an ATM Virtual Channel
31433 +// Connection (VCC).
31434 +#define ID_ATM_VCC_CFG 2
31435 +#define TX_Q_PARM_SIZE 8
31436 +typedef struct AtmVccCfg
31438 + UINT32 ulStructureId;
31439 + UINT32 ulAalType;
31440 + UINT32 ulAtmVclAdminStatus;
31441 + UINT32 ulAtmVclOperStatus;
31442 + UINT32 ulAtmVclLastChange;
31443 + UINT32 ulAtmVclReceiveTrafficDescrIndex;
31444 + UINT32 ulAtmVclTransmitTrafficDescrIndex;
31445 + UINT32 ulTransmitQParmsSize;
31446 + ATM_VCC_TRANSMIT_QUEUE_PARMS TransmitQParms[TX_Q_PARM_SIZE];
31449 + ATM_AAL5_VCC_CFG Aal5Cfg;
31450 + ATM_AAL2_VCC_CFG Aal2Cfg; // [BCM635x Only]
31451 + ATM_AAL0_VCC_CFG Aal0Cfg;
31453 +} ATM_VCC_CFG, *PATM_VCC_CFG;
31456 +// ATM_INTF_ATM_STATS contains statistics for the ATM layer of an interface.
31457 +typedef struct AtmIntfAtmStats
31459 + UINT32 ulIfInOctets;
31460 + UINT32 ulIfOutOctets;
31461 + UINT32 ulIfInErrors;
31462 + UINT32 ulIfInUnknownProtos;
31463 + UINT32 ulIfOutErrors;
31465 + // The following fields are added together to calculate ulIfInErrors.
31466 + UINT32 ulIfInHecErrors;
31468 + // The following fields are added together to calculate ulIfInUnknownProtos.
31469 + UINT32 ulIfInInvalidVpiVciErrors;
31470 + UINT32 ulIfInPortNotEnabledErrors;
31471 + UINT32 ulIfInPtiErrors;
31472 + UINT32 ulIfInIdleCells;
31473 + UINT32 ulIfInCircuitTypeErrors;
31474 + UINT32 ulIfInOamRmCrcErrors;
31475 + UINT32 ulIfInGfcErrors;
31476 +} ATM_INTF_ATM_STATS, *PATM_INTF_ATM_STATS;
31479 +// [BCM635x Only] ATM_INTF_ATM_STATS contains statistics for the TC layer.
31480 +typedef struct AtmIntfTcStats
31482 + UINT32 ulTcInDataCells;
31483 + UINT32 ulTcInTotalCells;
31484 + UINT32 ulTcInHecErrors;
31485 + UINT32 ulTcInOcdEvents;
31486 + UINT32 ulTcAlarmState;
31487 +} ATM_INTF_TC_STATS, *PATM_INTF_TC_STATS;
31490 +// ATM_INTF_AAL5_AAL0_STATS contains statistics for all AAL5/AAL0 VCCs on an
31492 +typedef struct AtmIntfAal5Aal0Stats
31494 + UINT32 ulIfInOctets;
31495 + UINT32 ulIfOutOctets;
31496 + UINT32 ulIfInUcastPkts;
31497 + UINT32 ulIfOutUcastPkts;
31498 + UINT32 ulIfInErrors;
31499 + UINT32 ulIfOutErrors;
31500 + UINT32 ulIfInDiscards;
31501 + UINT32 ulIfOutDiscards;
31502 +} ATM_INTF_AAL5_AAL0_STATS, *PATM_INTF_AAL5_AAL0_STATS;
31505 +// [BCM635x Only] ATM_INTF_AAL2_STATS contains statistics for all AAL2 VCCs
31506 +// on an ATM interface.
31507 +typedef struct AtmIntfAal2Stats
31509 + UINT32 ulIfInOctets;
31510 + UINT32 ulIfOutOctets;
31511 + UINT32 ulIfInUcastPkts;
31512 + UINT32 ulIfOutUcastPkts;
31513 + UINT32 ulIfInErrors;
31514 + UINT32 ulIfOutErrors;
31515 + UINT32 ulIfInDiscards;
31516 + UINT32 ulIfOutDiscards;
31517 +} ATM_INTF_AAL2_STATS, *PATM_INTF_AAL2_STATS;
31520 +// ATM_INTERFACE_STATS contains statistics for an ATM interface.
31521 +#define ID_ATM_INTERFACE_STATS 1
31522 +typedef struct AtmInterfaceStats
31524 + UINT32 ulStructureId;
31525 + ATM_INTF_ATM_STATS AtmIntfStats;
31526 + ATM_INTF_TC_STATS TcIntfStats; // [BCM635x Only]
31527 + ATM_INTF_AAL5_AAL0_STATS Aal5IntfStats;
31528 + ATM_INTF_AAL2_STATS Aal2IntfStats; // [BCM635x Only]
31529 + ATM_INTF_AAL5_AAL0_STATS Aal0IntfStats;
31530 +} ATM_INTERFACE_STATS, *PATM_INTERFACE_STATS;
31533 +// ATM_VCC_AAL5_STATS contains statistics for an AAL5 VCC.
31534 +typedef struct AtmVccAal5Stats
31536 + UINT32 ulAal5VccCrcErrors;
31537 + UINT32 ulAal5VccSarTimeOuts;
31538 + UINT32 ulAal5VccOverSizedSdus;
31539 + UINT32 ulAal5VccShortPacketErrors;
31540 + UINT32 ulAal5VccLengthErrors;
31541 +} ATM_VCC_AAL5_STATS, *PATM_VCC_AAL5_STATS;
31544 +// [BCM635x Only] ATM_VCC_AAL2_STATS contains statistics for an AAL2 VCC.
31545 +typedef struct AtmVccAal2Stats
31547 + UINT32 ulAal2CpsInPkts;
31548 + UINT32 ulAal2CpsOutPkts;
31549 + UINT32 ulAal2CpsParityErrors;
31550 + UINT32 ulAal2CpsSeqNumErrors;
31551 + UINT32 ulAal2CpsOsfMismatchErrors;
31552 + UINT32 ulAal2CpsOsfErrors;
31553 + UINT32 ulAal2CpsHecOverlapErrors;
31554 + UINT32 ulAal2CpsHecErrors;
31555 + UINT32 ulAal2CpsOversizedSduErrors;
31556 + UINT32 ulAal2CpsReassemblyErrors;
31557 + UINT32 ulAal2CpsUuiErrors;
31558 + UINT32 ulAal2CpsCidErrors;
31559 + UINT32 ulAal2SscsOversizedSssarSduErrors;
31560 + UINT32 ulAal2SscsSssarRasTimerExipiryErrors;
31561 + UINT32 ulAal2SscsUndersizedSstedPduErrors;
31562 + UINT32 ulAal2SscsSstedPduLengthMismatchErrors;
31563 + UINT32 ulAal2SscsSstedCrcMismatchErrors;
31564 +} ATM_VCC_AAL2_STATS, *PATM_VCC_AAL2_STATS;
31567 +// ATM_VCC_AAL0PKT_STATS contains statistics for an AAL0 Packet VCC.
31568 +typedef struct AtmVccAal0PktStats
31570 + UINT32 ulAal0VccSarTimeOuts;
31571 + UINT32 ulAal0VccOverSizedSdus;
31572 +} ATM_VCC_AAL0PKT_STATS, *PATM_VCC_AAL0PKT_STATS;
31575 +// ATM_VCC_AAL0CELL_STATS contains statistics for an AAL0 Cell with CRC VCC.
31576 +typedef struct AtmVccAal0CellStats
31578 + UINT32 ulAal0VccCrcErrors;
31579 +} ATM_VCC_AAL0CELL_STATS, *PATM_VCC_AAL0CELL_STATS;
31582 +// ATM_VCC_STATS contains statistics for a VCC.
31583 +#define ID_ATM_VCC_STATS 1
31584 +typedef struct AtmVccStatistics
31586 + UINT32 ulStructureId;
31587 + UINT32 ulAalType;
31590 + ATM_VCC_AAL5_STATS AtmVccAal5Stats;
31591 + ATM_VCC_AAL2_STATS AtmVccAal2Stats; // [BCM635x Only]
31592 + ATM_VCC_AAL0PKT_STATS AtmVccAal0PktStats;
31593 + ATM_VCC_AAL0CELL_STATS AtmVccAal0CellStats;
31595 +} ATM_VCC_STATS, *PATM_VCC_STATS;
31598 +// ATM_INTERFACE_LINK_INFO contains fields for the physical link that the
31599 +// ATM interface is using.
31600 +#define ID_ATM_INTERFACE_LINK_INFO 1
31601 +typedef struct AtmInterfaceLinkInfo
31603 + UINT32 ulStructureId;
31604 + UINT32 ulLinkState;
31605 + UINT32 ulLineRate;
31606 + UINT32 ulReserved[2];
31607 +} ATM_INTERFACE_LINK_INFO, *PATM_INTERFACE_LINK_INFO;
31610 +// AN_INTF_CHANGE_PARMS contains notification fields that passed to an
31611 +// application callback function when the ATM interface goes up or down.
31612 +#define ID_AN_INTF_CHANGE_PARMS 1
31613 +typedef struct AnIntfChangeParms
31615 + UINT32 ulInterfaceId;
31616 + UINT32 ulInterfaceState;
31617 + UINT32 ulInterfaceLineRate;
31618 +} AN_INTF_CHANGE_PARMS, *PAN_INTF_CHANGE_PARMS;
31621 +// ATM_NOTIFY_PARMS contains notification fields that passed to an application
31622 +// callback function when an ATM notification event occurs.
31623 +typedef struct AtmNotifyParms
31625 + UINT32 ulNotifyType;
31628 + AN_INTF_CHANGE_PARMS IntfChangeParms;
31630 + // Other fields and structures that are specific
31631 + // to the type of notification are declared here.
31633 +} ATM_NOTIFY_PARMS, *PATM_NOTIFY_PARMS;
31635 +typedef void (*FN_NOTIFY_CB) (PATM_NOTIFY_PARMS pNotifyParms);
31638 +// ATM_VCC_ATTACH_PARMS contains fields for attaching to a VCC. It is used
31639 +// by all BcmAtm_Attach... functions.
31640 +struct AtmVccDataParms;
31641 +typedef void (*FN_RECEIVE_CB) (UINT32 ulHandle, PATM_VCC_ADDR pVccAddr,
31642 + struct AtmVccDataParms *pDataParms, UINT32 ulParmReceiveData);
31644 +#define ID_ATM_VCC_ATTACH_PARMS 1
31645 +typedef struct AtmAttachParms
31647 + UINT32 ulStructureId;
31649 + FN_RECEIVE_CB pFnReceiveDataCb;
31650 + UINT32 ulParmReceiveData;
31651 + ATM_VCC_TRANSMIT_QUEUE_PARMS *pTransmitQParms;
31652 + UINT32 ulTransmitQParmsSize;
31654 + UINT32 ulReserved;
31655 +} ATM_VCC_ATTACH_PARMS, *PATM_VCC_ATTACH_PARMS;
31658 +// [BCM635x Only] ATM_VCC_AAL2_CHANNEL_ID_PARMS contains fields for
31659 +// configuring an transmit queue.
31660 +#define ID_ATM_VCC_AAL2_CHANNEL_ID_PARMS 1
31661 +typedef struct AtmVccAal2ChannelIdParms
31663 + UINT32 ulStructureId;
31664 + UINT8 ucChannelId;
31665 + UINT8 ucVoiceRouting;
31667 + UINT8 ucReserved[5];
31668 +} ATM_VCC_AAL2_CHANNEL_ID_PARMS, *PATM_VCC_AAL2_CHANNEL_ID_PARMS;
31671 +// ATM_BUFFER contains fields for passing data to, and receive data from, the
31673 +typedef struct AtmBuffer
31675 + struct AtmBuffer *pNextAtmBuf;
31677 + UINT32 ulDataLen;
31678 + UINT16 usDataOffset;
31679 + UINT16 usReserved;
31680 + UINT32 ulReserved;
31681 +} ATM_BUFFER, *PATM_BUFFER;
31684 +// ATM_VCC_DATA_PARMS contains fields for sending or receiving data on a VCC.
31685 +// It is used by all BcmAtm_Send... and receive functions.
31686 +typedef void (*FN_FREE_DATA_PARMS) (struct AtmVccDataParms *pDataParms);
31688 +#define ID_ATM_VCC_DATA_PARMS 2
31689 +typedef struct AtmVccDataParms
31691 + UINT32 ulStructureId;
31692 + UINT8 ucCircuitType;
31693 + UINT8 ucAal2ChannelId; // [BCM635x Only]
31697 + UINT8 ucSendPriority;
31698 + UINT8 ucReserved[2];
31699 + BCMATM_STATUS baReceiveStatus;
31700 + PATM_BUFFER pAtmBuffer;
31701 + FN_FREE_DATA_PARMS pFnFreeDataParms;
31702 + UINT32 ulParmFreeDataParms;
31703 + struct AtmVccDataParms *pApplicationLink;
31704 + UINT32 ulApplicationDefined[2];
31705 +} ATM_VCC_DATA_PARMS, *PATM_VCC_DATA_PARMS;
31708 +//**************************************************************************
31709 +// Function Prototypes
31710 +//**************************************************************************
31712 +BCMATM_STATUS BcmAtm_Initialize( PATM_INITIALIZATION_PARMS pInitValues );
31713 +BCMATM_STATUS BcmAtm_Uninitialize( void );
31714 +BCMATM_STATUS BcmAtm_GetInterfaceId( UINT8 ucPhyPort, UINT32 *pulInterfaceId );
31715 +BCMATM_STATUS BcmAtm_GetTrafficDescrTableSize(UINT32 *pulTrafficDescrTableSize);
31716 +BCMATM_STATUS BcmAtm_GetTrafficDescrTable( PATM_TRAFFIC_DESCR_PARM_ENTRY
31717 + pTrafficDescTable, UINT32 ulTrafficDescrTableSize );
31718 +BCMATM_STATUS BcmAtm_SetTrafficDescrTable( PATM_TRAFFIC_DESCR_PARM_ENTRY
31719 + pTrafficDescTable, UINT32 ulTrafficDescrTableSize );
31720 +BCMATM_STATUS BcmAtm_GetInterfaceCfg( UINT32 ulInterfaceId, PATM_INTERFACE_CFG
31722 +BCMATM_STATUS BcmAtm_SetInterfaceCfg( UINT32 ulInterfaceId, PATM_INTERFACE_CFG
31724 +BCMATM_STATUS BcmAtm_GetVccCfg( PATM_VCC_ADDR pVccAddr, PATM_VCC_CFG pVccCfg );
31725 +BCMATM_STATUS BcmAtm_SetVccCfg( PATM_VCC_ADDR pVccAddr, PATM_VCC_CFG pVccCfg );
31726 +BCMATM_STATUS BcmAtm_GetVccAddrs( UINT32 ulInterfaceId, PATM_VCC_ADDR pVccAddrs,
31727 + UINT32 ulNumVccs, UINT32 *pulNumReturned );
31728 +BCMATM_STATUS BcmAtm_GetInterfaceStatistics( UINT32 ulInterfaceId,
31729 + PATM_INTERFACE_STATS pStatistics, UINT32 ulReset );
31730 +BCMATM_STATUS BcmAtm_GetVccStatistics( PATM_VCC_ADDR pVccAddr, PATM_VCC_STATS
31731 + pVccStatistics, UINT32 ulReset );
31732 +BCMATM_STATUS BcmAtm_SetInterfaceLinkInfo( UINT32 ulInterfaceId,
31733 + PATM_INTERFACE_LINK_INFO pInterfaceCfg );
31734 +BCMATM_STATUS BcmAtm_SetNotifyCallback( FN_NOTIFY_CB pFnNotifyCb );
31735 +BCMATM_STATUS BcmAtm_ResetNotifyCallback( FN_NOTIFY_CB pFnNotifyCb );
31736 +BCMATM_STATUS BcmAtm_AttachVcc( PATM_VCC_ADDR pVccAddr, PATM_VCC_ATTACH_PARMS
31738 +BCMATM_STATUS BcmAtm_AttachMgmtCells( UINT32 ulInterfaceId,
31739 + PATM_VCC_ATTACH_PARMS pAttachParms );
31740 +BCMATM_STATUS BcmAtm_AttachTransparent( UINT32 ulInterfaceId,
31741 + PATM_VCC_ATTACH_PARMS pAttachParms );
31742 +BCMATM_STATUS BcmAtm_Detach( UINT32 ulHandle );
31743 +BCMATM_STATUS BcmAtm_SetAal2ChannelIds( UINT32 ulHandle,
31744 + PATM_VCC_AAL2_CHANNEL_ID_PARMS pChannelIdParms, UINT32
31745 + ulNumChannelIdParms ); // [BCM635x Only]
31746 +BCMATM_STATUS BcmAtm_SendVccData( UINT32 ulHandle,
31747 + PATM_VCC_DATA_PARMS pDataParms );
31748 +BCMATM_STATUS BcmAtm_SendMgmtData( UINT32 ulHandle, PATM_VCC_ADDR pVccAddr,
31749 + PATM_VCC_DATA_PARMS pDataParms );
31750 +BCMATM_STATUS BcmAtm_SendTransparentData( UINT32 ulHandle, UINT32 ulInterfaceId,
31751 + PATM_VCC_DATA_PARMS pDataParms );
31753 +#if defined(__cplusplus)
31757 +#endif // _BCMATMAPI_H_
31759 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/bcmnet.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/bcmnet.h
31760 --- linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/bcmnet.h 1970-01-01 01:00:00.000000000 +0100
31761 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/bcmnet.h 2006-06-26 09:07:10.000000000 +0200
31765 + Copyright 2002 Broadcom Corp. All Rights Reserved.
31767 + This program is free software; you can distribute it and/or modify it
31768 + under the terms of the GNU General Public License (Version 2) as
31769 + published by the Free Software Foundation.
31771 + This program is distributed in the hope it will be useful, but WITHOUT
31772 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
31773 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
31774 + for more details.
31776 + You should have received a copy of the GNU General Public License along
31777 + with this program; if not, write to the Free Software Foundation, Inc.,
31778 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
31781 +/***********************************************************************/
31783 +/* MODULE: bcmnet.h */
31784 +/* DATE: 05/16/02 */
31785 +/* PURPOSE: network interface ioctl definition */
31787 +/***********************************************************************/
31788 +#ifndef _IF_NET_H_
31789 +#define _IF_NET_H_
31795 +#define LINKSTATE_DOWN 0
31796 +#define LINKSTATE_UP 1
31798 +/*---------------------------------------------------------------------*/
31799 +/* Ethernet Switch Type */
31800 +/*---------------------------------------------------------------------*/
31801 +#define ESW_TYPE_UNDEFINED 0
31802 +#define ESW_TYPE_BCM5325M 1
31803 +#define ESW_TYPE_BCM5325E 2
31804 +#define ESW_TYPE_BCM5325F 3
31807 + * Ioctl definitions.
31809 +/* reserved SIOCDEVPRIVATE */
31811 + SIOCGLINKSTATE = SIOCDEVPRIVATE + 1,
31812 + SIOCSCLEARMIBCNTR,
31813 + SIOCGIFTRANSSTART,
31815 + SIOCSDUPLEX, /* 0: auto 1: full 2: half */
31816 + SIOCSSPEED, /* 0: auto 1: 100mbps 2: 10mbps */
31819 + SIOCGDISABLEVLAN,
31820 + SIOCGQUERYNUMVLANPORTS,
31822 + SIOCGQUERYNUMPORTS,
31826 +#define SPEED_10MBIT 10000000
31827 +#define SPEED_100MBIT 100000000
31829 +typedef struct IoctlMibInfo
31831 + unsigned long ulIfLastChange;
31832 + unsigned long ulIfSpeed;
31833 +} IOCTL_MIB_INFO, *PIOCTL_MIB_INFO;
31840 +#endif /* _IF_NET_H_ */
31841 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/bcmos.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/bcmos.h
31842 --- linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/bcmos.h 1970-01-01 01:00:00.000000000 +0100
31843 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/bcmos.h 2006-06-26 09:07:10.000000000 +0200
31845 +/***************************************************************************
31846 +* Copyright 2000 Broadcom Corporation
31847 +* All Rights Reserved
31848 +* No portions of this material may be reproduced in any form without the
31849 +* written permission of:
31850 +* Broadcom Corporation
31851 +* 16251 Laguna Canyon Road
31852 +* Irvine, California 92618
31853 +* All information contained in this document is Broadcom Corporation
31854 +* company private, proprietary, and trade secret.
31856 +****************************************************************************
31858 +* Filename: bcmos.h
31859 +* Creation Date: 8 June 2000 (v0.00)
31862 +* $Date: 5/03/01 5:03p $
31864 +****************************************************************************
31867 +* Broadcom Generic Operating System Functions.
31869 +****************************************************************************/
31873 +#ifdef __cplusplus
31878 +#include <cxcEnv.h>
31879 +#include <bosSleep.h>
31880 +#include <bosTask.h>
31882 +#include <linux/kernel.h>
31883 +#include <linux/slab.h>
31884 +#include <linux/interrupt.h>
31885 +#include <bcmtypes.h>
31887 +#define malloc(arg) kmalloc(arg, GFP_KERNEL)
31888 +#define free(arg) kfree(arg)
31890 +#define BCMOS_ASSERT(expr) \
31891 +if ((expr)? 0:1) \
31893 + printk(" ASSERT !!! File %s, line %u \n", __FILE__, __LINE__); \
31894 + bosSleep( 10 ); \
31895 + cli(); /* Disable interrupts */ \
31899 +#define CXC_ASSERT BCMOS_ASSERT // For compatibility with CX's endpoint
31901 +/* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!*/
31902 +/* Special BOS definitions */
31903 +/* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!*/
31904 +#define DSL_NO_RESETSUPPORT
31907 +#define bosSocketHtoNL( num ) ((UINT32)( num ))
31908 +#define bosSocketHtoNS( num ) ((UINT16)( num ))
31909 +#define bosSocketNtoHL( num ) ((UINT32)( num ))
31910 +#define bosSocketNtoHS( num ) ((UINT16)( num ))
31911 +#define bosSocketNtoHS( num ) ((UINT16)( num ))
31912 +#define bosSocketNtoHU16 bosSocketNtoHS
31917 +#include <cxcEnv.h>
31918 +#include <assert.h>
31919 +#include <string.h>
31920 +#include <malloc.h>
31922 +#define BCMOS_TASKNAME( nameVar, nameStr ) char nameVar[] = nameStr
31924 +#define TEN_MSEC 10
31925 +#define TWENTY_MSEC 20
31926 +#define ONE_HUNDRED_MSEC 100
31927 +#define FIVE_HUNDRED_MSEC 500
31928 +#define ONE_SECOND 1000
31929 +#define TWO_SECONDS 2000
31931 +#define BCMOS_ASSERT( expr) assert( expr )
31935 +#ifdef __cplusplus
31940 +#endif /* _BCMOS_H */
31943 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/cxcEnv.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/cxcEnv.h
31944 --- linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/cxcEnv.h 1970-01-01 01:00:00.000000000 +0100
31945 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/cxcEnv.h 2006-06-26 09:07:10.000000000 +0200
31947 +/***************************************************************************
31948 +* Copyright 2000 Broadcom Corporation
31949 +* All Rights Reserved
31950 +* No portions of this material may be reproduced in any form without the
31951 +* written permission of:
31952 +* Broadcom Corporation
31953 +* 16251 Laguna Canyon Road
31954 +* Irvine, California 92618
31955 +* All information contained in this document is Broadcom Corporation
31956 +* company private, proprietary, and trade secret.
31958 +****************************************************************************
31960 +* Filename: cxcEnv.h
31964 +* $Date: 12/03/02 5:50p $
31966 +****************************************************************************
31969 +* This file is used in CableX to provide system-wide types and definitions. Howewever.
31970 +* since iit tries to include various C run-time library dcefintions (eh stdio.h, it is not
31971 +* appropriate for use "as is" in a Linux kernel environment. So the CableX endpoint source
31972 +* does not need to change, we use this file to recursively include bcmtypes.h
31974 +* NOTE: This file is based upon LDX's hausenv.h, but has been renamed to
31975 +* avoid project dependencies, and allow for CablexChange customizations.
31977 +****************************************************************************/
31982 +#ifdef __cplusplus
31986 +/* --------------------------------------------------------------------------
31987 +** Just include definitions from bcmtypes.h
31989 +#include <bcmtypes.h>
31993 +#if !defined( HAUS_SINT16_DEFINED )
31994 +#define HAUS_SINT16_DEFINED
31995 +typedef signed short SINT16; /* SINT16 is platform independant */
31999 +#if !defined( HAUS_SINT32_DEFINED )
32000 +#define HAUS_SINT32_DEFINED
32001 +typedef signed long SINT32;
32008 +// GNU definition imported from cxc_compiler.h
32009 +#define CXC_INLINE __inline__
32011 +// Endian-ness imported from cxc_cpu.h
32012 +#define CXC_CPU_BIG_ENDIAN 1
32013 +#define CXC_CPU_LITTLE_ENDIAN 0
32015 +#if defined(__KERNEL__)
32016 +#define CXC_OS_LINUX 1
32021 +#ifdef __cplusplus
32025 +#endif /* CXC_ENV_H */
32026 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/cxcLog.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/cxcLog.h
32027 --- linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/cxcLog.h 1970-01-01 01:00:00.000000000 +0100
32028 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/cxcLog.h 2006-06-26 09:07:10.000000000 +0200
32030 +/***************************************************************************
32031 +* Copyright 2000 Broadcom Corporation
32032 +* All Rights Reserved
32033 +* No portions of this material may be reproduced in any form without the
32034 +* written permission of:
32035 +* Broadcom Corporation
32036 +* 16251 Laguna Canyon Road
32037 +* Irvine, California 92618
32038 +* All information contained in this document is Broadcom Corporation
32039 +* company private, proprietary, and trade secret.
32041 +****************************************************************************
32044 +* Creation Date: 17 September 2001 (v0.00)
32047 +* $Date: 11/13/02 3:42p $
32049 +****************************************************************************
32052 +* This filename is preserved in order to minimize the changes
32053 +* in the endpoint code, which is shared with the Cablex endpoint.
32054 +* cxcLog.h simply includes log.h, which contains the log macros.
32056 +****************************************************************************/
32063 +#endif /* CXC_LOG_H */
32064 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/endpointdrv.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/endpointdrv.h
32065 --- linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/endpointdrv.h 1970-01-01 01:00:00.000000000 +0100
32066 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/endpointdrv.h 2006-06-26 09:07:10.000000000 +0200
32068 +/***************************************************************************
32069 + * Broadcom Corp. Confidential
32070 + * Copyright 2001 Broadcom Corp. All Rights Reserved.
32072 + * THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED
32073 + * SOFTWARE LICENSE AGREEMENT BETWEEN THE USER AND BROADCOM.
32074 + * YOU HAVE NO RIGHT TO USE OR EXPLOIT THIS MATERIAL EXCEPT
32075 + * SUBJECT TO THE TERMS OF SUCH AN AGREEMENT.
32077 + ***************************************************************************
32078 + * File Name : EndpointDrv.h
32080 + * Description: This file contains the definitions and structures for the
32081 + * Linux IOCTL interface that used between the user mode Endpoint
32082 + * API library and the kernel Endpoint API driver.
32084 + * Updates : 04/04/2002 YD. Created.
32085 + ***************************************************************************/
32087 +#if !defined(_ENDPOINTDRV_H_)
32088 +#define _ENDPOINTDRV_H_
32090 +#if defined(__cplusplus)
32095 +#include <bcmtypes.h>
32096 +#include <vrgEndpt.h>
32097 +#include <endptvoicestats.h>
32099 +/* Maximum size for the event data passed with the event callback */
32100 +#define MAX_EVENTDATA_SIZE 256
32102 +typedef enum ENDPOINTIOCTL_INDEX
32104 + ENDPTIO_INIT_INDEX = 0,
32105 + ENDPTIO_DEINIT_INDEX,
32106 + ENDPTIO_CREATE_INDEX,
32107 + ENDPTIO_CAPABILITIES_INDEX,
32108 + ENDPTIO_SIGNAL_INDEX,
32109 + ENDPTIO_CREATE_CONNECTION_INDEX,
32110 + ENDPTIO_MODIFY_CONNECTION_INDEX,
32111 + ENDPTIO_DELETE_CONNECTION_INDEX,
32112 + ENDPTIO_PACKET_INDEX,
32113 + ENDPTIO_GET_PACKET_INDEX,
32114 + ENDPTIO_GET_EVENT_INDEX,
32115 + ENDPTIO_GET_CODECMAP_INDEX,
32116 + ENDPTIO_VOICESTAT_INDEX,
32117 + ENDPTIO_ISINITIALIZED_INDEX,
32118 + ENDPTIO_CONSOLE_CMD_INDEX,
32119 + ENDPTIO_TEST_INDEX,
32120 + ENDPTIO_ENDPOINTCOUNT_INDEX,
32121 + ENDPTIO_MAX_INDEX
32122 +} ENDPOINTIOCTL_INDEX;
32126 +#define ENDPOINTDRV_MAJOR 209 /* arbitrary unused value */
32128 +#define ENDPOINTIOCTL_ENDPT_INIT \
32129 + _IOWR(ENDPOINTDRV_MAJOR, ENDPTIO_INIT_INDEX, ENDPOINTDRV_INIT_PARAM)
32131 +#define ENDPOINTIOCTL_ENDPT_DEINIT \
32132 + _IOWR(ENDPOINTDRV_MAJOR, ENDPTIO_DEINIT_INDEX, ENDPOINTDRV_INIT_PARAM)
32134 +#define ENDPOINTIOCTL_ENDPT_CREATE \
32135 + _IOWR(ENDPOINTDRV_MAJOR, ENDPTIO_CREATE_INDEX, ENDPOINTDRV_CREATE_PARM)
32137 +#define ENDPOINTIOCTL_ENDPT_CAPABILITIES \
32138 + _IOWR(ENDPOINTDRV_MAJOR, ENDPTIO_CAPABILITIES_INDEX, ENDPOINTDRV_CAP_PARM)
32140 +#define ENDPOINTIOCTL_ENDPT_SIGNAL \
32141 + _IOWR(ENDPOINTDRV_MAJOR, ENDPTIO_SIGNAL_INDEX, ENDPOINTDRV_SIGNAL_PARM)
32143 +#define ENDPOINTIOCTL_ENDPT_CREATE_CONNECTION \
32144 + _IOWR(ENDPOINTDRV_MAJOR, ENDPTIO_CREATE_CONNECTION_INDEX, ENDPOINTDRV_CONNECTION_PARM)
32146 +#define ENDPOINTIOCTL_ENDPT_MODIFY_CONNECTION \
32147 + _IOWR(ENDPOINTDRV_MAJOR, ENDPTIO_MODIFY_CONNECTION_INDEX, ENDPOINTDRV_CONNECTION_PARM)
32149 +#define ENDPOINTIOCTL_ENDPT_DELETE_CONNECTION \
32150 + _IOWR(ENDPOINTDRV_MAJOR, ENDPTIO_DELETE_CONNECTION_INDEX, ENDPOINTDRV_DELCONNECTION_PARM)
32152 +#define ENDPOINTIOCTL_ENDPT_PACKET \
32153 + _IOWR(ENDPOINTDRV_MAJOR, ENDPTIO_PACKET_INDEX, ENDPOINTDRV_PACKET_PARM)
32155 +#define ENDPOINTIOCTL_ENDPT_GET_PACKET \
32156 + _IOWR(ENDPOINTDRV_MAJOR, ENDPTIO_GET_PACKET_INDEX, ENDPOINTDRV_PACKET_PARM)
32158 +#define ENDPOINTIOCTL_ENDPT_GET_EVENT \
32159 + _IOWR(ENDPOINTDRV_MAJOR, ENDPTIO_GET_EVENT_INDEX, ENDPOINTDRV_EVENT_PARM)
32161 +#define ENDPOINTIOCTL_ENDPT_GET_CODECMAP \
32162 + _IOWR(ENDPOINTDRV_MAJOR, ENDPTIO_GET_CODECMAP_INDEX, ENDPOINTDRV_CODECMAP_PARM)
32164 +#define ENDPOINTIOCTL_ENDPT_VOICESTAT \
32165 + _IOWR(ENDPOINTDRV_MAJOR, ENDPTIO_VOICESTAT_INDEX, ENDPOINTDRV_VOICESTAT_PARM)
32167 +#define ENDPOINTIOCTL_ISINITIALIZED \
32168 + _IOWR(ENDPOINTDRV_MAJOR, ENDPTIO_ISINITIALIZED_INDEX, ENDPOINTDRV_ISINITIALIZED_PARM)
32170 +#define ENDPOINTIOCTL_ENDPT_CONSOLE_CMD \
32171 + _IOWR(ENDPOINTDRV_MAJOR, ENDPTIO_CONSOLE_CMD_INDEX, ENDPOINTDRV_CONSOLE_CMD_PARM)
32173 +#define ENDPOINTIOCTL_TEST \
32174 + _IOWR(ENDPOINTDRV_MAJOR, ENDPTIO_TEST_INDEX, ENDPOINTDRV_TESTPARM)
32176 +#define ENDPOINTIOCTL_ENDPOINTCOUNT \
32177 + _IOWR(ENDPOINTDRV_MAJOR, ENDPTIO_ENDPOINTCOUNT_INDEX, ENDPOINTDRV_ENDPOINTCOUNT_PARM)
32179 +#define MAX_ENDPOINTDRV_IOCTL_COMMANDS ENDPTIO_MAX_INDEX
32184 + UINT32 size; /* Size of the structure (including the size field) */
32185 + VRG_COUNTRY country;
32186 + EPSTATUS epStatus;
32187 +} ENDPOINTDRV_INIT_PARAM, *PENDPOINTDRV_INIT_PARAM;
32191 + UINT32 size; /* Size of the structure (including the size field) */
32194 + VRG_ENDPT_STATE* endptState;
32195 + EPSTATUS epStatus;
32196 +} ENDPOINTDRV_CREATE_PARM, *PENDPOINTDRV_CREATE_PARM;
32200 + UINT32 size; /* Size of the structure (including the size field) */
32201 + EPZCAP* capabilities;
32202 + ENDPT_STATE* state;
32203 + EPSTATUS epStatus;
32204 +} ENDPOINTDRV_CAP_PARM, *PENDPOINTDRV_CAP_PARM;
32208 + UINT32 size; /* Size of the structure (including the size field) */
32209 + ENDPT_STATE* state;
32212 + UINT32 value; // Reserve an array, can be a pointer
32213 + EPSTATUS epStatus;
32217 +} ENDPOINTDRV_SIGNAL_PARM, *PENDPOINTDRV_SIGNAL_PARM;
32221 + UINT32 size; /* Size of the structure (including the size field) */
32222 + ENDPT_STATE* state;
32224 + EPZCNXPARAM* cnxParam;
32225 + EPSTATUS epStatus;
32226 +} ENDPOINTDRV_CONNECTION_PARM, *PENDPOINTDRV_CONNECTION_PARM;
32230 + UINT32 size; /* Size of the structure (including the size field) */
32231 + ENDPT_STATE* state;
32233 + EPSTATUS epStatus;
32234 +} ENDPOINTDRV_DELCONNECTION_PARM, *PENDPOINTDRV_DELCONNECTION_PARM;
32238 + UINT32 size; /* Size of the structure (including the size field) */
32239 + ENDPT_STATE* state;
32241 + EPPACKET* epPacket;
32244 + EPSTATUS epStatus;
32245 +} ENDPOINTDRV_PACKET_PARM, *PENDPOINTDRV_PACKET_PARM;
32249 + UINT32 size; /* Size of the structure (including the size field) */
32254 + UINT8 eventData[MAX_EVENTDATA_SIZE];
32255 +} ENDPOINTDRV_EVENT_PARM, *PENDPOINTDRV_EVENT_PARM;
32259 + UINT32 size; /* Size of the structure (including the size field) */
32260 + int isInitialized;
32261 +} ENDPOINTDRV_ISINITIALIZED_PARM, *PENDPOINTDRV_ISINITIALIZED_PARM;
32265 + UINT32 size; /* Size of the structure (including the size field) */
32266 + UINT32 testParm1;
32267 + UINT32 testParm2;
32268 + EPZCNXPARAM* testParm3;
32269 + EPSTATUS epStatus;
32270 +} ENDPOINTDRV_TESTPARM, *PENDPOINTDRV_TESTPARM;
32272 +typedef struct ENDPOINTDRV_PACKET
32274 + UINT32 size; /* Size of the structure (including the size field) */
32277 + EPMEDIATYPE mediaType;
32278 + UINT8 data[1024];
32279 +} ENDPOINTDRV_PACKET;
32281 +typedef struct ENDPOINTDRV_VOICESTAT_PARM
32284 + ENDPT_VOICE_STATS* stats;
32285 + EPSTATUS epStatus;
32286 +} ENDPOINTDRV_VOICESTAT_PARM, *PENDPOINTDRV_VOICESTAT_PARM;
32288 +typedef struct ENDPOINTDRV_CONSOLE_CMD_PARM
32290 + UINT32 size; /* Size of the structure (including the size field) */
32294 + ENDPT_STATE* state;
32295 + EPSTATUS epStatus;
32296 +} ENDPOINTDRV_CONSOLE_CMD_PARM, *PENDPOINTDRV_CONSOLE_CMD_PARM;
32301 + UINT32 size; /* Size of the structure (including the size field) */
32303 +} ENDPOINTDRV_ENDPOINTCOUNT_PARM, *PENDPOINTDRV_ENDPOINTCOUNT_PARM;
32306 +#if defined(__cplusplus)
32310 +#endif // _ENDPOINTDRV_H_
32311 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/endptvoicestats.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/endptvoicestats.h
32312 --- linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/endptvoicestats.h 1970-01-01 01:00:00.000000000 +0100
32313 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/endptvoicestats.h 2006-06-26 09:07:10.000000000 +0200
32315 +/***************************************************************************
32316 + * Broadcom Corp. Confidential
32317 + * Copyright 2001 Broadcom Corp. All Rights Reserved.
32319 + * THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED
32320 + * SOFTWARE LICENSE AGREEMENT BETWEEN THE USER AND BROADCOM.
32321 + * YOU HAVE NO RIGHT TO USE OR EXPLOIT THIS MATERIAL EXCEPT
32322 + * SUBJECT TO THE TERMS OF SUCH AN AGREEMENT.
32324 + ***************************************************************************
32325 + * File Name : endptvoicestats.h
32327 + * Description: This file contains the definitions of the voice statistics
32328 + * structures. This file should be used in user space when
32329 + * working with the voice statistics structure.
32331 + * The files hpnet.h and hppve.h
32332 + * should not be included in user space because of a conflict
32333 + * in the definitions supplied by hausenv.h (in the endpoint/vocm/
32334 + * ldxIntf/dspinc directory) and the definitions supplied by bcmtypes.h
32335 + * (in the /sgibcm_2_4_17/linux/include/asm-mips/bcm96345 directory).
32338 + ***************************************************************************/
32340 +#if !defined(ENDPTSTATS_H)
32341 +#define ENDPTSTATS_H
32343 +#if defined(__cplusplus)
32350 + UINT16 peakHoldingTime; /* Peak Holding Time since last statistic */
32352 + /* Total number of superpackets arriving on the egress path */
32353 + UINT16 packetCount; /* # of packets received */
32355 + /* addTail and reorder are successful additions to the JB */
32356 + /* addTail is typically 1..N times the packetCount if superpackets are enabled */
32357 + UINT16 addTailCount; /* # of frames added to tail of JB - normal case */
32358 + UINT16 reorderCount; /* # of frames reordered */
32360 + /* overrun, duplicate, outOfRange, tooLate, jitterMax excess are packets that have been discarded */
32361 + UINT16 overrunCount; /* Decoder overrun count */
32362 + UINT16 duplicateCount; /* # of duplicate frames deleted */
32363 + UINT16 outOfRangeCount; /* # of frames with timestamps too far from current TS to be handled */
32364 + UINT16 tooLateCount; /* Packet arrived too late (it's redundant mate already played) */
32366 + /* cantDecode are packets that can't be played out due to algorithm not available */
32367 + UINT16 cantDecodeCount; /* Can't decode packet - decoder not in load or pkt hdr bad */
32369 + /* The following are internal to the AJC module - they do not represent physical packets */
32370 + UINT16 ajcUnderrunCount; /* Adaptive Jitter Control: jitter buffer underruns */
32371 + UINT16 ajcDeleteCount; /* Adaptive Jitter Control: # of packet deletes done to reduce holding time */
32372 + UINT16 ajcRepeatCount; /* Adaptive Jitter Control: # of packet repeats done to either increase holding time
32373 + or due to late frame or lost frames. */
32374 + UINT16 ajcResyncCount; /* Number of times ajb resynced (went through buildout state) */
32375 + UINT16 ajcPhaseJitterCount; /* Number of times ajb inserted a phase discontinuity
32376 + (possibly in silence or during CNG or due to a repeat/delete). */
32377 + /* 14 entries. Make sure this is even (!) */
32379 + UINT16 peakHoldingTime; /* Peak Holding Time since last statistic */
32380 + UINT16 minimumHoldingTime; /* Long-term tracker of min. Hold Time */
32381 + UINT16 targetHoldingTime; /* Target holding Time */
32382 + UINT16 inactiveFrameCount; /* Inactive Frame Count */
32383 + UINT16 activeFrameCount; /* Active Frame Count */
32384 + UINT16 hsxDecoderOverrunCount; /* Decoder overrun count */
32385 + UINT16 hsxDecoderUnderrunCount; /* Decoder underrun count */
32386 + UINT16 lostFrameCount; /* Lost frames resulting in frame repeat */
32388 +} ENDPT_VOICE_DECODERSTATS;
32390 +/* Encoder Statistics */
32394 + UINT16 inactiveFrameCount; /* Inactive Frame Count of Suppressed Frames*/
32395 + UINT16 activeFrameCount; /* Active Frame Count - actually sent ingress */
32396 + UINT16 sidFrameCount; /* SID Frame Count */
32397 + UINT16 toneRelayCount; /* # of tone packets from PTE relayed ingress */
32399 + UINT16 hsxEncoderOverrunCount; /* Encoder overrun count */
32401 +} ENDPT_VOICE_ENCODERSTATS;
32406 + ENDPT_VOICE_DECODERSTATS decoder;
32407 + ENDPT_VOICE_ENCODERSTATS encoder;
32408 +} ENDPT_VOICE_PVE_STATS;
32412 + ENDPT_VOICE_PVE_STATS hsxPVEstats; /* statistics for PVE encoder and decoder */
32414 +} ENDPT_VOICE_STATS;
32416 +#if defined(__cplusplus)
32420 +#endif /* ENDPTSTATS_H */
32421 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/log.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/log.h
32422 --- linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/log.h 1970-01-01 01:00:00.000000000 +0100
32423 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/log.h 2006-06-26 09:07:10.000000000 +0200
32425 +/***************************************************************************
32426 +* Copyright 2000 Broadcom Corporation
32427 +* All Rights Reserved
32428 +* No portions of this material may be reproduced in any form without the
32429 +* written permission of:
32430 +* Broadcom Corporation
32431 +* 16251 Laguna Canyon Road
32432 +* Irvine, California 92618
32433 +* All information contained in this document is Broadcom Corporation
32434 +* company private, proprietary, and trade secret.
32436 +****************************************************************************
32439 +* Creation Date: 4 July 2000 (v0.00)
32442 +* $Date: 9/14/01 4:54p $
32444 +****************************************************************************
32447 +* This header file contains the needed macros and function prototypes
32448 +* for logging on the terminal.
32450 +****************************************************************************/
32455 +#ifdef __cplusplus
32461 +#if (! (defined(__KERNEL__) || defined (LINUX)) )
32463 +extern void Log( char const *format,...);
32464 +extern void LogMsg( char *string );
32465 +extern void LogDirectSerial( char const *format,...);
32467 +#define PANIC(m) Log(m)
32468 +#define LOG(fmt) Log fmt
32469 +#define LOGERROR(fmt) Log fmt
32470 +#define LOG1(fmt) Log fmt /* Level 1 logging */
32471 +#define LOG2(fmt) /* Level 2 logging */
32472 +#define LOGMSG(buf) LogMsg buf
32474 +/***********************************
32475 +** Error logging *
32476 +***********************************/
32477 +#elif defined(__KERNEL__)
32479 +#define LOG(fmt) printk fmt ; printk("\n");
32480 +#define LOG_RAW(fmt) printk fmt ; printk("\n");
32481 +#define PANIC(fmt) printk("!!! PANIC !!! \n"); printk fmt ; printk("\n");
32482 +#define LOGERROR(fmt) printk("!!! ERROR !!! \n"); printk fmt ; printk("\n");
32484 +#elif defined(LINUX)
32486 +#include <stdio.h>
32492 +#define LOG(fmt) \
32494 + struct tm *tm_ptr; \
32495 + time_t curtime; \
32496 + time( &curtime ); \
32497 + tm_ptr = gmtime( &curtime ); \
32498 + printf("%02d:%02d:%02d ", \
32499 + tm_ptr->tm_hour, \
32500 + tm_ptr->tm_min, \
32501 + tm_ptr->tm_sec); \
32506 +#define LOG(fmt) printf fmt ; printf("\n");
32507 +#endif /* LOG_DBG */
32509 +#define PANIC(fmt) printk("!!! PANIC !!! \n"); printk fmt ; printk("\n");
32510 +#define LOGERROR(fmt) \
32512 + printf("ERROR !!! File %s (line %u): ", __FILE__, __LINE__);\
32521 +#ifdef __cplusplus
32525 +#endif /* LOG_H */
32529 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/mtacfg.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/mtacfg.h
32530 --- linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/mtacfg.h 1970-01-01 01:00:00.000000000 +0100
32531 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/mtacfg.h 2006-06-26 09:07:10.000000000 +0200
32533 +/***************************************************************************
32534 +* Copyright 2000 Broadcom Corporation
32535 +* All Rights Reserved
32536 +* No portions of this material may be reproduced in any form without the
32537 +* written permission of:
32538 +* Broadcom Corporation
32539 +* 16251 Laguna Canyon Road
32540 +* Irvine, California 92618
32541 +* All information contained in this document is Broadcom Corporation
32542 +* company private, proprietary, and trade secret.
32544 +****************************************************************************
32546 +* Filename: mtacfg.h
32547 +* Creation Date: 4 July 2000 (v0.00)
32550 +* $Date: 9/14/01 4:54p $
32552 +****************************************************************************
32555 +* This header file contains all the different build options that
32556 +* are required by CablexChange components.
32558 +****************************************************************************/
32563 +#ifdef __cplusplus
32567 +#include <cfg/endptCfg.h>
32568 +#include <cfg/vocmCfg.h>
32569 +#include <cfg/casCfg.h>
32571 +#define MTA_VERSION_INFO "1.0"
32573 +#if ( defined(IP_MGCP) || defined(IP_H323) || defined(IP_SIP) || defined(IP_MEGACO) )
32578 +#define ENDPOINT_NULL_SHIM
32582 +/***************************************************************
32583 +** Task Priority options
32584 +****************************************************************/
32586 +#define RTP_TASK_PRIORITY BCMOS_TASK_PRTY_8 /* task priority for rtp */
32587 +#define HGCP_TASK_PRIORITY BCMOS_TASK_PRTY_8 /* task priority for HGCP */
32588 +#define RTCP_TASK_PRIORITY BCMOS_TASK_PRTY_13 /* task priority for rtcp */
32591 +/* Additional DSL specific definitions not provided by Cable Cfg files */
32593 +/* For backward compatibility with older code */
32594 +#define MAX_ENDPT VOCM_CFG_MAX_ENDPT
32595 +#define MAX_CNX VOCM_CFG_MAX_CNX
32597 +#ifdef __cplusplus
32601 +#endif /* MTACFG_H */
32605 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/profdrv.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/profdrv.h
32606 --- linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/profdrv.h 1970-01-01 01:00:00.000000000 +0100
32607 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/profdrv.h 2006-06-26 09:07:10.000000000 +0200
32609 +/***************************************************************************
32610 +* Copyright 2004 Broadcom Corporation
32611 +* All Rights Reserved
32612 +* No portions of this material may be reproduced in any form without the
32613 +* written permission of:
32614 +* Broadcom Corporation
32615 +* 16215 Alton Parkway
32617 +* Irvine, California 92619-7013
32618 +* All information contained in this document is Broadcom Corporation
32619 +* company private, proprietary, and trade secret.
32621 +****************************************************************************
32623 +* Filename: profdrv.h
32625 +****************************************************************************
32628 +* This file contains the profiler device driver
32630 +****************************************************************************/
\r
32631 +#ifndef PROFDRV_DEVICE_DRIVER__H__INCLUDED
\r
32632 +#define PROFDRV_DEVICE_DRIVER__H__INCLUDED
\r
32634 +#include <linux/ioctl.h>
\r
32636 +#ifdef __cplusplus
32640 +#define PROFILER_NAME_MAX_LENGTH 32
\r
32641 +#define PROFILER_MAX_RECSEQ 2048
\r
32643 +#define PROFILER_CPU_UTIL_VALID_START 0x01
\r
32644 +#define PROFILER_CPU_UTIL_VALID_STOP 0x02
\r
32646 +#define PROFILER_SOURCE_USER 0x00
\r
32647 +#define PROFILER_SOURCE_KERNEL 0x01
\r
32650 +#define __STR(x) #x
\r
32653 +#define STR(x) __STR(x)
\r
32656 +#define profdrv_read_32bit_cp0_register(source) \
32658 + __asm__ __volatile__( \
32659 + ".set\tpush\n\t" \
32660 + ".set\treorder\n\t" \
32661 + "mfc0\t%0,"STR(source)"\n\t" \
32663 + : "=r" (__res)); \
32667 + Structure used to pass profiling information data at the user/kernel interface.
\r
32671 + char name[PROFILER_NAME_MAX_LENGTH];
\r
32673 +} PROFILER_IOCTL_DATA;
\r
32676 + This structure is used to keep track of the CPU utilization during the profiling period.
\r
32680 + unsigned tick_uptime_start;
\r
32681 + unsigned tick_idle_start;
\r
32682 + unsigned tick_user_start;
\r
32683 + unsigned tick_kernel_start;
\r
32684 + unsigned tick_uptime_stop;
\r
32685 + unsigned tick_idle_stop;
\r
32686 + unsigned tick_user_stop;
\r
32687 + unsigned tick_kernel_stop;
\r
32688 + unsigned char valid_data;
\r
32690 +} PROFILER_CPU_UTILIZATION;
\r
32693 + A generic structure to pass information about the profiler status.
\r
32697 + unsigned status;
\r
32698 + unsigned cpu_jiffies_start;
\r
32699 + unsigned cpu_jiffies_stop;
\r
32700 + unsigned cpu_jiffies_factor;
\r
32701 + unsigned cpu_clock;
\r
32703 +} PROFILER_STATUS;
\r
32706 + The ioctl action index.
\r
32710 + PROFILER_IOCTL_GET_DATA_DUMP_INDEX,
\r
32711 + PROFILER_IOCTL_GET_RECSEQ_DATA_DUMP_INDEX,
\r
32712 + PROFILER_IOCTL_SET_DATA_CLEAN_INDEX,
\r
32713 + PROFILER_IOCTL_SET_PROF_OPS_INDEX,
\r
32714 + PROFILER_IOCTL_REGISTER_CALL_INDEX,
\r
32715 + PROFILER_IOCTL_DEREGISTER_CALL_INDEX,
\r
32716 + PROFILER_IOCTL_START_CALL_INDEX,
\r
32717 + PROFILER_IOCTL_STOP_CALL_INDEX,
\r
32718 + PROFILER_IOCTL_PROFILER_STATUS_INDEX,
\r
32719 + PROFILER_IOCTL_SET_CPU_UTIL_INDEX,
\r
32720 + PROFILER_IOCTL_GET_CPU_UTIL_INDEX,
\r
32721 + PROFILER_IOCTL_GET_RECSEQ_DI_INDEX
\r
32723 +} PROFILER_IOCTL_INDEX;
\r
32726 + Assigning a device driver major number for the sake of making this application work
\r
32728 +#define PROFDRV_DEVICE_DRIVER_MAJOR 224
\r
32730 +#define PROFILER_IOCTL_GET_DATA_DUMP \
\r
32731 + _IOR( PROFDRV_DEVICE_DRIVER_MAJOR, PROFILER_IOCTL_GET_DATA_DUMP_INDEX, unsigned )
\r
32732 +#define PROFILER_IOCTL_GET_RECSEQ_DATA_DUMP \
\r
32733 + _IOR( PROFDRV_DEVICE_DRIVER_MAJOR, PROFILER_IOCTL_GET_RECSEQ_DATA_DUMP_INDEX, unsigned )
\r
32734 +#define PROFILER_IOCTL_SET_DATA_CLEAN \
\r
32735 + _IOW( PROFDRV_DEVICE_DRIVER_MAJOR, PROFILER_IOCTL_SET_DATA_CLEAN_INDEX, unsigned )
\r
32736 +#define PROFILER_IOCTL_SET_PROF_OPS \
\r
32737 + _IOW( PROFDRV_DEVICE_DRIVER_MAJOR, PROFILER_IOCTL_SET_PROF_OPS_INDEX, unsigned )
\r
32738 +#define PROFILER_IOCTL_REGISTER_CALL \
\r
32739 + _IOW( PROFDRV_DEVICE_DRIVER_MAJOR, PROFILER_IOCTL_REGISTER_CALL_INDEX, PROFILER_IOCTL_DATA )
\r
32740 +#define PROFILER_IOCTL_DEREGISTER_CALL \
\r
32741 + _IOW( PROFDRV_DEVICE_DRIVER_MAJOR, PROFILER_IOCTL_DEREGISTER_CALL_INDEX, PROFILER_IOCTL_DATA )
\r
32742 +#define PROFILER_IOCTL_START_CALL \
\r
32743 + _IOW( PROFDRV_DEVICE_DRIVER_MAJOR, PROFILER_IOCTL_START_CALL_INDEX, PROFILER_IOCTL_DATA )
\r
32744 +#define PROFILER_IOCTL_STOP_CALL \
\r
32745 + _IOW( PROFDRV_DEVICE_DRIVER_MAJOR, PROFILER_IOCTL_STOP_CALL_INDEX, PROFILER_IOCTL_DATA )
\r
32746 +#define PROFILER_IOCTL_PROFILER_STATUS_DATA \
\r
32747 + _IOR( PROFDRV_DEVICE_DRIVER_MAJOR, PROFILER_IOCTL_PROFILER_STATUS_INDEX, PROFILER_STATUS )
\r
32748 +#define PROFILER_IOCTL_SET_CPU_UTIL \
\r
32749 + _IOW( PROFDRV_DEVICE_DRIVER_MAJOR, PROFILER_IOCTL_SET_CPU_UTIL_INDEX, PROFILER_CPU_UTILIZATION )
\r
32750 +#define PROFILER_IOCTL_GET_CPU_UTIL \
\r
32751 + _IOR( PROFDRV_DEVICE_DRIVER_MAJOR, PROFILER_IOCTL_GET_CPU_UTIL_INDEX, PROFILER_CPU_UTILIZATION )
\r
32752 +#define PROFILER_IOCTL_GET_RECSEQ_DATA_INDEX \
\r
32753 + _IOR( PROFDRV_DEVICE_DRIVER_MAJOR, PROFILER_IOCTL_GET_RECSEQ_DI_INDEX, unsigned )
\r
32755 +#ifdef __cplusplus
32759 +#endif /* PROFDRV_DEVICE_DRIVER__H__INCLUDED */
\r
32760 diff -urN linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/profiler.h linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/profiler.h
32761 --- linux-2.6.8.1/bcmdrivers/broadcom/include/bcm963xx/profiler.h 1970-01-01 01:00:00.000000000 +0100
32762 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/broadcom/include/bcm963xx/profiler.h 2006-06-26 09:07:10.000000000 +0200
32764 +/***************************************************************************
32765 +* Copyright 2004 Broadcom Corporation
32766 +* All Rights Reserved
32767 +* No portions of this material may be reproduced in any form without the
32768 +* written permission of:
32769 +* Broadcom Corporation
32770 +* 16215 Alton Parkway
32772 +* Irvine, California 92619-7013
32773 +* All information contained in this document is Broadcom Corporation
32774 +* company private, proprietary, and trade secret.
32776 +****************************************************************************
32778 +* Filename: profiler.h
32780 +****************************************************************************
32783 +* This file contains the API definition for usage of the profiler tool
32785 +****************************************************************************/
\r
32786 +#ifndef PROFILER__H__INCLUDED
\r
32787 +#define PROFILER__H__INCLUDED
\r
32789 +#include "profdrv.h"
\r
32791 +#ifdef __cplusplus
32795 +#define PROFILER_MAX_MONITORED_PROFILE 32
\r
32796 +#define PROFILER_CPU_UTILIZATION_MIN 0.000001
\r
32797 +#define PROFILER_MISC_STRING_LENGTH 256
\r
32798 +#define PROFILER_CPU_TICK_FACTOR 2.0
\r
32799 +#define PROFILER_S2MS_FACTOR 1000.0
\r
32801 +#define PROFILER_FLAG_RESOURCE_FREE 0x00
\r
32802 +#define PROFILER_FLAG_RESOURCE_ALLOCATED 0x01
\r
32803 +#define PROFILER_FLAG_RESOURCE_ERROR 0x02
\r
32804 +#define PROFILER_FLAG_RESOURCE_COLLECT_PENDING 0x04
\r
32807 + This structure defines the data collected by the profiler.
\r
32811 + unsigned char source; /* User or Kernel */
\r
32812 + unsigned char flag; /* Generic flag */
\r
32813 + char name[PROFILER_NAME_MAX_LENGTH]; /* Name of the function monitored */
\r
32814 + unsigned int now_cycle; /* The current cycle count saved */
\r
32815 + unsigned int min_cycle; /* The minimum number of cycles calculated for this function */
\r
32816 + unsigned int max_cycle; /* The maximum number of cycles calculated for this function */
\r
32817 + unsigned int avg_cycle; /* The average numnber of cycles calculated for this function */
\r
32818 + unsigned int count; /* The number of time this function has been profiled */
\r
32820 +} PROFILER_COLLECTED_DATA;
\r
32824 + This structure defines the recorded sequence data collected by the profiler.
32826 +typedef struct PROFILER_RECSEQ_DATA
\r
32828 + unsigned int id;
\r
32829 + unsigned long startTime;
\r
32830 + unsigned long endTime;
\r
32831 +} PROFILER_RECSEQ_DATA;
\r
32834 +void kernel_profiler_register( char *pName, unsigned char src );
\r
32835 +void kernel_profiler_deregister( char *pName, unsigned char src );
\r
32836 +void kernel_profiler_start( char *pName, unsigned char src );
\r
32837 +void kernel_profiler_stop( char *pName, unsigned char src );
\r
32838 +void kernel_profiler_recseq_start( unsigned int id );
32839 +void kernel_profiler_recseq_stop( unsigned int id );
32841 +void kernel_profiler_reinit_collected( void );
\r
32842 +void kernel_profiler_dump( void );
\r
32843 +void kernel_profiler_recseq_dump( void );
32844 +void kernel_profiler_start_collect( void );
\r
32845 +void kernel_profiler_stop_collect( void );
\r
32848 +void profiler_init( void );
\r
32849 +void profiler_get_status( PROFILER_STATUS *pStatus );
\r
32850 +PROFILER_COLLECTED_DATA *profiler_get_data_dump( void );
\r
32851 +PROFILER_RECSEQ_DATA* profiler_get_recseq_data_dump( void );
\r
32852 +void profiler_get_cpu_util( PROFILER_CPU_UTILIZATION *pData );
\r
32853 +void profiler_set_cpu_util( PROFILER_CPU_UTILIZATION *pData );
\r
32854 +unsigned int profiler_get_recseq_data_index( void );
\r
32857 + This is the generic API that should be used by clients to access the profiler
32859 +#define PROFILER_REGISTER( name ) ( kernel_profiler_register( (name), PROFILER_SOURCE_KERNEL ) )
\r
32860 +#define PROFILER_DEREGISTER( name ) ( kernel_profiler_deregister( (name), PROFILER_SOURCE_KERNEL ) )
\r
32861 +#define PROFILER_START( name ) ( kernel_profiler_start( (name), PROFILER_SOURCE_KERNEL ) )
\r
32862 +#define PROFILER_STOP( name ) ( kernel_profiler_stop( (name), PROFILER_SOURCE_KERNEL ) )
\r
32863 +#define PROFILER_RECSEQ_START( source ) ( kernel_profiler_recseq_start( (source) ) )
32864 +#define PROFILER_RECSEQ_STOP( source ) ( kernel_profiler_recseq_stop( (source)) )
32866 +#define PROFILER_REINIT_COLLECTED() ( kernel_profiler_reinit_collected() )
\r
32867 +#define PROFILER_DUMP() ( kernel_profiler_dump() )
\r
32868 +#define PROFILER_RECSEQ_DUMP() ( kernel_profiler_recseq_dump() )
32869 +#define PROFILER_START_COLLECT() ( kernel_profiler_start_collect() )
\r
32870 +#define PROFILER_STOP_COLLECT() ( kernel_profiler_stop_collect() )
\r
32873 +#ifdef __cplusplus
32877 +#endif /* PROFILER__H__INCLUDED */
\r
32878 diff -urN linux-2.6.8.1/bcmdrivers/opensource/Makefile linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/Makefile
32879 --- linux-2.6.8.1/bcmdrivers/opensource/Makefile 1970-01-01 01:00:00.000000000 +0100
32880 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/Makefile 2006-06-26 09:07:10.000000000 +0200
32882 +# File: modules/drivers/Makefile
32884 +# Makefile for the GPLed Linux kernel modules.
32886 +BRCM_BOARD:=bcm963xx
32888 +LN_NAME=bcm9$(BRCM_CHIP)
32891 +-include $(KERNEL_DIR)/.config
32893 +ifneq ($(CONFIG_BCM_BOARD),)
32894 + LN_DRIVER_DIRS +=ln -sn impl$(CONFIG_BCM_BOARD_IMPL) char/board/$(BRCM_BOARD)/$(LN_NAME);
32897 +ifneq ($(CONFIG_BCM_SERIAL),)
32898 + LN_DRIVER_DIRS +=ln -sn impl$(CONFIG_BCM_SERIAL_IMPL) char/serial/$(LN_NAME);
32901 +obj-$(CONFIG_BCM_BOARD) += char/board/$(BRCM_BOARD)/$(LN_NAME)/
32902 +obj-$(CONFIG_BCM_SERIAL) += char/serial/$(LN_NAME)/
32906 + find . -lname "*" -name "$(LN_NAME)" -print -exec rm -f "{}" ";"
32907 + $(CONFIG_SHELL) -c "$(LN_DRIVER_DIRS)"
32908 diff -urN linux-2.6.8.1/bcmdrivers/opensource/char/board/bcm963xx/bcm96348/Makefile linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/char/board/bcm963xx/bcm96348/Makefile
32909 --- linux-2.6.8.1/bcmdrivers/opensource/char/board/bcm963xx/bcm96348/Makefile 1970-01-01 01:00:00.000000000 +0100
32910 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/char/board/bcm963xx/bcm96348/Makefile 2006-06-26 09:07:10.000000000 +0200
32912 +# Makefile for the bcm963xx board drivers
32916 +obj-y := board.o cfiflash.o bcm63xx_flash.o bcm63xx_led.o
32918 +EXTRA_CFLAGS += -I. -I$(INC_BRCMBOARDPARMS_PATH)/$(BRCM_BOARD) -I$(INC_BRCMDRIVER_PUB_PATH)/$(BRCM_BOARD)
32920 +ifeq ($(strip $(WIRELESS)),1)
32921 + EXTRA_CFLAGS += -DWIRELESS
32924 +-include $(TOPDIR)/Rules.make
32927 + rm -f core *.o *.a *.s
32929 diff -urN linux-2.6.8.1/bcmdrivers/opensource/char/board/bcm963xx/bcm96348/bcm63xx_flash.c linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/char/board/bcm963xx/bcm96348/bcm63xx_flash.c
32930 --- linux-2.6.8.1/bcmdrivers/opensource/char/board/bcm963xx/bcm96348/bcm63xx_flash.c 1970-01-01 01:00:00.000000000 +0100
32931 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/char/board/bcm963xx/bcm96348/bcm63xx_flash.c 2006-06-26 09:07:10.000000000 +0200
32935 + Copyright 2002 Broadcom Corp. All Rights Reserved.
32937 + This program is free software; you can distribute it and/or modify it
32938 + under the terms of the GNU General Public License (Version 2) as
32939 + published by the Free Software Foundation.
32941 + This program is distributed in the hope it will be useful, but WITHOUT
32942 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
32943 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
32944 + for more details.
32946 + You should have received a copy of the GNU General Public License along
32947 + with this program; if not, write to the Free Software Foundation, Inc.,
32948 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
32952 + ***************************************************************************
32953 + * File Name : bcm63xx_flash.c
32955 + * Description: This file contains the flash device driver APIs for bcm63xx board.
32957 + * Created on : 8/10/2002 seanl: use cfiflash.c, cfliflash.h (AMD specific)
32959 + ***************************************************************************/
32963 +#include <linux/fs.h>
32964 +#include <linux/capability.h>
32965 +#include <linux/slab.h>
32966 +#include <linux/errno.h>
32967 +#include <linux/module.h>
32968 +#include <asm/uaccess.h>
32970 +#include <bcm_map_part.h>
32971 +#include <board.h>
32972 +#define BCMTAG_EXE_USE
32973 +#include <bcmTag.h>
32974 +#include "cfiflash.h"
32975 +#include "boardparms.h"
32977 +//#define DEBUG_FLASH
32979 +static FLASH_ADDR_INFO fInfo;
32980 +static int flashInitialized = 0;
32982 +void *retriedKmalloc(size_t size)
32985 + int tryCount = 0;
32987 + // try 1000 times before quit
32988 + while (((pBuf = kmalloc(size, GFP_KERNEL)) == NULL) && (tryCount++ < 1000))
32990 + current->state = TASK_INTERRUPTIBLE;
32991 + schedule_timeout(HZ/10);
32993 + if (tryCount >= 1000)
32996 + memset(pBuf, 0, size);
33001 +void retriedKfree(void *pBuf)
33006 +/***************************************************************************
33007 +// Function Name: getCrc32
33008 +// Description : caculate the CRC 32 of the given data.
33009 +// Parameters : pdata - array of data.
33010 +// size - number of input data bytes.
33011 +// crc - either CRC32_INIT_VALUE or previous return value.
33013 +****************************************************************************/
33014 +UINT32 getCrc32(byte *pdata, UINT32 size, UINT32 crc)
33016 + while (size-- > 0)
33017 + crc = (crc >> 8) ^ Crc32_table[(crc ^ *pdata++) & 0xff];
33022 +// get the nvram start addr
33024 +unsigned long get_nvram_start_addr(void)
33026 + return ((unsigned long)
33027 + (flash_get_memptr(fInfo.flash_nvram_start_blk) + fInfo.flash_nvram_blk_offset));
33030 +// get the scratch_pad start addr
33032 +unsigned long get_scratch_pad_start_addr(void)
33034 + return ((unsigned long)
33035 + (flash_get_memptr(fInfo.flash_scratch_pad_start_blk) + fInfo.flash_scratch_pad_blk_offset));
33040 +/* *********************************************************************
33041 + * kerSysImageTagGet()
33042 + * Get the image tag
33043 + * Input parameters:
33046 + * point to tag -- Found
33048 + ********************************************************************* */
33049 +PFILE_TAG kerSysImageTagGet(void)
33052 + int totalBlks = flash_get_numsectors();
33054 + unsigned char *sectAddr;
33057 +#if defined(DEBUG_FLASH)
33058 + printk("totalblks in tagGet=%d\n", totalBlks);
33061 + // start from 2nd blk, assume 1st one is always CFE
33062 + for (i = 1; i < totalBlks; i++)
33064 + sectAddr = flash_get_memptr((byte) i);
33065 + crc = CRC32_INIT_VALUE;
33066 + crc = getCrc32(sectAddr, (UINT32)TAG_LEN-TOKEN_LEN, crc);
33067 + pTag = (PFILE_TAG) sectAddr;
33069 +#if defined(DEBUG_FLASH)
33070 + printk("Check Tag crc on blk [%d]\n", i);
33073 + if (crc == (UINT32)(*(UINT32*)(pTag->tagValidationToken)))
33077 + return (PFILE_TAG) NULL;
33080 +// Initialize the flash and fill out the fInfo structure
33081 +void kerSysFlashInit( void )
33084 + int totalBlks = 0;
33085 + int totalSize = 0;
33086 + int startAddr = 0;
33087 + int usedBlkSize = 0;
33088 + NVRAM_DATA nvramData;
33089 + UINT32 crc = CRC32_INIT_VALUE, savedCrc;
33090 + PFILE_TAG pTag = NULL;
33091 + unsigned long kernelEndAddr = 0;
33092 + unsigned long spAddr = 0;
33094 + if (flashInitialized)
33097 + flashInitialized = 1;
33100 + totalBlks = flash_get_numsectors();
33101 + totalSize = flash_get_total_size();
33103 + printk("Total Flash size: %dK with %d sectors\n", totalSize/1024, totalBlks);
33105 + /* nvram is always at the end of flash */
33106 + fInfo.flash_nvram_length = FLASH45_LENGTH_NVRAM;
33107 + fInfo.flash_nvram_start_blk = 0; /* always the first block */
33108 + fInfo.flash_nvram_number_blk = 1; /*always fits in the first block */
33109 + fInfo.flash_nvram_blk_offset = NVRAM_DATA_OFFSET;
33111 + // check nvram CRC
33112 + memcpy((char *)&nvramData, (char *)get_nvram_start_addr(), sizeof(NVRAM_DATA));
33113 + savedCrc = nvramData.ulCheckSum;
33114 + nvramData.ulCheckSum = 0;
33115 + crc = getCrc32((char *)&nvramData, (UINT32) sizeof(NVRAM_DATA), crc);
33117 + BpSetBoardId( nvramData.szBoardId );
33119 + fInfo.flash_persistent_length = NVRAM_PSI_DEFAULT;
33120 + if (savedCrc != crc)
33122 + printk("***Board is not initialized****: Using the default PSI size: %d\n",
33123 + fInfo.flash_persistent_length);
33127 + unsigned long ulPsiSize;
33128 + if( BpGetPsiSize( &ulPsiSize ) == BP_SUCCESS )
33129 + fInfo.flash_persistent_length = ulPsiSize;
33132 + printk("***Board id is not set****: Using the default PSI size: %d\n",
33133 + fInfo.flash_persistent_length);
33137 + fInfo.flash_persistent_length *= ONEK;
33138 + startAddr = totalSize - fInfo.flash_persistent_length;
33139 + fInfo.flash_persistent_start_blk = flash_get_blk(startAddr+FLASH_BASE_ADDR_REG);
33140 + fInfo.flash_persistent_number_blk = totalBlks - fInfo.flash_persistent_start_blk;
33141 + // save abs SP address (Scratch Pad). it is before PSI
33142 + spAddr = startAddr - SP_MAX_LEN ;
33143 + // find out the offset in the start_blk
33145 + for (i = fInfo.flash_persistent_start_blk;
33146 + i < (fInfo.flash_persistent_start_blk + fInfo.flash_persistent_number_blk); i++)
33148 + usedBlkSize += flash_get_sector_size((byte) i);
33150 + fInfo.flash_persistent_blk_offset = usedBlkSize - fInfo.flash_persistent_length;
33152 + // get the info for sp
33153 + if (!(pTag = kerSysImageTagGet()))
33155 + printk("Failed to read image tag from flash\n");
33158 + kernelEndAddr = (unsigned long) simple_strtoul(pTag->kernelAddress, NULL, 10) + \
33159 + (unsigned long) simple_strtoul(pTag->kernelLen, NULL, 10);
33161 + // make suer sp does not share kernel block
33162 + fInfo.flash_scratch_pad_start_blk = flash_get_blk(spAddr+FLASH_BASE_ADDR_REG);
33163 + if (fInfo.flash_scratch_pad_start_blk != flash_get_blk(kernelEndAddr))
33165 + fInfo.flash_scratch_pad_length = SP_MAX_LEN;
33166 + if (fInfo.flash_persistent_start_blk == fInfo.flash_scratch_pad_start_blk) // share blk
33168 +#if 1 /* do not used scratch pad unless it's in its own sector */
33169 + printk("Scratch pad is not used for this flash part.\n");
33170 + fInfo.flash_scratch_pad_length = 0; // no sp
33171 +#else /* allow scratch pad to share a sector with another section such as PSI */
33172 + fInfo.flash_scratch_pad_number_blk = 1;
33173 + fInfo.flash_scratch_pad_blk_offset = fInfo.flash_persistent_blk_offset - fInfo.flash_scratch_pad_length;
33176 + else // on different blk
33178 + fInfo.flash_scratch_pad_number_blk = fInfo.flash_persistent_start_blk\
33179 + - fInfo.flash_scratch_pad_start_blk;
33180 + // find out the offset in the start_blk
33182 + for (i = fInfo.flash_scratch_pad_start_blk;
33183 + i < (fInfo.flash_scratch_pad_start_blk + fInfo.flash_scratch_pad_number_blk); i++)
33184 + usedBlkSize += flash_get_sector_size((byte) i);
33185 + fInfo.flash_scratch_pad_blk_offset = usedBlkSize - fInfo.flash_scratch_pad_length;
33190 + printk("No flash for scratch pad!\n");
33191 + fInfo.flash_scratch_pad_length = 0; // no sp
33194 +#if defined(DEBUG_FLASH)
33195 + printk("fInfo.flash_scratch_pad_start_blk = %d\n", fInfo.flash_scratch_pad_start_blk);
33196 + printk("fInfo.flash_scratch_pad_number_blk = %d\n", fInfo.flash_scratch_pad_number_blk);
33197 + printk("fInfo.flash_scratch_pad_length = 0x%x\n", fInfo.flash_scratch_pad_length);
33198 + printk("fInfo.flash_scratch_pad_blk_offset = 0x%x\n", (unsigned int)fInfo.flash_scratch_pad_blk_offset);
33200 + printk("fInfo.flash_nvram_start_blk = %d\n", fInfo.flash_nvram_start_blk);
33201 + printk("fInfo.flash_nvram_blk_offset = 0x%x\n", (unsigned int)fInfo.flash_nvram_blk_offset);
33202 + printk("fInfo.flash_nvram_number_blk = %d\n", fInfo.flash_nvram_number_blk);
33204 + printk("psi startAddr = %x\n", startAddr+FLASH_BASE_ADDR_REG);
33205 + printk("fInfo.flash_persistent_start_blk = %d\n", fInfo.flash_persistent_start_blk);
33206 + printk("fInfo.flash_persistent_blk_offset = 0x%x\n", (unsigned int)fInfo.flash_persistent_blk_offset);
33207 + printk("fInfo.flash_persistent_number_blk = %d\n", fInfo.flash_persistent_number_blk);
33214 +/***********************************************************************
33215 + * Function Name: kerSysFlashAddrInfoGet
33216 + * Description : Fills in a structure with information about the NVRAM
33217 + * and persistent storage sections of flash memory.
33218 + * Fro physmap.c to mount the fs vol.
33219 + * Returns : None.
33220 + ***********************************************************************/
33221 +void kerSysFlashAddrInfoGet(PFLASH_ADDR_INFO pflash_addr_info)
33223 + pflash_addr_info->flash_nvram_blk_offset = fInfo.flash_nvram_blk_offset;
33224 + pflash_addr_info->flash_nvram_length = fInfo.flash_nvram_length;
33225 + pflash_addr_info->flash_nvram_number_blk = fInfo.flash_nvram_number_blk;
33226 + pflash_addr_info->flash_nvram_start_blk = fInfo.flash_nvram_start_blk;
33227 + pflash_addr_info->flash_persistent_blk_offset = fInfo.flash_persistent_blk_offset;
33228 + pflash_addr_info->flash_persistent_length = fInfo.flash_persistent_length;
33229 + pflash_addr_info->flash_persistent_number_blk = fInfo.flash_persistent_number_blk;
33230 + pflash_addr_info->flash_persistent_start_blk = fInfo.flash_persistent_start_blk;
33234 +// get shared blks into *** pTempBuf *** which has to be released bye the caller!
33235 +// return: if pTempBuf != NULL, poits to the data with the dataSize of the buffer
33238 +static char *getSharedBlks(int start_blk, int end_blk)
33241 + int usedBlkSize = 0;
33242 + int sect_size = 0;
33243 + char *pTempBuf = NULL;
33244 + char *pBuf = NULL;
33246 + for (i = start_blk; i < end_blk; i++)
33247 + usedBlkSize += flash_get_sector_size((byte) i);
33249 +#if defined(DEBUG_FLASH)
33250 + printk("usedBlkSize = %d\n", usedBlkSize);
33253 + if ((pTempBuf = (char *) retriedKmalloc(usedBlkSize)) == NULL)
33255 + printk("failed to allocate memory with size: %d\n", usedBlkSize);
33260 + for (i = start_blk; i < end_blk; i++)
33262 + sect_size = flash_get_sector_size((byte) i);
33264 +#if defined(DEBUG_FLASH)
33265 + printk("i = %d, sect_size = %d, end_blk = %d\n", i, sect_size, end_blk);
33267 + flash_read_buf((byte)i, 0, pBuf, sect_size);
33268 + pBuf += sect_size;
33276 +// Set the pTempBuf to flash from start_blk to end_blk
33280 +static int setSharedBlks(int start_blk, int end_blk, char *pTempBuf)
33283 + int sect_size = 0;
33285 + char *pBuf = pTempBuf;
33287 + for (i = start_blk; i < end_blk; i++)
33289 + sect_size = flash_get_sector_size((byte) i);
33290 + flash_sector_erase_int(i);
33291 + if (flash_write_buf(i, 0, pBuf, sect_size) != sect_size)
33293 + printk("Error writing flash sector %d.", i);
33297 + pBuf += sect_size;
33305 +/*******************************************************************************
33306 + * NVRAM functions
33307 + *******************************************************************************/
33313 +int kerSysNvRamGet(char *string, int strLen, int offset)
33315 + char *pBuf = NULL;
33317 + if (!flashInitialized)
33318 + kerSysFlashInit();
33320 + if (strLen > FLASH45_LENGTH_NVRAM)
33323 + if ((pBuf = getSharedBlks(fInfo.flash_nvram_start_blk,
33324 + (fInfo.flash_nvram_start_blk + fInfo.flash_nvram_number_blk))) == NULL)
33327 + // get string off the memory buffer
33328 + memcpy(string, (pBuf + fInfo.flash_nvram_blk_offset + offset), strLen);
33330 + retriedKfree(pBuf);
33340 +int kerSysNvRamSet(char *string, int strLen, int offset)
33343 + char *pBuf = NULL;
33345 + if (strLen > FLASH45_LENGTH_NVRAM)
33348 + if ((pBuf = getSharedBlks(fInfo.flash_nvram_start_blk,
33349 + (fInfo.flash_nvram_start_blk + fInfo.flash_nvram_number_blk))) == NULL)
33352 + // set string to the memory buffer
33353 + memcpy((pBuf + fInfo.flash_nvram_blk_offset + offset), string, strLen);
33355 + if (setSharedBlks(fInfo.flash_nvram_start_blk,
33356 + (fInfo.flash_nvram_number_blk + fInfo.flash_nvram_start_blk), pBuf) != 0)
33359 + retriedKfree(pBuf);
33365 +/***********************************************************************
33366 + * Function Name: kerSysEraseNvRam
33367 + * Description : Erase the NVRAM storage section of flash memory.
33368 + * Returns : 1 -- ok, 0 -- fail
33369 + ***********************************************************************/
33370 +int kerSysEraseNvRam(void)
33373 + char *tempStorage = retriedKmalloc(FLASH45_LENGTH_NVRAM);
33375 + // just write the whole buf with '0xff' to the flash
33376 + if (!tempStorage)
33380 + memset(tempStorage, 0xff, FLASH45_LENGTH_NVRAM);
33381 + if (kerSysNvRamSet(tempStorage, FLASH45_LENGTH_NVRAM, 0) != 0)
33383 + retriedKfree(tempStorage);
33390 +/*******************************************************************************
33392 + *******************************************************************************/
33397 +int kerSysPersistentGet(char *string, int strLen, int offset)
33399 + char *pBuf = NULL;
33401 + if (strLen > fInfo.flash_persistent_length)
33404 + if ((pBuf = getSharedBlks(fInfo.flash_persistent_start_blk,
33405 + (fInfo.flash_persistent_start_blk + fInfo.flash_persistent_number_blk))) == NULL)
33408 + // get string off the memory buffer
33409 + memcpy(string, (pBuf + fInfo.flash_persistent_blk_offset + offset), strLen);
33411 + retriedKfree(pBuf);
33421 +int kerSysPersistentSet(char *string, int strLen, int offset)
33424 + char *pBuf = NULL;
33426 + if (strLen > fInfo.flash_persistent_length)
33429 + if ((pBuf = getSharedBlks(fInfo.flash_persistent_start_blk,
33430 + (fInfo.flash_persistent_start_blk + fInfo.flash_persistent_number_blk))) == NULL)
33433 + // set string to the memory buffer
33434 + memcpy((pBuf + fInfo.flash_persistent_blk_offset + offset), string, strLen);
33436 + if (setSharedBlks(fInfo.flash_persistent_start_blk,
33437 + (fInfo.flash_persistent_number_blk + fInfo.flash_persistent_start_blk), pBuf) != 0)
33440 + retriedKfree(pBuf);
33446 +// flash bcm image
33449 +// !0 - the sector number fail to be flashed (should not be 0)
33450 +int kerSysBcmImageSet( int flash_start_addr, char *string, int size)
33456 + char *pTempBuf = NULL;
33457 + int whole_image = 0;
33459 + blk_start = flash_get_blk(flash_start_addr);
33460 + if( blk_start < 0 )
33463 + if (flash_start_addr == FLASH_BASE && size > FLASH45_LENGTH_BOOT_ROM)
33466 + /* write image to flash memory */
33469 + sect_size = flash_get_sector_size(blk_start);
33470 +// NOTE: for memory problem in multiple PVC configuration, temporary get rid of kmalloc this 64K for now.
33471 +// if ((pTempBuf = (char *)retriedKmalloc(sect_size)) == NULL)
33473 +// printk("Failed to allocate memory with size: %d. Reset the router...\n", sect_size);
33474 +// kerSysMipsSoftReset(); // reset the board right away.
33476 + // for whole image, no check on psi
33477 + if (!whole_image && blk_start == fInfo.flash_persistent_start_blk) // share the blk with psi
33479 + if (size > (sect_size - fInfo.flash_persistent_length))
33481 + printk("Image is too big\n");
33482 + break; // image is too big. Can not overwrite to nvram
33484 + if ((pTempBuf = (char *)retriedKmalloc(sect_size)) == NULL)
33486 + printk("Failed to allocate memory with size: %d. Reset the router...\n", sect_size);
33487 + kerSysMipsSoftReset(); // reset the board right away.
33489 + flash_read_buf((byte)blk_start, 0, pTempBuf, sect_size);
33490 + if (copy_from_user((void *)pTempBuf,(void *)string, size) != 0)
33491 + break; // failed ?
33492 + flash_sector_erase_int(blk_start); // erase blk before flash
33493 + if (flash_write_buf(blk_start, 0, pTempBuf, sect_size) == sect_size)
33494 + size = 0; // break out and say all is ok
33495 + retriedKfree(pTempBuf);
33499 + flash_sector_erase_int(blk_start); // erase blk before flash
33501 + if (sect_size > size)
33505 + sect_size = size;
33508 + if ((i = flash_write_buf(blk_start, 0, string, sect_size)) != sect_size) {
33512 + string += sect_size;
33513 + size -= sect_size;
33514 + } while (size > 0);
33518 + // If flashing a whole image, erase to end of flash.
33519 + int total_blks = flash_get_numsectors();
33520 + while( blk_start < total_blks )
33522 + flash_sector_erase_int(blk_start);
33527 + retriedKfree(pTempBuf);
33532 + sts = blk_start; // failed to flash this sector
33537 +/*******************************************************************************
33539 + *******************************************************************************/
33540 +// get sp data. NOTE: memcpy work here -- not using copy_from/to_user
33544 +int kerSysScratchPadGet(char *tokenId, char *tokBuf, int bufLen)
33546 + PSP_HEADER pHead = NULL;
33547 + PSP_TOKEN pToken = NULL;
33548 + char *pBuf = NULL;
33549 + char *pShareBuf = NULL;
33550 + char *startPtr = NULL;
33551 + char *endPtr = NULL;
33552 + char *spEndPtr = NULL;
33555 + if (fInfo.flash_scratch_pad_length == 0)
33558 + if (bufLen >= (fInfo.flash_scratch_pad_length - sizeof(SP_HEADER) - sizeof(SP_TOKEN)))
33560 + printk("Exceed scratch pad space by %d\n", bufLen - fInfo.flash_scratch_pad_length \
33561 + - sizeof(SP_HEADER) - sizeof(SP_TOKEN));
33565 + if ((pShareBuf = getSharedBlks(fInfo.flash_scratch_pad_start_blk,
33566 + (fInfo.flash_scratch_pad_start_blk + fInfo.flash_scratch_pad_number_blk))) == NULL)
33569 + // pBuf points to SP buf
33570 + pBuf = pShareBuf + fInfo.flash_scratch_pad_blk_offset;
33572 + pHead = (PSP_HEADER) pBuf;
33573 + if (memcmp(pHead->SPMagicNum, MAGIC_NUMBER, MAGIC_NUM_LEN) != 0)
33575 + printk("Scrap pad is not initialized.\n");
33579 + // search up to SPUsedLen for the token
33580 + startPtr = pBuf + sizeof(SP_HEADER);
33581 + endPtr = pBuf + pHead->SPUsedLen;
33582 + spEndPtr = pBuf + SP_MAX_LEN;
33583 + while (startPtr < endPtr && startPtr < spEndPtr)
33585 + pToken = (PSP_TOKEN) startPtr;
33586 + if (strncmp(pToken->tokenName, tokenId, TOKEN_NAME_LEN) == 0)
33588 + memcpy(tokBuf, startPtr + sizeof(SP_TOKEN), bufLen);
33592 + // get next token
33593 + startPtr += sizeof(SP_TOKEN) + pToken->tokenLen;
33596 + retriedKfree(pShareBuf);
33602 +// set sp. NOTE: memcpy work here -- not using copy_from/to_user
33606 +int kerSysScratchPadSet(char *tokenId, char *tokBuf, int bufLen)
33608 + PSP_TOKEN pToken = NULL;
33609 + PSP_HEADER pHead = NULL;
33610 + char *pShareBuf = NULL;
33611 + char *pBuf = NULL;
33612 + SP_HEADER SPHead;
33613 + SP_TOKEN SPToken;
33617 + if (fInfo.flash_scratch_pad_length == 0)
33620 + if (bufLen >= (fInfo.flash_scratch_pad_length - sizeof(SP_HEADER) - sizeof(SP_TOKEN)))
33622 + printk("Exceed scratch pad space by %d\n", bufLen - fInfo.flash_scratch_pad_length \
33623 + - sizeof(SP_HEADER) - sizeof(SP_TOKEN));
33627 + if ((pShareBuf = getSharedBlks(fInfo.flash_scratch_pad_start_blk,
33628 + (fInfo.flash_scratch_pad_start_blk + fInfo.flash_scratch_pad_number_blk))) == NULL)
33631 + // pBuf points to SP buf
33632 + pBuf = pShareBuf + fInfo.flash_scratch_pad_blk_offset;
33633 + pHead = (PSP_HEADER) pBuf;
33635 + // form header info. SPUsedLen later on...
33636 + memset((char *)&SPHead, 0, sizeof(SP_HEADER));
33637 + memcpy(SPHead.SPMagicNum, MAGIC_NUMBER, MAGIC_NUM_LEN);
33638 + SPHead.SPVersion = SP_VERSION;
33640 + // form token info.
33641 + memset((char*)&SPToken, 0, sizeof(SP_TOKEN));
33642 + strncpy(SPToken.tokenName, tokenId, TOKEN_NAME_LEN - 1);
33643 + SPToken.tokenLen = bufLen;
33644 + if (memcmp(pHead->SPMagicNum, MAGIC_NUMBER, MAGIC_NUM_LEN) != 0)
33646 + // new sp, so just flash the token
33647 + printk("No Scrap pad found. Initialize scratch pad...\n");
33648 + SPHead.SPUsedLen = sizeof(SP_HEADER) + sizeof(SP_TOKEN) + bufLen;
33649 + memcpy(pBuf, (char *)&SPHead, sizeof(SP_HEADER));
33650 + curPtr = pBuf + sizeof(SP_HEADER);
33651 + memcpy(curPtr, (char *)&SPToken, sizeof(SP_TOKEN));
33652 + curPtr += sizeof(SP_TOKEN);
33653 + memcpy(curPtr, tokBuf, bufLen);
33657 + // need search for the token, if exist with same size overwrite it. if sizes differ,
33658 + // move over the later token data over and put the new one at the end
33659 + char *endPtr = pBuf + pHead->SPUsedLen;
33660 + char *spEndPtr = pBuf + SP_MAX_LEN;
33661 + curPtr = pBuf + sizeof(SP_HEADER);
33662 + while (curPtr < endPtr && curPtr < spEndPtr)
33664 + pToken = (PSP_TOKEN) curPtr;
33665 + if (strncmp(pToken->tokenName, tokenId, TOKEN_NAME_LEN) == 0)
33667 + if (pToken->tokenLen == bufLen) // overwirte it
33669 + memcpy((curPtr+sizeof(SP_TOKEN)), tokBuf, bufLen);
33672 + else // move later data over and put the new token at the end
33674 + memcpy((curPtr+sizeof(SP_TOKEN)), tokBuf, bufLen); // ~~~
33678 + else // not same token ~~~
33681 + // get next token
33682 + curPtr += sizeof(SP_TOKEN) + pToken->tokenLen;
33684 + SPHead.SPUsedLen = sizeof(SP_HEADER) + sizeof(SP_TOKEN) + bufLen; // ~~~
33685 + if (SPHead.SPUsedLen > SP_MAX_LEN)
33687 + printk("No more Scratch pad space left! Over limit by %d bytes\n", SPHead.SPUsedLen - SP_MAX_LEN);
33691 + } // else if not new sp
33693 + sts = setSharedBlks(fInfo.flash_scratch_pad_start_blk,
33694 + (fInfo.flash_scratch_pad_number_blk + fInfo.flash_scratch_pad_start_blk), pShareBuf);
33696 + retriedKfree(pShareBuf);
33703 +int kerSysFlashSizeGet(void)
33705 + return flash_get_total_size();
33708 diff -urN linux-2.6.8.1/bcmdrivers/opensource/char/board/bcm963xx/bcm96348/bcm63xx_led.c linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/char/board/bcm963xx/bcm96348/bcm63xx_led.c
33709 --- linux-2.6.8.1/bcmdrivers/opensource/char/board/bcm963xx/bcm96348/bcm63xx_led.c 1970-01-01 01:00:00.000000000 +0100
33710 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/char/board/bcm963xx/bcm96348/bcm63xx_led.c 2006-06-26 09:07:10.000000000 +0200
33714 + Copyright 2002 Broadcom Corp. All Rights Reserved.
33716 + This program is free software; you can distribute it and/or modify it
33717 + under the terms of the GNU General Public License (Version 2) as
33718 + published by the Free Software Foundation.
33720 + This program is distributed in the hope it will be useful, but WITHOUT
33721 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
33722 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
33723 + for more details.
33725 + You should have received a copy of the GNU General Public License along
33726 + with this program; if not, write to the Free Software Foundation, Inc.,
33727 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
33730 +/***************************************************************************
33731 + * File Name : bcm63xx_led.c
33735 + * This file contains bcm963xx board led control API functions.
33737 + * To use it, do the following
33739 + * 1). define in the board.c the following led mappping (this is for 6345GW board):
33740 + * const LED_MAP_PAIR cLedMapping45GW[] =
33741 + * { // led name Initial state physical pin (ledMask)
33742 + * {kLedUsb, kLedStateOff, GPIO_LED_PIN_7},
33743 + * {kLedAdsl, kLedStateOff, GPIO_LED_PIN_8},
33744 + * {kLedPPP, kLedStateOff, GPIO_LED_PIN_9}, // PPP and WanData share PIN_9
33745 + * {kLedWanData, kLedStateOff, GPIO_LED_PIN_9},
33746 + * {kLedWireless, kLedStateOff, GPIO_LED_PIN_10},
33747 + * {kLedEnd, kLedStateOff, 0 } // NOTE: kLedEnd has to be at the end.
33749 + * 2). };To initialize led API and initial state of the leds, call the following function with the mapping
33750 + * pointer from the above struct
33752 + * boardLedInit((PLED_MAP_PAIR) &cLedMapping45R);
33754 + * 3). Sample call for kernel mode:
33756 + * kerSysLedCtrl(kLedAdsl, kLedStateBlinkOnce); // kLedxxx defines in board.h
33758 + * 4). Sample call for user mode
33760 + * sysLedCtrl(kLedAdsl, kLedStateBlinkOnce); // kLedxxx defines in board_api.h
33763 + * Created on : 10/28/2002 seanl
33765 + ***************************************************************************/
33768 +#include <linux/init.h>
33769 +#include <linux/fs.h>
33770 +#include <linux/capability.h>
33771 +#include <linux/slab.h>
33772 +#include <linux/errno.h>
33773 +#include <linux/module.h>
33774 +#include <linux/netdevice.h>
33775 +#include <asm/uaccess.h>
33777 +#include <bcm_map_part.h>
33778 +#include <board.h>
33780 +#define k100ms (HZ / 10) // ~100 ms
33781 +#define kFastBlinkCount 0 // ~100ms
33782 +#define kSlowBlinkCount 5 // ~600ms
33784 +#define MAX_VIRT_LEDS 12
33786 +// uncomment // for debug led
33787 +//#define DEBUG_LED
33789 +// global variables:
33790 +struct timer_list gLedTimer;
33791 +int gTimerOn = FALSE;
33792 +int gLedCount = 0;
33794 +typedef struct ledinfo
33796 + unsigned short ledMask; // mask for led: ie. giop 10 = 0x0400
33797 + unsigned short ledActiveLow; // GPIO bit reset to turn on LED
33798 + unsigned short ledMaskFail; // mask for led: ie. giop 10 = 0x0400
33799 + unsigned short ledActiveLowFail;// GPIO bit reset to turn on LED
33800 + BOARD_LED_STATE ledState; // current led state
33801 + BOARD_LED_STATE savedLedState; // used in blink once for restore to the orignal ledState
33802 + int blinkCountDown; // if == 0, do blink (toggle). Is assgined value and dec by 1 at each timer.
33803 +} LED_INFO, *PLED_INFO;
33805 +static PLED_INFO gLed = NULL;
33806 +static PLED_INFO gpVirtLeds[MAX_VIRT_LEDS];
33807 +static HANDLE_LED_FUNC gLedHwFunc[MAX_VIRT_LEDS];
33808 +static HANDLE_LED_FUNC gLedHwFailFunc[MAX_VIRT_LEDS];
33810 +#if 0 /* BROKEN */
33811 +#if defined(CONFIG_BCM96348) || defined(CONFIG_BCM96338)
33812 +static int gLedOffInBridgeMode = 1;
33813 +#elif defined(CONFIG_BCM96345)
33814 +static int gLedOffInBridgeMode = 0;
33818 +void ledTimerExpire(void);
33819 +int initLedInfo( PLED_MAP_PAIR pCurMap, PLED_INFO pCurLed );
33821 +//**************************************************************************************
33823 +//**************************************************************************************
33825 +// turn led on and set the ledState
33826 +void ledOn(PLED_INFO pLed)
33828 + if( pLed->ledMask )
33830 + GPIO->GPIODir |= pLed->ledMask; // turn on the direction bit in case was turned off by some one
33831 + if( pLed->ledActiveLow )
33832 + GPIO->GPIOio &= ~pLed->ledMask; // turn on the led
33834 + GPIO->GPIOio |= pLed->ledMask; // turn on the led
33835 + pLed->ledState = pLed->savedLedState = kLedStateOn;
33840 +// turn led off and set the ledState
33841 +void ledOff(PLED_INFO pLed)
33843 + if( pLed->ledMask )
33845 + GPIO->GPIODir |= pLed->ledMask; // turn on the direction bit in case was turned off by some one
33846 + if( pLed->ledActiveLow )
33847 + GPIO->GPIOio |= pLed->ledMask; // turn off the led
33849 + GPIO->GPIOio &= ~pLed->ledMask; // turn off the led
33850 + pLed->ledState = pLed->savedLedState = kLedStateOff;
33854 +// turn led on and set the ledState
33855 +void ledOnFail(PLED_INFO pLed)
33857 + if( pLed->ledMaskFail )
33859 + GPIO->GPIODir |= pLed->ledMaskFail; // turn on the direction bit in case was turned off by some one
33860 + if( pLed->ledActiveLowFail )
33861 + GPIO->GPIOio &= ~pLed->ledMaskFail;// turn on the led
33863 + GPIO->GPIOio |= pLed->ledMaskFail; // turn on the led
33864 + pLed->ledState = pLed->savedLedState = kLedStateFail;
33869 +// turn led off and set the ledState
33870 +void ledOffFail(PLED_INFO pLed)
33872 + if( pLed->ledMaskFail )
33874 + GPIO->GPIODir |= pLed->ledMaskFail; // turn on the direction bit in case was turned off by some one
33875 + if( pLed->ledActiveLowFail )
33876 + GPIO->GPIOio |= pLed->ledMaskFail; // turn off the led
33878 + GPIO->GPIOio &= ~pLed->ledMaskFail;// turn off the led
33879 + pLed->ledState = pLed->savedLedState = kLedStateOff;
33884 +// toggle the led and return the current ledState
33885 +BOARD_LED_STATE ledToggle(PLED_INFO pLed)
33887 + GPIO->GPIODir |= pLed->ledMask; // turn on the direction bit in case was turned off by some one
33888 + if (GPIO->GPIOio & pLed->ledMask)
33890 + GPIO->GPIOio &= ~(pLed->ledMask);
33891 + return( (pLed->ledActiveLow) ? kLedStateOn : kLedStateOff );
33895 + GPIO->GPIOio |= pLed->ledMask;
33896 + return( (pLed->ledActiveLow) ? kLedStateOff : kLedStateOn );
33901 +// led timer. Will return if timer is already on
33902 +void ledTimerStart(void)
33907 +#if defined(DEBUG_LED)
33908 + printk("led: add_timer\n");
33911 + init_timer(&gLedTimer);
33912 + gLedTimer.function = (void*)ledTimerExpire;
33913 + gLedTimer.expires = jiffies + k100ms; // timer expires in ~100ms
33914 + add_timer (&gLedTimer);
33919 +// led timer expire kicks in about ~100ms and perform the led operation according to the ledState and
33920 +// restart the timer according to ledState
33921 +void ledTimerExpire(void)
33924 + PLED_INFO pCurLed;
33926 + gTimerOn = FALSE;
33928 + for (i = 0, pCurLed = gLed; i < gLedCount; i++, pCurLed++)
33930 +#if defined(DEBUG_LED)
33931 + printk("led[%d]: Mask=0x%04x, State = %d, blcd=%d\n", i, pCurLed->ledMask, pCurLed->ledState, pCurLed->blinkCountDown);
33933 + switch (pCurLed->ledState)
33935 + case kLedStateOn:
33936 + case kLedStateOff:
33937 + case kLedStateFail:
33938 + pCurLed->blinkCountDown = 0; // reset the blink count down
33941 + case kLedStateBlinkOnce:
33942 + ledToggle(pCurLed);
33943 + pCurLed->blinkCountDown = 0; // reset to 0
33944 + pCurLed->ledState = pCurLed->savedLedState;
33945 + if (pCurLed->ledState == kLedStateSlowBlinkContinues ||
33946 + pCurLed->ledState == kLedStateFastBlinkContinues)
33947 + ledTimerStart(); // start timer if in blinkContinues stats
33950 + case kLedStateSlowBlinkContinues:
33951 + if (pCurLed->blinkCountDown-- == 0)
33953 + pCurLed->blinkCountDown = kSlowBlinkCount;
33954 + ledToggle(pCurLed);
33959 + case kLedStateFastBlinkContinues:
33960 + if (pCurLed->blinkCountDown-- == 0)
33962 + pCurLed->blinkCountDown = kFastBlinkCount;
33963 + ledToggle(pCurLed);
33969 + printk("Invalid state = %d\n", pCurLed->ledState);
33974 +// initialize the gLedCount and allocate and fill gLed struct
33975 +void __init boardLedInit(PLED_MAP_PAIR cLedMapping)
33977 + PLED_MAP_PAIR p1, p2;
33978 + PLED_INFO pCurLed;
33979 + int needTimer = FALSE;
33980 + int alreadyUsed = 0;
33982 +#if defined(CONFIG_BCM96348) || defined(CONFIG_BCM96338)
33983 + /* Set blink rate for BCM6348/BCM6338 hardware LEDs. */
33984 + GPIO->LEDCtrl &= ~LED_INTERVAL_SET_MASK;
33985 + GPIO->LEDCtrl |= LED_INTERVAL_SET_80MS;
33988 + memset( gpVirtLeds, 0x00, sizeof(gpVirtLeds) );
33989 + memset( gLedHwFunc, 0x00, sizeof(gLedHwFunc) );
33990 + memset( gLedHwFailFunc, 0x00, sizeof(gLedHwFailFunc) );
33994 + // Check for multiple LED names and multiple LED GPIO pins that share the
33995 + // same physical board LED.
33996 + for( p1 = cLedMapping; p1->ledName != kLedEnd; p1++ )
33999 + for( p2 = cLedMapping; p2 != p1; p2++ )
34001 + if( (p1->ledMask && p1->ledMask == p2->ledMask) ||
34002 + (p1->ledMaskFail && p1->ledMaskFail == p2->ledMaskFail) )
34009 + if( alreadyUsed == 0 )
34013 + gLed = (PLED_INFO) kmalloc((gLedCount * sizeof(LED_INFO)), GFP_KERNEL);
34014 + if( gLed == NULL )
34016 + printk( "LED memory allocation error.\n" );
34020 + memset( gLed, 0x00, gLedCount * sizeof(LED_INFO) );
34022 + // initial the gLed with unique ledMask and initial state. If more than 1 ledNames share the physical led
34023 + // (ledMask) the first defined led's ledInitState will be used.
34025 + for( p1 = cLedMapping; p1->ledName != kLedEnd; p1++ )
34027 + if( (int) p1->ledName > MAX_VIRT_LEDS )
34031 + for( p2 = cLedMapping; p2 != p1; p2++ )
34033 + if( (p1->ledMask && p1->ledMask == p2->ledMask) ||
34034 + (p1->ledMaskFail && p1->ledMaskFail == p2->ledMaskFail) )
34041 + if( alreadyUsed == 0 )
34043 + // Initialize the board LED for the first time.
34044 + needTimer = initLedInfo( p1, pCurLed );
34045 + gpVirtLeds[(int) p1->ledName] = pCurLed;
34051 + for( pLed = gLed; pLed != pCurLed; pLed++ )
34053 + // Find the LED_INFO structure that has already been initialized.
34054 + if((pLed->ledMask && pLed->ledMask == p1->ledMask) ||
34055 + (pLed->ledMaskFail && pLed->ledMaskFail==p1->ledMaskFail))
34057 + // The board LED has already been initialized but possibly
34058 + // not completely initialized.
34059 + if( p1->ledMask )
34061 + pLed->ledMask = p1->ledMask;
34062 + pLed->ledActiveLow = p1->ledActiveLow;
34064 + if( p1->ledMaskFail )
34066 + pLed->ledMaskFail = p1->ledMaskFail;
34067 + pLed->ledActiveLowFail = p1->ledActiveLowFail;
34069 + gpVirtLeds[(int) p1->ledName] = pLed;
34079 +#if defined(DEBUG_LED)
34081 + for (i=0; i < gLedCount; i++)
34082 + printk("initLed: led[%d]: mask=0x%04x, state=%d\n", i,(gLed+i)->ledMask, (gLed+i)->ledState);
34087 +// Initialize a structure that contains information about a physical board LED
34088 +// control. The board LED may contain more than one GPIO pin to control a
34089 +// normal condition (green) or a failure condition (red).
34090 +int initLedInfo( PLED_MAP_PAIR pCurMap, PLED_INFO pCurLed )
34092 + int needTimer = FALSE;
34093 + pCurLed->ledState = pCurLed->savedLedState = pCurMap->ledInitState;
34094 + pCurLed->ledMask = pCurMap->ledMask;
34095 + pCurLed->ledActiveLow = pCurMap->ledActiveLow;
34096 + pCurLed->ledMaskFail = pCurMap->ledMaskFail;
34097 + pCurLed->ledActiveLowFail = pCurMap->ledActiveLowFail;
34099 + switch (pCurLed->ledState)
34101 + case kLedStateOn:
34102 + pCurLed->blinkCountDown = 0; // reset the blink count down
34105 + case kLedStateOff:
34106 + pCurLed->blinkCountDown = 0; // reset the blink count down
34109 + case kLedStateFail:
34110 + pCurLed->blinkCountDown = 0; // reset the blink count down
34111 + ledOnFail(pCurLed);
34113 + case kLedStateBlinkOnce:
34114 + pCurLed->blinkCountDown = 1;
34115 + needTimer = TRUE;
34117 + case kLedStateSlowBlinkContinues:
34118 + pCurLed->blinkCountDown = kSlowBlinkCount;
34119 + needTimer = TRUE;
34121 + case kLedStateFastBlinkContinues:
34122 + pCurLed->blinkCountDown = kFastBlinkCount;
34123 + needTimer = TRUE;
34126 + printk("Invalid state = %d\n", pCurLed->ledState);
34129 + return( needTimer );
34132 +#if 0 /* BROKEN */
34133 +// Determines if there is at least one interface in bridge mode. Bridge mode
34134 +// is determined by the cfm convention of naming bridge interfaces nas17
34136 +static int isBridgedProtocol(void)
34138 + extern int dev_get(const char *name);
34139 + const int firstBridgeId = 17;
34140 + const int lastBridgeId = 24;
34145 + for( i = firstBridgeId; i <= lastBridgeId; i++ )
34147 + sprintf( name, "nas%d", i );
34149 + if( dev_get(name) )
34160 +// led ctrl. Maps the ledName to the corresponding ledInfoPtr and perform the led operation
34161 +void boardLedCtrl(BOARD_LED_NAME ledName, BOARD_LED_STATE ledState)
34163 + PLED_INFO ledInfoPtr;
34165 + // do the mapping from virtual to physical led
34166 + if( (int) ledName < MAX_VIRT_LEDS )
34167 + ledInfoPtr = gpVirtLeds[(int) ledName];
34169 + ledInfoPtr = NULL;
34171 + if (ledInfoPtr == NULL)
34174 + if( ledState != kLedStateFail && gLedHwFunc[(int) ledName] )
34176 + (*gLedHwFunc[(int) ledName]) (ledName, ledState);
34177 + ledOffFail(ledInfoPtr);
34181 + if( ledState == kLedStateFail && gLedHwFailFunc[(int) ledName] )
34183 + (*gLedHwFailFunc[(int) ledName]) (ledName, ledState);
34184 + ledOff(ledInfoPtr);
34188 +#if 0 /* BROKEN */
34189 + // Do not blink the WAN Data LED if at least one interface is in bridge mode.
34190 + if(gLedOffInBridgeMode == 1 && (ledName == kLedWanData || ledName == kLedPPP))
34192 + static int BridgedProtocol = -1;
34194 + if( BridgedProtocol == -1 )
34195 + BridgedProtocol = isBridgedProtocol();
34197 + if( BridgedProtocol == TRUE )
34202 + // If the state is kLedStateFail and there is not a failure LED defined
34203 + // in the board parameters, change the state to kLedStateFastBlinkContinues.
34204 + if( ledState == kLedStateFail && ledInfoPtr->ledMaskFail == 0 )
34205 + ledState = kLedStateFastBlinkContinues;
34207 + switch (ledState)
34209 + case kLedStateOn:
34210 + // First, turn off the complimentary (failure) LED GPIO.
34211 + if( ledInfoPtr->ledMaskFail )
34212 + ledOffFail(ledInfoPtr);
34214 + if( gLedHwFailFunc[(int) ledName] )
34215 + (*gLedHwFailFunc[(int) ledName]) (ledName, kLedStateOff);
34217 + // Next, turn on the specified LED GPIO.
34218 + ledOn(ledInfoPtr);
34221 + case kLedStateOff:
34222 + // First, turn off the complimentary (failure) LED GPIO.
34223 + if( ledInfoPtr->ledMaskFail )
34224 + ledOffFail(ledInfoPtr);
34226 + if( gLedHwFailFunc[(int) ledName] )
34227 + (*gLedHwFailFunc[(int) ledName]) (ledName, kLedStateOff);
34229 + // Next, turn off the specified LED GPIO.
34230 + ledOff(ledInfoPtr);
34233 + case kLedStateFail:
34234 + // First, turn off the complimentary (normal) LED GPIO.
34235 + if( ledInfoPtr->ledMask )
34236 + ledOff(ledInfoPtr);
34238 + if( gLedHwFunc[(int) ledName] )
34239 + (*gLedHwFunc[(int) ledName]) (ledName, kLedStateOff);
34241 + // Next, turn on (red) the specified LED GPIO.
34242 + ledOnFail(ledInfoPtr);
34245 + case kLedStateBlinkOnce:
34246 + // skip blinkOnce if it is already in Slow/Fast blink continues state
34247 + if (ledInfoPtr->savedLedState == kLedStateSlowBlinkContinues ||
34248 + ledInfoPtr->savedLedState == kLedStateFastBlinkContinues)
34252 + if (ledInfoPtr->blinkCountDown == 0) // skip the call if it is 1
34254 + ledToggle(ledInfoPtr);
34255 + ledInfoPtr->blinkCountDown = 1; // it will be reset to 0 when timer expires
34256 + ledInfoPtr->ledState = kLedStateBlinkOnce;
34262 + case kLedStateSlowBlinkContinues:
34263 + ledInfoPtr->blinkCountDown = kSlowBlinkCount;
34264 + ledInfoPtr->ledState = kLedStateSlowBlinkContinues;
34265 + ledInfoPtr->savedLedState = kLedStateSlowBlinkContinues;
34269 + case kLedStateFastBlinkContinues:
34270 + ledInfoPtr->blinkCountDown = kFastBlinkCount;
34271 + ledInfoPtr->ledState = kLedStateFastBlinkContinues;
34272 + ledInfoPtr->savedLedState = kLedStateFastBlinkContinues;
34277 + printk("Invalid led state\n");
34281 +// This function is called for an LED that is controlled by hardware.
34282 +void kerSysLedRegisterHwHandler( BOARD_LED_NAME ledName,
34283 + HANDLE_LED_FUNC ledHwFunc, int ledFailType )
34285 + if( (int) ledName < MAX_VIRT_LEDS )
34287 + if( ledFailType == 1 )
34288 + gLedHwFailFunc[(int) ledName] = ledHwFunc;
34290 + gLedHwFunc[(int) ledName] = ledHwFunc;
34294 diff -urN linux-2.6.8.1/bcmdrivers/opensource/char/board/bcm963xx/bcm96348/board.c linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/char/board/bcm963xx/bcm96348/board.c
34295 --- linux-2.6.8.1/bcmdrivers/opensource/char/board/bcm963xx/bcm96348/board.c 1970-01-01 01:00:00.000000000 +0100
34296 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/char/board/bcm963xx/bcm96348/board.c 2006-06-26 09:07:10.000000000 +0200
34300 + Copyright 2002 Broadcom Corp. All Rights Reserved.
34302 + This program is free software; you can distribute it and/or modify it
34303 + under the terms of the GNU General Public License (Version 2) as
34304 + published by the Free Software Foundation.
34306 + This program is distributed in the hope it will be useful, but WITHOUT
34307 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
34308 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
34309 + for more details.
34311 + You should have received a copy of the GNU General Public License along
34312 + with this program; if not, write to the Free Software Foundation, Inc.,
34313 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
34316 +/***************************************************************************
34317 + * File Name : board.c
34319 + * Description: This file contains Linux character device driver entry
34320 + * for the board related ioctl calls: flash, get free kernel
34321 + * page and dump kernel memory, etc.
34323 + * Created on : 2/20/2002 seanl: use cfiflash.c, cfliflash.h (AMD specific)
34325 + ***************************************************************************/
34329 +#include <linux/version.h>
34330 +#include <linux/init.h>
34331 +#include <linux/fs.h>
34332 +#include <linux/interrupt.h>
34333 +#include <linux/capability.h>
34334 +#include <linux/slab.h>
34335 +#include <linux/errno.h>
34336 +#include <linux/module.h>
34337 +#include <linux/pagemap.h>
34338 +#include <asm/uaccess.h>
34339 +#include <linux/wait.h>
34340 +#include <linux/poll.h>
34341 +#include <linux/sched.h>
34342 +#include <linux/list.h>
34343 +#include <linux/if.h>
34345 +#include <bcm_map_part.h>
34346 +#include <board.h>
34347 +#include <bcmTag.h>
34348 +#include "boardparms.h"
34349 +#include "cfiflash.h"
34350 +#include "bcm_intr.h"
34351 +#include "board.h"
34352 +#include "bcm_map_part.h"
34355 +#if defined (NON_CONSECUTIVE_MAC)
34356 +// used to be the last octet. Now changed to the first 5 bits of the the forth octet
34357 +// to reduced the duplicated MAC addresses.
34358 +#define CHANGED_OCTET 3
34359 +#define SHIFT_BITS 3
34361 +#define CHANGED_OCTET 1
34362 +#define SHIFT_BITS 0
34365 +#if defined (WIRELESS)
34366 +#define SES_BTN_PRESSED 0x00000001
34367 +#define SES_EVENTS SES_BTN_PRESSED /*OR all values if any*/
34368 +#define SES_LED_OFF 0
34369 +#define SES_LED_ON 1
34370 +#define SES_LED_BLINK 2
34375 + unsigned long ulId;
34377 + char chReserved[3];
34378 +} MAC_ADDR_INFO, *PMAC_ADDR_INFO;
34382 + unsigned long ulSdramSize;
34383 + unsigned long ulPsiSize;
34384 + unsigned long ulNumMacAddrs;
34385 + unsigned long ucaBaseMacAddr[NVRAM_MAC_ADDRESS_LEN];
34386 + MAC_ADDR_INFO MacAddrs[1];
34387 +} NVRAM_INFO, *PNVRAM_INFO;
34391 + unsigned long eventmask;
34392 +} BOARD_IOC, *PBOARD_IOC;
34395 +/*Dyinggasp callback*/
34396 +typedef void (*cb_dgasp_t)(void *arg);
34397 +typedef struct _CB_DGASP__LIST
34399 + struct list_head list;
34400 + char name[IFNAMSIZ];
34401 + cb_dgasp_t cb_dgasp_fn;
34403 +}CB_DGASP_LIST , *PCB_DGASP_LIST;
34406 +static LED_MAP_PAIR LedMapping[] =
34407 +{ // led name Initial state physical pin (ledMask)
34408 + {kLedEnd, kLedStateOff, 0, 0, 0, 0},
34409 + {kLedEnd, kLedStateOff, 0, 0, 0, 0},
34410 + {kLedEnd, kLedStateOff, 0, 0, 0, 0},
34411 + {kLedEnd, kLedStateOff, 0, 0, 0, 0},
34412 + {kLedEnd, kLedStateOff, 0, 0, 0, 0},
34413 + {kLedEnd, kLedStateOff, 0, 0, 0, 0},
34414 + {kLedEnd, kLedStateOff, 0, 0, 0, 0},
34415 + {kLedEnd, kLedStateOff, 0, 0, 0, 0},
34416 + {kLedEnd, kLedStateOff, 0, 0, 0, 0} // NOTE: kLedEnd has to be at the end.
34420 +extern struct file fastcall *fget_light(unsigned int fd, int *fput_needed);
34421 +extern unsigned int nr_free_pages (void);
34422 +extern const char *get_system_type(void);
34423 +extern void kerSysFlashInit(void);
34424 +extern unsigned long get_nvram_start_addr(void);
34425 +extern unsigned long get_scratch_pad_start_addr(void);
34426 +extern unsigned long getMemorySize(void);
34427 +extern void __init boardLedInit(PLED_MAP_PAIR);
34428 +extern void boardLedCtrl(BOARD_LED_NAME, BOARD_LED_STATE);
34429 +extern void kerSysLedRegisterHandler( BOARD_LED_NAME ledName,
34430 + HANDLE_LED_FUNC ledHwFunc, int ledFailType );
34433 +void __init InitNvramInfo( void );
34434 +static int board_open( struct inode *inode, struct file *filp );
34435 +static int board_ioctl( struct inode *inode, struct file *flip, unsigned int command, unsigned long arg );
34436 +static ssize_t board_read(struct file *filp, char __user *buffer, size_t count, loff_t *ppos);
34437 +static unsigned int board_poll(struct file *filp, struct poll_table_struct *wait);
34438 +static int board_release(struct inode *inode, struct file *filp);
34440 +static BOARD_IOC* borad_ioc_alloc(void);
34441 +static void borad_ioc_free(BOARD_IOC* board_ioc);
34443 +/* DyingGasp function prototype */
34444 +static void __init kerSysDyingGaspMapIntr(void);
34445 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0))
34446 +static irqreturn_t kerSysDyingGaspIsr(int irq, void * dev_id, struct pt_regs * regs);
34448 +static unsigned int kerSysDyingGaspIsr(void);
34450 +static void __init kerSysInitDyingGaspHandler( void );
34451 +static void __exit kerSysDeinitDyingGaspHandler( void );
34452 +/* -DyingGasp function prototype - */
34455 +#if defined (WIRELESS)
34456 +static irqreturn_t sesBtn_isr(int irq, void *dev_id, struct pt_regs *ptregs);
34457 +static void __init sesBtn_mapGpio(void);
34458 +static void __init sesBtn_mapIntr(int context);
34459 +static unsigned int sesBtn_poll(struct file *file, struct poll_table_struct *wait);
34460 +static ssize_t sesBtn_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos);
34461 +static void __init sesLed_mapGpio(void);
34462 +static void sesLed_ctrl(int action);
34463 +static void __init ses_board_init(void);
34464 +static void __exit ses_board_deinit(void);
34467 +static PNVRAM_INFO g_pNvramInfo = NULL;
34468 +static int g_ledInitialized = 0;
34469 +static wait_queue_head_t g_board_wait_queue;
34470 +static CB_DGASP_LIST *g_cb_dgasp_list_head = NULL;
34472 +static int g_wakeup_monitor = 0;
34473 +static struct file *g_monitor_file = NULL;
34474 +static struct task_struct *g_monitor_task = NULL;
34475 +static unsigned int (*g_orig_fop_poll)
34476 + (struct file *, struct poll_table_struct *) = NULL;
34478 +static struct file_operations board_fops =
34480 + open: board_open,
34481 + ioctl: board_ioctl,
34482 + poll: board_poll,
34483 + read: board_read,
34484 + release: board_release,
34487 +uint32 board_major = 0;
34489 +#if defined (WIRELESS)
34490 +static unsigned short sesBtn_irq = BP_NOT_DEFINED;
34491 +static unsigned short sesBtn_gpio = BP_NOT_DEFINED;
34492 +static unsigned short sesLed_gpio = BP_NOT_DEFINED;
34495 +#if defined(MODULE)
34496 +int init_module(void)
34498 + return( brcm_board_init() );
34501 +void cleanup_module(void)
34504 + printk("brcm flash: cleanup_module failed because module is in use\n");
34506 + brcm_board_cleanup();
34512 +static int __init brcm_board_init( void )
34514 + typedef int (*BP_LED_FUNC) (unsigned short *);
34515 + static struct BpLedInformation
34517 + BOARD_LED_NAME ledName;
34518 + BP_LED_FUNC bpFunc;
34519 + BP_LED_FUNC bpFuncFail;
34521 + {{kLedAdsl, BpGetAdslLedGpio, BpGetAdslFailLedGpio},
34522 + {kLedWireless, BpGetWirelessLedGpio, NULL},
34523 + {kLedUsb, BpGetUsbLedGpio, NULL},
34524 + {kLedHpna, BpGetHpnaLedGpio, NULL},
34525 + {kLedWanData, BpGetWanDataLedGpio, NULL},
34526 + {kLedPPP, BpGetPppLedGpio, BpGetPppFailLedGpio},
34527 + {kLedVoip, BpGetVoipLedGpio, NULL},
34528 + {kLedSes, BpGetWirelessSesLedGpio, NULL},
34529 + {kLedEnd, NULL, NULL}
34534 + ret = register_chrdev(BOARD_DRV_MAJOR, "bcrmboard", &board_fops );
34536 + printk( "brcm_board_init(major %d): fail to register device.\n",BOARD_DRV_MAJOR);
34539 + PLED_MAP_PAIR pLedMap = LedMapping;
34540 + unsigned short gpio;
34541 + struct BpLedInformation *pInfo;
34543 + printk("brcmboard: brcm_board_init entry\n");
34544 + board_major = BOARD_DRV_MAJOR;
34547 + for( pInfo = bpLedInfo; pInfo->ledName != kLedEnd; pInfo++ )
34549 + if( pInfo->bpFunc && (*pInfo->bpFunc) (&gpio) == BP_SUCCESS )
34551 + pLedMap->ledName = pInfo->ledName;
34552 + pLedMap->ledMask = GPIO_NUM_TO_MASK(gpio);
34553 + pLedMap->ledActiveLow = (gpio & BP_ACTIVE_LOW) ? 1 : 0;
34555 + if( pInfo->bpFuncFail && (*pInfo->bpFuncFail) (&gpio) == BP_SUCCESS )
34557 + pLedMap->ledName = pInfo->ledName;
34558 + pLedMap->ledMaskFail = GPIO_NUM_TO_MASK(gpio);
34559 + pLedMap->ledActiveLowFail = (gpio & BP_ACTIVE_LOW) ? 1 : 0;
34561 + if( pLedMap->ledName != kLedEnd )
34565 + init_waitqueue_head(&g_board_wait_queue);
34566 +#if defined (WIRELESS)
34567 + ses_board_init();
34569 + kerSysInitDyingGaspHandler();
34570 + kerSysDyingGaspMapIntr();
34572 + boardLedInit(LedMapping);
34573 + g_ledInitialized = 1;
34579 +void __init InitNvramInfo( void )
34581 + PNVRAM_DATA pNvramData = (PNVRAM_DATA) get_nvram_start_addr();
34582 + unsigned long ulNumMacAddrs = pNvramData->ulNumMacAddrs;
34584 + if( ulNumMacAddrs > 0 && ulNumMacAddrs <= NVRAM_MAC_COUNT_MAX )
34586 + unsigned long ulNvramInfoSize =
34587 + sizeof(NVRAM_INFO) + ((sizeof(MAC_ADDR_INFO) - 1) * ulNumMacAddrs);
34589 + g_pNvramInfo = (PNVRAM_INFO) kmalloc( ulNvramInfoSize, GFP_KERNEL );
34591 + if( g_pNvramInfo )
34593 + unsigned long ulPsiSize;
34594 + if( BpGetPsiSize( &ulPsiSize ) != BP_SUCCESS )
34595 + ulPsiSize = NVRAM_PSI_DEFAULT;
34596 + memset( g_pNvramInfo, 0x00, ulNvramInfoSize );
34597 + g_pNvramInfo->ulPsiSize = ulPsiSize * 1024;
34598 + g_pNvramInfo->ulNumMacAddrs = pNvramData->ulNumMacAddrs;
34599 + memcpy( g_pNvramInfo->ucaBaseMacAddr, pNvramData->ucaBaseMacAddr,
34600 + NVRAM_MAC_ADDRESS_LEN );
34601 + g_pNvramInfo->ulSdramSize = getMemorySize();
34604 + printk("ERROR - Could not allocate memory for NVRAM data\n");
34607 + printk("ERROR - Invalid number of MAC addresses (%ld) is configured.\n",
34611 +void __exit brcm_board_cleanup( void )
34613 + printk("brcm_board_cleanup()\n");
34615 + if (board_major != -1)
34617 +#if defined (WIRELESS)
34618 + ses_board_deinit();
34620 + kerSysDeinitDyingGaspHandler();
34621 + unregister_chrdev(board_major, "board_ioctl");
34625 +static BOARD_IOC* borad_ioc_alloc(void)
34627 + BOARD_IOC *board_ioc =NULL;
34628 + board_ioc = (BOARD_IOC*) kmalloc( sizeof(BOARD_IOC) , GFP_KERNEL );
34631 + memset(board_ioc, 0, sizeof(BOARD_IOC));
34633 + return board_ioc;
34636 +static void borad_ioc_free(BOARD_IOC* board_ioc)
34640 + kfree(board_ioc);
34645 +static int board_open( struct inode *inode, struct file *filp )
34647 + filp->private_data = borad_ioc_alloc();
34649 + if (filp->private_data == NULL)
34655 +static int board_release(struct inode *inode, struct file *filp)
34657 + BOARD_IOC *board_ioc = filp->private_data;
34659 + wait_event_interruptible(g_board_wait_queue, 1);
34660 + borad_ioc_free(board_ioc);
34666 +static unsigned int board_poll(struct file *filp, struct poll_table_struct *wait)
34668 + unsigned int mask = 0;
34669 +#if defined (WIRELESS)
34670 + BOARD_IOC *board_ioc = filp->private_data;
34673 + poll_wait(filp, &g_board_wait_queue, wait);
34674 +#if defined (WIRELESS)
34675 + if(board_ioc->eventmask & SES_EVENTS){
34676 + mask |= sesBtn_poll(filp, wait);
34684 +static ssize_t board_read(struct file *filp, char __user *buffer, size_t count, loff_t *ppos)
34686 +#if defined (WIRELESS)
34687 + BOARD_IOC *board_ioc = filp->private_data;
34688 + if(board_ioc->eventmask & SES_EVENTS){
34689 + return sesBtn_read(filp, buffer, count, ppos);
34695 +//**************************************************************************************
34696 +// Utitlities for dump memory, free kernel pages, mips soft reset, etc.
34697 +//**************************************************************************************
34699 +/***********************************************************************
34700 + * Function Name: dumpaddr
34701 + * Description : Display a hex dump of the specified address.
34702 + ***********************************************************************/
34703 +void dumpaddr( unsigned char *pAddr, int nLen )
34705 + static char szHexChars[] = "0123456789abcdef";
34707 + char *p = szLine;
34708 + unsigned char ch, *q;
34710 + unsigned long ul;
34712 + while( nLen > 0 )
34714 + sprintf( szLine, "%8.8lx: ", (unsigned long) pAddr );
34715 + p = szLine + strlen(szLine);
34717 + for(i = 0; i < 16 && nLen > 0; i += sizeof(long), nLen -= sizeof(long))
34719 + ul = *(unsigned long *) &pAddr[i];
34720 + q = (unsigned char *) &ul;
34721 + for( j = 0; j < sizeof(long); j++ )
34723 + *p++ = szHexChars[q[j] >> 4];
34724 + *p++ = szHexChars[q[j] & 0x0f];
34729 + for( j = 0; j < 16 - i; j++ )
34730 + *p++ = ' ', *p++ = ' ', *p++ = ' ';
34732 + *p++ = ' ', *p++ = ' ', *p++ = ' ';
34734 + for( j = 0; j < i; j++ )
34737 + *p++ = (ch > ' ' && ch < '~') ? ch : '.';
34741 + printk( "%s\r\n", szLine );
34745 + printk( "\r\n" );
34749 +void kerSysMipsSoftReset(void)
34751 +#if defined(CONFIG_BCM96348)
34752 + if (PERF->RevID == 0x634800A1) {
34753 + typedef void (*FNPTR) (void);
34754 + FNPTR bootaddr = (FNPTR) FLASH_BASE;
34757 + /* Disable interrupts. */
34760 + /* Reset all blocks. */
34761 + PERF->BlockSoftReset &= ~BSR_ALL_BLOCKS;
34762 + for( i = 0; i < 1000000; i++ )
34764 + PERF->BlockSoftReset |= BSR_ALL_BLOCKS;
34765 + /* Jump to the power on address. */
34769 + PERF->pll_control |= SOFT_RESET; // soft reset mips
34771 + PERF->pll_control |= SOFT_RESET; // soft reset mips
34776 +int kerSysGetMacAddress( unsigned char *pucaMacAddr, unsigned long ulId )
34779 + PMAC_ADDR_INFO pMai = NULL;
34780 + PMAC_ADDR_INFO pMaiFreeNoId = NULL;
34781 + PMAC_ADDR_INFO pMaiFreeId = NULL;
34782 + unsigned long i = 0, ulIdxNoId = 0, ulIdxId = 0, shiftedIdx = 0;
34784 + for( i = 0, pMai = g_pNvramInfo->MacAddrs; i < g_pNvramInfo->ulNumMacAddrs;
34787 + if( ulId == pMai->ulId || ulId == MAC_ADDRESS_ANY )
34789 + /* This MAC address has been used by the caller in the past. */
34790 + memcpy( pucaMacAddr, g_pNvramInfo->ucaBaseMacAddr,
34791 + NVRAM_MAC_ADDRESS_LEN );
34793 + pucaMacAddr[NVRAM_MAC_ADDRESS_LEN - CHANGED_OCTET] += (shiftedIdx << SHIFT_BITS);
34794 + pMai->chInUse = 1;
34795 + pMaiFreeNoId = pMaiFreeId = NULL;
34799 + if( pMai->chInUse == 0 )
34801 + if( pMai->ulId == 0 && pMaiFreeNoId == NULL )
34803 + /* This is an available MAC address that has never been
34806 + pMaiFreeNoId = pMai;
34810 + if( pMai->ulId != 0 && pMaiFreeId == NULL )
34812 + /* This is an available MAC address that has been used
34813 + * before. Use addresses that have never been used
34814 + * first, before using this one.
34816 + pMaiFreeId = pMai;
34822 + if( pMaiFreeNoId || pMaiFreeId )
34824 + /* An available MAC address was found. */
34825 + memcpy(pucaMacAddr, g_pNvramInfo->ucaBaseMacAddr,NVRAM_MAC_ADDRESS_LEN);
34826 + if( pMaiFreeNoId )
34828 + shiftedIdx = ulIdxNoId;
34829 + pucaMacAddr[NVRAM_MAC_ADDRESS_LEN - CHANGED_OCTET] += (shiftedIdx << SHIFT_BITS);
34830 + pMaiFreeNoId->ulId = ulId;
34831 + pMaiFreeNoId->chInUse = 1;
34835 + shiftedIdx = ulIdxId;
34836 + pucaMacAddr[NVRAM_MAC_ADDRESS_LEN - CHANGED_OCTET] += (shiftedIdx << SHIFT_BITS);
34837 + pMaiFreeId->ulId = ulId;
34838 + pMaiFreeId->chInUse = 1;
34842 + if( i == g_pNvramInfo->ulNumMacAddrs )
34843 + nRet = -EADDRNOTAVAIL;
34846 +} /* kerSysGetMacAddr */
34848 +int kerSysReleaseMacAddress( unsigned char *pucaMacAddr )
34850 + int nRet = -EINVAL;
34851 + unsigned long ulIdx = 0;
34852 + int idx = (pucaMacAddr[NVRAM_MAC_ADDRESS_LEN - CHANGED_OCTET] -
34853 + g_pNvramInfo->ucaBaseMacAddr[NVRAM_MAC_ADDRESS_LEN - CHANGED_OCTET]);
34855 + // if overflow 255 (negitive), add 256 to have the correct index
34858 + ulIdx = (unsigned long) (idx >> SHIFT_BITS);
34860 + if( ulIdx < g_pNvramInfo->ulNumMacAddrs )
34862 + PMAC_ADDR_INFO pMai = &g_pNvramInfo->MacAddrs[ulIdx];
34863 + if( pMai->chInUse == 1 )
34865 + pMai->chInUse = 0;
34871 +} /* kerSysReleaseMacAddr */
34873 +int kerSysGetSdramSize( void )
34875 + return( (int) g_pNvramInfo->ulSdramSize );
34876 +} /* kerSysGetSdramSize */
34879 +void kerSysLedCtrl(BOARD_LED_NAME ledName, BOARD_LED_STATE ledState)
34881 + if (g_ledInitialized)
34882 + boardLedCtrl(ledName, ledState);
34885 +unsigned int kerSysMonitorPollHook( struct file *f, struct poll_table_struct *t)
34887 + int mask = (*g_orig_fop_poll) (f, t);
34889 + if( g_wakeup_monitor == 1 && g_monitor_file == f )
34891 + /* If g_wakeup_monitor is non-0, the user mode application needs to
34892 + * return from a blocking select function. Return POLLPRI which will
34893 + * cause the select to return with the exception descriptor set.
34896 + g_wakeup_monitor = 0;
34902 +/* Put the user mode application that monitors link state on a run queue. */
34903 +void kerSysWakeupMonitorTask( void )
34905 + g_wakeup_monitor = 1;
34906 + if( g_monitor_task )
34907 + wake_up_process( g_monitor_task );
34910 +//********************************************************************************************
34911 +// misc. ioctl calls come to here. (flash, led, reset, kernel memory access, etc.)
34912 +//********************************************************************************************
34913 +static int board_ioctl( struct inode *inode, struct file *flip,
34914 + unsigned int command, unsigned long arg )
34917 + BOARD_IOCTL_PARMS ctrlParms;
34918 + unsigned char ucaMacAddr[NVRAM_MAC_ADDRESS_LEN];
34923 + case BOARD_IOCTL_FLASH_INIT:
34924 + // not used for now. kerSysBcmImageInit();
34928 + case BOARD_IOCTL_FLASH_WRITE:
34929 + if (copy_from_user((void*)&ctrlParms, (void*)arg, sizeof(ctrlParms)) == 0)
34931 + NVRAM_DATA SaveNvramData;
34932 + PNVRAM_DATA pNvramData = (PNVRAM_DATA) get_nvram_start_addr();
34934 + switch (ctrlParms.action)
34936 + case SCRATCH_PAD:
34937 + ret = kerSysScratchPadSet(ctrlParms.string, ctrlParms.buf, ctrlParms.offset);
34941 + ret = kerSysPersistentSet(ctrlParms.string, ctrlParms.strLen, ctrlParms.offset);
34945 + ret = kerSysNvRamSet(ctrlParms.string, ctrlParms.strLen, ctrlParms.offset);
34948 + case BCM_IMAGE_CFE:
34949 + if( ctrlParms.strLen <= 0 || ctrlParms.strLen > FLASH45_LENGTH_BOOT_ROM )
34951 + printk("Illegal CFE size [%d]. Size allowed: [%d]\n",
34952 + ctrlParms.strLen, FLASH45_LENGTH_BOOT_ROM);
34957 + // save NVRAM data into a local structure
34958 + memcpy( &SaveNvramData, pNvramData, sizeof(NVRAM_DATA) );
34960 + // set memory type field
34961 + BpGetSdramSize( (unsigned long *) &ctrlParms.string[SDRAM_TYPE_ADDRESS_OFFSET] );
34963 + ret = kerSysBcmImageSet(ctrlParms.offset, ctrlParms.string, ctrlParms.strLen);
34965 + // if nvram is not valid, restore the current nvram settings
34966 + if( BpSetBoardId( pNvramData->szBoardId ) != BP_SUCCESS &&
34967 + *(unsigned long *) pNvramData == NVRAM_DATA_ID )
34969 + kerSysNvRamSet((char *) &SaveNvramData, sizeof(SaveNvramData), 0);
34973 + case BCM_IMAGE_FS:
34974 + allowedSize = (int) flash_get_total_size() - \
34975 + FLASH_RESERVED_AT_END - TAG_LEN - FLASH45_LENGTH_BOOT_ROM;
34976 + if( ctrlParms.strLen <= 0 || ctrlParms.strLen > allowedSize)
34978 + printk("Illegal root file system size [%d]. Size allowed: [%d]\n",
34979 + ctrlParms.strLen, allowedSize);
34983 + ret = kerSysBcmImageSet(ctrlParms.offset, ctrlParms.string, ctrlParms.strLen);
34984 + kerSysMipsSoftReset();
34987 + case BCM_IMAGE_KERNEL: // not used for now.
34989 + case BCM_IMAGE_WHOLE:
34990 + if(ctrlParms.strLen <= 0)
34992 + printk("Illegal flash image size [%d].\n", ctrlParms.strLen);
34997 + // save NVRAM data into a local structure
34998 + memcpy( &SaveNvramData, pNvramData, sizeof(NVRAM_DATA) );
35000 + ret = kerSysBcmImageSet(ctrlParms.offset, ctrlParms.string, ctrlParms.strLen);
35002 + // if nvram is not valid, restore the current nvram settings
35003 + if( BpSetBoardId( pNvramData->szBoardId ) != BP_SUCCESS &&
35004 + *(unsigned long *) pNvramData == NVRAM_DATA_ID )
35006 + kerSysNvRamSet((char *) &SaveNvramData, sizeof(SaveNvramData), 0);
35009 + kerSysMipsSoftReset();
35014 + printk("flash_ioctl_command: invalid command %d\n", ctrlParms.action);
35017 + ctrlParms.result = ret;
35018 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms, sizeof(BOARD_IOCTL_PARMS));
35024 + case BOARD_IOCTL_FLASH_READ:
35025 + if (copy_from_user((void*)&ctrlParms, (void*)arg, sizeof(ctrlParms)) == 0)
35027 + switch (ctrlParms.action)
35029 + case SCRATCH_PAD:
35030 + ret = kerSysScratchPadGet(ctrlParms.string, ctrlParms.buf, ctrlParms.offset);
35034 + ret = kerSysPersistentGet(ctrlParms.string, ctrlParms.strLen, ctrlParms.offset);
35038 + ret = kerSysNvRamGet(ctrlParms.string, ctrlParms.strLen, ctrlParms.offset);
35042 + ret = kerSysFlashSizeGet();
35047 + printk("Not supported. invalid command %d\n", ctrlParms.action);
35050 + ctrlParms.result = ret;
35051 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms, sizeof(BOARD_IOCTL_PARMS));
35057 + case BOARD_IOCTL_GET_NR_PAGES:
35058 + ctrlParms.result = nr_free_pages() + get_page_cache_size();
35059 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms, sizeof(BOARD_IOCTL_PARMS));
35063 + case BOARD_IOCTL_DUMP_ADDR:
35064 + if (copy_from_user((void*)&ctrlParms, (void*)arg, sizeof(ctrlParms)) == 0)
35066 + dumpaddr( (unsigned char *) ctrlParms.string, ctrlParms.strLen );
35067 + ctrlParms.result = 0;
35068 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms, sizeof(BOARD_IOCTL_PARMS));
35075 + case BOARD_IOCTL_SET_MEMORY:
35076 + if (copy_from_user((void*)&ctrlParms, (void*)arg, sizeof(ctrlParms)) == 0)
35078 + unsigned long *pul = (unsigned long *) ctrlParms.string;
35079 + unsigned short *pus = (unsigned short *) ctrlParms.string;
35080 + unsigned char *puc = (unsigned char *) ctrlParms.string;
35081 + switch( ctrlParms.strLen )
35084 + *pul = (unsigned long) ctrlParms.offset;
35087 + *pus = (unsigned short) ctrlParms.offset;
35090 + *puc = (unsigned char) ctrlParms.offset;
35093 + dumpaddr( (unsigned char *) ctrlParms.string, sizeof(long) );
35094 + ctrlParms.result = 0;
35095 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms, sizeof(BOARD_IOCTL_PARMS));
35102 + case BOARD_IOCTL_MIPS_SOFT_RESET:
35103 + kerSysMipsSoftReset();
35106 + case BOARD_IOCTL_LED_CTRL:
35107 + if (copy_from_user((void*)&ctrlParms, (void*)arg, sizeof(ctrlParms)) == 0)
35109 + kerSysLedCtrl((BOARD_LED_NAME)ctrlParms.strLen, (BOARD_LED_STATE)ctrlParms.offset);
35114 + case BOARD_IOCTL_GET_ID:
35115 + if (copy_from_user((void*)&ctrlParms, (void*)arg,
35116 + sizeof(ctrlParms)) == 0)
35118 + if( ctrlParms.string )
35120 + char *p = (char *) get_system_type();
35121 + if( strlen(p) + 1 < ctrlParms.strLen )
35122 + ctrlParms.strLen = strlen(p) + 1;
35123 + __copy_to_user(ctrlParms.string, p, ctrlParms.strLen);
35126 + ctrlParms.result = 0;
35127 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms,
35128 + sizeof(BOARD_IOCTL_PARMS));
35132 + case BOARD_IOCTL_GET_MAC_ADDRESS:
35133 + if (copy_from_user((void*)&ctrlParms, (void*)arg, sizeof(ctrlParms)) == 0)
35135 + ctrlParms.result = kerSysGetMacAddress( ucaMacAddr,
35136 + ctrlParms.offset );
35138 + if( ctrlParms.result == 0 )
35140 + __copy_to_user(ctrlParms.string, ucaMacAddr,
35141 + sizeof(ucaMacAddr));
35144 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms,
35145 + sizeof(BOARD_IOCTL_PARMS));
35152 + case BOARD_IOCTL_RELEASE_MAC_ADDRESS:
35153 + if (copy_from_user((void*)&ctrlParms, (void*)arg, sizeof(ctrlParms)) == 0)
35155 + if (copy_from_user((void*)ucaMacAddr, (void*)ctrlParms.string, \
35156 + NVRAM_MAC_ADDRESS_LEN) == 0)
35158 + ctrlParms.result = kerSysReleaseMacAddress( ucaMacAddr );
35162 + ctrlParms.result = -EACCES;
35165 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms,
35166 + sizeof(BOARD_IOCTL_PARMS));
35173 + case BOARD_IOCTL_GET_PSI_SIZE:
35174 + ctrlParms.result = (int) g_pNvramInfo->ulPsiSize;
35175 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms, sizeof(BOARD_IOCTL_PARMS));
35179 + case BOARD_IOCTL_GET_SDRAM_SIZE:
35180 + ctrlParms.result = (int) g_pNvramInfo->ulSdramSize;
35181 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms, sizeof(BOARD_IOCTL_PARMS));
35185 + case BOARD_IOCTL_GET_BASE_MAC_ADDRESS:
35186 + if (copy_from_user((void*)&ctrlParms, (void*)arg, sizeof(ctrlParms)) == 0)
35188 + __copy_to_user(ctrlParms.string, g_pNvramInfo->ucaBaseMacAddr, NVRAM_MAC_ADDRESS_LEN);
35189 + ctrlParms.result = 0;
35191 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms,
35192 + sizeof(BOARD_IOCTL_PARMS));
35199 + case BOARD_IOCTL_GET_CHIP_ID:
35200 + ctrlParms.result = (int) (PERF->RevID & 0xFFFF0000) >> 16;
35201 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms, sizeof(BOARD_IOCTL_PARMS));
35205 + case BOARD_IOCTL_GET_NUM_ENET: {
35206 + ETHERNET_MAC_INFO EnetInfos[BP_MAX_ENET_MACS];
35207 + int i, numeth = 0;
35208 + if (BpGetEthernetMacInfo(EnetInfos, BP_MAX_ENET_MACS) == BP_SUCCESS) {
35209 + for( i = 0; i < BP_MAX_ENET_MACS; i++) {
35210 + if (EnetInfos[i].ucPhyType != BP_ENET_NO_PHY) {
35214 + ctrlParms.result = numeth;
35215 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms, sizeof(BOARD_IOCTL_PARMS));
35224 + case BOARD_IOCTL_GET_CFE_VER:
35225 + if (copy_from_user((void*)&ctrlParms, (void*)arg, sizeof(ctrlParms)) == 0) {
35226 + char *vertag = (char *)(FLASH_BASE + CFE_VERSION_OFFSET);
35227 + if (ctrlParms.strLen < CFE_VERSION_SIZE) {
35228 + ctrlParms.result = 0;
35229 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms, sizeof(BOARD_IOCTL_PARMS));
35232 + else if (strncmp(vertag, "cfe-v", 5)) { // no tag info in flash
35233 + ctrlParms.result = 0;
35234 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms, sizeof(BOARD_IOCTL_PARMS));
35238 + ctrlParms.result = 1;
35239 + __copy_to_user(ctrlParms.string, vertag+CFE_VERSION_MARK_SIZE, CFE_VERSION_SIZE);
35240 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms, sizeof(BOARD_IOCTL_PARMS));
35249 + case BOARD_IOCTL_GET_ENET_CFG:
35250 + if (copy_from_user((void*)&ctrlParms, (void*)arg, sizeof(ctrlParms)) == 0) {
35251 + ETHERNET_MAC_INFO EnetInfos[BP_MAX_ENET_MACS];
35252 + if (BpGetEthernetMacInfo(EnetInfos, BP_MAX_ENET_MACS) == BP_SUCCESS) {
35253 + if (ctrlParms.strLen == sizeof(EnetInfos)) {
35254 + __copy_to_user(ctrlParms.string, EnetInfos, sizeof(EnetInfos));
35255 + ctrlParms.result = 0;
35256 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms, sizeof(BOARD_IOCTL_PARMS));
35271 +#if defined (WIRELESS)
35272 + case BOARD_IOCTL_GET_WLAN_ANT_INUSE:
35273 + if (copy_from_user((void*)&ctrlParms, (void*)arg, sizeof(ctrlParms)) == 0) {
35274 + unsigned short antInUse = 0;
35275 + if (BpGetWirelessAntInUse(&antInUse) == BP_SUCCESS) {
35276 + if (ctrlParms.strLen == sizeof(antInUse)) {
35277 + __copy_to_user(ctrlParms.string, &antInUse, sizeof(antInUse));
35278 + ctrlParms.result = 0;
35279 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms, sizeof(BOARD_IOCTL_PARMS));
35294 + case BOARD_IOCTL_SET_TRIGGER_EVENT:
35295 + if (copy_from_user((void*)&ctrlParms, (void*)arg, sizeof(ctrlParms)) == 0) {
35296 + BOARD_IOC *board_ioc = (BOARD_IOC *)flip->private_data;
35297 + ctrlParms.result = -EFAULT;
35299 + if (ctrlParms.strLen == sizeof(unsigned long)) {
35300 + board_ioc->eventmask |= *((int*)ctrlParms.string);
35301 +#if defined (WIRELESS)
35302 + if((board_ioc->eventmask & SES_EVENTS)) {
35303 + if(sesBtn_irq != BP_NOT_DEFINED) {
35304 + BcmHalInterruptEnable(sesBtn_irq);
35305 + ctrlParms.result = 0;
35310 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms, sizeof(BOARD_IOCTL_PARMS));
35319 + case BOARD_IOCTL_GET_TRIGGER_EVENT:
35320 + if (copy_from_user((void*)&ctrlParms, (void*)arg, sizeof(ctrlParms)) == 0) {
35321 + BOARD_IOC *board_ioc = (BOARD_IOC *)flip->private_data;
35322 + if (ctrlParms.strLen == sizeof(unsigned long)) {
35323 + __copy_to_user(ctrlParms.string, &board_ioc->eventmask, sizeof(unsigned long));
35324 + ctrlParms.result = 0;
35325 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms, sizeof(BOARD_IOCTL_PARMS));
35337 + case BOARD_IOCTL_UNSET_TRIGGER_EVENT:
35338 + if (copy_from_user((void*)&ctrlParms, (void*)arg, sizeof(ctrlParms)) == 0) {
35339 + if (ctrlParms.strLen == sizeof(unsigned long)) {
35340 + BOARD_IOC *board_ioc = (BOARD_IOC *)flip->private_data;
35341 + board_ioc->eventmask &= (~(*((int*)ctrlParms.string)));
35342 + ctrlParms.result = 0;
35343 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms, sizeof(BOARD_IOCTL_PARMS));
35354 +#if defined (WIRELESS)
35355 + case BOARD_IOCTL_SET_SES_LED:
35356 + if (copy_from_user((void*)&ctrlParms, (void*)arg, sizeof(ctrlParms)) == 0) {
35357 + if (ctrlParms.strLen == sizeof(int)) {
35358 + sesLed_ctrl(*(int*)ctrlParms.string);
35359 + ctrlParms.result = 0;
35360 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms, sizeof(BOARD_IOCTL_PARMS));
35373 + case BOARD_IOCTL_SET_MONITOR_FD:
35374 + if (copy_from_user((void*)&ctrlParms, (void*)arg, sizeof(ctrlParms)) == 0) {
35375 + int fput_needed = 0;
35377 + g_monitor_file = fget_light( ctrlParms.offset, &fput_needed );
35378 + if( g_monitor_file ) {
35379 + /* Hook this file descriptor's poll function in order to set
35380 + * the exception descriptor when there is a change in link
35383 + g_monitor_task = current;
35384 + g_orig_fop_poll = g_monitor_file->f_op->poll;
35385 + g_monitor_file->f_op->poll = kerSysMonitorPollHook;
35390 + case BOARD_IOCTL_WAKEUP_MONITOR_TASK:
35391 + kerSysWakeupMonitorTask();
35396 + ctrlParms.result = 0;
35397 + printk("board_ioctl: invalid command %x, cmd %d .\n",command,_IOC_NR(command));
35404 +} /* board_ioctl */
35406 +/***************************************************************************
35407 + * SES Button ISR/GPIO/LED functions.
35408 + ***************************************************************************/
35409 +#if defined (WIRELESS)
35410 +static irqreturn_t sesBtn_isr(int irq, void *dev_id, struct pt_regs *ptregs)
35412 +#if defined(_BCM96338_) || defined(CONFIG_BCM96338)
35413 + unsigned long gpio_mask = GPIO_NUM_TO_MASK(sesBtn_gpio);
35414 + volatile unsigned long *gpio_reg = &GPIO->GPIOio;
35416 +#if defined(_BCM96345_) || defined(CONFIG_BCM96345)
35417 + unsigned short gpio_mask = GPIO_NUM_TO_MASK(sesBtn_gpio);
35418 + volatile unsigned short *gpio_reg = &GPIO->GPIOio;
35420 +#if defined(_BCM96348_) || defined (CONFIG_BCM96348)
35421 + unsigned long gpio_mask = GPIO_NUM_TO_MASK(sesBtn_gpio);
35422 + volatile unsigned long *gpio_reg = &GPIO->GPIOio;
35424 + if( (sesBtn_gpio & ~BP_ACTIVE_MASK) >= 32 )
35426 + gpio_mask = GPIO_NUM_TO_MASK_HIGH(sesBtn_gpio);
35427 + gpio_reg = &GPIO->GPIOio_high;
35431 + if (!(*gpio_reg & gpio_mask)){
35432 + wake_up_interruptible(&g_board_wait_queue);
35433 + return IRQ_RETVAL(1);
35435 + return IRQ_RETVAL(0);
35439 +static void __init sesBtn_mapGpio()
35441 + if( BpGetWirelessSesBtnGpio(&sesBtn_gpio) == BP_SUCCESS )
35443 + printk("SES: Button GPIO 0x%x is enabled\n", sesBtn_gpio);
35447 +static void __init sesBtn_mapIntr(int context)
35449 + if( BpGetWirelessSesExtIntr(&sesBtn_irq) == BP_SUCCESS )
35451 + printk("SES: Button Interrupt 0x%x is enabled\n", sesBtn_irq);
35456 + sesBtn_irq += INTERRUPT_ID_EXTERNAL_0;
35458 + if (BcmHalMapInterrupt((FN_HANDLER)sesBtn_isr, context, sesBtn_irq)) {
35459 + printk("SES: Interrupt mapping failed\n");
35461 + BcmHalInterruptEnable(sesBtn_irq);
35465 +static unsigned int sesBtn_poll(struct file *file, struct poll_table_struct *wait)
35467 +#if defined(_BCM96338_) || defined(CONFIG_BCM96338)
35468 + unsigned long gpio_mask = GPIO_NUM_TO_MASK(sesBtn_gpio);
35469 + volatile unsigned long *gpio_reg = &GPIO->GPIOio;
35471 +#if defined(_BCM96345_) || defined(CONFIG_BCM96345)
35472 + unsigned short gpio_mask = GPIO_NUM_TO_MASK(sesBtn_gpio);
35473 + volatile unsigned short *gpio_reg = &GPIO->GPIOio;
35475 +#if defined(_BCM96348_) || defined (CONFIG_BCM96348)
35476 + unsigned long gpio_mask = GPIO_NUM_TO_MASK(sesBtn_gpio);
35477 + volatile unsigned long *gpio_reg = &GPIO->GPIOio;
35479 + if( (sesBtn_gpio & ~BP_ACTIVE_MASK) >= 32 )
35481 + gpio_mask = GPIO_NUM_TO_MASK_HIGH(sesBtn_gpio);
35482 + gpio_reg = &GPIO->GPIOio_high;
35486 + if (!(*gpio_reg & gpio_mask)){
35492 +static ssize_t sesBtn_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos)
35494 + volatile unsigned int event=0;
35497 +#if defined(_BCM96338_) || defined (CONFIG_BCM96338)
35498 + unsigned long gpio_mask = GPIO_NUM_TO_MASK(sesBtn_gpio);
35499 + volatile unsigned long *gpio_reg = &GPIO->GPIOio;
35501 +#if defined(_BCM96345_) || defined (CONFIG_BCM96345)
35502 + unsigned short gpio_mask = GPIO_NUM_TO_MASK(sesBtn_gpio);
35503 + volatile unsigned short *gpio_reg = &GPIO->GPIOio;
35505 +#if defined(_BCM96348_) || defined (CONFIG_BCM96348)
35506 + unsigned long gpio_mask = GPIO_NUM_TO_MASK(sesBtn_gpio);
35507 + volatile unsigned long *gpio_reg = &GPIO->GPIOio;
35509 + if( (sesBtn_gpio & ~BP_ACTIVE_MASK) >= 32 )
35511 + gpio_mask = GPIO_NUM_TO_MASK_HIGH(sesBtn_gpio);
35512 + gpio_reg = &GPIO->GPIOio_high;
35516 + if(*gpio_reg & gpio_mask){
35517 + BcmHalInterruptEnable(sesBtn_irq);
35520 + event = SES_EVENTS;
35521 + __copy_to_user((char*)buffer, (char*)&event, sizeof(event));
35522 + BcmHalInterruptEnable(sesBtn_irq);
35523 + count -= sizeof(event);
35524 + buffer += sizeof(event);
35525 + ret += sizeof(event);
35529 +static void __init sesLed_mapGpio()
35531 + if( BpGetWirelessSesBtnGpio(&sesLed_gpio) == BP_SUCCESS )
35533 + printk("SES: LED GPIO 0x%x is enabled\n", sesBtn_gpio);
35537 +static void sesLed_ctrl(int action)
35540 + //char status = ((action >> 8) & 0xff); /* extract status */
35541 + //char event = ((action >> 16) & 0xff); /* extract event */
35542 + //char blinktype = ((action >> 24) & 0xff); /* extract blink type for SES_LED_BLINK */
35544 + BOARD_LED_STATE led;
35546 + if(sesLed_gpio == BP_NOT_DEFINED)
35549 + action &= 0xff; /* extract led */
35551 + //printk("blinktype=%d, event=%d, status=%d\n",(int)blinktype, (int)event, (int)status);
35556 + //printk("SES: led on\n");
35557 + led = kLedStateOn;
35559 + case SES_LED_BLINK:
35560 + //printk("SES: led blink\n");
35561 + led = kLedStateSlowBlinkContinues;
35563 + case SES_LED_OFF:
35565 + //printk("SES: led off\n");
35566 + led = kLedStateOff;
35569 + kerSysLedCtrl(kLedSes, led);
35572 +static void __init ses_board_init()
35574 + sesBtn_mapGpio();
35575 + sesBtn_mapIntr(0);
35576 + sesLed_mapGpio();
35578 +static void __exit ses_board_deinit()
35581 + BcmHalInterruptDisable(sesBtn_irq);
35585 +/***************************************************************************
35586 + * Dying gasp ISR and functions.
35587 + ***************************************************************************/
35588 +#define KERSYS_DBG printk
35590 +#if defined(CONFIG_BCM96345)
35591 +#define CYCLE_PER_US 70
35592 +#elif defined(CONFIG_BCM96348) || defined(CONFIG_BCM96338)
35593 +/* The BCM6348 cycles per microsecond is really variable since the BCM6348
35594 + * MIPS speed can vary depending on the PLL settings. However, an appoximate
35595 + * value of 120 will still work OK for the test being done.
35597 +#define CYCLE_PER_US 120
35599 +#define DG_GLITCH_TO (100*CYCLE_PER_US)
35601 +static void __init kerSysDyingGaspMapIntr()
35603 + unsigned long ulIntr;
35605 +#if defined(CONFIG_BCM96348) || defined(_BCM96348_) || defined(CONFIG_BCM96338) || defined(_BCM96338_)
35606 + if( BpGetAdslDyingGaspExtIntr( &ulIntr ) == BP_SUCCESS ) {
35607 + BcmHalMapInterrupt((FN_HANDLER)kerSysDyingGaspIsr, 0, INTERRUPT_ID_DG);
35608 + BcmHalInterruptEnable( INTERRUPT_ID_DG );
35610 +#elif defined(CONFIG_BCM96345) || defined(_BCM96345_)
35611 + if( BpGetAdslDyingGaspExtIntr( &ulIntr ) == BP_SUCCESS ) {
35612 + ulIntr += INTERRUPT_ID_EXTERNAL_0;
35613 + BcmHalMapInterrupt((FN_HANDLER)kerSysDyingGaspIsr, 0, ulIntr);
35614 + BcmHalInterruptEnable( ulIntr );
35620 +void kerSysSetWdTimer(ulong timeUs)
35622 + TIMER->WatchDogDefCount = timeUs * (FPERIPH/1000000);
35623 + TIMER->WatchDogCtl = 0xFF00;
35624 + TIMER->WatchDogCtl = 0x00FF;
35627 +ulong kerSysGetCycleCount(void)
35633 + __asm volatile("mfc0 %0, $9":"=d"(cnt));
35638 +static Bool kerSysDyingGaspCheckPowerLoss(void)
35644 + clk0 = kerSysGetCycleCount();
35646 + UART->Data = 'D';
35647 + UART->Data = '%';
35648 + UART->Data = 'G';
35650 +#if defined(CONFIG_BCM96345)
35651 + BpGetAdslDyingGaspExtIntr( &ulIntr );
35656 + clk1 = kerSysGetCycleCount(); /* time cleared */
35657 + /* wait a little to get new reading */
35658 + while ((kerSysGetCycleCount()-clk1) < CYCLE_PER_US*2)
35660 + } while ((0 == (PERF->ExtIrqCfg & (1 << (ulIntr + EI_STATUS_SHFT)))) && ((kerSysGetCycleCount() - clk0) < DG_GLITCH_TO));
35662 + if (PERF->ExtIrqCfg & (1 << (ulIntr + EI_STATUS_SHFT))) { /* power glitch */
35663 + BcmHalInterruptEnable( ulIntr + INTERRUPT_ID_EXTERNAL_0);
35664 + KERSYS_DBG(" - Power glitch detected. Duration: %ld us\n", (kerSysGetCycleCount() - clk0)/CYCLE_PER_US);
35667 +#elif (defined(CONFIG_BCM96348) || defined(CONFIG_BCM96338)) && !defined(VXWORKS)
35671 + clk1 = kerSysGetCycleCount(); /* time cleared */
35672 + /* wait a little to get new reading */
35673 + while ((kerSysGetCycleCount()-clk1) < CYCLE_PER_US*2)
35675 + } while ((PERF->IrqStatus & (1 << (INTERRUPT_ID_DG - INTERNAL_ISR_TABLE_OFFSET))) && ((kerSysGetCycleCount() - clk0) < DG_GLITCH_TO));
35677 + if (!(PERF->IrqStatus & (1 << (INTERRUPT_ID_DG - INTERNAL_ISR_TABLE_OFFSET)))) {
35678 + BcmHalInterruptEnable( INTERRUPT_ID_DG );
35679 + KERSYS_DBG(" - Power glitch detected. Duration: %ld us\n", (kerSysGetCycleCount() - clk0)/CYCLE_PER_US);
35686 +static void kerSysDyingGaspShutdown( void )
35688 + kerSysSetWdTimer(1000000);
35689 +#if defined(CONFIG_BCM96345)
35690 + PERF->blkEnables &= ~(EMAC_CLK_EN | USB_CLK_EN | CPU_CLK_EN);
35691 +#elif defined(CONFIG_BCM96348)
35692 + PERF->blkEnables &= ~(EMAC_CLK_EN | USBS_CLK_EN | USBH_CLK_EN | SAR_CLK_EN);
35696 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0))
35697 +static irqreturn_t kerSysDyingGaspIsr(int irq, void * dev_id, struct pt_regs * regs)
35699 +static unsigned int kerSysDyingGaspIsr(void)
35702 + struct list_head *pos;
35703 + CB_DGASP_LIST *tmp, *dsl = NULL;
35705 + if (kerSysDyingGaspCheckPowerLoss()) {
35707 + /* first to turn off everything other than dsl */
35708 + list_for_each(pos, &g_cb_dgasp_list_head->list) {
35709 + tmp = list_entry(pos, CB_DGASP_LIST, list);
35710 + if(strncmp(tmp->name, "dsl", 3)) {
35711 + (tmp->cb_dgasp_fn)(tmp->context);
35717 + /* now send dgasp */
35719 + (dsl->cb_dgasp_fn)(dsl->context);
35721 + /* reset and shutdown system */
35722 + kerSysDyingGaspShutdown();
35724 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0))
35725 +return( IRQ_HANDLED );
35731 +static void __init kerSysInitDyingGaspHandler( void )
35733 + CB_DGASP_LIST *new_node;
35735 + if( g_cb_dgasp_list_head != NULL) {
35736 + printk("Error: kerSysInitDyingGaspHandler: list head is not null\n");
35739 + new_node= (CB_DGASP_LIST *)kmalloc(sizeof(CB_DGASP_LIST), GFP_KERNEL);
35740 + memset(new_node, 0x00, sizeof(CB_DGASP_LIST));
35741 + INIT_LIST_HEAD(&new_node->list);
35742 + g_cb_dgasp_list_head = new_node;
35744 +} /* kerSysInitDyingGaspHandler */
35746 +static void __exit kerSysDeinitDyingGaspHandler( void )
35748 + struct list_head *pos;
35749 + CB_DGASP_LIST *tmp;
35751 + if(g_cb_dgasp_list_head == NULL)
35754 + list_for_each(pos, &g_cb_dgasp_list_head->list) {
35755 + tmp = list_entry(pos, CB_DGASP_LIST, list);
35760 + kfree(g_cb_dgasp_list_head);
35761 + g_cb_dgasp_list_head = NULL;
35763 +} /* kerSysDeinitDyingGaspHandler */
35765 +void kerSysRegisterDyingGaspHandler(char *devname, void *cbfn, void *context)
35767 + CB_DGASP_LIST *new_node;
35769 + if( g_cb_dgasp_list_head == NULL) {
35770 + printk("Error: kerSysRegisterDyingGaspHandler: list head is null\n");
35774 + if( devname == NULL || cbfn == NULL ) {
35775 + printk("Error: kerSysRegisterDyingGaspHandler: register info not enough (%s,%x,%x)\n", devname, (unsigned int)cbfn, (unsigned int)context);
35779 + new_node= (CB_DGASP_LIST *)kmalloc(sizeof(CB_DGASP_LIST), GFP_KERNEL);
35780 + memset(new_node, 0x00, sizeof(CB_DGASP_LIST));
35781 + INIT_LIST_HEAD(&new_node->list);
35782 + strncpy(new_node->name, devname, IFNAMSIZ);
35783 + new_node->cb_dgasp_fn = (cb_dgasp_t)cbfn;
35784 + new_node->context = context;
35785 + list_add(&new_node->list, &g_cb_dgasp_list_head->list);
35787 + printk("dgasp: kerSysRegisterDyingGaspHandler: %s registered \n", devname);
35789 +} /* kerSysRegisterDyingGaspHandler */
35791 +void kerSysDeregisterDyingGaspHandler(char *devname)
35793 + struct list_head *pos;
35794 + CB_DGASP_LIST *tmp;
35796 + if(g_cb_dgasp_list_head == NULL) {
35797 + printk("Error: kerSysDeregisterDyingGaspHandler: list head is null\n");
35801 + if(devname == NULL) {
35802 + printk("Error: kerSysDeregisterDyingGaspHandler: devname is null\n");
35806 + printk("kerSysDeregisterDyingGaspHandler: %s is deregistering\n", devname);
35808 + list_for_each(pos, &g_cb_dgasp_list_head->list) {
35809 + tmp = list_entry(pos, CB_DGASP_LIST, list);
35810 + if(!strcmp(tmp->name, devname)) {
35813 + printk("kerSysDeregisterDyingGaspHandler: %s is deregistered\n", devname);
35817 + printk("kerSysDeregisterDyingGaspHandler: %s not (de)registered\n", devname);
35819 +} /* kerSysDeregisterDyingGaspHandler */
35821 +/***************************************************************************
35822 + * MACRO to call driver initialization and cleanup functions.
35823 + ***************************************************************************/
35824 +module_init( brcm_board_init );
35825 +module_exit( brcm_board_cleanup );
35827 +EXPORT_SYMBOL(kerSysNvRamGet);
35828 +EXPORT_SYMBOL(dumpaddr);
35829 +EXPORT_SYMBOL(kerSysGetMacAddress);
35830 +EXPORT_SYMBOL(kerSysReleaseMacAddress);
35831 +EXPORT_SYMBOL(kerSysGetSdramSize);
35832 +EXPORT_SYMBOL(kerSysLedCtrl);
35833 +EXPORT_SYMBOL(kerSysLedRegisterHwHandler);
35834 +EXPORT_SYMBOL(BpGetBoardIds);
35835 +EXPORT_SYMBOL(BpGetSdramSize);
35836 +EXPORT_SYMBOL(BpGetPsiSize);
35837 +EXPORT_SYMBOL(BpGetEthernetMacInfo);
35838 +EXPORT_SYMBOL(BpGetRj11InnerOuterPairGpios);
35839 +EXPORT_SYMBOL(BpGetPressAndHoldResetGpio);
35840 +EXPORT_SYMBOL(BpGetVoipResetGpio);
35841 +EXPORT_SYMBOL(BpGetVoipIntrGpio);
35842 +EXPORT_SYMBOL(BpGetPcmciaResetGpio);
35843 +EXPORT_SYMBOL(BpGetRtsCtsUartGpios);
35844 +EXPORT_SYMBOL(BpGetAdslLedGpio);
35845 +EXPORT_SYMBOL(BpGetAdslFailLedGpio);
35846 +EXPORT_SYMBOL(BpGetWirelessLedGpio);
35847 +EXPORT_SYMBOL(BpGetUsbLedGpio);
35848 +EXPORT_SYMBOL(BpGetHpnaLedGpio);
35849 +EXPORT_SYMBOL(BpGetWanDataLedGpio);
35850 +EXPORT_SYMBOL(BpGetPppLedGpio);
35851 +EXPORT_SYMBOL(BpGetPppFailLedGpio);
35852 +EXPORT_SYMBOL(BpGetVoipLedGpio);
35853 +EXPORT_SYMBOL(BpGetWirelessExtIntr);
35854 +EXPORT_SYMBOL(BpGetAdslDyingGaspExtIntr);
35855 +EXPORT_SYMBOL(BpGetVoipExtIntr);
35856 +EXPORT_SYMBOL(BpGetHpnaExtIntr);
35857 +EXPORT_SYMBOL(BpGetHpnaChipSelect);
35858 +EXPORT_SYMBOL(BpGetVoipChipSelect);
35859 +EXPORT_SYMBOL(BpGetWirelessSesBtnGpio);
35860 +EXPORT_SYMBOL(BpGetWirelessSesExtIntr);
35861 +EXPORT_SYMBOL(BpGetWirelessSesLedGpio);
35862 +EXPORT_SYMBOL(kerSysRegisterDyingGaspHandler);
35863 +EXPORT_SYMBOL(kerSysDeregisterDyingGaspHandler);
35864 +EXPORT_SYMBOL(kerSysGetCycleCount);
35865 +EXPORT_SYMBOL(kerSysSetWdTimer);
35866 +EXPORT_SYMBOL(kerSysWakeupMonitorTask);
35868 diff -urN linux-2.6.8.1/bcmdrivers/opensource/char/board/bcm963xx/bcm96348/cfiflash.c linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/char/board/bcm963xx/bcm96348/cfiflash.c
35869 --- linux-2.6.8.1/bcmdrivers/opensource/char/board/bcm963xx/bcm96348/cfiflash.c 1970-01-01 01:00:00.000000000 +0100
35870 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/char/board/bcm963xx/bcm96348/cfiflash.c 2006-06-26 09:07:10.000000000 +0200
35872 +/************************************************************************/
35874 +/* AMD CFI Enabled Flash Memory Drivers */
35875 +/* File name: CFIFLASH.C */
35876 +/* Revision: 1.0 5/07/98 */
35878 +/* Copyright (c) 1998 ADVANCED MICRO DEVICES, INC. All Rights Reserved. */
35879 +/* This software is unpublished and contains the trade secrets and */
35880 +/* confidential proprietary information of AMD. Unless otherwise */
35881 +/* provided in the Software Agreement associated herewith, it is */
35882 +/* licensed in confidence "AS IS" and is not to be reproduced in whole */
35883 +/* or part by any means except for backup. Use, duplication, or */
35884 +/* disclosure by the Government is subject to the restrictions in */
35885 +/* paragraph (b) (3) (B) of the Rights in Technical Data and Computer */
35886 +/* Software clause in DFAR 52.227-7013 (a) (Oct 1988). */
35887 +/* Software owned by */
35888 +/* Advanced Micro Devices, Inc., */
35889 +/* One AMD Place, */
35890 +/* P.O. Box 3453 */
35891 +/* Sunnyvale, CA 94088-3453. */
35892 +/************************************************************************/
35893 +/* This software constitutes a basic shell of source code for */
35894 +/* programming all AMD Flash components. AMD */
35895 +/* will not be responsible for misuse or illegal use of this */
35896 +/* software for devices not supported herein. AMD is providing */
35897 +/* this source code "AS IS" and will not be responsible for */
35898 +/* issues arising from incorrect user implementation of the */
35899 +/* source code herein. It is the user's responsibility to */
35900 +/* properly design-in this source code. */
35902 +/************************************************************************/
35904 +#include "lib_types.h"
35905 +#include "lib_printf.h"
35906 +#include "lib_string.h"
35907 +#include "cfe_timer.h"
35908 +#define printk printf
35910 +#include <linux/param.h>
35911 +#include <linux/sched.h>
35912 +#include <linux/timer.h>
35915 +#include "cfiflash.h"
35917 +static int flash_wait(WORD sector, int offset, UINT16 data);
35918 +static UINT16 flash_get_device_id(void);
35919 +static int flash_get_cfi(struct cfi_query *query, UINT16 *cfi_struct, int flashFamily);
35920 +static int flash_write(WORD sector, int offset, byte *buf, int nbytes);
35921 +static void flash_command(int command, WORD sector, int offset, UINT16 data);
35923 +/*********************************************************************/
35924 +/* 'meminfo' should be a pointer, but most C compilers will not */
35925 +/* allocate static storage for a pointer without calling */
35926 +/* non-portable functions such as 'new'. We also want to avoid */
35927 +/* the overhead of passing this pointer for every driver call. */
35928 +/* Systems with limited heap space will need to do this. */
35929 +/*********************************************************************/
35930 +struct flashinfo meminfo; /* Flash information structure */
35931 +static int flashFamily = FLASH_UNDEFINED;
35932 +static int totalSize = 0;
35933 +static struct cfi_query query;
35935 +static UINT16 cfi_data_struct_29W160[] = {
35936 + 0x0020, 0x0049, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
35937 + 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
35938 + 0x0051, 0x0052, 0x0059, 0x0002, 0x0000, 0x0040, 0x0000, 0x0000,
35939 + 0x0000, 0x0000, 0x0000, 0x0027, 0x0036, 0x0000, 0x0000, 0x0004,
35940 + 0x0000, 0x000a, 0x0000, 0x0004, 0x0000, 0x0003, 0x0000, 0x0015,
35941 + 0x0002, 0x0000, 0x0000, 0x0000, 0x0004, 0x0000, 0x0000, 0x0040,
35942 + 0x0000, 0x0001, 0x0000, 0x0020, 0x0000, 0x0000, 0x0000, 0x0080,
35943 + 0x0000, 0x001e, 0x0000, 0x0000, 0x0001, 0xffff, 0xffff, 0xffff,
35944 + 0x0050, 0x0052, 0x0049, 0x0031, 0x0030, 0x0000, 0x0002, 0x0001,
35945 + 0x0001, 0x0004, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0x0002,
35946 + 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
35947 + 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
35948 + 0xffff, 0x0888, 0x252b, 0x8c84, 0x7dbc, 0xffff, 0xffff, 0xffff,
35949 + 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
35950 + 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
35951 + 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff
35955 +/*********************************************************************/
35956 +/* Init_flash is used to build a sector table from the information */
35957 +/* provided through the CFI query. This information is translated */
35958 +/* from erase_block information to base:offset information for each */
35959 +/* individual sector. This information is then stored in the meminfo */
35960 +/* structure, and used throughout the driver to access sector */
35961 +/* information. */
35963 +/* This is more efficient than deriving the sector base:offset */
35964 +/* information every time the memory map switches (since on the */
35965 +/* development platform can only map 64k at a time). If the entire */
35966 +/* flash memory array can be mapped in, then the addition static */
35967 +/* allocation for the meminfo structure can be eliminated, but the */
35968 +/* drivers will have to be re-written. */
35970 +/* The meminfo struct occupies 653 bytes of heap space, depending */
35971 +/* on the value of the define MAXSECTORS. Adjust to suit */
35973 +/*********************************************************************/
35974 +byte flash_init(void)
35976 + int i=0, j=0, count=0;
35977 + int basecount=0L;
35978 + UINT16 device_id;
35979 + int flipCFIGeometry = FALSE;
35982 + * a single 8k sector for sector 0. This is to allow
35983 + * the system to perform memory mapping to the device,
35984 + * even though the actual physical layout is unknown.
35985 + * Once mapped in, the CFI query will produce all
35986 + * relevant information.
35988 + meminfo.addr = 0L;
35989 + meminfo.areg = 0;
35990 + meminfo.nsect = 1;
35991 + meminfo.bank1start = 0;
35992 + meminfo.bank2start = 0;
35994 + meminfo.sec[0].size = 8192;
35995 + meminfo.sec[0].base = 0x00000;
35996 + meminfo.sec[0].bank = 1;
35998 + flash_command(FLASH_RESET, 0, 0, 0);
36000 + device_id = flash_get_device_id();
36002 + switch (device_id) {
36003 + case ID_I28F160C3B:
36004 + case ID_I28F320C3B:
36005 + case ID_I28F160C3T:
36006 + case ID_I28F320C3T:
36007 + flashFamily = FLASH_INTEL;
36009 + case ID_AM29DL800B:
36010 + case ID_AM29LV800B:
36011 + case ID_AM29LV400B:
36012 + case ID_AM29LV160B:
36013 + case ID_AM29LV320B:
36014 + case ID_MX29LV320AB:
36015 + case ID_AM29LV320MB:
36016 + case ID_AM29DL800T:
36017 + case ID_AM29LV800T:
36018 + case ID_AM29LV160T:
36019 + case ID_AM29LV320T:
36020 + case ID_MX29LV320AT:
36021 + case ID_AM29LV320MT:
36022 + flashFamily = FLASH_AMD;
36024 + case ID_SST39VF1601:
36025 + case ID_SST39VF3201:
36026 + flashFamily = FLASH_SST;
36029 + printk("Flash memory not supported! Device id = %x\n", device_id);
36033 + if (flash_get_cfi(&query, 0, flashFamily) == -1) {
36034 + switch(device_id) {
36035 + case ID_AM29LV160T:
36036 + case ID_AM29LV160B:
36037 + flash_get_cfi(&query, cfi_data_struct_29W160, flashFamily);
36040 + printk("CFI data structure not found. Device id = %x\n", device_id);
36045 + // need to determine if it top or bottom boot here
36046 + switch (device_id)
36048 + case ID_AM29DL800B:
36049 + case ID_AM29LV800B:
36050 + case ID_AM29LV400B:
36051 + case ID_AM29LV160B:
36052 + case ID_AM29LV320B:
36053 + case ID_MX29LV320AB:
36054 + case ID_AM29LV320MB:
36055 + case ID_I28F160C3B:
36056 + case ID_I28F320C3B:
36057 + case ID_I28F160C3T:
36058 + case ID_I28F320C3T:
36059 + case ID_SST39VF1601:
36060 + case ID_SST39VF3201:
36061 + flipCFIGeometry = FALSE;
36063 + case ID_AM29DL800T:
36064 + case ID_AM29LV800T:
36065 + case ID_AM29LV160T:
36066 + case ID_AM29LV320T:
36067 + case ID_MX29LV320AT:
36068 + case ID_AM29LV320MT:
36069 + flipCFIGeometry = TRUE;
36072 + printk("Flash memory not supported! Device id = %x\n", device_id);
36076 + count=0;basecount=0L;
36078 + if (!flipCFIGeometry)
36080 + for (i=0; i<query.num_erase_blocks; i++) {
36081 + for(j=0; j<query.erase_block[i].num_sectors; j++) {
36082 + meminfo.sec[count].size = (int) query.erase_block[i].sector_size;
36083 + meminfo.sec[count].base = (int) basecount;
36084 + basecount += (int) query.erase_block[i].sector_size;
36091 + for (i = (query.num_erase_blocks - 1); i >= 0; i--) {
36092 + for(j=0; j<query.erase_block[i].num_sectors; j++) {
36093 + meminfo.sec[count].size = (int) query.erase_block[i].sector_size;
36094 + meminfo.sec[count].base = (int) basecount;
36095 + basecount += (int) query.erase_block[i].sector_size;
36101 + meminfo.nsect = count;
36102 + totalSize = meminfo.sec[count-1].base + meminfo.sec[count-1].size;
36106 +/*********************************************************************/
36107 +/* Flash_sector_erase_int() is identical to flash_sector_erase(), */
36108 +/* except it will wait until the erase is completed before returning */
36109 +/* control to the calling function. This can be used in cases which */
36110 +/* require the program to hold until a sector is erased, without */
36111 +/* adding the wait check external to this function. */
36112 +/*********************************************************************/
36113 +byte flash_sector_erase_int(WORD sector)
36117 + for( i = 0; i < 3; i++ ) {
36118 + flash_command(FLASH_SERASE, sector, 0, 0);
36119 + if (flash_wait(sector, 0, 0xffff) == STATUS_READY)
36126 +/*********************************************************************/
36127 +/* flash_read_buf() reads buffer of data from the specified */
36128 +/* offset from the sector parameter. */
36129 +/*********************************************************************/
36130 +int flash_read_buf(WORD sector, int offset,
36131 + byte *buffer, int numbytes)
36135 + fwp = (byte *)flash_get_memptr(sector);
36137 + while (numbytes) {
36138 + *buffer++ = *(fwp + offset);
36146 +/*********************************************************************/
36147 +/* flash_write_buf() utilizes */
36148 +/* the unlock bypass mode of the flash device. This can remove */
36149 +/* significant overhead from the bulk programming operation, and */
36150 +/* when programming bulk data a sizeable performance increase can be */
36152 +/*********************************************************************/
36153 +int flash_write_buf(WORD sector, int offset, byte *buffer, int numbytes)
36157 + unsigned char *p = flash_get_memptr(sector) + offset;
36159 + /* After writing the flash block, compare the contents to the source
36160 + * buffer. Try to write the sector successfully up to three times.
36162 + for( i = 0; i < 3; i++ ) {
36163 + ret = flash_write(sector, offset, buffer, numbytes);
36164 + if( !memcmp( p, buffer, numbytes ) )
36166 + /* Erase and try again */
36167 + flash_sector_erase_int(sector);
36172 + printk( "Flash write error. Verify failed\n" );
36177 +/*********************************************************************/
36178 +/* Usefull funtion to return the number of sectors in the device. */
36179 +/* Can be used for functions which need to loop among all the */
36180 +/* sectors, or wish to know the number of the last sector. */
36181 +/*********************************************************************/
36182 +int flash_get_numsectors(void)
36184 + return meminfo.nsect;
36187 +/*********************************************************************/
36188 +/* flash_get_sector_size() is provided for cases in which the size */
36189 +/* of a sector is required by a host application. The sector size */
36190 +/* (in bytes) is returned in the data location pointed to by the */
36191 +/* 'size' parameter. */
36192 +/*********************************************************************/
36193 +int flash_get_sector_size(WORD sector)
36195 + return meminfo.sec[sector].size;
36198 +/*********************************************************************/
36199 +/* The purpose of flash_get_memptr() is to return a memory pointer */
36200 +/* which points to the beginning of memory space allocated for the */
36201 +/* flash. All function pointers are then referenced from this */
36204 +/* Different systems will implement this in different ways: */
36205 +/* possibilities include: */
36206 +/* - A direct memory pointer */
36207 +/* - A pointer to a memory map */
36208 +/* - A pointer to a hardware port from which the linear */
36209 +/* address is translated */
36210 +/* - Output of an MMU function / service */
36212 +/* Also note that this function expects the pointer to a specific */
36213 +/* sector of the device. This can be provided by dereferencing */
36214 +/* the pointer from a translated offset of the sector from a */
36215 +/* global base pointer (e.g. flashptr = base_pointer + sector_offset)*/
36217 +/* Important: Many AMD flash devices need both bank and or sector */
36218 +/* address bits to be correctly set (bank address bits are A18-A16, */
36219 +/* and sector address bits are A18-A12, or A12-A15). Flash parts */
36220 +/* which do not need these bits will ignore them, so it is safe to */
36221 +/* assume that every part will require these bits to be set. */
36222 +/*********************************************************************/
36223 +unsigned char *flash_get_memptr(WORD sector)
36225 + unsigned char *memptr = (unsigned char*)(FLASH_BASE_ADDR_REG + meminfo.sec[sector].base);
36230 +/*********************************************************************/
36231 +/* The purpose of flash_get_blk() is to return a the block number */
36232 +/* for a given memory address. */
36233 +/*********************************************************************/
36234 +int flash_get_blk(int addr)
36236 + int blk_start, i;
36237 + int last_blk = flash_get_numsectors();
36238 + int relative_addr = addr - (int) FLASH_BASE_ADDR_REG;
36240 + for(blk_start=0, i=0; i < relative_addr && blk_start < last_blk; blk_start++)
36241 + i += flash_get_sector_size(blk_start);
36243 + if( i > relative_addr )
36245 + blk_start--; // last blk, dec by 1
36248 + if( blk_start == last_blk )
36250 + printk("Address is too big.\n");
36254 + return( blk_start );
36257 +/************************************************************************/
36258 +/* The purpose of flash_get_total_size() is to return the total size of */
36260 +/************************************************************************/
36261 +int flash_get_total_size()
36263 + return totalSize;
36266 +/*********************************************************************/
36267 +/* Flash_command() is the main driver function. It performs */
36268 +/* every possible command available to AMD B revision */
36269 +/* flash parts. Note that this command is not used directly, but */
36270 +/* rather called through the API wrapper functions provided below. */
36271 +/*********************************************************************/
36272 +static void flash_command(int command, WORD sector, int offset, UINT16 data)
36274 + volatile UINT16 *flashptr;
36275 + volatile UINT16 *flashbase;
36277 + flashptr = (UINT16 *) flash_get_memptr(sector);
36278 + flashbase = (UINT16 *) flash_get_memptr(0);
36280 + switch (flashFamily) {
36281 + case FLASH_UNDEFINED:
36282 + /* These commands should work for AMD, Intel and SST flashes */
36283 + switch (command) {
36284 + case FLASH_RESET:
36285 + flashptr[0] = 0xF0;
36286 + flashptr[0] = 0xFF;
36288 + case FLASH_READ_ID:
36289 + flashptr[0x5555] = 0xAA; /* unlock 1 */
36290 + flashptr[0x2AAA] = 0x55; /* unlock 2 */
36291 + flashptr[0x5555] = 0x90;
36298 + switch (command) {
36299 + case FLASH_RESET:
36300 + flashptr[0] = 0xF0;
36302 + case FLASH_READ_ID:
36303 + flashptr[0x555] = 0xAA; /* unlock 1 */
36304 + flashptr[0x2AA] = 0x55; /* unlock 2 */
36305 + flashptr[0x555] = 0x90;
36307 + case FLASH_CFIQUERY:
36308 + flashptr[0x55] = 0x98;
36311 + flashptr[0x555] = 0xAA; /* unlock 1 */
36312 + flashptr[0x2AA] = 0x55; /* unlock 2 */
36313 + flashptr[0x555] = 0x20;
36316 + flashptr[0] = 0xA0;
36317 + flashptr[offset/2] = data;
36319 + case FLASH_UBRESET:
36320 + flashptr[0] = 0x90;
36321 + flashptr[0] = 0x00;
36323 + case FLASH_SERASE:
36324 + flashptr[0x555] = 0xAA; /* unlock 1 */
36325 + flashptr[0x2AA] = 0x55; /* unlock 2 */
36326 + flashptr[0x555] = 0x80;
36327 + flashptr[0x555] = 0xAA;
36328 + flashptr[0x2AA] = 0x55;
36329 + flashptr[0] = 0x30;
36335 + case FLASH_INTEL:
36336 + switch (command) {
36337 + case FLASH_RESET:
36338 + flashptr[0] = 0xFF;
36340 + case FLASH_READ_ID:
36341 + flashptr[0] = 0x90;
36343 + case FLASH_CFIQUERY:
36344 + flashptr[0] = 0x98;
36347 + flashptr[0] = 0x40;
36348 + flashptr[offset/2] = data;
36350 + case FLASH_SERASE:
36351 + flashptr[0] = 0x60;
36352 + flashptr[0] = 0xD0;
36353 + flashptr[0] = 0x20;
36354 + flashptr[0] = 0xD0;
36361 + switch (command) {
36362 + case FLASH_RESET:
36363 + flashbase[0x5555] = 0xAA; /* unlock 1 */
36364 + flashbase[0x2AAA] = 0x55; /* unlock 2 */
36365 + flashbase[0x5555] = 0xf0;
36367 + case FLASH_READ_ID:
36368 + flashbase[0x5555] = 0xAA; /* unlock 1 */
36369 + flashbase[0x2AAA] = 0x55; /* unlock 2 */
36370 + flashbase[0x5555] = 0x90;
36372 + case FLASH_CFIQUERY:
36373 + flashbase[0x5555] = 0xAA; /* unlock 1 */
36374 + flashbase[0x2AAA] = 0x55; /* unlock 2 */
36375 + flashbase[0x5555] = 0x98;
36380 + flashbase[0x5555] = 0xAA; /* unlock 1 */
36381 + flashbase[0x2AAA] = 0x55; /* unlock 2 */
36382 + flashbase[0x5555] = 0xa0;
36383 + flashptr[offset/2] = data;
36385 + case FLASH_UBRESET:
36387 + case FLASH_SERASE:
36388 + flashbase[0x5555] = 0xAA; /* unlock 1 */
36389 + flashbase[0x2AAA] = 0x55; /* unlock 2 */
36390 + flashbase[0x5555] = 0x80;
36391 + flashbase[0x5555] = 0xAA;
36392 + flashbase[0x2AAA] = 0x55;
36393 + flashptr[0] = 0x30;
36404 +/*********************************************************************/
36405 +/* flash_write extends the functionality of flash_program() by */
36406 +/* providing an faster way to program multiple data words, without */
36407 +/* needing the function overhead of looping algorithms which */
36408 +/* program word by word. This function utilizes fast pointers */
36409 +/* to quickly loop through bulk data. */
36410 +/*********************************************************************/
36411 +static int flash_write(WORD sector, int offset, byte *buf, int nbytes)
36414 + src = (UINT16 *)buf;
36416 + if ((nbytes | offset) & 1) {
36420 + flash_command(FLASH_UB, 0, 0, 0);
36421 + while (nbytes > 0) {
36422 + flash_command(FLASH_PROG, sector, offset, *src);
36423 + if (flash_wait(sector, offset, *src) != STATUS_READY)
36429 + flash_command(FLASH_UBRESET, 0, 0, 0);
36431 + return (byte*)src - buf;
36434 +/*********************************************************************/
36435 +/* flash_wait utilizes the DQ6, DQ5, and DQ2 polling algorithms */
36436 +/* described in the flash data book. It can quickly ascertain the */
36437 +/* operational status of the flash device, and return an */
36438 +/* appropriate status code (defined in flash.h) */
36439 +/*********************************************************************/
36440 +static int flash_wait(WORD sector, int offset, UINT16 data)
36442 + volatile UINT16 *flashptr; /* flash window */
36445 + flashptr = (UINT16 *) flash_get_memptr(sector);
36447 + if (flashFamily == FLASH_AMD || flashFamily == FLASH_SST) {
36448 +#if defined(_BCM96338_) || defined(CONFIG_BCM96338)
36450 + d1 = flashptr[offset/2];
36452 + return STATUS_READY;
36453 + } while (!(d1 & 0x20));
36455 + d1 = flashptr[offset/2];
36457 + if (d1 != data) {
36458 + flash_command(FLASH_RESET, 0, 0, 0);
36459 + return STATUS_TIMEOUT;
36463 + d1 = *flashptr; /* read data */
36464 + d1 ^= *flashptr; /* read it again and see what toggled */
36465 + if (d1 == 0) /* no toggles, nothing's happening */
36466 + return STATUS_READY;
36467 + } while (!(d1 & 0x20));
36469 + d1 = *flashptr; /* read data */
36470 + d1 ^= *flashptr; /* read it again and see what toggled */
36473 + flash_command(FLASH_RESET, 0, 0, 0);
36474 + return STATUS_TIMEOUT;
36477 + } else if (flashFamily == FLASH_INTEL) {
36478 + flashptr[0] = 0x70;
36479 + /* Wait for completion */
36480 + while(!(*flashptr & 0x80));
36481 + if (*flashptr & 0x30) {
36482 + flashptr[0] = 0x50;
36483 + flash_command(FLASH_RESET, 0, 0, 0);
36484 + return STATUS_TIMEOUT;
36486 + flashptr[0] = 0x50;
36487 + flash_command(FLASH_RESET, 0, 0, 0);
36490 + return STATUS_READY;
36493 +/*********************************************************************/
36494 +/* flash_get_device_id() will perform an autoselect sequence on the */
36495 +/* flash device, and return the device id of the component. */
36496 +/* This function automatically resets to read mode. */
36497 +/*********************************************************************/
36498 +static UINT16 flash_get_device_id()
36500 + volatile UINT16 *fwp; /* flash window */
36503 + fwp = (UINT16 *)flash_get_memptr(0);
36505 + flash_command(FLASH_READ_ID, 0, 0, 0);
36506 + answer = *(fwp + 1);
36507 + if (answer == ID_AM29LV320M) {
36508 + answer = *(fwp + 0xe);
36509 + answer = *(fwp + 0xf);
36512 + flash_command(FLASH_RESET, 0, 0, 0);
36513 + return( (UINT16) answer );
36516 +/*********************************************************************/
36517 +/* flash_get_cfi() is the main CFI workhorse function. Due to it's */
36518 +/* complexity and size it need only be called once upon */
36519 +/* initializing the flash system. Once it is called, all operations */
36520 +/* are performed by looking at the meminfo structure. */
36521 +/* All possible care was made to make this algorithm as efficient as */
36522 +/* possible. 90% of all operations are memory reads, and all */
36523 +/* calculations are done using bit-shifts when possible */
36524 +/*********************************************************************/
36525 +static int flash_get_cfi(struct cfi_query *query, UINT16 *cfi_struct, int flashFamily)
36527 + volatile UINT16 *fwp; /* flash window */
36530 + flash_command(FLASH_CFIQUERY, 0, 0, 0);
36532 + if (cfi_struct == 0)
36533 + fwp = (UINT16 *)flash_get_memptr(0);
36535 + fwp = cfi_struct;
36537 + /* Initial house-cleaning */
36538 + for(i=0; i < 8; i++) {
36539 + query->erase_block[i].sector_size = 0;
36540 + query->erase_block[i].num_sectors = 0;
36543 + /* If not 'QRY', then we dont have a CFI enabled device in the socket */
36544 + if( fwp[0x10] != 'Q' &&
36545 + fwp[0x11] != 'R' &&
36546 + fwp[0x12] != 'Y') {
36547 + flash_command(FLASH_RESET, 0, 0, 0);
36551 + query->num_erase_blocks = fwp[0x2C];
36552 + if(flashFamily == FLASH_SST)
36553 + query->num_erase_blocks = 1;
36555 + for(i=0; i < query->num_erase_blocks; i++) {
36556 + query->erase_block[i].num_sectors = fwp[(0x2D+(4*i))] + (fwp[0x2E + (4*i)] << 8);
36557 + query->erase_block[i].num_sectors++;
36558 + query->erase_block[i].sector_size = 256 * (256 * fwp[(0x30+(4*i))] + fwp[(0x2F+(4*i))]);
36561 + flash_command(FLASH_RESET, 0, 0, 0);
36564 diff -urN linux-2.6.8.1/bcmdrivers/opensource/char/board/bcm963xx/bcm96348/cfiflash.h linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/char/board/bcm963xx/bcm96348/cfiflash.h
36565 --- linux-2.6.8.1/bcmdrivers/opensource/char/board/bcm963xx/bcm96348/cfiflash.h 1970-01-01 01:00:00.000000000 +0100
36566 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/char/board/bcm963xx/bcm96348/cfiflash.h 2006-06-26 09:07:10.000000000 +0200
36568 +/************************************************************************/
36570 +/* AMD CFI Enabled Flash Memory Drivers */
36571 +/* File name: CFIFLASH.H */
36572 +/* Revision: 1.0 5/07/98 */
36574 +/* Copyright (c) 1998 ADVANCED MICRO DEVICES, INC. All Rights Reserved. */
36575 +/* This software is unpublished and contains the trade secrets and */
36576 +/* confidential proprietary information of AMD. Unless otherwise */
36577 +/* provided in the Software Agreement associated herewith, it is */
36578 +/* licensed in confidence "AS IS" and is not to be reproduced in whole */
36579 +/* or part by any means except for backup. Use, duplication, or */
36580 +/* disclosure by the Government is subject to the restrictions in */
36581 +/* paragraph (b) (3) (B) of the Rights in Technical Data and Computer */
36582 +/* Software clause in DFAR 52.227-7013 (a) (Oct 1988). */
36583 +/* Software owned by */
36584 +/* Advanced Micro Devices, Inc., */
36585 +/* One AMD Place, */
36586 +/* P.O. Box 3453 */
36587 +/* Sunnyvale, CA 94088-3453. */
36588 +/************************************************************************/
36589 +/* This software constitutes a basic shell of source code for */
36590 +/* programming all AMD Flash components. AMD */
36591 +/* will not be responsible for misuse or illegal use of this */
36592 +/* software for devices not supported herein. AMD is providing */
36593 +/* this source code "AS IS" and will not be responsible for */
36594 +/* issues arising from incorrect user implementation of the */
36595 +/* source code herein. It is the user's responsibility to */
36596 +/* properly design-in this source code. */
36598 +/************************************************************************/
36599 +#ifndef _CFIFLASH_H
36600 +#define _CFIFLASH_H
36602 +#if defined __cplusplus
36606 +/* include board/CPU specific definitions */
36607 +#include "bcmtypes.h"
36608 +#include "board.h"
36610 +#define FLASH_BASE_ADDR_REG FLASH_BASE
36616 +#define MAXSECTORS 1024 /* maximum number of sectors supported */
36618 +/* A structure for identifying a flash part. There is one for each
36619 + * of the flash part definitions. We need to keep track of the
36620 + * sector organization, the address register used, and the size
36621 + * of the sectors.
36623 +struct flashinfo {
36624 + char *name; /* "Am29DL800T", etc. */
36625 + unsigned long addr; /* physical address, once translated */
36626 + int areg; /* Can be set to zero for all parts */
36627 + int nsect; /* # of sectors -- 19 in LV, 22 in DL */
36628 + int bank1start; /* first sector # in bank 1 */
36629 + int bank2start; /* first sector # in bank 2, if DL part */
36631 + long size; /* # of bytes in this sector */
36632 + long base; /* offset from beginning of device */
36633 + int bank; /* 1 or 2 for DL; 1 for LV */
36634 + } sec[MAXSECTORS]; /* per-sector info */
36638 + * This structure holds all CFI query information as defined
36639 + * in the JEDEC standard. All information up to
36640 + * primary_extended_query is standard among all manufactures
36641 + * with CFI enabled devices.
36644 +struct cfi_query {
36645 + int num_erase_blocks; /* Number of sector defs. */
36647 + unsigned long sector_size; /* byte size of sector */
36648 + int num_sectors; /* Num sectors of this size */
36649 + } erase_block[8]; /* Max of 256, but 8 is good */
36652 +/* Standard Boolean declarations */
36656 +/* Define different type of flash */
36657 +#define FLASH_UNDEFINED 0
36658 +#define FLASH_AMD 1
36659 +#define FLASH_INTEL 2
36660 +#define FLASH_SST 3
36662 +/* Command codes for the flash_command routine */
36663 +#define FLASH_RESET 0 /* reset to read mode */
36664 +#define FLASH_READ_ID 1 /* read device ID */
36665 +#define FLASH_CFIQUERY 2 /* CFI query */
36666 +#define FLASH_UB 3 /* go into unlock bypass mode */
36667 +#define FLASH_PROG 4 /* program a word */
36668 +#define FLASH_UBRESET 5 /* reset to read mode from unlock bypass mode */
36669 +#define FLASH_SERASE 6 /* sector erase */
36671 +/* Return codes from flash_status */
36672 +#define STATUS_READY 0 /* ready for action */
36673 +#define STATUS_TIMEOUT 1 /* operation timed out */
36675 +/* A list of AMD compatible device ID's - add others as needed */
36676 +#define ID_AM29DL800T 0x224A
36677 +#define ID_AM29DL800B 0x22CB
36678 +#define ID_AM29LV800T 0x22DA
36679 +#define ID_AM29LV800B 0x225B
36680 +#define ID_AM29LV400B 0x22BA
36682 +#define ID_AM29LV160B 0x2249
36683 +#define ID_AM29LV160T 0x22C4
36685 +#define ID_AM29LV320T 0x22F6
36686 +#define ID_MX29LV320AT 0x22A7
36687 +#define ID_AM29LV320B 0x22F9
36688 +#define ID_MX29LV320AB 0x22A8
36690 +#define ID_AM29LV320M 0x227E
36691 +#define ID_AM29LV320MB 0x2200
36692 +#define ID_AM29LV320MT 0x2201
36694 +#define ID_SST39VF1601 0x234B
36695 +#define ID_SST39VF3201 0x235B
36697 +/* A list of Intel compatible device ID's - add others as needed */
36698 +#define ID_I28F160C3T 0x88C2
36699 +#define ID_I28F160C3B 0x88C3
36700 +#define ID_I28F320C3T 0x88C4
36701 +#define ID_I28F320C3B 0x88C5
36703 +extern byte flash_init(void);
36704 +extern int flash_write_buf(WORD sector, int offset, byte *buffer, int numbytes);
36705 +extern int flash_read_buf(WORD sector, int offset, byte *buffer, int numbytes);
36706 +extern byte flash_sector_erase_int(WORD sector);
36707 +extern int flash_get_numsectors(void);
36708 +extern int flash_get_sector_size(WORD sector);
36709 +extern int flash_get_total_size(void);
36710 +extern unsigned char *flash_get_memptr(WORD sector);
36711 +extern int flash_get_blk(int addr);
36713 +#if defined __cplusplus
36718 diff -urN linux-2.6.8.1/bcmdrivers/opensource/char/board/bcm963xx/impl1/Makefile linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/char/board/bcm963xx/impl1/Makefile
36719 --- linux-2.6.8.1/bcmdrivers/opensource/char/board/bcm963xx/impl1/Makefile 1970-01-01 01:00:00.000000000 +0100
36720 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/char/board/bcm963xx/impl1/Makefile 2006-06-26 09:07:10.000000000 +0200
36722 +# Makefile for the bcm963xx board drivers
36726 +obj-y := board.o cfiflash.o bcm63xx_flash.o bcm63xx_led.o
36728 +EXTRA_CFLAGS += -I. -I$(INC_BRCMBOARDPARMS_PATH)/$(BRCM_BOARD) -I$(INC_BRCMDRIVER_PUB_PATH)/$(BRCM_BOARD)
36730 +ifeq ($(strip $(WIRELESS)),1)
36731 + EXTRA_CFLAGS += -DWIRELESS
36734 +-include $(TOPDIR)/Rules.make
36737 + rm -f core *.o *.a *.s
36739 diff -urN linux-2.6.8.1/bcmdrivers/opensource/char/board/bcm963xx/impl1/bcm63xx_flash.c linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/char/board/bcm963xx/impl1/bcm63xx_flash.c
36740 --- linux-2.6.8.1/bcmdrivers/opensource/char/board/bcm963xx/impl1/bcm63xx_flash.c 1970-01-01 01:00:00.000000000 +0100
36741 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/char/board/bcm963xx/impl1/bcm63xx_flash.c 2006-06-26 09:07:10.000000000 +0200
36745 + Copyright 2002 Broadcom Corp. All Rights Reserved.
36747 + This program is free software; you can distribute it and/or modify it
36748 + under the terms of the GNU General Public License (Version 2) as
36749 + published by the Free Software Foundation.
36751 + This program is distributed in the hope it will be useful, but WITHOUT
36752 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
36753 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
36754 + for more details.
36756 + You should have received a copy of the GNU General Public License along
36757 + with this program; if not, write to the Free Software Foundation, Inc.,
36758 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
36762 + ***************************************************************************
36763 + * File Name : bcm63xx_flash.c
36765 + * Description: This file contains the flash device driver APIs for bcm63xx board.
36767 + * Created on : 8/10/2002 seanl: use cfiflash.c, cfliflash.h (AMD specific)
36769 + ***************************************************************************/
36773 +#include <linux/fs.h>
36774 +#include <linux/capability.h>
36775 +#include <linux/slab.h>
36776 +#include <linux/errno.h>
36777 +#include <linux/module.h>
36778 +#include <asm/uaccess.h>
36780 +#include <bcm_map_part.h>
36781 +#include <board.h>
36782 +#define BCMTAG_EXE_USE
36783 +#include <bcmTag.h>
36784 +#include "cfiflash.h"
36785 +#include "boardparms.h"
36787 +//#define DEBUG_FLASH
36789 +static FLASH_ADDR_INFO fInfo;
36790 +static int flashInitialized = 0;
36792 +void *retriedKmalloc(size_t size)
36795 + int tryCount = 0;
36797 + // try 1000 times before quit
36798 + while (((pBuf = kmalloc(size, GFP_KERNEL)) == NULL) && (tryCount++ < 1000))
36800 + current->state = TASK_INTERRUPTIBLE;
36801 + schedule_timeout(HZ/10);
36803 + if (tryCount >= 1000)
36806 + memset(pBuf, 0, size);
36811 +void retriedKfree(void *pBuf)
36816 +/***************************************************************************
36817 +// Function Name: getCrc32
36818 +// Description : caculate the CRC 32 of the given data.
36819 +// Parameters : pdata - array of data.
36820 +// size - number of input data bytes.
36821 +// crc - either CRC32_INIT_VALUE or previous return value.
36823 +****************************************************************************/
36824 +UINT32 getCrc32(byte *pdata, UINT32 size, UINT32 crc)
36826 + while (size-- > 0)
36827 + crc = (crc >> 8) ^ Crc32_table[(crc ^ *pdata++) & 0xff];
36832 +// get the nvram start addr
36834 +unsigned long get_nvram_start_addr(void)
36836 + return ((unsigned long)
36837 + (flash_get_memptr(fInfo.flash_nvram_start_blk) + fInfo.flash_nvram_blk_offset));
36840 +// get the scratch_pad start addr
36842 +unsigned long get_scratch_pad_start_addr(void)
36844 + return ((unsigned long)
36845 + (flash_get_memptr(fInfo.flash_scratch_pad_start_blk) + fInfo.flash_scratch_pad_blk_offset));
36850 +/* *********************************************************************
36851 + * kerSysImageTagGet()
36852 + * Get the image tag
36853 + * Input parameters:
36856 + * point to tag -- Found
36858 + ********************************************************************* */
36859 +PFILE_TAG kerSysImageTagGet(void)
36862 + int totalBlks = flash_get_numsectors();
36864 + unsigned char *sectAddr;
36867 +#if defined(DEBUG_FLASH)
36868 + printk("totalblks in tagGet=%d\n", totalBlks);
36871 + // start from 2nd blk, assume 1st one is always CFE
36872 + for (i = 1; i < totalBlks; i++)
36874 + sectAddr = flash_get_memptr((byte) i);
36875 + crc = CRC32_INIT_VALUE;
36876 + crc = getCrc32(sectAddr, (UINT32)TAG_LEN-TOKEN_LEN, crc);
36877 + pTag = (PFILE_TAG) sectAddr;
36879 +#if defined(DEBUG_FLASH)
36880 + printk("Check Tag crc on blk [%d]\n", i);
36883 + if (crc == (UINT32)(*(UINT32*)(pTag->tagValidationToken)))
36887 + return (PFILE_TAG) NULL;
36890 +// Initialize the flash and fill out the fInfo structure
36891 +void kerSysFlashInit( void )
36894 + int totalBlks = 0;
36895 + int totalSize = 0;
36896 + int startAddr = 0;
36897 + int usedBlkSize = 0;
36898 + NVRAM_DATA nvramData;
36899 + UINT32 crc = CRC32_INIT_VALUE, savedCrc;
36900 + PFILE_TAG pTag = NULL;
36901 + unsigned long kernelEndAddr = 0;
36902 + unsigned long spAddr = 0;
36904 + if (flashInitialized)
36907 + flashInitialized = 1;
36910 + totalBlks = flash_get_numsectors();
36911 + totalSize = flash_get_total_size();
36913 + printk("Total Flash size: %dK with %d sectors\n", totalSize/1024, totalBlks);
36915 + /* nvram is always at the end of flash */
36916 + fInfo.flash_nvram_length = FLASH45_LENGTH_NVRAM;
36917 + fInfo.flash_nvram_start_blk = 0; /* always the first block */
36918 + fInfo.flash_nvram_number_blk = 1; /*always fits in the first block */
36919 + fInfo.flash_nvram_blk_offset = NVRAM_DATA_OFFSET;
36921 + // check nvram CRC
36922 + memcpy((char *)&nvramData, (char *)get_nvram_start_addr(), sizeof(NVRAM_DATA));
36923 + savedCrc = nvramData.ulCheckSum;
36924 + nvramData.ulCheckSum = 0;
36925 + crc = getCrc32((char *)&nvramData, (UINT32) sizeof(NVRAM_DATA), crc);
36927 + BpSetBoardId( nvramData.szBoardId );
36929 + fInfo.flash_persistent_length = NVRAM_PSI_DEFAULT;
36930 + if (savedCrc != crc)
36932 + printk("***Board is not initialized****: Using the default PSI size: %d\n",
36933 + fInfo.flash_persistent_length);
36937 + unsigned long ulPsiSize;
36938 + if( BpGetPsiSize( &ulPsiSize ) == BP_SUCCESS )
36939 + fInfo.flash_persistent_length = ulPsiSize;
36942 + printk("***Board id is not set****: Using the default PSI size: %d\n",
36943 + fInfo.flash_persistent_length);
36947 + fInfo.flash_persistent_length *= ONEK;
36948 + startAddr = totalSize - fInfo.flash_persistent_length;
36949 + fInfo.flash_persistent_start_blk = flash_get_blk(startAddr+FLASH_BASE_ADDR_REG);
36950 + fInfo.flash_persistent_number_blk = totalBlks - fInfo.flash_persistent_start_blk;
36951 + // save abs SP address (Scratch Pad). it is before PSI
36952 + spAddr = startAddr - SP_MAX_LEN ;
36953 + // find out the offset in the start_blk
36955 + for (i = fInfo.flash_persistent_start_blk;
36956 + i < (fInfo.flash_persistent_start_blk + fInfo.flash_persistent_number_blk); i++)
36958 + usedBlkSize += flash_get_sector_size((byte) i);
36960 + fInfo.flash_persistent_blk_offset = usedBlkSize - fInfo.flash_persistent_length;
36962 + // get the info for sp
36963 + if (!(pTag = kerSysImageTagGet()))
36965 + printk("Failed to read image tag from flash\n");
36968 + kernelEndAddr = (unsigned long) simple_strtoul(pTag->kernelAddress, NULL, 10) + \
36969 + (unsigned long) simple_strtoul(pTag->kernelLen, NULL, 10);
36971 + // make suer sp does not share kernel block
36972 + fInfo.flash_scratch_pad_start_blk = flash_get_blk(spAddr+FLASH_BASE_ADDR_REG);
36973 + if (fInfo.flash_scratch_pad_start_blk != flash_get_blk(kernelEndAddr))
36975 + fInfo.flash_scratch_pad_length = SP_MAX_LEN;
36976 + if (fInfo.flash_persistent_start_blk == fInfo.flash_scratch_pad_start_blk) // share blk
36978 +#if 1 /* do not used scratch pad unless it's in its own sector */
36979 + printk("Scratch pad is not used for this flash part.\n");
36980 + fInfo.flash_scratch_pad_length = 0; // no sp
36981 +#else /* allow scratch pad to share a sector with another section such as PSI */
36982 + fInfo.flash_scratch_pad_number_blk = 1;
36983 + fInfo.flash_scratch_pad_blk_offset = fInfo.flash_persistent_blk_offset - fInfo.flash_scratch_pad_length;
36986 + else // on different blk
36988 + fInfo.flash_scratch_pad_number_blk = fInfo.flash_persistent_start_blk\
36989 + - fInfo.flash_scratch_pad_start_blk;
36990 + // find out the offset in the start_blk
36992 + for (i = fInfo.flash_scratch_pad_start_blk;
36993 + i < (fInfo.flash_scratch_pad_start_blk + fInfo.flash_scratch_pad_number_blk); i++)
36994 + usedBlkSize += flash_get_sector_size((byte) i);
36995 + fInfo.flash_scratch_pad_blk_offset = usedBlkSize - fInfo.flash_scratch_pad_length;
37000 + printk("No flash for scratch pad!\n");
37001 + fInfo.flash_scratch_pad_length = 0; // no sp
37004 +#if defined(DEBUG_FLASH)
37005 + printk("fInfo.flash_scratch_pad_start_blk = %d\n", fInfo.flash_scratch_pad_start_blk);
37006 + printk("fInfo.flash_scratch_pad_number_blk = %d\n", fInfo.flash_scratch_pad_number_blk);
37007 + printk("fInfo.flash_scratch_pad_length = 0x%x\n", fInfo.flash_scratch_pad_length);
37008 + printk("fInfo.flash_scratch_pad_blk_offset = 0x%x\n", (unsigned int)fInfo.flash_scratch_pad_blk_offset);
37010 + printk("fInfo.flash_nvram_start_blk = %d\n", fInfo.flash_nvram_start_blk);
37011 + printk("fInfo.flash_nvram_blk_offset = 0x%x\n", (unsigned int)fInfo.flash_nvram_blk_offset);
37012 + printk("fInfo.flash_nvram_number_blk = %d\n", fInfo.flash_nvram_number_blk);
37014 + printk("psi startAddr = %x\n", startAddr+FLASH_BASE_ADDR_REG);
37015 + printk("fInfo.flash_persistent_start_blk = %d\n", fInfo.flash_persistent_start_blk);
37016 + printk("fInfo.flash_persistent_blk_offset = 0x%x\n", (unsigned int)fInfo.flash_persistent_blk_offset);
37017 + printk("fInfo.flash_persistent_number_blk = %d\n", fInfo.flash_persistent_number_blk);
37024 +/***********************************************************************
37025 + * Function Name: kerSysFlashAddrInfoGet
37026 + * Description : Fills in a structure with information about the NVRAM
37027 + * and persistent storage sections of flash memory.
37028 + * Fro physmap.c to mount the fs vol.
37029 + * Returns : None.
37030 + ***********************************************************************/
37031 +void kerSysFlashAddrInfoGet(PFLASH_ADDR_INFO pflash_addr_info)
37033 + pflash_addr_info->flash_nvram_blk_offset = fInfo.flash_nvram_blk_offset;
37034 + pflash_addr_info->flash_nvram_length = fInfo.flash_nvram_length;
37035 + pflash_addr_info->flash_nvram_number_blk = fInfo.flash_nvram_number_blk;
37036 + pflash_addr_info->flash_nvram_start_blk = fInfo.flash_nvram_start_blk;
37037 + pflash_addr_info->flash_persistent_blk_offset = fInfo.flash_persistent_blk_offset;
37038 + pflash_addr_info->flash_persistent_length = fInfo.flash_persistent_length;
37039 + pflash_addr_info->flash_persistent_number_blk = fInfo.flash_persistent_number_blk;
37040 + pflash_addr_info->flash_persistent_start_blk = fInfo.flash_persistent_start_blk;
37044 +// get shared blks into *** pTempBuf *** which has to be released bye the caller!
37045 +// return: if pTempBuf != NULL, poits to the data with the dataSize of the buffer
37048 +static char *getSharedBlks(int start_blk, int end_blk)
37051 + int usedBlkSize = 0;
37052 + int sect_size = 0;
37053 + char *pTempBuf = NULL;
37054 + char *pBuf = NULL;
37056 + for (i = start_blk; i < end_blk; i++)
37057 + usedBlkSize += flash_get_sector_size((byte) i);
37059 +#if defined(DEBUG_FLASH)
37060 + printk("usedBlkSize = %d\n", usedBlkSize);
37063 + if ((pTempBuf = (char *) retriedKmalloc(usedBlkSize)) == NULL)
37065 + printk("failed to allocate memory with size: %d\n", usedBlkSize);
37070 + for (i = start_blk; i < end_blk; i++)
37072 + sect_size = flash_get_sector_size((byte) i);
37074 +#if defined(DEBUG_FLASH)
37075 + printk("i = %d, sect_size = %d, end_blk = %d\n", i, sect_size, end_blk);
37077 + flash_read_buf((byte)i, 0, pBuf, sect_size);
37078 + pBuf += sect_size;
37086 +// Set the pTempBuf to flash from start_blk to end_blk
37090 +static int setSharedBlks(int start_blk, int end_blk, char *pTempBuf)
37093 + int sect_size = 0;
37095 + char *pBuf = pTempBuf;
37097 + for (i = start_blk; i < end_blk; i++)
37099 + sect_size = flash_get_sector_size((byte) i);
37100 + flash_sector_erase_int(i);
37101 + if (flash_write_buf(i, 0, pBuf, sect_size) != sect_size)
37103 + printk("Error writing flash sector %d.", i);
37107 + pBuf += sect_size;
37115 +/*******************************************************************************
37116 + * NVRAM functions
37117 + *******************************************************************************/
37123 +int kerSysNvRamGet(char *string, int strLen, int offset)
37125 + char *pBuf = NULL;
37127 + if (!flashInitialized)
37128 + kerSysFlashInit();
37130 + if (strLen > FLASH45_LENGTH_NVRAM)
37133 + if ((pBuf = getSharedBlks(fInfo.flash_nvram_start_blk,
37134 + (fInfo.flash_nvram_start_blk + fInfo.flash_nvram_number_blk))) == NULL)
37137 + // get string off the memory buffer
37138 + memcpy(string, (pBuf + fInfo.flash_nvram_blk_offset + offset), strLen);
37140 + retriedKfree(pBuf);
37150 +int kerSysNvRamSet(char *string, int strLen, int offset)
37153 + char *pBuf = NULL;
37155 + if (strLen > FLASH45_LENGTH_NVRAM)
37158 + if ((pBuf = getSharedBlks(fInfo.flash_nvram_start_blk,
37159 + (fInfo.flash_nvram_start_blk + fInfo.flash_nvram_number_blk))) == NULL)
37162 + // set string to the memory buffer
37163 + memcpy((pBuf + fInfo.flash_nvram_blk_offset + offset), string, strLen);
37165 + if (setSharedBlks(fInfo.flash_nvram_start_blk,
37166 + (fInfo.flash_nvram_number_blk + fInfo.flash_nvram_start_blk), pBuf) != 0)
37169 + retriedKfree(pBuf);
37175 +/***********************************************************************
37176 + * Function Name: kerSysEraseNvRam
37177 + * Description : Erase the NVRAM storage section of flash memory.
37178 + * Returns : 1 -- ok, 0 -- fail
37179 + ***********************************************************************/
37180 +int kerSysEraseNvRam(void)
37183 + char *tempStorage = retriedKmalloc(FLASH45_LENGTH_NVRAM);
37185 + // just write the whole buf with '0xff' to the flash
37186 + if (!tempStorage)
37190 + memset(tempStorage, 0xff, FLASH45_LENGTH_NVRAM);
37191 + if (kerSysNvRamSet(tempStorage, FLASH45_LENGTH_NVRAM, 0) != 0)
37193 + retriedKfree(tempStorage);
37200 +/*******************************************************************************
37202 + *******************************************************************************/
37207 +int kerSysPersistentGet(char *string, int strLen, int offset)
37209 + char *pBuf = NULL;
37211 + if (strLen > fInfo.flash_persistent_length)
37214 + if ((pBuf = getSharedBlks(fInfo.flash_persistent_start_blk,
37215 + (fInfo.flash_persistent_start_blk + fInfo.flash_persistent_number_blk))) == NULL)
37218 + // get string off the memory buffer
37219 + memcpy(string, (pBuf + fInfo.flash_persistent_blk_offset + offset), strLen);
37221 + retriedKfree(pBuf);
37231 +int kerSysPersistentSet(char *string, int strLen, int offset)
37234 + char *pBuf = NULL;
37236 + if (strLen > fInfo.flash_persistent_length)
37239 + if ((pBuf = getSharedBlks(fInfo.flash_persistent_start_blk,
37240 + (fInfo.flash_persistent_start_blk + fInfo.flash_persistent_number_blk))) == NULL)
37243 + // set string to the memory buffer
37244 + memcpy((pBuf + fInfo.flash_persistent_blk_offset + offset), string, strLen);
37246 + if (setSharedBlks(fInfo.flash_persistent_start_blk,
37247 + (fInfo.flash_persistent_number_blk + fInfo.flash_persistent_start_blk), pBuf) != 0)
37250 + retriedKfree(pBuf);
37256 +// flash bcm image
37259 +// !0 - the sector number fail to be flashed (should not be 0)
37260 +int kerSysBcmImageSet( int flash_start_addr, char *string, int size)
37266 + char *pTempBuf = NULL;
37267 + int whole_image = 0;
37269 + blk_start = flash_get_blk(flash_start_addr);
37270 + if( blk_start < 0 )
37273 + if (flash_start_addr == FLASH_BASE && size > FLASH45_LENGTH_BOOT_ROM)
37276 + /* write image to flash memory */
37279 + sect_size = flash_get_sector_size(blk_start);
37280 +// NOTE: for memory problem in multiple PVC configuration, temporary get rid of kmalloc this 64K for now.
37281 +// if ((pTempBuf = (char *)retriedKmalloc(sect_size)) == NULL)
37283 +// printk("Failed to allocate memory with size: %d. Reset the router...\n", sect_size);
37284 +// kerSysMipsSoftReset(); // reset the board right away.
37286 + // for whole image, no check on psi
37287 + if (!whole_image && blk_start == fInfo.flash_persistent_start_blk) // share the blk with psi
37289 + if (size > (sect_size - fInfo.flash_persistent_length))
37291 + printk("Image is too big\n");
37292 + break; // image is too big. Can not overwrite to nvram
37294 + if ((pTempBuf = (char *)retriedKmalloc(sect_size)) == NULL)
37296 + printk("Failed to allocate memory with size: %d. Reset the router...\n", sect_size);
37297 + kerSysMipsSoftReset(); // reset the board right away.
37299 + flash_read_buf((byte)blk_start, 0, pTempBuf, sect_size);
37300 + if (copy_from_user((void *)pTempBuf,(void *)string, size) != 0)
37301 + break; // failed ?
37302 + flash_sector_erase_int(blk_start); // erase blk before flash
37303 + if (flash_write_buf(blk_start, 0, pTempBuf, sect_size) == sect_size)
37304 + size = 0; // break out and say all is ok
37305 + retriedKfree(pTempBuf);
37309 + flash_sector_erase_int(blk_start); // erase blk before flash
37311 + if (sect_size > size)
37315 + sect_size = size;
37318 + if ((i = flash_write_buf(blk_start, 0, string, sect_size)) != sect_size) {
37322 + string += sect_size;
37323 + size -= sect_size;
37324 + } while (size > 0);
37328 + // If flashing a whole image, erase to end of flash.
37329 + int total_blks = flash_get_numsectors();
37330 + while( blk_start < total_blks )
37332 + flash_sector_erase_int(blk_start);
37337 + retriedKfree(pTempBuf);
37342 + sts = blk_start; // failed to flash this sector
37347 +/*******************************************************************************
37349 + *******************************************************************************/
37350 +// get sp data. NOTE: memcpy work here -- not using copy_from/to_user
37354 +int kerSysScratchPadGet(char *tokenId, char *tokBuf, int bufLen)
37356 + PSP_HEADER pHead = NULL;
37357 + PSP_TOKEN pToken = NULL;
37358 + char *pBuf = NULL;
37359 + char *pShareBuf = NULL;
37360 + char *startPtr = NULL;
37361 + char *endPtr = NULL;
37362 + char *spEndPtr = NULL;
37365 + if (fInfo.flash_scratch_pad_length == 0)
37368 + if (bufLen >= (fInfo.flash_scratch_pad_length - sizeof(SP_HEADER) - sizeof(SP_TOKEN)))
37370 + printk("Exceed scratch pad space by %d\n", bufLen - fInfo.flash_scratch_pad_length \
37371 + - sizeof(SP_HEADER) - sizeof(SP_TOKEN));
37375 + if ((pShareBuf = getSharedBlks(fInfo.flash_scratch_pad_start_blk,
37376 + (fInfo.flash_scratch_pad_start_blk + fInfo.flash_scratch_pad_number_blk))) == NULL)
37379 + // pBuf points to SP buf
37380 + pBuf = pShareBuf + fInfo.flash_scratch_pad_blk_offset;
37382 + pHead = (PSP_HEADER) pBuf;
37383 + if (memcmp(pHead->SPMagicNum, MAGIC_NUMBER, MAGIC_NUM_LEN) != 0)
37385 + printk("Scrap pad is not initialized.\n");
37389 + // search up to SPUsedLen for the token
37390 + startPtr = pBuf + sizeof(SP_HEADER);
37391 + endPtr = pBuf + pHead->SPUsedLen;
37392 + spEndPtr = pBuf + SP_MAX_LEN;
37393 + while (startPtr < endPtr && startPtr < spEndPtr)
37395 + pToken = (PSP_TOKEN) startPtr;
37396 + if (strncmp(pToken->tokenName, tokenId, TOKEN_NAME_LEN) == 0)
37398 + memcpy(tokBuf, startPtr + sizeof(SP_TOKEN), bufLen);
37402 + // get next token
37403 + startPtr += sizeof(SP_TOKEN) + pToken->tokenLen;
37406 + retriedKfree(pShareBuf);
37412 +// set sp. NOTE: memcpy work here -- not using copy_from/to_user
37416 +int kerSysScratchPadSet(char *tokenId, char *tokBuf, int bufLen)
37418 + PSP_TOKEN pToken = NULL;
37419 + PSP_HEADER pHead = NULL;
37420 + char *pShareBuf = NULL;
37421 + char *pBuf = NULL;
37422 + SP_HEADER SPHead;
37423 + SP_TOKEN SPToken;
37427 + if (fInfo.flash_scratch_pad_length == 0)
37430 + if (bufLen >= (fInfo.flash_scratch_pad_length - sizeof(SP_HEADER) - sizeof(SP_TOKEN)))
37432 + printk("Exceed scratch pad space by %d\n", bufLen - fInfo.flash_scratch_pad_length \
37433 + - sizeof(SP_HEADER) - sizeof(SP_TOKEN));
37437 + if ((pShareBuf = getSharedBlks(fInfo.flash_scratch_pad_start_blk,
37438 + (fInfo.flash_scratch_pad_start_blk + fInfo.flash_scratch_pad_number_blk))) == NULL)
37441 + // pBuf points to SP buf
37442 + pBuf = pShareBuf + fInfo.flash_scratch_pad_blk_offset;
37443 + pHead = (PSP_HEADER) pBuf;
37445 + // form header info. SPUsedLen later on...
37446 + memset((char *)&SPHead, 0, sizeof(SP_HEADER));
37447 + memcpy(SPHead.SPMagicNum, MAGIC_NUMBER, MAGIC_NUM_LEN);
37448 + SPHead.SPVersion = SP_VERSION;
37450 + // form token info.
37451 + memset((char*)&SPToken, 0, sizeof(SP_TOKEN));
37452 + strncpy(SPToken.tokenName, tokenId, TOKEN_NAME_LEN - 1);
37453 + SPToken.tokenLen = bufLen;
37454 + if (memcmp(pHead->SPMagicNum, MAGIC_NUMBER, MAGIC_NUM_LEN) != 0)
37456 + // new sp, so just flash the token
37457 + printk("No Scrap pad found. Initialize scratch pad...\n");
37458 + SPHead.SPUsedLen = sizeof(SP_HEADER) + sizeof(SP_TOKEN) + bufLen;
37459 + memcpy(pBuf, (char *)&SPHead, sizeof(SP_HEADER));
37460 + curPtr = pBuf + sizeof(SP_HEADER);
37461 + memcpy(curPtr, (char *)&SPToken, sizeof(SP_TOKEN));
37462 + curPtr += sizeof(SP_TOKEN);
37463 + memcpy(curPtr, tokBuf, bufLen);
37467 + // need search for the token, if exist with same size overwrite it. if sizes differ,
37468 + // move over the later token data over and put the new one at the end
37469 + char *endPtr = pBuf + pHead->SPUsedLen;
37470 + char *spEndPtr = pBuf + SP_MAX_LEN;
37471 + curPtr = pBuf + sizeof(SP_HEADER);
37472 + while (curPtr < endPtr && curPtr < spEndPtr)
37474 + pToken = (PSP_TOKEN) curPtr;
37475 + if (strncmp(pToken->tokenName, tokenId, TOKEN_NAME_LEN) == 0)
37477 + if (pToken->tokenLen == bufLen) // overwirte it
37479 + memcpy((curPtr+sizeof(SP_TOKEN)), tokBuf, bufLen);
37482 + else // move later data over and put the new token at the end
37484 + memcpy((curPtr+sizeof(SP_TOKEN)), tokBuf, bufLen); // ~~~
37488 + else // not same token ~~~
37491 + // get next token
37492 + curPtr += sizeof(SP_TOKEN) + pToken->tokenLen;
37494 + SPHead.SPUsedLen = sizeof(SP_HEADER) + sizeof(SP_TOKEN) + bufLen; // ~~~
37495 + if (SPHead.SPUsedLen > SP_MAX_LEN)
37497 + printk("No more Scratch pad space left! Over limit by %d bytes\n", SPHead.SPUsedLen - SP_MAX_LEN);
37501 + } // else if not new sp
37503 + sts = setSharedBlks(fInfo.flash_scratch_pad_start_blk,
37504 + (fInfo.flash_scratch_pad_number_blk + fInfo.flash_scratch_pad_start_blk), pShareBuf);
37506 + retriedKfree(pShareBuf);
37513 +int kerSysFlashSizeGet(void)
37515 + return flash_get_total_size();
37518 diff -urN linux-2.6.8.1/bcmdrivers/opensource/char/board/bcm963xx/impl1/bcm63xx_led.c linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/char/board/bcm963xx/impl1/bcm63xx_led.c
37519 --- linux-2.6.8.1/bcmdrivers/opensource/char/board/bcm963xx/impl1/bcm63xx_led.c 1970-01-01 01:00:00.000000000 +0100
37520 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/char/board/bcm963xx/impl1/bcm63xx_led.c 2006-06-26 09:07:10.000000000 +0200
37524 + Copyright 2002 Broadcom Corp. All Rights Reserved.
37526 + This program is free software; you can distribute it and/or modify it
37527 + under the terms of the GNU General Public License (Version 2) as
37528 + published by the Free Software Foundation.
37530 + This program is distributed in the hope it will be useful, but WITHOUT
37531 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
37532 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
37533 + for more details.
37535 + You should have received a copy of the GNU General Public License along
37536 + with this program; if not, write to the Free Software Foundation, Inc.,
37537 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
37540 +/***************************************************************************
37541 + * File Name : bcm63xx_led.c
37545 + * This file contains bcm963xx board led control API functions.
37547 + * To use it, do the following
37549 + * 1). define in the board.c the following led mappping (this is for 6345GW board):
37550 + * const LED_MAP_PAIR cLedMapping45GW[] =
37551 + * { // led name Initial state physical pin (ledMask)
37552 + * {kLedUsb, kLedStateOff, GPIO_LED_PIN_7},
37553 + * {kLedAdsl, kLedStateOff, GPIO_LED_PIN_8},
37554 + * {kLedPPP, kLedStateOff, GPIO_LED_PIN_9}, // PPP and WanData share PIN_9
37555 + * {kLedWanData, kLedStateOff, GPIO_LED_PIN_9},
37556 + * {kLedWireless, kLedStateOff, GPIO_LED_PIN_10},
37557 + * {kLedEnd, kLedStateOff, 0 } // NOTE: kLedEnd has to be at the end.
37559 + * 2). };To initialize led API and initial state of the leds, call the following function with the mapping
37560 + * pointer from the above struct
37562 + * boardLedInit((PLED_MAP_PAIR) &cLedMapping45R);
37564 + * 3). Sample call for kernel mode:
37566 + * kerSysLedCtrl(kLedAdsl, kLedStateBlinkOnce); // kLedxxx defines in board.h
37568 + * 4). Sample call for user mode
37570 + * sysLedCtrl(kLedAdsl, kLedStateBlinkOnce); // kLedxxx defines in board_api.h
37573 + * Created on : 10/28/2002 seanl
37575 + ***************************************************************************/
37578 +#include <linux/init.h>
37579 +#include <linux/fs.h>
37580 +#include <linux/capability.h>
37581 +#include <linux/slab.h>
37582 +#include <linux/errno.h>
37583 +#include <linux/module.h>
37584 +#include <linux/netdevice.h>
37585 +#include <asm/uaccess.h>
37587 +#include <bcm_map_part.h>
37588 +#include <board.h>
37590 +#define k100ms (HZ / 10) // ~100 ms
37591 +#define kFastBlinkCount 0 // ~100ms
37592 +#define kSlowBlinkCount 5 // ~600ms
37594 +#define MAX_VIRT_LEDS 12
37596 +// uncomment // for debug led
37597 +//#define DEBUG_LED
37599 +// global variables:
37600 +struct timer_list gLedTimer;
37601 +int gTimerOn = FALSE;
37602 +int gLedCount = 0;
37604 +typedef struct ledinfo
37606 + unsigned short ledMask; // mask for led: ie. giop 10 = 0x0400
37607 + unsigned short ledActiveLow; // GPIO bit reset to turn on LED
37608 + unsigned short ledMaskFail; // mask for led: ie. giop 10 = 0x0400
37609 + unsigned short ledActiveLowFail;// GPIO bit reset to turn on LED
37610 + BOARD_LED_STATE ledState; // current led state
37611 + BOARD_LED_STATE savedLedState; // used in blink once for restore to the orignal ledState
37612 + int blinkCountDown; // if == 0, do blink (toggle). Is assgined value and dec by 1 at each timer.
37613 +} LED_INFO, *PLED_INFO;
37615 +static PLED_INFO gLed = NULL;
37616 +static PLED_INFO gpVirtLeds[MAX_VIRT_LEDS];
37617 +static HANDLE_LED_FUNC gLedHwFunc[MAX_VIRT_LEDS];
37618 +static HANDLE_LED_FUNC gLedHwFailFunc[MAX_VIRT_LEDS];
37620 +#if 0 /* BROKEN */
37621 +#if defined(CONFIG_BCM96348) || defined(CONFIG_BCM96338)
37622 +static int gLedOffInBridgeMode = 1;
37623 +#elif defined(CONFIG_BCM96345)
37624 +static int gLedOffInBridgeMode = 0;
37628 +void ledTimerExpire(void);
37629 +int initLedInfo( PLED_MAP_PAIR pCurMap, PLED_INFO pCurLed );
37631 +//**************************************************************************************
37633 +//**************************************************************************************
37635 +// turn led on and set the ledState
37636 +void ledOn(PLED_INFO pLed)
37638 + if( pLed->ledMask )
37640 + GPIO->GPIODir |= pLed->ledMask; // turn on the direction bit in case was turned off by some one
37641 + if( pLed->ledActiveLow )
37642 + GPIO->GPIOio &= ~pLed->ledMask; // turn on the led
37644 + GPIO->GPIOio |= pLed->ledMask; // turn on the led
37645 + pLed->ledState = pLed->savedLedState = kLedStateOn;
37650 +// turn led off and set the ledState
37651 +void ledOff(PLED_INFO pLed)
37653 + if( pLed->ledMask )
37655 + GPIO->GPIODir |= pLed->ledMask; // turn on the direction bit in case was turned off by some one
37656 + if( pLed->ledActiveLow )
37657 + GPIO->GPIOio |= pLed->ledMask; // turn off the led
37659 + GPIO->GPIOio &= ~pLed->ledMask; // turn off the led
37660 + pLed->ledState = pLed->savedLedState = kLedStateOff;
37664 +// turn led on and set the ledState
37665 +void ledOnFail(PLED_INFO pLed)
37667 + if( pLed->ledMaskFail )
37669 + GPIO->GPIODir |= pLed->ledMaskFail; // turn on the direction bit in case was turned off by some one
37670 + if( pLed->ledActiveLowFail )
37671 + GPIO->GPIOio &= ~pLed->ledMaskFail;// turn on the led
37673 + GPIO->GPIOio |= pLed->ledMaskFail; // turn on the led
37674 + pLed->ledState = pLed->savedLedState = kLedStateFail;
37679 +// turn led off and set the ledState
37680 +void ledOffFail(PLED_INFO pLed)
37682 + if( pLed->ledMaskFail )
37684 + GPIO->GPIODir |= pLed->ledMaskFail; // turn on the direction bit in case was turned off by some one
37685 + if( pLed->ledActiveLowFail )
37686 + GPIO->GPIOio |= pLed->ledMaskFail; // turn off the led
37688 + GPIO->GPIOio &= ~pLed->ledMaskFail;// turn off the led
37689 + pLed->ledState = pLed->savedLedState = kLedStateOff;
37694 +// toggle the led and return the current ledState
37695 +BOARD_LED_STATE ledToggle(PLED_INFO pLed)
37697 + GPIO->GPIODir |= pLed->ledMask; // turn on the direction bit in case was turned off by some one
37698 + if (GPIO->GPIOio & pLed->ledMask)
37700 + GPIO->GPIOio &= ~(pLed->ledMask);
37701 + return( (pLed->ledActiveLow) ? kLedStateOn : kLedStateOff );
37705 + GPIO->GPIOio |= pLed->ledMask;
37706 + return( (pLed->ledActiveLow) ? kLedStateOff : kLedStateOn );
37711 +// led timer. Will return if timer is already on
37712 +void ledTimerStart(void)
37717 +#if defined(DEBUG_LED)
37718 + printk("led: add_timer\n");
37721 + init_timer(&gLedTimer);
37722 + gLedTimer.function = (void*)ledTimerExpire;
37723 + gLedTimer.expires = jiffies + k100ms; // timer expires in ~100ms
37724 + add_timer (&gLedTimer);
37729 +// led timer expire kicks in about ~100ms and perform the led operation according to the ledState and
37730 +// restart the timer according to ledState
37731 +void ledTimerExpire(void)
37734 + PLED_INFO pCurLed;
37736 + gTimerOn = FALSE;
37738 + for (i = 0, pCurLed = gLed; i < gLedCount; i++, pCurLed++)
37740 +#if defined(DEBUG_LED)
37741 + printk("led[%d]: Mask=0x%04x, State = %d, blcd=%d\n", i, pCurLed->ledMask, pCurLed->ledState, pCurLed->blinkCountDown);
37743 + switch (pCurLed->ledState)
37745 + case kLedStateOn:
37746 + case kLedStateOff:
37747 + case kLedStateFail:
37748 + pCurLed->blinkCountDown = 0; // reset the blink count down
37751 + case kLedStateBlinkOnce:
37752 + ledToggle(pCurLed);
37753 + pCurLed->blinkCountDown = 0; // reset to 0
37754 + pCurLed->ledState = pCurLed->savedLedState;
37755 + if (pCurLed->ledState == kLedStateSlowBlinkContinues ||
37756 + pCurLed->ledState == kLedStateFastBlinkContinues)
37757 + ledTimerStart(); // start timer if in blinkContinues stats
37760 + case kLedStateSlowBlinkContinues:
37761 + if (pCurLed->blinkCountDown-- == 0)
37763 + pCurLed->blinkCountDown = kSlowBlinkCount;
37764 + ledToggle(pCurLed);
37769 + case kLedStateFastBlinkContinues:
37770 + if (pCurLed->blinkCountDown-- == 0)
37772 + pCurLed->blinkCountDown = kFastBlinkCount;
37773 + ledToggle(pCurLed);
37779 + printk("Invalid state = %d\n", pCurLed->ledState);
37784 +// initialize the gLedCount and allocate and fill gLed struct
37785 +void __init boardLedInit(PLED_MAP_PAIR cLedMapping)
37787 + PLED_MAP_PAIR p1, p2;
37788 + PLED_INFO pCurLed;
37789 + int needTimer = FALSE;
37790 + int alreadyUsed = 0;
37792 +#if defined(CONFIG_BCM96348) || defined(CONFIG_BCM96338)
37793 + /* Set blink rate for BCM6348/BCM6338 hardware LEDs. */
37794 + GPIO->LEDCtrl &= ~LED_INTERVAL_SET_MASK;
37795 + GPIO->LEDCtrl |= LED_INTERVAL_SET_80MS;
37798 + memset( gpVirtLeds, 0x00, sizeof(gpVirtLeds) );
37799 + memset( gLedHwFunc, 0x00, sizeof(gLedHwFunc) );
37800 + memset( gLedHwFailFunc, 0x00, sizeof(gLedHwFailFunc) );
37804 + // Check for multiple LED names and multiple LED GPIO pins that share the
37805 + // same physical board LED.
37806 + for( p1 = cLedMapping; p1->ledName != kLedEnd; p1++ )
37809 + for( p2 = cLedMapping; p2 != p1; p2++ )
37811 + if( (p1->ledMask && p1->ledMask == p2->ledMask) ||
37812 + (p1->ledMaskFail && p1->ledMaskFail == p2->ledMaskFail) )
37819 + if( alreadyUsed == 0 )
37823 + gLed = (PLED_INFO) kmalloc((gLedCount * sizeof(LED_INFO)), GFP_KERNEL);
37824 + if( gLed == NULL )
37826 + printk( "LED memory allocation error.\n" );
37830 + memset( gLed, 0x00, gLedCount * sizeof(LED_INFO) );
37832 + // initial the gLed with unique ledMask and initial state. If more than 1 ledNames share the physical led
37833 + // (ledMask) the first defined led's ledInitState will be used.
37835 + for( p1 = cLedMapping; p1->ledName != kLedEnd; p1++ )
37837 + if( (int) p1->ledName > MAX_VIRT_LEDS )
37841 + for( p2 = cLedMapping; p2 != p1; p2++ )
37843 + if( (p1->ledMask && p1->ledMask == p2->ledMask) ||
37844 + (p1->ledMaskFail && p1->ledMaskFail == p2->ledMaskFail) )
37851 + if( alreadyUsed == 0 )
37853 + // Initialize the board LED for the first time.
37854 + needTimer = initLedInfo( p1, pCurLed );
37855 + gpVirtLeds[(int) p1->ledName] = pCurLed;
37861 + for( pLed = gLed; pLed != pCurLed; pLed++ )
37863 + // Find the LED_INFO structure that has already been initialized.
37864 + if((pLed->ledMask && pLed->ledMask == p1->ledMask) ||
37865 + (pLed->ledMaskFail && pLed->ledMaskFail==p1->ledMaskFail))
37867 + // The board LED has already been initialized but possibly
37868 + // not completely initialized.
37869 + if( p1->ledMask )
37871 + pLed->ledMask = p1->ledMask;
37872 + pLed->ledActiveLow = p1->ledActiveLow;
37874 + if( p1->ledMaskFail )
37876 + pLed->ledMaskFail = p1->ledMaskFail;
37877 + pLed->ledActiveLowFail = p1->ledActiveLowFail;
37879 + gpVirtLeds[(int) p1->ledName] = pLed;
37889 +#if defined(DEBUG_LED)
37891 + for (i=0; i < gLedCount; i++)
37892 + printk("initLed: led[%d]: mask=0x%04x, state=%d\n", i,(gLed+i)->ledMask, (gLed+i)->ledState);
37897 +// Initialize a structure that contains information about a physical board LED
37898 +// control. The board LED may contain more than one GPIO pin to control a
37899 +// normal condition (green) or a failure condition (red).
37900 +int initLedInfo( PLED_MAP_PAIR pCurMap, PLED_INFO pCurLed )
37902 + int needTimer = FALSE;
37903 + pCurLed->ledState = pCurLed->savedLedState = pCurMap->ledInitState;
37904 + pCurLed->ledMask = pCurMap->ledMask;
37905 + pCurLed->ledActiveLow = pCurMap->ledActiveLow;
37906 + pCurLed->ledMaskFail = pCurMap->ledMaskFail;
37907 + pCurLed->ledActiveLowFail = pCurMap->ledActiveLowFail;
37909 + switch (pCurLed->ledState)
37911 + case kLedStateOn:
37912 + pCurLed->blinkCountDown = 0; // reset the blink count down
37915 + case kLedStateOff:
37916 + pCurLed->blinkCountDown = 0; // reset the blink count down
37919 + case kLedStateFail:
37920 + pCurLed->blinkCountDown = 0; // reset the blink count down
37921 + ledOnFail(pCurLed);
37923 + case kLedStateBlinkOnce:
37924 + pCurLed->blinkCountDown = 1;
37925 + needTimer = TRUE;
37927 + case kLedStateSlowBlinkContinues:
37928 + pCurLed->blinkCountDown = kSlowBlinkCount;
37929 + needTimer = TRUE;
37931 + case kLedStateFastBlinkContinues:
37932 + pCurLed->blinkCountDown = kFastBlinkCount;
37933 + needTimer = TRUE;
37936 + printk("Invalid state = %d\n", pCurLed->ledState);
37939 + return( needTimer );
37942 +#if 0 /* BROKEN */
37943 +// Determines if there is at least one interface in bridge mode. Bridge mode
37944 +// is determined by the cfm convention of naming bridge interfaces nas17
37946 +static int isBridgedProtocol(void)
37948 + extern int dev_get(const char *name);
37949 + const int firstBridgeId = 17;
37950 + const int lastBridgeId = 24;
37955 + for( i = firstBridgeId; i <= lastBridgeId; i++ )
37957 + sprintf( name, "nas%d", i );
37959 + if( dev_get(name) )
37970 +// led ctrl. Maps the ledName to the corresponding ledInfoPtr and perform the led operation
37971 +void boardLedCtrl(BOARD_LED_NAME ledName, BOARD_LED_STATE ledState)
37973 + PLED_INFO ledInfoPtr;
37975 + // do the mapping from virtual to physical led
37976 + if( (int) ledName < MAX_VIRT_LEDS )
37977 + ledInfoPtr = gpVirtLeds[(int) ledName];
37979 + ledInfoPtr = NULL;
37981 + if (ledInfoPtr == NULL)
37984 + if( ledState != kLedStateFail && gLedHwFunc[(int) ledName] )
37986 + (*gLedHwFunc[(int) ledName]) (ledName, ledState);
37987 + ledOffFail(ledInfoPtr);
37991 + if( ledState == kLedStateFail && gLedHwFailFunc[(int) ledName] )
37993 + (*gLedHwFailFunc[(int) ledName]) (ledName, ledState);
37994 + ledOff(ledInfoPtr);
37998 +#if 0 /* BROKEN */
37999 + // Do not blink the WAN Data LED if at least one interface is in bridge mode.
38000 + if(gLedOffInBridgeMode == 1 && (ledName == kLedWanData || ledName == kLedPPP))
38002 + static int BridgedProtocol = -1;
38004 + if( BridgedProtocol == -1 )
38005 + BridgedProtocol = isBridgedProtocol();
38007 + if( BridgedProtocol == TRUE )
38012 + // If the state is kLedStateFail and there is not a failure LED defined
38013 + // in the board parameters, change the state to kLedStateFastBlinkContinues.
38014 + if( ledState == kLedStateFail && ledInfoPtr->ledMaskFail == 0 )
38015 + ledState = kLedStateFastBlinkContinues;
38017 + switch (ledState)
38019 + case kLedStateOn:
38020 + // First, turn off the complimentary (failure) LED GPIO.
38021 + if( ledInfoPtr->ledMaskFail )
38022 + ledOffFail(ledInfoPtr);
38024 + if( gLedHwFailFunc[(int) ledName] )
38025 + (*gLedHwFailFunc[(int) ledName]) (ledName, kLedStateOff);
38027 + // Next, turn on the specified LED GPIO.
38028 + ledOn(ledInfoPtr);
38031 + case kLedStateOff:
38032 + // First, turn off the complimentary (failure) LED GPIO.
38033 + if( ledInfoPtr->ledMaskFail )
38034 + ledOffFail(ledInfoPtr);
38036 + if( gLedHwFailFunc[(int) ledName] )
38037 + (*gLedHwFailFunc[(int) ledName]) (ledName, kLedStateOff);
38039 + // Next, turn off the specified LED GPIO.
38040 + ledOff(ledInfoPtr);
38043 + case kLedStateFail:
38044 + // First, turn off the complimentary (normal) LED GPIO.
38045 + if( ledInfoPtr->ledMask )
38046 + ledOff(ledInfoPtr);
38048 + if( gLedHwFunc[(int) ledName] )
38049 + (*gLedHwFunc[(int) ledName]) (ledName, kLedStateOff);
38051 + // Next, turn on (red) the specified LED GPIO.
38052 + ledOnFail(ledInfoPtr);
38055 + case kLedStateBlinkOnce:
38056 + // skip blinkOnce if it is already in Slow/Fast blink continues state
38057 + if (ledInfoPtr->savedLedState == kLedStateSlowBlinkContinues ||
38058 + ledInfoPtr->savedLedState == kLedStateFastBlinkContinues)
38062 + if (ledInfoPtr->blinkCountDown == 0) // skip the call if it is 1
38064 + ledToggle(ledInfoPtr);
38065 + ledInfoPtr->blinkCountDown = 1; // it will be reset to 0 when timer expires
38066 + ledInfoPtr->ledState = kLedStateBlinkOnce;
38072 + case kLedStateSlowBlinkContinues:
38073 + ledInfoPtr->blinkCountDown = kSlowBlinkCount;
38074 + ledInfoPtr->ledState = kLedStateSlowBlinkContinues;
38075 + ledInfoPtr->savedLedState = kLedStateSlowBlinkContinues;
38079 + case kLedStateFastBlinkContinues:
38080 + ledInfoPtr->blinkCountDown = kFastBlinkCount;
38081 + ledInfoPtr->ledState = kLedStateFastBlinkContinues;
38082 + ledInfoPtr->savedLedState = kLedStateFastBlinkContinues;
38087 + printk("Invalid led state\n");
38091 +// This function is called for an LED that is controlled by hardware.
38092 +void kerSysLedRegisterHwHandler( BOARD_LED_NAME ledName,
38093 + HANDLE_LED_FUNC ledHwFunc, int ledFailType )
38095 + if( (int) ledName < MAX_VIRT_LEDS )
38097 + if( ledFailType == 1 )
38098 + gLedHwFailFunc[(int) ledName] = ledHwFunc;
38100 + gLedHwFunc[(int) ledName] = ledHwFunc;
38104 diff -urN linux-2.6.8.1/bcmdrivers/opensource/char/board/bcm963xx/impl1/board.c linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/char/board/bcm963xx/impl1/board.c
38105 --- linux-2.6.8.1/bcmdrivers/opensource/char/board/bcm963xx/impl1/board.c 1970-01-01 01:00:00.000000000 +0100
38106 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/char/board/bcm963xx/impl1/board.c 2006-06-26 09:07:10.000000000 +0200
38110 + Copyright 2002 Broadcom Corp. All Rights Reserved.
38112 + This program is free software; you can distribute it and/or modify it
38113 + under the terms of the GNU General Public License (Version 2) as
38114 + published by the Free Software Foundation.
38116 + This program is distributed in the hope it will be useful, but WITHOUT
38117 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
38118 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
38119 + for more details.
38121 + You should have received a copy of the GNU General Public License along
38122 + with this program; if not, write to the Free Software Foundation, Inc.,
38123 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
38126 +/***************************************************************************
38127 + * File Name : board.c
38129 + * Description: This file contains Linux character device driver entry
38130 + * for the board related ioctl calls: flash, get free kernel
38131 + * page and dump kernel memory, etc.
38133 + * Created on : 2/20/2002 seanl: use cfiflash.c, cfliflash.h (AMD specific)
38135 + ***************************************************************************/
38139 +#include <linux/version.h>
38140 +#include <linux/init.h>
38141 +#include <linux/fs.h>
38142 +#include <linux/interrupt.h>
38143 +#include <linux/capability.h>
38144 +#include <linux/slab.h>
38145 +#include <linux/errno.h>
38146 +#include <linux/module.h>
38147 +#include <linux/pagemap.h>
38148 +#include <asm/uaccess.h>
38149 +#include <linux/wait.h>
38150 +#include <linux/poll.h>
38151 +#include <linux/sched.h>
38152 +#include <linux/list.h>
38153 +#include <linux/if.h>
38155 +#include <bcm_map_part.h>
38156 +#include <board.h>
38157 +#include <bcmTag.h>
38158 +#include "boardparms.h"
38159 +#include "cfiflash.h"
38160 +#include "bcm_intr.h"
38161 +#include "board.h"
38162 +#include "bcm_map_part.h"
38165 +#if defined (NON_CONSECUTIVE_MAC)
38166 +// used to be the last octet. Now changed to the first 5 bits of the the forth octet
38167 +// to reduced the duplicated MAC addresses.
38168 +#define CHANGED_OCTET 3
38169 +#define SHIFT_BITS 3
38171 +#define CHANGED_OCTET 1
38172 +#define SHIFT_BITS 0
38175 +#if defined (WIRELESS)
38176 +#define SES_BTN_PRESSED 0x00000001
38177 +#define SES_EVENTS SES_BTN_PRESSED /*OR all values if any*/
38178 +#define SES_LED_OFF 0
38179 +#define SES_LED_ON 1
38180 +#define SES_LED_BLINK 2
38185 + unsigned long ulId;
38187 + char chReserved[3];
38188 +} MAC_ADDR_INFO, *PMAC_ADDR_INFO;
38192 + unsigned long ulSdramSize;
38193 + unsigned long ulPsiSize;
38194 + unsigned long ulNumMacAddrs;
38195 + unsigned long ucaBaseMacAddr[NVRAM_MAC_ADDRESS_LEN];
38196 + MAC_ADDR_INFO MacAddrs[1];
38197 +} NVRAM_INFO, *PNVRAM_INFO;
38201 + unsigned long eventmask;
38202 +} BOARD_IOC, *PBOARD_IOC;
38205 +/*Dyinggasp callback*/
38206 +typedef void (*cb_dgasp_t)(void *arg);
38207 +typedef struct _CB_DGASP__LIST
38209 + struct list_head list;
38210 + char name[IFNAMSIZ];
38211 + cb_dgasp_t cb_dgasp_fn;
38213 +}CB_DGASP_LIST , *PCB_DGASP_LIST;
38216 +static LED_MAP_PAIR LedMapping[] =
38217 +{ // led name Initial state physical pin (ledMask)
38218 + {kLedEnd, kLedStateOff, 0, 0, 0, 0},
38219 + {kLedEnd, kLedStateOff, 0, 0, 0, 0},
38220 + {kLedEnd, kLedStateOff, 0, 0, 0, 0},
38221 + {kLedEnd, kLedStateOff, 0, 0, 0, 0},
38222 + {kLedEnd, kLedStateOff, 0, 0, 0, 0},
38223 + {kLedEnd, kLedStateOff, 0, 0, 0, 0},
38224 + {kLedEnd, kLedStateOff, 0, 0, 0, 0},
38225 + {kLedEnd, kLedStateOff, 0, 0, 0, 0},
38226 + {kLedEnd, kLedStateOff, 0, 0, 0, 0} // NOTE: kLedEnd has to be at the end.
38230 +extern struct file fastcall *fget_light(unsigned int fd, int *fput_needed);
38231 +extern unsigned int nr_free_pages (void);
38232 +extern const char *get_system_type(void);
38233 +extern void kerSysFlashInit(void);
38234 +extern unsigned long get_nvram_start_addr(void);
38235 +extern unsigned long get_scratch_pad_start_addr(void);
38236 +extern unsigned long getMemorySize(void);
38237 +extern void __init boardLedInit(PLED_MAP_PAIR);
38238 +extern void boardLedCtrl(BOARD_LED_NAME, BOARD_LED_STATE);
38239 +extern void kerSysLedRegisterHandler( BOARD_LED_NAME ledName,
38240 + HANDLE_LED_FUNC ledHwFunc, int ledFailType );
38243 +void __init InitNvramInfo( void );
38244 +static int board_open( struct inode *inode, struct file *filp );
38245 +static int board_ioctl( struct inode *inode, struct file *flip, unsigned int command, unsigned long arg );
38246 +static ssize_t board_read(struct file *filp, char __user *buffer, size_t count, loff_t *ppos);
38247 +static unsigned int board_poll(struct file *filp, struct poll_table_struct *wait);
38248 +static int board_release(struct inode *inode, struct file *filp);
38250 +static BOARD_IOC* borad_ioc_alloc(void);
38251 +static void borad_ioc_free(BOARD_IOC* board_ioc);
38253 +/* DyingGasp function prototype */
38254 +static void __init kerSysDyingGaspMapIntr(void);
38255 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0))
38256 +static irqreturn_t kerSysDyingGaspIsr(int irq, void * dev_id, struct pt_regs * regs);
38258 +static unsigned int kerSysDyingGaspIsr(void);
38260 +static void __init kerSysInitDyingGaspHandler( void );
38261 +static void __exit kerSysDeinitDyingGaspHandler( void );
38262 +/* -DyingGasp function prototype - */
38265 +#if defined (WIRELESS)
38266 +static irqreturn_t sesBtn_isr(int irq, void *dev_id, struct pt_regs *ptregs);
38267 +static void __init sesBtn_mapGpio(void);
38268 +static void __init sesBtn_mapIntr(int context);
38269 +static unsigned int sesBtn_poll(struct file *file, struct poll_table_struct *wait);
38270 +static ssize_t sesBtn_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos);
38271 +static void __init sesLed_mapGpio(void);
38272 +static void sesLed_ctrl(int action);
38273 +static void __init ses_board_init(void);
38274 +static void __exit ses_board_deinit(void);
38277 +static PNVRAM_INFO g_pNvramInfo = NULL;
38278 +static int g_ledInitialized = 0;
38279 +static wait_queue_head_t g_board_wait_queue;
38280 +static CB_DGASP_LIST *g_cb_dgasp_list_head = NULL;
38282 +static int g_wakeup_monitor = 0;
38283 +static struct file *g_monitor_file = NULL;
38284 +static struct task_struct *g_monitor_task = NULL;
38285 +static unsigned int (*g_orig_fop_poll)
38286 + (struct file *, struct poll_table_struct *) = NULL;
38288 +static struct file_operations board_fops =
38290 + open: board_open,
38291 + ioctl: board_ioctl,
38292 + poll: board_poll,
38293 + read: board_read,
38294 + release: board_release,
38297 +uint32 board_major = 0;
38299 +#if defined (WIRELESS)
38300 +static unsigned short sesBtn_irq = BP_NOT_DEFINED;
38301 +static unsigned short sesBtn_gpio = BP_NOT_DEFINED;
38302 +static unsigned short sesLed_gpio = BP_NOT_DEFINED;
38305 +#if defined(MODULE)
38306 +int init_module(void)
38308 + return( brcm_board_init() );
38311 +void cleanup_module(void)
38314 + printk("brcm flash: cleanup_module failed because module is in use\n");
38316 + brcm_board_cleanup();
38322 +static int __init brcm_board_init( void )
38324 + typedef int (*BP_LED_FUNC) (unsigned short *);
38325 + static struct BpLedInformation
38327 + BOARD_LED_NAME ledName;
38328 + BP_LED_FUNC bpFunc;
38329 + BP_LED_FUNC bpFuncFail;
38331 + {{kLedAdsl, BpGetAdslLedGpio, BpGetAdslFailLedGpio},
38332 + {kLedWireless, BpGetWirelessLedGpio, NULL},
38333 + {kLedUsb, BpGetUsbLedGpio, NULL},
38334 + {kLedHpna, BpGetHpnaLedGpio, NULL},
38335 + {kLedWanData, BpGetWanDataLedGpio, NULL},
38336 + {kLedPPP, BpGetPppLedGpio, BpGetPppFailLedGpio},
38337 + {kLedVoip, BpGetVoipLedGpio, NULL},
38338 + {kLedSes, BpGetWirelessSesLedGpio, NULL},
38339 + {kLedEnd, NULL, NULL}
38344 + ret = register_chrdev(BOARD_DRV_MAJOR, "bcrmboard", &board_fops );
38346 + printk( "brcm_board_init(major %d): fail to register device.\n",BOARD_DRV_MAJOR);
38349 + PLED_MAP_PAIR pLedMap = LedMapping;
38350 + unsigned short gpio;
38351 + struct BpLedInformation *pInfo;
38353 + printk("brcmboard: brcm_board_init entry\n");
38354 + board_major = BOARD_DRV_MAJOR;
38357 + for( pInfo = bpLedInfo; pInfo->ledName != kLedEnd; pInfo++ )
38359 + if( pInfo->bpFunc && (*pInfo->bpFunc) (&gpio) == BP_SUCCESS )
38361 + pLedMap->ledName = pInfo->ledName;
38362 + pLedMap->ledMask = GPIO_NUM_TO_MASK(gpio);
38363 + pLedMap->ledActiveLow = (gpio & BP_ACTIVE_LOW) ? 1 : 0;
38365 + if( pInfo->bpFuncFail && (*pInfo->bpFuncFail) (&gpio) == BP_SUCCESS )
38367 + pLedMap->ledName = pInfo->ledName;
38368 + pLedMap->ledMaskFail = GPIO_NUM_TO_MASK(gpio);
38369 + pLedMap->ledActiveLowFail = (gpio & BP_ACTIVE_LOW) ? 1 : 0;
38371 + if( pLedMap->ledName != kLedEnd )
38375 + init_waitqueue_head(&g_board_wait_queue);
38376 +#if defined (WIRELESS)
38377 + ses_board_init();
38379 + kerSysInitDyingGaspHandler();
38380 + kerSysDyingGaspMapIntr();
38382 + boardLedInit(LedMapping);
38383 + g_ledInitialized = 1;
38389 +void __init InitNvramInfo( void )
38391 + PNVRAM_DATA pNvramData = (PNVRAM_DATA) get_nvram_start_addr();
38392 + unsigned long ulNumMacAddrs = pNvramData->ulNumMacAddrs;
38394 + if( ulNumMacAddrs > 0 && ulNumMacAddrs <= NVRAM_MAC_COUNT_MAX )
38396 + unsigned long ulNvramInfoSize =
38397 + sizeof(NVRAM_INFO) + ((sizeof(MAC_ADDR_INFO) - 1) * ulNumMacAddrs);
38399 + g_pNvramInfo = (PNVRAM_INFO) kmalloc( ulNvramInfoSize, GFP_KERNEL );
38401 + if( g_pNvramInfo )
38403 + unsigned long ulPsiSize;
38404 + if( BpGetPsiSize( &ulPsiSize ) != BP_SUCCESS )
38405 + ulPsiSize = NVRAM_PSI_DEFAULT;
38406 + memset( g_pNvramInfo, 0x00, ulNvramInfoSize );
38407 + g_pNvramInfo->ulPsiSize = ulPsiSize * 1024;
38408 + g_pNvramInfo->ulNumMacAddrs = pNvramData->ulNumMacAddrs;
38409 + memcpy( g_pNvramInfo->ucaBaseMacAddr, pNvramData->ucaBaseMacAddr,
38410 + NVRAM_MAC_ADDRESS_LEN );
38411 + g_pNvramInfo->ulSdramSize = getMemorySize();
38414 + printk("ERROR - Could not allocate memory for NVRAM data\n");
38417 + printk("ERROR - Invalid number of MAC addresses (%ld) is configured.\n",
38421 +void __exit brcm_board_cleanup( void )
38423 + printk("brcm_board_cleanup()\n");
38425 + if (board_major != -1)
38427 +#if defined (WIRELESS)
38428 + ses_board_deinit();
38430 + kerSysDeinitDyingGaspHandler();
38431 + unregister_chrdev(board_major, "board_ioctl");
38435 +static BOARD_IOC* borad_ioc_alloc(void)
38437 + BOARD_IOC *board_ioc =NULL;
38438 + board_ioc = (BOARD_IOC*) kmalloc( sizeof(BOARD_IOC) , GFP_KERNEL );
38441 + memset(board_ioc, 0, sizeof(BOARD_IOC));
38443 + return board_ioc;
38446 +static void borad_ioc_free(BOARD_IOC* board_ioc)
38450 + kfree(board_ioc);
38455 +static int board_open( struct inode *inode, struct file *filp )
38457 + filp->private_data = borad_ioc_alloc();
38459 + if (filp->private_data == NULL)
38465 +static int board_release(struct inode *inode, struct file *filp)
38467 + BOARD_IOC *board_ioc = filp->private_data;
38469 + wait_event_interruptible(g_board_wait_queue, 1);
38470 + borad_ioc_free(board_ioc);
38476 +static unsigned int board_poll(struct file *filp, struct poll_table_struct *wait)
38478 + unsigned int mask = 0;
38479 +#if defined (WIRELESS)
38480 + BOARD_IOC *board_ioc = filp->private_data;
38483 + poll_wait(filp, &g_board_wait_queue, wait);
38484 +#if defined (WIRELESS)
38485 + if(board_ioc->eventmask & SES_EVENTS){
38486 + mask |= sesBtn_poll(filp, wait);
38494 +static ssize_t board_read(struct file *filp, char __user *buffer, size_t count, loff_t *ppos)
38496 +#if defined (WIRELESS)
38497 + BOARD_IOC *board_ioc = filp->private_data;
38498 + if(board_ioc->eventmask & SES_EVENTS){
38499 + return sesBtn_read(filp, buffer, count, ppos);
38505 +//**************************************************************************************
38506 +// Utitlities for dump memory, free kernel pages, mips soft reset, etc.
38507 +//**************************************************************************************
38509 +/***********************************************************************
38510 + * Function Name: dumpaddr
38511 + * Description : Display a hex dump of the specified address.
38512 + ***********************************************************************/
38513 +void dumpaddr( unsigned char *pAddr, int nLen )
38515 + static char szHexChars[] = "0123456789abcdef";
38517 + char *p = szLine;
38518 + unsigned char ch, *q;
38520 + unsigned long ul;
38522 + while( nLen > 0 )
38524 + sprintf( szLine, "%8.8lx: ", (unsigned long) pAddr );
38525 + p = szLine + strlen(szLine);
38527 + for(i = 0; i < 16 && nLen > 0; i += sizeof(long), nLen -= sizeof(long))
38529 + ul = *(unsigned long *) &pAddr[i];
38530 + q = (unsigned char *) &ul;
38531 + for( j = 0; j < sizeof(long); j++ )
38533 + *p++ = szHexChars[q[j] >> 4];
38534 + *p++ = szHexChars[q[j] & 0x0f];
38539 + for( j = 0; j < 16 - i; j++ )
38540 + *p++ = ' ', *p++ = ' ', *p++ = ' ';
38542 + *p++ = ' ', *p++ = ' ', *p++ = ' ';
38544 + for( j = 0; j < i; j++ )
38547 + *p++ = (ch > ' ' && ch < '~') ? ch : '.';
38551 + printk( "%s\r\n", szLine );
38555 + printk( "\r\n" );
38559 +void kerSysMipsSoftReset(void)
38561 +#if defined(CONFIG_BCM96348)
38562 + if (PERF->RevID == 0x634800A1) {
38563 + typedef void (*FNPTR) (void);
38564 + FNPTR bootaddr = (FNPTR) FLASH_BASE;
38567 + /* Disable interrupts. */
38570 + /* Reset all blocks. */
38571 + PERF->BlockSoftReset &= ~BSR_ALL_BLOCKS;
38572 + for( i = 0; i < 1000000; i++ )
38574 + PERF->BlockSoftReset |= BSR_ALL_BLOCKS;
38575 + /* Jump to the power on address. */
38579 + PERF->pll_control |= SOFT_RESET; // soft reset mips
38581 + PERF->pll_control |= SOFT_RESET; // soft reset mips
38586 +int kerSysGetMacAddress( unsigned char *pucaMacAddr, unsigned long ulId )
38589 + PMAC_ADDR_INFO pMai = NULL;
38590 + PMAC_ADDR_INFO pMaiFreeNoId = NULL;
38591 + PMAC_ADDR_INFO pMaiFreeId = NULL;
38592 + unsigned long i = 0, ulIdxNoId = 0, ulIdxId = 0, shiftedIdx = 0;
38594 + for( i = 0, pMai = g_pNvramInfo->MacAddrs; i < g_pNvramInfo->ulNumMacAddrs;
38597 + if( ulId == pMai->ulId || ulId == MAC_ADDRESS_ANY )
38599 + /* This MAC address has been used by the caller in the past. */
38600 + memcpy( pucaMacAddr, g_pNvramInfo->ucaBaseMacAddr,
38601 + NVRAM_MAC_ADDRESS_LEN );
38603 + pucaMacAddr[NVRAM_MAC_ADDRESS_LEN - CHANGED_OCTET] += (shiftedIdx << SHIFT_BITS);
38604 + pMai->chInUse = 1;
38605 + pMaiFreeNoId = pMaiFreeId = NULL;
38609 + if( pMai->chInUse == 0 )
38611 + if( pMai->ulId == 0 && pMaiFreeNoId == NULL )
38613 + /* This is an available MAC address that has never been
38616 + pMaiFreeNoId = pMai;
38620 + if( pMai->ulId != 0 && pMaiFreeId == NULL )
38622 + /* This is an available MAC address that has been used
38623 + * before. Use addresses that have never been used
38624 + * first, before using this one.
38626 + pMaiFreeId = pMai;
38632 + if( pMaiFreeNoId || pMaiFreeId )
38634 + /* An available MAC address was found. */
38635 + memcpy(pucaMacAddr, g_pNvramInfo->ucaBaseMacAddr,NVRAM_MAC_ADDRESS_LEN);
38636 + if( pMaiFreeNoId )
38638 + shiftedIdx = ulIdxNoId;
38639 + pucaMacAddr[NVRAM_MAC_ADDRESS_LEN - CHANGED_OCTET] += (shiftedIdx << SHIFT_BITS);
38640 + pMaiFreeNoId->ulId = ulId;
38641 + pMaiFreeNoId->chInUse = 1;
38645 + shiftedIdx = ulIdxId;
38646 + pucaMacAddr[NVRAM_MAC_ADDRESS_LEN - CHANGED_OCTET] += (shiftedIdx << SHIFT_BITS);
38647 + pMaiFreeId->ulId = ulId;
38648 + pMaiFreeId->chInUse = 1;
38652 + if( i == g_pNvramInfo->ulNumMacAddrs )
38653 + nRet = -EADDRNOTAVAIL;
38656 +} /* kerSysGetMacAddr */
38658 +int kerSysReleaseMacAddress( unsigned char *pucaMacAddr )
38660 + int nRet = -EINVAL;
38661 + unsigned long ulIdx = 0;
38662 + int idx = (pucaMacAddr[NVRAM_MAC_ADDRESS_LEN - CHANGED_OCTET] -
38663 + g_pNvramInfo->ucaBaseMacAddr[NVRAM_MAC_ADDRESS_LEN - CHANGED_OCTET]);
38665 + // if overflow 255 (negitive), add 256 to have the correct index
38668 + ulIdx = (unsigned long) (idx >> SHIFT_BITS);
38670 + if( ulIdx < g_pNvramInfo->ulNumMacAddrs )
38672 + PMAC_ADDR_INFO pMai = &g_pNvramInfo->MacAddrs[ulIdx];
38673 + if( pMai->chInUse == 1 )
38675 + pMai->chInUse = 0;
38681 +} /* kerSysReleaseMacAddr */
38683 +int kerSysGetSdramSize( void )
38685 + return( (int) g_pNvramInfo->ulSdramSize );
38686 +} /* kerSysGetSdramSize */
38689 +void kerSysLedCtrl(BOARD_LED_NAME ledName, BOARD_LED_STATE ledState)
38691 + if (g_ledInitialized)
38692 + boardLedCtrl(ledName, ledState);
38695 +unsigned int kerSysMonitorPollHook( struct file *f, struct poll_table_struct *t)
38697 + int mask = (*g_orig_fop_poll) (f, t);
38699 + if( g_wakeup_monitor == 1 && g_monitor_file == f )
38701 + /* If g_wakeup_monitor is non-0, the user mode application needs to
38702 + * return from a blocking select function. Return POLLPRI which will
38703 + * cause the select to return with the exception descriptor set.
38706 + g_wakeup_monitor = 0;
38712 +/* Put the user mode application that monitors link state on a run queue. */
38713 +void kerSysWakeupMonitorTask( void )
38715 + g_wakeup_monitor = 1;
38716 + if( g_monitor_task )
38717 + wake_up_process( g_monitor_task );
38720 +//********************************************************************************************
38721 +// misc. ioctl calls come to here. (flash, led, reset, kernel memory access, etc.)
38722 +//********************************************************************************************
38723 +static int board_ioctl( struct inode *inode, struct file *flip,
38724 + unsigned int command, unsigned long arg )
38727 + BOARD_IOCTL_PARMS ctrlParms;
38728 + unsigned char ucaMacAddr[NVRAM_MAC_ADDRESS_LEN];
38733 + case BOARD_IOCTL_FLASH_INIT:
38734 + // not used for now. kerSysBcmImageInit();
38738 + case BOARD_IOCTL_FLASH_WRITE:
38739 + if (copy_from_user((void*)&ctrlParms, (void*)arg, sizeof(ctrlParms)) == 0)
38741 + NVRAM_DATA SaveNvramData;
38742 + PNVRAM_DATA pNvramData = (PNVRAM_DATA) get_nvram_start_addr();
38744 + switch (ctrlParms.action)
38746 + case SCRATCH_PAD:
38747 + ret = kerSysScratchPadSet(ctrlParms.string, ctrlParms.buf, ctrlParms.offset);
38751 + ret = kerSysPersistentSet(ctrlParms.string, ctrlParms.strLen, ctrlParms.offset);
38755 + ret = kerSysNvRamSet(ctrlParms.string, ctrlParms.strLen, ctrlParms.offset);
38758 + case BCM_IMAGE_CFE:
38759 + if( ctrlParms.strLen <= 0 || ctrlParms.strLen > FLASH45_LENGTH_BOOT_ROM )
38761 + printk("Illegal CFE size [%d]. Size allowed: [%d]\n",
38762 + ctrlParms.strLen, FLASH45_LENGTH_BOOT_ROM);
38767 + // save NVRAM data into a local structure
38768 + memcpy( &SaveNvramData, pNvramData, sizeof(NVRAM_DATA) );
38770 + // set memory type field
38771 + BpGetSdramSize( (unsigned long *) &ctrlParms.string[SDRAM_TYPE_ADDRESS_OFFSET] );
38773 + ret = kerSysBcmImageSet(ctrlParms.offset, ctrlParms.string, ctrlParms.strLen);
38775 + // if nvram is not valid, restore the current nvram settings
38776 + if( BpSetBoardId( pNvramData->szBoardId ) != BP_SUCCESS &&
38777 + *(unsigned long *) pNvramData == NVRAM_DATA_ID )
38779 + kerSysNvRamSet((char *) &SaveNvramData, sizeof(SaveNvramData), 0);
38783 + case BCM_IMAGE_FS:
38784 + allowedSize = (int) flash_get_total_size() - \
38785 + FLASH_RESERVED_AT_END - TAG_LEN - FLASH45_LENGTH_BOOT_ROM;
38786 + if( ctrlParms.strLen <= 0 || ctrlParms.strLen > allowedSize)
38788 + printk("Illegal root file system size [%d]. Size allowed: [%d]\n",
38789 + ctrlParms.strLen, allowedSize);
38793 + ret = kerSysBcmImageSet(ctrlParms.offset, ctrlParms.string, ctrlParms.strLen);
38794 + kerSysMipsSoftReset();
38797 + case BCM_IMAGE_KERNEL: // not used for now.
38799 + case BCM_IMAGE_WHOLE:
38800 + if(ctrlParms.strLen <= 0)
38802 + printk("Illegal flash image size [%d].\n", ctrlParms.strLen);
38807 + // save NVRAM data into a local structure
38808 + memcpy( &SaveNvramData, pNvramData, sizeof(NVRAM_DATA) );
38810 + ret = kerSysBcmImageSet(ctrlParms.offset, ctrlParms.string, ctrlParms.strLen);
38812 + // if nvram is not valid, restore the current nvram settings
38813 + if( BpSetBoardId( pNvramData->szBoardId ) != BP_SUCCESS &&
38814 + *(unsigned long *) pNvramData == NVRAM_DATA_ID )
38816 + kerSysNvRamSet((char *) &SaveNvramData, sizeof(SaveNvramData), 0);
38819 + kerSysMipsSoftReset();
38824 + printk("flash_ioctl_command: invalid command %d\n", ctrlParms.action);
38827 + ctrlParms.result = ret;
38828 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms, sizeof(BOARD_IOCTL_PARMS));
38834 + case BOARD_IOCTL_FLASH_READ:
38835 + if (copy_from_user((void*)&ctrlParms, (void*)arg, sizeof(ctrlParms)) == 0)
38837 + switch (ctrlParms.action)
38839 + case SCRATCH_PAD:
38840 + ret = kerSysScratchPadGet(ctrlParms.string, ctrlParms.buf, ctrlParms.offset);
38844 + ret = kerSysPersistentGet(ctrlParms.string, ctrlParms.strLen, ctrlParms.offset);
38848 + ret = kerSysNvRamGet(ctrlParms.string, ctrlParms.strLen, ctrlParms.offset);
38852 + ret = kerSysFlashSizeGet();
38857 + printk("Not supported. invalid command %d\n", ctrlParms.action);
38860 + ctrlParms.result = ret;
38861 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms, sizeof(BOARD_IOCTL_PARMS));
38867 + case BOARD_IOCTL_GET_NR_PAGES:
38868 + ctrlParms.result = nr_free_pages() + get_page_cache_size();
38869 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms, sizeof(BOARD_IOCTL_PARMS));
38873 + case BOARD_IOCTL_DUMP_ADDR:
38874 + if (copy_from_user((void*)&ctrlParms, (void*)arg, sizeof(ctrlParms)) == 0)
38876 + dumpaddr( (unsigned char *) ctrlParms.string, ctrlParms.strLen );
38877 + ctrlParms.result = 0;
38878 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms, sizeof(BOARD_IOCTL_PARMS));
38885 + case BOARD_IOCTL_SET_MEMORY:
38886 + if (copy_from_user((void*)&ctrlParms, (void*)arg, sizeof(ctrlParms)) == 0)
38888 + unsigned long *pul = (unsigned long *) ctrlParms.string;
38889 + unsigned short *pus = (unsigned short *) ctrlParms.string;
38890 + unsigned char *puc = (unsigned char *) ctrlParms.string;
38891 + switch( ctrlParms.strLen )
38894 + *pul = (unsigned long) ctrlParms.offset;
38897 + *pus = (unsigned short) ctrlParms.offset;
38900 + *puc = (unsigned char) ctrlParms.offset;
38903 + dumpaddr( (unsigned char *) ctrlParms.string, sizeof(long) );
38904 + ctrlParms.result = 0;
38905 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms, sizeof(BOARD_IOCTL_PARMS));
38912 + case BOARD_IOCTL_MIPS_SOFT_RESET:
38913 + kerSysMipsSoftReset();
38916 + case BOARD_IOCTL_LED_CTRL:
38917 + if (copy_from_user((void*)&ctrlParms, (void*)arg, sizeof(ctrlParms)) == 0)
38919 + kerSysLedCtrl((BOARD_LED_NAME)ctrlParms.strLen, (BOARD_LED_STATE)ctrlParms.offset);
38924 + case BOARD_IOCTL_GET_ID:
38925 + if (copy_from_user((void*)&ctrlParms, (void*)arg,
38926 + sizeof(ctrlParms)) == 0)
38928 + if( ctrlParms.string )
38930 + char *p = (char *) get_system_type();
38931 + if( strlen(p) + 1 < ctrlParms.strLen )
38932 + ctrlParms.strLen = strlen(p) + 1;
38933 + __copy_to_user(ctrlParms.string, p, ctrlParms.strLen);
38936 + ctrlParms.result = 0;
38937 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms,
38938 + sizeof(BOARD_IOCTL_PARMS));
38942 + case BOARD_IOCTL_GET_MAC_ADDRESS:
38943 + if (copy_from_user((void*)&ctrlParms, (void*)arg, sizeof(ctrlParms)) == 0)
38945 + ctrlParms.result = kerSysGetMacAddress( ucaMacAddr,
38946 + ctrlParms.offset );
38948 + if( ctrlParms.result == 0 )
38950 + __copy_to_user(ctrlParms.string, ucaMacAddr,
38951 + sizeof(ucaMacAddr));
38954 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms,
38955 + sizeof(BOARD_IOCTL_PARMS));
38962 + case BOARD_IOCTL_RELEASE_MAC_ADDRESS:
38963 + if (copy_from_user((void*)&ctrlParms, (void*)arg, sizeof(ctrlParms)) == 0)
38965 + if (copy_from_user((void*)ucaMacAddr, (void*)ctrlParms.string, \
38966 + NVRAM_MAC_ADDRESS_LEN) == 0)
38968 + ctrlParms.result = kerSysReleaseMacAddress( ucaMacAddr );
38972 + ctrlParms.result = -EACCES;
38975 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms,
38976 + sizeof(BOARD_IOCTL_PARMS));
38983 + case BOARD_IOCTL_GET_PSI_SIZE:
38984 + ctrlParms.result = (int) g_pNvramInfo->ulPsiSize;
38985 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms, sizeof(BOARD_IOCTL_PARMS));
38989 + case BOARD_IOCTL_GET_SDRAM_SIZE:
38990 + ctrlParms.result = (int) g_pNvramInfo->ulSdramSize;
38991 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms, sizeof(BOARD_IOCTL_PARMS));
38995 + case BOARD_IOCTL_GET_BASE_MAC_ADDRESS:
38996 + if (copy_from_user((void*)&ctrlParms, (void*)arg, sizeof(ctrlParms)) == 0)
38998 + __copy_to_user(ctrlParms.string, g_pNvramInfo->ucaBaseMacAddr, NVRAM_MAC_ADDRESS_LEN);
38999 + ctrlParms.result = 0;
39001 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms,
39002 + sizeof(BOARD_IOCTL_PARMS));
39009 + case BOARD_IOCTL_GET_CHIP_ID:
39010 + ctrlParms.result = (int) (PERF->RevID & 0xFFFF0000) >> 16;
39011 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms, sizeof(BOARD_IOCTL_PARMS));
39015 + case BOARD_IOCTL_GET_NUM_ENET: {
39016 + ETHERNET_MAC_INFO EnetInfos[BP_MAX_ENET_MACS];
39017 + int i, numeth = 0;
39018 + if (BpGetEthernetMacInfo(EnetInfos, BP_MAX_ENET_MACS) == BP_SUCCESS) {
39019 + for( i = 0; i < BP_MAX_ENET_MACS; i++) {
39020 + if (EnetInfos[i].ucPhyType != BP_ENET_NO_PHY) {
39024 + ctrlParms.result = numeth;
39025 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms, sizeof(BOARD_IOCTL_PARMS));
39034 + case BOARD_IOCTL_GET_CFE_VER:
39035 + if (copy_from_user((void*)&ctrlParms, (void*)arg, sizeof(ctrlParms)) == 0) {
39036 + char *vertag = (char *)(FLASH_BASE + CFE_VERSION_OFFSET);
39037 + if (ctrlParms.strLen < CFE_VERSION_SIZE) {
39038 + ctrlParms.result = 0;
39039 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms, sizeof(BOARD_IOCTL_PARMS));
39042 + else if (strncmp(vertag, "cfe-v", 5)) { // no tag info in flash
39043 + ctrlParms.result = 0;
39044 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms, sizeof(BOARD_IOCTL_PARMS));
39048 + ctrlParms.result = 1;
39049 + __copy_to_user(ctrlParms.string, vertag+CFE_VERSION_MARK_SIZE, CFE_VERSION_SIZE);
39050 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms, sizeof(BOARD_IOCTL_PARMS));
39059 + case BOARD_IOCTL_GET_ENET_CFG:
39060 + if (copy_from_user((void*)&ctrlParms, (void*)arg, sizeof(ctrlParms)) == 0) {
39061 + ETHERNET_MAC_INFO EnetInfos[BP_MAX_ENET_MACS];
39062 + if (BpGetEthernetMacInfo(EnetInfos, BP_MAX_ENET_MACS) == BP_SUCCESS) {
39063 + if (ctrlParms.strLen == sizeof(EnetInfos)) {
39064 + __copy_to_user(ctrlParms.string, EnetInfos, sizeof(EnetInfos));
39065 + ctrlParms.result = 0;
39066 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms, sizeof(BOARD_IOCTL_PARMS));
39081 +#if defined (WIRELESS)
39082 + case BOARD_IOCTL_GET_WLAN_ANT_INUSE:
39083 + if (copy_from_user((void*)&ctrlParms, (void*)arg, sizeof(ctrlParms)) == 0) {
39084 + unsigned short antInUse = 0;
39085 + if (BpGetWirelessAntInUse(&antInUse) == BP_SUCCESS) {
39086 + if (ctrlParms.strLen == sizeof(antInUse)) {
39087 + __copy_to_user(ctrlParms.string, &antInUse, sizeof(antInUse));
39088 + ctrlParms.result = 0;
39089 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms, sizeof(BOARD_IOCTL_PARMS));
39104 + case BOARD_IOCTL_SET_TRIGGER_EVENT:
39105 + if (copy_from_user((void*)&ctrlParms, (void*)arg, sizeof(ctrlParms)) == 0) {
39106 + BOARD_IOC *board_ioc = (BOARD_IOC *)flip->private_data;
39107 + ctrlParms.result = -EFAULT;
39109 + if (ctrlParms.strLen == sizeof(unsigned long)) {
39110 + board_ioc->eventmask |= *((int*)ctrlParms.string);
39111 +#if defined (WIRELESS)
39112 + if((board_ioc->eventmask & SES_EVENTS)) {
39113 + if(sesBtn_irq != BP_NOT_DEFINED) {
39114 + BcmHalInterruptEnable(sesBtn_irq);
39115 + ctrlParms.result = 0;
39120 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms, sizeof(BOARD_IOCTL_PARMS));
39129 + case BOARD_IOCTL_GET_TRIGGER_EVENT:
39130 + if (copy_from_user((void*)&ctrlParms, (void*)arg, sizeof(ctrlParms)) == 0) {
39131 + BOARD_IOC *board_ioc = (BOARD_IOC *)flip->private_data;
39132 + if (ctrlParms.strLen == sizeof(unsigned long)) {
39133 + __copy_to_user(ctrlParms.string, &board_ioc->eventmask, sizeof(unsigned long));
39134 + ctrlParms.result = 0;
39135 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms, sizeof(BOARD_IOCTL_PARMS));
39147 + case BOARD_IOCTL_UNSET_TRIGGER_EVENT:
39148 + if (copy_from_user((void*)&ctrlParms, (void*)arg, sizeof(ctrlParms)) == 0) {
39149 + if (ctrlParms.strLen == sizeof(unsigned long)) {
39150 + BOARD_IOC *board_ioc = (BOARD_IOC *)flip->private_data;
39151 + board_ioc->eventmask &= (~(*((int*)ctrlParms.string)));
39152 + ctrlParms.result = 0;
39153 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms, sizeof(BOARD_IOCTL_PARMS));
39164 +#if defined (WIRELESS)
39165 + case BOARD_IOCTL_SET_SES_LED:
39166 + if (copy_from_user((void*)&ctrlParms, (void*)arg, sizeof(ctrlParms)) == 0) {
39167 + if (ctrlParms.strLen == sizeof(int)) {
39168 + sesLed_ctrl(*(int*)ctrlParms.string);
39169 + ctrlParms.result = 0;
39170 + __copy_to_user((BOARD_IOCTL_PARMS*)arg, &ctrlParms, sizeof(BOARD_IOCTL_PARMS));
39183 + case BOARD_IOCTL_SET_MONITOR_FD:
39184 + if (copy_from_user((void*)&ctrlParms, (void*)arg, sizeof(ctrlParms)) == 0) {
39185 + int fput_needed = 0;
39187 + g_monitor_file = fget_light( ctrlParms.offset, &fput_needed );
39188 + if( g_monitor_file ) {
39189 + /* Hook this file descriptor's poll function in order to set
39190 + * the exception descriptor when there is a change in link
39193 + g_monitor_task = current;
39194 + g_orig_fop_poll = g_monitor_file->f_op->poll;
39195 + g_monitor_file->f_op->poll = kerSysMonitorPollHook;
39200 + case BOARD_IOCTL_WAKEUP_MONITOR_TASK:
39201 + kerSysWakeupMonitorTask();
39206 + ctrlParms.result = 0;
39207 + printk("board_ioctl: invalid command %x, cmd %d .\n",command,_IOC_NR(command));
39214 +} /* board_ioctl */
39216 +/***************************************************************************
39217 + * SES Button ISR/GPIO/LED functions.
39218 + ***************************************************************************/
39219 +#if defined (WIRELESS)
39220 +static irqreturn_t sesBtn_isr(int irq, void *dev_id, struct pt_regs *ptregs)
39222 +#if defined(_BCM96338_) || defined(CONFIG_BCM96338)
39223 + unsigned long gpio_mask = GPIO_NUM_TO_MASK(sesBtn_gpio);
39224 + volatile unsigned long *gpio_reg = &GPIO->GPIOio;
39226 +#if defined(_BCM96345_) || defined(CONFIG_BCM96345)
39227 + unsigned short gpio_mask = GPIO_NUM_TO_MASK(sesBtn_gpio);
39228 + volatile unsigned short *gpio_reg = &GPIO->GPIOio;
39230 +#if defined(_BCM96348_) || defined (CONFIG_BCM96348)
39231 + unsigned long gpio_mask = GPIO_NUM_TO_MASK(sesBtn_gpio);
39232 + volatile unsigned long *gpio_reg = &GPIO->GPIOio;
39234 + if( (sesBtn_gpio & ~BP_ACTIVE_MASK) >= 32 )
39236 + gpio_mask = GPIO_NUM_TO_MASK_HIGH(sesBtn_gpio);
39237 + gpio_reg = &GPIO->GPIOio_high;
39241 + if (!(*gpio_reg & gpio_mask)){
39242 + wake_up_interruptible(&g_board_wait_queue);
39243 + return IRQ_RETVAL(1);
39245 + return IRQ_RETVAL(0);
39249 +static void __init sesBtn_mapGpio()
39251 + if( BpGetWirelessSesBtnGpio(&sesBtn_gpio) == BP_SUCCESS )
39253 + printk("SES: Button GPIO 0x%x is enabled\n", sesBtn_gpio);
39257 +static void __init sesBtn_mapIntr(int context)
39259 + if( BpGetWirelessSesExtIntr(&sesBtn_irq) == BP_SUCCESS )
39261 + printk("SES: Button Interrupt 0x%x is enabled\n", sesBtn_irq);
39266 + sesBtn_irq += INTERRUPT_ID_EXTERNAL_0;
39268 + if (BcmHalMapInterrupt((FN_HANDLER)sesBtn_isr, context, sesBtn_irq)) {
39269 + printk("SES: Interrupt mapping failed\n");
39271 + BcmHalInterruptEnable(sesBtn_irq);
39275 +static unsigned int sesBtn_poll(struct file *file, struct poll_table_struct *wait)
39277 +#if defined(_BCM96338_) || defined(CONFIG_BCM96338)
39278 + unsigned long gpio_mask = GPIO_NUM_TO_MASK(sesBtn_gpio);
39279 + volatile unsigned long *gpio_reg = &GPIO->GPIOio;
39281 +#if defined(_BCM96345_) || defined(CONFIG_BCM96345)
39282 + unsigned short gpio_mask = GPIO_NUM_TO_MASK(sesBtn_gpio);
39283 + volatile unsigned short *gpio_reg = &GPIO->GPIOio;
39285 +#if defined(_BCM96348_) || defined (CONFIG_BCM96348)
39286 + unsigned long gpio_mask = GPIO_NUM_TO_MASK(sesBtn_gpio);
39287 + volatile unsigned long *gpio_reg = &GPIO->GPIOio;
39289 + if( (sesBtn_gpio & ~BP_ACTIVE_MASK) >= 32 )
39291 + gpio_mask = GPIO_NUM_TO_MASK_HIGH(sesBtn_gpio);
39292 + gpio_reg = &GPIO->GPIOio_high;
39296 + if (!(*gpio_reg & gpio_mask)){
39302 +static ssize_t sesBtn_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos)
39304 + volatile unsigned int event=0;
39307 +#if defined(_BCM96338_) || defined (CONFIG_BCM96338)
39308 + unsigned long gpio_mask = GPIO_NUM_TO_MASK(sesBtn_gpio);
39309 + volatile unsigned long *gpio_reg = &GPIO->GPIOio;
39311 +#if defined(_BCM96345_) || defined (CONFIG_BCM96345)
39312 + unsigned short gpio_mask = GPIO_NUM_TO_MASK(sesBtn_gpio);
39313 + volatile unsigned short *gpio_reg = &GPIO->GPIOio;
39315 +#if defined(_BCM96348_) || defined (CONFIG_BCM96348)
39316 + unsigned long gpio_mask = GPIO_NUM_TO_MASK(sesBtn_gpio);
39317 + volatile unsigned long *gpio_reg = &GPIO->GPIOio;
39319 + if( (sesBtn_gpio & ~BP_ACTIVE_MASK) >= 32 )
39321 + gpio_mask = GPIO_NUM_TO_MASK_HIGH(sesBtn_gpio);
39322 + gpio_reg = &GPIO->GPIOio_high;
39326 + if(*gpio_reg & gpio_mask){
39327 + BcmHalInterruptEnable(sesBtn_irq);
39330 + event = SES_EVENTS;
39331 + __copy_to_user((char*)buffer, (char*)&event, sizeof(event));
39332 + BcmHalInterruptEnable(sesBtn_irq);
39333 + count -= sizeof(event);
39334 + buffer += sizeof(event);
39335 + ret += sizeof(event);
39339 +static void __init sesLed_mapGpio()
39341 + if( BpGetWirelessSesBtnGpio(&sesLed_gpio) == BP_SUCCESS )
39343 + printk("SES: LED GPIO 0x%x is enabled\n", sesBtn_gpio);
39347 +static void sesLed_ctrl(int action)
39350 + //char status = ((action >> 8) & 0xff); /* extract status */
39351 + //char event = ((action >> 16) & 0xff); /* extract event */
39352 + //char blinktype = ((action >> 24) & 0xff); /* extract blink type for SES_LED_BLINK */
39354 + BOARD_LED_STATE led;
39356 + if(sesLed_gpio == BP_NOT_DEFINED)
39359 + action &= 0xff; /* extract led */
39361 + //printk("blinktype=%d, event=%d, status=%d\n",(int)blinktype, (int)event, (int)status);
39366 + //printk("SES: led on\n");
39367 + led = kLedStateOn;
39369 + case SES_LED_BLINK:
39370 + //printk("SES: led blink\n");
39371 + led = kLedStateSlowBlinkContinues;
39373 + case SES_LED_OFF:
39375 + //printk("SES: led off\n");
39376 + led = kLedStateOff;
39379 + kerSysLedCtrl(kLedSes, led);
39382 +static void __init ses_board_init()
39384 + sesBtn_mapGpio();
39385 + sesBtn_mapIntr(0);
39386 + sesLed_mapGpio();
39388 +static void __exit ses_board_deinit()
39391 + BcmHalInterruptDisable(sesBtn_irq);
39395 +/***************************************************************************
39396 + * Dying gasp ISR and functions.
39397 + ***************************************************************************/
39398 +#define KERSYS_DBG printk
39400 +#if defined(CONFIG_BCM96345)
39401 +#define CYCLE_PER_US 70
39402 +#elif defined(CONFIG_BCM96348) || defined(CONFIG_BCM96338)
39403 +/* The BCM6348 cycles per microsecond is really variable since the BCM6348
39404 + * MIPS speed can vary depending on the PLL settings. However, an appoximate
39405 + * value of 120 will still work OK for the test being done.
39407 +#define CYCLE_PER_US 120
39409 +#define DG_GLITCH_TO (100*CYCLE_PER_US)
39411 +static void __init kerSysDyingGaspMapIntr()
39413 + unsigned long ulIntr;
39415 +#if defined(CONFIG_BCM96348) || defined(_BCM96348_) || defined(CONFIG_BCM96338) || defined(_BCM96338_)
39416 + if( BpGetAdslDyingGaspExtIntr( &ulIntr ) == BP_SUCCESS ) {
39417 + BcmHalMapInterrupt((FN_HANDLER)kerSysDyingGaspIsr, 0, INTERRUPT_ID_DG);
39418 + BcmHalInterruptEnable( INTERRUPT_ID_DG );
39420 +#elif defined(CONFIG_BCM96345) || defined(_BCM96345_)
39421 + if( BpGetAdslDyingGaspExtIntr( &ulIntr ) == BP_SUCCESS ) {
39422 + ulIntr += INTERRUPT_ID_EXTERNAL_0;
39423 + BcmHalMapInterrupt((FN_HANDLER)kerSysDyingGaspIsr, 0, ulIntr);
39424 + BcmHalInterruptEnable( ulIntr );
39430 +void kerSysSetWdTimer(ulong timeUs)
39432 + TIMER->WatchDogDefCount = timeUs * (FPERIPH/1000000);
39433 + TIMER->WatchDogCtl = 0xFF00;
39434 + TIMER->WatchDogCtl = 0x00FF;
39437 +ulong kerSysGetCycleCount(void)
39443 + __asm volatile("mfc0 %0, $9":"=d"(cnt));
39448 +static Bool kerSysDyingGaspCheckPowerLoss(void)
39454 + clk0 = kerSysGetCycleCount();
39456 + UART->Data = 'D';
39457 + UART->Data = '%';
39458 + UART->Data = 'G';
39460 +#if defined(CONFIG_BCM96345)
39461 + BpGetAdslDyingGaspExtIntr( &ulIntr );
39466 + clk1 = kerSysGetCycleCount(); /* time cleared */
39467 + /* wait a little to get new reading */
39468 + while ((kerSysGetCycleCount()-clk1) < CYCLE_PER_US*2)
39470 + } while ((0 == (PERF->ExtIrqCfg & (1 << (ulIntr + EI_STATUS_SHFT)))) && ((kerSysGetCycleCount() - clk0) < DG_GLITCH_TO));
39472 + if (PERF->ExtIrqCfg & (1 << (ulIntr + EI_STATUS_SHFT))) { /* power glitch */
39473 + BcmHalInterruptEnable( ulIntr + INTERRUPT_ID_EXTERNAL_0);
39474 + KERSYS_DBG(" - Power glitch detected. Duration: %ld us\n", (kerSysGetCycleCount() - clk0)/CYCLE_PER_US);
39477 +#elif (defined(CONFIG_BCM96348) || defined(CONFIG_BCM96338)) && !defined(VXWORKS)
39481 + clk1 = kerSysGetCycleCount(); /* time cleared */
39482 + /* wait a little to get new reading */
39483 + while ((kerSysGetCycleCount()-clk1) < CYCLE_PER_US*2)
39485 + } while ((PERF->IrqStatus & (1 << (INTERRUPT_ID_DG - INTERNAL_ISR_TABLE_OFFSET))) && ((kerSysGetCycleCount() - clk0) < DG_GLITCH_TO));
39487 + if (!(PERF->IrqStatus & (1 << (INTERRUPT_ID_DG - INTERNAL_ISR_TABLE_OFFSET)))) {
39488 + BcmHalInterruptEnable( INTERRUPT_ID_DG );
39489 + KERSYS_DBG(" - Power glitch detected. Duration: %ld us\n", (kerSysGetCycleCount() - clk0)/CYCLE_PER_US);
39496 +static void kerSysDyingGaspShutdown( void )
39498 + kerSysSetWdTimer(1000000);
39499 +#if defined(CONFIG_BCM96345)
39500 + PERF->blkEnables &= ~(EMAC_CLK_EN | USB_CLK_EN | CPU_CLK_EN);
39501 +#elif defined(CONFIG_BCM96348)
39502 + PERF->blkEnables &= ~(EMAC_CLK_EN | USBS_CLK_EN | USBH_CLK_EN | SAR_CLK_EN);
39506 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0))
39507 +static irqreturn_t kerSysDyingGaspIsr(int irq, void * dev_id, struct pt_regs * regs)
39509 +static unsigned int kerSysDyingGaspIsr(void)
39512 + struct list_head *pos;
39513 + CB_DGASP_LIST *tmp, *dsl = NULL;
39515 + if (kerSysDyingGaspCheckPowerLoss()) {
39517 + /* first to turn off everything other than dsl */
39518 + list_for_each(pos, &g_cb_dgasp_list_head->list) {
39519 + tmp = list_entry(pos, CB_DGASP_LIST, list);
39520 + if(strncmp(tmp->name, "dsl", 3)) {
39521 + (tmp->cb_dgasp_fn)(tmp->context);
39527 + /* now send dgasp */
39529 + (dsl->cb_dgasp_fn)(dsl->context);
39531 + /* reset and shutdown system */
39532 + kerSysDyingGaspShutdown();
39534 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0))
39535 +return( IRQ_HANDLED );
39541 +static void __init kerSysInitDyingGaspHandler( void )
39543 + CB_DGASP_LIST *new_node;
39545 + if( g_cb_dgasp_list_head != NULL) {
39546 + printk("Error: kerSysInitDyingGaspHandler: list head is not null\n");
39549 + new_node= (CB_DGASP_LIST *)kmalloc(sizeof(CB_DGASP_LIST), GFP_KERNEL);
39550 + memset(new_node, 0x00, sizeof(CB_DGASP_LIST));
39551 + INIT_LIST_HEAD(&new_node->list);
39552 + g_cb_dgasp_list_head = new_node;
39554 +} /* kerSysInitDyingGaspHandler */
39556 +static void __exit kerSysDeinitDyingGaspHandler( void )
39558 + struct list_head *pos;
39559 + CB_DGASP_LIST *tmp;
39561 + if(g_cb_dgasp_list_head == NULL)
39564 + list_for_each(pos, &g_cb_dgasp_list_head->list) {
39565 + tmp = list_entry(pos, CB_DGASP_LIST, list);
39570 + kfree(g_cb_dgasp_list_head);
39571 + g_cb_dgasp_list_head = NULL;
39573 +} /* kerSysDeinitDyingGaspHandler */
39575 +void kerSysRegisterDyingGaspHandler(char *devname, void *cbfn, void *context)
39577 + CB_DGASP_LIST *new_node;
39579 + if( g_cb_dgasp_list_head == NULL) {
39580 + printk("Error: kerSysRegisterDyingGaspHandler: list head is null\n");
39584 + if( devname == NULL || cbfn == NULL ) {
39585 + printk("Error: kerSysRegisterDyingGaspHandler: register info not enough (%s,%x,%x)\n", devname, (unsigned int)cbfn, (unsigned int)context);
39589 + new_node= (CB_DGASP_LIST *)kmalloc(sizeof(CB_DGASP_LIST), GFP_KERNEL);
39590 + memset(new_node, 0x00, sizeof(CB_DGASP_LIST));
39591 + INIT_LIST_HEAD(&new_node->list);
39592 + strncpy(new_node->name, devname, IFNAMSIZ);
39593 + new_node->cb_dgasp_fn = (cb_dgasp_t)cbfn;
39594 + new_node->context = context;
39595 + list_add(&new_node->list, &g_cb_dgasp_list_head->list);
39597 + printk("dgasp: kerSysRegisterDyingGaspHandler: %s registered \n", devname);
39599 +} /* kerSysRegisterDyingGaspHandler */
39601 +void kerSysDeregisterDyingGaspHandler(char *devname)
39603 + struct list_head *pos;
39604 + CB_DGASP_LIST *tmp;
39606 + if(g_cb_dgasp_list_head == NULL) {
39607 + printk("Error: kerSysDeregisterDyingGaspHandler: list head is null\n");
39611 + if(devname == NULL) {
39612 + printk("Error: kerSysDeregisterDyingGaspHandler: devname is null\n");
39616 + printk("kerSysDeregisterDyingGaspHandler: %s is deregistering\n", devname);
39618 + list_for_each(pos, &g_cb_dgasp_list_head->list) {
39619 + tmp = list_entry(pos, CB_DGASP_LIST, list);
39620 + if(!strcmp(tmp->name, devname)) {
39623 + printk("kerSysDeregisterDyingGaspHandler: %s is deregistered\n", devname);
39627 + printk("kerSysDeregisterDyingGaspHandler: %s not (de)registered\n", devname);
39629 +} /* kerSysDeregisterDyingGaspHandler */
39631 +/***************************************************************************
39632 + * MACRO to call driver initialization and cleanup functions.
39633 + ***************************************************************************/
39634 +module_init( brcm_board_init );
39635 +module_exit( brcm_board_cleanup );
39637 +EXPORT_SYMBOL(kerSysNvRamGet);
39638 +EXPORT_SYMBOL(dumpaddr);
39639 +EXPORT_SYMBOL(kerSysGetMacAddress);
39640 +EXPORT_SYMBOL(kerSysReleaseMacAddress);
39641 +EXPORT_SYMBOL(kerSysGetSdramSize);
39642 +EXPORT_SYMBOL(kerSysLedCtrl);
39643 +EXPORT_SYMBOL(kerSysLedRegisterHwHandler);
39644 +EXPORT_SYMBOL(BpGetBoardIds);
39645 +EXPORT_SYMBOL(BpGetSdramSize);
39646 +EXPORT_SYMBOL(BpGetPsiSize);
39647 +EXPORT_SYMBOL(BpGetEthernetMacInfo);
39648 +EXPORT_SYMBOL(BpGetRj11InnerOuterPairGpios);
39649 +EXPORT_SYMBOL(BpGetPressAndHoldResetGpio);
39650 +EXPORT_SYMBOL(BpGetVoipResetGpio);
39651 +EXPORT_SYMBOL(BpGetVoipIntrGpio);
39652 +EXPORT_SYMBOL(BpGetPcmciaResetGpio);
39653 +EXPORT_SYMBOL(BpGetRtsCtsUartGpios);
39654 +EXPORT_SYMBOL(BpGetAdslLedGpio);
39655 +EXPORT_SYMBOL(BpGetAdslFailLedGpio);
39656 +EXPORT_SYMBOL(BpGetWirelessLedGpio);
39657 +EXPORT_SYMBOL(BpGetUsbLedGpio);
39658 +EXPORT_SYMBOL(BpGetHpnaLedGpio);
39659 +EXPORT_SYMBOL(BpGetWanDataLedGpio);
39660 +EXPORT_SYMBOL(BpGetPppLedGpio);
39661 +EXPORT_SYMBOL(BpGetPppFailLedGpio);
39662 +EXPORT_SYMBOL(BpGetVoipLedGpio);
39663 +EXPORT_SYMBOL(BpGetWirelessExtIntr);
39664 +EXPORT_SYMBOL(BpGetAdslDyingGaspExtIntr);
39665 +EXPORT_SYMBOL(BpGetVoipExtIntr);
39666 +EXPORT_SYMBOL(BpGetHpnaExtIntr);
39667 +EXPORT_SYMBOL(BpGetHpnaChipSelect);
39668 +EXPORT_SYMBOL(BpGetVoipChipSelect);
39669 +EXPORT_SYMBOL(BpGetWirelessSesBtnGpio);
39670 +EXPORT_SYMBOL(BpGetWirelessSesExtIntr);
39671 +EXPORT_SYMBOL(BpGetWirelessSesLedGpio);
39672 +EXPORT_SYMBOL(kerSysRegisterDyingGaspHandler);
39673 +EXPORT_SYMBOL(kerSysDeregisterDyingGaspHandler);
39674 +EXPORT_SYMBOL(kerSysGetCycleCount);
39675 +EXPORT_SYMBOL(kerSysSetWdTimer);
39676 +EXPORT_SYMBOL(kerSysWakeupMonitorTask);
39678 diff -urN linux-2.6.8.1/bcmdrivers/opensource/char/board/bcm963xx/impl1/cfiflash.c linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/char/board/bcm963xx/impl1/cfiflash.c
39679 --- linux-2.6.8.1/bcmdrivers/opensource/char/board/bcm963xx/impl1/cfiflash.c 1970-01-01 01:00:00.000000000 +0100
39680 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/char/board/bcm963xx/impl1/cfiflash.c 2006-06-26 09:07:10.000000000 +0200
39682 +/************************************************************************/
39684 +/* AMD CFI Enabled Flash Memory Drivers */
39685 +/* File name: CFIFLASH.C */
39686 +/* Revision: 1.0 5/07/98 */
39688 +/* Copyright (c) 1998 ADVANCED MICRO DEVICES, INC. All Rights Reserved. */
39689 +/* This software is unpublished and contains the trade secrets and */
39690 +/* confidential proprietary information of AMD. Unless otherwise */
39691 +/* provided in the Software Agreement associated herewith, it is */
39692 +/* licensed in confidence "AS IS" and is not to be reproduced in whole */
39693 +/* or part by any means except for backup. Use, duplication, or */
39694 +/* disclosure by the Government is subject to the restrictions in */
39695 +/* paragraph (b) (3) (B) of the Rights in Technical Data and Computer */
39696 +/* Software clause in DFAR 52.227-7013 (a) (Oct 1988). */
39697 +/* Software owned by */
39698 +/* Advanced Micro Devices, Inc., */
39699 +/* One AMD Place, */
39700 +/* P.O. Box 3453 */
39701 +/* Sunnyvale, CA 94088-3453. */
39702 +/************************************************************************/
39703 +/* This software constitutes a basic shell of source code for */
39704 +/* programming all AMD Flash components. AMD */
39705 +/* will not be responsible for misuse or illegal use of this */
39706 +/* software for devices not supported herein. AMD is providing */
39707 +/* this source code "AS IS" and will not be responsible for */
39708 +/* issues arising from incorrect user implementation of the */
39709 +/* source code herein. It is the user's responsibility to */
39710 +/* properly design-in this source code. */
39712 +/************************************************************************/
39714 +#include "lib_types.h"
39715 +#include "lib_printf.h"
39716 +#include "lib_string.h"
39717 +#include "cfe_timer.h"
39718 +#define printk printf
39720 +#include <linux/param.h>
39721 +#include <linux/sched.h>
39722 +#include <linux/timer.h>
39725 +#include "cfiflash.h"
39727 +static int flash_wait(WORD sector, int offset, UINT16 data);
39728 +static UINT16 flash_get_device_id(void);
39729 +static int flash_get_cfi(struct cfi_query *query, UINT16 *cfi_struct, int flashFamily);
39730 +static int flash_write(WORD sector, int offset, byte *buf, int nbytes);
39731 +static void flash_command(int command, WORD sector, int offset, UINT16 data);
39733 +/*********************************************************************/
39734 +/* 'meminfo' should be a pointer, but most C compilers will not */
39735 +/* allocate static storage for a pointer without calling */
39736 +/* non-portable functions such as 'new'. We also want to avoid */
39737 +/* the overhead of passing this pointer for every driver call. */
39738 +/* Systems with limited heap space will need to do this. */
39739 +/*********************************************************************/
39740 +struct flashinfo meminfo; /* Flash information structure */
39741 +static int flashFamily = FLASH_UNDEFINED;
39742 +static int totalSize = 0;
39743 +static struct cfi_query query;
39745 +static UINT16 cfi_data_struct_29W160[] = {
39746 + 0x0020, 0x0049, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
39747 + 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
39748 + 0x0051, 0x0052, 0x0059, 0x0002, 0x0000, 0x0040, 0x0000, 0x0000,
39749 + 0x0000, 0x0000, 0x0000, 0x0027, 0x0036, 0x0000, 0x0000, 0x0004,
39750 + 0x0000, 0x000a, 0x0000, 0x0004, 0x0000, 0x0003, 0x0000, 0x0015,
39751 + 0x0002, 0x0000, 0x0000, 0x0000, 0x0004, 0x0000, 0x0000, 0x0040,
39752 + 0x0000, 0x0001, 0x0000, 0x0020, 0x0000, 0x0000, 0x0000, 0x0080,
39753 + 0x0000, 0x001e, 0x0000, 0x0000, 0x0001, 0xffff, 0xffff, 0xffff,
39754 + 0x0050, 0x0052, 0x0049, 0x0031, 0x0030, 0x0000, 0x0002, 0x0001,
39755 + 0x0001, 0x0004, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0x0002,
39756 + 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
39757 + 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
39758 + 0xffff, 0x0888, 0x252b, 0x8c84, 0x7dbc, 0xffff, 0xffff, 0xffff,
39759 + 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
39760 + 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
39761 + 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff
39765 +/*********************************************************************/
39766 +/* Init_flash is used to build a sector table from the information */
39767 +/* provided through the CFI query. This information is translated */
39768 +/* from erase_block information to base:offset information for each */
39769 +/* individual sector. This information is then stored in the meminfo */
39770 +/* structure, and used throughout the driver to access sector */
39771 +/* information. */
39773 +/* This is more efficient than deriving the sector base:offset */
39774 +/* information every time the memory map switches (since on the */
39775 +/* development platform can only map 64k at a time). If the entire */
39776 +/* flash memory array can be mapped in, then the addition static */
39777 +/* allocation for the meminfo structure can be eliminated, but the */
39778 +/* drivers will have to be re-written. */
39780 +/* The meminfo struct occupies 653 bytes of heap space, depending */
39781 +/* on the value of the define MAXSECTORS. Adjust to suit */
39783 +/*********************************************************************/
39784 +byte flash_init(void)
39786 + int i=0, j=0, count=0;
39787 + int basecount=0L;
39788 + UINT16 device_id;
39789 + int flipCFIGeometry = FALSE;
39792 + * a single 8k sector for sector 0. This is to allow
39793 + * the system to perform memory mapping to the device,
39794 + * even though the actual physical layout is unknown.
39795 + * Once mapped in, the CFI query will produce all
39796 + * relevant information.
39798 + meminfo.addr = 0L;
39799 + meminfo.areg = 0;
39800 + meminfo.nsect = 1;
39801 + meminfo.bank1start = 0;
39802 + meminfo.bank2start = 0;
39804 + meminfo.sec[0].size = 8192;
39805 + meminfo.sec[0].base = 0x00000;
39806 + meminfo.sec[0].bank = 1;
39808 + flash_command(FLASH_RESET, 0, 0, 0);
39810 + device_id = flash_get_device_id();
39812 + switch (device_id) {
39813 + case ID_I28F160C3B:
39814 + case ID_I28F320C3B:
39815 + case ID_I28F160C3T:
39816 + case ID_I28F320C3T:
39817 + flashFamily = FLASH_INTEL;
39819 + case ID_AM29DL800B:
39820 + case ID_AM29LV800B:
39821 + case ID_AM29LV400B:
39822 + case ID_AM29LV160B:
39823 + case ID_AM29LV320B:
39824 + case ID_MX29LV320AB:
39825 + case ID_AM29LV320MB:
39826 + case ID_AM29DL800T:
39827 + case ID_AM29LV800T:
39828 + case ID_AM29LV160T:
39829 + case ID_AM29LV320T:
39830 + case ID_MX29LV320AT:
39831 + case ID_AM29LV320MT:
39832 + flashFamily = FLASH_AMD;
39834 + case ID_SST39VF1601:
39835 + case ID_SST39VF3201:
39836 + flashFamily = FLASH_SST;
39839 + printk("Flash memory not supported! Device id = %x\n", device_id);
39843 + if (flash_get_cfi(&query, 0, flashFamily) == -1) {
39844 + switch(device_id) {
39845 + case ID_AM29LV160T:
39846 + case ID_AM29LV160B:
39847 + flash_get_cfi(&query, cfi_data_struct_29W160, flashFamily);
39850 + printk("CFI data structure not found. Device id = %x\n", device_id);
39855 + // need to determine if it top or bottom boot here
39856 + switch (device_id)
39858 + case ID_AM29DL800B:
39859 + case ID_AM29LV800B:
39860 + case ID_AM29LV400B:
39861 + case ID_AM29LV160B:
39862 + case ID_AM29LV320B:
39863 + case ID_MX29LV320AB:
39864 + case ID_AM29LV320MB:
39865 + case ID_I28F160C3B:
39866 + case ID_I28F320C3B:
39867 + case ID_I28F160C3T:
39868 + case ID_I28F320C3T:
39869 + case ID_SST39VF1601:
39870 + case ID_SST39VF3201:
39871 + flipCFIGeometry = FALSE;
39873 + case ID_AM29DL800T:
39874 + case ID_AM29LV800T:
39875 + case ID_AM29LV160T:
39876 + case ID_AM29LV320T:
39877 + case ID_MX29LV320AT:
39878 + case ID_AM29LV320MT:
39879 + flipCFIGeometry = TRUE;
39882 + printk("Flash memory not supported! Device id = %x\n", device_id);
39886 + count=0;basecount=0L;
39888 + if (!flipCFIGeometry)
39890 + for (i=0; i<query.num_erase_blocks; i++) {
39891 + for(j=0; j<query.erase_block[i].num_sectors; j++) {
39892 + meminfo.sec[count].size = (int) query.erase_block[i].sector_size;
39893 + meminfo.sec[count].base = (int) basecount;
39894 + basecount += (int) query.erase_block[i].sector_size;
39901 + for (i = (query.num_erase_blocks - 1); i >= 0; i--) {
39902 + for(j=0; j<query.erase_block[i].num_sectors; j++) {
39903 + meminfo.sec[count].size = (int) query.erase_block[i].sector_size;
39904 + meminfo.sec[count].base = (int) basecount;
39905 + basecount += (int) query.erase_block[i].sector_size;
39911 + meminfo.nsect = count;
39912 + totalSize = meminfo.sec[count-1].base + meminfo.sec[count-1].size;
39916 +/*********************************************************************/
39917 +/* Flash_sector_erase_int() is identical to flash_sector_erase(), */
39918 +/* except it will wait until the erase is completed before returning */
39919 +/* control to the calling function. This can be used in cases which */
39920 +/* require the program to hold until a sector is erased, without */
39921 +/* adding the wait check external to this function. */
39922 +/*********************************************************************/
39923 +byte flash_sector_erase_int(WORD sector)
39927 + for( i = 0; i < 3; i++ ) {
39928 + flash_command(FLASH_SERASE, sector, 0, 0);
39929 + if (flash_wait(sector, 0, 0xffff) == STATUS_READY)
39936 +/*********************************************************************/
39937 +/* flash_read_buf() reads buffer of data from the specified */
39938 +/* offset from the sector parameter. */
39939 +/*********************************************************************/
39940 +int flash_read_buf(WORD sector, int offset,
39941 + byte *buffer, int numbytes)
39945 + fwp = (byte *)flash_get_memptr(sector);
39947 + while (numbytes) {
39948 + *buffer++ = *(fwp + offset);
39956 +/*********************************************************************/
39957 +/* flash_write_buf() utilizes */
39958 +/* the unlock bypass mode of the flash device. This can remove */
39959 +/* significant overhead from the bulk programming operation, and */
39960 +/* when programming bulk data a sizeable performance increase can be */
39962 +/*********************************************************************/
39963 +int flash_write_buf(WORD sector, int offset, byte *buffer, int numbytes)
39967 + unsigned char *p = flash_get_memptr(sector) + offset;
39969 + /* After writing the flash block, compare the contents to the source
39970 + * buffer. Try to write the sector successfully up to three times.
39972 + for( i = 0; i < 3; i++ ) {
39973 + ret = flash_write(sector, offset, buffer, numbytes);
39974 + if( !memcmp( p, buffer, numbytes ) )
39976 + /* Erase and try again */
39977 + flash_sector_erase_int(sector);
39982 + printk( "Flash write error. Verify failed\n" );
39987 +/*********************************************************************/
39988 +/* Usefull funtion to return the number of sectors in the device. */
39989 +/* Can be used for functions which need to loop among all the */
39990 +/* sectors, or wish to know the number of the last sector. */
39991 +/*********************************************************************/
39992 +int flash_get_numsectors(void)
39994 + return meminfo.nsect;
39997 +/*********************************************************************/
39998 +/* flash_get_sector_size() is provided for cases in which the size */
39999 +/* of a sector is required by a host application. The sector size */
40000 +/* (in bytes) is returned in the data location pointed to by the */
40001 +/* 'size' parameter. */
40002 +/*********************************************************************/
40003 +int flash_get_sector_size(WORD sector)
40005 + return meminfo.sec[sector].size;
40008 +/*********************************************************************/
40009 +/* The purpose of flash_get_memptr() is to return a memory pointer */
40010 +/* which points to the beginning of memory space allocated for the */
40011 +/* flash. All function pointers are then referenced from this */
40014 +/* Different systems will implement this in different ways: */
40015 +/* possibilities include: */
40016 +/* - A direct memory pointer */
40017 +/* - A pointer to a memory map */
40018 +/* - A pointer to a hardware port from which the linear */
40019 +/* address is translated */
40020 +/* - Output of an MMU function / service */
40022 +/* Also note that this function expects the pointer to a specific */
40023 +/* sector of the device. This can be provided by dereferencing */
40024 +/* the pointer from a translated offset of the sector from a */
40025 +/* global base pointer (e.g. flashptr = base_pointer + sector_offset)*/
40027 +/* Important: Many AMD flash devices need both bank and or sector */
40028 +/* address bits to be correctly set (bank address bits are A18-A16, */
40029 +/* and sector address bits are A18-A12, or A12-A15). Flash parts */
40030 +/* which do not need these bits will ignore them, so it is safe to */
40031 +/* assume that every part will require these bits to be set. */
40032 +/*********************************************************************/
40033 +unsigned char *flash_get_memptr(WORD sector)
40035 + unsigned char *memptr = (unsigned char*)(FLASH_BASE_ADDR_REG + meminfo.sec[sector].base);
40040 +/*********************************************************************/
40041 +/* The purpose of flash_get_blk() is to return a the block number */
40042 +/* for a given memory address. */
40043 +/*********************************************************************/
40044 +int flash_get_blk(int addr)
40046 + int blk_start, i;
40047 + int last_blk = flash_get_numsectors();
40048 + int relative_addr = addr - (int) FLASH_BASE_ADDR_REG;
40050 + for(blk_start=0, i=0; i < relative_addr && blk_start < last_blk; blk_start++)
40051 + i += flash_get_sector_size(blk_start);
40053 + if( i > relative_addr )
40055 + blk_start--; // last blk, dec by 1
40058 + if( blk_start == last_blk )
40060 + printk("Address is too big.\n");
40064 + return( blk_start );
40067 +/************************************************************************/
40068 +/* The purpose of flash_get_total_size() is to return the total size of */
40070 +/************************************************************************/
40071 +int flash_get_total_size()
40073 + return totalSize;
40076 +/*********************************************************************/
40077 +/* Flash_command() is the main driver function. It performs */
40078 +/* every possible command available to AMD B revision */
40079 +/* flash parts. Note that this command is not used directly, but */
40080 +/* rather called through the API wrapper functions provided below. */
40081 +/*********************************************************************/
40082 +static void flash_command(int command, WORD sector, int offset, UINT16 data)
40084 + volatile UINT16 *flashptr;
40085 + volatile UINT16 *flashbase;
40087 + flashptr = (UINT16 *) flash_get_memptr(sector);
40088 + flashbase = (UINT16 *) flash_get_memptr(0);
40090 + switch (flashFamily) {
40091 + case FLASH_UNDEFINED:
40092 + /* These commands should work for AMD, Intel and SST flashes */
40093 + switch (command) {
40094 + case FLASH_RESET:
40095 + flashptr[0] = 0xF0;
40096 + flashptr[0] = 0xFF;
40098 + case FLASH_READ_ID:
40099 + flashptr[0x5555] = 0xAA; /* unlock 1 */
40100 + flashptr[0x2AAA] = 0x55; /* unlock 2 */
40101 + flashptr[0x5555] = 0x90;
40108 + switch (command) {
40109 + case FLASH_RESET:
40110 + flashptr[0] = 0xF0;
40112 + case FLASH_READ_ID:
40113 + flashptr[0x555] = 0xAA; /* unlock 1 */
40114 + flashptr[0x2AA] = 0x55; /* unlock 2 */
40115 + flashptr[0x555] = 0x90;
40117 + case FLASH_CFIQUERY:
40118 + flashptr[0x55] = 0x98;
40121 + flashptr[0x555] = 0xAA; /* unlock 1 */
40122 + flashptr[0x2AA] = 0x55; /* unlock 2 */
40123 + flashptr[0x555] = 0x20;
40126 + flashptr[0] = 0xA0;
40127 + flashptr[offset/2] = data;
40129 + case FLASH_UBRESET:
40130 + flashptr[0] = 0x90;
40131 + flashptr[0] = 0x00;
40133 + case FLASH_SERASE:
40134 + flashptr[0x555] = 0xAA; /* unlock 1 */
40135 + flashptr[0x2AA] = 0x55; /* unlock 2 */
40136 + flashptr[0x555] = 0x80;
40137 + flashptr[0x555] = 0xAA;
40138 + flashptr[0x2AA] = 0x55;
40139 + flashptr[0] = 0x30;
40145 + case FLASH_INTEL:
40146 + switch (command) {
40147 + case FLASH_RESET:
40148 + flashptr[0] = 0xFF;
40150 + case FLASH_READ_ID:
40151 + flashptr[0] = 0x90;
40153 + case FLASH_CFIQUERY:
40154 + flashptr[0] = 0x98;
40157 + flashptr[0] = 0x40;
40158 + flashptr[offset/2] = data;
40160 + case FLASH_SERASE:
40161 + flashptr[0] = 0x60;
40162 + flashptr[0] = 0xD0;
40163 + flashptr[0] = 0x20;
40164 + flashptr[0] = 0xD0;
40171 + switch (command) {
40172 + case FLASH_RESET:
40173 + flashbase[0x5555] = 0xAA; /* unlock 1 */
40174 + flashbase[0x2AAA] = 0x55; /* unlock 2 */
40175 + flashbase[0x5555] = 0xf0;
40177 + case FLASH_READ_ID:
40178 + flashbase[0x5555] = 0xAA; /* unlock 1 */
40179 + flashbase[0x2AAA] = 0x55; /* unlock 2 */
40180 + flashbase[0x5555] = 0x90;
40182 + case FLASH_CFIQUERY:
40183 + flashbase[0x5555] = 0xAA; /* unlock 1 */
40184 + flashbase[0x2AAA] = 0x55; /* unlock 2 */
40185 + flashbase[0x5555] = 0x98;
40190 + flashbase[0x5555] = 0xAA; /* unlock 1 */
40191 + flashbase[0x2AAA] = 0x55; /* unlock 2 */
40192 + flashbase[0x5555] = 0xa0;
40193 + flashptr[offset/2] = data;
40195 + case FLASH_UBRESET:
40197 + case FLASH_SERASE:
40198 + flashbase[0x5555] = 0xAA; /* unlock 1 */
40199 + flashbase[0x2AAA] = 0x55; /* unlock 2 */
40200 + flashbase[0x5555] = 0x80;
40201 + flashbase[0x5555] = 0xAA;
40202 + flashbase[0x2AAA] = 0x55;
40203 + flashptr[0] = 0x30;
40214 +/*********************************************************************/
40215 +/* flash_write extends the functionality of flash_program() by */
40216 +/* providing an faster way to program multiple data words, without */
40217 +/* needing the function overhead of looping algorithms which */
40218 +/* program word by word. This function utilizes fast pointers */
40219 +/* to quickly loop through bulk data. */
40220 +/*********************************************************************/
40221 +static int flash_write(WORD sector, int offset, byte *buf, int nbytes)
40224 + src = (UINT16 *)buf;
40226 + if ((nbytes | offset) & 1) {
40230 + flash_command(FLASH_UB, 0, 0, 0);
40231 + while (nbytes > 0) {
40232 + flash_command(FLASH_PROG, sector, offset, *src);
40233 + if (flash_wait(sector, offset, *src) != STATUS_READY)
40239 + flash_command(FLASH_UBRESET, 0, 0, 0);
40241 + return (byte*)src - buf;
40244 +/*********************************************************************/
40245 +/* flash_wait utilizes the DQ6, DQ5, and DQ2 polling algorithms */
40246 +/* described in the flash data book. It can quickly ascertain the */
40247 +/* operational status of the flash device, and return an */
40248 +/* appropriate status code (defined in flash.h) */
40249 +/*********************************************************************/
40250 +static int flash_wait(WORD sector, int offset, UINT16 data)
40252 + volatile UINT16 *flashptr; /* flash window */
40255 + flashptr = (UINT16 *) flash_get_memptr(sector);
40257 + if (flashFamily == FLASH_AMD || flashFamily == FLASH_SST) {
40258 +#if defined(_BCM96338_) || defined(CONFIG_BCM96338)
40260 + d1 = flashptr[offset/2];
40262 + return STATUS_READY;
40263 + } while (!(d1 & 0x20));
40265 + d1 = flashptr[offset/2];
40267 + if (d1 != data) {
40268 + flash_command(FLASH_RESET, 0, 0, 0);
40269 + return STATUS_TIMEOUT;
40273 + d1 = *flashptr; /* read data */
40274 + d1 ^= *flashptr; /* read it again and see what toggled */
40275 + if (d1 == 0) /* no toggles, nothing's happening */
40276 + return STATUS_READY;
40277 + } while (!(d1 & 0x20));
40279 + d1 = *flashptr; /* read data */
40280 + d1 ^= *flashptr; /* read it again and see what toggled */
40283 + flash_command(FLASH_RESET, 0, 0, 0);
40284 + return STATUS_TIMEOUT;
40287 + } else if (flashFamily == FLASH_INTEL) {
40288 + flashptr[0] = 0x70;
40289 + /* Wait for completion */
40290 + while(!(*flashptr & 0x80));
40291 + if (*flashptr & 0x30) {
40292 + flashptr[0] = 0x50;
40293 + flash_command(FLASH_RESET, 0, 0, 0);
40294 + return STATUS_TIMEOUT;
40296 + flashptr[0] = 0x50;
40297 + flash_command(FLASH_RESET, 0, 0, 0);
40300 + return STATUS_READY;
40303 +/*********************************************************************/
40304 +/* flash_get_device_id() will perform an autoselect sequence on the */
40305 +/* flash device, and return the device id of the component. */
40306 +/* This function automatically resets to read mode. */
40307 +/*********************************************************************/
40308 +static UINT16 flash_get_device_id()
40310 + volatile UINT16 *fwp; /* flash window */
40313 + fwp = (UINT16 *)flash_get_memptr(0);
40315 + flash_command(FLASH_READ_ID, 0, 0, 0);
40316 + answer = *(fwp + 1);
40317 + if (answer == ID_AM29LV320M) {
40318 + answer = *(fwp + 0xe);
40319 + answer = *(fwp + 0xf);
40322 + flash_command(FLASH_RESET, 0, 0, 0);
40323 + return( (UINT16) answer );
40326 +/*********************************************************************/
40327 +/* flash_get_cfi() is the main CFI workhorse function. Due to it's */
40328 +/* complexity and size it need only be called once upon */
40329 +/* initializing the flash system. Once it is called, all operations */
40330 +/* are performed by looking at the meminfo structure. */
40331 +/* All possible care was made to make this algorithm as efficient as */
40332 +/* possible. 90% of all operations are memory reads, and all */
40333 +/* calculations are done using bit-shifts when possible */
40334 +/*********************************************************************/
40335 +static int flash_get_cfi(struct cfi_query *query, UINT16 *cfi_struct, int flashFamily)
40337 + volatile UINT16 *fwp; /* flash window */
40340 + flash_command(FLASH_CFIQUERY, 0, 0, 0);
40342 + if (cfi_struct == 0)
40343 + fwp = (UINT16 *)flash_get_memptr(0);
40345 + fwp = cfi_struct;
40347 + /* Initial house-cleaning */
40348 + for(i=0; i < 8; i++) {
40349 + query->erase_block[i].sector_size = 0;
40350 + query->erase_block[i].num_sectors = 0;
40353 + /* If not 'QRY', then we dont have a CFI enabled device in the socket */
40354 + if( fwp[0x10] != 'Q' &&
40355 + fwp[0x11] != 'R' &&
40356 + fwp[0x12] != 'Y') {
40357 + flash_command(FLASH_RESET, 0, 0, 0);
40361 + query->num_erase_blocks = fwp[0x2C];
40362 + if(flashFamily == FLASH_SST)
40363 + query->num_erase_blocks = 1;
40365 + for(i=0; i < query->num_erase_blocks; i++) {
40366 + query->erase_block[i].num_sectors = fwp[(0x2D+(4*i))] + (fwp[0x2E + (4*i)] << 8);
40367 + query->erase_block[i].num_sectors++;
40368 + query->erase_block[i].sector_size = 256 * (256 * fwp[(0x30+(4*i))] + fwp[(0x2F+(4*i))]);
40371 + flash_command(FLASH_RESET, 0, 0, 0);
40374 diff -urN linux-2.6.8.1/bcmdrivers/opensource/char/board/bcm963xx/impl1/cfiflash.h linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/char/board/bcm963xx/impl1/cfiflash.h
40375 --- linux-2.6.8.1/bcmdrivers/opensource/char/board/bcm963xx/impl1/cfiflash.h 1970-01-01 01:00:00.000000000 +0100
40376 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/char/board/bcm963xx/impl1/cfiflash.h 2006-06-26 09:07:10.000000000 +0200
40378 +/************************************************************************/
40380 +/* AMD CFI Enabled Flash Memory Drivers */
40381 +/* File name: CFIFLASH.H */
40382 +/* Revision: 1.0 5/07/98 */
40384 +/* Copyright (c) 1998 ADVANCED MICRO DEVICES, INC. All Rights Reserved. */
40385 +/* This software is unpublished and contains the trade secrets and */
40386 +/* confidential proprietary information of AMD. Unless otherwise */
40387 +/* provided in the Software Agreement associated herewith, it is */
40388 +/* licensed in confidence "AS IS" and is not to be reproduced in whole */
40389 +/* or part by any means except for backup. Use, duplication, or */
40390 +/* disclosure by the Government is subject to the restrictions in */
40391 +/* paragraph (b) (3) (B) of the Rights in Technical Data and Computer */
40392 +/* Software clause in DFAR 52.227-7013 (a) (Oct 1988). */
40393 +/* Software owned by */
40394 +/* Advanced Micro Devices, Inc., */
40395 +/* One AMD Place, */
40396 +/* P.O. Box 3453 */
40397 +/* Sunnyvale, CA 94088-3453. */
40398 +/************************************************************************/
40399 +/* This software constitutes a basic shell of source code for */
40400 +/* programming all AMD Flash components. AMD */
40401 +/* will not be responsible for misuse or illegal use of this */
40402 +/* software for devices not supported herein. AMD is providing */
40403 +/* this source code "AS IS" and will not be responsible for */
40404 +/* issues arising from incorrect user implementation of the */
40405 +/* source code herein. It is the user's responsibility to */
40406 +/* properly design-in this source code. */
40408 +/************************************************************************/
40409 +#ifndef _CFIFLASH_H
40410 +#define _CFIFLASH_H
40412 +#if defined __cplusplus
40416 +/* include board/CPU specific definitions */
40417 +#include "bcmtypes.h"
40418 +#include "board.h"
40420 +#define FLASH_BASE_ADDR_REG FLASH_BASE
40426 +#define MAXSECTORS 1024 /* maximum number of sectors supported */
40428 +/* A structure for identifying a flash part. There is one for each
40429 + * of the flash part definitions. We need to keep track of the
40430 + * sector organization, the address register used, and the size
40431 + * of the sectors.
40433 +struct flashinfo {
40434 + char *name; /* "Am29DL800T", etc. */
40435 + unsigned long addr; /* physical address, once translated */
40436 + int areg; /* Can be set to zero for all parts */
40437 + int nsect; /* # of sectors -- 19 in LV, 22 in DL */
40438 + int bank1start; /* first sector # in bank 1 */
40439 + int bank2start; /* first sector # in bank 2, if DL part */
40441 + long size; /* # of bytes in this sector */
40442 + long base; /* offset from beginning of device */
40443 + int bank; /* 1 or 2 for DL; 1 for LV */
40444 + } sec[MAXSECTORS]; /* per-sector info */
40448 + * This structure holds all CFI query information as defined
40449 + * in the JEDEC standard. All information up to
40450 + * primary_extended_query is standard among all manufactures
40451 + * with CFI enabled devices.
40454 +struct cfi_query {
40455 + int num_erase_blocks; /* Number of sector defs. */
40457 + unsigned long sector_size; /* byte size of sector */
40458 + int num_sectors; /* Num sectors of this size */
40459 + } erase_block[8]; /* Max of 256, but 8 is good */
40462 +/* Standard Boolean declarations */
40466 +/* Define different type of flash */
40467 +#define FLASH_UNDEFINED 0
40468 +#define FLASH_AMD 1
40469 +#define FLASH_INTEL 2
40470 +#define FLASH_SST 3
40472 +/* Command codes for the flash_command routine */
40473 +#define FLASH_RESET 0 /* reset to read mode */
40474 +#define FLASH_READ_ID 1 /* read device ID */
40475 +#define FLASH_CFIQUERY 2 /* CFI query */
40476 +#define FLASH_UB 3 /* go into unlock bypass mode */
40477 +#define FLASH_PROG 4 /* program a word */
40478 +#define FLASH_UBRESET 5 /* reset to read mode from unlock bypass mode */
40479 +#define FLASH_SERASE 6 /* sector erase */
40481 +/* Return codes from flash_status */
40482 +#define STATUS_READY 0 /* ready for action */
40483 +#define STATUS_TIMEOUT 1 /* operation timed out */
40485 +/* A list of AMD compatible device ID's - add others as needed */
40486 +#define ID_AM29DL800T 0x224A
40487 +#define ID_AM29DL800B 0x22CB
40488 +#define ID_AM29LV800T 0x22DA
40489 +#define ID_AM29LV800B 0x225B
40490 +#define ID_AM29LV400B 0x22BA
40492 +#define ID_AM29LV160B 0x2249
40493 +#define ID_AM29LV160T 0x22C4
40495 +#define ID_AM29LV320T 0x22F6
40496 +#define ID_MX29LV320AT 0x22A7
40497 +#define ID_AM29LV320B 0x22F9
40498 +#define ID_MX29LV320AB 0x22A8
40500 +#define ID_AM29LV320M 0x227E
40501 +#define ID_AM29LV320MB 0x2200
40502 +#define ID_AM29LV320MT 0x2201
40504 +#define ID_SST39VF1601 0x234B
40505 +#define ID_SST39VF3201 0x235B
40507 +/* A list of Intel compatible device ID's - add others as needed */
40508 +#define ID_I28F160C3T 0x88C2
40509 +#define ID_I28F160C3B 0x88C3
40510 +#define ID_I28F320C3T 0x88C4
40511 +#define ID_I28F320C3B 0x88C5
40513 +extern byte flash_init(void);
40514 +extern int flash_write_buf(WORD sector, int offset, byte *buffer, int numbytes);
40515 +extern int flash_read_buf(WORD sector, int offset, byte *buffer, int numbytes);
40516 +extern byte flash_sector_erase_int(WORD sector);
40517 +extern int flash_get_numsectors(void);
40518 +extern int flash_get_sector_size(WORD sector);
40519 +extern int flash_get_total_size(void);
40520 +extern unsigned char *flash_get_memptr(WORD sector);
40521 +extern int flash_get_blk(int addr);
40523 +#if defined __cplusplus
40528 diff -urN linux-2.6.8.1/bcmdrivers/opensource/char/serial/bcm96348/Makefile linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/char/serial/bcm96348/Makefile
40529 --- linux-2.6.8.1/bcmdrivers/opensource/char/serial/bcm96348/Makefile 1970-01-01 01:00:00.000000000 +0100
40530 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/char/serial/bcm96348/Makefile 2006-06-26 09:07:10.000000000 +0200
40532 +# File: bcmdrivers/opensource/char/serial
40534 +# Makefile for the BCM63xx serial/console driver
40536 +obj-$(CONFIG_BCM_SERIAL) += bcm63xx_cons.o
40538 +EXTRA_CFLAGS += -I$(INC_BRCMDRIVER_PUB_PATH)/$(BRCM_BOARD)
40540 +-include $(TOPDIR)/Rules.make
40543 + rm -f core *.o *.a *.s
40545 diff -urN linux-2.6.8.1/bcmdrivers/opensource/char/serial/bcm96348/bcm63xx_cons.c linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/char/serial/bcm96348/bcm63xx_cons.c
40546 --- linux-2.6.8.1/bcmdrivers/opensource/char/serial/bcm96348/bcm63xx_cons.c 1970-01-01 01:00:00.000000000 +0100
40547 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/char/serial/bcm96348/bcm63xx_cons.c 2006-06-26 09:07:10.000000000 +0200
40551 + Copyright 2002 Broadcom Corp. All Rights Reserved.
40553 + This program is free software; you can distribute it and/or modify it
40554 + under the terms of the GNU General Public License (Version 2) as
40555 + published by the Free Software Foundation.
40557 + This program is distributed in the hope it will be useful, but WITHOUT
40558 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
40559 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
40560 + for more details.
40562 + You should have received a copy of the GNU General Public License along
40563 + with this program; if not, write to the Free Software Foundation, Inc.,
40564 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
40568 +/* Description: Serial port driver for the BCM963XX. */
40570 +#define CARDNAME "bcm963xx_serial driver"
40571 +#define VERSION "2.0"
40572 +#define VER_STR CARDNAME " v" VERSION "\n"
40575 +#include <linux/kernel.h>
40576 +#include <linux/module.h>
40577 +#include <linux/version.h>
40578 +#include <linux/init.h>
40579 +#include <linux/slab.h>
40580 +#include <linux/interrupt.h>
40582 +/* for definition of struct console */
40583 +#include <linux/console.h>
40584 +#include <linux/tty.h>
40585 +#include <linux/tty_flip.h>
40586 +#include <linux/serial.h>
40587 +#include <asm/uaccess.h>
40589 +#include <bcmtypes.h>
40590 +#include <board.h>
40591 +#include <bcm_map_part.h>
40592 +#include <bcm_intr.h>
40594 +extern void _putc(char);
40595 +extern void _puts(const char *);
40597 +typedef struct bcm_serial {
40598 + volatile Uart * port;
40603 + int blocked_open;
40604 + unsigned short close_delay;
40605 + unsigned short closing_wait;
40606 + unsigned short line; /* port/line number */
40607 + unsigned short cflags; /* line configuration flag */
40608 + unsigned short x_char; /* xon/xoff character */
40609 + unsigned short read_status_mask; /* mask for read condition */
40610 + unsigned short ignore_status_mask; /* mask for ignore condition */
40611 + unsigned long event; /* mask used in BH */
40612 + int xmit_head; /* Position of the head */
40613 + int xmit_tail; /* Position of the tail */
40614 + int xmit_cnt; /* Count of the chars in the buffer */
40615 + int count; /* indicates how many times it has been opened */
40618 + struct async_icount icount; /* keep track of things ... */
40619 + struct tty_struct *tty; /* tty associated */
40620 + struct termios normal_termios;
40622 + wait_queue_head_t open_wait;
40623 + wait_queue_head_t close_wait;
40625 + long session; /* Session of opening process */
40626 + long pgrp; /* pgrp of opening process */
40628 + unsigned char is_initialized;
40632 +/*---------------------------------------------------------------------*/
40633 +/* Define bits in the Interrupt Enable register */
40634 +/*---------------------------------------------------------------------*/
40635 +/* Enable receive interrupt */
40636 +#define RXINT (RXFIFONE|RXOVFERR)
40638 +/* Enable transmit interrupt */
40639 +#define TXINT (TXFIFOEMT|TXUNDERR|TXOVFERR)
40641 +/* Enable receiver line status interrupt */
40642 +#define LSINT (RXBRK|RXPARERR|RXFRAMERR)
40644 +#define BCM_NUM_UARTS 1
40646 +#define BD_BCM63XX_TIMER_CLOCK_INPUT (FPERIPH)
40649 +static struct bcm_serial multi[BCM_NUM_UARTS];
40650 +static struct bcm_serial *lines[BCM_NUM_UARTS];
40651 +static struct tty_driver serial_driver;
40652 +static struct tty_struct *serial_table[BCM_NUM_UARTS];
40653 +static struct termios *serial_termios[BCM_NUM_UARTS];
40654 +static struct termios *serial_termios_locked[BCM_NUM_UARTS];
40655 +static int serial_refcount;
40658 +static void bcm_stop (struct tty_struct *tty);
40659 +static void bcm_start (struct tty_struct *tty);
40660 +static inline void receive_chars (struct bcm_serial * info);
40661 +static int startup (struct bcm_serial *info);
40662 +static void shutdown (struct bcm_serial * info);
40663 +static void change_speed( volatile Uart *pUart, tcflag_t cFlag );
40664 +static void bcm63xx_cons_flush_chars (struct tty_struct *tty);
40665 +static int bcm63xx_cons_write (struct tty_struct *tty, int from_user,
40666 + const unsigned char *buf, int count);
40667 +static int bcm63xx_cons_write_room (struct tty_struct *tty);
40668 +static int bcm_chars_in_buffer (struct tty_struct *tty);
40669 +static void bcm_flush_buffer (struct tty_struct *tty);
40670 +static void bcm_throttle (struct tty_struct *tty);
40671 +static void bcm_unthrottle (struct tty_struct *tty);
40672 +static void bcm_send_xchar (struct tty_struct *tty, char ch);
40673 +static int get_serial_info(struct bcm_serial *info, struct serial_struct *retinfo);
40674 +static int set_serial_info (struct bcm_serial *info, struct serial_struct *new_info);
40675 +static int get_lsr_info (struct bcm_serial *info, unsigned int *value);
40676 +static void send_break (struct bcm_serial *info, int duration);
40677 +static int bcm_ioctl (struct tty_struct * tty, struct file * file,
40678 + unsigned int cmd, unsigned long arg);
40679 +static void bcm_set_termios (struct tty_struct *tty, struct termios *old_termios);
40680 +static void bcm63xx_cons_close (struct tty_struct *tty, struct file *filp);
40681 +static void bcm_hangup (struct tty_struct *tty);
40682 +static int block_til_ready (struct tty_struct *tty, struct file *filp, struct bcm_serial *info);
40683 +static int bcm63xx_cons_open (struct tty_struct * tty, struct file * filp);
40684 +static int __init bcm63xx_serialinit(void);
40688 + * ------------------------------------------------------------
40689 + * rs_stop () and rs_start ()
40691 + * These routines are called before setting or resetting
40692 + * tty->stopped. They enable or disable transmitter interrupts,
40694 + * ------------------------------------------------------------
40696 +static void bcm_stop (struct tty_struct *tty)
40700 +static void bcm_start (struct tty_struct *tty)
40702 + _puts(CARDNAME " Start\n");
40706 + * ------------------------------------------------------------
40707 + * receive_char ()
40709 + * This routine deals with inputs from any lines.
40710 + * ------------------------------------------------------------
40712 +static inline void receive_chars (struct bcm_serial * info)
40714 + struct tty_struct *tty = 0;
40715 + struct async_icount * icount;
40717 + unsigned short status, tmp;
40719 + while ((status = info->port->intStatus) & RXINT)
40721 + if (status & RXFIFONE)
40722 + ch = info->port->Data; // Read the character
40723 + tty = info->tty; /* now tty points to the proper dev */
40724 + icount = &info->icount;
40727 + if (tty->flip.count >= TTY_FLIPBUF_SIZE)
40729 + *tty->flip.char_buf_ptr = ch;
40730 + *tty->flip.flag_buf_ptr = 0;
40732 + if (status & RXBRK)
40734 + *tty->flip.flag_buf_ptr = TTY_BREAK;
40737 + // keep track of the statistics
40738 + if (status & (RXFRAMERR | RXPARERR | RXOVFERR))
40740 + if (status & RXPARERR) /* parity error */
40741 + icount->parity++;
40743 + if (status & RXFRAMERR) /* frame error */
40745 + if (status & RXOVFERR)
40747 + // Overflow. Reset the RX FIFO
40748 + info->port->fifoctl |= RSTRXFIFOS;
40749 + icount->overrun++;
40751 + // check to see if we should ignore the character
40752 + // and mask off conditions that should be ignored
40753 + if (status & info->ignore_status_mask)
40755 + if (++ignore > 100 )
40757 + goto ignore_char;
40759 + // Mask off the error conditions we want to ignore
40760 + tmp = status & info->read_status_mask;
40761 + if (tmp & RXPARERR)
40763 + *tty->flip.flag_buf_ptr = TTY_PARITY;
40766 + if (tmp & RXFRAMERR)
40768 + *tty->flip.flag_buf_ptr = TTY_FRAME;
40770 + if (tmp & RXOVFERR)
40772 + if (tty->flip.count < TTY_FLIPBUF_SIZE)
40774 + tty->flip.count++;
40775 + tty->flip.flag_buf_ptr++;
40776 + tty->flip.char_buf_ptr++;
40777 + *tty->flip.flag_buf_ptr = TTY_OVERRUN;
40781 + tty->flip.flag_buf_ptr++;
40782 + tty->flip.char_buf_ptr++;
40783 + tty->flip.count++;
40787 + tty_flip_buffer_push(tty);
40792 + * ------------------------------------------------------------
40793 + * bcm_interrupt ()
40795 + * this is the main interrupt routine for the chip.
40796 + * It deals with the multiple ports.
40797 + * ------------------------------------------------------------
40799 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
40800 +static irqreturn_t bcm_interrupt (int irq, void * dev, struct pt_regs * regs)
40802 +static void bcm_interrupt (int irq, void * dev, struct pt_regs * regs)
40805 + struct bcm_serial * info = lines[0];
40808 + /* get pending interrupt flags from UART */
40810 + /* Mask with only the serial interrupts that are enabled */
40811 + intStat = info->port->intStatus & info->port->intMask;
40814 + if (intStat & RXINT)
40815 + receive_chars (info);
40817 + if (intStat & TXINT)
40818 + info->port->intStatus = TXINT;
40819 + else /* don't know what it was, so let's mask it */
40820 + info->port->intMask &= ~intStat;
40822 + intStat = info->port->intStatus & info->port->intMask;
40825 + // Clear the interrupt
40826 + BcmHalInterruptEnable (INTERRUPT_ID_UART);
40827 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
40828 + return IRQ_HANDLED;
40833 + * -------------------------------------------------------------------
40836 + * various initialization tasks
40837 + * -------------------------------------------------------------------
40839 +static int startup (struct bcm_serial *info)
40841 + // Port is already started...
40846 + * -------------------------------------------------------------------
40849 + * This routine will shutdown a serial port; interrupts are disabled, and
40850 + * DTR is dropped if the hangup on close termio flag is on.
40851 + * -------------------------------------------------------------------
40853 +static void shutdown (struct bcm_serial * info)
40855 + unsigned long flags;
40856 + if (!info->is_initialized)
40859 + save_flags (flags);
40862 + info->port->control &= ~(BRGEN|TXEN|RXEN);
40864 + set_bit (TTY_IO_ERROR, &info->tty->flags);
40865 + info->is_initialized = 0;
40867 + restore_flags (flags);
40870 + * -------------------------------------------------------------------
40871 + * change_speed ()
40873 + * Set the baud rate, character size, parity and stop bits.
40874 + * -------------------------------------------------------------------
40876 +static void change_speed( volatile Uart *pUart, tcflag_t cFlag )
40878 + unsigned long ulFlags, ulBaud, ulClockFreqHz, ulTmp;
40879 + save_flags(ulFlags);
40881 + switch( cFlag & (CBAUD | CBAUDEX) )
40939 + /* Calculate buad rate. */
40940 + ulClockFreqHz = BD_BCM63XX_TIMER_CLOCK_INPUT;
40941 + ulTmp = (ulClockFreqHz / ulBaud) / 16;
40942 + if( ulTmp & 0x01 )
40943 + ulTmp /= 2; /* Rounding up, so sub is already accounted for */
40945 + ulTmp = (ulTmp / 2) - 1; /* Rounding down so we must sub 1 */
40946 + pUart->baudword = ulTmp;
40948 + /* Set character size, stop bits and parity. */
40949 + switch( cFlag & CSIZE )
40952 + ulTmp = BITS5SYM; /* select transmit 5 bit data size */
40955 + ulTmp = BITS6SYM; /* select transmit 6 bit data size */
40958 + ulTmp = BITS7SYM; /* select transmit 7 bit data size */
40962 + ulTmp = BITS8SYM; /* select transmit 8 bit data size */
40965 + if( cFlag & CSTOPB )
40966 + ulTmp |= TWOSTOP; /* select 2 stop bits */
40968 + ulTmp |= ONESTOP; /* select one stop bit */
40970 + /* Write these values into the config reg. */
40971 + pUart->config = ulTmp;
40972 + pUart->control &= ~(RXPARITYEN | TXPARITYEN | RXPARITYEVEN | TXPARITYEVEN);
40973 + switch( cFlag & (PARENB | PARODD) )
40975 + case PARENB|PARODD:
40976 + pUart->control |= RXPARITYEN | TXPARITYEN;
40979 + pUart->control |= RXPARITYEN | TXPARITYEN | RXPARITYEVEN | TXPARITYEVEN;
40982 + pUart->control |= 0;
40986 + /* Reset and flush uart */
40987 + pUart->fifoctl = RSTTXFIFOS | RSTRXFIFOS;
40988 + restore_flags( ulFlags );
40993 + * -------------------------------------------------------------------
40994 + * bcm_flush_char ()
40996 + * Nothing to flush. Polled I/O is used.
40997 + * -------------------------------------------------------------------
40999 +static void bcm63xx_cons_flush_chars (struct tty_struct *tty)
41005 + * -------------------------------------------------------------------
41006 + * bcm63xx_cons_write ()
41008 + * Main output routine using polled I/O.
41009 + * -------------------------------------------------------------------
41011 +static int bcm63xx_cons_write (struct tty_struct *tty, int from_user,
41012 + const unsigned char *buf, int count)
41016 + for (c = 0; c < count; c++)
41022 + * -------------------------------------------------------------------
41023 + * bcm63xx_cons_write_room ()
41025 + * Compute the amount of space available for writing.
41026 + * -------------------------------------------------------------------
41028 +static int bcm63xx_cons_write_room (struct tty_struct *tty)
41030 + /* Pick a number. Any number. Polled I/O is used. */
41035 + * -------------------------------------------------------------------
41036 + * bcm_chars_in_buffer ()
41038 + * compute the amount of char left to be transmitted
41039 + * -------------------------------------------------------------------
41041 +static int bcm_chars_in_buffer (struct tty_struct *tty)
41047 + * -------------------------------------------------------------------
41048 + * bcm_flush_buffer ()
41050 + * Empty the output buffer
41051 + * -------------------------------------------------------------------
41053 +static void bcm_flush_buffer (struct tty_struct *tty)
41058 + * ------------------------------------------------------------
41059 + * bcm_throttle () and bcm_unthrottle ()
41061 + * This routine is called by the upper-layer tty layer to signal that
41062 + * incoming characters should be throttled (or not).
41063 + * ------------------------------------------------------------
41065 +static void bcm_throttle (struct tty_struct *tty)
41067 + struct bcm_serial *info = (struct bcm_serial *)tty->driver_data;
41068 + if (I_IXOFF(tty))
41069 + info->x_char = STOP_CHAR(tty);
41072 +static void bcm_unthrottle (struct tty_struct *tty)
41074 + struct bcm_serial *info = (struct bcm_serial *)tty->driver_data;
41075 + if (I_IXOFF(tty))
41077 + if (info->x_char)
41078 + info->x_char = 0;
41080 + info->x_char = START_CHAR(tty);
41084 +static void bcm_send_xchar (struct tty_struct *tty, char ch)
41086 + struct bcm_serial *info = (struct bcm_serial *)tty->driver_data;
41087 + info->x_char = ch;
41089 + bcm_start (info->tty);
41093 + * ------------------------------------------------------------
41094 + * rs_ioctl () and friends
41095 + * ------------------------------------------------------------
41097 +static int get_serial_info(struct bcm_serial *info, struct serial_struct *retinfo)
41099 + struct serial_struct tmp;
41104 + memset (&tmp, 0, sizeof(tmp));
41105 + tmp.type = info->type;
41106 + tmp.line = info->line;
41107 + tmp.port = (int) info->port;
41108 + tmp.irq = info->irq;
41110 + tmp.baud_base = info->baud_base;
41111 + tmp.close_delay = info->close_delay;
41112 + tmp.closing_wait = info->closing_wait;
41114 + return copy_to_user (retinfo, &tmp, sizeof(*retinfo));
41117 +static int set_serial_info (struct bcm_serial *info, struct serial_struct *new_info)
41119 + struct serial_struct new_serial;
41120 + struct bcm_serial old_info;
41126 + copy_from_user (&new_serial, new_info, sizeof(new_serial));
41127 + old_info = *info;
41129 + if (!capable(CAP_SYS_ADMIN))
41133 + if (info->count > 1)
41136 + /* OK, past this point, all the error checking has been done.
41137 + * At this point, we start making changes.....
41139 + info->baud_base = new_serial.baud_base;
41140 + info->type = new_serial.type;
41141 + info->close_delay = new_serial.close_delay;
41142 + info->closing_wait = new_serial.closing_wait;
41143 + retval = startup (info);
41148 + * get_lsr_info - get line status register info
41150 + * Purpose: Let user call ioctl() to get info when the UART physically
41151 + * is emptied. On bus types like RS485, the transmitter must
41152 + * release the bus after transmitting. This must be done when
41153 + * the transmit shift register is empty, not be done when the
41154 + * transmit holding register is empty. This functionality
41155 + * allows an RS485 driver to be written in user space.
41157 +static int get_lsr_info (struct bcm_serial *info, unsigned int *value)
41163 + * This routine sends a break character out the serial port.
41165 +static void send_break (struct bcm_serial *info, int duration)
41167 + unsigned long flags;
41172 + current->state = TASK_INTERRUPTIBLE;
41174 + save_flags (flags);
41177 + info->port->control |= XMITBREAK;
41178 + schedule_timeout(duration);
41179 + info->port->control &= ~XMITBREAK;
41181 + restore_flags (flags);
41184 +static int bcm_ioctl (struct tty_struct * tty, struct file * file,
41185 + unsigned int cmd, unsigned long arg)
41188 + struct bcm_serial * info = (struct bcm_serial *)tty->driver_data;
41191 + if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
41192 + (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGWILD) &&
41193 + (cmd != TIOCSERSWILD) && (cmd != TIOCSERGSTRUCT))
41195 + if (tty->flags & (1 << TTY_IO_ERROR))
41201 + case TCSBRK: /* SVID version: non-zero arg --> no break */
41202 + retval = tty_check_change (tty);
41205 + tty_wait_until_sent (tty, 0);
41207 + send_break (info, HZ/4); /* 1/4 second */
41210 + case TCSBRKP: /* support for POSIX tcsendbreak() */
41211 + retval = tty_check_change (tty);
41214 + tty_wait_until_sent (tty, 0);
41215 + send_break (info, arg ? arg*(HZ/10) : HZ/4);
41218 + case TIOCGSOFTCAR:
41219 + error = verify_area (VERIFY_WRITE, (void *)arg, sizeof(long));
41222 + put_user (C_CLOCAL(tty) ? 1 : 0, (unsigned long *)arg);
41225 + case TIOCSSOFTCAR:
41226 + error = get_user (arg, (unsigned long *)arg);
41229 + tty->termios->c_cflag = ((tty->termios->c_cflag & ~CLOCAL) | (arg ? CLOCAL : 0));
41232 + case TIOCGSERIAL:
41233 + error = verify_area (VERIFY_WRITE, (void *)arg, sizeof(struct serial_struct));
41236 + return get_serial_info (info, (struct serial_struct *)arg);
41238 + case TIOCSSERIAL:
41239 + return set_serial_info (info, (struct serial_struct *) arg);
41241 + case TIOCSERGETLSR: /* Get line status register */
41242 + error = verify_area (VERIFY_WRITE, (void *)arg, sizeof(unsigned int));
41246 + return get_lsr_info (info, (unsigned int *)arg);
41248 + case TIOCSERGSTRUCT:
41249 + error = verify_area (VERIFY_WRITE, (void *)arg, sizeof(struct bcm_serial));
41252 + copy_to_user((struct bcm_serial *)arg, info, sizeof(struct bcm_serial));
41256 + return -ENOIOCTLCMD;
41261 +static void bcm_set_termios (struct tty_struct *tty, struct termios *old_termios)
41263 + struct bcm_serial *info = (struct bcm_serial *)tty->driver_data;
41265 + if( tty->termios->c_cflag != old_termios->c_cflag )
41266 + change_speed (info->port, tty->termios->c_cflag);
41270 + * ------------------------------------------------------------
41271 + * bcm63xx_cons_close()
41273 + * This routine is called when the serial port gets closed. First, we
41274 + * wait for the last remaining data to be sent. Then, we turn off
41275 + * the transmit enable and receive enable flags.
41276 + * ------------------------------------------------------------
41278 +static void bcm63xx_cons_close (struct tty_struct *tty, struct file *filp)
41280 + struct bcm_serial * info = (struct bcm_serial *)tty->driver_data;
41281 + unsigned long flags;
41286 + save_flags (flags);
41289 + if (tty_hung_up_p (filp))
41291 + restore_flags (flags);
41295 + if ((tty->count == 1) && (info->count != 1))
41298 + /* Uh, oh. tty->count is 1, which means that the tty
41299 + * structure will be freed. Info->count should always
41300 + * be one in these conditions. If it's greater than
41301 + * one, we've got real problems, since it means the
41302 + * serial port won't be shutdown.
41304 + printk("bcm63xx_cons_close: bad serial port count; tty->count is 1, "
41305 + "info->count is %d\n", info->count);
41309 + if (--info->count < 0)
41311 + printk("ds_close: bad serial port count for ttys%d: %d\n",
41312 + info->line, info->count);
41318 + restore_flags (flags);
41322 + /* Now we wait for the transmit buffer to clear; and we notify
41323 + * the line discipline to only process XON/XOFF characters.
41325 + tty->closing = 1;
41327 + /* At this point we stop accepting input. To do this, we
41328 + * disable the receive line status interrupts.
41331 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
41332 + if (tty->driver->flush_buffer)
41333 + tty->driver->flush_buffer (tty);
41335 + if (tty->driver.flush_buffer)
41336 + tty->driver.flush_buffer (tty);
41338 + if (tty->ldisc.flush_buffer)
41339 + tty->ldisc.flush_buffer (tty);
41341 + tty->closing = 0;
41344 + if (tty->ldisc.num != ldiscs[N_TTY].num)
41346 + if (tty->ldisc.close)
41347 + (tty->ldisc.close)(tty);
41348 + tty->ldisc = ldiscs[N_TTY];
41349 + tty->termios->c_line = N_TTY;
41350 + if (tty->ldisc.open)
41351 + (tty->ldisc.open)(tty);
41353 + if (info->blocked_open)
41355 + if (info->close_delay)
41357 + current->state = TASK_INTERRUPTIBLE;
41358 + schedule_timeout(info->close_delay);
41360 + wake_up_interruptible (&info->open_wait);
41362 + wake_up_interruptible (&info->close_wait);
41364 + restore_flags (flags);
41368 + * bcm_hangup () --- called by tty_hangup() when a hangup is signaled.
41370 +static void bcm_hangup (struct tty_struct *tty)
41373 + struct bcm_serial *info = (struct bcm_serial *)tty->driver_data;
41379 + wake_up_interruptible (&info->open_wait);
41383 + * ------------------------------------------------------------
41384 + * rs_open() and friends
41385 + * ------------------------------------------------------------
41387 +static int block_til_ready (struct tty_struct *tty, struct file *filp,
41388 + struct bcm_serial *info)
41394 + * This routine is called whenever a serial port is opened. It
41395 + * enables interrupts for a serial port. It also performs the
41396 + * serial-specific initialization for the tty structure.
41398 +static int bcm63xx_cons_open (struct tty_struct * tty, struct file * filp)
41400 + struct bcm_serial *info;
41401 + int retval, line;
41403 + // Make sure we're only opening on of the ports we support
41404 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
41405 + line = MINOR(tty->driver->cdev.dev) - tty->driver->minor_start;
41407 + line = MINOR(tty->device) - tty->driver.minor_start;
41410 + if ((line < 0) || (line >= BCM_NUM_UARTS))
41413 + info = lines[line];
41415 + info->port->intMask = 0; /* Clear any pending interrupts */
41416 + info->port->intMask = RXINT; /* Enable RX */
41419 + tty->driver_data = info;
41421 + BcmHalInterruptEnable (INTERRUPT_ID_UART);
41423 + // Start up serial port
41424 + retval = startup (info);
41428 + retval = block_til_ready (tty, filp, info);
41433 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
41434 + info->pgrp = process_group(current);
41435 + info->session = current->signal->session;
41437 + info->session = current->session;
41438 + info->pgrp = current->pgrp;
41444 +/* --------------------------------------------------------------------------
41445 + Name: bcm63xx_serialinit
41446 + Purpose: Initialize our BCM63xx serial driver
41447 +-------------------------------------------------------------------------- */
41448 +static int __init bcm63xx_serialinit(void)
41451 + struct bcm_serial * info;
41453 + // Print the driver version information
41456 + memset(&serial_driver, 0, sizeof(struct tty_driver));
41457 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
41458 + serial_driver.owner = THIS_MODULE;
41459 + serial_driver.devfs_name = "tts/";
41461 + serial_driver.magic = TTY_DRIVER_MAGIC;
41462 + serial_driver.name = "ttyS";
41463 + serial_driver.major = TTY_MAJOR;
41464 + serial_driver.minor_start = 64;
41465 + serial_driver.num = BCM_NUM_UARTS;
41466 + serial_driver.type = TTY_DRIVER_TYPE_SERIAL;
41467 + serial_driver.subtype = SERIAL_TYPE_NORMAL;
41468 + serial_driver.init_termios = tty_std_termios;
41469 + serial_driver.init_termios.c_cflag = B115200 | CS8 | CREAD | CLOCAL;
41470 + serial_driver.flags = TTY_DRIVER_REAL_RAW;
41471 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
41472 + serial_driver.refcount = serial_refcount;
41473 + serial_driver.ttys = serial_table;
41475 + serial_driver.refcount = &serial_refcount;
41476 + serial_driver.table = serial_table;
41479 + serial_driver.termios = serial_termios;
41480 + serial_driver.termios_locked = serial_termios_locked;
41481 + serial_driver.open = bcm63xx_cons_open;
41482 + serial_driver.close = bcm63xx_cons_close;
41483 + serial_driver.write = bcm63xx_cons_write;
41484 + serial_driver.flush_chars = bcm63xx_cons_flush_chars;
41485 + serial_driver.write_room = bcm63xx_cons_write_room;
41486 + serial_driver.chars_in_buffer = bcm_chars_in_buffer;
41487 + serial_driver.flush_buffer = bcm_flush_buffer;
41488 + serial_driver.ioctl = bcm_ioctl;
41489 + serial_driver.throttle = bcm_throttle;
41490 + serial_driver.unthrottle = bcm_unthrottle;
41491 + serial_driver.send_xchar = bcm_send_xchar;
41492 + serial_driver.set_termios = bcm_set_termios;
41493 + serial_driver.stop = bcm_stop;
41494 + serial_driver.start = bcm_start;
41495 + serial_driver.hangup = bcm_hangup;
41497 + if (tty_register_driver (&serial_driver))
41498 + panic("Couldn't register serial driver\n");
41500 + save_flags(flags); cli();
41501 + for (i = 0; i < BCM_NUM_UARTS; i++)
41503 + info = &multi[i];
41505 + info->port = (Uart *) ((char *)UART_BASE + (i * 0x20));
41506 + info->irq = (2 - i) + 8;
41509 + info->close_delay = 50;
41510 + info->closing_wait = 3000;
41511 + info->x_char = 0;
41514 + info->blocked_open = 0;
41515 + info->normal_termios = serial_driver.init_termios;
41516 + init_waitqueue_head(&info->open_wait);
41517 + init_waitqueue_head(&info->close_wait);
41519 + /* If we are pointing to address zero then punt - not correctly
41520 + * set up in setup.c to handle this.
41522 + if (! info->port)
41524 + BcmHalMapInterrupt(bcm_interrupt, 0, INTERRUPT_ID_UART);
41527 + /* order matters here... the trick is that flags
41528 + * is updated... in request_irq - to immediatedly obliterate
41531 + restore_flags(flags);
41535 +module_init(bcm63xx_serialinit);
41537 +/* --------------------------------------------------------------------------
41538 + Name: bcm_console_print
41539 + Purpose: bcm_console_print is registered for printk.
41540 + The console_lock must be held when we get here.
41541 +-------------------------------------------------------------------------- */
41542 +static void bcm_console_print (struct console * cons, const char * str,
41543 + unsigned int count)
41547 + for(i=0; i<count; i++, str++)
41557 +static struct tty_driver * bcm_console_device(struct console * c, int *index)
41559 + *index = c->index;
41560 + return &serial_driver;
41563 +static int __init bcm_console_setup(struct console * co, char * options)
41568 +static struct console bcm_sercons = {
41570 + .write = bcm_console_print,
41571 + .device = bcm_console_device,
41572 + .setup = bcm_console_setup,
41573 + .flags = CON_PRINTBUFFER, // CON_CONSDEV, CONSOLE_LINE,
41577 +static int __init bcm63xx_console_init(void)
41579 + register_console(&bcm_sercons);
41583 +console_initcall(bcm63xx_console_init);
41584 diff -urN linux-2.6.8.1/bcmdrivers/opensource/char/serial/impl1/Makefile linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/char/serial/impl1/Makefile
41585 --- linux-2.6.8.1/bcmdrivers/opensource/char/serial/impl1/Makefile 1970-01-01 01:00:00.000000000 +0100
41586 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/char/serial/impl1/Makefile 2006-06-26 09:07:10.000000000 +0200
41588 +# File: bcmdrivers/opensource/char/serial
41590 +# Makefile for the BCM63xx serial/console driver
41592 +obj-$(CONFIG_BCM_SERIAL) += bcm63xx_cons.o
41594 +EXTRA_CFLAGS += -I$(INC_BRCMDRIVER_PUB_PATH)/$(BRCM_BOARD)
41596 +-include $(TOPDIR)/Rules.make
41599 + rm -f core *.o *.a *.s
41601 diff -urN linux-2.6.8.1/bcmdrivers/opensource/char/serial/impl1/bcm63xx_cons.c linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/char/serial/impl1/bcm63xx_cons.c
41602 --- linux-2.6.8.1/bcmdrivers/opensource/char/serial/impl1/bcm63xx_cons.c 1970-01-01 01:00:00.000000000 +0100
41603 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/char/serial/impl1/bcm63xx_cons.c 2006-06-26 09:07:10.000000000 +0200
41607 + Copyright 2002 Broadcom Corp. All Rights Reserved.
41609 + This program is free software; you can distribute it and/or modify it
41610 + under the terms of the GNU General Public License (Version 2) as
41611 + published by the Free Software Foundation.
41613 + This program is distributed in the hope it will be useful, but WITHOUT
41614 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
41615 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
41616 + for more details.
41618 + You should have received a copy of the GNU General Public License along
41619 + with this program; if not, write to the Free Software Foundation, Inc.,
41620 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
41624 +/* Description: Serial port driver for the BCM963XX. */
41626 +#define CARDNAME "bcm963xx_serial driver"
41627 +#define VERSION "2.0"
41628 +#define VER_STR CARDNAME " v" VERSION "\n"
41631 +#include <linux/kernel.h>
41632 +#include <linux/module.h>
41633 +#include <linux/version.h>
41634 +#include <linux/init.h>
41635 +#include <linux/slab.h>
41636 +#include <linux/interrupt.h>
41638 +/* for definition of struct console */
41639 +#include <linux/console.h>
41640 +#include <linux/tty.h>
41641 +#include <linux/tty_flip.h>
41642 +#include <linux/serial.h>
41643 +#include <asm/uaccess.h>
41645 +#include <bcmtypes.h>
41646 +#include <board.h>
41647 +#include <bcm_map_part.h>
41648 +#include <bcm_intr.h>
41650 +extern void _putc(char);
41651 +extern void _puts(const char *);
41653 +typedef struct bcm_serial {
41654 + volatile Uart * port;
41659 + int blocked_open;
41660 + unsigned short close_delay;
41661 + unsigned short closing_wait;
41662 + unsigned short line; /* port/line number */
41663 + unsigned short cflags; /* line configuration flag */
41664 + unsigned short x_char; /* xon/xoff character */
41665 + unsigned short read_status_mask; /* mask for read condition */
41666 + unsigned short ignore_status_mask; /* mask for ignore condition */
41667 + unsigned long event; /* mask used in BH */
41668 + int xmit_head; /* Position of the head */
41669 + int xmit_tail; /* Position of the tail */
41670 + int xmit_cnt; /* Count of the chars in the buffer */
41671 + int count; /* indicates how many times it has been opened */
41674 + struct async_icount icount; /* keep track of things ... */
41675 + struct tty_struct *tty; /* tty associated */
41676 + struct termios normal_termios;
41678 + wait_queue_head_t open_wait;
41679 + wait_queue_head_t close_wait;
41681 + long session; /* Session of opening process */
41682 + long pgrp; /* pgrp of opening process */
41684 + unsigned char is_initialized;
41688 +/*---------------------------------------------------------------------*/
41689 +/* Define bits in the Interrupt Enable register */
41690 +/*---------------------------------------------------------------------*/
41691 +/* Enable receive interrupt */
41692 +#define RXINT (RXFIFONE|RXOVFERR)
41694 +/* Enable transmit interrupt */
41695 +#define TXINT (TXFIFOEMT|TXUNDERR|TXOVFERR)
41697 +/* Enable receiver line status interrupt */
41698 +#define LSINT (RXBRK|RXPARERR|RXFRAMERR)
41700 +#define BCM_NUM_UARTS 1
41702 +#define BD_BCM63XX_TIMER_CLOCK_INPUT (FPERIPH)
41705 +static struct bcm_serial multi[BCM_NUM_UARTS];
41706 +static struct bcm_serial *lines[BCM_NUM_UARTS];
41707 +static struct tty_driver serial_driver;
41708 +static struct tty_struct *serial_table[BCM_NUM_UARTS];
41709 +static struct termios *serial_termios[BCM_NUM_UARTS];
41710 +static struct termios *serial_termios_locked[BCM_NUM_UARTS];
41711 +static int serial_refcount;
41714 +static void bcm_stop (struct tty_struct *tty);
41715 +static void bcm_start (struct tty_struct *tty);
41716 +static inline void receive_chars (struct bcm_serial * info);
41717 +static int startup (struct bcm_serial *info);
41718 +static void shutdown (struct bcm_serial * info);
41719 +static void change_speed( volatile Uart *pUart, tcflag_t cFlag );
41720 +static void bcm63xx_cons_flush_chars (struct tty_struct *tty);
41721 +static int bcm63xx_cons_write (struct tty_struct *tty, int from_user,
41722 + const unsigned char *buf, int count);
41723 +static int bcm63xx_cons_write_room (struct tty_struct *tty);
41724 +static int bcm_chars_in_buffer (struct tty_struct *tty);
41725 +static void bcm_flush_buffer (struct tty_struct *tty);
41726 +static void bcm_throttle (struct tty_struct *tty);
41727 +static void bcm_unthrottle (struct tty_struct *tty);
41728 +static void bcm_send_xchar (struct tty_struct *tty, char ch);
41729 +static int get_serial_info(struct bcm_serial *info, struct serial_struct *retinfo);
41730 +static int set_serial_info (struct bcm_serial *info, struct serial_struct *new_info);
41731 +static int get_lsr_info (struct bcm_serial *info, unsigned int *value);
41732 +static void send_break (struct bcm_serial *info, int duration);
41733 +static int bcm_ioctl (struct tty_struct * tty, struct file * file,
41734 + unsigned int cmd, unsigned long arg);
41735 +static void bcm_set_termios (struct tty_struct *tty, struct termios *old_termios);
41736 +static void bcm63xx_cons_close (struct tty_struct *tty, struct file *filp);
41737 +static void bcm_hangup (struct tty_struct *tty);
41738 +static int block_til_ready (struct tty_struct *tty, struct file *filp, struct bcm_serial *info);
41739 +static int bcm63xx_cons_open (struct tty_struct * tty, struct file * filp);
41740 +static int __init bcm63xx_serialinit(void);
41744 + * ------------------------------------------------------------
41745 + * rs_stop () and rs_start ()
41747 + * These routines are called before setting or resetting
41748 + * tty->stopped. They enable or disable transmitter interrupts,
41750 + * ------------------------------------------------------------
41752 +static void bcm_stop (struct tty_struct *tty)
41756 +static void bcm_start (struct tty_struct *tty)
41758 + _puts(CARDNAME " Start\n");
41762 + * ------------------------------------------------------------
41763 + * receive_char ()
41765 + * This routine deals with inputs from any lines.
41766 + * ------------------------------------------------------------
41768 +static inline void receive_chars (struct bcm_serial * info)
41770 + struct tty_struct *tty = 0;
41771 + struct async_icount * icount;
41773 + unsigned short status, tmp;
41775 + while ((status = info->port->intStatus) & RXINT)
41777 + if (status & RXFIFONE)
41778 + ch = info->port->Data; // Read the character
41779 + tty = info->tty; /* now tty points to the proper dev */
41780 + icount = &info->icount;
41783 + if (tty->flip.count >= TTY_FLIPBUF_SIZE)
41785 + *tty->flip.char_buf_ptr = ch;
41786 + *tty->flip.flag_buf_ptr = 0;
41788 + if (status & RXBRK)
41790 + *tty->flip.flag_buf_ptr = TTY_BREAK;
41793 + // keep track of the statistics
41794 + if (status & (RXFRAMERR | RXPARERR | RXOVFERR))
41796 + if (status & RXPARERR) /* parity error */
41797 + icount->parity++;
41799 + if (status & RXFRAMERR) /* frame error */
41801 + if (status & RXOVFERR)
41803 + // Overflow. Reset the RX FIFO
41804 + info->port->fifoctl |= RSTRXFIFOS;
41805 + icount->overrun++;
41807 + // check to see if we should ignore the character
41808 + // and mask off conditions that should be ignored
41809 + if (status & info->ignore_status_mask)
41811 + if (++ignore > 100 )
41813 + goto ignore_char;
41815 + // Mask off the error conditions we want to ignore
41816 + tmp = status & info->read_status_mask;
41817 + if (tmp & RXPARERR)
41819 + *tty->flip.flag_buf_ptr = TTY_PARITY;
41822 + if (tmp & RXFRAMERR)
41824 + *tty->flip.flag_buf_ptr = TTY_FRAME;
41826 + if (tmp & RXOVFERR)
41828 + if (tty->flip.count < TTY_FLIPBUF_SIZE)
41830 + tty->flip.count++;
41831 + tty->flip.flag_buf_ptr++;
41832 + tty->flip.char_buf_ptr++;
41833 + *tty->flip.flag_buf_ptr = TTY_OVERRUN;
41837 + tty->flip.flag_buf_ptr++;
41838 + tty->flip.char_buf_ptr++;
41839 + tty->flip.count++;
41843 + tty_flip_buffer_push(tty);
41848 + * ------------------------------------------------------------
41849 + * bcm_interrupt ()
41851 + * this is the main interrupt routine for the chip.
41852 + * It deals with the multiple ports.
41853 + * ------------------------------------------------------------
41855 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
41856 +static irqreturn_t bcm_interrupt (int irq, void * dev, struct pt_regs * regs)
41858 +static void bcm_interrupt (int irq, void * dev, struct pt_regs * regs)
41861 + struct bcm_serial * info = lines[0];
41864 + /* get pending interrupt flags from UART */
41866 + /* Mask with only the serial interrupts that are enabled */
41867 + intStat = info->port->intStatus & info->port->intMask;
41870 + if (intStat & RXINT)
41871 + receive_chars (info);
41873 + if (intStat & TXINT)
41874 + info->port->intStatus = TXINT;
41875 + else /* don't know what it was, so let's mask it */
41876 + info->port->intMask &= ~intStat;
41878 + intStat = info->port->intStatus & info->port->intMask;
41881 + // Clear the interrupt
41882 + BcmHalInterruptEnable (INTERRUPT_ID_UART);
41883 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
41884 + return IRQ_HANDLED;
41889 + * -------------------------------------------------------------------
41892 + * various initialization tasks
41893 + * -------------------------------------------------------------------
41895 +static int startup (struct bcm_serial *info)
41897 + // Port is already started...
41902 + * -------------------------------------------------------------------
41905 + * This routine will shutdown a serial port; interrupts are disabled, and
41906 + * DTR is dropped if the hangup on close termio flag is on.
41907 + * -------------------------------------------------------------------
41909 +static void shutdown (struct bcm_serial * info)
41911 + unsigned long flags;
41912 + if (!info->is_initialized)
41915 + save_flags (flags);
41918 + info->port->control &= ~(BRGEN|TXEN|RXEN);
41920 + set_bit (TTY_IO_ERROR, &info->tty->flags);
41921 + info->is_initialized = 0;
41923 + restore_flags (flags);
41926 + * -------------------------------------------------------------------
41927 + * change_speed ()
41929 + * Set the baud rate, character size, parity and stop bits.
41930 + * -------------------------------------------------------------------
41932 +static void change_speed( volatile Uart *pUart, tcflag_t cFlag )
41934 + unsigned long ulFlags, ulBaud, ulClockFreqHz, ulTmp;
41935 + save_flags(ulFlags);
41937 + switch( cFlag & (CBAUD | CBAUDEX) )
41995 + /* Calculate buad rate. */
41996 + ulClockFreqHz = BD_BCM63XX_TIMER_CLOCK_INPUT;
41997 + ulTmp = (ulClockFreqHz / ulBaud) / 16;
41998 + if( ulTmp & 0x01 )
41999 + ulTmp /= 2; /* Rounding up, so sub is already accounted for */
42001 + ulTmp = (ulTmp / 2) - 1; /* Rounding down so we must sub 1 */
42002 + pUart->baudword = ulTmp;
42004 + /* Set character size, stop bits and parity. */
42005 + switch( cFlag & CSIZE )
42008 + ulTmp = BITS5SYM; /* select transmit 5 bit data size */
42011 + ulTmp = BITS6SYM; /* select transmit 6 bit data size */
42014 + ulTmp = BITS7SYM; /* select transmit 7 bit data size */
42018 + ulTmp = BITS8SYM; /* select transmit 8 bit data size */
42021 + if( cFlag & CSTOPB )
42022 + ulTmp |= TWOSTOP; /* select 2 stop bits */
42024 + ulTmp |= ONESTOP; /* select one stop bit */
42026 + /* Write these values into the config reg. */
42027 + pUart->config = ulTmp;
42028 + pUart->control &= ~(RXPARITYEN | TXPARITYEN | RXPARITYEVEN | TXPARITYEVEN);
42029 + switch( cFlag & (PARENB | PARODD) )
42031 + case PARENB|PARODD:
42032 + pUart->control |= RXPARITYEN | TXPARITYEN;
42035 + pUart->control |= RXPARITYEN | TXPARITYEN | RXPARITYEVEN | TXPARITYEVEN;
42038 + pUart->control |= 0;
42042 + /* Reset and flush uart */
42043 + pUart->fifoctl = RSTTXFIFOS | RSTRXFIFOS;
42044 + restore_flags( ulFlags );
42049 + * -------------------------------------------------------------------
42050 + * bcm_flush_char ()
42052 + * Nothing to flush. Polled I/O is used.
42053 + * -------------------------------------------------------------------
42055 +static void bcm63xx_cons_flush_chars (struct tty_struct *tty)
42061 + * -------------------------------------------------------------------
42062 + * bcm63xx_cons_write ()
42064 + * Main output routine using polled I/O.
42065 + * -------------------------------------------------------------------
42067 +static int bcm63xx_cons_write (struct tty_struct *tty, int from_user,
42068 + const unsigned char *buf, int count)
42072 + for (c = 0; c < count; c++)
42078 + * -------------------------------------------------------------------
42079 + * bcm63xx_cons_write_room ()
42081 + * Compute the amount of space available for writing.
42082 + * -------------------------------------------------------------------
42084 +static int bcm63xx_cons_write_room (struct tty_struct *tty)
42086 + /* Pick a number. Any number. Polled I/O is used. */
42091 + * -------------------------------------------------------------------
42092 + * bcm_chars_in_buffer ()
42094 + * compute the amount of char left to be transmitted
42095 + * -------------------------------------------------------------------
42097 +static int bcm_chars_in_buffer (struct tty_struct *tty)
42103 + * -------------------------------------------------------------------
42104 + * bcm_flush_buffer ()
42106 + * Empty the output buffer
42107 + * -------------------------------------------------------------------
42109 +static void bcm_flush_buffer (struct tty_struct *tty)
42114 + * ------------------------------------------------------------
42115 + * bcm_throttle () and bcm_unthrottle ()
42117 + * This routine is called by the upper-layer tty layer to signal that
42118 + * incoming characters should be throttled (or not).
42119 + * ------------------------------------------------------------
42121 +static void bcm_throttle (struct tty_struct *tty)
42123 + struct bcm_serial *info = (struct bcm_serial *)tty->driver_data;
42124 + if (I_IXOFF(tty))
42125 + info->x_char = STOP_CHAR(tty);
42128 +static void bcm_unthrottle (struct tty_struct *tty)
42130 + struct bcm_serial *info = (struct bcm_serial *)tty->driver_data;
42131 + if (I_IXOFF(tty))
42133 + if (info->x_char)
42134 + info->x_char = 0;
42136 + info->x_char = START_CHAR(tty);
42140 +static void bcm_send_xchar (struct tty_struct *tty, char ch)
42142 + struct bcm_serial *info = (struct bcm_serial *)tty->driver_data;
42143 + info->x_char = ch;
42145 + bcm_start (info->tty);
42149 + * ------------------------------------------------------------
42150 + * rs_ioctl () and friends
42151 + * ------------------------------------------------------------
42153 +static int get_serial_info(struct bcm_serial *info, struct serial_struct *retinfo)
42155 + struct serial_struct tmp;
42160 + memset (&tmp, 0, sizeof(tmp));
42161 + tmp.type = info->type;
42162 + tmp.line = info->line;
42163 + tmp.port = (int) info->port;
42164 + tmp.irq = info->irq;
42166 + tmp.baud_base = info->baud_base;
42167 + tmp.close_delay = info->close_delay;
42168 + tmp.closing_wait = info->closing_wait;
42170 + return copy_to_user (retinfo, &tmp, sizeof(*retinfo));
42173 +static int set_serial_info (struct bcm_serial *info, struct serial_struct *new_info)
42175 + struct serial_struct new_serial;
42176 + struct bcm_serial old_info;
42182 + copy_from_user (&new_serial, new_info, sizeof(new_serial));
42183 + old_info = *info;
42185 + if (!capable(CAP_SYS_ADMIN))
42189 + if (info->count > 1)
42192 + /* OK, past this point, all the error checking has been done.
42193 + * At this point, we start making changes.....
42195 + info->baud_base = new_serial.baud_base;
42196 + info->type = new_serial.type;
42197 + info->close_delay = new_serial.close_delay;
42198 + info->closing_wait = new_serial.closing_wait;
42199 + retval = startup (info);
42204 + * get_lsr_info - get line status register info
42206 + * Purpose: Let user call ioctl() to get info when the UART physically
42207 + * is emptied. On bus types like RS485, the transmitter must
42208 + * release the bus after transmitting. This must be done when
42209 + * the transmit shift register is empty, not be done when the
42210 + * transmit holding register is empty. This functionality
42211 + * allows an RS485 driver to be written in user space.
42213 +static int get_lsr_info (struct bcm_serial *info, unsigned int *value)
42219 + * This routine sends a break character out the serial port.
42221 +static void send_break (struct bcm_serial *info, int duration)
42223 + unsigned long flags;
42228 + current->state = TASK_INTERRUPTIBLE;
42230 + save_flags (flags);
42233 + info->port->control |= XMITBREAK;
42234 + schedule_timeout(duration);
42235 + info->port->control &= ~XMITBREAK;
42237 + restore_flags (flags);
42240 +static int bcm_ioctl (struct tty_struct * tty, struct file * file,
42241 + unsigned int cmd, unsigned long arg)
42244 + struct bcm_serial * info = (struct bcm_serial *)tty->driver_data;
42247 + if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
42248 + (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGWILD) &&
42249 + (cmd != TIOCSERSWILD) && (cmd != TIOCSERGSTRUCT))
42251 + if (tty->flags & (1 << TTY_IO_ERROR))
42257 + case TCSBRK: /* SVID version: non-zero arg --> no break */
42258 + retval = tty_check_change (tty);
42261 + tty_wait_until_sent (tty, 0);
42263 + send_break (info, HZ/4); /* 1/4 second */
42266 + case TCSBRKP: /* support for POSIX tcsendbreak() */
42267 + retval = tty_check_change (tty);
42270 + tty_wait_until_sent (tty, 0);
42271 + send_break (info, arg ? arg*(HZ/10) : HZ/4);
42274 + case TIOCGSOFTCAR:
42275 + error = verify_area (VERIFY_WRITE, (void *)arg, sizeof(long));
42278 + put_user (C_CLOCAL(tty) ? 1 : 0, (unsigned long *)arg);
42281 + case TIOCSSOFTCAR:
42282 + error = get_user (arg, (unsigned long *)arg);
42285 + tty->termios->c_cflag = ((tty->termios->c_cflag & ~CLOCAL) | (arg ? CLOCAL : 0));
42288 + case TIOCGSERIAL:
42289 + error = verify_area (VERIFY_WRITE, (void *)arg, sizeof(struct serial_struct));
42292 + return get_serial_info (info, (struct serial_struct *)arg);
42294 + case TIOCSSERIAL:
42295 + return set_serial_info (info, (struct serial_struct *) arg);
42297 + case TIOCSERGETLSR: /* Get line status register */
42298 + error = verify_area (VERIFY_WRITE, (void *)arg, sizeof(unsigned int));
42302 + return get_lsr_info (info, (unsigned int *)arg);
42304 + case TIOCSERGSTRUCT:
42305 + error = verify_area (VERIFY_WRITE, (void *)arg, sizeof(struct bcm_serial));
42308 + copy_to_user((struct bcm_serial *)arg, info, sizeof(struct bcm_serial));
42312 + return -ENOIOCTLCMD;
42317 +static void bcm_set_termios (struct tty_struct *tty, struct termios *old_termios)
42319 + struct bcm_serial *info = (struct bcm_serial *)tty->driver_data;
42321 + if( tty->termios->c_cflag != old_termios->c_cflag )
42322 + change_speed (info->port, tty->termios->c_cflag);
42326 + * ------------------------------------------------------------
42327 + * bcm63xx_cons_close()
42329 + * This routine is called when the serial port gets closed. First, we
42330 + * wait for the last remaining data to be sent. Then, we turn off
42331 + * the transmit enable and receive enable flags.
42332 + * ------------------------------------------------------------
42334 +static void bcm63xx_cons_close (struct tty_struct *tty, struct file *filp)
42336 + struct bcm_serial * info = (struct bcm_serial *)tty->driver_data;
42337 + unsigned long flags;
42342 + save_flags (flags);
42345 + if (tty_hung_up_p (filp))
42347 + restore_flags (flags);
42351 + if ((tty->count == 1) && (info->count != 1))
42354 + /* Uh, oh. tty->count is 1, which means that the tty
42355 + * structure will be freed. Info->count should always
42356 + * be one in these conditions. If it's greater than
42357 + * one, we've got real problems, since it means the
42358 + * serial port won't be shutdown.
42360 + printk("bcm63xx_cons_close: bad serial port count; tty->count is 1, "
42361 + "info->count is %d\n", info->count);
42365 + if (--info->count < 0)
42367 + printk("ds_close: bad serial port count for ttys%d: %d\n",
42368 + info->line, info->count);
42374 + restore_flags (flags);
42378 + /* Now we wait for the transmit buffer to clear; and we notify
42379 + * the line discipline to only process XON/XOFF characters.
42381 + tty->closing = 1;
42383 + /* At this point we stop accepting input. To do this, we
42384 + * disable the receive line status interrupts.
42387 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
42388 + if (tty->driver->flush_buffer)
42389 + tty->driver->flush_buffer (tty);
42391 + if (tty->driver.flush_buffer)
42392 + tty->driver.flush_buffer (tty);
42394 + if (tty->ldisc.flush_buffer)
42395 + tty->ldisc.flush_buffer (tty);
42397 + tty->closing = 0;
42400 + if (tty->ldisc.num != ldiscs[N_TTY].num)
42402 + if (tty->ldisc.close)
42403 + (tty->ldisc.close)(tty);
42404 + tty->ldisc = ldiscs[N_TTY];
42405 + tty->termios->c_line = N_TTY;
42406 + if (tty->ldisc.open)
42407 + (tty->ldisc.open)(tty);
42409 + if (info->blocked_open)
42411 + if (info->close_delay)
42413 + current->state = TASK_INTERRUPTIBLE;
42414 + schedule_timeout(info->close_delay);
42416 + wake_up_interruptible (&info->open_wait);
42418 + wake_up_interruptible (&info->close_wait);
42420 + restore_flags (flags);
42424 + * bcm_hangup () --- called by tty_hangup() when a hangup is signaled.
42426 +static void bcm_hangup (struct tty_struct *tty)
42429 + struct bcm_serial *info = (struct bcm_serial *)tty->driver_data;
42435 + wake_up_interruptible (&info->open_wait);
42439 + * ------------------------------------------------------------
42440 + * rs_open() and friends
42441 + * ------------------------------------------------------------
42443 +static int block_til_ready (struct tty_struct *tty, struct file *filp,
42444 + struct bcm_serial *info)
42450 + * This routine is called whenever a serial port is opened. It
42451 + * enables interrupts for a serial port. It also performs the
42452 + * serial-specific initialization for the tty structure.
42454 +static int bcm63xx_cons_open (struct tty_struct * tty, struct file * filp)
42456 + struct bcm_serial *info;
42457 + int retval, line;
42459 + // Make sure we're only opening on of the ports we support
42460 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
42461 + line = MINOR(tty->driver->cdev.dev) - tty->driver->minor_start;
42463 + line = MINOR(tty->device) - tty->driver.minor_start;
42466 + if ((line < 0) || (line >= BCM_NUM_UARTS))
42469 + info = lines[line];
42471 + info->port->intMask = 0; /* Clear any pending interrupts */
42472 + info->port->intMask = RXINT; /* Enable RX */
42475 + tty->driver_data = info;
42477 + BcmHalInterruptEnable (INTERRUPT_ID_UART);
42479 + // Start up serial port
42480 + retval = startup (info);
42484 + retval = block_til_ready (tty, filp, info);
42489 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
42490 + info->pgrp = process_group(current);
42491 + info->session = current->signal->session;
42493 + info->session = current->session;
42494 + info->pgrp = current->pgrp;
42500 +/* --------------------------------------------------------------------------
42501 + Name: bcm63xx_serialinit
42502 + Purpose: Initialize our BCM63xx serial driver
42503 +-------------------------------------------------------------------------- */
42504 +static int __init bcm63xx_serialinit(void)
42507 + struct bcm_serial * info;
42509 + // Print the driver version information
42512 + memset(&serial_driver, 0, sizeof(struct tty_driver));
42513 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
42514 + serial_driver.owner = THIS_MODULE;
42515 + serial_driver.devfs_name = "tts/";
42517 + serial_driver.magic = TTY_DRIVER_MAGIC;
42518 + serial_driver.name = "ttyS";
42519 + serial_driver.major = TTY_MAJOR;
42520 + serial_driver.minor_start = 64;
42521 + serial_driver.num = BCM_NUM_UARTS;
42522 + serial_driver.type = TTY_DRIVER_TYPE_SERIAL;
42523 + serial_driver.subtype = SERIAL_TYPE_NORMAL;
42524 + serial_driver.init_termios = tty_std_termios;
42525 + serial_driver.init_termios.c_cflag = B115200 | CS8 | CREAD | CLOCAL;
42526 + serial_driver.flags = TTY_DRIVER_REAL_RAW;
42527 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
42528 + serial_driver.refcount = serial_refcount;
42529 + serial_driver.ttys = serial_table;
42531 + serial_driver.refcount = &serial_refcount;
42532 + serial_driver.table = serial_table;
42535 + serial_driver.termios = serial_termios;
42536 + serial_driver.termios_locked = serial_termios_locked;
42537 + serial_driver.open = bcm63xx_cons_open;
42538 + serial_driver.close = bcm63xx_cons_close;
42539 + serial_driver.write = bcm63xx_cons_write;
42540 + serial_driver.flush_chars = bcm63xx_cons_flush_chars;
42541 + serial_driver.write_room = bcm63xx_cons_write_room;
42542 + serial_driver.chars_in_buffer = bcm_chars_in_buffer;
42543 + serial_driver.flush_buffer = bcm_flush_buffer;
42544 + serial_driver.ioctl = bcm_ioctl;
42545 + serial_driver.throttle = bcm_throttle;
42546 + serial_driver.unthrottle = bcm_unthrottle;
42547 + serial_driver.send_xchar = bcm_send_xchar;
42548 + serial_driver.set_termios = bcm_set_termios;
42549 + serial_driver.stop = bcm_stop;
42550 + serial_driver.start = bcm_start;
42551 + serial_driver.hangup = bcm_hangup;
42553 + if (tty_register_driver (&serial_driver))
42554 + panic("Couldn't register serial driver\n");
42556 + save_flags(flags); cli();
42557 + for (i = 0; i < BCM_NUM_UARTS; i++)
42559 + info = &multi[i];
42561 + info->port = (Uart *) ((char *)UART_BASE + (i * 0x20));
42562 + info->irq = (2 - i) + 8;
42565 + info->close_delay = 50;
42566 + info->closing_wait = 3000;
42567 + info->x_char = 0;
42570 + info->blocked_open = 0;
42571 + info->normal_termios = serial_driver.init_termios;
42572 + init_waitqueue_head(&info->open_wait);
42573 + init_waitqueue_head(&info->close_wait);
42575 + /* If we are pointing to address zero then punt - not correctly
42576 + * set up in setup.c to handle this.
42578 + if (! info->port)
42580 + BcmHalMapInterrupt(bcm_interrupt, 0, INTERRUPT_ID_UART);
42583 + /* order matters here... the trick is that flags
42584 + * is updated... in request_irq - to immediatedly obliterate
42587 + restore_flags(flags);
42591 +module_init(bcm63xx_serialinit);
42593 +/* --------------------------------------------------------------------------
42594 + Name: bcm_console_print
42595 + Purpose: bcm_console_print is registered for printk.
42596 + The console_lock must be held when we get here.
42597 +-------------------------------------------------------------------------- */
42598 +static void bcm_console_print (struct console * cons, const char * str,
42599 + unsigned int count)
42603 + for(i=0; i<count; i++, str++)
42613 +static struct tty_driver * bcm_console_device(struct console * c, int *index)
42615 + *index = c->index;
42616 + return &serial_driver;
42619 +static int __init bcm_console_setup(struct console * co, char * options)
42624 +static struct console bcm_sercons = {
42626 + .write = bcm_console_print,
42627 + .device = bcm_console_device,
42628 + .setup = bcm_console_setup,
42629 + .flags = CON_PRINTBUFFER, // CON_CONSDEV, CONSOLE_LINE,
42633 +static int __init bcm63xx_console_init(void)
42635 + register_console(&bcm_sercons);
42639 +console_initcall(bcm63xx_console_init);
42640 diff -urN linux-2.6.8.1/bcmdrivers/opensource/include/bcm963xx/6338_intr.h linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/include/bcm963xx/6338_intr.h
42641 --- linux-2.6.8.1/bcmdrivers/opensource/include/bcm963xx/6338_intr.h 1970-01-01 01:00:00.000000000 +0100
42642 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/include/bcm963xx/6338_intr.h 2006-06-26 09:07:10.000000000 +0200
42646 + Copyright 2003 Broadcom Corp. All Rights Reserved.
42648 + This program is free software; you can distribute it and/or modify it
42649 + under the terms of the GNU General Public License (Version 2) as
42650 + published by the Free Software Foundation.
42652 + This program is distributed in the hope it will be useful, but WITHOUT
42653 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
42654 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
42655 + for more details.
42657 + You should have received a copy of the GNU General Public License along
42658 + with this program; if not, write to the Free Software Foundation, Inc.,
42659 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
42663 +#ifndef __6338_INTR_H
42664 +#define __6338_INTR_H
42666 +#ifdef __cplusplus
42670 +/*=====================================================================*/
42671 +/* BCM6338 External Interrupt Level Assignments */
42672 +/*=====================================================================*/
42673 +#define INTERRUPT_ID_EXTERNAL_0 3
42674 +#define INTERRUPT_ID_EXTERNAL_1 4
42675 +#define INTERRUPT_ID_EXTERNAL_2 5
42676 +#define INTERRUPT_ID_EXTERNAL_3 6
42678 +/*=====================================================================*/
42679 +/* BCM6338 Timer Interrupt Level Assignments */
42680 +/*=====================================================================*/
42681 +#define MIPS_TIMER_INT 7
42683 +/*=====================================================================*/
42684 +/* Peripheral ISR Table Offset */
42685 +/*=====================================================================*/
42686 +#define INTERNAL_ISR_TABLE_OFFSET 8
42688 +/*=====================================================================*/
42689 +/* Logical Peripheral Interrupt IDs */
42690 +/*=====================================================================*/
42692 +#define INTERRUPT_ID_TIMER (INTERNAL_ISR_TABLE_OFFSET + 0)
42693 +#define INTERRUPT_ID_SPI (INTERNAL_ISR_TABLE_OFFSET + 1)
42694 +#define INTERRUPT_ID_UART (INTERNAL_ISR_TABLE_OFFSET + 2)
42695 +#define INTERRUPT_ID_DG (INTERNAL_ISR_TABLE_OFFSET + 4)
42696 +#define INTERRUPT_ID_ADSL (INTERNAL_ISR_TABLE_OFFSET + 5)
42697 +#define INTERRUPT_ID_ATM (INTERNAL_ISR_TABLE_OFFSET + 6)
42698 +#define INTERRUPT_ID_USBS (INTERNAL_ISR_TABLE_OFFSET + 7)
42699 +#define INTERRUPT_ID_EMAC1 (INTERNAL_ISR_TABLE_OFFSET + 8)
42700 +#define INTERRUPT_ID_EPHY (INTERNAL_ISR_TABLE_OFFSET + 9)
42701 +#define INTERRUPT_ID_SDRAM (INTERNAL_ISR_TABLE_OFFSET + 10)
42702 +#define INTERRUPT_ID_USB_CNTL_RX_DMA (INTERNAL_ISR_TABLE_OFFSET + 11)
42703 +#define INTERRUPT_ID_USB_CNTL_TX_DMA (INTERNAL_ISR_TABLE_OFFSET + 12)
42704 +#define INTERRUPT_ID_USB_BULK_RX_DMA (INTERNAL_ISR_TABLE_OFFSET + 13)
42705 +#define INTERRUPT_ID_USB_BULK_TX_DMA (INTERNAL_ISR_TABLE_OFFSET + 14)
42706 +#define INTERRUPT_ID_EMAC1_RX_DMA (INTERNAL_ISR_TABLE_OFFSET + 15)
42707 +#define INTERRUPT_ID_EMAC1_TX_DMA (INTERNAL_ISR_TABLE_OFFSET + 16)
42708 +#define INTERRUPT_ID_SDIO (INTERNAL_ISR_TABLE_OFFSET + 17)
42710 +#ifdef __cplusplus
42714 +#endif /* __BCM6338_H */
42716 diff -urN linux-2.6.8.1/bcmdrivers/opensource/include/bcm963xx/6338_map_part.h linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/include/bcm963xx/6338_map_part.h
42717 --- linux-2.6.8.1/bcmdrivers/opensource/include/bcm963xx/6338_map_part.h 1970-01-01 01:00:00.000000000 +0100
42718 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/include/bcm963xx/6338_map_part.h 2006-06-26 09:07:10.000000000 +0200
42722 + Copyright 2004 Broadcom Corp. All Rights Reserved.
42724 + This program is free software; you can distribute it and/or modify it
42725 + under the terms of the GNU General Public License (Version 2) as
42726 + published by the Free Software Foundation.
42728 + This program is distributed in the hope it will be useful, but WITHOUT
42729 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
42730 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
42731 + for more details.
42733 + You should have received a copy of the GNU General Public License along
42734 + with this program; if not, write to the Free Software Foundation, Inc.,
42735 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
42739 +#ifndef __BCM6338_MAP_H
42740 +#define __BCM6338_MAP_H
42746 +#include "bcmtypes.h"
42748 +#define PERF_BASE 0xfffe0000
42749 +#define TIMR_BASE 0xfffe0200
42750 +#define UART_BASE 0xfffe0300
42751 +#define GPIO_BASE 0xfffe0400
42752 +#define SPI_BASE 0xfffe0c00
42754 +typedef struct PerfControl {
42756 + uint16 testControl;
42757 + uint16 blkEnables;
42758 +#define EMAC_CLK_EN 0x0010
42759 +#define USBS_CLK_EN 0x0010
42760 +#define SAR_CLK_EN 0x0020
42762 +#define SPI_CLK_EN 0x0200
42764 + uint32 pll_control;
42765 +#define SOFT_RESET 0x00000001
42768 + uint32 IrqStatus;
42770 + uint32 ExtIrqCfg;
42771 +#define EI_SENSE_SHFT 0
42772 +#define EI_STATUS_SHFT 5
42773 +#define EI_CLEAR_SHFT 10
42774 +#define EI_MASK_SHFT 15
42775 +#define EI_INSENS_SHFT 20
42776 +#define EI_LEVEL_SHFT 25
42778 + uint32 unused[4]; /* (18) */
42779 + uint32 BlockSoftReset; /* (28) */
42780 +#define BSR_SPI 0x00000001
42781 +#define BSR_EMAC 0x00000004
42782 +#define BSR_USBH 0x00000008
42783 +#define BSR_USBS 0x00000010
42784 +#define BSR_ADSL 0x00000020
42785 +#define BSR_DMAMEM 0x00000040
42786 +#define BSR_SAR 0x00000080
42787 +#define BSR_ACLC 0x00000100
42788 +#define BSR_ADSL_MIPS_PLL 0x00000400
42789 +#define BSR_ALL_BLOCKS \
42790 + (BSR_SPI | BSR_EMAC | BSR_USBH | BSR_USBS | BSR_ADSL | BSR_DMAMEM | \
42791 + BSR_SAR | BSR_ACLC | BSR_ADSL_MIPS_PLL)
42794 +#define PERF ((volatile PerfControl * const) PERF_BASE)
42797 +typedef struct Timer {
42800 +#define TIMER0EN 0x01
42801 +#define TIMER1EN 0x02
42802 +#define TIMER2EN 0x04
42804 +#define TIMER0 0x01
42805 +#define TIMER1 0x02
42806 +#define TIMER2 0x04
42807 +#define WATCHDOG 0x08
42808 + uint32 TimerCtl0;
42809 + uint32 TimerCtl1;
42810 + uint32 TimerCtl2;
42811 +#define TIMERENABLE 0x80000000
42812 +#define RSTCNTCLR 0x40000000
42813 + uint32 TimerCnt0;
42814 + uint32 TimerCnt1;
42815 + uint32 TimerCnt2;
42816 + uint32 WatchDogDefCount;
42818 + /* Write 0xff00 0x00ff to Start timer
42819 + * Write 0xee00 0x00ee to Stop and re-load default count
42820 + * Read from this register returns current watch dog count
42822 + uint32 WatchDogCtl;
42824 + /* Number of 40-MHz ticks for WD Reset pulse to last */
42825 + uint32 WDResetCount;
42828 +#define TIMER ((volatile Timer * const) TIMR_BASE)
42829 +typedef struct UartChannel {
42832 +#define BRGEN 0x80 /* Control register bit defs */
42835 +#define LOOPBK 0x10
42836 +#define TXPARITYEN 0x08
42837 +#define TXPARITYEVEN 0x04
42838 +#define RXPARITYEN 0x02
42839 +#define RXPARITYEVEN 0x01
42842 +#define XMITBREAK 0x40
42843 +#define BITS5SYM 0x00
42844 +#define BITS6SYM 0x10
42845 +#define BITS7SYM 0x20
42846 +#define BITS8SYM 0x30
42847 +#define ONESTOP 0x07
42848 +#define TWOSTOP 0x0f
42849 + /* 4-LSBS represent STOP bits/char
42850 + * in 1/8 bit-time intervals. Zero
42851 + * represents 1/8 stop bit interval.
42852 + * Fifteen represents 2 stop bits.
42855 +#define RSTTXFIFOS 0x80
42856 +#define RSTRXFIFOS 0x40
42857 + /* 5-bit TimeoutCnt is in low bits of this register.
42858 + * This count represents the number of characters
42859 + * idle times before setting receive Irq when below threshold
42862 + /* When divide SysClk/2/(1+baudword) we should get 32*bit-rate
42865 + byte txf_levl; /* Read-only fifo depth */
42866 + byte rxf_levl; /* Read-only fifo depth */
42867 + byte fifocfg; /* Upper 4-bits are TxThresh, Lower are
42868 + * RxThreshold. Irq can be asserted
42869 + * when rx fifo> thresh, txfifo<thresh
42871 + byte prog_out; /* Set value of DTR (Bit0), RTS (Bit1)
42872 + * if these bits are also enabled to GPIO_o
42874 +#define DTREN 0x01
42875 +#define RTSEN 0x02
42878 + byte DeltaIPEdgeNoSense; /* Low 4-bits, set corr bit to 1 to
42879 + * detect irq on rising AND falling
42880 + * edges for corresponding GPIO_i
42881 + * if enabled (edge insensitive)
42883 + byte DeltaIPConfig_Mask; /* Upper 4 bits: 1 for posedge sense
42884 + * 0 for negedge sense if
42885 + * not configured for edge
42886 + * insensitive (see above)
42887 + * Lower 4 bits: Mask to enable change
42888 + * detection IRQ for corresponding
42891 + byte DeltaIP_SyncIP; /* Upper 4 bits show which bits
42892 + * have changed (may set IRQ).
42893 + * read automatically clears bit
42894 + * Lower 4 bits are actual status
42897 + uint16 intMask; /* Same Bit defs for Mask and status */
42898 + uint16 intStatus;
42899 +#define DELTAIP 0x0001
42900 +#define TXUNDERR 0x0002
42901 +#define TXOVFERR 0x0004
42902 +#define TXFIFOTHOLD 0x0008
42903 +#define TXREADLATCH 0x0010
42904 +#define TXFIFOEMT 0x0020
42905 +#define RXUNDERR 0x0040
42906 +#define RXOVFERR 0x0080
42907 +#define RXTIMEOUT 0x0100
42908 +#define RXFIFOFULL 0x0200
42909 +#define RXFIFOTHOLD 0x0400
42910 +#define RXFIFONE 0x0800
42911 +#define RXFRAMERR 0x1000
42912 +#define RXPARERR 0x2000
42913 +#define RXBRK 0x4000
42916 + uint16 Data; /* Write to TX, Read from RX */
42917 + /* bits 11:8 are BRK,PAR,FRM errors */
42923 +#define UART ((volatile Uart * const) UART_BASE)
42925 +typedef struct GpioControl {
42927 + uint32 GPIODir; /* bits 7:0 */
42929 + uint32 GPIOio; /* bits 7:0 */
42931 +#define LED3_STROBE 0x08000000
42932 +#define LED2_STROBE 0x04000000
42933 +#define LED1_STROBE 0x02000000
42934 +#define LED0_STROBE 0x01000000
42935 +#define LED_TEST 0x00010000
42936 +#define LED3_DISABLE_LINK_ACT 0x00008000
42937 +#define LED2_DISABLE_LINK_ACT 0x00004000
42938 +#define LED1_DISABLE_LINK_ACT 0x00002000
42939 +#define LED0_DISABLE_LINK_ACT 0x00001000
42940 +#define LED_INTERVAL_SET_MASK 0x00000f00
42941 +#define LED_INTERVAL_SET_320MS 0x00000500
42942 +#define LED_INTERVAL_SET_160MS 0x00000400
42943 +#define LED_INTERVAL_SET_80MS 0x00000300
42944 +#define LED_INTERVAL_SET_40MS 0x00000200
42945 +#define LED_INTERVAL_SET_20MS 0x00000100
42946 +#define LED3_ON 0x00000080
42947 +#define LED2_ON 0x00000040
42948 +#define LED1_ON 0x00000020
42949 +#define LED0_ON 0x00000010
42950 +#define LED3_ENABLE 0x00000008
42951 +#define LED2_ENABLE 0x00000004
42952 +#define LED1_ENABLE 0x00000002
42953 +#define LED0_ENABLE 0x00000001
42954 + uint32 SpiSlaveCfg;
42955 +#define SPI_SLAVE_RESET 0x00010000
42956 +#define SPI_RESTRICT 0x00000400
42957 +#define SPI_DELAY_DISABLE 0x00000200
42958 +#define SPI_PROBE_MUX_SEL_MASK 0x000001e0
42959 +#define SPI_SER_ADDR_CFG_MASK 0x0000000c
42960 +#define SPI_MODE 0x00000001
42961 + uint32 vRegConfig;
42964 +#define GPIO ((volatile GpioControl * const) GPIO_BASE)
42966 +/* Number to mask conversion macro used for GPIODir and GPIOio */
42967 +#define GPIO_NUM_MAX_BITS_MASK 0x0f
42968 +#define GPIO_NUM_TO_MASK(X) (1 << ((X) & GPIO_NUM_MAX_BITS_MASK))
42974 +typedef struct SpiControl {
42975 + uint16 spiCmd; /* (0x0): SPI command */
42976 +#define SPI_CMD_START_IMMEDIATE 3
42978 +#define SPI_CMD_COMMAND_SHIFT 0
42979 +#define SPI_CMD_DEVICE_ID_SHIFT 4
42980 +#define SPI_CMD_PREPEND_BYTE_CNT_SHIFT 8
42982 + byte spiIntStatus; /* (0x2): SPI interrupt status */
42983 + byte spiMaskIntStatus; /* (0x3): SPI masked interrupt status */
42985 + byte spiIntMask; /* (0x4): SPI interrupt mask */
42986 +#define SPI_INTR_CMD_DONE 0x01
42987 +#define SPI_INTR_CLEAR_ALL 0x1f
42989 + byte spiStatus; /* (0x5): SPI status */
42991 + byte spiClkCfg; /* (0x6): SPI clock configuration */
42993 + byte spiFillByte; /* (0x7): SPI fill byte */
42996 + byte spiMsgTail; /* (0x9): msgtail */
42998 + byte spiRxTail; /* (0xB): rxtail */
43000 + uint32 unused2[13]; /* (0x0c - 0x3c) reserved */
43002 + byte spiMsgCtl; /* (0x40) control byte */
43003 +#define HALF_DUPLEX_W 1
43004 +#define HALF_DUPLEX_R 2
43005 +#define SPI_MSG_TYPE_SHIFT 6
43006 +#define SPI_BYTE_CNT_SHIFT 0
43007 + byte spiMsgData[63]; /* (0x41 - 0x7f) msg data */
43008 + byte spiRxDataFifo[64]; /* (0x80 - 0xbf) rx data */
43009 + byte unused3[64]; /* (0xc0 - 0xff) reserved */
43012 +#define SPI ((volatile SpiControl * const) SPI_BASE)
43015 +** External Bus Interface
43017 +typedef struct EbiChipSelect {
43018 + uint32 base; /* base address in upper 24 bits */
43019 +#define EBI_SIZE_8K 0
43020 +#define EBI_SIZE_16K 1
43021 +#define EBI_SIZE_32K 2
43022 +#define EBI_SIZE_64K 3
43023 +#define EBI_SIZE_128K 4
43024 +#define EBI_SIZE_256K 5
43025 +#define EBI_SIZE_512K 6
43026 +#define EBI_SIZE_1M 7
43027 +#define EBI_SIZE_2M 8
43028 +#define EBI_SIZE_4M 9
43029 +#define EBI_SIZE_8M 10
43030 +#define EBI_SIZE_16M 11
43031 +#define EBI_SIZE_32M 12
43032 +#define EBI_SIZE_64M 13
43033 +#define EBI_SIZE_128M 14
43034 +#define EBI_SIZE_256M 15
43036 +#define EBI_ENABLE 0x00000001 /* .. enable this range */
43037 +#define EBI_WAIT_STATES 0x0000000e /* .. mask for wait states */
43038 +#define EBI_WTST_SHIFT 1 /* .. for shifting wait states */
43039 +#define EBI_WORD_WIDE 0x00000010 /* .. 16-bit peripheral, else 8 */
43040 +#define EBI_WREN 0x00000020 /* enable posted writes */
43041 +#define EBI_POLARITY 0x00000040 /* .. set to invert something,
43042 + ** don't know what yet */
43043 +#define EBI_TS_TA_MODE 0x00000080 /* .. use TS/TA mode */
43044 +#define EBI_TS_SEL 0x00000100 /* .. drive tsize, not bs_b */
43045 +#define EBI_FIFO 0x00000200 /* .. use fifo */
43046 +#define EBI_RE 0x00000400 /* .. Reverse Endian */
43049 +typedef struct MpiRegisters {
43050 + EbiChipSelect cs[1]; /* size chip select configuration */
43053 +#define MPI ((volatile MpiRegisters * const) MPI_BASE)
43061 diff -urN linux-2.6.8.1/bcmdrivers/opensource/include/bcm963xx/6345_intr.h linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/include/bcm963xx/6345_intr.h
43062 --- linux-2.6.8.1/bcmdrivers/opensource/include/bcm963xx/6345_intr.h 1970-01-01 01:00:00.000000000 +0100
43063 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/include/bcm963xx/6345_intr.h 2006-06-26 09:07:10.000000000 +0200
43067 + Copyright 2002 Broadcom Corp. All Rights Reserved.
43069 + This program is free software; you can distribute it and/or modify it
43070 + under the terms of the GNU General Public License (Version 2) as
43071 + published by the Free Software Foundation.
43073 + This program is distributed in the hope it will be useful, but WITHOUT
43074 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
43075 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
43076 + for more details.
43078 + You should have received a copy of the GNU General Public License along
43079 + with this program; if not, write to the Free Software Foundation, Inc.,
43080 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
43084 +#ifndef __6345_INTR_H
43085 +#define __6345_INTR_H
43087 +#ifdef __cplusplus
43091 +/*=====================================================================*/
43092 +/* BCM6345 External Interrupt Level Assignments */
43093 +/*=====================================================================*/
43094 +#define INTERRUPT_ID_EXTERNAL_0 3
43095 +#define INTERRUPT_ID_EXTERNAL_1 4
43096 +#define INTERRUPT_ID_EXTERNAL_2 5
43097 +#define INTERRUPT_ID_EXTERNAL_3 6
43099 +/*=====================================================================*/
43100 +/* BCM6345 Timer Interrupt Level Assignments */
43101 +/*=====================================================================*/
43102 +#define MIPS_TIMER_INT 7
43104 +/*=====================================================================*/
43105 +/* Peripheral ISR Table Offset */
43106 +/*=====================================================================*/
43107 +#define INTERNAL_ISR_TABLE_OFFSET 8
43108 +#define DMA_ISR_TABLE_OFFSET (INTERNAL_ISR_TABLE_OFFSET + 13)
43110 +/*=====================================================================*/
43111 +/* Logical Peripheral Interrupt IDs */
43112 +/*=====================================================================*/
43114 +/* Internal peripheral interrupt IDs */
43115 +#define INTERRUPT_ID_TIMER (INTERNAL_ISR_TABLE_OFFSET + 0)
43116 +#define INTERRUPT_ID_UART (INTERNAL_ISR_TABLE_OFFSET + 2)
43117 +#define INTERRUPT_ID_ADSL (INTERNAL_ISR_TABLE_OFFSET + 3)
43118 +#define INTERRUPT_ID_ATM (INTERNAL_ISR_TABLE_OFFSET + 4)
43119 +#define INTERRUPT_ID_USB (INTERNAL_ISR_TABLE_OFFSET + 5)
43120 +#define INTERRUPT_ID_EMAC (INTERNAL_ISR_TABLE_OFFSET + 8)
43121 +#define INTERRUPT_ID_EPHY (INTERNAL_ISR_TABLE_OFFSET + 12)
43123 +/* DMA channel interrupt IDs */
43124 +#define INTERRUPT_ID_EMAC_RX_CHAN (DMA_ISR_TABLE_OFFSET + EMAC_RX_CHAN)
43125 +#define INTERRUPT_ID_EMAC_TX_CHAN (DMA_ISR_TABLE_OFFSET + EMAC_TX_CHAN)
43126 +#define INTERRUPT_ID_EBI_RX_CHAN (DMA_ISR_TABLE_OFFSET + EBI_RX_CHAN)
43127 +#define INTERRUPT_ID_EBI_TX_CHAN (DMA_ISR_TABLE_OFFSET + EBI_TX_CHAN)
43128 +#define INTERRUPT_ID_RESERVED_RX_CHAN (DMA_ISR_TABLE_OFFSET + RESERVED_RX_CHAN)
43129 +#define INTERRUPT_ID_RESERVED_TX_CHAN (DMA_ISR_TABLE_OFFSET + RESERVED_TX_CHAN)
43130 +#define INTERRUPT_ID_USB_BULK_RX_CHAN (DMA_ISR_TABLE_OFFSET + USB_BULK_RX_CHAN)
43131 +#define INTERRUPT_ID_USB_BULK_TX_CHAN (DMA_ISR_TABLE_OFFSET + USB_BULK_TX_CHAN)
43132 +#define INTERRUPT_ID_USB_CNTL_RX_CHAN (DMA_ISR_TABLE_OFFSET + USB_CNTL_RX_CHAN)
43133 +#define INTERRUPT_ID_USB_CNTL_TX_CHAN (DMA_ISR_TABLE_OFFSET + USB_CNTL_TX_CHAN)
43134 +#define INTERRUPT_ID_USB_ISO_RX_CHAN (DMA_ISR_TABLE_OFFSET + USB_ISO_RX_CHAN)
43135 +#define INTERRUPT_ID_USB_ISO_TX_CHAN (DMA_ISR_TABLE_OFFSET + USB_ISO_TX_CHAN)
43137 +#ifdef __cplusplus
43141 +#endif /* __BCM6345_H */
43143 diff -urN linux-2.6.8.1/bcmdrivers/opensource/include/bcm963xx/6345_map_part.h linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/include/bcm963xx/6345_map_part.h
43144 --- linux-2.6.8.1/bcmdrivers/opensource/include/bcm963xx/6345_map_part.h 1970-01-01 01:00:00.000000000 +0100
43145 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/include/bcm963xx/6345_map_part.h 2006-06-26 09:07:10.000000000 +0200
43149 + Copyright 2002 Broadcom Corp. All Rights Reserved.
43151 + This program is free software; you can distribute it and/or modify it
43152 + under the terms of the GNU General Public License (Version 2) as
43153 + published by the Free Software Foundation.
43155 + This program is distributed in the hope it will be useful, but WITHOUT
43156 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
43157 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
43158 + for more details.
43160 + You should have received a copy of the GNU General Public License along
43161 + with this program; if not, write to the Free Software Foundation, Inc.,
43162 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
43166 +#ifndef __BCM6345_MAP_H
43167 +#define __BCM6345_MAP_H
43173 +#include "bcmtypes.h"
43174 +#include "6345_intr.h"
43176 +typedef struct IntControl {
43178 + uint16 testControl;
43179 + uint16 blkEnables;
43180 +#define USB_CLK_EN 0x0100
43181 +#define EMAC_CLK_EN 0x0080
43182 +#define UART_CLK_EN 0x0008
43183 +#define CPU_CLK_EN 0x0001
43185 + uint32 pll_control;
43186 +#define SOFT_RESET 0x00000001
43189 + uint32 IrqStatus;
43191 + uint32 ExtIrqCfg;
43192 +#define EI_SENSE_SHFT 0
43193 +#define EI_STATUS_SHFT 4
43194 +#define EI_CLEAR_SHFT 8
43195 +#define EI_MASK_SHFT 12
43196 +#define EI_INSENS_SHFT 16
43197 +#define EI_LEVEL_SHFT 20
43200 +#define INTC_BASE 0xfffe0000
43201 +#define PERF ((volatile IntControl * const) INTC_BASE)
43203 +#define TIMR_BASE 0xfffe0200
43204 +typedef struct Timer {
43207 +#define TIMER0EN 0x01
43208 +#define TIMER1EN 0x02
43209 +#define TIMER2EN 0x04
43211 +#define TIMER0 0x01
43212 +#define TIMER1 0x02
43213 +#define TIMER2 0x04
43214 +#define WATCHDOG 0x08
43215 + uint32 TimerCtl0;
43216 + uint32 TimerCtl1;
43217 + uint32 TimerCtl2;
43218 +#define TIMERENABLE 0x80000000
43219 +#define RSTCNTCLR 0x40000000
43220 + uint32 TimerCnt0;
43221 + uint32 TimerCnt1;
43222 + uint32 TimerCnt2;
43223 + uint32 WatchDogDefCount;
43225 + /* Write 0xff00 0x00ff to Start timer
43226 + * Write 0xee00 0x00ee to Stop and re-load default count
43227 + * Read from this register returns current watch dog count
43229 + uint32 WatchDogCtl;
43231 + /* Number of 40-MHz ticks for WD Reset pulse to last */
43232 + uint32 WDResetCount;
43235 +#define TIMER ((volatile Timer * const) TIMR_BASE)
43237 +typedef struct UartChannel {
43240 +#define BRGEN 0x80 /* Control register bit defs */
43243 +#define TXPARITYEN 0x08
43244 +#define TXPARITYEVEN 0x04
43245 +#define RXPARITYEN 0x02
43246 +#define RXPARITYEVEN 0x01
43248 +#define BITS5SYM 0x00
43249 +#define BITS6SYM 0x10
43250 +#define BITS7SYM 0x20
43251 +#define BITS8SYM 0x30
43252 +#define XMITBREAK 0x40
43253 +#define ONESTOP 0x07
43254 +#define TWOSTOP 0x0f
43257 +#define RSTTXFIFOS 0x80
43258 +#define RSTRXFIFOS 0x40
43267 + byte DeltaIPEdgeNoSense;
43268 + byte DeltaIPConfig_Mask;
43269 + byte DeltaIP_SyncIP;
43271 + uint16 intStatus;
43272 +#define TXUNDERR 0x0002
43273 +#define TXOVFERR 0x0004
43274 +#define TXFIFOEMT 0x0020
43275 +#define RXOVFERR 0x0080
43276 +#define RXFIFONE 0x0800
43277 +#define RXFRAMERR 0x1000
43278 +#define RXPARERR 0x2000
43279 +#define RXBRK 0x4000
43287 +#define UART_BASE 0xfffe0300
43288 +#define UART ((volatile Uart * const) UART_BASE)
43290 +typedef struct GpioControl {
43304 +#define GPIO_BASE 0xfffe0400
43305 +#define GPIO ((volatile GpioControl * const) GPIO_BASE)
43307 +#define GPIO_NUM_MAX_BITS_MASK 0x0f
43308 +#define GPIO_NUM_TO_MASK(X) (1 << ((X) & GPIO_NUM_MAX_BITS_MASK))
43316 diff -urN linux-2.6.8.1/bcmdrivers/opensource/include/bcm963xx/6348_intr.h linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/include/bcm963xx/6348_intr.h
43317 --- linux-2.6.8.1/bcmdrivers/opensource/include/bcm963xx/6348_intr.h 1970-01-01 01:00:00.000000000 +0100
43318 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/include/bcm963xx/6348_intr.h 2006-06-26 09:07:10.000000000 +0200
43322 + Copyright 2003 Broadcom Corp. All Rights Reserved.
43324 + This program is free software; you can distribute it and/or modify it
43325 + under the terms of the GNU General Public License (Version 2) as
43326 + published by the Free Software Foundation.
43328 + This program is distributed in the hope it will be useful, but WITHOUT
43329 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
43330 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
43331 + for more details.
43333 + You should have received a copy of the GNU General Public License along
43334 + with this program; if not, write to the Free Software Foundation, Inc.,
43335 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
43339 +#ifndef __6348_INTR_H
43340 +#define __6348_INTR_H
43342 +#ifdef __cplusplus
43346 +/*=====================================================================*/
43347 +/* BCM6348 External Interrupt Level Assignments */
43348 +/*=====================================================================*/
43349 +#define INTERRUPT_ID_EXTERNAL_0 3
43350 +#define INTERRUPT_ID_EXTERNAL_1 4
43351 +#define INTERRUPT_ID_EXTERNAL_2 5
43352 +#define INTERRUPT_ID_EXTERNAL_3 6
43354 +/*=====================================================================*/
43355 +/* BCM6348 Timer Interrupt Level Assignments */
43356 +/*=====================================================================*/
43357 +#define MIPS_TIMER_INT 7
43359 +/*=====================================================================*/
43360 +/* Peripheral ISR Table Offset */
43361 +/*=====================================================================*/
43362 +#define INTERNAL_ISR_TABLE_OFFSET 8
43364 +/*=====================================================================*/
43365 +/* Logical Peripheral Interrupt IDs */
43366 +/*=====================================================================*/
43368 +#define INTERRUPT_ID_TIMER (INTERNAL_ISR_TABLE_OFFSET + 0)
43369 +#define INTERRUPT_ID_SPI (INTERNAL_ISR_TABLE_OFFSET + 1)
43370 +#define INTERRUPT_ID_UART (INTERNAL_ISR_TABLE_OFFSET + 2)
43371 +#define INTERRUPT_ID_ADSL (INTERNAL_ISR_TABLE_OFFSET + 4)
43372 +#define INTERRUPT_ID_ATM (INTERNAL_ISR_TABLE_OFFSET + 5)
43373 +#define INTERRUPT_ID_USBS (INTERNAL_ISR_TABLE_OFFSET + 6)
43374 +#define INTERRUPT_ID_EMAC2 (INTERNAL_ISR_TABLE_OFFSET + 7)
43375 +#define INTERRUPT_ID_EMAC1 (INTERNAL_ISR_TABLE_OFFSET + 8)
43376 +#define INTERRUPT_ID_EPHY (INTERNAL_ISR_TABLE_OFFSET + 9)
43377 +#define INTERRUPT_ID_M2M (INTERNAL_ISR_TABLE_OFFSET + 10)
43378 +#define INTERRUPT_ID_ACLC (INTERNAL_ISR_TABLE_OFFSET + 11)
43379 +#define INTERRUPT_ID_USBH (INTERNAL_ISR_TABLE_OFFSET + 12)
43380 +#define INTERRUPT_ID_SDRAM (INTERNAL_ISR_TABLE_OFFSET + 13)
43381 +#define INTERRUPT_ID_USB_CNTL_RX_DMA (INTERNAL_ISR_TABLE_OFFSET + 14)
43382 +#define INTERRUPT_ID_USB_CNTL_TX_DMA (INTERNAL_ISR_TABLE_OFFSET + 15)
43383 +#define INTERRUPT_ID_USB_BULK_RX_DMA (INTERNAL_ISR_TABLE_OFFSET + 16)
43384 +#define INTERRUPT_ID_USB_BULK_TX_DMA (INTERNAL_ISR_TABLE_OFFSET + 17)
43385 +#define INTERRUPT_ID_USB_ISO_RX_DMA (INTERNAL_ISR_TABLE_OFFSET + 18)
43386 +#define INTERRUPT_ID_USB_ISO_TX_DMA (INTERNAL_ISR_TABLE_OFFSET + 19)
43387 +#define INTERRUPT_ID_EMAC1_RX_DMA (INTERNAL_ISR_TABLE_OFFSET + 20)
43388 +#define INTERRUPT_ID_EMAC1_TX_DMA (INTERNAL_ISR_TABLE_OFFSET + 21)
43389 +#define INTERRUPT_ID_EMAC2_RX_DMA (INTERNAL_ISR_TABLE_OFFSET + 22)
43390 +#define INTERRUPT_ID_EMAC2_TX_DMA (INTERNAL_ISR_TABLE_OFFSET + 23)
43391 +#define INTERRUPT_ID_MPI (INTERNAL_ISR_TABLE_OFFSET + 24)
43392 +#define INTERRUPT_ID_DG (INTERNAL_ISR_TABLE_OFFSET + 25)
43394 +#ifdef __cplusplus
43398 +#endif /* __BCM6348_H */
43400 diff -urN linux-2.6.8.1/bcmdrivers/opensource/include/bcm963xx/6348_map_part.h linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/include/bcm963xx/6348_map_part.h
43401 --- linux-2.6.8.1/bcmdrivers/opensource/include/bcm963xx/6348_map_part.h 1970-01-01 01:00:00.000000000 +0100
43402 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/include/bcm963xx/6348_map_part.h 2006-06-26 09:07:10.000000000 +0200
43406 + Copyright 2002 Broadcom Corp. All Rights Reserved.
43408 + This program is free software; you can distribute it and/or modify it
43409 + under the terms of the GNU General Public License (Version 2) as
43410 + published by the Free Software Foundation.
43412 + This program is distributed in the hope it will be useful, but WITHOUT
43413 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
43414 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
43415 + for more details.
43417 + You should have received a copy of the GNU General Public License along
43418 + with this program; if not, write to the Free Software Foundation, Inc.,
43419 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
43423 +#ifndef __BCM6348_MAP_H
43424 +#define __BCM6348_MAP_H
43430 +#include "bcmtypes.h"
43432 +#define PERF_BASE 0xfffe0000
43433 +#define TIMR_BASE 0xfffe0200
43434 +#define UART_BASE 0xfffe0300
43435 +#define GPIO_BASE 0xfffe0400
43436 +#define MPI_BASE 0xfffe2000 /* MPI control registers */
43437 +#define USB_HOST_BASE 0xfffe1b00 /* USB host registers */
43438 +#define USB_HOST_NON_OHCI 0xfffe1c00 /* USB host non-OHCI registers */
43440 +typedef struct PerfControl {
43442 + uint16 testControl;
43443 + uint16 blkEnables;
43444 +#define EMAC_CLK_EN 0x0010
43445 +#define SAR_CLK_EN 0x0020
43446 +#define USBS_CLK_EN 0x0040
43447 +#define USBH_CLK_EN 0x0100
43449 + uint32 pll_control;
43450 +#define SOFT_RESET 0x00000001
43453 + uint32 IrqStatus;
43455 + uint32 ExtIrqCfg;
43456 +#define EI_SENSE_SHFT 0
43457 +#define EI_STATUS_SHFT 5
43458 +#define EI_CLEAR_SHFT 10
43459 +#define EI_MASK_SHFT 15
43460 +#define EI_INSENS_SHFT 20
43461 +#define EI_LEVEL_SHFT 25
43463 + uint32 unused[4]; /* (18) */
43464 + uint32 BlockSoftReset; /* (28) */
43465 +#define BSR_SPI 0x00000001
43466 +#define BSR_EMAC 0x00000004
43467 +#define BSR_USBH 0x00000008
43468 +#define BSR_USBS 0x00000010
43469 +#define BSR_ADSL 0x00000020
43470 +#define BSR_DMAMEM 0x00000040
43471 +#define BSR_SAR 0x00000080
43472 +#define BSR_ACLC 0x00000100
43473 +#define BSR_ADSL_MIPS_PLL 0x00000400
43474 +#define BSR_ALL_BLOCKS \
43475 + (BSR_SPI | BSR_EMAC | BSR_USBH | BSR_USBS | BSR_ADSL | BSR_DMAMEM | \
43476 + BSR_SAR | BSR_ACLC | BSR_ADSL_MIPS_PLL)
43477 + uint32 unused2[2]; /* (2c) */
43478 + uint32 PllStrap; /* (34) */
43479 +#define PLL_N1_SHFT 20
43480 +#define PLL_N1_MASK (7<<PLL_N1_SHFT)
43481 +#define PLL_N2_SHFT 15
43482 +#define PLL_N2_MASK (0x1f<<PLL_N2_SHFT)
43483 +#define PLL_M1_REF_SHFT 12
43484 +#define PLL_M1_REF_MASK (7<<PLL_M1_REF_SHFT)
43485 +#define PLL_M2_REF_SHFT 9
43486 +#define PLL_M2_REF_MASK (7<<PLL_M2_REF_SHFT)
43487 +#define PLL_M1_CPU_SHFT 6
43488 +#define PLL_M1_CPU_MASK (7<<PLL_M1_CPU_SHFT)
43489 +#define PLL_M1_BUS_SHFT 3
43490 +#define PLL_M1_BUS_MASK (7<<PLL_M1_BUS_SHFT)
43491 +#define PLL_M2_BUS_SHFT 0
43492 +#define PLL_M2_BUS_MASK (7<<PLL_M2_BUS_SHFT)
43495 +#define PERF ((volatile PerfControl * const) PERF_BASE)
43497 +typedef struct Timer {
43500 +#define TIMER0EN 0x01
43501 +#define TIMER1EN 0x02
43502 +#define TIMER2EN 0x04
43504 +#define TIMER0 0x01
43505 +#define TIMER1 0x02
43506 +#define TIMER2 0x04
43507 +#define WATCHDOG 0x08
43508 + uint32 TimerCtl0;
43509 + uint32 TimerCtl1;
43510 + uint32 TimerCtl2;
43511 +#define TIMERENABLE 0x80000000
43512 +#define RSTCNTCLR 0x40000000
43513 + uint32 TimerCnt0;
43514 + uint32 TimerCnt1;
43515 + uint32 TimerCnt2;
43516 + uint32 WatchDogDefCount;
43518 + /* Write 0xff00 0x00ff to Start timer
43519 + * Write 0xee00 0x00ee to Stop and re-load default count
43520 + * Read from this register returns current watch dog count
43522 + uint32 WatchDogCtl;
43524 + /* Number of 40-MHz ticks for WD Reset pulse to last */
43525 + uint32 WDResetCount;
43528 +#define TIMER ((volatile Timer * const) TIMR_BASE)
43530 +typedef struct UartChannel {
43533 +#define BRGEN 0x80 /* Control register bit defs */
43536 +#define LOOPBK 0x10
43537 +#define TXPARITYEN 0x08
43538 +#define TXPARITYEVEN 0x04
43539 +#define RXPARITYEN 0x02
43540 +#define RXPARITYEVEN 0x01
43543 +#define XMITBREAK 0x40
43544 +#define BITS5SYM 0x00
43545 +#define BITS6SYM 0x10
43546 +#define BITS7SYM 0x20
43547 +#define BITS8SYM 0x30
43548 +#define ONESTOP 0x07
43549 +#define TWOSTOP 0x0f
43550 + /* 4-LSBS represent STOP bits/char
43551 + * in 1/8 bit-time intervals. Zero
43552 + * represents 1/8 stop bit interval.
43553 + * Fifteen represents 2 stop bits.
43556 +#define RSTTXFIFOS 0x80
43557 +#define RSTRXFIFOS 0x40
43558 + /* 5-bit TimeoutCnt is in low bits of this register.
43559 + * This count represents the number of characters
43560 + * idle times before setting receive Irq when below threshold
43563 + /* When divide SysClk/2/(1+baudword) we should get 32*bit-rate
43566 + byte txf_levl; /* Read-only fifo depth */
43567 + byte rxf_levl; /* Read-only fifo depth */
43568 + byte fifocfg; /* Upper 4-bits are TxThresh, Lower are
43569 + * RxThreshold. Irq can be asserted
43570 + * when rx fifo> thresh, txfifo<thresh
43572 + byte prog_out; /* Set value of DTR (Bit0), RTS (Bit1)
43573 + * if these bits are also enabled to GPIO_o
43575 +#define DTREN 0x01
43576 +#define RTSEN 0x02
43579 + byte DeltaIPEdgeNoSense; /* Low 4-bits, set corr bit to 1 to
43580 + * detect irq on rising AND falling
43581 + * edges for corresponding GPIO_i
43582 + * if enabled (edge insensitive)
43584 + byte DeltaIPConfig_Mask; /* Upper 4 bits: 1 for posedge sense
43585 + * 0 for negedge sense if
43586 + * not configured for edge
43587 + * insensitive (see above)
43588 + * Lower 4 bits: Mask to enable change
43589 + * detection IRQ for corresponding
43592 + byte DeltaIP_SyncIP; /* Upper 4 bits show which bits
43593 + * have changed (may set IRQ).
43594 + * read automatically clears bit
43595 + * Lower 4 bits are actual status
43598 + uint16 intMask; /* Same Bit defs for Mask and status */
43599 + uint16 intStatus;
43600 +#define DELTAIP 0x0001
43601 +#define TXUNDERR 0x0002
43602 +#define TXOVFERR 0x0004
43603 +#define TXFIFOTHOLD 0x0008
43604 +#define TXREADLATCH 0x0010
43605 +#define TXFIFOEMT 0x0020
43606 +#define RXUNDERR 0x0040
43607 +#define RXOVFERR 0x0080
43608 +#define RXTIMEOUT 0x0100
43609 +#define RXFIFOFULL 0x0200
43610 +#define RXFIFOTHOLD 0x0400
43611 +#define RXFIFONE 0x0800
43612 +#define RXFRAMERR 0x1000
43613 +#define RXPARERR 0x2000
43614 +#define RXBRK 0x4000
43617 + uint16 Data; /* Write to TX, Read from RX */
43618 + /* bits 11:8 are BRK,PAR,FRM errors */
43624 +#define UART ((volatile Uart * const) UART_BASE)
43626 +typedef struct GpioControl {
43627 + uint32 GPIODir_high; /* bits 36:32 */
43628 + uint32 GPIODir; /* bits 31:00 */
43629 + uint32 GPIOio_high; /* bits 36:32 */
43630 + uint32 GPIOio; /* bits 31:00 */
43632 +#define LED3_STROBE 0x08000000
43633 +#define LED2_STROBE 0x04000000
43634 +#define LED1_STROBE 0x02000000
43635 +#define LED0_STROBE 0x01000000
43636 +#define LED_TEST 0x00010000
43637 +#define LED3_DISABLE_LINK_ACT 0x00008000
43638 +#define LED2_DISABLE_LINK_ACT 0x00004000
43639 +#define LED1_DISABLE_LINK_ACT 0x00002000
43640 +#define LED0_DISABLE_LINK_ACT 0x00001000
43641 +#define LED_INTERVAL_SET_MASK 0x00000f00
43642 +#define LED_INTERVAL_SET_320MS 0x00000500
43643 +#define LED_INTERVAL_SET_160MS 0x00000400
43644 +#define LED_INTERVAL_SET_80MS 0x00000300
43645 +#define LED_INTERVAL_SET_40MS 0x00000200
43646 +#define LED_INTERVAL_SET_20MS 0x00000100
43647 +#define LED3_ON 0x00000080
43648 +#define LED2_ON 0x00000040
43649 +#define LED1_ON 0x00000020
43650 +#define LED0_ON 0x00000010
43651 +#define LED3_ENABLE 0x00000008
43652 +#define LED2_ENABLE 0x00000004
43653 +#define LED1_ENABLE 0x00000002
43654 +#define LED0_ENABLE 0x00000001
43655 + uint32 SpiSlaveCfg;
43656 +#define SPI_SLAVE_RESET 0x00010000
43657 +#define SPI_RESTRICT 0x00000400
43658 +#define SPI_DELAY_DISABLE 0x00000200
43659 +#define SPI_PROBE_MUX_SEL_MASK 0x000001e0
43660 +#define SPI_SER_ADDR_CFG_MASK 0x0000000c
43661 +#define SPI_MODE 0x00000001
43663 +#define GROUP4_DIAG 0x00090000
43664 +#define GROUP4_UTOPIA 0x00080000
43665 +#define GROUP4_LEGACY_LED 0x00030000
43666 +#define GROUP4_MII_SNOOP 0x00020000
43667 +#define GROUP4_EXT_EPHY 0x00010000
43668 +#define GROUP3_DIAG 0x00009000
43669 +#define GROUP3_UTOPIA 0x00008000
43670 +#define GROUP3_EXT_MII 0x00007000
43671 +#define GROUP2_DIAG 0x00000900
43672 +#define GROUP2_PCI 0x00000500
43673 +#define GROUP1_DIAG 0x00000090
43674 +#define GROUP1_UTOPIA 0x00000080
43675 +#define GROUP1_SPI_UART 0x00000060
43676 +#define GROUP1_SPI_MASTER 0x00000060
43677 +#define GROUP1_MII_PCCARD 0x00000040
43678 +#define GROUP1_MII_SNOOP 0x00000020
43679 +#define GROUP1_EXT_EPHY 0x00000010
43680 +#define GROUP0_DIAG 0x00000009
43681 +#define GROUP0_EXT_MII 0x00000007
43685 +#define GPIO ((volatile GpioControl * const) GPIO_BASE)
43687 +/* Number to mask conversion macro used for GPIODir and GPIOio */
43688 +#define GPIO_NUM_TOTAL_BITS_MASK 0x3f
43689 +#define GPIO_NUM_MAX_BITS_MASK 0x1f
43690 +#define GPIO_NUM_TO_MASK(X) ( (((X) & GPIO_NUM_TOTAL_BITS_MASK) < 32) ? (1 << ((X) & GPIO_NUM_MAX_BITS_MASK)) : (0) )
43692 +/* Number to mask conversion macro used for GPIODir_high and GPIOio_high */
43693 +#define GPIO_NUM_MAX_BITS_MASK_HIGH 0x07
43694 +#define GPIO_NUM_TO_MASK_HIGH(X) ( (((X) & GPIO_NUM_TOTAL_BITS_MASK) >= 32) ? (1 << ((X-32) & GPIO_NUM_MAX_BITS_MASK_HIGH)) : (0) )
43698 +** External Bus Interface
43700 +typedef struct EbiChipSelect {
43701 + uint32 base; /* base address in upper 24 bits */
43702 +#define EBI_SIZE_8K 0
43703 +#define EBI_SIZE_16K 1
43704 +#define EBI_SIZE_32K 2
43705 +#define EBI_SIZE_64K 3
43706 +#define EBI_SIZE_128K 4
43707 +#define EBI_SIZE_256K 5
43708 +#define EBI_SIZE_512K 6
43709 +#define EBI_SIZE_1M 7
43710 +#define EBI_SIZE_2M 8
43711 +#define EBI_SIZE_4M 9
43712 +#define EBI_SIZE_8M 10
43713 +#define EBI_SIZE_16M 11
43714 +#define EBI_SIZE_32M 12
43715 +#define EBI_SIZE_64M 13
43716 +#define EBI_SIZE_128M 14
43717 +#define EBI_SIZE_256M 15
43719 +#define EBI_ENABLE 0x00000001 /* .. enable this range */
43720 +#define EBI_WAIT_STATES 0x0000000e /* .. mask for wait states */
43721 +#define EBI_WTST_SHIFT 1 /* .. for shifting wait states */
43722 +#define EBI_WORD_WIDE 0x00000010 /* .. 16-bit peripheral, else 8 */
43723 +#define EBI_WREN 0x00000020 /* enable posted writes */
43724 +#define EBI_POLARITY 0x00000040 /* .. set to invert something,
43725 + ** don't know what yet */
43726 +#define EBI_TS_TA_MODE 0x00000080 /* .. use TS/TA mode */
43727 +#define EBI_TS_SEL 0x00000100 /* .. drive tsize, not bs_b */
43728 +#define EBI_FIFO 0x00000200 /* .. use fifo */
43729 +#define EBI_RE 0x00000400 /* .. Reverse Endian */
43732 +typedef struct MpiRegisters {
43733 + EbiChipSelect cs[7]; /* size chip select configuration */
43734 +#define EBI_CS0_BASE 0
43735 +#define EBI_CS1_BASE 1
43736 +#define EBI_CS2_BASE 2
43737 +#define EBI_CS3_BASE 3
43738 +#define PCMCIA_COMMON_BASE 4
43739 +#define PCMCIA_ATTRIBUTE_BASE 5
43740 +#define PCMCIA_IO_BASE 6
43741 + uint32 unused0[2]; /* reserved */
43742 + uint32 ebi_control; /* ebi control */
43743 + uint32 unused1[4]; /* reserved */
43744 +#define EBI_ACCESS_TIMEOUT 0x000007FF
43745 + uint32 pcmcia_cntl1; /* pcmcia control 1 */
43746 +#define PCCARD_CARD_RESET 0x00040000
43747 +#define CARDBUS_ENABLE 0x00008000
43748 +#define PCMCIA_ENABLE 0x00004000
43749 +#define PCMCIA_GPIO_ENABLE 0x00002000
43750 +#define CARDBUS_IDSEL 0x00001F00
43751 +#define VS2_OEN 0x00000080
43752 +#define VS1_OEN 0x00000040
43753 +#define VS2_OUT 0x00000020
43754 +#define VS1_OUT 0x00000010
43755 +#define VS2_IN 0x00000008
43756 +#define VS1_IN 0x00000004
43757 +#define CD2_IN 0x00000002
43758 +#define CD1_IN 0x00000001
43759 +#define VS_MASK 0x0000000C
43760 +#define CD_MASK 0x00000003
43761 + uint32 unused2; /* reserved */
43762 + uint32 pcmcia_cntl2; /* pcmcia control 2 */
43763 +#define PCMCIA_BYTESWAP_DIS 0x00000002
43764 +#define PCMCIA_HALFWORD_EN 0x00000001
43765 +#define RW_ACTIVE_CNT_BIT 2
43766 +#define INACTIVE_CNT_BIT 8
43767 +#define CE_SETUP_CNT_BIT 16
43768 +#define CE_HOLD_CNT_BIT 24
43769 + uint32 unused3[40]; /* reserved */
43771 + uint32 sp0range; /* PCI to internal system bus address space */
43778 + uint32 EndianCfg;
43780 + uint32 l2pcfgctl; /* internal system bus to PCI IO/Cfg control */
43781 +#define DIR_CFG_SEL 0x80000000 /* change from PCI I/O access to PCI config access */
43782 +#define DIR_CFG_USEREG 0x40000000 /* use this register info for PCI configuration access */
43783 +#define DEVICE_NUMBER 0x00007C00 /* device number for the PCI configuration access */
43784 +#define FUNC_NUMBER 0x00000300 /* function number for the PCI configuration access */
43785 +#define REG_NUMBER 0x000000FC /* register number for the PCI configuration access */
43786 +#define CONFIG_TYPE 0x00000003 /* configuration type for the PCI configuration access */
43788 + uint32 l2pmrange1; /* internal system bus to PCI memory space */
43789 +#define PCI_SIZE_64K 0xFFFF0000
43790 +#define PCI_SIZE_128K 0xFFFE0000
43791 +#define PCI_SIZE_256K 0xFFFC0000
43792 +#define PCI_SIZE_512K 0xFFF80000
43793 +#define PCI_SIZE_1M 0xFFF00000
43794 +#define PCI_SIZE_2M 0xFFE00000
43795 +#define PCI_SIZE_4M 0xFFC00000
43796 +#define PCI_SIZE_8M 0xFF800000
43797 +#define PCI_SIZE_16M 0xFF000000
43798 +#define PCI_SIZE_32M 0xFE000000
43799 + uint32 l2pmbase1; /* kseg0 or kseg1 address & 0x1FFFFFFF */
43800 + uint32 l2pmremap1;
43801 +#define CARDBUS_MEM 0x00000004
43802 +#define MEM_WINDOW_EN 0x00000001
43803 + uint32 l2pmrange2;
43804 + uint32 l2pmbase2;
43805 + uint32 l2pmremap2;
43806 + uint32 l2piorange; /* internal system bus to PCI I/O space */
43807 + uint32 l2piobase;
43808 + uint32 l2pioremap;
43810 + uint32 pcimodesel;
43811 +#define PCI2_INT_BUS_RD_PREFECH 0x000000F0
43812 +#define PCI_BAR2_NOSWAP 0x00000002 /* BAR at offset 0x20 */
43813 +#define PCI_BAR1_NOSWAP 0x00000001 /* BAR at affset 0x1c */
43815 + uint32 pciintstat; /* PCI interrupt mask/status */
43816 +#define MAILBOX1_SENT 0x08
43817 +#define MAILBOX0_SENT 0x04
43818 +#define MAILBOX1_MSG_RCV 0x02
43819 +#define MAILBOX0_MSG_RCV 0x01
43820 + uint32 locbuscntrl; /* internal system bus control */
43821 +#define DIR_U2P_NOSWAP 0x00000002
43822 +#define EN_PCI_GPIO 0x00000001
43823 + uint32 locintstat; /* internal system bus interrupt mask/status */
43824 +#define CSERR 0x0200
43825 +#define SERR 0x0100
43826 +#define EXT_PCI_INT 0x0080
43827 +#define DIR_FAILED 0x0040
43828 +#define DIR_COMPLETE 0x0020
43829 +#define PCI_CFG 0x0010
43830 + uint32 unused5[7];
43835 + uint32 pcicfgcntrl; /* internal system bus PCI configuration control */
43836 +#define PCI_CFG_REG_WRITE_EN 0x00000080
43837 +#define PCI_CFG_ADDR 0x0000003C
43838 + uint32 pcicfgdata; /* internal system bus PCI configuration data */
43840 + uint32 locch2ctl; /* PCI to interrnal system bus DMA (downstream) local control */
43841 +#define MPI_DMA_HALT 0x00000008 /* idle after finish current memory burst */
43842 +#define MPI_DMA_PKT_HALT 0x00000004 /* idle after an EOP flag is detected */
43843 +#define MPI_DMA_STALL 0x00000002 /* idle after an EOP flag is detected */
43844 +#define MPI_DMA_ENABLE 0x00000001 /* set to enable channel */
43845 + uint32 locch2intStat;
43846 +#define MPI_DMA_NO_DESC 0x00000004 /* no valid descriptors */
43847 +#define MPI_DMA_DONE 0x00000002 /* packet xfer complete */
43848 +#define MPI_DMA_BUFF_DONE 0x00000001 /* buffer done */
43849 + uint32 locch2intMask;
43851 + uint32 locch2descaddr;
43852 + uint32 locch2status1;
43853 +#define LOCAL_DESC_STATE 0xE0000000
43854 +#define PCI_DESC_STATE 0x1C000000
43855 +#define BYTE_DONE 0x03FFC000
43856 +#define RING_ADDR 0x00003FFF
43857 + uint32 locch2status2;
43858 +#define BUFPTR_OFFSET 0x1FFF0000
43859 +#define PCI_MASTER_STATE 0x000000C0
43860 +#define LOC_MASTER_STATE 0x00000038
43861 +#define CONTROL_STATE 0x00000007
43864 + uint32 locch1Ctl; /*internal system bus to PCI DMA (upstream) local control */
43865 +#define DMA_U2P_LE 0x00000200 /* local bus is little endian */
43866 +#define DMA_U2P_NOSWAP 0x00000100 /* lccal bus is little endian but no data swapped */
43867 + uint32 locch1intstat;
43868 + uint32 locch1intmask;
43870 + uint32 locch1descaddr;
43871 + uint32 locch1status1;
43872 + uint32 locch1status2;
43875 + uint32 pcich1ctl; /* internal system bus to PCI DMA PCI control */
43876 + uint32 pcich1intstat;
43877 + uint32 pcich1intmask;
43878 + uint32 pcich1descaddr;
43879 + uint32 pcich1status1;
43880 + uint32 pcich1status2;
43882 + uint32 pcich2Ctl; /* PCI to internal system bus DMA PCI control */
43883 + uint32 pcich2intstat;
43884 + uint32 pcich2intmask;
43885 + uint32 pcich2descaddr;
43886 + uint32 pcich2status1;
43887 + uint32 pcich2status2;
43889 + uint32 perm_id; /* permanent device and vendor id */
43890 + uint32 perm_rev; /* permanent revision id */
43893 +#define MPI ((volatile MpiRegisters * const) MPI_BASE)
43895 +/* PCI configuration address space start offset 0x40 */
43896 +#define BRCM_PCI_CONFIG_TIMER 0x40
43897 +#define BRCM_PCI_CONFIG_TIMER_RETRY_MASK 0x0000FF00
43898 +#define BRCM_PCI_CONFIG_TIMER_TRDY_MASK 0x000000FF
43900 +/* USB host non-Open HCI register, USB_HOST_NON_OHCI, bit definitions. */
43901 +#define NON_OHCI_ENABLE_PORT1 0x00000001 /* Use USB port 1 for host, not dev */
43902 +#define NON_OHCI_BYTE_SWAP 0x00000008 /* Swap USB host registers */
43904 +#define USBH_NON_OHCI ((volatile unsigned long * const) USB_HOST_NON_OHCI)
43912 diff -urN linux-2.6.8.1/bcmdrivers/opensource/include/bcm963xx/bcmTag.h linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/include/bcm963xx/bcmTag.h
43913 --- linux-2.6.8.1/bcmdrivers/opensource/include/bcm963xx/bcmTag.h 1970-01-01 01:00:00.000000000 +0100
43914 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/include/bcm963xx/bcmTag.h 2006-06-26 09:07:10.000000000 +0200
43918 + Copyright 2002 Broadcom Corp. All Rights Reserved.
43920 + This program is free software; you can distribute it and/or modify it
43921 + under the terms of the GNU General Public License (Version 2) as
43922 + published by the Free Software Foundation.
43924 + This program is distributed in the hope it will be useful, but WITHOUT
43925 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
43926 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
43927 + for more details.
43929 + You should have received a copy of the GNU General Public License along
43930 + with this program; if not, write to the Free Software Foundation, Inc.,
43931 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
43934 +//**************************************************************************************
43935 +// File Name : bcmTag.h
43937 +// Description: add tag with validation system to the firmware image file to be uploaded
43940 +// Created : 02/28/2002 seanl
43941 +//**************************************************************************************
43943 +#ifndef _BCMTAG_H_
43944 +#define _BCMTAG_H_
43947 +#define BCM_SIG_1 "Broadcom Corporation"
43948 +#define BCM_SIG_2 "ver. 2.0" // was "firmware version 2.0" now it is split 6 char out for chip id.
43950 +#define BCM_TAG_VER "6"
43951 +#define BCM_TAG_VER_LAST "26"
43953 +// file tag (head) structure all is in clear text except validationTokens (crc, md5, sha1, etc). Total: 128 unsigned chars
43954 +#define TAG_LEN 256
43955 +#define TAG_VER_LEN 4
43956 +#define SIG_LEN 20
43957 +#define SIG_LEN_2 14 // Original second SIG = 20 is now devided into 14 for SIG_LEN_2 and 6 for CHIP_ID
43958 +#define CHIP_ID_LEN 6
43959 +#define IMAGE_LEN 10
43960 +#define ADDRESS_LEN 12
43961 +#define FLAG_LEN 2
43962 +#define TOKEN_LEN 20
43963 +#define BOARD_ID_LEN 16
43964 +#define RESERVED_LEN (TAG_LEN - TAG_VER_LEN - SIG_LEN - SIG_LEN_2 - CHIP_ID_LEN - BOARD_ID_LEN - \
43965 + (4*IMAGE_LEN) - (3*ADDRESS_LEN) - (3*FLAG_LEN) - (2*TOKEN_LEN))
43968 +// TAG for downloadable image (kernel plus file system)
43969 +typedef struct _FILE_TAG
43971 + unsigned char tagVersion[TAG_VER_LEN]; // tag version. Will be 2 here.
43972 + unsigned char signiture_1[SIG_LEN]; // text line for company info
43973 + unsigned char signiture_2[SIG_LEN_2]; // additional info (can be version number)
43974 + unsigned char chipId[CHIP_ID_LEN]; // chip id
43975 + unsigned char boardId[BOARD_ID_LEN]; // board id
43976 + unsigned char bigEndian[FLAG_LEN]; // if = 1 - big, = 0 - little endia of the host
43977 + unsigned char totalImageLen[IMAGE_LEN]; // the sum of all the following length
43978 + unsigned char cfeAddress[ADDRESS_LEN]; // if non zero, cfe starting address
43979 + unsigned char cfeLen[IMAGE_LEN]; // if non zero, cfe size in clear ASCII text.
43980 + unsigned char rootfsAddress[ADDRESS_LEN]; // if non zero, filesystem starting address
43981 + unsigned char rootfsLen[IMAGE_LEN]; // if non zero, filesystem size in clear ASCII text.
43982 + unsigned char kernelAddress[ADDRESS_LEN]; // if non zero, kernel starting address
43983 + unsigned char kernelLen[IMAGE_LEN]; // if non zero, kernel size in clear ASCII text.
43984 + unsigned char dualImage[FLAG_LEN]; // if 1, dual image
43985 + unsigned char inactiveLen[FLAG_LEN]; // if 1, the image is INACTIVE; if 0, active
43986 + unsigned char reserved[RESERVED_LEN]; // reserved for later use
43987 + unsigned char imageValidationToken[TOKEN_LEN];// image validation token - can be crc, md5, sha; for
43988 + // now will be 4 unsigned char crc
43989 + unsigned char tagValidationToken[TOKEN_LEN]; // validation token for tag(from signiture_1 to end of // mageValidationToken)
43990 +} FILE_TAG, *PFILE_TAG;
43992 +#define CRC32_INIT_VALUE 0xffffffff /* Initial CRC32 checksum value */
43995 +// only included if for bcmTag.exe program
43996 +#ifdef BCMTAG_EXE_USE
43998 +static unsigned long Crc32_table[256] = {
43999 + 0x00000000, 0x77073096, 0xEE0E612C, 0x990951BA,
44000 + 0x076DC419, 0x706AF48F, 0xE963A535, 0x9E6495A3,
44001 + 0x0EDB8832, 0x79DCB8A4, 0xE0D5E91E, 0x97D2D988,
44002 + 0x09B64C2B, 0x7EB17CBD, 0xE7B82D07, 0x90BF1D91,
44003 + 0x1DB71064, 0x6AB020F2, 0xF3B97148, 0x84BE41DE,
44004 + 0x1ADAD47D, 0x6DDDE4EB, 0xF4D4B551, 0x83D385C7,
44005 + 0x136C9856, 0x646BA8C0, 0xFD62F97A, 0x8A65C9EC,
44006 + 0x14015C4F, 0x63066CD9, 0xFA0F3D63, 0x8D080DF5,
44007 + 0x3B6E20C8, 0x4C69105E, 0xD56041E4, 0xA2677172,
44008 + 0x3C03E4D1, 0x4B04D447, 0xD20D85FD, 0xA50AB56B,
44009 + 0x35B5A8FA, 0x42B2986C, 0xDBBBC9D6, 0xACBCF940,
44010 + 0x32D86CE3, 0x45DF5C75, 0xDCD60DCF, 0xABD13D59,
44011 + 0x26D930AC, 0x51DE003A, 0xC8D75180, 0xBFD06116,
44012 + 0x21B4F4B5, 0x56B3C423, 0xCFBA9599, 0xB8BDA50F,
44013 + 0x2802B89E, 0x5F058808, 0xC60CD9B2, 0xB10BE924,
44014 + 0x2F6F7C87, 0x58684C11, 0xC1611DAB, 0xB6662D3D,
44015 + 0x76DC4190, 0x01DB7106, 0x98D220BC, 0xEFD5102A,
44016 + 0x71B18589, 0x06B6B51F, 0x9FBFE4A5, 0xE8B8D433,
44017 + 0x7807C9A2, 0x0F00F934, 0x9609A88E, 0xE10E9818,
44018 + 0x7F6A0DBB, 0x086D3D2D, 0x91646C97, 0xE6635C01,
44019 + 0x6B6B51F4, 0x1C6C6162, 0x856530D8, 0xF262004E,
44020 + 0x6C0695ED, 0x1B01A57B, 0x8208F4C1, 0xF50FC457,
44021 + 0x65B0D9C6, 0x12B7E950, 0x8BBEB8EA, 0xFCB9887C,
44022 + 0x62DD1DDF, 0x15DA2D49, 0x8CD37CF3, 0xFBD44C65,
44023 + 0x4DB26158, 0x3AB551CE, 0xA3BC0074, 0xD4BB30E2,
44024 + 0x4ADFA541, 0x3DD895D7, 0xA4D1C46D, 0xD3D6F4FB,
44025 + 0x4369E96A, 0x346ED9FC, 0xAD678846, 0xDA60B8D0,
44026 + 0x44042D73, 0x33031DE5, 0xAA0A4C5F, 0xDD0D7CC9,
44027 + 0x5005713C, 0x270241AA, 0xBE0B1010, 0xC90C2086,
44028 + 0x5768B525, 0x206F85B3, 0xB966D409, 0xCE61E49F,
44029 + 0x5EDEF90E, 0x29D9C998, 0xB0D09822, 0xC7D7A8B4,
44030 + 0x59B33D17, 0x2EB40D81, 0xB7BD5C3B, 0xC0BA6CAD,
44031 + 0xEDB88320, 0x9ABFB3B6, 0x03B6E20C, 0x74B1D29A,
44032 + 0xEAD54739, 0x9DD277AF, 0x04DB2615, 0x73DC1683,
44033 + 0xE3630B12, 0x94643B84, 0x0D6D6A3E, 0x7A6A5AA8,
44034 + 0xE40ECF0B, 0x9309FF9D, 0x0A00AE27, 0x7D079EB1,
44035 + 0xF00F9344, 0x8708A3D2, 0x1E01F268, 0x6906C2FE,
44036 + 0xF762575D, 0x806567CB, 0x196C3671, 0x6E6B06E7,
44037 + 0xFED41B76, 0x89D32BE0, 0x10DA7A5A, 0x67DD4ACC,
44038 + 0xF9B9DF6F, 0x8EBEEFF9, 0x17B7BE43, 0x60B08ED5,
44039 + 0xD6D6A3E8, 0xA1D1937E, 0x38D8C2C4, 0x4FDFF252,
44040 + 0xD1BB67F1, 0xA6BC5767, 0x3FB506DD, 0x48B2364B,
44041 + 0xD80D2BDA, 0xAF0A1B4C, 0x36034AF6, 0x41047A60,
44042 + 0xDF60EFC3, 0xA867DF55, 0x316E8EEF, 0x4669BE79,
44043 + 0xCB61B38C, 0xBC66831A, 0x256FD2A0, 0x5268E236,
44044 + 0xCC0C7795, 0xBB0B4703, 0x220216B9, 0x5505262F,
44045 + 0xC5BA3BBE, 0xB2BD0B28, 0x2BB45A92, 0x5CB36A04,
44046 + 0xC2D7FFA7, 0xB5D0CF31, 0x2CD99E8B, 0x5BDEAE1D,
44047 + 0x9B64C2B0, 0xEC63F226, 0x756AA39C, 0x026D930A,
44048 + 0x9C0906A9, 0xEB0E363F, 0x72076785, 0x05005713,
44049 + 0x95BF4A82, 0xE2B87A14, 0x7BB12BAE, 0x0CB61B38,
44050 + 0x92D28E9B, 0xE5D5BE0D, 0x7CDCEFB7, 0x0BDBDF21,
44051 + 0x86D3D2D4, 0xF1D4E242, 0x68DDB3F8, 0x1FDA836E,
44052 + 0x81BE16CD, 0xF6B9265B, 0x6FB077E1, 0x18B74777,
44053 + 0x88085AE6, 0xFF0F6A70, 0x66063BCA, 0x11010B5C,
44054 + 0x8F659EFF, 0xF862AE69, 0x616BFFD3, 0x166CCF45,
44055 + 0xA00AE278, 0xD70DD2EE, 0x4E048354, 0x3903B3C2,
44056 + 0xA7672661, 0xD06016F7, 0x4969474D, 0x3E6E77DB,
44057 + 0xAED16A4A, 0xD9D65ADC, 0x40DF0B66, 0x37D83BF0,
44058 + 0xA9BCAE53, 0xDEBB9EC5, 0x47B2CF7F, 0x30B5FFE9,
44059 + 0xBDBDF21C, 0xCABAC28A, 0x53B39330, 0x24B4A3A6,
44060 + 0xBAD03605, 0xCDD70693, 0x54DE5729, 0x23D967BF,
44061 + 0xB3667A2E, 0xC4614AB8, 0x5D681B02, 0x2A6F2B94,
44062 + 0xB40BBE37, 0xC30C8EA1, 0x5A05DF1B, 0x2D02EF8D
44064 +#endif // BCMTAG_USE
44067 +#endif // _BCMTAG_H_
44069 diff -urN linux-2.6.8.1/bcmdrivers/opensource/include/bcm963xx/bcm_intr.h linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/include/bcm963xx/bcm_intr.h
44070 --- linux-2.6.8.1/bcmdrivers/opensource/include/bcm963xx/bcm_intr.h 1970-01-01 01:00:00.000000000 +0100
44071 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/include/bcm963xx/bcm_intr.h 2006-06-26 09:07:10.000000000 +0200
44075 + Copyright 2003 Broadcom Corp. All Rights Reserved.
44077 + This program is free software; you can distribute it and/or modify it
44078 + under the terms of the GNU General Public License (Version 2) as
44079 + published by the Free Software Foundation.
44081 + This program is distributed in the hope it will be useful, but WITHOUT
44082 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
44083 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
44084 + for more details.
44086 + You should have received a copy of the GNU General Public License along
44087 + with this program; if not, write to the Free Software Foundation, Inc.,
44088 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
44092 +#ifndef __BCM_INTR_H
44093 +#define __BCM_INTR_H
44095 +#ifdef __cplusplus
44099 +#if defined(CONFIG_BCM96338)
44100 +#include <6338_intr.h>
44102 +#if defined(CONFIG_BCM96345)
44103 +#include <6345_intr.h>
44105 +#if defined(CONFIG_BCM96348)
44106 +#include <6348_intr.h>
44111 +typedef int (*FN_HANDLER) (int, void *, struct pt_regs *);
44114 +extern void enable_brcm_irq(unsigned int irq);
44115 +extern void disable_brcm_irq(unsigned int irq);
44116 +extern int request_external_irq(unsigned int irq,
44117 + FN_HANDLER handler, unsigned long irqflags,
44118 + const char * devname, void *dev_id);
44119 +extern unsigned int BcmHalMapInterrupt(FN_HANDLER isr, unsigned int param,
44120 + unsigned int interruptId);
44121 +extern void dump_intr_regs(void);
44123 +/* compatibility definitions */
44124 +#define BcmHalInterruptEnable(irq) enable_brcm_irq( irq )
44125 +#define BcmHalInterruptDisable(irq) disable_brcm_irq( irq )
44127 +#ifdef __cplusplus
44132 diff -urN linux-2.6.8.1/bcmdrivers/opensource/include/bcm963xx/bcm_map_part.h linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/include/bcm963xx/bcm_map_part.h
44133 --- linux-2.6.8.1/bcmdrivers/opensource/include/bcm963xx/bcm_map_part.h 1970-01-01 01:00:00.000000000 +0100
44134 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/include/bcm963xx/bcm_map_part.h 2006-06-26 09:07:10.000000000 +0200
44138 + Copyright 2004 Broadcom Corp. All Rights Reserved.
44140 + This program is free software; you can distribute it and/or modify it
44141 + under the terms of the GNU General Public License (Version 2) as
44142 + published by the Free Software Foundation.
44144 + This program is distributed in the hope it will be useful, but WITHOUT
44145 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
44146 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
44147 + for more details.
44149 + You should have received a copy of the GNU General Public License along
44150 + with this program; if not, write to the Free Software Foundation, Inc.,
44151 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
44155 +#ifndef __BCM_MAP_PART_H
44156 +#define __BCM_MAP_PART_H
44158 +#if defined(CONFIG_BCM96338)
44159 +#include <6338_map_part.h>
44161 +#if defined(CONFIG_BCM96345)
44162 +#include <6345_map_part.h>
44164 +#if defined(CONFIG_BCM96348)
44165 +#include <6348_map_part.h>
44170 diff -urN linux-2.6.8.1/bcmdrivers/opensource/include/bcm963xx/bcmpci.h linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/include/bcm963xx/bcmpci.h
44171 --- linux-2.6.8.1/bcmdrivers/opensource/include/bcm963xx/bcmpci.h 1970-01-01 01:00:00.000000000 +0100
44172 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/include/bcm963xx/bcmpci.h 2006-06-26 09:07:10.000000000 +0200
44176 + Copyright 2004 Broadcom Corp. All Rights Reserved.
44178 + This program is free software; you can distribute it and/or modify it
44179 + under the terms of the GNU General Public License (Version 2) as
44180 + published by the Free Software Foundation.
44182 + This program is distributed in the hope it will be useful, but WITHOUT
44183 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
44184 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
44185 + for more details.
44187 + You should have received a copy of the GNU General Public License along
44188 + with this program; if not, write to the Free Software Foundation, Inc.,
44189 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
44194 +// bcmpci.h - bcm96348 PCI, Cardbus, and PCMCIA definition
44199 +/* Memory window in internal system bus address space */
44200 +#define BCM_PCI_MEM_BASE 0x08000000
44201 +/* IO window in internal system bus address space */
44202 +#define BCM_PCI_IO_BASE 0x0C000000
44204 +#define BCM_PCI_ADDR_MASK 0x1fffffff
44206 +/* Memory window size (range) */
44207 +#define BCM_PCI_MEM_SIZE_16MB 0x01000000
44208 +/* IO window size (range) */
44209 +#define BCM_PCI_IO_SIZE_64KB 0x00010000
44211 +/* PCI Configuration and I/O space acesss */
44212 +#define BCM_PCI_CFG(d, f, o) ( (d << 11) | (f << 8) | (o/4 << 2) )
44214 +/* fake USB PCI slot */
44215 +#define USB_HOST_SLOT 9
44216 +#define USB_BAR0_MEM_SIZE 0x0800
44218 +#define BCM_HOST_MEM_SPACE1 0x10000000
44219 +#define BCM_HOST_MEM_SPACE2 0x00000000
44222 + * EBI bus clock is 33MHz and share with PCI bus
44223 + * each clock cycle is 30ns.
44225 +/* attribute memory access wait cnt for 4306 */
44226 +#define PCMCIA_ATTR_CE_HOLD 3 // data hold time 70ns
44227 +#define PCMCIA_ATTR_CE_SETUP 3 // data setup time 50ns
44228 +#define PCMCIA_ATTR_INACTIVE 6 // time between read/write cycles 180ns. For the total cycle time 600ns (cnt1+cnt2+cnt3+cnt4)
44229 +#define PCMCIA_ATTR_ACTIVE 10 // OE/WE pulse width 300ns
44231 +/* common memory access wait cnt for 4306 */
44232 +#define PCMCIA_MEM_CE_HOLD 1 // data hold time 30ns
44233 +#define PCMCIA_MEM_CE_SETUP 1 // data setup time 30ns
44234 +#define PCMCIA_MEM_INACTIVE 2 // time between read/write cycles 40ns. For the total cycle time 250ns (cnt1+cnt2+cnt3+cnt4)
44235 +#define PCMCIA_MEM_ACTIVE 5 // OE/WE pulse width 150ns
44237 +#define PCCARD_VCC_MASK 0x00070000 // Mask Reset also
44238 +#define PCCARD_VCC_33V 0x00010000
44239 +#define PCCARD_VCC_50V 0x00020000
44242 + MPI_CARDTYPE_NONE, // No Card in slot
44243 + MPI_CARDTYPE_PCMCIA, // 16-bit PCMCIA card in slot
44244 + MPI_CARDTYPE_CARDBUS, // 32-bit CardBus card in slot
44247 +#define CARDBUS_SLOT 0 // Slot 0 is default for CardBus
44249 +#define pcmciaAttrOffset 0x00200000
44250 +#define pcmciaMemOffset 0x00000000
44251 +// Needs to be right above PCI I/O space. Give 0x8000 (32K) to PCMCIA.
44252 +#define pcmciaIoOffset (BCM_PCI_IO_BASE + 0x80000)
44253 +// Base Address is that mapped into the MPI ChipSelect registers.
44254 +// UBUS bridge MemoryWindow 0 outputs a 0x00 for the base.
44255 +#define pcmciaBase 0xbf000000
44256 +#define pcmciaAttr (pcmciaAttrOffset | pcmciaBase)
44257 +#define pcmciaMem (pcmciaMemOffset | pcmciaBase)
44258 +#define pcmciaIo (pcmciaIoOffset | pcmciaBase)
44261 diff -urN linux-2.6.8.1/bcmdrivers/opensource/include/bcm963xx/bcmtypes.h linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/include/bcm963xx/bcmtypes.h
44262 --- linux-2.6.8.1/bcmdrivers/opensource/include/bcm963xx/bcmtypes.h 1970-01-01 01:00:00.000000000 +0100
44263 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/include/bcm963xx/bcmtypes.h 2006-06-26 09:07:10.000000000 +0200
44267 + Copyright 2002 Broadcom Corp. All Rights Reserved.
44269 + This program is free software; you can distribute it and/or modify it
44270 + under the terms of the GNU General Public License (Version 2) as
44271 + published by the Free Software Foundation.
44273 + This program is distributed in the hope it will be useful, but WITHOUT
44274 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
44275 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
44276 + for more details.
44278 + You should have received a copy of the GNU General Public License along
44279 + with this program; if not, write to the Free Software Foundation, Inc.,
44280 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
44285 +// bcmtypes.h - misc useful typedefs
44287 +#ifndef BCMTYPES_H
44288 +#define BCMTYPES_H
44290 +// These are also defined in typedefs.h in the application area, so I need to
44291 +// protect against re-definition.
44293 +#ifndef _TYPEDEFS_H_
44294 +typedef unsigned char uint8;
44295 +typedef unsigned short uint16;
44296 +typedef unsigned long uint32;
44297 +typedef signed char int8;
44298 +typedef signed short int16;
44299 +typedef signed long int32;
44300 +#if !defined(__cplusplus)
44305 +typedef unsigned char byte;
44306 +// typedef unsigned long sem_t;
44308 +typedef unsigned long HANDLE,*PULONG,DWORD,*PDWORD;
44309 +typedef signed long LONG,*PLONG;
44311 +typedef unsigned int *PUINT;
44312 +typedef signed int INT;
44314 +typedef unsigned short *PUSHORT;
44315 +typedef signed short SHORT,*PSHORT;
44316 +typedef unsigned short WORD,*PWORD;
44318 +typedef unsigned char *PUCHAR;
44319 +typedef signed char *PCHAR;
44321 +typedef void *PVOID;
44323 +typedef unsigned char BOOLEAN, *PBOOL, *PBOOLEAN;
44325 +typedef unsigned char BYTE,*PBYTE;
44327 +//#ifndef __GNUC__
44328 +//The following has been defined in Vxworks internally: vxTypesOld.h
44329 +//redefine under vxworks will cause error
44330 +typedef signed int *PINT;
44332 +typedef signed char INT8;
44333 +typedef signed short INT16;
44334 +typedef signed long INT32;
44336 +typedef unsigned char UINT8;
44337 +typedef unsigned short UINT16;
44338 +typedef unsigned long UINT32;
44340 +typedef unsigned char UCHAR;
44341 +typedef unsigned short USHORT;
44342 +typedef unsigned int UINT;
44343 +typedef unsigned long ULONG;
44345 +typedef void VOID;
44346 +typedef unsigned char BOOL;
44348 +//#endif /* __GNUC__ */
44351 +// These are also defined in typedefs.h in the application area, so I need to
44352 +// protect against re-definition.
44353 +#ifndef TYPEDEFS_H
44355 +// Maximum and minimum values for a signed 16 bit integer.
44356 +#define MAX_INT16 32767
44357 +#define MIN_INT16 -32768
44359 +// Useful for true/false return values. This uses the
44360 +// Taligent notation (k for constant).
44369 +/* macros to protect against unaligned accesses */
44372 +/* first arg is an address, second is a value */
44373 +#define PUT16( a, d ) { \
44374 + *((byte *)a) = (byte)((d)>>8); \
44375 + *(((byte *)a)+1) = (byte)(d); \
44378 +#define PUT32( a, d ) { \
44379 + *((byte *)a) = (byte)((d)>>24); \
44380 + *(((byte *)a)+1) = (byte)((d)>>16); \
44381 + *(((byte *)a)+2) = (byte)((d)>>8); \
44382 + *(((byte *)a)+3) = (byte)(d); \
44385 +/* first arg is an address, returns a value */
44386 +#define GET16( a ) ( \
44387 + (*((byte *)a) << 8) | \
44388 + (*(((byte *)a)+1)) \
44391 +#define GET32( a ) ( \
44392 + (*((byte *)a) << 24) | \
44393 + (*(((byte *)a)+1) << 16) | \
44394 + (*(((byte *)a)+2) << 8) | \
44395 + (*(((byte *)a)+3)) \
44423 +#define READ32(addr) (*(volatile UINT32 *)((ULONG)&addr))
44424 +#define READ16(addr) (*(volatile UINT16 *)((ULONG)&addr))
44425 +#define READ8(addr) (*(volatile UINT8 *)((ULONG)&addr))
44428 diff -urN linux-2.6.8.1/bcmdrivers/opensource/include/bcm963xx/board.h linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/include/bcm963xx/board.h
44429 --- linux-2.6.8.1/bcmdrivers/opensource/include/bcm963xx/board.h 1970-01-01 01:00:00.000000000 +0100
44430 +++ linux-2.6.8.1-brcm63xx/bcmdrivers/opensource/include/bcm963xx/board.h 2006-06-26 09:07:10.000000000 +0200
44434 + Copyright 2002 Broadcom Corp. All Rights Reserved.
44436 + This program is free software; you can distribute it and/or modify it
44437 + under the terms of the GNU General Public License (Version 2) as
44438 + published by the Free Software Foundation.
44440 + This program is distributed in the hope it will be useful, but WITHOUT
44441 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
44442 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
44443 + for more details.
44445 + You should have received a copy of the GNU General Public License along
44446 + with this program; if not, write to the Free Software Foundation, Inc.,
44447 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
44450 +/***********************************************************************/
44452 +/* MODULE: board.h */
44453 +/* DATE: 97/02/18 */
44454 +/* PURPOSE: Board specific information. This module should include */
44455 +/* all base device addresses and board specific macros. */
44457 +/***********************************************************************/
44464 +/*****************************************************************************/
44465 +/* Misc board definitions */
44466 +/*****************************************************************************/
44468 +#define DYING_GASP_API
44470 +/*****************************************************************************/
44471 +/* Physical Memory Map */
44472 +/*****************************************************************************/
44474 +#define PHYS_DRAM_BASE 0x00000000 /* Dynamic RAM Base */
44475 +#define PHYS_FLASH_BASE 0x1FC00000 /* Flash Memory */
44477 +/*****************************************************************************/
44478 +/* Note that the addresses above are physical addresses and that programs */
44479 +/* have to use converted addresses defined below: */
44480 +/*****************************************************************************/
44481 +#define DRAM_BASE (0x80000000 | PHYS_DRAM_BASE) /* cached DRAM */
44482 +#define DRAM_BASE_NOCACHE (0xA0000000 | PHYS_DRAM_BASE) /* uncached DRAM */
44483 +#define FLASH_BASE (0xA0000000 | PHYS_FLASH_BASE) /* uncached Flash */
44485 +/*****************************************************************************/
44486 +/* Select the PLL value to get the desired CPU clock frequency. */
44489 +/*****************************************************************************/
44490 +#define FPERIPH 50000000
44493 +#define BLK64K (64*ONEK)
44494 +#define FLASH45_BLKS_BOOT_ROM 1
44495 +#define FLASH45_LENGTH_BOOT_ROM (FLASH45_BLKS_BOOT_ROM * BLK64K)
44496 +#define FLASH_RESERVED_AT_END (64*ONEK) /*reserved for PSI, scratch pad*/
44498 +/*****************************************************************************/
44499 +/* Note that the addresses above are physical addresses and that programs */
44500 +/* have to use converted addresses defined below: */
44501 +/*****************************************************************************/
44502 +#define DRAM_BASE (0x80000000 | PHYS_DRAM_BASE) /* cached DRAM */
44503 +#define DRAM_BASE_NOCACHE (0xA0000000 | PHYS_DRAM_BASE) /* uncached DRAM */
44504 +#define FLASH_BASE (0xA0000000 | PHYS_FLASH_BASE) /* uncached Flash */
44506 +/*****************************************************************************/
44507 +/* Select the PLL value to get the desired CPU clock frequency. */
44510 +/*****************************************************************************/
44511 +#define FPERIPH 50000000
44513 +#define SDRAM_TYPE_ADDRESS_OFFSET 16
44514 +#define NVRAM_DATA_OFFSET 0x0580
44515 +#define NVRAM_DATA_ID 0x0f1e2d3c
44516 +#define BOARD_SDRAM_TYPE *(unsigned long *) \
44517 + (FLASH_BASE + SDRAM_TYPE_ADDRESS_OFFSET)
44520 +#define BLK64K (64*ONEK)
44522 +// nvram and psi flash definitions for 45
44523 +#define FLASH45_LENGTH_NVRAM ONEK // 1k nvram
44524 +#define NVRAM_PSI_DEFAULT 24 // default psi in K byes
44526 +/*****************************************************************************/
44527 +/* NVRAM Offset and definition */
44528 +/*****************************************************************************/
44530 +#define NVRAM_VERSION_NUMBER 2
44531 +#define NVRAM_VERSION_NUMBER_ADDRESS 0
44533 +#define NVRAM_BOOTLINE_LEN 256
44534 +#define NVRAM_BOARD_ID_STRING_LEN 16
44535 +#define NVRAM_MAC_ADDRESS_LEN 6
44536 +#define NVRAM_MAC_COUNT_MAX 32
44538 +/*****************************************************************************/
44539 +/* Misc Offsets */
44540 +/*****************************************************************************/
44542 +#define CFE_VERSION_OFFSET 0x0570
44543 +#define CFE_VERSION_MARK_SIZE 5
44544 +#define CFE_VERSION_SIZE 5
44548 + unsigned long ulVersion;
44549 + char szBootline[NVRAM_BOOTLINE_LEN];
44550 + char szBoardId[NVRAM_BOARD_ID_STRING_LEN];
44551 + unsigned long ulReserved1[2];
44552 + unsigned long ulNumMacAddrs;
44553 + unsigned char ucaBaseMacAddr[NVRAM_MAC_ADDRESS_LEN];
44554 + char chReserved[2];
44555 + unsigned long ulCheckSum;
44556 +} NVRAM_DATA, *PNVRAM_DATA;
44559 +/*****************************************************************************/
44560 +/* board ioctl calls for flash, led and some other utilities */
44561 +/*****************************************************************************/
44564 +/* Defines. for board driver */
44565 +#define BOARD_IOCTL_MAGIC 'B'
44566 +#define BOARD_DRV_MAJOR 206
44568 +#define MAC_ADDRESS_ANY (unsigned long) -1
44570 +#define BOARD_IOCTL_FLASH_INIT \
44571 + _IOWR(BOARD_IOCTL_MAGIC, 0, BOARD_IOCTL_PARMS)
44573 +#define BOARD_IOCTL_FLASH_WRITE \
44574 + _IOWR(BOARD_IOCTL_MAGIC, 1, BOARD_IOCTL_PARMS)
44576 +#define BOARD_IOCTL_FLASH_READ \
44577 + _IOWR(BOARD_IOCTL_MAGIC, 2, BOARD_IOCTL_PARMS)
44579 +#define BOARD_IOCTL_GET_NR_PAGES \
44580 + _IOWR(BOARD_IOCTL_MAGIC, 3, BOARD_IOCTL_PARMS)
44582 +#define BOARD_IOCTL_DUMP_ADDR \
44583 + _IOWR(BOARD_IOCTL_MAGIC, 4, BOARD_IOCTL_PARMS)
44585 +#define BOARD_IOCTL_SET_MEMORY \
44586 + _IOWR(BOARD_IOCTL_MAGIC, 5, BOARD_IOCTL_PARMS)
44588 +#define BOARD_IOCTL_MIPS_SOFT_RESET \
44589 + _IOWR(BOARD_IOCTL_MAGIC, 6, BOARD_IOCTL_PARMS)
44591 +#define BOARD_IOCTL_LED_CTRL \
44592 + _IOWR(BOARD_IOCTL_MAGIC, 7, BOARD_IOCTL_PARMS)
44594 +#define BOARD_IOCTL_GET_ID \
44595 + _IOWR(BOARD_IOCTL_MAGIC, 8, BOARD_IOCTL_PARMS)
44597 +#define BOARD_IOCTL_GET_MAC_ADDRESS \
44598 + _IOWR(BOARD_IOCTL_MAGIC, 9, BOARD_IOCTL_PARMS)
44600 +#define BOARD_IOCTL_RELEASE_MAC_ADDRESS \
44601 + _IOWR(BOARD_IOCTL_MAGIC, 10, BOARD_IOCTL_PARMS)
44603 +#define BOARD_IOCTL_GET_PSI_SIZE \
44604 + _IOWR(BOARD_IOCTL_MAGIC, 11, BOARD_IOCTL_PARMS)
44606 +#define BOARD_IOCTL_GET_SDRAM_SIZE \
44607 + _IOWR(BOARD_IOCTL_MAGIC, 12, BOARD_IOCTL_PARMS)
44609 +#define BOARD_IOCTL_SET_MONITOR_FD \
44610 + _IOWR(BOARD_IOCTL_MAGIC, 13, BOARD_IOCTL_PARMS)
44612 +#define BOARD_IOCTL_WAKEUP_MONITOR_TASK \
44613 + _IOWR(BOARD_IOCTL_MAGIC, 14, BOARD_IOCTL_PARMS)
44615 +#define BOARD_IOCTL_GET_BOOTLINE \
44616 + _IOWR(BOARD_IOCTL_MAGIC, 15, BOARD_IOCTL_PARMS)
44618 +#define BOARD_IOCTL_SET_BOOTLINE \
44619 + _IOWR(BOARD_IOCTL_MAGIC, 16, BOARD_IOCTL_PARMS)
44621 +#define BOARD_IOCTL_GET_BASE_MAC_ADDRESS \
44622 + _IOWR(BOARD_IOCTL_MAGIC, 17, BOARD_IOCTL_PARMS)
44624 +#define BOARD_IOCTL_GET_CHIP_ID \
44625 + _IOWR(BOARD_IOCTL_MAGIC, 18, BOARD_IOCTL_PARMS)
44627 +#define BOARD_IOCTL_GET_NUM_ENET \
44628 + _IOWR(BOARD_IOCTL_MAGIC, 19, BOARD_IOCTL_PARMS)
44630 +#define BOARD_IOCTL_GET_CFE_VER \
44631 + _IOWR(BOARD_IOCTL_MAGIC, 20, BOARD_IOCTL_PARMS)
44633 +#define BOARD_IOCTL_GET_ENET_CFG \
44634 + _IOWR(BOARD_IOCTL_MAGIC, 21, BOARD_IOCTL_PARMS)
44636 +#define BOARD_IOCTL_GET_WLAN_ANT_INUSE \
44637 + _IOWR(BOARD_IOCTL_MAGIC, 22, BOARD_IOCTL_PARMS)
44639 +#define BOARD_IOCTL_SET_TRIGGER_EVENT \
44640 + _IOWR(BOARD_IOCTL_MAGIC, 23, BOARD_IOCTL_PARMS)
44642 +#define BOARD_IOCTL_GET_TRIGGER_EVENT \
44643 + _IOWR(BOARD_IOCTL_MAGIC, 24, BOARD_IOCTL_PARMS)
44645 +#define BOARD_IOCTL_UNSET_TRIGGER_EVENT \
44646 + _IOWR(BOARD_IOCTL_MAGIC, 25, BOARD_IOCTL_PARMS)
44648 +#define BOARD_IOCTL_SET_SES_LED \
44649 + _IOWR(BOARD_IOCTL_MAGIC, 26, BOARD_IOCTL_PARMS)
44652 +// for the action in BOARD_IOCTL_PARMS for flash operation
44659 + BCM_IMAGE_KERNEL,
44663 +} BOARD_IOCTL_ACTION;
44666 +typedef struct boardIoctParms
44672 + BOARD_IOCTL_ACTION action; /* flash read/write: nvram, persistent, bcm image */
44674 +} BOARD_IOCTL_PARMS;
44688 + kLedEnd, // NOTE: Insert the new led name before this one. Alway stay at the end.
44693 + kLedStateOff, /* turn led off */
44694 + kLedStateOn, /* turn led on */
44695 + kLedStateFail, /* turn led on red */
44696 + kLedStateBlinkOnce, /* blink once, ~100ms and ignore the same call during the 100ms period */
44697 + kLedStateSlowBlinkContinues, /* slow blink continues at ~600ms interval */
44698 + kLedStateFastBlinkContinues, /* fast blink continues at ~200ms interval */
44699 +} BOARD_LED_STATE;
44702 +// virtual and physical map pair defined in board.c
44703 +typedef struct ledmappair
44705 + BOARD_LED_NAME ledName; // virtual led name
44706 + BOARD_LED_STATE ledInitState; // initial led state when the board boots.
44707 + unsigned short ledMask; // physical GPIO pin mask
44708 + unsigned short ledActiveLow; // reset bit to turn on LED
44709 + unsigned short ledMaskFail; // physical GPIO pin mask for state failure
44710 + unsigned short ledActiveLowFail;// reset bit to turn on LED
44711 +} LED_MAP_PAIR, *PLED_MAP_PAIR;
44713 +typedef void (*HANDLE_LED_FUNC)(BOARD_LED_NAME ledName, BOARD_LED_STATE ledState);
44715 +/* Flash storage address information that is determined by the flash driver. */
44716 +typedef struct flashaddrinfo
44718 + int flash_persistent_start_blk;
44719 + int flash_persistent_number_blk;
44720 + int flash_persistent_length;
44721 + unsigned long flash_persistent_blk_offset;
44722 + int flash_scratch_pad_start_blk; // start before psi (SP_BUF_LEN)
44723 + int flash_scratch_pad_number_blk;
44724 + int flash_scratch_pad_length;
44725 + unsigned long flash_scratch_pad_blk_offset;
44726 + int flash_nvram_start_blk;
44727 + int flash_nvram_number_blk;
44728 + int flash_nvram_length;
44729 + unsigned long flash_nvram_blk_offset;
44730 +} FLASH_ADDR_INFO, *PFLASH_ADDR_INFO;
44732 +// scratch pad defines
44733 +/* SP - Persisten Scratch Pad format:
44734 + sp header : 32 bytes
44735 + tokenId-1 : 8 bytes
44736 + tokenId-1 len : 4 bytes
44739 + tokenId-n : 8 bytes
44740 + tokenId-n len : 4 bytes
44744 +#define MAGIC_NUM_LEN 8
44745 +#define MAGIC_NUMBER "gOGoBrCm"
44746 +#define TOKEN_NAME_LEN 16
44747 +#define SP_VERSION 1
44748 +#define SP_MAX_LEN 8 * 1024 // 8k buf before psi
44749 +#define SP_RESERVERD 16
44751 +typedef struct _SP_HEADER
44753 + char SPMagicNum[MAGIC_NUM_LEN]; // 8 bytes of magic number
44754 + int SPVersion; // version number
44755 + int SPUsedLen; // used sp len
44756 + char SPReserved[SP_RESERVERD]; // reservied, total 32 bytes
44757 +} SP_HEADER, *PSP_HEADER;
44759 +typedef struct _TOKEN_DEF
44761 + char tokenName[TOKEN_NAME_LEN];
44763 +} SP_TOKEN, *PSP_TOKEN;
44766 +/*****************************************************************************/
44767 +/* Function Prototypes */
44768 +/*****************************************************************************/
44769 +#if !defined(__ASM_ASM_H)
44770 +void dumpaddr( unsigned char *pAddr, int nLen );
44772 +void kerSysFlashAddrInfoGet(PFLASH_ADDR_INFO pflash_addr_info);
44773 +int kerSysNvRamGet(char *string, int strLen, int offset);
44774 +int kerSysNvRamSet(char *string, int strLen, int offset);
44775 +int kerSysPersistentGet(char *string, int strLen, int offset);
44776 +int kerSysPersistentSet(char *string, int strLen, int offset);
44777 +int kerSysScratchPadGet(char *tokName, char *tokBuf, int tokLen);
44778 +int kerSysScratchPadSet(char *tokName, char *tokBuf, int tokLen);
44779 +int kerSysBcmImageSet( int flash_start_addr, char *string, int size);
44780 +int kerSysGetMacAddress( unsigned char *pucaAddr, unsigned long ulId );
44781 +int kerSysReleaseMacAddress( unsigned char *pucaAddr );
44782 +int kerSysGetSdramSize( void );
44783 +void kerSysGetBootline(char *string, int strLen);
44784 +void kerSysSetBootline(char *string, int strLen);
44785 +void kerSysMipsSoftReset(void);
44786 +void kerSysLedCtrl(BOARD_LED_NAME, BOARD_LED_STATE);
44787 +void kerSysLedRegisterHwHandler( BOARD_LED_NAME, HANDLE_LED_FUNC, int );
44788 +int kerSysFlashSizeGet(void);
44789 +void kerSysRegisterDyingGaspHandler(char *devname, void *cbfn, void *context);
44790 +void kerSysDeregisterDyingGaspHandler(char *devname);
44791 +void kerSysWakeupMonitorTask( void );
44798 +#endif /* _BOARD_H */
44800 diff -urN linux-2.6.8.1/boardparams/bcm963xx/Makefile linux-2.6.8.1-brcm63xx/boardparms/bcm963xx/Makefile
44801 --- linux-2.6.8.1/boardparams/bcm963xx/Makefile 1970-01-01 01:00:00.000000000 +0100
44802 +++ linux-2.6.8.1-brcm63xx/boardparms/bcm963xx/Makefile 2006-06-26 09:07:10.000000000 +0200
44805 +ifeq ($(CONFIG_MIPS_BRCM),y)
44808 +obj-y += boardparms.o
44809 +EXTRA_CFLAGS += -DCONFIG_BCM9$(BRCM_CHIP)
44810 +-include $(TOPDIR)/Rules.make
44815 +BSPOBJS += boardparms.o
44820 diff -urN linux-2.6.8.1/boardparams/bcm963xx/boardparms.c linux-2.6.8.1-brcm63xx/boardparms/bcm963xx/boardparms.c
44821 --- linux-2.6.8.1/boardparams/bcm963xx/boardparms.c 1970-01-01 01:00:00.000000000 +0100
44822 +++ linux-2.6.8.1-brcm63xx/boardparms/bcm963xx/boardparms.c 2006-06-26 09:07:10.000000000 +0200
44827 + Copyright 2003 Broadcom Corp. All Rights Reserved.
44829 + This program is free software; you can distribute it and/or modify it
44830 + under the terms of the GNU General Public License (Version 2) as
44831 + published by the Free Software Foundation.
44833 + This program is distributed in the hope it will be useful, but WITHOUT
44834 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
44835 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
44836 + for more details.
44838 + You should have received a copy of the GNU General Public License along
44839 + with this program; if not, write to the Free Software Foundation, Inc.,
44840 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
44844 +/**************************************************************************
44845 + * File Name : boardparms.c
44847 + * Description: This file contains the implementation for the BCM63xx board
44848 + * parameter access functions.
44850 + * Updates : 07/14/2003 Created.
44851 + ***************************************************************************/
44854 +#include "boardparms.h"
44858 +/* Default psi size in K bytes */
44859 +#define BP_PSI_DEFAULT_SIZE 24
44862 +typedef struct boardparameters
44864 + char szBoardId[BP_BOARD_ID_LEN]; /* board id string */
44865 + ETHERNET_MAC_INFO EnetMacInfos[BP_MAX_ENET_MACS];
44866 + VOIP_DSP_INFO VoIPDspInfo[BP_MAX_VOIP_DSP];
44867 + unsigned short usSdramSize; /* SDRAM size and type */
44868 + unsigned short usPsiSize; /* persistent storage in K bytes */
44869 + unsigned short usGpioRj11InnerPair; /* GPIO pin or not defined */
44870 + unsigned short usGpioRj11OuterPair; /* GPIO pin or not defined */
44871 + unsigned short usGpioPressAndHoldReset; /* GPIO pin or not defined */
44872 + unsigned short usGpioPcmciaReset; /* GPIO pin or not defined */
44873 + unsigned short usGpioUartRts; /* GPIO pin or not defined */
44874 + unsigned short usGpioUartCts; /* GPIO pin or not defined */
44875 + unsigned short usGpioLedAdsl; /* GPIO pin or not defined */
44876 + unsigned short usGpioLedAdslFail; /* GPIO pin or not defined */
44877 + unsigned short usGpioLedWireless; /* GPIO pin or not defined */
44878 + unsigned short usGpioLedUsb; /* GPIO pin or not defined */
44879 + unsigned short usGpioLedHpna; /* GPIO pin or not defined */
44880 + unsigned short usGpioLedWanData; /* GPIO pin or not defined */
44881 + unsigned short usGpioLedPpp; /* GPIO pin or not defined */
44882 + unsigned short usGpioLedPppFail; /* GPIO pin or not defined */
44883 + unsigned short usGpioLedBlPowerOn; /* GPIO pin or not defined */
44884 + unsigned short usGpioLedBlAlarm; /* GPIO pin or not defined */
44885 + unsigned short usGpioLedBlResetCfg; /* GPIO pin or not defined */
44886 + unsigned short usGpioLedBlStop; /* GPIO pin or not defined */
44887 + unsigned short usExtIntrWireless; /* ext intr or not defined */
44888 + unsigned short usExtIntrAdslDyingGasp; /* ext intr or not defined */
44889 + unsigned short usExtIntrHpna; /* ext intr or not defined */
44890 + unsigned short usCsHpna; /* chip select not defined */
44891 + unsigned short usAntInUseWireless; /* antenna in use or not defined */
44892 + unsigned short usGpioSesBtnWireless; /* GPIO pin or not defined */
44893 + unsigned short usExtIntrSesBtnWireless; /* ext intr or not defined */
44894 + unsigned short usGpioLedSesWireless; /* GPIO pin or not defined */
44895 +} BOARD_PARAMETERS, *PBOARD_PARAMETERS;
44898 +#if defined(_BCM96338_) || defined(CONFIG_BCM96338)
44899 +static BOARD_PARAMETERS g_bcm96338sv =
44901 + "96338SV", /* szBoardId */
44902 + {{BP_ENET_INTERNAL_PHY, /* ucPhyType */
44903 + 0x01, /* ucPhyAddress */
44904 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
44905 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
44906 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
44907 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
44908 + BP_NOT_DEFINED, /* usGpioPhyReset */
44909 + 0x01, /* numSwitchPorts */
44910 + BP_ENET_CONFIG_MDIO, /* usConfigType */
44911 + BP_NOT_DEFINED}, /* usReverseMii */
44912 + {BP_ENET_NO_PHY}}, /* ucPhyType */
44913 + {{BP_VOIP_NO_DSP}, /* ucDspType */
44914 + {BP_VOIP_NO_DSP}}, /* ucDspType */
44915 + BP_MEMORY_16MB_1_CHIP, /* usSdramSize */
44916 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
44917 + BP_NOT_DEFINED, /* usGpioRj11InnerPair */
44918 + BP_NOT_DEFINED, /* usGpioRj11OuterPair */
44919 + BP_NOT_DEFINED, /* usGpioPressAndHoldReset */
44920 + BP_NOT_DEFINED, /* usGpioPcmciaReset */
44921 + BP_NOT_DEFINED, /* usGpioUartRts */
44922 + BP_NOT_DEFINED, /* usGpioUartCts */
44923 + BP_NOT_DEFINED, /* usGpioLedAdsl */
44924 + BP_NOT_DEFINED, /* usGpioLedAdslFail */
44925 + BP_NOT_DEFINED, /* usGpioLedWireless */
44926 + BP_NOT_DEFINED, /* usGpioLedUsb */
44927 + BP_NOT_DEFINED, /* usGpioLedHpna */
44928 + BP_NOT_DEFINED, /* usGpioLedWanData */
44929 + BP_NOT_DEFINED, /* usGpioLedPpp */
44930 + BP_NOT_DEFINED, /* usGpioLedPppFail */
44931 + BP_NOT_DEFINED, /* usGpioLedBlPowerOn */
44932 + BP_NOT_DEFINED, /* usGpioLedBlAlarm */
44933 + BP_NOT_DEFINED, /* usGpioLedBlResetCfg */
44934 + BP_NOT_DEFINED, /* usGpioLedBlStop */
44935 + BP_NOT_DEFINED, /* usExtIntrWireless */
44936 + BP_HW_DEFINED, /* usExtIntrAdslDyingGasp */
44937 + BP_NOT_DEFINED, /* usExtIntrHpna */
44938 + BP_NOT_DEFINED, /* usCsHpna */
44939 + BP_NOT_DEFINED, /* usAntInUseWireless */
44940 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
44941 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
44942 + BP_NOT_DEFINED /* usGpioLedSesWireless */
44944 +static BOARD_PARAMETERS g_bcm96338l2m8m =
44946 + "96338L-2M-8M", /* szBoardId */
44947 + {{BP_ENET_INTERNAL_PHY, /* ucPhyType */
44948 + 0x01, /* ucPhyAddress */
44949 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
44950 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
44951 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
44952 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
44953 + BP_NOT_DEFINED, /* usGpioPhyReset */
44954 + 0x01, /* numSwitchPorts */
44955 + BP_ENET_CONFIG_MDIO, /* usConfigType */
44956 + BP_NOT_DEFINED}, /* usReverseMii */
44957 + {BP_ENET_NO_PHY}}, /* ucPhyType */
44958 + {{BP_VOIP_NO_DSP}, /* ucDspType */
44959 + {BP_VOIP_NO_DSP}}, /* ucDspType */
44960 + BP_MEMORY_8MB_1_CHIP, /* usSdramSize */
44961 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
44962 + BP_NOT_DEFINED, /* usGpioRj11InnerPair */
44963 + BP_NOT_DEFINED, /* usGpioRj11OuterPair */
44964 + BP_NOT_DEFINED, /* usGpioPressAndHoldReset */
44965 + BP_NOT_DEFINED, /* usGpioPcmciaReset */
44966 + BP_NOT_DEFINED, /* usGpioUartRts */
44967 + BP_NOT_DEFINED, /* usGpioUartCts */
44968 + BP_NOT_DEFINED, /* usGpioLedAdsl */
44969 + BP_GPIO_2_AL, /* usGpioLedAdslFail */
44970 + BP_NOT_DEFINED, /* usGpioLedWireless */
44971 + BP_NOT_DEFINED, /* usGpioLedUsb */
44972 + BP_NOT_DEFINED, /* usGpioLedHpna */
44973 + BP_GPIO_3_AL, /* usGpioLedWanData */
44974 + BP_GPIO_3_AL, /* usGpioLedPpp */
44975 + BP_GPIO_4_AL, /* usGpioLedPppFail */
44976 + BP_GPIO_0_AL, /* usGpioLedBlPowerOn */
44977 + BP_NOT_DEFINED, /* usGpioLedBlAlarm */
44978 + BP_GPIO_3_AL, /* usGpioLedBlResetCfg */
44979 + BP_GPIO_1_AL, /* usGpioLedBlStop */
44980 + BP_NOT_DEFINED, /* usExtIntrWireless */
44981 + BP_HW_DEFINED, /* usExtIntrAdslDyingGasp */
44982 + BP_NOT_DEFINED, /* usExtIntrHpna */
44983 + BP_NOT_DEFINED, /* usCsHpna */
44984 + BP_NOT_DEFINED, /* usAntInUseWireless */
44985 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
44986 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
44987 + BP_NOT_DEFINED /* usGpioLedSesWireless */
44989 +static PBOARD_PARAMETERS g_BoardParms[] =
44990 + {&g_bcm96338sv, &g_bcm96338l2m8m, 0};
44993 +#if defined(_BCM96345_) || defined(CONFIG_BCM96345)
44994 +static BOARD_PARAMETERS g_bcm96345r =
44996 + "96345R", /* szBoardId */
44997 + {{BP_ENET_INTERNAL_PHY, /* ucPhyType */
44998 + 0x01, /* ucPhyAddress */
44999 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
45000 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
45001 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
45002 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
45003 + BP_NOT_DEFINED, /* usGpioPhyReset */
45004 + 0x01, /* numSwitchPorts */
45005 + BP_ENET_CONFIG_MDIO, /* usConfigType */
45006 + BP_NOT_DEFINED}, /* usReverseMii */
45007 + {BP_ENET_NO_PHY}}, /* ucPhyType */
45008 + {{BP_VOIP_NO_DSP}, /* ucDspType */
45009 + {BP_VOIP_NO_DSP}}, /* ucDspType */
45010 + BP_MEMORY_8MB_1_CHIP, /* usSdramSize */
45011 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
45012 + BP_GPIO_11_AH, /* usGpioRj11InnerPair */
45013 + BP_GPIO_12_AH, /* usGpioRj11OuterPair */
45014 + BP_GPIO_13_AH, /* usGpioPressAndHoldReset */
45015 + BP_NOT_DEFINED, /* usGpioPcmciaReset */
45016 + BP_NOT_DEFINED, /* usGpioUartRts */
45017 + BP_NOT_DEFINED, /* usGpioUartCts */
45018 + BP_GPIO_8_AH, /* usGpioLedAdsl */
45019 + BP_NOT_DEFINED, /* usGpioLedAdslFail */
45020 + BP_NOT_DEFINED, /* usGpioLedWireless */
45021 + BP_NOT_DEFINED, /* usGpioLedUsb */
45022 + BP_NOT_DEFINED, /* usGpioLedHpna */
45023 + BP_GPIO_8_AH, /* usGpioLedWanData */
45024 + BP_GPIO_9_AH, /* usGpioLedPpp */
45025 + BP_NOT_DEFINED, /* usGpioLedPppFail */
45026 + BP_NOT_DEFINED, /* usGpioLedBlPowerOn */
45027 + BP_GPIO_10_AH, /* usGpioLedBlAlarm */
45028 + BP_GPIO_9_AH, /* usGpioLedBlResetCfg */
45029 + BP_GPIO_8_AH, /* usGpioLedBlStop */
45030 + BP_NOT_DEFINED, /* usExtIntrWireless */
45031 + BP_EXT_INTR_0, /* usExtIntrAdslDyingGasp */
45032 + BP_NOT_DEFINED, /* usExtIntrHpna */
45033 + BP_NOT_DEFINED, /* usCsHpna */
45034 + BP_NOT_DEFINED, /* usAntInUseWireless */
45035 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
45036 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
45037 + BP_NOT_DEFINED /* usGpioLedSesWireless */
45040 +static BOARD_PARAMETERS g_bcm96345gw2 =
45042 + /* A hardware jumper determines whether GPIO 13 is used for Press and Hold
45045 + "96345GW2", /* szBoardId */
45046 + {{BP_ENET_EXTERNAL_SWITCH, /* ucPhyType */
45047 + 0x00, /* ucPhyAddress */
45048 + BP_GPIO_0_AH, /* usGpioPhySpiSck */
45049 + BP_GPIO_4_AH, /* usGpioPhySpiSs */
45050 + BP_GPIO_12_AH, /* usGpioPhySpiMosi */
45051 + BP_GPIO_11_AH, /* usGpioPhySpiMiso */
45052 + BP_NOT_DEFINED, /* usGpioPhyReset */
45053 + 0x04, /* numSwitchPorts */
45054 + BP_ENET_CONFIG_GPIO, /* usConfigType */
45055 + BP_ENET_REVERSE_MII}, /* usReverseMii */
45056 + {BP_ENET_NO_PHY}}, /* ucPhyType */
45057 + {{BP_VOIP_DSP, /* ucDspType */
45058 + 0x00, /* ucDspAddress */
45059 + BP_EXT_INTR_1, /* usExtIntrVoip */
45060 + BP_GPIO_6_AH, /* usGpioVoipReset */
45061 + BP_GPIO_15_AH, /* usGpioVoipIntr */
45062 + BP_NOT_DEFINED, /* usGpioLedVoip */
45063 + BP_CS_2}, /* usCsVoip */
45064 + {BP_VOIP_NO_DSP}}, /* ucDspType */
45065 + BP_MEMORY_16MB_1_CHIP, /* usSdramSize */
45066 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
45067 + BP_NOT_DEFINED, /* usGpioRj11InnerPair */
45068 + BP_NOT_DEFINED, /* usGpioRj11OuterPair */
45069 + BP_GPIO_13_AH, /* usGpioPressAndHoldReset */
45070 + BP_GPIO_2_AH, /* usGpioPcmciaReset */
45071 + BP_GPIO_13_AH, /* usGpioUartRts */
45072 + BP_GPIO_9_AH, /* usGpioUartCts */
45073 + BP_GPIO_8_AH, /* usGpioLedAdsl */
45074 + BP_NOT_DEFINED, /* usGpioLedAdslFail */
45075 + BP_NOT_DEFINED, /* usGpioLedWireless */
45076 + BP_GPIO_7_AH, /* usGpioLedUsb */
45077 + BP_NOT_DEFINED, /* usGpioLedHpna */
45078 + BP_GPIO_8_AH, /* usGpioLedWanData */
45079 + BP_NOT_DEFINED, /* usGpioLedPpp */
45080 + BP_NOT_DEFINED, /* usGpioLedPppFail */
45081 + BP_NOT_DEFINED, /* usGpioLedBlPowerOn */
45082 + BP_GPIO_10_AH, /* usGpioLedBlAlarm */
45083 + BP_GPIO_7_AH, /* usGpioLedBlResetCfg */
45084 + BP_GPIO_8_AH, /* usGpioLedBlStop */
45085 + BP_EXT_INTR_2, /* usExtIntrWireless */
45086 + BP_EXT_INTR_0, /* usExtIntrAdslDyingGasp */
45087 + BP_NOT_DEFINED, /* usExtIntrHpna */
45088 + BP_NOT_DEFINED, /* usCsHpna */
45089 + BP_WLAN_ANT_MAIN, /* usAntInUseWireless */
45090 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
45091 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
45092 + BP_NOT_DEFINED /* usGpioLedSesWireless */
45095 +static BOARD_PARAMETERS g_bcm96345gw =
45097 + "96345GW", /* szBoardId */
45098 + {{BP_ENET_EXTERNAL_SWITCH, /* ucPhyType */
45099 + 0x00, /* ucPhyAddress */
45100 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
45101 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
45102 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
45103 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
45104 + BP_NOT_DEFINED, /* usGpioPhyReset */
45105 + 0x04, /* numSwitchPorts */
45106 + BP_ENET_CONFIG_MDIO, /* usConfigType */
45107 + BP_ENET_NO_REVERSE_MII}, /* usReverseMii */
45108 + {BP_ENET_NO_PHY}}, /* ucPhyType */
45109 + {{BP_VOIP_DSP, /* ucDspType */
45110 + 0x00, /* ucDspAddress */
45111 + BP_EXT_INTR_1, /* usExtIntrVoip */
45112 + BP_GPIO_6_AH, /* usGpioVoipReset */
45113 + BP_GPIO_15_AH, /* usGpioVoipIntr */
45114 + BP_NOT_DEFINED, /* usGpioLedVoip */
45115 + BP_CS_2}, /* usCsVoip */
45116 + {BP_VOIP_NO_DSP}}, /* ucDspType */
45117 + BP_MEMORY_16MB_1_CHIP, /* usSdramSize */
45118 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
45119 + BP_GPIO_11_AH, /* usGpioRj11InnerPair */
45120 + BP_GPIO_1_AH, /* usGpioRj11OuterPair */
45121 + BP_GPIO_13_AH, /* usGpioPressAndHoldReset */
45122 + BP_GPIO_2_AH, /* usGpioPcmciaReset */
45123 + BP_NOT_DEFINED, /* usGpioUartRts */
45124 + BP_NOT_DEFINED, /* usGpioUartCts */
45125 + BP_GPIO_8_AH, /* usGpioLedAdsl */
45126 + BP_NOT_DEFINED, /* usGpioLedAdslFail */
45127 + BP_GPIO_10_AH, /* usGpioLedWireless */
45128 + BP_GPIO_7_AH, /* usGpioLedUsb */
45129 + BP_NOT_DEFINED, /* usGpioLedHpna */
45130 + BP_GPIO_8_AH, /* usGpioLedWanData */
45131 + BP_NOT_DEFINED, /* usGpioLedPpp */
45132 + BP_NOT_DEFINED, /* usGpioLedPppFail */
45133 + BP_NOT_DEFINED, /* usGpioLedBlPowerOn */
45134 + BP_GPIO_9_AH, /* usGpioLedBlAlarm */
45135 + BP_GPIO_10_AH, /* usGpioLedBlResetCfg */
45136 + BP_GPIO_8_AH, /* usGpioLedBlStop */
45137 + BP_EXT_INTR_2, /* usExtIntrWireless */
45138 + BP_EXT_INTR_0, /* usExtIntrAdslDyingGasp */
45139 + BP_EXT_INTR_3, /* usExtIntrHpna */
45140 + BP_CS_1, /* usCsHpna */
45141 + BP_WLAN_ANT_MAIN, /* usAntInUseWireless */
45142 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
45143 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
45144 + BP_NOT_DEFINED /* usGpioLedSesWireless */
45147 +static BOARD_PARAMETERS g_bcm96335r =
45149 + "96335R", /* szBoardId */
45150 + {{BP_ENET_INTERNAL_PHY, /* ucPhyType */
45151 + 0x01, /* ucPhyAddress */
45152 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
45153 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
45154 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
45155 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
45156 + BP_NOT_DEFINED, /* usGpioPhyReset */
45157 + 0x01, /* numSwitchPorts */
45158 + BP_ENET_CONFIG_MDIO, /* usConfigType */
45159 + BP_NOT_DEFINED}, /* usReverseMii */
45160 + {BP_ENET_NO_PHY}}, /* ucPhyType */
45161 + {{BP_VOIP_NO_DSP}, /* ucDspType */
45162 + {BP_VOIP_NO_DSP}}, /* ucDspType */
45163 + BP_MEMORY_8MB_1_CHIP, /* usSdramSize */
45164 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
45165 + BP_NOT_DEFINED, /* usGpioRj11InnerPair */
45166 + BP_NOT_DEFINED, /* usGpioRj11OuterPair */
45167 + BP_GPIO_14_AH, /* usGpioPressAndHoldReset */
45168 + BP_NOT_DEFINED, /* usGpioPcmciaReset */
45169 + BP_NOT_DEFINED, /* usGpioUartRts */
45170 + BP_NOT_DEFINED, /* usGpioUartCts */
45171 + BP_GPIO_9_AH, /* usGpioLedAdsl */
45172 + BP_NOT_DEFINED, /* usGpioLedAdslFail */
45173 + BP_NOT_DEFINED, /* usGpioLedWireless */
45174 + BP_NOT_DEFINED, /* usGpioLedUsb */
45175 + BP_NOT_DEFINED, /* usGpioLedHpna */
45176 + BP_GPIO_9_AH, /* usGpioLedWanData */
45177 + BP_GPIO_8_AH, /* usGpioLedPpp */
45178 + BP_NOT_DEFINED, /* usGpioLedPppFail */
45179 + BP_NOT_DEFINED, /* usGpioLedBlPowerOn */
45180 + BP_GPIO_10_AH, /* usGpioLedBlAlarm */
45181 + BP_GPIO_8_AH, /* usGpioLedBlResetCfg */
45182 + BP_GPIO_9_AH, /* usGpioLedBlStop */
45183 + BP_NOT_DEFINED, /* usExtIntrWireless */
45184 + BP_NOT_DEFINED, /* usExtIntrAdslDyingGasp */
45185 + BP_NOT_DEFINED, /* usExtIntrHpna */
45186 + BP_NOT_DEFINED, /* usCsHpna */
45187 + BP_NOT_DEFINED, /* usAntInUseWireless */
45188 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
45189 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
45190 + BP_NOT_DEFINED /* usGpioLedSesWireless */
45193 +static BOARD_PARAMETERS g_bcm96345r0 =
45195 + "96345R0", /* szBoardId */
45196 + {{BP_ENET_INTERNAL_PHY, /* ucPhyType */
45197 + 0x01, /* ucPhyAddress */
45198 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
45199 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
45200 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
45201 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
45202 + BP_NOT_DEFINED, /* usGpioPhyReset */
45203 + 0x01, /* numSwitchPorts */
45204 + BP_ENET_CONFIG_MDIO, /* usConfigType */
45205 + BP_NOT_DEFINED}, /* usReverseMii */
45206 + {BP_ENET_NO_PHY}}, /* ucPhyType */
45207 + {{BP_VOIP_NO_DSP}, /* ucDspType */
45208 + {BP_VOIP_NO_DSP}}, /* ucDspType */
45209 + BP_MEMORY_8MB_1_CHIP, /* usSdramSize */
45210 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
45211 + BP_NOT_DEFINED, /* usGpioRj11InnerPair */
45212 + BP_NOT_DEFINED, /* usGpioRj11OuterPair */
45213 + BP_NOT_DEFINED, /* usGpioPressAndHoldReset */
45214 + BP_NOT_DEFINED, /* usGpioPcmciaReset */
45215 + BP_NOT_DEFINED, /* usGpioUartRts */
45216 + BP_NOT_DEFINED, /* usGpioUartCts */
45217 + BP_GPIO_8_AH, /* usGpioLedAdsl */
45218 + BP_NOT_DEFINED, /* usGpioLedAdslFail */
45219 + BP_NOT_DEFINED, /* usGpioLedWireless */
45220 + BP_NOT_DEFINED, /* usGpioLedUsb */
45221 + BP_NOT_DEFINED, /* usGpioLedHpna */
45222 + BP_GPIO_9_AH, /* usGpioLedWanData */
45223 + BP_GPIO_9_AH, /* usGpioLedPpp */
45224 + BP_NOT_DEFINED, /* usGpioLedPppFail */
45225 + BP_NOT_DEFINED, /* usGpioLedBlPowerOn */
45226 + BP_GPIO_9_AH, /* usGpioLedBlAlarm */
45227 + BP_GPIO_8_AH, /* usGpioLedBlResetCfg */
45228 + BP_GPIO_8_AH, /* usGpioLedBlStop */
45229 + BP_NOT_DEFINED, /* usExtIntrWireless */
45230 + BP_NOT_DEFINED, /* usExtIntrAdslDyingGasp */
45231 + BP_NOT_DEFINED, /* usExtIntrHpna */
45232 + BP_NOT_DEFINED, /* usCsHpna */
45233 + BP_NOT_DEFINED, /* usAntInUseWireless */
45234 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
45235 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
45236 + BP_NOT_DEFINED /* usGpioLedSesWireless */
45239 +static BOARD_PARAMETERS g_bcm96345rs =
45241 + "96345RS", /* szBoardId */
45242 + {{BP_ENET_EXTERNAL_SWITCH, /* ucPhyType */
45243 + 0x00, /* ucPhyAddress */
45244 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
45245 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
45246 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
45247 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
45248 + BP_NOT_DEFINED, /* usGpioPhyReset */
45249 + 0x01, /* numSwitchPorts */
45250 + BP_ENET_CONFIG_MDIO, /* usConfigType */
45251 + BP_ENET_NO_REVERSE_MII}, /* usReverseMii */
45252 + {BP_ENET_NO_PHY}}, /* ucPhyType */
45253 + {{BP_VOIP_NO_DSP}, /* ucDspType */
45254 + {BP_VOIP_NO_DSP}}, /* ucDspType */
45255 + BP_MEMORY_8MB_1_CHIP, /* usSdramSize */
45256 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
45257 + BP_GPIO_11_AH, /* usGpioRj11InnerPair */
45258 + BP_GPIO_12_AH, /* usGpioRj11OuterPair */
45259 + BP_GPIO_13_AH, /* usGpioPressAndHoldReset */
45260 + BP_NOT_DEFINED, /* usGpioPcmciaReset */
45261 + BP_NOT_DEFINED, /* usGpioUartRts */
45262 + BP_NOT_DEFINED, /* usGpioUartCts */
45263 + BP_GPIO_8_AH, /* usGpioLedAdsl */
45264 + BP_NOT_DEFINED, /* usGpioLedAdslFail */
45265 + BP_NOT_DEFINED, /* usGpioLedWireless */
45266 + BP_NOT_DEFINED, /* usGpioLedUsb */
45267 + BP_NOT_DEFINED, /* usGpioLedHpna */
45268 + BP_GPIO_8_AH, /* usGpioLedWanData */
45269 + BP_GPIO_9_AH, /* usGpioLedPpp */
45270 + BP_NOT_DEFINED, /* usGpioLedPppFail */
45271 + BP_NOT_DEFINED, /* usGpioLedBlPowerOn */
45272 + BP_GPIO_10_AH, /* usGpioLedBlAlarm */
45273 + BP_GPIO_9_AH, /* usGpioLedBlResetCfg */
45274 + BP_GPIO_8_AH, /* usGpioLedBlStop */
45275 + BP_NOT_DEFINED, /* usExtIntrWireless */
45276 + BP_EXT_INTR_0, /* usExtIntrAdslDyingGasp */
45277 + BP_NOT_DEFINED, /* usExtIntrHpna */
45278 + BP_NOT_DEFINED, /* usCsHpna */
45279 + BP_NOT_DEFINED, /* usAntInUseWireless */
45280 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
45281 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
45282 + BP_NOT_DEFINED /* usGpioLedSesWireless */
45285 +static PBOARD_PARAMETERS g_BoardParms[] =
45286 + {&g_bcm96345r, &g_bcm96345gw2, &g_bcm96345gw, &g_bcm96335r, &g_bcm96345r0,
45287 + &g_bcm96345rs, 0};
45290 +#if defined(_BCM96348_) || defined(CONFIG_BCM96348)
45292 +static BOARD_PARAMETERS g_bcm96348r =
45294 + "96348R", /* szBoardId */
45295 + {{BP_ENET_INTERNAL_PHY, /* ucPhyType */
45296 + 0x01, /* ucPhyAddress */
45297 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
45298 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
45299 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
45300 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
45301 + BP_NOT_DEFINED, /* usGpioPhyReset */
45302 + 0x01, /* numSwitchPorts */
45303 + BP_ENET_CONFIG_MDIO, /* usConfigType */
45304 + BP_NOT_DEFINED}, /* usReverseMii */
45305 + {BP_ENET_NO_PHY}}, /* ucPhyType */
45306 + {{BP_VOIP_NO_DSP}, /* ucDspType */
45307 + {BP_VOIP_NO_DSP}}, /* ucDspType */
45308 + BP_MEMORY_8MB_1_CHIP, /* usSdramSize */
45309 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
45310 + BP_NOT_DEFINED, /* usGpioRj11InnerPair */
45311 + BP_NOT_DEFINED, /* usGpioRj11OuterPair */
45312 + BP_GPIO_7_AH, /* usGpioPressAndHoldReset */
45313 + BP_NOT_DEFINED, /* usGpioPcmciaReset */
45314 + BP_NOT_DEFINED, /* usGpioUartRts */
45315 + BP_NOT_DEFINED, /* usGpioUartCts */
45316 + BP_NOT_DEFINED, /* usGpioLedAdsl */
45317 + BP_GPIO_2_AL, /* usGpioLedAdslFail */
45318 + BP_NOT_DEFINED, /* usGpioLedWireless */
45319 + BP_NOT_DEFINED, /* usGpioLedUsb */
45320 + BP_NOT_DEFINED, /* usGpioLedHpna */
45321 + BP_GPIO_3_AL, /* usGpioLedWanData */
45322 + BP_GPIO_3_AL, /* usGpioLedPpp */
45323 + BP_GPIO_4_AL, /* usGpioLedPppFail */
45324 + BP_GPIO_0_AL, /* usGpioLedBlPowerOn */
45325 + BP_NOT_DEFINED, /* usGpioLedBlAlarm */
45326 + BP_GPIO_3_AL, /* usGpioLedBlResetCfg */
45327 + BP_GPIO_1_AL, /* usGpioLedBlStop */
45328 + BP_NOT_DEFINED, /* usExtIntrWireless */
45329 + BP_HW_DEFINED, /* usExtIntrAdslDyingGasp */
45330 + BP_NOT_DEFINED, /* usExtIntrHpna */
45331 + BP_NOT_DEFINED, /* usCsHpna */
45332 + BP_NOT_DEFINED, /* usAntInUseWireless */
45333 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
45334 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
45335 + BP_NOT_DEFINED /* usGpioLedSesWireless */
45338 +static BOARD_PARAMETERS g_bcm96348lv =
45340 + "96348LV", /* szBoardId */
45341 + {{BP_ENET_INTERNAL_PHY, /* ucPhyType */
45342 + 0x01, /* ucPhyAddress */
45343 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
45344 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
45345 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
45346 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
45347 + BP_NOT_DEFINED, /* usGpioPhyReset */
45348 + 0x01, /* numSwitchPorts */
45349 + BP_ENET_CONFIG_MDIO, /* usConfigType */
45350 + BP_NOT_DEFINED}, /* usReverseMii */
45351 + {BP_ENET_EXTERNAL_PHY, /* ucPhyType */
45352 + 0x02, /* ucPhyAddress */
45353 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
45354 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
45355 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
45356 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
45357 + BP_GPIO_5_AL, /* usGpioPhyReset */
45358 + 0x01, /* numSwitchPorts */
45359 + BP_ENET_CONFIG_MDIO, /* usConfigType */
45360 + BP_NOT_DEFINED}}, /* usReverseMii */
45361 + {{BP_VOIP_NO_DSP}, /* ucDspType */
45362 + {BP_VOIP_NO_DSP}}, /* ucDspType */
45363 + BP_MEMORY_16MB_2_CHIP, /* usSdramSize */
45364 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
45365 + BP_NOT_DEFINED, /* usGpioRj11InnerPair */
45366 + BP_NOT_DEFINED, /* usGpioRj11OuterPair */
45367 + BP_GPIO_7_AH, /* usGpioPressAndHoldReset */
45368 + BP_NOT_DEFINED, /* usGpioPcmciaReset */
45369 + BP_NOT_DEFINED, /* usGpioUartRts */
45370 + BP_NOT_DEFINED, /* usGpioUartCts */
45371 + BP_NOT_DEFINED, /* usGpioLedAdsl */
45372 + BP_GPIO_2_AL, /* usGpioLedAdslFail */
45373 + BP_NOT_DEFINED, /* usGpioLedWireless */
45374 + BP_NOT_DEFINED, /* usGpioLedUsb */
45375 + BP_NOT_DEFINED, /* usGpioLedHpna */
45376 + BP_GPIO_3_AL, /* usGpioLedWanData */
45377 + BP_GPIO_3_AL, /* usGpioLedPpp */
45378 + BP_GPIO_4_AL, /* usGpioLedPppFail */
45379 + BP_GPIO_0_AL, /* usGpioLedBlPowerOn */
45380 + BP_NOT_DEFINED, /* usGpioLedBlAlarm */
45381 + BP_GPIO_3_AL, /* usGpioLedBlResetCfg */
45382 + BP_GPIO_1_AL, /* usGpioLedBlStop */
45383 + BP_NOT_DEFINED, /* usExtIntrWireless */
45384 + BP_NOT_DEFINED, /* usExtIntrAdslDyingGasp */
45385 + BP_NOT_DEFINED, /* usExtIntrHpna */
45386 + BP_NOT_DEFINED, /* usCsHpna */
45387 + BP_NOT_DEFINED, /* usAntInUseWireless */
45388 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
45389 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
45390 + BP_NOT_DEFINED /* usGpioLedSesWireless */
45393 +static BOARD_PARAMETERS g_bcm96348gw =
45395 + "96348GW", /* szBoardId */
45396 + {{BP_ENET_INTERNAL_PHY, /* ucPhyType */
45397 + 0x01, /* ucPhyAddress */
45398 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
45399 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
45400 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
45401 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
45402 + BP_NOT_DEFINED, /* usGpioPhyReset */
45403 + 0x01, /* numSwitchPorts */
45404 + BP_ENET_CONFIG_MDIO, /* usConfigType */
45405 + BP_NOT_DEFINED}, /* usReverseMii */
45406 + {BP_ENET_EXTERNAL_SWITCH, /* ucPhyType */
45407 + 0x00, /* ucPhyAddress */
45408 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
45409 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
45410 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
45411 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
45412 + BP_NOT_DEFINED, /* usGpioPhyReset */
45413 + 0x03, /* numSwitchPorts */
45414 + BP_ENET_CONFIG_SPI_SSB_0, /* usConfigType */
45415 + BP_ENET_REVERSE_MII}}, /* usReverseMii */
45416 + {{BP_VOIP_DSP, /* ucDspType */
45417 + 0x00, /* ucDspAddress */
45418 + BP_EXT_INTR_2, /* usExtIntrVoip */
45419 + BP_GPIO_6_AH, /* usGpioVoipReset */
45420 + BP_GPIO_34_AH, /* usGpioVoipIntr */
45421 + BP_NOT_DEFINED, /* usGpioLedVoip */
45422 + BP_CS_2}, /* usCsVoip */
45423 + {BP_VOIP_NO_DSP}}, /* ucDspType */
45424 + BP_MEMORY_16MB_2_CHIP, /* usSdramSize */
45425 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
45426 + BP_NOT_DEFINED, /* usGpioRj11InnerPair */
45427 + BP_NOT_DEFINED, /* usGpioRj11OuterPair */
45428 + BP_GPIO_33_AL, /* usGpioPressAndHoldReset */
45429 + BP_NOT_DEFINED, /* usGpioPcmciaReset */
45430 + BP_NOT_DEFINED, /* usGpioUartRts */
45431 + BP_NOT_DEFINED, /* usGpioUartCts */
45432 + BP_NOT_DEFINED, /* usGpioLedAdsl */
45433 + BP_GPIO_2_AL, /* usGpioLedAdslFail */
45434 + BP_NOT_DEFINED, /* usGpioLedWireless */
45435 + BP_NOT_DEFINED, /* usGpioLedUsb */
45436 + BP_NOT_DEFINED, /* usGpioLedHpna */
45437 + BP_GPIO_3_AL, /* usGpioLedWanData */
45438 + BP_GPIO_3_AL, /* usGpioLedPpp */
45439 + BP_GPIO_4_AL, /* usGpioLedPppFail */
45440 + BP_GPIO_0_AL, /* usGpioLedBlPowerOn */
45441 + BP_NOT_DEFINED, /* usGpioLedBlAlarm */
45442 + BP_GPIO_3_AL, /* usGpioLedBlResetCfg */
45443 + BP_GPIO_1_AL, /* usGpioLedBlStop */
45444 + BP_NOT_DEFINED, /* usExtIntrWireless */
45445 + BP_HW_DEFINED, /* usExtIntrAdslDyingGasp */
45446 + BP_NOT_DEFINED, /* usExtIntrHpna */
45447 + BP_NOT_DEFINED, /* usCsHpna */
45448 + BP_WLAN_ANT_MAIN, /* usAntInUseWireless */
45449 + BP_NOT_DEFINED, /* BP_GPIO_35_AH, */ /* usGpioSesBtnWireless */
45450 + BP_NOT_DEFINED, /* BP_EXT_INTR_3, */ /* usExtIntrSesBtnWireless */
45451 + BP_NOT_DEFINED /* BP_GPIO_0_AL */ /* usGpioLedSesWireless */
45455 +static BOARD_PARAMETERS g_bcm96348gw_10 =
45457 + "96348GW-10", /* szBoardId */
45458 + {{BP_ENET_NO_PHY}, /* ucPhyType */
45459 + {BP_ENET_EXTERNAL_SWITCH, /* ucPhyType */
45460 + 0x00, /* ucPhyAddress */
45461 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
45462 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
45463 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
45464 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
45465 + BP_NOT_DEFINED, /* usGpioPhyReset */
45466 + 0x04, /* numSwitchPorts */
45467 + BP_ENET_CONFIG_SPI_SSB_1, /* usConfigType */
45468 + BP_ENET_REVERSE_MII}}, /* usReverseMii */
45469 + {{BP_VOIP_DSP, /* ucDspType */
45470 + 0x00, /* ucDspAddress */
45471 + BP_EXT_INTR_2, /* usExtIntrVoip */
45472 + BP_GPIO_6_AH, /* usGpioVoipReset */
45473 + BP_GPIO_34_AH, /* usGpioVoipIntr */
45474 + BP_NOT_DEFINED, /* usGpioLedVoip */
45475 + BP_CS_2}, /* usCsVoip */
45476 + {BP_VOIP_NO_DSP}}, /* ucDspType */
45477 + BP_MEMORY_16MB_2_CHIP, /* usSdramSize */
45478 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
45479 + BP_NOT_DEFINED, /* usGpioRj11InnerPair */
45480 + BP_NOT_DEFINED, /* usGpioRj11OuterPair */
45481 + BP_GPIO_33_AL, /* usGpioPressAndHoldReset */
45482 + BP_NOT_DEFINED, /* usGpioPcmciaReset */
45483 + BP_NOT_DEFINED, /* usGpioUartRts */
45484 + BP_NOT_DEFINED, /* usGpioUartCts */
45485 + BP_NOT_DEFINED, /* usGpioLedAdsl */
45486 + BP_GPIO_2_AL, /* usGpioLedAdslFail */
45487 + BP_NOT_DEFINED, /* usGpioLedWireless */
45488 + BP_NOT_DEFINED, /* usGpioLedUsb */
45489 + BP_NOT_DEFINED, /* usGpioLedHpna */
45490 + BP_GPIO_3_AL, /* usGpioLedWanData */
45491 + BP_GPIO_3_AL, /* usGpioLedPpp */
45492 + BP_GPIO_4_AL, /* usGpioLedPppFail */
45493 + BP_GPIO_0_AL, /* usGpioLedBlPowerOn */
45494 + BP_NOT_DEFINED, /* usGpioLedBlAlarm */
45495 + BP_GPIO_3_AL, /* usGpioLedBlResetCfg */
45496 + BP_GPIO_1_AL, /* usGpioLedBlStop */
45497 + BP_NOT_DEFINED, /* usExtIntrWireless */
45498 + BP_HW_DEFINED, /* usExtIntrAdslDyingGasp */
45499 + BP_NOT_DEFINED, /* usExtIntrHpna */
45500 + BP_NOT_DEFINED, /* usCsHpna */
45501 + BP_WLAN_ANT_MAIN, /* usAntInUseWireless */
45502 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
45503 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
45504 + BP_NOT_DEFINED /* usGpioLedSesWireless */
45507 +static BOARD_PARAMETERS g_bcm96348gw_11 =
45509 + "96348GW-11", /* szBoardId */
45510 + {{BP_ENET_NO_PHY}, /* ucPhyType */
45511 + {BP_ENET_EXTERNAL_SWITCH, /* ucPhyType */
45512 + 0x00, /* ucPhyAddress */
45513 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
45514 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
45515 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
45516 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
45517 + BP_NOT_DEFINED, /* usGpioPhyReset */
45518 + 0x04, /* numSwitchPorts */
45519 + BP_ENET_CONFIG_SPI_SSB_1, /* usConfigType */
45520 + BP_ENET_REVERSE_MII}}, /* usReverseMii */
45521 + {{BP_VOIP_NO_DSP}, /* ucDspType */
45522 + {BP_VOIP_NO_DSP}}, /* ucDspType */
45523 + BP_MEMORY_16MB_2_CHIP, /* usSdramSize */
45524 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
45525 + BP_NOT_DEFINED, /* usGpioRj11InnerPair */
45526 + BP_NOT_DEFINED, /* usGpioRj11OuterPair */
45527 + BP_GPIO_33_AL, /* usGpioPressAndHoldReset */
45528 + BP_NOT_DEFINED, /* usGpioPcmciaReset */
45529 + BP_NOT_DEFINED, /* usGpioUartRts */
45530 + BP_NOT_DEFINED, /* usGpioUartCts */
45531 + BP_NOT_DEFINED, /* usGpioLedAdsl */
45532 + BP_GPIO_2_AL, /* usGpioLedAdslFail */
45533 + BP_NOT_DEFINED, /* usGpioLedWireless */
45534 + BP_NOT_DEFINED, /* usGpioLedUsb */
45535 + BP_NOT_DEFINED, /* usGpioLedHpna */
45536 + BP_GPIO_3_AL, /* usGpioLedWanData */
45537 + BP_GPIO_3_AL, /* usGpioLedPpp */
45538 + BP_GPIO_4_AL, /* usGpioLedPppFail */
45539 + BP_GPIO_0_AL, /* usGpioLedBlPowerOn */
45540 + BP_NOT_DEFINED, /* usGpioLedBlAlarm */
45541 + BP_GPIO_3_AL, /* usGpioLedBlResetCfg */
45542 + BP_GPIO_1_AL, /* usGpioLedBlStop */
45543 + BP_NOT_DEFINED, /* usExtIntrWireless */
45544 + BP_HW_DEFINED, /* usExtIntrAdslDyingGasp */
45545 + BP_NOT_DEFINED, /* usExtIntrHpna */
45546 + BP_NOT_DEFINED, /* usCsHpna */
45547 + BP_NOT_DEFINED, /* usAntInUseWireless */
45548 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
45549 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
45550 + BP_NOT_DEFINED /* usGpioLedSesWireless */
45553 +static BOARD_PARAMETERS g_bcm96348sv =
45555 + "96348SV", /* szBoardId */
45556 + {{BP_ENET_INTERNAL_PHY, /* ucPhyType */
45557 + 0x01, /* ucPhyAddress */
45558 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
45559 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
45560 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
45561 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
45562 + BP_NOT_DEFINED, /* usGpioPhyReset */
45563 + 0x01, /* numSwitchPorts */
45564 + BP_ENET_CONFIG_MDIO, /* usConfigType */
45565 + BP_NOT_DEFINED}, /* usReverseMii */
45566 + {BP_ENET_EXTERNAL_PHY, /* ucPhyType */
45567 + 0x1f, /* ucPhyAddress */
45568 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
45569 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
45570 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
45571 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
45572 + BP_NOT_DEFINED, /* usGpioPhyReset */
45573 + 0x01, /* numSwitchPorts */
45574 + BP_ENET_CONFIG_MDIO, /* usConfigType */
45575 + BP_NOT_DEFINED}}, /* usReverseMii */
45576 + {{BP_VOIP_NO_DSP}, /* ucDspType */
45577 + {BP_VOIP_NO_DSP}}, /* ucDspType */
45578 + BP_MEMORY_32MB_2_CHIP, /* usSdramSize */
45579 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
45580 + BP_NOT_DEFINED, /* usGpioRj11InnerPair */
45581 + BP_NOT_DEFINED, /* usGpioRj11OuterPair */
45582 + BP_NOT_DEFINED, /* usGpioPressAndHoldReset */
45583 + BP_NOT_DEFINED, /* usGpioPcmciaReset */
45584 + BP_NOT_DEFINED, /* usGpioUartRts */
45585 + BP_NOT_DEFINED, /* usGpioUartCts */
45586 + BP_NOT_DEFINED, /* usGpioLedAdsl */
45587 + BP_NOT_DEFINED, /* usGpioLedAdslFail */
45588 + BP_NOT_DEFINED, /* usGpioLedWireless */
45589 + BP_NOT_DEFINED, /* usGpioLedUsb */
45590 + BP_NOT_DEFINED, /* usGpioLedHpna */
45591 + BP_NOT_DEFINED, /* usGpioLedWanData */
45592 + BP_NOT_DEFINED, /* usGpioLedPpp */
45593 + BP_NOT_DEFINED, /* usGpioLedPppFail */
45594 + BP_NOT_DEFINED, /* usGpioLedBlPowerOn */
45595 + BP_NOT_DEFINED, /* usGpioLedBlAlarm */
45596 + BP_NOT_DEFINED, /* usGpioLedBlResetCfg */
45597 + BP_NOT_DEFINED, /* usGpioLedBlStop */
45598 + BP_NOT_DEFINED, /* usExtIntrWireless */
45599 + BP_HW_DEFINED, /* usExtIntrAdslDyingGasp */
45600 + BP_NOT_DEFINED, /* usExtIntrHpna */
45601 + BP_NOT_DEFINED, /* usCsHpna */
45602 + BP_NOT_DEFINED, /* usAntInUseWireless */
45603 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
45604 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
45605 + BP_NOT_DEFINED /* usGpioLedSesWireless */
45609 +static BOARD_PARAMETERS g_bcm96348gw_dualDsp =
45611 + "96348GW-DualDSP", /* szBoardId */
45612 + {{BP_ENET_INTERNAL_PHY, /* ucPhyType */
45613 + 0x01, /* ucPhyAddress */
45614 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
45615 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
45616 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
45617 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
45618 + BP_NOT_DEFINED, /* usGpioPhyReset */
45619 + 0x01, /* numSwitchPorts */
45620 + BP_ENET_CONFIG_MDIO, /* usConfigType */
45621 + BP_NOT_DEFINED}, /* usReverseMii */
45622 + {BP_ENET_EXTERNAL_SWITCH, /* ucPhyType */
45623 + 0x00, /* ucPhyAddress */
45624 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
45625 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
45626 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
45627 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
45628 + BP_NOT_DEFINED, /* usGpioPhyReset */
45629 + 0x03, /* numSwitchPorts */
45630 + BP_ENET_CONFIG_SPI_SSB_1, /* usConfigType */
45631 + BP_ENET_REVERSE_MII}}, /* usReverseMii */
45632 + {{BP_VOIP_DSP, /* ucDspType */
45633 + 0x00, /* ucDspAddress */
45634 + BP_EXT_INTR_2, /* usExtIntrVoip */
45635 + BP_UNEQUIPPED, /* usGpioVoipReset */
45636 + BP_GPIO_34_AH, /* usGpioVoipIntr */
45637 + BP_NOT_DEFINED, /* usGpioLedVoip */
45638 + BP_CS_2}, /* usCsVoip */
45639 + {BP_VOIP_DSP, /* ucDspType */
45640 + 0x01, /* ucDspAddress */
45641 + BP_EXT_INTR_3, /* usExtIntrVoip */
45642 + BP_UNEQUIPPED , /* usGpioVoipReset */
45643 + BP_GPIO_35_AH, /* usGpioVoipIntr */
45644 + BP_NOT_DEFINED, /* usGpioLedVoip */
45645 + BP_CS_3}}, /* usCsVoip */
45646 + BP_MEMORY_16MB_2_CHIP, /* usSdramSize */
45647 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
45648 + BP_NOT_DEFINED, /* usGpioRj11InnerPair */
45649 + BP_NOT_DEFINED, /* usGpioRj11OuterPair */
45650 + BP_GPIO_33_AL, /* usGpioPressAndHoldReset */
45651 + BP_NOT_DEFINED, /* usGpioPcmciaReset */
45652 + BP_NOT_DEFINED, /* usGpioUartRts */
45653 + BP_NOT_DEFINED, /* usGpioUartCts */
45654 + BP_NOT_DEFINED, /* usGpioLedAdsl */
45655 + BP_GPIO_2_AL, /* usGpioLedAdslFail */
45656 + BP_NOT_DEFINED, /* usGpioLedWireless */
45657 + BP_NOT_DEFINED, /* usGpioLedUsb */
45658 + BP_NOT_DEFINED, /* usGpioLedHpna */
45659 + BP_GPIO_3_AL, /* usGpioLedWanData */
45660 + BP_GPIO_3_AL, /* usGpioLedPpp */
45661 + BP_GPIO_4_AL, /* usGpioLedPppFail */
45662 + BP_GPIO_0_AL, /* usGpioLedBlPowerOn */
45663 + BP_NOT_DEFINED, /* usGpioLedBlAlarm */
45664 + BP_GPIO_3_AL, /* usGpioLedBlResetCfg */
45665 + BP_GPIO_1_AL, /* usGpioLedBlStop */
45666 + BP_NOT_DEFINED, /* usExtIntrWireless */
45667 + BP_HW_DEFINED, /* usExtIntrAdslDyingGasp */
45668 + BP_NOT_DEFINED, /* usExtIntrHpna */
45669 + BP_NOT_DEFINED, /* usCsHpna */
45670 + BP_WLAN_ANT_MAIN, /* usAntInUseWireless */
45671 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
45672 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
45673 + BP_NOT_DEFINED /* usGpioLedSesWireless */
45677 +static BOARD_PARAMETERS g_bcmCustom_01 =
45679 + "BCMCUST_01", /* szBoardId */
45680 + {{BP_ENET_INTERNAL_PHY, /* ucPhyType */
45681 + 0x01, /* ucPhyAddress */
45682 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
45683 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
45684 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
45685 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
45686 + BP_NOT_DEFINED, /* usGpioPhyReset */
45687 + 0x01, /* numSwitchPorts */
45688 + BP_ENET_CONFIG_MDIO, /* usConfigType */
45689 + BP_NOT_DEFINED}, /* usReverseMii */
45690 + {BP_ENET_NO_PHY, /* ucPhyType */
45691 + 0x00, /* ucPhyAddress */
45692 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
45693 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
45694 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
45695 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
45696 + BP_NOT_DEFINED, /* usGpioPhyReset */
45697 + 0x01, /* numSwitchPorts */
45698 + BP_ENET_CONFIG_SPI_SSB_1, /* usConfigType */
45699 + BP_ENET_REVERSE_MII}}, /* usReverseMii */
45700 + {{BP_VOIP_DSP, /* ucDspType */
45701 + 0x00, /* ucDspAddress */
45702 + BP_EXT_INTR_2, /* usExtIntrVoip */
45703 + BP_GPIO_36_AH, /* usGpioVoipReset */
45704 + BP_GPIO_34_AL, /* usGpioVoipIntr */
45705 + BP_NOT_DEFINED, /* usGpioLedVoip */
45706 + BP_CS_2}, /* usCsVoip */
45707 + {BP_VOIP_NO_DSP}}, /* ucDspType */
45708 + BP_MEMORY_16MB_2_CHIP, /* usSdramSize */
45709 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
45710 + BP_NOT_DEFINED, /* usGpioRj11InnerPair */
45711 + BP_NOT_DEFINED, /* usGpioRj11OuterPair */
45712 + BP_GPIO_33_AL, /* usGpioPressAndHoldReset */
45713 + BP_NOT_DEFINED, /* usGpioPcmciaReset */
45714 + BP_NOT_DEFINED, /* usGpioUartRts */
45715 + BP_NOT_DEFINED, /* usGpioUartCts */
45716 + BP_NOT_DEFINED, /* usGpioLedAdsl */
45717 + BP_GPIO_2_AL, /* usGpioLedAdslFail */
45718 + BP_NOT_DEFINED, /* usGpioLedWireless */
45719 + BP_NOT_DEFINED, /* usGpioLedUsb */
45720 + BP_NOT_DEFINED, /* usGpioLedHpna */
45721 + BP_GPIO_3_AL, /* usGpioLedWanData */
45722 + BP_GPIO_3_AL, /* usGpioLedPpp */
45723 + BP_GPIO_4_AL, /* usGpioLedPppFail */
45724 + BP_GPIO_0_AL, /* usGpioLedBlPowerOn */
45725 + BP_NOT_DEFINED, /* usGpioLedBlAlarm */
45726 + BP_GPIO_3_AL, /* usGpioLedBlResetCfg */
45727 + BP_GPIO_1_AL, /* usGpioLedBlStop */
45728 + BP_NOT_DEFINED, /* usExtIntrWireless */
45729 + BP_NOT_DEFINED, /* usExtIntrAdslDyingGasp */
45730 + BP_NOT_DEFINED, /* usExtIntrHpna */
45731 + BP_NOT_DEFINED, /* usCsHpna */
45732 + BP_NOT_DEFINED, /* usAntInUseWireless */
45733 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
45734 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
45735 + BP_NOT_DEFINED /* usGpioLedSesWireless */
45738 +static PBOARD_PARAMETERS g_BoardParms[] =
45739 + {&g_bcm96348r, &g_bcm96348lv, &g_bcm96348gw, &g_bcm96348gw_10,
45740 + &g_bcm96348gw_11, &g_bcm96348sv, &g_bcm96348gw_dualDsp,
45741 + &g_bcmCustom_01, 0};
45744 +static PBOARD_PARAMETERS g_pCurrentBp = 0;
45746 +/**************************************************************************
45747 + * Name : bpstrcmp
45749 + * Description: String compare for this file so it does not depend on an OS.
45750 + * (Linux kernel and CFE share this source file.)
45752 + * Parameters : [IN] dest - destination string
45753 + * [IN] src - source string
45755 + * Returns : -1 - dest < src, 1 - dest > src, 0 dest == src
45756 + ***************************************************************************/
45757 +static int bpstrcmp(const char *dest,const char *src);
45758 +static int bpstrcmp(const char *dest,const char *src)
45760 + while (*src && *dest)
45762 + if (*dest < *src) return -1;
45763 + if (*dest > *src) return 1;
45768 + if (*dest && !*src) return 1;
45769 + if (!*dest && *src) return -1;
45773 +/**************************************************************************
45774 + * Name : BpGetVoipDspConfig
45776 + * Description: Gets the DSP configuration from the board parameter
45777 + * structure for a given DSP index.
45779 + * Parameters : [IN] dspNum - DSP index (number)
45781 + * Returns : Pointer to DSP configuration block if found/valid, NULL
45783 + ***************************************************************************/
45784 +VOIP_DSP_INFO *BpGetVoipDspConfig( unsigned char dspNum );
45785 +VOIP_DSP_INFO *BpGetVoipDspConfig( unsigned char dspNum )
45787 + VOIP_DSP_INFO *pDspConfig = 0;
45790 + if( g_pCurrentBp )
45792 + for( i = 0 ; i < BP_MAX_VOIP_DSP ; i++ )
45794 + if( g_pCurrentBp->VoIPDspInfo[i].ucDspType != BP_VOIP_NO_DSP &&
45795 + g_pCurrentBp->VoIPDspInfo[i].ucDspAddress == dspNum )
45797 + pDspConfig = &g_pCurrentBp->VoIPDspInfo[i];
45803 + return pDspConfig;
45807 +/**************************************************************************
45808 + * Name : BpSetBoardId
45810 + * Description: This function find the BOARD_PARAMETERS structure for the
45811 + * specified board id string and assigns it to a global, static
45814 + * Parameters : [IN] pszBoardId - Board id string that is saved into NVRAM.
45816 + * Returns : BP_SUCCESS - Success, value is returned.
45817 + * BP_BOARD_ID_NOT_FOUND - Error, board id input string does not
45818 + * have a board parameters configuration record.
45819 + ***************************************************************************/
45820 +int BpSetBoardId( char *pszBoardId )
45822 + int nRet = BP_BOARD_ID_NOT_FOUND;
45823 + PBOARD_PARAMETERS *ppBp;
45825 + for( ppBp = g_BoardParms; *ppBp; ppBp++ )
45827 + if( !bpstrcmp((*ppBp)->szBoardId, pszBoardId) )
45829 + g_pCurrentBp = *ppBp;
45830 + nRet = BP_SUCCESS;
45836 +} /* BpSetBoardId */
45838 +/**************************************************************************
45839 + * Name : BpGetBoardIds
45841 + * Description: This function returns all of the supported board id strings.
45843 + * Parameters : [OUT] pszBoardIds - Address of a buffer that the board id
45844 + * strings are returned in. Each id starts at BP_BOARD_ID_LEN
45846 + * [IN] nBoardIdsSize - Number of BP_BOARD_ID_LEN elements that
45847 + * were allocated in pszBoardIds.
45849 + * Returns : Number of board id strings returned.
45850 + ***************************************************************************/
45851 +int BpGetBoardIds( char *pszBoardIds, int nBoardIdsSize )
45853 + PBOARD_PARAMETERS *ppBp;
45858 + for( i = 0, ppBp = g_BoardParms; *ppBp && nBoardIdsSize;
45859 + i++, ppBp++, nBoardIdsSize--, pszBoardIds += BP_BOARD_ID_LEN )
45861 + dest = pszBoardIds;
45862 + src = (*ppBp)->szBoardId;
45864 + *dest++ = *src++;
45869 +} /* BpGetBoardIds */
45871 +/**************************************************************************
45872 + * Name : BpGetEthernetMacInfo
45874 + * Description: This function returns all of the supported board id strings.
45876 + * Parameters : [OUT] pEnetInfos - Address of an array of ETHERNET_MAC_INFO
45878 + * [IN] nNumEnetInfos - Number of ETHERNET_MAC_INFO elements that
45879 + * are pointed to by pEnetInfos.
45881 + * Returns : BP_SUCCESS - Success, value is returned.
45882 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
45883 + ***************************************************************************/
45884 +int BpGetEthernetMacInfo( PETHERNET_MAC_INFO pEnetInfos, int nNumEnetInfos )
45888 + if( g_pCurrentBp )
45890 + for( i = 0; i < nNumEnetInfos; i++, pEnetInfos++ )
45892 + if( i < BP_MAX_ENET_MACS )
45894 + unsigned char *src = (unsigned char *)
45895 + &g_pCurrentBp->EnetMacInfos[i];
45896 + unsigned char *dest = (unsigned char *) pEnetInfos;
45897 + int len = sizeof(ETHERNET_MAC_INFO);
45899 + *dest++ = *src++;
45902 + pEnetInfos->ucPhyType = BP_ENET_NO_PHY;
45905 + nRet = BP_SUCCESS;
45909 + for( i = 0; i < nNumEnetInfos; i++, pEnetInfos++ )
45910 + pEnetInfos->ucPhyType = BP_ENET_NO_PHY;
45912 + nRet = BP_BOARD_ID_NOT_SET;
45916 +} /* BpGetEthernetMacInfo */
45918 +/**************************************************************************
45919 + * Name : BpGetSdramSize
45921 + * Description: This function returns a constant that describees the board's
45922 + * SDRAM type and size.
45924 + * Parameters : [OUT] pulSdramSize - Address of short word that the SDRAM size
45925 + * is returned in.
45927 + * Returns : BP_SUCCESS - Success, value is returned.
45928 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
45929 + ***************************************************************************/
45930 +int BpGetSdramSize( unsigned long *pulSdramSize )
45934 + if( g_pCurrentBp )
45936 + *pulSdramSize = g_pCurrentBp->usSdramSize;
45937 + nRet = BP_SUCCESS;
45941 + *pulSdramSize = BP_NOT_DEFINED;
45942 + nRet = BP_BOARD_ID_NOT_SET;
45946 +} /* BpGetSdramSize */
45948 +/**************************************************************************
45949 + * Name : BpGetPsiSize
45951 + * Description: This function returns the persistent storage size in K bytes.
45953 + * Parameters : [OUT] pulPsiSize - Address of short word that the persistent
45954 + * storage size is returned in.
45956 + * Returns : BP_SUCCESS - Success, value is returned.
45957 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
45958 + ***************************************************************************/
45959 +int BpGetPsiSize( unsigned long *pulPsiSize )
45963 + if( g_pCurrentBp )
45965 + *pulPsiSize = g_pCurrentBp->usPsiSize;
45966 + nRet = BP_SUCCESS;
45970 + *pulPsiSize = BP_NOT_DEFINED;
45971 + nRet = BP_BOARD_ID_NOT_SET;
45975 +} /* BpGetPsiSize */
45977 +/**************************************************************************
45978 + * Name : BpGetRj11InnerOuterPairGpios
45980 + * Description: This function returns the GPIO pin assignments for changing
45981 + * between the RJ11 inner pair and RJ11 outer pair.
45983 + * Parameters : [OUT] pusInner - Address of short word that the RJ11 inner pair
45984 + * GPIO pin is returned in.
45985 + * [OUT] pusOuter - Address of short word that the RJ11 outer pair
45986 + * GPIO pin is returned in.
45988 + * Returns : BP_SUCCESS - Success, values are returned.
45989 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
45990 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
45992 + ***************************************************************************/
45993 +int BpGetRj11InnerOuterPairGpios( unsigned short *pusInner,
45994 + unsigned short *pusOuter )
45998 + if( g_pCurrentBp )
46000 + *pusInner = g_pCurrentBp->usGpioRj11InnerPair;
46001 + *pusOuter = g_pCurrentBp->usGpioRj11OuterPair;
46003 + if( g_pCurrentBp->usGpioRj11InnerPair != BP_NOT_DEFINED &&
46004 + g_pCurrentBp->usGpioRj11OuterPair != BP_NOT_DEFINED )
46006 + nRet = BP_SUCCESS;
46010 + nRet = BP_VALUE_NOT_DEFINED;
46015 + *pusInner = *pusOuter = BP_NOT_DEFINED;
46016 + nRet = BP_BOARD_ID_NOT_SET;
46020 +} /* BpGetRj11InnerOuterPairGpios */
46022 +/**************************************************************************
46023 + * Name : BpGetPressAndHoldResetGpio
46025 + * Description: This function returns the GPIO pin assignment for the press
46026 + * and hold reset button.
46028 + * Parameters : [OUT] pusValue - Address of short word that the press and hold
46029 + * reset button GPIO pin is returned in.
46031 + * Returns : BP_SUCCESS - Success, value is returned.
46032 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
46033 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
46035 + ***************************************************************************/
46036 +int BpGetPressAndHoldResetGpio( unsigned short *pusValue )
46040 + if( g_pCurrentBp )
46042 + *pusValue = g_pCurrentBp->usGpioPressAndHoldReset;
46044 + if( g_pCurrentBp->usGpioPressAndHoldReset != BP_NOT_DEFINED )
46046 + nRet = BP_SUCCESS;
46050 + nRet = BP_VALUE_NOT_DEFINED;
46055 + *pusValue = BP_NOT_DEFINED;
46056 + nRet = BP_BOARD_ID_NOT_SET;
46060 +} /* BpGetPressAndHoldResetGpio */
46062 +/**************************************************************************
46063 + * Name : BpGetVoipResetGpio
46065 + * Description: This function returns the GPIO pin assignment for the VOIP
46066 + * Reset operation.
46068 + * Parameters : [OUT] pusValue - Address of short word that the VOIP reset
46069 + * GPIO pin is returned in.
46070 + * [IN] dspNum - Address of the DSP to query.
46072 + * Returns : BP_SUCCESS - Success, value is returned.
46073 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
46074 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
46076 + ***************************************************************************/
46077 +int BpGetVoipResetGpio( unsigned char dspNum, unsigned short *pusValue )
46081 + if( g_pCurrentBp )
46083 + VOIP_DSP_INFO *pDspInfo = BpGetVoipDspConfig( dspNum );
46087 + *pusValue = pDspInfo->usGpioVoipReset;
46089 + if( *pusValue != BP_NOT_DEFINED ||
46090 + *pusValue == BP_UNEQUIPPED )
46092 + nRet = BP_SUCCESS;
46096 + nRet = BP_VALUE_NOT_DEFINED;
46101 + *pusValue = BP_NOT_DEFINED;
46102 + nRet = BP_BOARD_ID_NOT_FOUND;
46107 + *pusValue = BP_NOT_DEFINED;
46108 + nRet = BP_BOARD_ID_NOT_SET;
46112 +} /* BpGetVoipResetGpio */
46114 +/**************************************************************************
46115 + * Name : BpGetVoipIntrGpio
46117 + * Description: This function returns the GPIO pin assignment for VoIP interrupt.
46119 + * Parameters : [OUT] pusValue - Address of short word that the VOIP interrupt
46120 + * GPIO pin is returned in.
46121 + * [IN] dspNum - Address of the DSP to query.
46123 + * Returns : BP_SUCCESS - Success, value is returned.
46124 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
46125 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
46127 + ***************************************************************************/
46128 +int BpGetVoipIntrGpio( unsigned char dspNum, unsigned short *pusValue )
46132 + if( g_pCurrentBp )
46134 + VOIP_DSP_INFO *pDspInfo = BpGetVoipDspConfig( dspNum );
46138 + *pusValue = pDspInfo->usGpioVoipIntr;
46140 + if( *pusValue != BP_NOT_DEFINED )
46142 + nRet = BP_SUCCESS;
46146 + nRet = BP_VALUE_NOT_DEFINED;
46151 + *pusValue = BP_NOT_DEFINED;
46152 + nRet = BP_BOARD_ID_NOT_FOUND;
46157 + *pusValue = BP_NOT_DEFINED;
46158 + nRet = BP_BOARD_ID_NOT_SET;
46162 +} /* BpGetVoipIntrGpio */
46164 +/**************************************************************************
46165 + * Name : BpGetPcmciaResetGpio
46167 + * Description: This function returns the GPIO pin assignment for the PCMCIA
46168 + * Reset operation.
46170 + * Parameters : [OUT] pusValue - Address of short word that the PCMCIA reset
46171 + * GPIO pin is returned in.
46173 + * Returns : BP_SUCCESS - Success, value is returned.
46174 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
46175 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
46177 + ***************************************************************************/
46178 +int BpGetPcmciaResetGpio( unsigned short *pusValue )
46182 + if( g_pCurrentBp )
46184 + *pusValue = g_pCurrentBp->usGpioPcmciaReset;
46186 + if( g_pCurrentBp->usGpioPcmciaReset != BP_NOT_DEFINED )
46188 + nRet = BP_SUCCESS;
46192 + nRet = BP_VALUE_NOT_DEFINED;
46197 + *pusValue = BP_NOT_DEFINED;
46198 + nRet = BP_BOARD_ID_NOT_SET;
46202 +} /* BpGetPcmciaResetGpio */
46204 +/**************************************************************************
46205 + * Name : BpGetUartRtsCtsGpios
46207 + * Description: This function returns the GPIO pin assignments for RTS and CTS
46210 + * Parameters : [OUT] pusRts - Address of short word that the UART RTS GPIO
46211 + * pin is returned in.
46212 + * [OUT] pusCts - Address of short word that the UART CTS GPIO
46213 + * pin is returned in.
46215 + * Returns : BP_SUCCESS - Success, values are returned.
46216 + * BP_BOARD_ID_NOT_SET - Error, board id input string does not
46217 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
46219 + ***************************************************************************/
46220 +int BpGetRtsCtsUartGpios( unsigned short *pusRts, unsigned short *pusCts )
46224 + if( g_pCurrentBp )
46226 + *pusRts = g_pCurrentBp->usGpioUartRts;
46227 + *pusCts = g_pCurrentBp->usGpioUartCts;
46229 + if( g_pCurrentBp->usGpioUartRts != BP_NOT_DEFINED &&
46230 + g_pCurrentBp->usGpioUartCts != BP_NOT_DEFINED )
46232 + nRet = BP_SUCCESS;
46236 + nRet = BP_VALUE_NOT_DEFINED;
46241 + *pusRts = *pusCts = BP_NOT_DEFINED;
46242 + nRet = BP_BOARD_ID_NOT_SET;
46246 +} /* BpGetUartRtsCtsGpios */
46248 +/**************************************************************************
46249 + * Name : BpGetAdslLedGpio
46251 + * Description: This function returns the GPIO pin assignment for the ADSL
46254 + * Parameters : [OUT] pusValue - Address of short word that the ADSL LED
46255 + * GPIO pin is returned in.
46257 + * Returns : BP_SUCCESS - Success, value is returned.
46258 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
46259 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
46261 + ***************************************************************************/
46262 +int BpGetAdslLedGpio( unsigned short *pusValue )
46266 + if( g_pCurrentBp )
46268 + *pusValue = g_pCurrentBp->usGpioLedAdsl;
46270 + if( g_pCurrentBp->usGpioLedAdsl != BP_NOT_DEFINED )
46272 + nRet = BP_SUCCESS;
46276 + nRet = BP_VALUE_NOT_DEFINED;
46281 + *pusValue = BP_NOT_DEFINED;
46282 + nRet = BP_BOARD_ID_NOT_SET;
46286 +} /* BpGetAdslLedGpio */
46288 +/**************************************************************************
46289 + * Name : BpGetAdslFailLedGpio
46291 + * Description: This function returns the GPIO pin assignment for the ADSL
46292 + * LED that is used when there is a DSL connection failure.
46294 + * Parameters : [OUT] pusValue - Address of short word that the ADSL LED
46295 + * GPIO pin is returned in.
46297 + * Returns : BP_SUCCESS - Success, value is returned.
46298 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
46299 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
46301 + ***************************************************************************/
46302 +int BpGetAdslFailLedGpio( unsigned short *pusValue )
46306 + if( g_pCurrentBp )
46308 + *pusValue = g_pCurrentBp->usGpioLedAdslFail;
46310 + if( g_pCurrentBp->usGpioLedAdslFail != BP_NOT_DEFINED )
46312 + nRet = BP_SUCCESS;
46316 + nRet = BP_VALUE_NOT_DEFINED;
46321 + *pusValue = BP_NOT_DEFINED;
46322 + nRet = BP_BOARD_ID_NOT_SET;
46326 +} /* BpGetAdslFailLedGpio */
46328 +/**************************************************************************
46329 + * Name : BpGetWirelessLedGpio
46331 + * Description: This function returns the GPIO pin assignment for the Wireless
46334 + * Parameters : [OUT] pusValue - Address of short word that the Wireless LED
46335 + * GPIO pin is returned in.
46337 + * Returns : BP_SUCCESS - Success, value is returned.
46338 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
46339 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
46341 + ***************************************************************************/
46342 +int BpGetWirelessLedGpio( unsigned short *pusValue )
46346 + if( g_pCurrentBp )
46348 + *pusValue = g_pCurrentBp->usGpioLedWireless;
46350 + if( g_pCurrentBp->usGpioLedWireless != BP_NOT_DEFINED )
46352 + nRet = BP_SUCCESS;
46356 + nRet = BP_VALUE_NOT_DEFINED;
46361 + *pusValue = BP_NOT_DEFINED;
46362 + nRet = BP_BOARD_ID_NOT_SET;
46366 +} /* BpGetWirelessLedGpio */
46368 +/**************************************************************************
46369 + * Name : BpGetWirelessAntInUse
46371 + * Description: This function returns the antennas in use for wireless
46373 + * Parameters : [OUT] pusValue - Address of short word that the Wireless Antenna
46376 + * Returns : BP_SUCCESS - Success, value is returned.
46377 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
46378 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
46380 + ***************************************************************************/
46381 +int BpGetWirelessAntInUse( unsigned short *pusValue )
46385 + if( g_pCurrentBp )
46387 + *pusValue = g_pCurrentBp->usAntInUseWireless;
46389 + if( g_pCurrentBp->usAntInUseWireless != BP_NOT_DEFINED )
46391 + nRet = BP_SUCCESS;
46395 + nRet = BP_VALUE_NOT_DEFINED;
46400 + *pusValue = BP_NOT_DEFINED;
46401 + nRet = BP_BOARD_ID_NOT_SET;
46405 +} /* BpGetWirelessAntInUse */
46407 +/**************************************************************************
46408 + * Name : BpGetWirelessSesBtnGpio
46410 + * Description: This function returns the GPIO pin assignment for the Wireless
46413 + * Parameters : [OUT] pusValue - Address of short word that the Wireless LED
46414 + * GPIO pin is returned in.
46416 + * Returns : BP_SUCCESS - Success, value is returned.
46417 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
46418 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
46420 + ***************************************************************************/
46421 +int BpGetWirelessSesBtnGpio( unsigned short *pusValue )
46425 + if( g_pCurrentBp )
46427 + *pusValue = g_pCurrentBp->usGpioSesBtnWireless;
46429 + if( g_pCurrentBp->usGpioSesBtnWireless != BP_NOT_DEFINED )
46431 + nRet = BP_SUCCESS;
46435 + nRet = BP_VALUE_NOT_DEFINED;
46440 + *pusValue = BP_NOT_DEFINED;
46441 + nRet = BP_BOARD_ID_NOT_SET;
46445 +} /* BpGetWirelessSesBtnGpio */
46447 +/**************************************************************************
46448 + * Name : BpGetWirelessSesExtIntr
46450 + * Description: This function returns the external interrupt number for the
46451 + * Wireless Ses Button.
46453 + * Parameters : [OUT] pusValue - Address of short word that the Wireless Ses
46454 + * external interrup is returned in.
46456 + * Returns : BP_SUCCESS - Success, value is returned.
46457 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
46458 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
46460 + ***************************************************************************/
46461 +int BpGetWirelessSesExtIntr( unsigned short *pusValue )
46465 + if( g_pCurrentBp )
46467 + *pusValue = g_pCurrentBp->usExtIntrSesBtnWireless;
46469 + if( g_pCurrentBp->usExtIntrSesBtnWireless != BP_NOT_DEFINED )
46471 + nRet = BP_SUCCESS;
46475 + nRet = BP_VALUE_NOT_DEFINED;
46480 + *pusValue = BP_NOT_DEFINED;
46481 + nRet = BP_BOARD_ID_NOT_SET;
46486 +} /* BpGetWirelessSesExtIntr */
46488 +/**************************************************************************
46489 + * Name : BpGetWirelessSesLedGpio
46491 + * Description: This function returns the GPIO pin assignment for the Wireless
46494 + * Parameters : [OUT] pusValue - Address of short word that the Wireless Ses
46495 + * Led GPIO pin is returned in.
46497 + * Returns : BP_SUCCESS - Success, value is returned.
46498 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
46499 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
46501 + ***************************************************************************/
46502 +int BpGetWirelessSesLedGpio( unsigned short *pusValue )
46506 + if( g_pCurrentBp )
46508 + *pusValue = g_pCurrentBp->usGpioLedSesWireless;
46510 + if( g_pCurrentBp->usGpioLedSesWireless != BP_NOT_DEFINED )
46512 + nRet = BP_SUCCESS;
46516 + nRet = BP_VALUE_NOT_DEFINED;
46521 + *pusValue = BP_NOT_DEFINED;
46522 + nRet = BP_BOARD_ID_NOT_SET;
46527 +} /* BpGetWirelessSesLedGpio */
46529 +/**************************************************************************
46530 + * Name : BpGetUsbLedGpio
46532 + * Description: This function returns the GPIO pin assignment for the USB
46535 + * Parameters : [OUT] pusValue - Address of short word that the USB LED
46536 + * GPIO pin is returned in.
46538 + * Returns : BP_SUCCESS - Success, value is returned.
46539 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
46540 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
46542 + ***************************************************************************/
46543 +int BpGetUsbLedGpio( unsigned short *pusValue )
46547 + if( g_pCurrentBp )
46549 + *pusValue = g_pCurrentBp->usGpioLedUsb;
46551 + if( g_pCurrentBp->usGpioLedUsb != BP_NOT_DEFINED )
46553 + nRet = BP_SUCCESS;
46557 + nRet = BP_VALUE_NOT_DEFINED;
46562 + *pusValue = BP_NOT_DEFINED;
46563 + nRet = BP_BOARD_ID_NOT_SET;
46567 +} /* BpGetUsbLedGpio */
46569 +/**************************************************************************
46570 + * Name : BpGetHpnaLedGpio
46572 + * Description: This function returns the GPIO pin assignment for the HPNA
46575 + * Parameters : [OUT] pusValue - Address of short word that the HPNA LED
46576 + * GPIO pin is returned in.
46578 + * Returns : BP_SUCCESS - Success, value is returned.
46579 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
46580 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
46582 + ***************************************************************************/
46583 +int BpGetHpnaLedGpio( unsigned short *pusValue )
46587 + if( g_pCurrentBp )
46589 + *pusValue = g_pCurrentBp->usGpioLedHpna;
46591 + if( g_pCurrentBp->usGpioLedHpna != BP_NOT_DEFINED )
46593 + nRet = BP_SUCCESS;
46597 + nRet = BP_VALUE_NOT_DEFINED;
46602 + *pusValue = BP_NOT_DEFINED;
46603 + nRet = BP_BOARD_ID_NOT_SET;
46607 +} /* BpGetHpnaLedGpio */
46609 +/**************************************************************************
46610 + * Name : BpGetWanDataLedGpio
46612 + * Description: This function returns the GPIO pin assignment for the WAN Data
46615 + * Parameters : [OUT] pusValue - Address of short word that the WAN Data LED
46616 + * GPIO pin is returned in.
46618 + * Returns : BP_SUCCESS - Success, value is returned.
46619 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
46620 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
46622 + ***************************************************************************/
46623 +int BpGetWanDataLedGpio( unsigned short *pusValue )
46627 + if( g_pCurrentBp )
46629 + *pusValue = g_pCurrentBp->usGpioLedWanData;
46631 + if( g_pCurrentBp->usGpioLedWanData != BP_NOT_DEFINED )
46633 + nRet = BP_SUCCESS;
46637 + nRet = BP_VALUE_NOT_DEFINED;
46642 + *pusValue = BP_NOT_DEFINED;
46643 + nRet = BP_BOARD_ID_NOT_SET;
46647 +} /* BpGetWanDataLedGpio */
46649 +/**************************************************************************
46650 + * Name : BpGetPppLedGpio
46652 + * Description: This function returns the GPIO pin assignment for the PPP
46655 + * Parameters : [OUT] pusValue - Address of short word that the PPP LED
46656 + * GPIO pin is returned in.
46658 + * Returns : BP_SUCCESS - Success, value is returned.
46659 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
46660 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
46662 + ***************************************************************************/
46663 +int BpGetPppLedGpio( unsigned short *pusValue )
46667 + if( g_pCurrentBp )
46669 + *pusValue = g_pCurrentBp->usGpioLedPpp;
46671 + if( g_pCurrentBp->usGpioLedPpp != BP_NOT_DEFINED )
46673 + nRet = BP_SUCCESS;
46677 + nRet = BP_VALUE_NOT_DEFINED;
46682 + *pusValue = BP_NOT_DEFINED;
46683 + nRet = BP_BOARD_ID_NOT_SET;
46687 +} /* BpGetPppLedGpio */
46689 +/**************************************************************************
46690 + * Name : BpGetPppFailLedGpio
46692 + * Description: This function returns the GPIO pin assignment for the PPP
46693 + * LED that is used when there is a PPP connection failure.
46695 + * Parameters : [OUT] pusValue - Address of short word that the PPP LED
46696 + * GPIO pin is returned in.
46698 + * Returns : BP_SUCCESS - Success, value is returned.
46699 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
46700 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
46702 + ***************************************************************************/
46703 +int BpGetPppFailLedGpio( unsigned short *pusValue )
46707 + if( g_pCurrentBp )
46709 + *pusValue = g_pCurrentBp->usGpioLedPppFail;
46711 + if( g_pCurrentBp->usGpioLedPppFail != BP_NOT_DEFINED )
46713 + nRet = BP_SUCCESS;
46717 + nRet = BP_VALUE_NOT_DEFINED;
46722 + *pusValue = BP_NOT_DEFINED;
46723 + nRet = BP_BOARD_ID_NOT_SET;
46727 +} /* BpGetPppFailLedGpio */
46729 +/**************************************************************************
46730 + * Name : BpGetBootloaderPowerOnLedGpio
46732 + * Description: This function returns the GPIO pin assignment for the power
46733 + * on LED that is set by the bootloader.
46735 + * Parameters : [OUT] pusValue - Address of short word that the alarm LED
46736 + * GPIO pin is returned in.
46738 + * Returns : BP_SUCCESS - Success, value is returned.
46739 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
46740 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
46742 + ***************************************************************************/
46743 +int BpGetBootloaderPowerOnLedGpio( unsigned short *pusValue )
46747 + if( g_pCurrentBp )
46749 + *pusValue = g_pCurrentBp->usGpioLedBlPowerOn;
46751 + if( g_pCurrentBp->usGpioLedBlPowerOn != BP_NOT_DEFINED )
46753 + nRet = BP_SUCCESS;
46757 + nRet = BP_VALUE_NOT_DEFINED;
46762 + *pusValue = BP_NOT_DEFINED;
46763 + nRet = BP_BOARD_ID_NOT_SET;
46767 +} /* BpGetBootloaderPowerOn */
46769 +/**************************************************************************
46770 + * Name : BpGetBootloaderAlarmLedGpio
46772 + * Description: This function returns the GPIO pin assignment for the alarm
46773 + * LED that is set by the bootloader.
46775 + * Parameters : [OUT] pusValue - Address of short word that the alarm LED
46776 + * GPIO pin is returned in.
46778 + * Returns : BP_SUCCESS - Success, value is returned.
46779 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
46780 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
46782 + ***************************************************************************/
46783 +int BpGetBootloaderAlarmLedGpio( unsigned short *pusValue )
46787 + if( g_pCurrentBp )
46789 + *pusValue = g_pCurrentBp->usGpioLedBlAlarm;
46791 + if( g_pCurrentBp->usGpioLedBlAlarm != BP_NOT_DEFINED )
46793 + nRet = BP_SUCCESS;
46797 + nRet = BP_VALUE_NOT_DEFINED;
46802 + *pusValue = BP_NOT_DEFINED;
46803 + nRet = BP_BOARD_ID_NOT_SET;
46807 +} /* BpGetBootloaderAlarmLedGpio */
46809 +/**************************************************************************
46810 + * Name : BpGetBootloaderResetCfgLedGpio
46812 + * Description: This function returns the GPIO pin assignment for the reset
46813 + * configuration LED that is set by the bootloader.
46815 + * Parameters : [OUT] pusValue - Address of short word that the reset
46816 + * configuration LED GPIO pin is returned in.
46818 + * Returns : BP_SUCCESS - Success, value is returned.
46819 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
46820 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
46822 + ***************************************************************************/
46823 +int BpGetBootloaderResetCfgLedGpio( unsigned short *pusValue )
46827 + if( g_pCurrentBp )
46829 + *pusValue = g_pCurrentBp->usGpioLedBlResetCfg;
46831 + if( g_pCurrentBp->usGpioLedBlResetCfg != BP_NOT_DEFINED )
46833 + nRet = BP_SUCCESS;
46837 + nRet = BP_VALUE_NOT_DEFINED;
46842 + *pusValue = BP_NOT_DEFINED;
46843 + nRet = BP_BOARD_ID_NOT_SET;
46847 +} /* BpGetBootloaderResetCfgLedGpio */
46849 +/**************************************************************************
46850 + * Name : BpGetBootloaderStopLedGpio
46852 + * Description: This function returns the GPIO pin assignment for the break
46853 + * into bootloader LED that is set by the bootloader.
46855 + * Parameters : [OUT] pusValue - Address of short word that the break into
46856 + * bootloader LED GPIO pin is returned in.
46858 + * Returns : BP_SUCCESS - Success, value is returned.
46859 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
46860 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
46862 + ***************************************************************************/
46863 +int BpGetBootloaderStopLedGpio( unsigned short *pusValue )
46867 + if( g_pCurrentBp )
46869 + *pusValue = g_pCurrentBp->usGpioLedBlStop;
46871 + if( g_pCurrentBp->usGpioLedBlStop != BP_NOT_DEFINED )
46873 + nRet = BP_SUCCESS;
46877 + nRet = BP_VALUE_NOT_DEFINED;
46882 + *pusValue = BP_NOT_DEFINED;
46883 + nRet = BP_BOARD_ID_NOT_SET;
46887 +} /* BpGetBootloaderStopLedGpio */
46889 +/**************************************************************************
46890 + * Name : BpGetVoipLedGpio
46892 + * Description: This function returns the GPIO pin assignment for the VOIP
46895 + * Parameters : [OUT] pusValue - Address of short word that the VOIP LED
46896 + * GPIO pin is returned in.
46898 + * Returns : BP_SUCCESS - Success, value is returned.
46899 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
46900 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
46903 + * Note : The VoIP structure would allow for having one LED per DSP
46904 + * however, the board initialization function assumes only one
46905 + * LED per functionality (ie one LED for VoIP). Therefore in
46906 + * order to keep this tidy and simple we do not make usage of the
46907 + * one-LED-per-DSP function. Instead, we assume that the LED for
46908 + * VoIP is unique and associated with DSP 0 (always present on
46909 + * any VoIP platform). If changing this to a LED-per-DSP function
46910 + * then one need to update the board initialization driver in
46911 + * bcmdrivers\opensource\char\board\bcm963xx\impl1
46912 + ***************************************************************************/
46913 +int BpGetVoipLedGpio( unsigned short *pusValue )
46917 + if( g_pCurrentBp )
46919 + VOIP_DSP_INFO *pDspInfo = BpGetVoipDspConfig( 0 );
46923 + *pusValue = pDspInfo->usGpioLedVoip;
46925 + if( *pusValue != BP_NOT_DEFINED )
46927 + nRet = BP_SUCCESS;
46931 + nRet = BP_VALUE_NOT_DEFINED;
46936 + *pusValue = BP_NOT_DEFINED;
46937 + nRet = BP_BOARD_ID_NOT_FOUND;
46942 + *pusValue = BP_NOT_DEFINED;
46943 + nRet = BP_BOARD_ID_NOT_SET;
46947 +} /* BpGetVoipLedGpio */
46949 +/**************************************************************************
46950 + * Name : BpGetWirelessExtIntr
46952 + * Description: This function returns the Wireless external interrupt number.
46954 + * Parameters : [OUT] pulValue - Address of short word that the wireless
46955 + * external interrupt number is returned in.
46957 + * Returns : BP_SUCCESS - Success, value is returned.
46958 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
46959 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
46961 + ***************************************************************************/
46962 +int BpGetWirelessExtIntr( unsigned long *pulValue )
46966 + if( g_pCurrentBp )
46968 + *pulValue = g_pCurrentBp->usExtIntrWireless;
46970 + if( g_pCurrentBp->usExtIntrWireless != BP_NOT_DEFINED )
46972 + nRet = BP_SUCCESS;
46976 + nRet = BP_VALUE_NOT_DEFINED;
46981 + *pulValue = BP_NOT_DEFINED;
46982 + nRet = BP_BOARD_ID_NOT_SET;
46986 +} /* BpGetWirelessExtIntr */
46988 +/**************************************************************************
46989 + * Name : BpGetAdslDyingGaspExtIntr
46991 + * Description: This function returns the ADSL Dying Gasp external interrupt
46994 + * Parameters : [OUT] pulValue - Address of short word that the ADSL Dying Gasp
46995 + * external interrupt number is returned in.
46997 + * Returns : BP_SUCCESS - Success, value is returned.
46998 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
46999 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
47001 + ***************************************************************************/
47002 +int BpGetAdslDyingGaspExtIntr( unsigned long *pulValue )
47006 + if( g_pCurrentBp )
47008 + *pulValue = g_pCurrentBp->usExtIntrAdslDyingGasp;
47010 + if( g_pCurrentBp->usExtIntrAdslDyingGasp != BP_NOT_DEFINED )
47012 + nRet = BP_SUCCESS;
47016 + nRet = BP_VALUE_NOT_DEFINED;
47021 + *pulValue = BP_NOT_DEFINED;
47022 + nRet = BP_BOARD_ID_NOT_SET;
47026 +} /* BpGetAdslDyingGaspExtIntr */
47028 +/**************************************************************************
47029 + * Name : BpGetVoipExtIntr
47031 + * Description: This function returns the VOIP external interrupt number.
47033 + * Parameters : [OUT] pulValue - Address of short word that the VOIP
47034 + * external interrupt number is returned in.
47035 + * [IN] dspNum - Address of the DSP to query.
47037 + * Returns : BP_SUCCESS - Success, value is returned.
47038 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
47039 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
47041 + ***************************************************************************/
47042 +int BpGetVoipExtIntr( unsigned char dspNum, unsigned long *pulValue )
47046 + if( g_pCurrentBp )
47048 + VOIP_DSP_INFO *pDspInfo = BpGetVoipDspConfig( dspNum );
47052 + *pulValue = pDspInfo->usExtIntrVoip;
47054 + if( *pulValue != BP_NOT_DEFINED )
47056 + nRet = BP_SUCCESS;
47060 + nRet = BP_VALUE_NOT_DEFINED;
47065 + *pulValue = BP_NOT_DEFINED;
47066 + nRet = BP_BOARD_ID_NOT_FOUND;
47071 + *pulValue = BP_NOT_DEFINED;
47072 + nRet = BP_BOARD_ID_NOT_SET;
47076 +} /* BpGetVoipExtIntr */
47078 +/**************************************************************************
47079 + * Name : BpGetHpnaExtIntr
47081 + * Description: This function returns the HPNA external interrupt number.
47083 + * Parameters : [OUT] pulValue - Address of short word that the HPNA
47084 + * external interrupt number is returned in.
47086 + * Returns : BP_SUCCESS - Success, value is returned.
47087 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
47088 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
47090 + ***************************************************************************/
47091 +int BpGetHpnaExtIntr( unsigned long *pulValue )
47095 + if( g_pCurrentBp )
47097 + *pulValue = g_pCurrentBp->usExtIntrHpna;
47099 + if( g_pCurrentBp->usExtIntrHpna != BP_NOT_DEFINED )
47101 + nRet = BP_SUCCESS;
47105 + nRet = BP_VALUE_NOT_DEFINED;
47110 + *pulValue = BP_NOT_DEFINED;
47111 + nRet = BP_BOARD_ID_NOT_SET;
47115 +} /* BpGetHpnaExtIntr */
47117 +/**************************************************************************
47118 + * Name : BpGetHpnaChipSelect
47120 + * Description: This function returns the HPNA chip select number.
47122 + * Parameters : [OUT] pulValue - Address of short word that the HPNA
47123 + * chip select number is returned in.
47125 + * Returns : BP_SUCCESS - Success, value is returned.
47126 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
47127 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
47129 + ***************************************************************************/
47130 +int BpGetHpnaChipSelect( unsigned long *pulValue )
47134 + if( g_pCurrentBp )
47136 + *pulValue = g_pCurrentBp->usCsHpna;
47138 + if( g_pCurrentBp->usCsHpna != BP_NOT_DEFINED )
47140 + nRet = BP_SUCCESS;
47144 + nRet = BP_VALUE_NOT_DEFINED;
47149 + *pulValue = BP_NOT_DEFINED;
47150 + nRet = BP_BOARD_ID_NOT_SET;
47154 +} /* BpGetHpnaChipSelect */
47156 +/**************************************************************************
47157 + * Name : BpGetVoipChipSelect
47159 + * Description: This function returns the VOIP chip select number.
47161 + * Parameters : [OUT] pulValue - Address of short word that the VOIP
47162 + * chip select number is returned in.
47163 + * [IN] dspNum - Address of the DSP to query.
47165 + * Returns : BP_SUCCESS - Success, value is returned.
47166 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
47167 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
47169 + ***************************************************************************/
47170 +int BpGetVoipChipSelect( unsigned char dspNum, unsigned long *pulValue )
47174 + if( g_pCurrentBp )
47176 + VOIP_DSP_INFO *pDspInfo = BpGetVoipDspConfig( dspNum );
47180 + *pulValue = pDspInfo->usCsVoip;
47182 + if( *pulValue != BP_NOT_DEFINED )
47184 + nRet = BP_SUCCESS;
47188 + nRet = BP_VALUE_NOT_DEFINED;
47193 + *pulValue = BP_NOT_DEFINED;
47194 + nRet = BP_BOARD_ID_NOT_FOUND;
47199 + *pulValue = BP_NOT_DEFINED;
47200 + nRet = BP_BOARD_ID_NOT_SET;
47204 +} /* BpGetVoipChipSelect */
47206 diff -urN linux-2.6.8.1/boardparams/bcm963xx/boardparms.h linux-2.6.8.1-brcm63xx/boardparms/bcm963xx/boardparms.h
47207 --- linux-2.6.8.1/boardparams/bcm963xx/boardparms.h 1970-01-01 01:00:00.000000000 +0100
47208 +++ linux-2.6.8.1-brcm63xx/boardparms/bcm963xx/boardparms.h 2006-06-26 09:07:10.000000000 +0200
47213 + Copyright 2003 Broadcom Corp. All Rights Reserved.
47215 + This program is free software; you can distribute it and/or modify it
47216 + under the terms of the GNU General Public License (Version 2) as
47217 + published by the Free Software Foundation.
47219 + This program is distributed in the hope it will be useful, but WITHOUT
47220 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
47221 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
47222 + for more details.
47224 + You should have received a copy of the GNU General Public License along
47225 + with this program; if not, write to the Free Software Foundation, Inc.,
47226 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
47230 +/**************************************************************************
47231 + * File Name : boardparms.h
47233 + * Description: This file contains definitions and function prototypes for
47234 + * the BCM63xx board parameter access functions.
47236 + * Updates : 07/14/2003 Created.
47237 + ***************************************************************************/
47239 +#if !defined(_BOARDPARMS_H)
47240 +#define _BOARDPARMS_H
47241 +#define CONFIG_BCM96348
47246 +/* Return codes. */
47247 +#define BP_SUCCESS 0
47248 +#define BP_BOARD_ID_NOT_FOUND 1
47249 +#define BP_VALUE_NOT_DEFINED 2
47250 +#define BP_BOARD_ID_NOT_SET 3
47252 +/* Values for BpGetSdramSize. */
47253 +#define BP_MEMORY_8MB_1_CHIP 0
47254 +#define BP_MEMORY_16MB_1_CHIP 1
47255 +#define BP_MEMORY_32MB_1_CHIP 2
47256 +#define BP_MEMORY_64MB_2_CHIP 3
47257 +#define BP_MEMORY_32MB_2_CHIP 4
47258 +#define BP_MEMORY_16MB_2_CHIP 5
47260 +/* Values for EthernetMacInfo PhyType. */
47261 +#define BP_ENET_NO_PHY 0
47262 +#define BP_ENET_INTERNAL_PHY 1
47263 +#define BP_ENET_EXTERNAL_PHY 2
47264 +#define BP_ENET_EXTERNAL_SWITCH 3
47266 +/* Values for EthernetMacInfo Configuration type. */
47267 +#define BP_ENET_CONFIG_MDIO 0 /* Internal PHY, External PHY, Switch+(no GPIO, no SPI, no MDIO Pseudo phy */
47268 +#define BP_ENET_CONFIG_GPIO 1 /* Bcm96345GW board + Bcm5325M/E */
47269 +#define BP_ENET_CONFIG_MDIO_PSEUDO_PHY 2 /* Bcm96348GW board + Bcm5325E */
47270 +#define BP_ENET_CONFIG_SPI_SSB_0 3 /* Bcm96348GW board + Bcm5325M/E */
47271 +#define BP_ENET_CONFIG_SPI_SSB_1 4 /* Bcm96348GW board + Bcm5325M/E */
47272 +#define BP_ENET_CONFIG_SPI_SSB_2 5 /* Bcm96348GW board + Bcm5325M/E */
47273 +#define BP_ENET_CONFIG_SPI_SSB_3 6 /* Bcm96348GW board + Bcm5325M/E */
47275 +/* Values for EthernetMacInfo Reverse MII. */
47276 +#define BP_ENET_NO_REVERSE_MII 0
47277 +#define BP_ENET_REVERSE_MII 1
47279 +/* Values for VoIPDSPInfo DSPType. */
47280 +#define BP_VOIP_NO_DSP 0
47281 +#define BP_VOIP_DSP 1
47284 +/* Values for GPIO pin assignments (AH = Active High, AL = Active Low). */
47285 +#define BP_ACTIVE_MASK 0x8000
47286 +#define BP_ACTIVE_HIGH 0x0000
47287 +#define BP_ACTIVE_LOW 0x8000
47288 +#define BP_GPIO_0_AH (0 | BP_ACTIVE_HIGH)
47289 +#define BP_GPIO_0_AL (0 | BP_ACTIVE_LOW)
47290 +#define BP_GPIO_1_AH (1 | BP_ACTIVE_HIGH)
47291 +#define BP_GPIO_1_AL (1 | BP_ACTIVE_LOW)
47292 +#define BP_GPIO_2_AH (2 | BP_ACTIVE_HIGH)
47293 +#define BP_GPIO_2_AL (2 | BP_ACTIVE_LOW)
47294 +#define BP_GPIO_3_AH (3 | BP_ACTIVE_HIGH)
47295 +#define BP_GPIO_3_AL (3 | BP_ACTIVE_LOW)
47296 +#define BP_GPIO_4_AH (4 | BP_ACTIVE_HIGH)
47297 +#define BP_GPIO_4_AL (4 | BP_ACTIVE_LOW)
47298 +#define BP_GPIO_5_AH (5 | BP_ACTIVE_HIGH)
47299 +#define BP_GPIO_5_AL (5 | BP_ACTIVE_LOW)
47300 +#define BP_GPIO_6_AH (6 | BP_ACTIVE_HIGH)
47301 +#define BP_GPIO_6_AL (6 | BP_ACTIVE_LOW)
47302 +#define BP_GPIO_7_AH (7 | BP_ACTIVE_HIGH)
47303 +#define BP_GPIO_7_AL (7 | BP_ACTIVE_LOW)
47304 +#define BP_GPIO_8_AH (8 | BP_ACTIVE_HIGH)
47305 +#define BP_GPIO_8_AL (8 | BP_ACTIVE_LOW)
47306 +#define BP_GPIO_9_AH (9 | BP_ACTIVE_HIGH)
47307 +#define BP_GPIO_9_AL (9 | BP_ACTIVE_LOW)
47308 +#define BP_GPIO_10_AH (10 | BP_ACTIVE_HIGH)
47309 +#define BP_GPIO_10_AL (10 | BP_ACTIVE_LOW)
47310 +#define BP_GPIO_11_AH (11 | BP_ACTIVE_HIGH)
47311 +#define BP_GPIO_11_AL (11 | BP_ACTIVE_LOW)
47312 +#define BP_GPIO_12_AH (12 | BP_ACTIVE_HIGH)
47313 +#define BP_GPIO_12_AL (12 | BP_ACTIVE_LOW)
47314 +#define BP_GPIO_13_AH (13 | BP_ACTIVE_HIGH)
47315 +#define BP_GPIO_13_AL (13 | BP_ACTIVE_LOW)
47316 +#define BP_GPIO_14_AH (14 | BP_ACTIVE_HIGH)
47317 +#define BP_GPIO_14_AL (14 | BP_ACTIVE_LOW)
47318 +#define BP_GPIO_15_AH (15 | BP_ACTIVE_HIGH)
47319 +#define BP_GPIO_15_AL (15 | BP_ACTIVE_LOW)
47320 +#define BP_GPIO_16_AH (16 | BP_ACTIVE_HIGH)
47321 +#define BP_GPIO_16_AL (16 | BP_ACTIVE_LOW)
47322 +#define BP_GPIO_17_AH (17 | BP_ACTIVE_HIGH)
47323 +#define BP_GPIO_17_AL (17 | BP_ACTIVE_LOW)
47324 +#define BP_GPIO_18_AH (18 | BP_ACTIVE_HIGH)
47325 +#define BP_GPIO_18_AL (18 | BP_ACTIVE_LOW)
47326 +#define BP_GPIO_19_AH (19 | BP_ACTIVE_HIGH)
47327 +#define BP_GPIO_19_AL (19 | BP_ACTIVE_LOW)
47328 +#define BP_GPIO_20_AH (20 | BP_ACTIVE_HIGH)
47329 +#define BP_GPIO_20_AL (20 | BP_ACTIVE_LOW)
47330 +#define BP_GPIO_21_AH (21 | BP_ACTIVE_HIGH)
47331 +#define BP_GPIO_21_AL (21 | BP_ACTIVE_LOW)
47332 +#define BP_GPIO_22_AH (22 | BP_ACTIVE_HIGH)
47333 +#define BP_GPIO_22_AL (22 | BP_ACTIVE_LOW)
47334 +#define BP_GPIO_23_AH (23 | BP_ACTIVE_HIGH)
47335 +#define BP_GPIO_23_AL (23 | BP_ACTIVE_LOW)
47336 +#define BP_GPIO_24_AH (24 | BP_ACTIVE_HIGH)
47337 +#define BP_GPIO_24_AL (24 | BP_ACTIVE_LOW)
47338 +#define BP_GPIO_25_AH (25 | BP_ACTIVE_HIGH)
47339 +#define BP_GPIO_25_AL (25 | BP_ACTIVE_LOW)
47340 +#define BP_GPIO_26_AH (26 | BP_ACTIVE_HIGH)
47341 +#define BP_GPIO_26_AL (26 | BP_ACTIVE_LOW)
47342 +#define BP_GPIO_27_AH (27 | BP_ACTIVE_HIGH)
47343 +#define BP_GPIO_27_AL (27 | BP_ACTIVE_LOW)
47344 +#define BP_GPIO_28_AH (28 | BP_ACTIVE_HIGH)
47345 +#define BP_GPIO_28_AL (28 | BP_ACTIVE_LOW)
47346 +#define BP_GPIO_29_AH (29 | BP_ACTIVE_HIGH)
47347 +#define BP_GPIO_29_AL (29 | BP_ACTIVE_LOW)
47348 +#define BP_GPIO_30_AH (30 | BP_ACTIVE_HIGH)
47349 +#define BP_GPIO_30_AL (30 | BP_ACTIVE_LOW)
47350 +#define BP_GPIO_31_AH (31 | BP_ACTIVE_HIGH)
47351 +#define BP_GPIO_31_AL (31 | BP_ACTIVE_LOW)
47352 +#define BP_GPIO_32_AH (32 | BP_ACTIVE_HIGH)
47353 +#define BP_GPIO_32_AL (32 | BP_ACTIVE_LOW)
47354 +#define BP_GPIO_33_AH (33 | BP_ACTIVE_HIGH)
47355 +#define BP_GPIO_33_AL (33 | BP_ACTIVE_LOW)
47356 +#define BP_GPIO_34_AH (34 | BP_ACTIVE_HIGH)
47357 +#define BP_GPIO_34_AL (34 | BP_ACTIVE_LOW)
47358 +#define BP_GPIO_35_AH (35 | BP_ACTIVE_HIGH)
47359 +#define BP_GPIO_35_AL (35 | BP_ACTIVE_LOW)
47360 +#define BP_GPIO_36_AH (36 | BP_ACTIVE_HIGH)
47361 +#define BP_GPIO_36_AL (36 | BP_ACTIVE_LOW)
47363 +/* Values for external interrupt assignments. */
47364 +#define BP_EXT_INTR_0 0
47365 +#define BP_EXT_INTR_1 1
47366 +#define BP_EXT_INTR_2 2
47367 +#define BP_EXT_INTR_3 3
47369 +/* Values for chip select assignments. */
47375 +/* Value for GPIO and external interrupt fields that are not used. */
47376 +#define BP_NOT_DEFINED 0xffff
47377 +#define BP_HW_DEFINED 0xfff0
47378 +#define BP_UNEQUIPPED 0xfff1
47380 +/* Maximum size of the board id string. */
47381 +#define BP_BOARD_ID_LEN 16
47383 +/* Maximum number of Ethernet MACs. */
47384 +#define BP_MAX_ENET_MACS 2
47386 +/* Maximum number of VoIP DSPs. */
47387 +#define BP_MAX_VOIP_DSP 2
47389 +/* Wireless Antenna Settings. */
47390 +#define BP_WLAN_ANT_MAIN 0
47391 +#define BP_WLAN_ANT_AUX 1
47392 +#define BP_WLAN_ANT_BOTH 3
47394 +#if !defined(__ASSEMBLER__)
47396 +/* Information about an Ethernet MAC. If ucPhyType is BP_ENET_NO_PHY,
47397 + * then the other fields are not valid.
47399 +typedef struct EthernetMacInfo
47401 + unsigned char ucPhyType; /* BP_ENET_xxx */
47402 + unsigned char ucPhyAddress; /* 0 to 31 */
47403 + unsigned short usGpioPhySpiSck; /* GPIO pin or not defined */
47404 + unsigned short usGpioPhySpiSs; /* GPIO pin or not defined */
47405 + unsigned short usGpioPhySpiMosi; /* GPIO pin or not defined */
47406 + unsigned short usGpioPhySpiMiso; /* GPIO pin or not defined */
47407 + unsigned short usGpioPhyReset; /* GPIO pin or not defined (96348LV) */
47408 + unsigned short numSwitchPorts; /* Number of PHY ports */
47409 + unsigned short usConfigType; /* Configuration type */
47410 + unsigned short usReverseMii; /* Reverse MII */
47411 +} ETHERNET_MAC_INFO, *PETHERNET_MAC_INFO;
47414 +/* Information about VoIP DSPs. If ucDspType is BP_VOIP_NO_DSP,
47415 + * then the other fields are not valid.
47417 +typedef struct VoIPDspInfo
47419 + unsigned char ucDspType;
47420 + unsigned char ucDspAddress;
47421 + unsigned short usExtIntrVoip;
47422 + unsigned short usGpioVoipReset;
47423 + unsigned short usGpioVoipIntr;
47424 + unsigned short usGpioLedVoip;
47425 + unsigned short usCsVoip;
47430 +/**************************************************************************
47431 + * Name : BpSetBoardId
47433 + * Description: This function find the BOARD_PARAMETERS structure for the
47434 + * specified board id string and assigns it to a global, static
47437 + * Parameters : [IN] pszBoardId - Board id string that is saved into NVRAM.
47439 + * Returns : BP_SUCCESS - Success, value is returned.
47440 + * BP_BOARD_ID_NOT_FOUND - Error, board id input string does not
47441 + * have a board parameters configuration record.
47442 + ***************************************************************************/
47443 +int BpSetBoardId( char *pszBoardId );
47445 +/**************************************************************************
47446 + * Name : BpGetBoardIds
47448 + * Description: This function returns all of the supported board id strings.
47450 + * Parameters : [OUT] pszBoardIds - Address of a buffer that the board id
47451 + * strings are returned in. Each id starts at BP_BOARD_ID_LEN
47453 + * [IN] nBoardIdsSize - Number of BP_BOARD_ID_LEN elements that
47454 + * were allocated in pszBoardIds.
47456 + * Returns : Number of board id strings returned.
47457 + ***************************************************************************/
47458 +int BpGetBoardIds( char *pszBoardIds, int nBoardIdsSize );
47460 +/**************************************************************************
47461 + * Name : BpGetEthernetMacInfo
47463 + * Description: This function returns all of the supported board id strings.
47465 + * Parameters : [OUT] pEnetInfos - Address of an array of ETHERNET_MAC_INFO
47467 + * [IN] nNumEnetInfos - Number of ETHERNET_MAC_INFO elements that
47468 + * are pointed to by pEnetInfos.
47470 + * Returns : BP_SUCCESS - Success, value is returned.
47471 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
47472 + ***************************************************************************/
47473 +int BpGetEthernetMacInfo( PETHERNET_MAC_INFO pEnetInfos, int nNumEnetInfos );
47475 +/**************************************************************************
47476 + * Name : BpGetSdramSize
47478 + * Description: This function returns a constant that describees the board's
47479 + * SDRAM type and size.
47481 + * Parameters : [OUT] pulSdramSize - Address of short word that the SDRAM size
47482 + * is returned in.
47484 + * Returns : BP_SUCCESS - Success, value is returned.
47485 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
47486 + ***************************************************************************/
47487 +int BpGetSdramSize( unsigned long *pulSdramSize );
47489 +/**************************************************************************
47490 + * Name : BpGetPsiSize
47492 + * Description: This function returns the persistent storage size in K bytes.
47494 + * Parameters : [OUT] pulPsiSize - Address of short word that the persistent
47495 + * storage size is returned in.
47497 + * Returns : BP_SUCCESS - Success, value is returned.
47498 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
47499 + ***************************************************************************/
47500 +int BpGetPsiSize( unsigned long *pulPsiSize );
47502 +/**************************************************************************
47503 + * Name : BpGetRj11InnerOuterPairGpios
47505 + * Description: This function returns the GPIO pin assignments for changing
47506 + * between the RJ11 inner pair and RJ11 outer pair.
47508 + * Parameters : [OUT] pusInner - Address of short word that the RJ11 inner pair
47509 + * GPIO pin is returned in.
47510 + * [OUT] pusOuter - Address of short word that the RJ11 outer pair
47511 + * GPIO pin is returned in.
47513 + * Returns : BP_SUCCESS - Success, values are returned.
47514 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
47515 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
47517 + ***************************************************************************/
47518 +int BpGetRj11InnerOuterPairGpios( unsigned short *pusInner,
47519 + unsigned short *pusOuter );
47521 +/**************************************************************************
47522 + * Name : BpGetPressAndHoldResetGpio
47524 + * Description: This function returns the GPIO pin assignment for the press
47525 + * and hold reset button.
47527 + * Parameters : [OUT] pusValue - Address of short word that the press and hold
47528 + * reset button GPIO pin is returned in.
47530 + * Returns : BP_SUCCESS - Success, value is returned.
47531 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
47532 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
47534 + ***************************************************************************/
47535 +int BpGetPressAndHoldResetGpio( unsigned short *pusValue );
47537 +/**************************************************************************
47538 + * Name : BpGetVoipResetGpio
47540 + * Description: This function returns the GPIO pin assignment for the VOIP
47541 + * Reset operation.
47543 + * Parameters : [OUT] pusValue - Address of short word that the VOIP reset
47544 + * GPIO pin is returned in.
47545 + * [IN] dspNum - Address of the DSP to query.
47547 + * Returns : BP_SUCCESS - Success, value is returned.
47548 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
47549 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
47551 + ***************************************************************************/
47552 +int BpGetVoipResetGpio( unsigned char dspNum, unsigned short *pusValue );
47554 +/**************************************************************************
47555 + * Name : BpGetVoipIntrGpio
47557 + * Description: This function returns the GPIO pin assignment for VoIP interrupt.
47559 + * Parameters : [OUT] pusValue - Address of short word that the VOIP interrupt
47560 + * GPIO pin is returned in.
47561 + * [IN] dspNum - Address of the DSP to query.
47563 + * Returns : BP_SUCCESS - Success, value is returned.
47564 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
47565 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
47567 + ***************************************************************************/
47568 +int BpGetVoipIntrGpio( unsigned char dspNum, unsigned short *pusValue );
47570 +/**************************************************************************
47571 + * Name : BpGetPcmciaResetGpio
47573 + * Description: This function returns the GPIO pin assignment for the PCMCIA
47574 + * Reset operation.
47576 + * Parameters : [OUT] pusValue - Address of short word that the PCMCIA reset
47577 + * GPIO pin is returned in.
47579 + * Returns : BP_SUCCESS - Success, value is returned.
47580 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
47581 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
47583 + ***************************************************************************/
47584 +int BpGetPcmciaResetGpio( unsigned short *pusValue );
47586 +/**************************************************************************
47587 + * Name : BpGetUartRtsCtsGpios
47589 + * Description: This function returns the GPIO pin assignments for RTS and CTS
47592 + * Parameters : [OUT] pusRts - Address of short word that the UART RTS GPIO
47593 + * pin is returned in.
47594 + * [OUT] pusCts - Address of short word that the UART CTS GPIO
47595 + * pin is returned in.
47597 + * Returns : BP_SUCCESS - Success, values are returned.
47598 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
47599 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
47601 + ***************************************************************************/
47602 +int BpGetRtsCtsUartGpios( unsigned short *pusRts, unsigned short *pusCts );
47604 +/**************************************************************************
47605 + * Name : BpGetAdslLedGpio
47607 + * Description: This function returns the GPIO pin assignment for the ADSL
47610 + * Parameters : [OUT] pusValue - Address of short word that the ADSL LED
47611 + * GPIO pin is returned in.
47613 + * Returns : BP_SUCCESS - Success, value is returned.
47614 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
47615 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
47617 + ***************************************************************************/
47618 +int BpGetAdslLedGpio( unsigned short *pusValue );
47620 +/**************************************************************************
47621 + * Name : BpGetAdslFailLedGpio
47623 + * Description: This function returns the GPIO pin assignment for the ADSL
47624 + * LED that is used when there is a DSL connection failure.
47626 + * Parameters : [OUT] pusValue - Address of short word that the ADSL LED
47627 + * GPIO pin is returned in.
47629 + * Returns : BP_SUCCESS - Success, value is returned.
47630 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
47631 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
47633 + ***************************************************************************/
47634 +int BpGetAdslFailLedGpio( unsigned short *pusValue );
47636 +/**************************************************************************
47637 + * Name : BpGetWirelessLedGpio
47639 + * Description: This function returns the GPIO pin assignment for the Wireless
47642 + * Parameters : [OUT] pusValue - Address of short word that the Wireless LED
47643 + * GPIO pin is returned in.
47645 + * Returns : BP_SUCCESS - Success, value is returned.
47646 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
47647 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
47649 + ***************************************************************************/
47650 +int BpGetWirelessLedGpio( unsigned short *pusValue );
47652 +/**************************************************************************
47653 + * Name : BpGetWirelessAntInUse
47655 + * Description: This function returns the antennas in use for wireless
47657 + * Parameters : [OUT] pusValue - Address of short word that the Wireless Antenna
47660 + * Returns : BP_SUCCESS - Success, value is returned.
47661 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
47662 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
47664 + ***************************************************************************/
47665 +int BpGetWirelessAntInUse( unsigned short *pusValue );
47667 +/**************************************************************************
47668 + * Name : BpGetWirelessSesBtnGpio
47670 + * Description: This function returns the GPIO pin assignment for the Wireless
47673 + * Parameters : [OUT] pusValue - Address of short word that the Wireless Ses
47674 + * Button GPIO pin is returned in.
47676 + * Returns : BP_SUCCESS - Success, value is returned.
47677 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
47678 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
47680 + ***************************************************************************/
47681 +int BpGetWirelessSesBtnGpio( unsigned short *pusValue );
47683 +/**************************************************************************
47684 + * Name : BpGetWirelessSesExtIntr
47686 + * Description: This function returns the external interrupt number for the
47687 + * Wireless Ses Button.
47689 + * Parameters : [OUT] pusValue - Address of short word that the Wireless Ses
47690 + * external interrup is returned in.
47692 + * Returns : BP_SUCCESS - Success, value is returned.
47693 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
47694 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
47696 + ***************************************************************************/
47697 +int BpGetWirelessSesExtIntr( unsigned short *pusValue );
47699 +/**************************************************************************
47700 + * Name : BpGetWirelessSesLedGpio
47702 + * Description: This function returns the GPIO pin assignment for the Wireless
47705 + * Parameters : [OUT] pusValue - Address of short word that the Wireless Ses
47706 + * Led GPIO pin is returned in.
47708 + * Returns : BP_SUCCESS - Success, value is returned.
47709 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
47710 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
47712 + ***************************************************************************/
47713 +int BpGetWirelessSesLedGpio( unsigned short *pusValue );
47715 +/**************************************************************************
47716 + * Name : BpGetUsbLedGpio
47718 + * Description: This function returns the GPIO pin assignment for the USB
47721 + * Parameters : [OUT] pusValue - Address of short word that the USB LED
47722 + * GPIO pin is returned in.
47724 + * Returns : BP_SUCCESS - Success, value is returned.
47725 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
47726 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
47728 + ***************************************************************************/
47729 +int BpGetUsbLedGpio( unsigned short *pusValue );
47731 +/**************************************************************************
47732 + * Name : BpGetHpnaLedGpio
47734 + * Description: This function returns the GPIO pin assignment for the HPNA
47737 + * Parameters : [OUT] pusValue - Address of short word that the HPNA LED
47738 + * GPIO pin is returned in.
47740 + * Returns : BP_SUCCESS - Success, value is returned.
47741 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
47742 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
47744 + ***************************************************************************/
47745 +int BpGetHpnaLedGpio( unsigned short *pusValue );
47747 +/**************************************************************************
47748 + * Name : BpGetWanDataLedGpio
47750 + * Description: This function returns the GPIO pin assignment for the WAN Data
47753 + * Parameters : [OUT] pusValue - Address of short word that the WAN Data LED
47754 + * GPIO pin is returned in.
47756 + * Returns : BP_SUCCESS - Success, value is returned.
47757 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
47758 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
47760 + ***************************************************************************/
47761 +int BpGetWanDataLedGpio( unsigned short *pusValue );
47763 +/**************************************************************************
47764 + * Name : BpGetPppLedGpio
47766 + * Description: This function returns the GPIO pin assignment for the PPP
47769 + * Parameters : [OUT] pusValue - Address of short word that the PPP LED
47770 + * GPIO pin is returned in.
47772 + * Returns : BP_SUCCESS - Success, value is returned.
47773 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
47774 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
47776 + ***************************************************************************/
47777 +int BpGetPppLedGpio( unsigned short *pusValue );
47779 +/**************************************************************************
47780 + * Name : BpGetPppFailLedGpio
47782 + * Description: This function returns the GPIO pin assignment for the PPP
47783 + * LED that is used when there is a PPP connection failure.
47785 + * Parameters : [OUT] pusValue - Address of short word that the PPP LED
47786 + * GPIO pin is returned in.
47788 + * Returns : BP_SUCCESS - Success, value is returned.
47789 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
47790 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
47792 + ***************************************************************************/
47793 +int BpGetPppFailLedGpio( unsigned short *pusValue );
47795 +/**************************************************************************
47796 + * Name : BpGetVoipLedGpio
47798 + * Description: This function returns the GPIO pin assignment for the VOIP
47801 + * Parameters : [OUT] pusValue - Address of short word that the VOIP LED
47802 + * GPIO pin is returned in.
47804 + * Returns : BP_SUCCESS - Success, value is returned.
47805 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
47806 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
47808 + ***************************************************************************/
47809 +int BpGetVoipLedGpio( unsigned short *pusValue );
47811 +/**************************************************************************
47812 + * Name : BpGetBootloaderPowerOnLedGpio
47814 + * Description: This function returns the GPIO pin assignment for the power
47815 + * on LED that is set by the bootloader.
47817 + * Parameters : [OUT] pusValue - Address of short word that the alarm LED
47818 + * GPIO pin is returned in.
47820 + * Returns : BP_SUCCESS - Success, value is returned.
47821 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
47822 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
47824 + ***************************************************************************/
47825 +int BpGetBootloaderPowerOnLedGpio( unsigned short *pusValue );
47827 +/**************************************************************************
47828 + * Name : BpGetBootloaderAlarmLedGpio
47830 + * Description: This function returns the GPIO pin assignment for the alarm
47831 + * LED that is set by the bootloader.
47833 + * Parameters : [OUT] pusValue - Address of short word that the alarm LED
47834 + * GPIO pin is returned in.
47836 + * Returns : BP_SUCCESS - Success, value is returned.
47837 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
47838 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
47840 + ***************************************************************************/
47841 +int BpGetBootloaderAlarmLedGpio( unsigned short *pusValue );
47843 +/**************************************************************************
47844 + * Name : BpGetBootloaderResetCfgLedGpio
47846 + * Description: This function returns the GPIO pin assignment for the reset
47847 + * configuration LED that is set by the bootloader.
47849 + * Parameters : [OUT] pusValue - Address of short word that the reset
47850 + * configuration LED GPIO pin is returned in.
47852 + * Returns : BP_SUCCESS - Success, value is returned.
47853 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
47854 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
47856 + ***************************************************************************/
47857 +int BpGetBootloaderResetCfgLedGpio( unsigned short *pusValue );
47859 +/**************************************************************************
47860 + * Name : BpGetBootloaderStopLedGpio
47862 + * Description: This function returns the GPIO pin assignment for the break
47863 + * into bootloader LED that is set by the bootloader.
47865 + * Parameters : [OUT] pusValue - Address of short word that the break into
47866 + * bootloader LED GPIO pin is returned in.
47868 + * Returns : BP_SUCCESS - Success, value is returned.
47869 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
47870 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
47872 + ***************************************************************************/
47873 +int BpGetBootloaderStopLedGpio( unsigned short *pusValue );
47875 +/**************************************************************************
47876 + * Name : BpGetWirelessExtIntr
47878 + * Description: This function returns the Wireless external interrupt number.
47880 + * Parameters : [OUT] pulValue - Address of short word that the wireless
47881 + * external interrupt number is returned in.
47883 + * Returns : BP_SUCCESS - Success, value is returned.
47884 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
47885 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
47887 + ***************************************************************************/
47888 +int BpGetWirelessExtIntr( unsigned long *pulValue );
47890 +/**************************************************************************
47891 + * Name : BpGetAdslDyingGaspExtIntr
47893 + * Description: This function returns the ADSL Dying Gasp external interrupt
47896 + * Parameters : [OUT] pulValue - Address of short word that the ADSL Dying Gasp
47897 + * external interrupt number is returned in.
47899 + * Returns : BP_SUCCESS - Success, value is returned.
47900 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
47901 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
47903 + ***************************************************************************/
47904 +int BpGetAdslDyingGaspExtIntr( unsigned long *pulValue );
47906 +/**************************************************************************
47907 + * Name : BpGetVoipExtIntr
47909 + * Description: This function returns the VOIP external interrupt number.
47911 + * Parameters : [OUT] pulValue - Address of short word that the VOIP
47912 + * external interrupt number is returned in.
47913 + * [IN] dspNum - Address of the DSP to query.
47915 + * Returns : BP_SUCCESS - Success, value is returned.
47916 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
47917 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
47919 + ***************************************************************************/
47920 +int BpGetVoipExtIntr( unsigned char dspNum, unsigned long *pulValue );
47922 +/**************************************************************************
47923 + * Name : BpGetHpnaExtIntr
47925 + * Description: This function returns the HPNA external interrupt number.
47927 + * Parameters : [OUT] pulValue - Address of short word that the HPNA
47928 + * external interrupt number is returned in.
47930 + * Returns : BP_SUCCESS - Success, value is returned.
47931 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
47932 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
47934 + ***************************************************************************/
47935 +int BpGetHpnaExtIntr( unsigned long *pulValue );
47937 +/**************************************************************************
47938 + * Name : BpGetHpnaChipSelect
47940 + * Description: This function returns the HPNA chip select number.
47942 + * Parameters : [OUT] pulValue - Address of short word that the HPNA
47943 + * chip select number is returned in.
47945 + * Returns : BP_SUCCESS - Success, value is returned.
47946 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
47947 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
47949 + ***************************************************************************/
47950 +int BpGetHpnaChipSelect( unsigned long *pulValue );
47952 +/**************************************************************************
47953 + * Name : BpGetVoipChipSelect
47955 + * Description: This function returns the VOIP chip select number.
47957 + * Parameters : [OUT] pulValue - Address of short word that the VOIP
47958 + * chip select number is returned in.
47959 + * [IN] dspNum - Address of the DSP to query.
47961 + * Returns : BP_SUCCESS - Success, value is returned.
47962 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
47963 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
47965 + ***************************************************************************/
47966 +int BpGetVoipChipSelect( unsigned char dspNum, unsigned long *pulValue );
47968 +#endif /* __ASSEMBLER__ */
47974 +#endif /* _BOARDPARMS_H */
47976 --- linux-2.6.8.1/scripts/kconfig/mconf.c 2004-08-14 12:54:51.000000000 +0200
47977 +++ linux-2.6.8.1-brcm63xx/scripts/kconfig/mconf.c 2006-06-26 10:07:52.000000000 +0200
47980 static struct termios ios_org;
47981 static int rows = 0, cols = 0;
47982 -static struct menu *current_menu;
47983 +struct menu *current_menu; /* Fails while cross-compiling if keeping static */
47984 static int child_count;
47985 static int do_resize;
47986 static int single_menu_mode;
47987 --- linux-2.6.8.1/Makefile 2004-08-14 12:55:35.000000000 +0200
47988 +++ linux-2.6.8.1-brcm63xx/Makefile 2006-06-26 10:43:09.000000000 +0200
47989 @@ -149,9 +149,7 @@
47990 # then ARCH is assigned, getting whatever value it gets normally, and
47991 # SUBARCH is subsequently ignored.
47993 -SUBARCH := $(shell uname -m | sed -e s/i.86/i386/ -e s/sun4u/sparc64/ \
47994 - -e s/arm.*/arm/ -e s/sa110/arm/ \
47995 - -e s/s390x/s390/ -e s/parisc64/parisc/ )
47998 # Cross compiling and selecting different set of gcc/bin-utils
47999 # ---------------------------------------------------------------------------
48000 @@ -294,7 +292,7 @@
48002 NOSTDINC_FLAGS = -nostdinc -iwithprefix include
48004 -CPPFLAGS := -D__KERNEL__ -Iinclude \
48005 +CPPFLAGS := -D__KERNEL__ -Iinclude -Ibcmdrivers/opensource/include/bcm963xx/ -Iboardparms/bcm963xx/ -Ibcmdrivers/broadcom/include/bcm963xx/ -Ibcmdrivers/broadcom/char/adsl/bcm96348\
48006 $(if $(KBUILD_SRC),-Iinclude2 -I$(srctree)/include)
48008 CFLAGS := -Wall -Wstrict-prototypes -Wno-trigraphs \
48009 @@ -405,6 +403,13 @@
48011 endif # KBUILD_EXTMOD
48013 +# CONFIG_MIPS_BRCM Begin Broadcom changed code.
48014 +BRCMDRIVERS_DIR := $(TOPDIR)/bcmdrivers
48015 +export HPATH := $(TOPDIR)/include
48016 +brcmdrivers-y := $(TOPDIR)/boardparms/bcm963xx/ $(BRCMDRIVERS_DIR)/
48017 +BRCMDRIVERS := $(brcmdrivers-y)
48018 +# CONFIG_MIPS_BRCM End Broadcom changed code.
48020 ifeq ($(dot-config),1)
48021 # In this section, we need .config
48023 @@ -473,6 +478,10 @@
48024 # makefile but the arguement can be passed to make if needed.
48027 +# CONFIG_MIPS_BRCM Begin Broadcom changed code.
48028 +INSTALL_MOD_PATH := $(PROFILE_DIR)/modules
48029 +# CONFIG_MIPS_BRCM End Broadcom changed code.
48031 MODLIB := $(INSTALL_MOD_PATH)/lib/modules/$(KERNELRELEASE)
48034 @@ -480,18 +489,25 @@
48035 ifeq ($(KBUILD_EXTMOD),)
48036 core-y += kernel/ mm/ fs/ ipc/ security/ crypto/
48038 +# CONFIG_MIPS_BRCM Begin Broadcom changed code.
48039 vmlinux-dirs := $(patsubst %/,%,$(filter %/, $(init-y) $(init-m) \
48040 $(core-y) $(core-m) $(drivers-y) $(drivers-m) \
48041 + $(brcmdrivers-y) $(brcmdrivers-m) \
48042 $(net-y) $(net-m) $(libs-y) $(libs-m)))
48044 vmlinux-alldirs := $(sort $(vmlinux-dirs) $(patsubst %/,%,$(filter %/, \
48045 $(init-n) $(init-) \
48046 $(core-n) $(core-) $(drivers-n) $(drivers-) \
48047 + $(brcmdrivers-n) $(brcmdrivers-) \
48048 $(net-n) $(net-) $(libs-n) $(libs-))))
48049 +# CONFIG_MIPS_BRCM End Broadcom changed code.
48051 init-y := $(patsubst %/, %/built-in.o, $(init-y))
48052 core-y := $(patsubst %/, %/built-in.o, $(core-y))
48053 drivers-y := $(patsubst %/, %/built-in.o, $(drivers-y))
48054 +# CONFIG_MIPS_BRCM Begin Broadcom changed code.
48055 +brcmdrivers-y := $(patsubst %/, %/built-in.o, $(brcmdrivers-y))
48056 +# CONFIG_MIPS_BRCM End Broadcom changed code.
48057 net-y := $(patsubst %/, %/built-in.o, $(net-y))
48058 libs-y1 := $(patsubst %/, %/lib.a, $(libs-y))
48059 libs-y2 := $(patsubst %/, %/built-in.o, $(libs-y))
48060 @@ -507,7 +523,8 @@
48061 # we cannot yet know if we will need to relink vmlinux.
48062 # So we descend into init/ inside the rule for vmlinux again.
48064 -vmlinux-objs := $(head-y) $(init-y) $(core-y) $(libs-y) $(drivers-y) $(net-y)
48065 +# CONFIG_MIPS_BRCM Begin Broadcom changed code.
48066 +vmlinux-objs := $(head-y) $(init-y) $(core-y) $(libs-y) $(drivers-y) $(brcmdrivers-y) $(net-y)
48068 quiet_cmd_vmlinux__ = LD $@
48069 define cmd_vmlinux__
48070 @@ -516,11 +533,13 @@
48074 + $(brcmdrivers-y) \
48077 $(filter .tmp_kallsyms%,$^) \
48080 +# CONFIG_MIPS_BRCM End Broadcom changed code.
48082 # set -e makes the rule exit immediately on error
48084 @@ -603,9 +622,12 @@
48085 $(rule_verify_kallsyms)
48088 -vmlinux: $(vmlinux-objs) $(kallsyms.o) arch/$(ARCH)/kernel/vmlinux.lds.s FORCE
48089 +# CONFIG_MIPS_BRCM Begin Broadcom changed code.
48090 +vmlinux: preparebrcmdriver $(vmlinux-objs) $(kallsyms.o) arch/$(ARCH)/kernel/vmlinux.lds.s FORCE
48091 $(call if_changed_rule,vmlinux)
48093 +# CONFIG_MIPS_BRCM End Broadcom changed code.
48095 # The actual objects are generated when descending,
48096 # make sure no implicit rule kicks in
48098 @@ -626,7 +648,13 @@
48099 # A multi level approach is used. prepare1 is updated first, then prepare0.
48100 # prepare-all is the collection point for the prepare targets.
48102 -.PHONY: prepare-all prepare prepare0 prepare1 prepare2
48103 +# CONFIG_MIPS_BRCM Begin Broadcom changed code.
48104 +.PHONY: prepare-all prepare prepare0 prepare1 prepare2 preparebrcmdriver
48106 +preparebrcmdriver:
48107 +# $(Q)$(MAKE) -C $(BRCMDRIVERS_DIR)/opensource symlinks
48108 + $(Q)$(MAKE) -C $(BRCMDRIVERS_DIR)/broadcom symlinks
48109 +# CONFIG_MIPS_BRCM End Broadcom changed code.
48111 # prepare 2 generate Makefile to be placed in output directory, if
48112 # using a seperate output directory. This allows convinient use
48113 @@ -743,7 +771,10 @@
48117 -modules: $(vmlinux-dirs) $(if $(KBUILD_BUILTIN),vmlinux)
48118 +# CONFIG_MIPS_BRCM Begin Broadcom changed code.
48119 +modules: preparebrcmdriver $(vmlinux-dirs) $(if $(KBUILD_BUILTIN),vmlinux)
48120 +#modules: $(vmlinux-dirs) $(if $(KBUILD_BUILTIN),vmlinux)
48121 +# CONFIG_MIPS_BRCM End Broadcom changed code.
48122 @echo ' Building modules, stage 2.';
48123 $(Q)$(MAKE) -rR -f $(srctree)/scripts/Makefile.modpost
48125 @@ -754,23 +785,31 @@
48127 # Target to install modules
48128 .PHONY: modules_install
48129 -modules_install: _modinst_ _modinst_post
48130 +# CONFIG_MIPS_BRCM Begin Broadcom changed code.
48131 +#modules_install: _modinst_ _modinst_post
48132 +#We have no need for it "_modinst_post"
48133 +modules_install: _modinst_
48134 +# CONFIG_MIPS_BRCM End Broadcom changed code.
48138 - @if [ -z "`$(DEPMOD) -V | grep module-init-tools`" ]; then \
48139 - echo "Warning: you may need to install module-init-tools"; \
48140 - echo "See http://www.codemonkey.org.uk/docs/post-halloween-2.6.txt";\
48143 +# CONFIG_MIPS_BRCM Begin Broadcom changed code.
48144 +# @if [ -z "`$(DEPMOD) -V | grep module-init-tools`" ]; then \
48145 +# echo "Warning: you may need to install module-init-tools"; \
48146 +# echo "See http://www.codemonkey.org.uk/docs/post-halloween-2.6.txt";\
48149 +# CONFIG_MIPS_BRCM End Broadcom changed code.
48150 @rm -rf $(MODLIB)/kernel
48151 @rm -f $(MODLIB)/source
48152 @mkdir -p $(MODLIB)/kernel
48153 - @ln -s $(srctree) $(MODLIB)/source
48154 - @if [ ! $(objtree) -ef $(MODLIB)/build ]; then \
48155 - rm -f $(MODLIB)/build ; \
48156 - ln -s $(objtree) $(MODLIB)/build ; \
48158 +# CONFIG_MIPS_BRCM Begin Broadcom changed code
48159 +# @ln -s $(srctree) $(MODLIB)/source
48160 +# @if [ ! $(objtree) -ef $(MODLIB)/build ]; then \
48161 +# rm -f $(MODLIB)/build ; \
48162 +# ln -s $(objtree) $(MODLIB)/build ; \
48164 +# CONFIG_MIPS_BRCM End Broadcom changed code.
48165 $(Q)$(MAKE) -rR -f $(srctree)/scripts/Makefile.modinst
48167 # If System.map exists, run depmod. This deliberately does not have a
48168 @@ -853,10 +892,12 @@
48169 clean: archclean $(clean-dirs)
48171 $(call cmd,rmfiles)
48172 +# CONFIG_MIPS_BRCM Begin Broadcom changed code.
48173 @find . $(RCS_FIND_IGNORE) \
48174 \( -name '*.[oas]' -o -name '*.ko' -o -name '.*.cmd' \
48175 -o -name '.*.d' -o -name '.*.tmp' -o -name '*.mod.c' \) \
48176 -type f -print | xargs rm -f
48177 +# CONFIG_MIPS_BRCM End Broadcom changed code.
48179 # mrproper - Delete all generated files, including .config
48181 @@ -883,7 +924,7 @@
48182 -o -name '.*.rej' -o -size 0 \
48183 -o -name '*%' -o -name '.*.cmd' -o -name 'core' \) \
48184 -type f -print | xargs rm -f
48186 + rm vmlinux.bin vmlinux.lz
48188 # Packaging of the kernel to various formats
48189 # ---------------------------------------------------------------------------