target/linux/brcm63xx/patches-3.9/013-spi-bcm63xx-inline-hz-usage-in-bcm63xx_spi_setup_tra.patch

   1 From 2646be877afc663d1688a2add8386b027c9d7e31 Mon Sep 17 00:00:00 2001
   2 From: Jonas Gorski <jogo@openwrt.org>
   3 Date: Mon, 11 Mar 2013 14:08:06 +0100
   4 Subject: [PATCH 11/12] spi/bcm63xx: inline hz usage in
   5  bcm63xx_spi_setup_transfer
   6
   7 bcm63xx_spi_setup_transfer is called from only one place, and that has
   8 t always set, to hz will always be t->speed_hz - just use it directly in
   9 the two places instead of moving it in a local variable.
  10
  11 Signed-off-by: Jonas Gorski <jogo@openwrt.org>
  12 ---
  13  drivers/spi/spi-bcm63xx.c |    7 ++-----
  14  1 file changed, 2 insertions(+), 5 deletions(-)
  15
  16 --- a/drivers/spi/spi-bcm63xx.c
  17 +++ b/drivers/spi/spi-bcm63xx.c
  18 @@ -97,15 +97,12 @@ static void bcm63xx_spi_setup_transfer(s
  19                                       struct spi_transfer *t)
  20  {
  21         struct bcm63xx_spi *bs = spi_master_get_devdata(spi->master);
  22 -       u32 hz;
  23         u8 clk_cfg, reg;
  24         int i;
  25
  26 -       hz = (t) ? t->speed_hz : spi->max_speed_hz;
  27 -
  28         /* Find the closest clock configuration */
  29         for (i = 0; i < SPI_CLK_MASK; i++) {
  30 -               if (hz >= bcm63xx_spi_freq_table[i][0]) {
  31 +               if (t->speed_hz >= bcm63xx_spi_freq_table[i][0]) {
  32                         clk_cfg = bcm63xx_spi_freq_table[i][1];
  33                         break;
  34                 }
  35 @@ -122,7 +119,7 @@ static void bcm63xx_spi_setup_transfer(s
  36
  37         bcm_spi_writeb(bs, reg, SPI_CLK_CFG);
  38         dev_dbg(&spi->dev, "Setting clock register to %02x (hz %d)\n",
  39 -               clk_cfg, hz);
  40 +               clk_cfg, t->speed_hz);
  41  }
  42
  43  /* the spi->mode bits understood by this driver: */