target/linux/brcm63xx/patches-3.3/016-spi-bcm63xx-fix-bcm6348-38.patch

   1 --- a/arch/mips/bcm63xx/dev-spi.c
   2 +++ b/arch/mips/bcm63xx/dev-spi.c
   3 @@ -106,11 +106,15 @@ int __init bcm63xx_spi_register(void)
   4         if (BCMCPU_IS_6338() || BCMCPU_IS_6348()) {
   5                 spi_resources[0].end += BCM_6338_RSET_SPI_SIZE - 1;
   6                 spi_pdata.fifo_size = SPI_6338_MSG_DATA_SIZE;
   7 +               spi_pdata.msg_type_shift = SPI_6338_MSG_TYPE_SHIFT;
   8 +               spi_pdata.msg_ctl_width = SPI_6338_MSG_CTL_WIDTH;
   9         }
  10
  11         if (BCMCPU_IS_6358() || BCMCPU_IS_6368()) {
  12                 spi_resources[0].end += BCM_6358_RSET_SPI_SIZE - 1;
  13                 spi_pdata.fifo_size = SPI_6358_MSG_DATA_SIZE;
  14 +               spi_pdata.msg_type_shift = SPI_6358_MSG_TYPE_SHIFT;
  15 +               spi_pdata.msg_ctl_width = SPI_6358_MSG_CTL_WIDTH;
  16         }
  17
  18         bcm63xx_spi_regs_init();
  19 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_spi.h
  20 +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_spi.h
  21 @@ -9,6 +9,8 @@ int __init bcm63xx_spi_register(void);
  22
  23  struct bcm63xx_spi_pdata {
  24         unsigned int    fifo_size;
  25 +       unsigned int    msg_type_shift;
  26 +       unsigned int    msg_ctl_width;
  27         int             bus_num;
  28         int             num_chipselect;
  29         u32             speed_hz;
  30 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
  31 +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
  32 @@ -987,7 +987,8 @@
  33  #define SPI_6338_FILL_BYTE             0x07
  34  #define SPI_6338_MSG_TAIL              0x09
  35  #define SPI_6338_RX_TAIL               0x0b
  36 -#define SPI_6338_MSG_CTL               0x40
  37 +#define SPI_6338_MSG_CTL               0x40    /* 8-bits register */
  38 +#define SPI_6338_MSG_CTL_WIDTH         8
  39  #define SPI_6338_MSG_DATA              0x41
  40  #define SPI_6338_MSG_DATA_SIZE         0x3f
  41  #define SPI_6338_RX_DATA               0x80
  42 @@ -1003,7 +1004,8 @@
  43  #define SPI_6348_FILL_BYTE             0x07
  44  #define SPI_6348_MSG_TAIL              0x09
  45  #define SPI_6348_RX_TAIL               0x0b
  46 -#define SPI_6348_MSG_CTL               0x40
  47 +#define SPI_6348_MSG_CTL               0x40    /* 8-bits register */
  48 +#define SPI_6348_MSG_CTL_WIDTH         8
  49  #define SPI_6348_MSG_DATA              0x41
  50  #define SPI_6348_MSG_DATA_SIZE         0x3f
  51  #define SPI_6348_RX_DATA               0x80
  52 @@ -1011,6 +1013,7 @@
  53
  54  /* BCM 6358 SPI core */
  55  #define SPI_6358_MSG_CTL               0x00    /* 16-bits register */
  56 +#define SPI_6358_MSG_CTL_WIDTH         16
  57  #define SPI_6358_MSG_DATA              0x02
  58  #define SPI_6358_MSG_DATA_SIZE         0x21e
  59  #define SPI_6358_RX_DATA               0x400
  60 @@ -1027,6 +1030,7 @@
  61
  62  /* BCM 6358 SPI core */
  63  #define SPI_6368_MSG_CTL               0x00    /* 16-bits register */
  64 +#define SPI_6368_MSG_CTL_WIDTH         16
  65  #define SPI_6368_MSG_DATA              0x02
  66  #define SPI_6368_MSG_DATA_SIZE         0x21e
  67  #define SPI_6368_RX_DATA               0x400
  68 @@ -1048,7 +1052,10 @@
  69  #define SPI_HD_W                       0x01
  70  #define SPI_HD_R                       0x02
  71  #define SPI_BYTE_CNT_SHIFT             0
  72 -#define SPI_MSG_TYPE_SHIFT             14
  73 +#define SPI_6338_MSG_TYPE_SHIFT                6
  74 +#define SPI_6348_MSG_TYPE_SHIFT                6
  75 +#define SPI_6358_MSG_TYPE_SHIFT                14
  76 +#define SPI_6368_MSG_TYPE_SHIFT                14
  77
  78  /* Command */
  79  #define SPI_CMD_NOOP                   0x00
  80 --- a/drivers/spi/spi-bcm63xx.c
  81 +++ b/drivers/spi/spi-bcm63xx.c
  82 @@ -47,6 +47,8 @@ struct bcm63xx_spi {
  83         /* Platform data */
  84         u32                     speed_hz;
  85         unsigned                fifo_size;
  86 +       unsigned int            msg_type_shift;
  87 +       unsigned int            msg_ctl_width;
  88
  89         /* Data buffers */
  90         const unsigned char     *tx_ptr;
  91 @@ -221,13 +223,24 @@ static unsigned int bcm63xx_txrx_bufs(st
  92         msg_ctl = (t->len << SPI_BYTE_CNT_SHIFT);
  93
  94         if (t->rx_buf && t->tx_buf)
  95 -               msg_ctl |= (SPI_FD_RW << SPI_MSG_TYPE_SHIFT);
  96 +               msg_ctl |= (SPI_FD_RW << bs->msg_type_shift);
  97         else if (t->rx_buf)
  98 -               msg_ctl |= (SPI_HD_R << SPI_MSG_TYPE_SHIFT);
  99 +               msg_ctl |= (SPI_HD_R << bs->msg_type_shift);
 100         else if (t->tx_buf)
 101 -               msg_ctl |= (SPI_HD_W << SPI_MSG_TYPE_SHIFT);
 102 +               msg_ctl |= (SPI_HD_W << bs->msg_type_shift);
 103
 104 -       bcm_spi_writew(bs, msg_ctl, SPI_MSG_CTL);
 105 +       switch (bs->msg_ctl_width) {
 106 +       case 8:
 107 +               bcm_spi_writeb(bs, msg_ctl, SPI_MSG_CTL);
 108 +               break;
 109 +       case 16:
 110 +               bcm_spi_writew(bs, msg_ctl, SPI_MSG_CTL);
 111 +               break;
 112 +       default:
 113 +               dev_err(&spi->dev, "unknown MSG_CTL width: %d\n",
 114 +                       bs->msg_ctl_width);
 115 +               return 0;
 116 +       }
 117
 118         /* Issue the transfer */
 119         cmd = SPI_CMD_START_IMMEDIATE;
 120 @@ -406,6 +419,8 @@ static int __devinit bcm63xx_spi_probe(s
 121         master->transfer_one_message = bcm63xx_spi_transfer_one;
 122         master->mode_bits = MODEBITS;
 123         bs->speed_hz = pdata->speed_hz;
 124 +       bs->msg_type_shift = pdata->msg_type_shift;
 125 +       bs->msg_ctl_width = pdata->msg_ctl_width;
 126         bs->tx_io = (u8 *)(bs->regs + bcm63xx_spireg(SPI_MSG_DATA));
 127         bs->rx_io = (const u8 *)(bs->regs + bcm63xx_spireg(SPI_RX_DATA));
 128