target/linux/brcm63xx/patches-3.14/349-MIPS-BCM63XX-add-BCM63268-USB-support.patch

   1 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
   2 +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
   3 @@ -1032,11 +1032,18 @@
   4  #define USBH_PRIV_SETUP_6368_REG       0x28
   5  #define USBH_PRIV_SETUP_IOC_SHIFT      4
   6  #define USBH_PRIV_SETUP_IOC_MASK       (1 << USBH_PRIV_SETUP_IOC_SHIFT)
   7 +#define USBH_PRIV_SETUP_IPP_SHIFT      5
   8 +#define USBH_PRIV_SETUP_IPP_MASK       (1 << USBH_PRIV_SETUP_IPP_SHIFT)
   9
  10  #define USBH_PRIV_SETUP_6318_REG       0x00
  11 +#define USBH_PRIV_PLL_CTRL1_6368_REG   0x18
  12  #define USBH_PRIV_PLL_CTRL1_6318_REG   0x04
  13 -#define USBH_PRIV_PLL_CTRL1_SUSP_EN    (1 << 27)
  14 -#define USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN (1 << 31)
  15 +
  16 +#define USBH_PRIV_PLL_CTRL1_6318_SUSP_EN       (1 << 27)
  17 +#define USBH_PRIV_PLL_CTRL1_6318_IDDQ_PWRDN    (1 << 31)
  18 +#define USBH_PRIV_PLL_CTRL1_63268_IDDQ_PWRDN   (1 << 9)
  19 +#define USBH_PRIV_PLL_CTRL1_63268_PWRDN_DELAY  (1 << 10)
  20 +
  21  #define USBH_PRIV_SIM_CTRL_6318_REG    0x20
  22  #define USBH_PRIV_SIM_CTRL_LADDR_SEL   (1 << 5)
  23
  24 --- a/arch/mips/bcm63xx/Kconfig
  25 +++ b/arch/mips/bcm63xx/Kconfig
  26 @@ -72,6 +72,8 @@ config BCM63XX_CPU_63268
  27         bool "support 63268 CPU"
  28         select SYS_HAS_CPU_BMIPS4350
  29         select HW_HAS_PCI
  30 +       select BCM63XX_OHCI
  31 +       select BCM63XX_EHCI
  32  endmenu
  33
  34  source "arch/mips/bcm63xx/boards/Kconfig"
  35 --- a/arch/mips/bcm63xx/dev-usb-ehci.c
  36 +++ b/arch/mips/bcm63xx/dev-usb-ehci.c
  37 @@ -82,7 +82,7 @@ static struct platform_device bcm63xx_eh
  38  int __init bcm63xx_ehci_register(void)
  39  {
  40         if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6358() &&
  41 -               !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
  42 +               !BCMCPU_IS_6362() && !BCMCPU_IS_6368() && !BCMCPU_IS_63268())
  43                 return 0;
  44
  45         ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0);
  46 --- a/arch/mips/bcm63xx/usb-common.c
  47 +++ b/arch/mips/bcm63xx/usb-common.c
  48 @@ -109,9 +109,24 @@ void bcm63xx_usb_priv_ohci_cfg_set(void)
  49                 reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
  50                 reg |= USBH_PRIV_SETUP_IOC_MASK;
  51                 bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
  52 +       } else if (BCMCPU_IS_63268()) {
  53 +               reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
  54 +               reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK;
  55 +               reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK;
  56 +               bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG);
  57 +
  58 +               reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
  59 +               reg |= USBH_PRIV_SETUP_IOC_MASK;
  60 +               reg &= ~USBH_PRIV_SETUP_IPP_MASK;
  61 +               bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
  62 +
  63 +               reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6368_REG);
  64 +               reg &= ~(USBH_PRIV_PLL_CTRL1_63268_IDDQ_PWRDN |
  65 +                        USBH_PRIV_PLL_CTRL1_63268_PWRDN_DELAY);
  66 +               bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6368_REG);
  67         } else if (BCMCPU_IS_6318()) {
  68                 reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
  69 -               reg |= USBH_PRIV_PLL_CTRL1_SUSP_EN;
  70 +               reg |= USBH_PRIV_PLL_CTRL1_6318_SUSP_EN;
  71                 bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
  72
  73                 reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6318_REG);
  74 @@ -124,7 +139,7 @@ void bcm63xx_usb_priv_ohci_cfg_set(void)
  75                 bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6318_REG);
  76
  77                 reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
  78 -               reg &= ~USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN;
  79 +               reg &= ~USBH_PRIV_PLL_CTRL1_6318_IDDQ_PWRDN;
  80                 bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
  81
  82                 reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SIM_CTRL_6318_REG);
  83 @@ -165,9 +180,24 @@ void bcm63xx_usb_priv_ehci_cfg_set(void)
  84                 reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
  85                 reg |= USBH_PRIV_SETUP_IOC_MASK;
  86                 bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
  87 +       } else if (BCMCPU_IS_63268()) {
  88 +               reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
  89 +               reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK;
  90 +               reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK;
  91 +               bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG);
  92 +
  93 +               reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
  94 +               reg |= USBH_PRIV_SETUP_IOC_MASK;
  95 +               reg &= ~USBH_PRIV_SETUP_IPP_MASK;
  96 +               bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
  97 +
  98 +               reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6368_REG);
  99 +               reg &= ~(USBH_PRIV_PLL_CTRL1_63268_IDDQ_PWRDN |
 100 +                        USBH_PRIV_PLL_CTRL1_63268_PWRDN_DELAY);
 101 +               bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6368_REG);
 102         } else if (BCMCPU_IS_6318()) {
 103                 reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
 104 -               reg |= USBH_PRIV_PLL_CTRL1_SUSP_EN;
 105 +               reg |= USBH_PRIV_PLL_CTRL1_6318_SUSP_EN;
 106                 bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
 107
 108                 reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6318_REG);
 109 @@ -180,7 +210,7 @@ void bcm63xx_usb_priv_ehci_cfg_set(void)
 110                 bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6318_REG);
 111
 112                 reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
 113 -               reg &= ~USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN;
 114 +               reg &= ~USBH_PRIV_PLL_CTRL1_6318_IDDQ_PWRDN;
 115                 bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
 116
 117                 reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SIM_CTRL_6318_REG);