target/linux/brcm63xx/patches-3.10/325-MIPS-BCM63XX-wire-up-the-second-cpu-s-irq-line.patch

   1 From df6661d1b5c001eb91ce07f364fd5b6468fd6f99 Mon Sep 17 00:00:00 2001
   2 From: Jonas Gorski <jogo@openwrt.org>
   3 Date: Fri, 26 Apr 2013 12:03:15 +0200
   4 Subject: [PATCH 36/53] MIPS: BCM63XX: wire up the second cpu's irq line
   5
   6 ---
   7  arch/mips/bcm63xx/irq.c | 44 +++++++++++++++++++++++++++++++++++++-------
   8  1 file changed, 37 insertions(+), 7 deletions(-)
   9
  10 --- a/arch/mips/bcm63xx/irq.c
  11 +++ b/arch/mips/bcm63xx/irq.c
  12 @@ -102,11 +102,17 @@ static void __internal_irq_mask_##width(
  13         unsigned reg = (irq / 32) ^ (width/32 - 1);                     \
  14         unsigned bit = irq & 0x1f;                                      \
  15         unsigned long flags;                                            \
  16 +       int cpu;                                                        \
  17                                                                         \
  18         spin_lock_irqsave(&ipic_lock, flags);                           \
  19 -       val = bcm_readl(irq_mask_addr[0] + reg * sizeof(u32));          \
  20 -       val &= ~(1 << bit);                                             \
  21 -       bcm_writel(val, irq_mask_addr[0] + reg * sizeof(u32));          \
  22 +       for_each_present_cpu(cpu) {                                     \
  23 +               if (!irq_mask_addr[cpu])                                \
  24 +                       break;                                          \
  25 +                                                                       \
  26 +               val = bcm_readl(irq_mask_addr[cpu] + reg * sizeof(u32));\
  27 +               val &= ~(1 << bit);                                     \
  28 +               bcm_writel(val, irq_mask_addr[cpu] + reg * sizeof(u32));\
  29 +       }                                                               \
  30         spin_unlock_irqrestore(&ipic_lock, flags);                      \
  31  }                                                                      \
  32                                                                         \
  33 @@ -116,11 +122,20 @@ static void __internal_irq_unmask_##widt
  34         unsigned reg = (irq / 32) ^ (width/32 - 1);                     \
  35         unsigned bit = irq & 0x1f;                                      \
  36         unsigned long flags;                                            \
  37 +       int cpu;                                                        \
  38                                                                         \
  39         spin_lock_irqsave(&ipic_lock, flags);                           \
  40 -       val = bcm_readl(irq_mask_addr[0] + reg * sizeof(u32));          \
  41 -       val |= (1 << bit);                                              \
  42 -       bcm_writel(val, irq_mask_addr[0] + reg * sizeof(u32));          \
  43 +       for_each_present_cpu(cpu) {                                     \
  44 +               if (!irq_mask_addr[cpu])                                \
  45 +                       break;                                          \
  46 +                                                                       \
  47 +               val = bcm_readl(irq_mask_addr[cpu] + reg * sizeof(u32));\
  48 +               if (cpu_online(cpu))                                    \
  49 +                       val |= (1 << bit);                              \
  50 +               else                                                    \
  51 +                       val &= ~(1 << bit);                             \
  52 +               bcm_writel(val, irq_mask_addr[cpu] + reg * sizeof(u32));\
  53 +       }                                                               \
  54         spin_unlock_irqrestore(&ipic_lock, flags);                      \
  55  }
  56
  57 @@ -145,7 +160,10 @@ asmlinkage void plat_irq_dispatch(void)
  58                         do_IRQ(1);
  59                 if (cause & CAUSEF_IP2)
  60                         dispatch_internal(0);
  61 -               if (!is_ext_irq_cascaded) {
  62 +               if (is_ext_irq_cascaded) {
  63 +                       if (cause & CAUSEF_IP3)
  64 +                               dispatch_internal(1);
  65 +               } else {
  66                         if (cause & CAUSEF_IP3)
  67                                 do_IRQ(IRQ_EXT_0);
  68                         if (cause & CAUSEF_IP4)
  69 @@ -358,6 +376,14 @@ static struct irqaction cpu_ip2_cascade_
  70         .flags          = IRQF_NO_THREAD,
  71  };
  72
  73 +#ifdef CONFIG_SMP
  74 +static struct irqaction cpu_ip3_cascade_action = {
  75 +       .handler        = no_action,
  76 +       .name           = "cascade_ip3",
  77 +       .flags          = IRQF_NO_THREAD,
  78 +};
  79 +#endif
  80 +
  81  static struct irqaction cpu_ext_cascade_action = {
  82         .handler        = no_action,
  83         .name           = "cascade_extirq",
  84 @@ -494,4 +520,8 @@ void __init arch_init_irq(void)
  85         }
  86
  87         setup_irq(MIPS_CPU_IRQ_BASE + 2, &cpu_ip2_cascade_action);
  88 +#ifdef CONFIG_SMP
  89 +       if (is_ext_irq_cascaded)
  90 +               setup_irq(MIPS_CPU_IRQ_BASE + 3, &cpu_ip3_cascade_action);
  91 +#endif
  92  }