brcm47xx: activate image generation for some Netgear devices which are on the market...
[openwrt.git] / target / linux / brcm47xx / patches-3.6 / 760-bgmac-fixes.patch
1 --- a/drivers/net/ethernet/broadcom/bgmac.c
2 +++ b/drivers/net/ethernet/broadcom/bgmac.c
3 @@ -301,7 +301,7 @@ static int bgmac_dma_rx_read(struct bgma
4                         bgmac_err(bgmac, "Found poisoned packet at slot %d, DMA issue!\n",
5                                   ring->start);
6                 } else {
7 -                       new_skb = netdev_alloc_skb(bgmac->net_dev, len);
8 +                       new_skb = netdev_alloc_skb_ip_align(bgmac->net_dev, len);
9                         if (new_skb) {
10                                 skb_put(new_skb, len);
11                                 skb_copy_from_linear_data_offset(skb, BGMAC_RX_FRAME_OFFSET,
12 @@ -436,6 +436,8 @@ static int bgmac_dma_alloc(struct bgmac
13         }
14  
15         for (i = 0; i < BGMAC_MAX_RX_RINGS; i++) {
16 +               int j;
17 +
18                 ring = &bgmac->rx_ring[i];
19                 ring->num_slots = BGMAC_RX_RING_SLOTS;
20                 ring->mmio_base = ring_base[i];
21 @@ -458,8 +460,8 @@ static int bgmac_dma_alloc(struct bgmac
22                         bgmac_warn(bgmac, "DMA address using 0xC0000000 bit(s), it may need translation trick\n");
23  
24                 /* Alloc RX slots */
25 -               for (i = 0; i < ring->num_slots; i++) {
26 -                       err = bgmac_dma_rx_skb_for_slot(bgmac, &ring->slots[i]);
27 +               for (j = 0; j < ring->num_slots; j++) {
28 +                       err = bgmac_dma_rx_skb_for_slot(bgmac, &ring->slots[j]);
29                         if (err) {
30                                 bgmac_err(bgmac, "Can't allocate skb for slot in RX ring\n");
31                                 goto err_dma_free;
32 @@ -496,6 +498,8 @@ static void bgmac_dma_init(struct bgmac
33         }
34  
35         for (i = 0; i < BGMAC_MAX_RX_RINGS; i++) {
36 +               int j;
37 +
38                 ring = &bgmac->rx_ring[i];
39  
40                 /* We don't implement unaligned addressing, so enable first */
41 @@ -505,11 +509,11 @@ static void bgmac_dma_init(struct bgmac
42                 bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_RX_RINGHI,
43                             upper_32_bits(ring->dma_base));
44  
45 -               for (i = 0, dma_desc = ring->cpu_base; i < ring->num_slots;
46 -                    i++, dma_desc++) {
47 +               for (j = 0, dma_desc = ring->cpu_base; j < ring->num_slots;
48 +                    j++, dma_desc++) {
49                         ctl0 = ctl1 = 0;
50  
51 -                       if (i == ring->num_slots - 1)
52 +                       if (j == ring->num_slots - 1)
53                                 ctl0 |= BGMAC_DESC_CTL0_EOT;
54                         ctl1 |= BGMAC_RX_BUF_SIZE & BGMAC_DESC_CTL1_LEN;
55                         /* Is there any BGMAC device that requires extension? */
56 @@ -517,8 +521,8 @@ static void bgmac_dma_init(struct bgmac
57                          * B43_DMA64_DCTL1_ADDREXT_MASK;
58                          */
59  
60 -                       dma_desc->addr_low = cpu_to_le32(lower_32_bits(ring->slots[i].dma_addr));
61 -                       dma_desc->addr_high = cpu_to_le32(upper_32_bits(ring->slots[i].dma_addr));
62 +                       dma_desc->addr_low = cpu_to_le32(lower_32_bits(ring->slots[j].dma_addr));
63 +                       dma_desc->addr_high = cpu_to_le32(upper_32_bits(ring->slots[j].dma_addr));
64                         dma_desc->ctl0 = cpu_to_le32(ctl0);
65                         dma_desc->ctl1 = cpu_to_le32(ctl1);
66                 }
67 @@ -535,7 +539,7 @@ static void bgmac_dma_init(struct bgmac
68   * PHY ops
69   **************************************************/
70  
71 -u16 bgmac_phy_read(struct bgmac *bgmac, u8 phyaddr, u8 reg)
72 +static u16 bgmac_phy_read(struct bgmac *bgmac, u8 phyaddr, u8 reg)
73  {
74         struct bcma_device *core;
75         u16 phy_access_addr;
76 @@ -584,7 +588,7 @@ u16 bgmac_phy_read(struct bgmac *bgmac,
77  }
78  
79  /* http://bcm-v4.sipsolutions.net/mac-gbit/gmac/chipphywr */
80 -void bgmac_phy_write(struct bgmac *bgmac, u8 phyaddr, u8 reg, u16 value)
81 +static int bgmac_phy_write(struct bgmac *bgmac, u8 phyaddr, u8 reg, u16 value)
82  {
83         struct bcma_device *core;
84         u16 phy_access_addr;
85 @@ -617,9 +621,13 @@ void bgmac_phy_write(struct bgmac *bgmac
86         tmp |= value;
87         bcma_write32(core, phy_access_addr, tmp);
88  
89 -       if (!bgmac_wait_value(core, phy_access_addr, BGMAC_PA_START, 0, 1000))
90 +       if (!bgmac_wait_value(core, phy_access_addr, BGMAC_PA_START, 0, 1000)) {
91                 bgmac_err(bgmac, "Writing to PHY %d register 0x%X failed\n",
92                           phyaddr, reg);
93 +               return -ETIMEDOUT;
94 +       }
95 +
96 +       return 0;
97  }
98  
99  /* http://bcm-v4.sipsolutions.net/mac-gbit/gmac/chipphyforce */
100 @@ -761,6 +769,26 @@ static void bgmac_cmdcfg_maskset(struct
101         udelay(2);
102  }
103  
104 +static void bgmac_write_mac_address(struct bgmac *bgmac, u8 *addr)
105 +{
106 +       u32 tmp;
107 +
108 +       tmp = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) | addr[3];
109 +       bgmac_write(bgmac, BGMAC_MACADDR_HIGH, tmp);
110 +       tmp = (addr[4] << 8) | addr[5];
111 +       bgmac_write(bgmac, BGMAC_MACADDR_LOW, tmp);
112 +}
113 +
114 +static void bgmac_set_rx_mode(struct net_device *net_dev)
115 +{
116 +       struct bgmac *bgmac = netdev_priv(net_dev);
117 +
118 +       if (net_dev->flags & IFF_PROMISC)
119 +               bgmac_cmdcfg_maskset(bgmac, ~0, BGMAC_CMDCFG_PROM, true);
120 +       else
121 +               bgmac_cmdcfg_maskset(bgmac, ~BGMAC_CMDCFG_PROM, 0, true);
122 +}
123 +
124  #if 0 /* We don't use that regs yet */
125  static void bgmac_chip_stats_update(struct bgmac *bgmac)
126  {
127 @@ -889,8 +917,10 @@ static void bgmac_chip_reset(struct bgma
128                         sw_type = et_swtype;
129                 } else if (ci->id == BCMA_CHIP_ID_BCM5357 && ci->pkg == 9) {
130                         sw_type = BGMAC_CHIPCTL_1_SW_TYPE_EPHYRMII;
131 -               } else if (0) {
132 -                       /* TODO */
133 +               } else if ((ci->id != BCMA_CHIP_ID_BCM53572 && ci->pkg == 10) ||
134 +                          (ci->id == BCMA_CHIP_ID_BCM53572 && ci->pkg == 9)) {
135 +                       sw_type = BGMAC_CHIPCTL_1_IF_TYPE_RGMII |
136 +                                 BGMAC_CHIPCTL_1_SW_TYPE_RGMII;
137                 }
138                 bcma_chipco_chipctl_maskset(cc, 1,
139                                             ~(BGMAC_CHIPCTL_1_IF_TYPE_MASK |
140 @@ -948,6 +978,7 @@ static void bgmac_chip_intrs_on(struct b
141  static void bgmac_chip_intrs_off(struct bgmac *bgmac)
142  {
143         bgmac_write(bgmac, BGMAC_INT_MASK, 0);
144 +       bgmac_read(bgmac, BGMAC_INT_MASK);
145  }
146  
147  /* http://bcm-v4.sipsolutions.net/mac-gbit/gmac/gmac_enable */
148 @@ -1004,8 +1035,6 @@ static void bgmac_enable(struct bgmac *b
149  static void bgmac_chip_init(struct bgmac *bgmac, bool full_init)
150  {
151         struct bgmac_dma_ring *ring;
152 -       u8 *mac = bgmac->net_dev->dev_addr;
153 -       u32 tmp;
154         int i;
155  
156         /* 1 interrupt per received frame */
157 @@ -1014,21 +1043,14 @@ static void bgmac_chip_init(struct bgmac
158         /* Enable 802.3x tx flow control (honor received PAUSE frames) */
159         bgmac_cmdcfg_maskset(bgmac, ~BGMAC_CMDCFG_RPI, 0, true);
160  
161 -       if (bgmac->net_dev->flags & IFF_PROMISC)
162 -               bgmac_cmdcfg_maskset(bgmac, ~0, BGMAC_CMDCFG_PROM, false);
163 -       else
164 -               bgmac_cmdcfg_maskset(bgmac, ~BGMAC_CMDCFG_PROM, 0, false);
165 +       bgmac_set_rx_mode(bgmac->net_dev);
166  
167 -       /* Set MAC addr */
168 -       tmp = (mac[0] << 24) | (mac[1] << 16) | (mac[2] << 8) | mac[3];
169 -       bgmac_write(bgmac, BGMAC_MACADDR_HIGH, tmp);
170 -       tmp = (mac[4] << 8) | mac[5];
171 -       bgmac_write(bgmac, BGMAC_MACADDR_LOW, tmp);
172 +       bgmac_write_mac_address(bgmac, bgmac->net_dev->dev_addr);
173  
174         if (bgmac->loopback)
175 -               bgmac_cmdcfg_maskset(bgmac, ~0, BGMAC_CMDCFG_ML, true);
176 +               bgmac_cmdcfg_maskset(bgmac, ~0, BGMAC_CMDCFG_ML, false);
177         else
178 -               bgmac_cmdcfg_maskset(bgmac, ~BGMAC_CMDCFG_ML, 0, true);
179 +               bgmac_cmdcfg_maskset(bgmac, ~BGMAC_CMDCFG_ML, 0, false);
180  
181         bgmac_write(bgmac, BGMAC_RXMAX_LENGTH, 32 + ETHER_MAX_LEN);
182  
183 @@ -1160,6 +1182,19 @@ static netdev_tx_t bgmac_start_xmit(stru
184         return bgmac_dma_tx_add(bgmac, ring, skb);
185  }
186  
187 +static int bgmac_set_mac_address(struct net_device *net_dev, void *addr)
188 +{
189 +       struct bgmac *bgmac = netdev_priv(net_dev);
190 +       int ret;
191 +
192 +       ret = eth_prepare_mac_addr_change(net_dev, addr);
193 +       if (ret < 0)
194 +               return ret;
195 +       bgmac_write_mac_address(bgmac, (u8 *)addr);
196 +       eth_commit_mac_addr_change(net_dev, addr);
197 +       return 0;
198 +}
199 +
200  static int bgmac_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
201  {
202         struct bgmac *bgmac = netdev_priv(net_dev);
203 @@ -1190,7 +1225,9 @@ static const struct net_device_ops bgmac
204         .ndo_open               = bgmac_open,
205         .ndo_stop               = bgmac_stop,
206         .ndo_start_xmit         = bgmac_start_xmit,
207 -       .ndo_set_mac_address    = eth_mac_addr, /* generic, sets dev_addr */
208 +       .ndo_set_rx_mode        = bgmac_set_rx_mode,
209 +       .ndo_set_mac_address    = bgmac_set_mac_address,
210 +       .ndo_validate_addr      = eth_validate_addr,
211         .ndo_do_ioctl           = bgmac_ioctl,
212  };
213  
214 @@ -1290,6 +1327,12 @@ static int bgmac_probe(struct bcma_devic
215                 return -ENOTSUPP;
216         }
217  
218 +       if (!is_valid_ether_addr(mac)) {
219 +               dev_err(&core->dev, "Invalid MAC addr: %pM\n", mac);
220 +               eth_random_addr(mac);
221 +               dev_warn(&core->dev, "Using random MAC: %pM\n", mac);
222 +       }
223 +
224         /* Allocation and references */
225         net_dev = alloc_etherdev(sizeof(*bgmac));
226         if (!net_dev)
227 --- a/drivers/net/ethernet/broadcom/bgmac.h
228 +++ b/drivers/net/ethernet/broadcom/bgmac.h
229 @@ -339,7 +339,7 @@
230  #define BGMAC_CHIPCTL_1_SW_TYPE_EPHY           0x00000000
231  #define BGMAC_CHIPCTL_1_SW_TYPE_EPHYMII                0x00000040
232  #define BGMAC_CHIPCTL_1_SW_TYPE_EPHYRMII       0x00000080
233 -#define BGMAC_CHIPCTL_1_SW_TYPE_RGMI           0x000000C0
234 +#define BGMAC_CHIPCTL_1_SW_TYPE_RGMII          0x000000C0
235  #define BGMAC_CHIPCTL_1_RXC_DLL_BYPASS         0x00010000
236  
237  #define BGMAC_SPEED_10                         0x0001
238 @@ -450,7 +450,4 @@ static inline void bgmac_set(struct bgma
239         bgmac_maskset(bgmac, offset, ~0, set);
240  }
241  
242 -u16 bgmac_phy_read(struct bgmac *bgmac, u8 phyaddr, u8 reg);
243 -void bgmac_phy_write(struct bgmac *bgmac, u8 phyaddr, u8 reg, u16 value);
244 -
245  #endif /* _BGMAC_H */