brcm47xx: add profile for bcm4705 with wl driver
[openwrt.git] / target / linux / brcm47xx / patches-3.6 / 550-ssb-set-the-pmu-watchdog-if-available.patch
1 --- a/drivers/ssb/driver_chipcommon.c
2 +++ b/drivers/ssb/driver_chipcommon.c
3 @@ -288,6 +288,24 @@ static u32 ssb_chipco_alp_clock(struct s
4         return 20000000;
5  }
6  
7 +static u32 ssb_chipco_watchdog_get_max_timer(struct ssb_chipcommon *cc)
8 +{
9 +       u32 nb;
10 +
11 +       if (cc->capabilities & SSB_CHIPCO_CAP_PMU) {
12 +               if (cc->dev->id.revision < 26)
13 +                       nb = 16;
14 +               else
15 +                       nb = (cc->dev->id.revision >= 37) ? 32 : 24;
16 +       } else {
17 +               nb = 28;
18 +       }
19 +       if (nb == 32)
20 +               return 0xffffffff;
21 +       else
22 +               return (1 << nb) - 1;
23 +}
24 +
25  void ssb_chipcommon_init(struct ssb_chipcommon *cc)
26  {
27         if (!cc->dev)
28 @@ -405,8 +423,24 @@ void ssb_chipco_timing_init(struct ssb_c
29  /* Set chip watchdog reset timer to fire in 'ticks' backplane cycles */
30  void ssb_chipco_watchdog_timer_set(struct ssb_chipcommon *cc, u32 ticks)
31  {
32 -       /* instant NMI */
33 -       chipco_write32(cc, SSB_CHIPCO_WATCHDOG, ticks);
34 +       u32 maxt;
35 +       enum ssb_clkmode clkmode;
36 +
37 +       maxt = ssb_chipco_watchdog_get_max_timer(cc);
38 +       if (cc->capabilities & SSB_CHIPCO_CAP_PMU) {
39 +               if (ticks == 1)
40 +                       ticks = 2;
41 +               else if (ticks > maxt)
42 +                       ticks = maxt;
43 +               chipco_write32(cc, SSB_CHIPCO_PMU_WATCHDOG, ticks);
44 +       } else {
45 +               clkmode = ticks ? SSB_CLKMODE_FAST : SSB_CLKMODE_DYNAMIC;
46 +               ssb_chipco_set_clockmode(cc, clkmode);
47 +               if (ticks > maxt)
48 +                       ticks = maxt;
49 +               /* instant NMI */
50 +               chipco_write32(cc, SSB_CHIPCO_WATCHDOG, ticks);
51 +       }
52  }
53  
54  void ssb_chipco_irq_mask(struct ssb_chipcommon *cc, u32 mask, u32 value)