target/linux/atheros-2.6/files/drivers/mtd/devices/spiflash.h

   1 /*
   2  * SPI Flash Memory support header file.
   3  *
   4  * $Id: //depot/sw/releases/linuxsrc/src/kernels/mips-linux-2.4.25/drivers/mtd/devices/spiflash.h#3 $
   5  *
   6  *
   7  * Copyright (c) 2005, Atheros Communications Inc.
   8  * Copyright (C) 2006 FON Technology, SL.
   9  * Copyright (C) 2006 Imre Kaloz <kaloz@openwrt.org>
  10  *
  11  * This code is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License version 2 as
  13  * published by the Free Software Foundation.
  14  *
  15  */
  16 #define FLASH_1MB  1
  17 #define FLASH_2MB  2
  18 #define FLASH_4MB  3
  19 #define FLASH_8MB  4
  20 #define MAX_FLASH  5
  21
  22 #define STM_PAGE_SIZE           256
  23
  24 #define SPI_WRITE_ENABLE    0
  25 #define SPI_WRITE_DISABLE   1
  26 #define SPI_RD_STATUS       2
  27 #define SPI_WR_STATUS       3
  28 #define SPI_RD_DATA         4
  29 #define SPI_FAST_RD_DATA    5
  30 #define SPI_PAGE_PROGRAM    6
  31 #define SPI_SECTOR_ERASE    7
  32 #define SPI_BULK_ERASE      8
  33 #define SPI_DEEP_PWRDOWN    9
  34 #define SPI_RD_SIG          10
  35 #define SPI_MAX_OPCODES     11
  36
  37 #define SFI_WRITE_BUFFER_SIZE   4
  38 #define SFI_FLASH_ADDR_MASK     0x00ffffff
  39
  40 #define STM_8MBIT_SIGNATURE     0x13
  41 #define STM_M25P80_BYTE_COUNT   1048576
  42 #define STM_M25P80_SECTOR_COUNT 16
  43 #define STM_M25P80_SECTOR_SIZE  0x10000
  44
  45 #define STM_16MBIT_SIGNATURE    0x14
  46 #define STM_M25P16_BYTE_COUNT   2097152
  47 #define STM_M25P16_SECTOR_COUNT 32
  48 #define STM_M25P16_SECTOR_SIZE  0x10000
  49
  50 #define STM_32MBIT_SIGNATURE    0x15
  51 #define STM_M25P32_BYTE_COUNT   4194304
  52 #define STM_M25P32_SECTOR_COUNT 64
  53 #define STM_M25P32_SECTOR_SIZE  0x10000
  54
  55 #define STM_64MBIT_SIGNATURE    0x16
  56 #define STM_M25P64_BYTE_COUNT   8388608
  57 #define STM_M25P64_SECTOR_COUNT 128
  58 #define STM_M25P64_SECTOR_SIZE  0x10000
  59
  60 #define STM_1MB_BYTE_COUNT   STM_M25P80_BYTE_COUNT
  61 #define STM_1MB_SECTOR_COUNT STM_M25P80_SECTOR_COUNT
  62 #define STM_1MB_SECTOR_SIZE  STM_M25P80_SECTOR_SIZE
  63 #define STM_2MB_BYTE_COUNT   STM_M25P16_BYTE_COUNT
  64 #define STM_2MB_SECTOR_COUNT STM_M25P16_SECTOR_COUNT
  65 #define STM_2MB_SECTOR_SIZE  STM_M25P16_SECTOR_SIZE
  66 #define STM_4MB_BYTE_COUNT   STM_M25P32_BYTE_COUNT
  67 #define STM_4MB_SECTOR_COUNT STM_M25P32_SECTOR_COUNT
  68 #define STM_4MB_SECTOR_SIZE  STM_M25P32_SECTOR_SIZE
  69 #define STM_8MB_BYTE_COUNT   STM_M25P64_BYTE_COUNT
  70 #define STM_8MB_SECTOR_COUNT STM_M25P64_SECTOR_COUNT
  71 #define STM_8MB_SECTOR_SIZE  STM_M25P64_SECTOR_SIZE
  72
  73 /*
  74  * ST Microelectronics Opcodes for Serial Flash
  75  */
  76
  77 #define STM_OP_WR_ENABLE       0x06     /* Write Enable */
  78 #define STM_OP_WR_DISABLE      0x04     /* Write Disable */
  79 #define STM_OP_RD_STATUS       0x05     /* Read Status */
  80 #define STM_OP_WR_STATUS       0x01     /* Write Status */
  81 #define STM_OP_RD_DATA         0x03     /* Read Data */
  82 #define STM_OP_FAST_RD_DATA    0x0b     /* Fast Read Data */
  83 #define STM_OP_PAGE_PGRM       0x02     /* Page Program */
  84 #define STM_OP_SECTOR_ERASE    0xd8     /* Sector Erase */
  85 #define STM_OP_BULK_ERASE      0xc7     /* Bulk Erase */
  86 #define STM_OP_DEEP_PWRDOWN    0xb9     /* Deep Power-Down Mode */
  87 #define STM_OP_RD_SIG          0xab     /* Read Electronic Signature */
  88
  89 #define STM_STATUS_WIP       0x01       /* Write-In-Progress */
  90 #define STM_STATUS_WEL       0x02       /* Write Enable Latch */
  91 #define STM_STATUS_BP0       0x04       /* Block Protect 0 */
  92 #define STM_STATUS_BP1       0x08       /* Block Protect 1 */
  93 #define STM_STATUS_BP2       0x10       /* Block Protect 2 */
  94 #define STM_STATUS_SRWD      0x80       /* Status Register Write Disable */
  95
  96 /*
  97  * SPI Flash Interface Registers
  98  */
  99 #define AR531XPLUS_SPI_READ     0x08000000
 100 #define AR531XPLUS_SPI_MMR      0x11300000
 101 #define AR531XPLUS_SPI_MMR_SIZE 12
 102
 103 #define AR531XPLUS_SPI_CTL      0x00
 104 #define AR531XPLUS_SPI_OPCODE   0x04
 105 #define AR531XPLUS_SPI_DATA     0x08
 106
 107 #define SPI_FLASH_READ          AR531XPLUS_SPI_READ
 108 #define SPI_FLASH_MMR           AR531XPLUS_SPI_MMR
 109 #define SPI_FLASH_MMR_SIZE      AR531XPLUS_SPI_MMR_SIZE
 110 #define SPI_FLASH_CTL           AR531XPLUS_SPI_CTL
 111 #define SPI_FLASH_OPCODE        AR531XPLUS_SPI_OPCODE
 112 #define SPI_FLASH_DATA          AR531XPLUS_SPI_DATA
 113
 114 #define SPI_CTL_START           0x00000100
 115 #define SPI_CTL_BUSY            0x00010000
 116 #define SPI_CTL_TXCNT_MASK      0x0000000f
 117 #define SPI_CTL_RXCNT_MASK      0x000000f0
 118 #define SPI_CTL_TX_RX_CNT_MASK  0x000000ff
 119 #define SPI_CTL_SIZE_MASK       0x00060000
 120
 121 #define SPI_CTL_CLK_SEL_MASK    0x03000000
 122 #define SPI_OPCODE_MASK         0x000000ff
 123
 124 #define SPI_STATUS_WIP          STM_STATUS_WIP