1 From a9e38566ebe755219db10fa155fa8f0f4efc20d9 Mon Sep 17 00:00:00 2001
2 From: Gabor Juhos <juhosg@openwrt.org>
3 Date: Wed, 14 Mar 2012 10:29:23 +0100
4 Subject: [PATCH 07/47] MIPS: ath79: make ath724x_pcibios_init visible for external code
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
9 Signed-off-by: René Bolldorf <xsecute@googlemail.com>
10 Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
11 Cc: linux-mips@linux-mips.org
12 Patchwork: https://patchwork.linux-mips.org/patch/3487/
13 Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
15 arch/mips/include/asm/mach-ath79/pci.h | 20 ++++++++++++++++++++
16 arch/mips/pci/pci-ath724x.c | 3 ++-
17 2 files changed, 22 insertions(+), 1 deletions(-)
18 create mode 100644 arch/mips/include/asm/mach-ath79/pci.h
21 +++ b/arch/mips/include/asm/mach-ath79/pci.h
24 + * Atheros 724x PCI support
26 + * Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com>
28 + * This program is free software; you can redistribute it and/or modify it
29 + * under the terms of the GNU General Public License version 2 as published
30 + * by the Free Software Foundation.
33 +#ifndef __ASM_MACH_ATH79_PCI_H
34 +#define __ASM_MACH_ATH79_PCI_H
36 +#if defined(CONFIG_PCI) && defined(CONFIG_SOC_AR724X)
37 +int ath724x_pcibios_init(void);
39 +static inline int ath724x_pcibios_init(void) { return 0; }
42 +#endif /* __ASM_MACH_ATH79_PCI_H */
43 --- a/arch/mips/pci/pci-ath724x.c
44 +++ b/arch/mips/pci/pci-ath724x.c
48 #include <linux/pci.h>
49 +#include <asm/mach-ath79/pci.h>
51 #define reg_read(_phys) (*(unsigned int *) KSEG1ADDR(_phys))
52 #define reg_write(_phys, _val) ((*(unsigned int *) KSEG1ADDR(_phys)) = (_val))
53 @@ -130,7 +131,7 @@ static struct pci_controller ath724x_pci
54 .mem_resource = &ath724x_mem_resource,
57 -static int __init ath724x_pcibios_init(void)
58 +int __init ath724x_pcibios_init(void)
60 register_pci_controller(&ath724x_pci_controller);