target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-dir-600-a1.c

   1 /*
   2  *  D-Link DIR-600 rev. A1 board support
   3  *
   4  *  Copyright (C) 2010-2012 Gabor Juhos <juhosg@openwrt.org>
   5  *
   6  *  This program is free software; you can redistribute it and/or modify it
   7  *  under the terms of the GNU General Public License version 2 as published
   8  *  by the Free Software Foundation.
   9  */
  10
  11 #include <linux/mtd/mtd.h>
  12 #include <linux/mtd/partitions.h>
  13
  14 #include <asm/mach-ath79/ath79.h>
  15
  16 #include "dev-ap9x-pci.h"
  17 #include "dev-eth.h"
  18 #include "dev-gpio-buttons.h"
  19 #include "dev-leds-gpio.h"
  20 #include "dev-m25p80.h"
  21 #include "machtypes.h"
  22 #include "nvram.h"
  23
  24 #define DIR_600_A1_GPIO_LED_WPS                 0
  25 #define DIR_600_A1_GPIO_LED_POWER_AMBER         1
  26 #define DIR_600_A1_GPIO_LED_POWER_GREEN         6
  27
  28 #define DIR_600_A1_GPIO_BTN_RESET               8
  29 #define DIR_600_A1_GPIO_BTN_WPS                 12
  30
  31 #define DIR_600_A1_KEYS_POLL_INTERVAL           20      /* msecs */
  32 #define DIR_600_A1_KEYS_DEBOUNCE_INTERVAL (3 * DIR_600_A1_KEYS_POLL_INTERVAL)
  33
  34 #define DIR_600_A1_NVRAM_ADDR   0x1f030000
  35 #define DIR_600_A1_NVRAM_SIZE   0x10000
  36
  37 static struct mtd_partition dir_600_a1_partitions[] = {
  38         {
  39                 .name           = "u-boot",
  40                 .offset         = 0,
  41                 .size           = 0x030000,
  42                 .mask_flags     = MTD_WRITEABLE,
  43         }, {
  44                 .name           = "nvram",
  45                 .offset         = 0x030000,
  46                 .size           = 0x010000,
  47         }, {
  48                 .name           = "kernel",
  49                 .offset         = 0x040000,
  50                 .size           = 0x0e0000,
  51         }, {
  52                 .name           = "rootfs",
  53                 .offset         = 0x120000,
  54                 .size           = 0x2c0000,
  55         }, {
  56                 .name           = "mac",
  57                 .offset         = 0x3e0000,
  58                 .size           = 0x010000,
  59                 .mask_flags     = MTD_WRITEABLE,
  60         }, {
  61                 .name           = "art",
  62                 .offset         = 0x3f0000,
  63                 .size           = 0x010000,
  64                 .mask_flags     = MTD_WRITEABLE,
  65         }, {
  66                 .name           = "firmware",
  67                 .offset         = 0x040000,
  68                 .size           = 0x3a0000,
  69         }
  70 };
  71
  72 static struct flash_platform_data dir_600_a1_flash_data = {
  73         .parts          = dir_600_a1_partitions,
  74         .nr_parts       = ARRAY_SIZE(dir_600_a1_partitions),
  75 };
  76
  77 static struct gpio_led dir_600_a1_leds_gpio[] __initdata = {
  78         {
  79                 .name           = "dir-600-a1:green:power",
  80                 .gpio           = DIR_600_A1_GPIO_LED_POWER_GREEN,
  81         }, {
  82                 .name           = "dir-600-a1:amber:power",
  83                 .gpio           = DIR_600_A1_GPIO_LED_POWER_AMBER,
  84         }, {
  85                 .name           = "dir-600-a1:blue:wps",
  86                 .gpio           = DIR_600_A1_GPIO_LED_WPS,
  87                 .active_low     = 1,
  88         }
  89 };
  90
  91 static struct gpio_keys_button dir_600_a1_gpio_keys[] __initdata = {
  92         {
  93                 .desc           = "reset",
  94                 .type           = EV_KEY,
  95                 .code           = KEY_RESTART,
  96                 .debounce_interval = DIR_600_A1_KEYS_DEBOUNCE_INTERVAL,
  97                 .gpio           = DIR_600_A1_GPIO_BTN_RESET,
  98                 .active_low     = 1,
  99         }, {
 100                 .desc           = "wps",
 101                 .type           = EV_KEY,
 102                 .code           = KEY_WPS_BUTTON,
 103                 .debounce_interval = DIR_600_A1_KEYS_DEBOUNCE_INTERVAL,
 104                 .gpio           = DIR_600_A1_GPIO_BTN_WPS,
 105                 .active_low     = 1,
 106         }
 107 };
 108
 109 static void __init dir_600_a1_setup(void)
 110 {
 111         const char *nvram = (char *) KSEG1ADDR(DIR_600_A1_NVRAM_ADDR);
 112         u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
 113         u8 mac_buff[6];
 114         u8 *mac = NULL;
 115
 116         if (ath79_nvram_parse_mac_addr(nvram, DIR_600_A1_NVRAM_SIZE,
 117                                        "lan_mac=", mac_buff) == 0) {
 118                 ath79_init_mac(ath79_eth0_data.mac_addr, mac_buff, 0);
 119                 ath79_init_mac(ath79_eth1_data.mac_addr, mac_buff, 1);
 120                 mac = mac_buff;
 121         }
 122
 123         ath79_register_m25p80(&dir_600_a1_flash_data);
 124
 125         ath79_register_leds_gpio(-1, ARRAY_SIZE(dir_600_a1_leds_gpio),
 126                                  dir_600_a1_leds_gpio);
 127
 128         ath79_register_gpio_keys_polled(-1, DIR_600_A1_KEYS_POLL_INTERVAL,
 129                                         ARRAY_SIZE(dir_600_a1_gpio_keys),
 130                                         dir_600_a1_gpio_keys);
 131
 132         ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
 133         ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1);
 134
 135         ath79_register_mdio(0, 0x0);
 136
 137         /* LAN ports */
 138         ath79_register_eth(1);
 139
 140         /* WAN port */
 141         ath79_register_eth(0);
 142
 143         ap91_pci_init(ee, mac);
 144 }
 145
 146 MIPS_MACHINE(ATH79_MACH_DIR_600_A1, "DIR-600-A1", "D-Link DIR-600 rev. A1",
 147              dir_600_a1_setup);