target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-dir-600-a1.c

   1 /*
   2  *  D-Link DIR-600 rev. A1 board support
   3  *
   4  *  Copyright (C) 2010-2012 Gabor Juhos <juhosg@openwrt.org>
   5  *
   6  *  This program is free software; you can redistribute it and/or modify it
   7  *  under the terms of the GNU General Public License version 2 as published
   8  *  by the Free Software Foundation.
   9  */
  10
  11 #include <linux/mtd/mtd.h>
  12 #include <linux/mtd/partitions.h>
  13
  14 #include <asm/mach-ath79/ath79.h>
  15 #include <asm/mach-ath79/ar71xx_regs.h>
  16
  17 #include "common.h"
  18 #include "dev-ap9x-pci.h"
  19 #include "dev-eth.h"
  20 #include "dev-gpio-buttons.h"
  21 #include "dev-leds-gpio.h"
  22 #include "dev-m25p80.h"
  23 #include "machtypes.h"
  24 #include "nvram.h"
  25
  26 #define DIR_600_A1_GPIO_LED_WPS                 0
  27 #define DIR_600_A1_GPIO_LED_POWER_AMBER         1
  28 #define DIR_600_A1_GPIO_LED_POWER_GREEN         6
  29 #define DIR_600_A1_GPIO_LED_LAN1                13
  30 #define DIR_600_A1_GPIO_LED_LAN2                14
  31 #define DIR_600_A1_GPIO_LED_LAN3                15
  32 #define DIR_600_A1_GPIO_LED_LAN4                16
  33 #define DIR_600_A1_GPIO_LED_WAN_AMBER           7
  34 #define DIR_600_A1_GPIO_LED_WAN_GREEN           17
  35
  36 #define DIR_600_A1_GPIO_BTN_RESET               8
  37 #define DIR_600_A1_GPIO_BTN_WPS                 12
  38
  39 #define DIR_600_A1_KEYS_POLL_INTERVAL           20      /* msecs */
  40 #define DIR_600_A1_KEYS_DEBOUNCE_INTERVAL (3 * DIR_600_A1_KEYS_POLL_INTERVAL)
  41
  42 #define DIR_600_A1_NVRAM_ADDR   0x1f030000
  43 #define DIR_600_A1_NVRAM_SIZE   0x10000
  44
  45 static struct mtd_partition dir_600_a1_partitions[] = {
  46         {
  47                 .name           = "u-boot",
  48                 .offset         = 0,
  49                 .size           = 0x030000,
  50                 .mask_flags     = MTD_WRITEABLE,
  51         }, {
  52                 .name           = "nvram",
  53                 .offset         = 0x030000,
  54                 .size           = 0x010000,
  55         }, {
  56                 .name           = "kernel",
  57                 .offset         = 0x040000,
  58                 .size           = 0x0e0000,
  59         }, {
  60                 .name           = "rootfs",
  61                 .offset         = 0x120000,
  62                 .size           = 0x2c0000,
  63         }, {
  64                 .name           = "mac",
  65                 .offset         = 0x3e0000,
  66                 .size           = 0x010000,
  67                 .mask_flags     = MTD_WRITEABLE,
  68         }, {
  69                 .name           = "art",
  70                 .offset         = 0x3f0000,
  71                 .size           = 0x010000,
  72                 .mask_flags     = MTD_WRITEABLE,
  73         }, {
  74                 .name           = "firmware",
  75                 .offset         = 0x040000,
  76                 .size           = 0x3a0000,
  77         }
  78 };
  79
  80 static struct flash_platform_data dir_600_a1_flash_data = {
  81         .parts          = dir_600_a1_partitions,
  82         .nr_parts       = ARRAY_SIZE(dir_600_a1_partitions),
  83 };
  84
  85 static struct gpio_led dir_600_a1_leds_gpio[] __initdata = {
  86         {
  87                 .name           = "d-link:green:power",
  88                 .gpio           = DIR_600_A1_GPIO_LED_POWER_GREEN,
  89         }, {
  90                 .name           = "d-link:amber:power",
  91                 .gpio           = DIR_600_A1_GPIO_LED_POWER_AMBER,
  92         }, {
  93                 .name           = "d-link:amber:wan",
  94                 .gpio           = DIR_600_A1_GPIO_LED_WAN_AMBER,
  95         }, {
  96                 .name           = "d-link:green:wan",
  97                 .gpio           = DIR_600_A1_GPIO_LED_WAN_GREEN,
  98                 .active_low     = 1,
  99         }, {
 100                 .name           = "d-link:green:lan1",
 101                 .gpio           = DIR_600_A1_GPIO_LED_LAN1,
 102                 .active_low     = 1,
 103         }, {
 104                 .name           = "d-link:green:lan2",
 105                 .gpio           = DIR_600_A1_GPIO_LED_LAN2,
 106                 .active_low     = 1,
 107         }, {
 108                 .name           = "d-link:green:lan3",
 109                 .gpio           = DIR_600_A1_GPIO_LED_LAN3,
 110                 .active_low     = 1,
 111         }, {
 112                 .name           = "d-link:green:lan4",
 113                 .gpio           = DIR_600_A1_GPIO_LED_LAN4,
 114                 .active_low     = 1,
 115         }, {
 116                 .name           = "d-link:blue:wps",
 117                 .gpio           = DIR_600_A1_GPIO_LED_WPS,
 118                 .active_low     = 1,
 119         }
 120 };
 121
 122 static struct gpio_keys_button dir_600_a1_gpio_keys[] __initdata = {
 123         {
 124                 .desc           = "reset",
 125                 .type           = EV_KEY,
 126                 .code           = KEY_RESTART,
 127                 .debounce_interval = DIR_600_A1_KEYS_DEBOUNCE_INTERVAL,
 128                 .gpio           = DIR_600_A1_GPIO_BTN_RESET,
 129                 .active_low     = 1,
 130         }, {
 131                 .desc           = "wps",
 132                 .type           = EV_KEY,
 133                 .code           = KEY_WPS_BUTTON,
 134                 .debounce_interval = DIR_600_A1_KEYS_DEBOUNCE_INTERVAL,
 135                 .gpio           = DIR_600_A1_GPIO_BTN_WPS,
 136                 .active_low     = 1,
 137         }
 138 };
 139
 140 static void __init dir_600_a1_setup(void)
 141 {
 142         const char *nvram = (char *) KSEG1ADDR(DIR_600_A1_NVRAM_ADDR);
 143         u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
 144         u8 mac_buff[6];
 145         u8 *mac = NULL;
 146
 147         if (ath79_nvram_parse_mac_addr(nvram, DIR_600_A1_NVRAM_SIZE,
 148                                        "lan_mac=", mac_buff) == 0) {
 149                 ath79_init_mac(ath79_eth0_data.mac_addr, mac_buff, 0);
 150                 ath79_init_mac(ath79_eth1_data.mac_addr, mac_buff, 1);
 151                 mac = mac_buff;
 152         }
 153
 154         ath79_register_m25p80(&dir_600_a1_flash_data);
 155
 156         ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
 157                                     AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
 158                                     AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
 159                                     AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
 160                                     AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN);
 161
 162         ath79_register_leds_gpio(-1, ARRAY_SIZE(dir_600_a1_leds_gpio),
 163                                  dir_600_a1_leds_gpio);
 164
 165         ath79_register_gpio_keys_polled(-1, DIR_600_A1_KEYS_POLL_INTERVAL,
 166                                         ARRAY_SIZE(dir_600_a1_gpio_keys),
 167                                         dir_600_a1_gpio_keys);
 168
 169         ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
 170         ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1);
 171
 172         ath79_register_mdio(0, 0x0);
 173
 174         /* LAN ports */
 175         ath79_register_eth(1);
 176
 177         /* WAN port */
 178         ath79_register_eth(0);
 179
 180         ap91_pci_init(ee, mac);
 181 }
 182
 183 MIPS_MACHINE(ATH79_MACH_DIR_600_A1, "DIR-600-A1", "D-Link DIR-600 rev. A1",
 184              dir_600_a1_setup);