2 * TP-LINK TL-WDR4300 board support
4 * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
11 #include <linux/pci.h>
12 #include <linux/phy.h>
13 #include <linux/gpio.h>
14 #include <linux/platform_device.h>
15 #include <linux/ath9k_platform.h>
16 #include <linux/ar8216_platform.h>
18 #include <asm/mach-ath79/ar71xx_regs.h>
21 #include "dev-ap9x-pci.h"
23 #include "dev-gpio-buttons.h"
24 #include "dev-leds-gpio.h"
25 #include "dev-m25p80.h"
29 #include "machtypes.h"
31 #define WDR4300_GPIO_LED_USB1 11
32 #define WDR4300_GPIO_LED_USB2 12
33 #define WDR4300_GPIO_LED_WLAN2G 13
34 #define WDR4300_GPIO_LED_SYSTEM 14
35 #define WDR4300_GPIO_LED_QSS 15
37 #define WDR4300_GPIO_BTN_WPS 16
38 #define WDR4300_GPIO_BTN_RFKILL 17
40 #define WDR4300_GPIO_EXTERNAL_LNA0 18
41 #define WDR4300_GPIO_EXTERNAL_LNA1 19
43 #define WDR4300_GPIO_USB1_POWER 22
44 #define WDR4300_GPIO_USB2_POWER 21
46 #define WDR4300_KEYS_POLL_INTERVAL 20 /* msecs */
47 #define WDR4300_KEYS_DEBOUNCE_INTERVAL (3 * WDR4300_KEYS_POLL_INTERVAL)
49 #define WDR4300_MAC0_OFFSET 0
50 #define WDR4300_MAC1_OFFSET 6
51 #define WDR4300_WMAC_CALDATA_OFFSET 0x1000
52 #define WDR4300_PCIE_CALDATA_OFFSET 0x5000
54 static const char *wdr4300_part_probes[] = {
59 static struct flash_platform_data wdr4300_flash_data = {
60 .part_probes = wdr4300_part_probes,
63 static struct gpio_led wdr4300_leds_gpio[] __initdata = {
65 .name = "tp-link:blue:qss",
66 .gpio = WDR4300_GPIO_LED_QSS,
70 .name = "tp-link:blue:system",
71 .gpio = WDR4300_GPIO_LED_SYSTEM,
75 .name = "tp-link:green:usb1",
76 .gpio = WDR4300_GPIO_LED_USB1,
80 .name = "tp-link:green:usb2",
81 .gpio = WDR4300_GPIO_LED_USB2,
85 .name = "tp-link:blue:wlan2g",
86 .gpio = WDR4300_GPIO_LED_WLAN2G,
91 static struct gpio_keys_button wdr4300_gpio_keys[] __initdata = {
95 .code = KEY_WPS_BUTTON,
96 .debounce_interval = WDR4300_KEYS_DEBOUNCE_INTERVAL,
97 .gpio = WDR4300_GPIO_BTN_WPS,
101 .desc = "RFKILL switch",
104 .debounce_interval = WDR4300_KEYS_DEBOUNCE_INTERVAL,
105 .gpio = WDR4300_GPIO_BTN_RFKILL,
109 static const struct ar8327_led_info wdr4300_leds_ar8327[] __initconst = {
110 AR8327_LED_INFO(PHY0_0, HW, "tp-link:blue:wan"),
111 AR8327_LED_INFO(PHY1_0, HW, "tp-link:blue:lan1"),
112 AR8327_LED_INFO(PHY2_0, HW, "tp-link:blue:lan2"),
113 AR8327_LED_INFO(PHY3_0, HW, "tp-link:blue:lan3"),
114 AR8327_LED_INFO(PHY4_0, HW, "tp-link:blue:lan4"),
117 static struct ar8327_pad_cfg wdr4300_ar8327_pad0_cfg = {
118 .mode = AR8327_PAD_MAC_RGMII,
119 .txclk_delay_en = true,
120 .rxclk_delay_en = true,
121 .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
122 .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
125 static struct ar8327_led_cfg wdr4300_ar8327_led_cfg = {
126 .led_ctrl0 = 0xc737c737,
127 .led_ctrl1 = 0x00000000,
128 .led_ctrl2 = 0x00000000,
129 .led_ctrl3 = 0x0030c300,
133 static struct ar8327_platform_data wdr4300_ar8327_data = {
134 .pad0_cfg = &wdr4300_ar8327_pad0_cfg,
137 .speed = AR8327_PORT_SPEED_1000,
142 .led_cfg = &wdr4300_ar8327_led_cfg,
143 .num_leds = ARRAY_SIZE(wdr4300_leds_ar8327),
144 .leds = wdr4300_leds_ar8327,
147 static struct mdio_board_info wdr4300_mdio0_info[] = {
149 .bus_id = "ag71xx-mdio.0",
151 .platform_data = &wdr4300_ar8327_data,
155 static void __init wdr4300_setup(void)
157 u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
158 u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
161 ath79_register_m25p80(&wdr4300_flash_data);
162 ath79_register_leds_gpio(-1, ARRAY_SIZE(wdr4300_leds_gpio),
164 ath79_register_gpio_keys_polled(-1, WDR4300_KEYS_POLL_INTERVAL,
165 ARRAY_SIZE(wdr4300_gpio_keys),
168 ath79_wmac_set_ext_lna_gpio(0, WDR4300_GPIO_EXTERNAL_LNA0);
169 ath79_wmac_set_ext_lna_gpio(1, WDR4300_GPIO_EXTERNAL_LNA1);
171 ath79_init_mac(tmpmac, mac, -1);
172 ath79_register_wmac(art + WDR4300_WMAC_CALDATA_OFFSET, tmpmac);
174 ath79_init_mac(tmpmac, mac, 0);
175 ap9x_pci_setup_wmac_led_pin(0, 0);
176 ap91_pci_init(art + WDR4300_PCIE_CALDATA_OFFSET, tmpmac);
178 ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0);
180 mdiobus_register_board_info(wdr4300_mdio0_info,
181 ARRAY_SIZE(wdr4300_mdio0_info));
183 ath79_register_mdio(0, 0x0);
185 ath79_init_mac(ath79_eth0_data.mac_addr, mac, -2);
187 /* GMAC0 is connected to an AR8327N switch */
188 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
189 ath79_eth0_data.phy_mask = BIT(0);
190 ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
191 ath79_eth0_pll_data.pll_1000 = 0x06000000;
192 ath79_register_eth(0);
194 gpio_request_one(WDR4300_GPIO_USB1_POWER,
195 GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
197 gpio_request_one(WDR4300_GPIO_USB2_POWER,
198 GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
200 ath79_register_usb();
203 MIPS_MACHINE(ATH79_MACH_TL_WDR4300, "TL-WDR4300",
204 "TP-LINK TL-WDR3600/4300/4310",