target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wdr3500.c

   1 /*
   2  *  TP-LINK TL-WDR3500 board support
   3  *
   4  *  Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
   5  *  Copyright (C) 2013 Gui Iribarren <gui@altermundi.net>
   6  *
   7  *  This program is free software; you can redistribute it and/or modify it
   8  *  under the terms of the GNU General Public License version 2 as published
   9  *  by the Free Software Foundation.
  10  */
  11
  12 #include <linux/pci.h>
  13 #include <linux/phy.h>
  14 #include <linux/gpio.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/ath9k_platform.h>
  17 #include <linux/ar8216_platform.h>
  18
  19 #include <asm/mach-ath79/ar71xx_regs.h>
  20
  21 #include "common.h"
  22 #include "dev-ap9x-pci.h"
  23 #include "dev-eth.h"
  24 #include "dev-gpio-buttons.h"
  25 #include "dev-leds-gpio.h"
  26 #include "dev-m25p80.h"
  27 #include "dev-spi.h"
  28 #include "dev-usb.h"
  29 #include "dev-wmac.h"
  30 #include "machtypes.h"
  31
  32 #define WDR3500_GPIO_LED_USB1           11
  33 #define WDR3500_GPIO_LED_WLAN2G         13
  34 #define WDR3500_GPIO_LED_SYSTEM         14
  35 #define WDR3500_GPIO_LED_QSS            15
  36
  37 #define WDR3500_GPIO_BTN_WPS            16
  38 #define WDR3500_GPIO_BTN_RFKILL         17
  39
  40 #define WDR3500_GPIO_USB1_POWER         22
  41
  42 #define WDR3500_KEYS_POLL_INTERVAL      20      /* msecs */
  43 #define WDR3500_KEYS_DEBOUNCE_INTERVAL  (3 * WDR3500_KEYS_POLL_INTERVAL)
  44
  45 #define WDR3500_MAC0_OFFSET             0
  46 #define WDR3500_MAC1_OFFSET             6
  47 #define WDR3500_WMAC_CALDATA_OFFSET     0x1000
  48 #define WDR3500_PCIE_CALDATA_OFFSET     0x5000
  49
  50 static const char *wdr3500_part_probes[] = {
  51         "tp-link",
  52         NULL,
  53 };
  54
  55 static struct flash_platform_data wdr3500_flash_data = {
  56         .part_probes    = wdr3500_part_probes,
  57 };
  58
  59 static struct gpio_led wdr3500_leds_gpio[] __initdata = {
  60         {
  61                 .name           = "tp-link:green:qss",
  62                 .gpio           = WDR3500_GPIO_LED_QSS,
  63                 .active_low     = 1,
  64         },
  65         {
  66                 .name           = "tp-link:green:system",
  67                 .gpio           = WDR3500_GPIO_LED_SYSTEM,
  68                 .active_low     = 1,
  69         },
  70         {
  71                 .name           = "tp-link:green:usb1",
  72                 .gpio           = WDR3500_GPIO_LED_USB1,
  73                 .active_low     = 1,
  74         },
  75         {
  76                 .name           = "tp-link:green:wlan2g",
  77                 .gpio           = WDR3500_GPIO_LED_WLAN2G,
  78                 .active_low     = 1,
  79         },
  80 };
  81
  82 static struct gpio_keys_button wdr3500_gpio_keys[] __initdata = {
  83         {
  84                 .desc           = "QSS button",
  85                 .type           = EV_KEY,
  86                 .code           = KEY_WPS_BUTTON,
  87                 .debounce_interval = WDR3500_KEYS_DEBOUNCE_INTERVAL,
  88                 .gpio           = WDR3500_GPIO_BTN_WPS,
  89                 .active_low     = 1,
  90         },
  91         {
  92                 .desc           = "RFKILL switch",
  93                 .type           = EV_SW,
  94                 .code           = KEY_RFKILL,
  95                 .debounce_interval = WDR3500_KEYS_DEBOUNCE_INTERVAL,
  96                 .gpio           = WDR3500_GPIO_BTN_RFKILL,
  97         },
  98 };
  99
 100
 101 static void __init wdr3500_setup(void)
 102 {
 103         u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
 104         u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
 105         u8 tmpmac[ETH_ALEN];
 106
 107         ath79_register_m25p80(&wdr3500_flash_data);
 108         ath79_register_leds_gpio(-1, ARRAY_SIZE(wdr3500_leds_gpio),
 109                                  wdr3500_leds_gpio);
 110         ath79_register_gpio_keys_polled(-1, WDR3500_KEYS_POLL_INTERVAL,
 111                                         ARRAY_SIZE(wdr3500_gpio_keys),
 112                                         wdr3500_gpio_keys);
 113
 114         ath79_init_mac(tmpmac, mac, 0);
 115         ath79_register_wmac(art + WDR3500_WMAC_CALDATA_OFFSET, tmpmac);
 116
 117         ath79_init_mac(tmpmac, mac, 1);
 118         ap9x_pci_setup_wmac_led_pin(0, 0);
 119         ap91_pci_init(art + WDR3500_PCIE_CALDATA_OFFSET, tmpmac);
 120
 121         ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE);
 122
 123         ath79_register_mdio(1, 0x0);
 124
 125         /* LAN */
 126         ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1);
 127
 128         /* GMAC1 is connected to the internal switch */
 129         ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
 130
 131         ath79_register_eth(1);
 132
 133         /* WAN */
 134         ath79_init_mac(ath79_eth0_data.mac_addr, mac, 2);
 135
 136         /* GMAC0 is connected to the PHY4 of the internal switch */
 137         ath79_switch_data.phy4_mii_en = 1;
 138         ath79_switch_data.phy_poll_mask = BIT(4);
 139         ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
 140         ath79_eth0_data.phy_mask = BIT(4);
 141         ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
 142
 143         ath79_register_eth(0);
 144
 145         gpio_request_one(WDR3500_GPIO_USB1_POWER,
 146                          GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
 147                          "USB1 power");
 148         ath79_register_usb();
 149 }
 150
 151 MIPS_MACHINE(ATH79_MACH_TL_WDR3500, "TL-WDR3500",
 152              "TP-LINK TL-WDR3500",
 153              wdr3500_setup);