target/linux/ar71xx/files/arch/mips/ath79/mach-rb2011.c

   1 /*
   2  *  MikroTik RouterBOARD 2011 support
   3  *
   4  *  Copyright (C) 2012 Stijn Tintel <stijn@linux-ipv6.be>
   5  *
   6  *  This program is free software; you can redistribute it and/or modify it
   7  *  under the terms of the GNU General Public License version 2 as published
   8  *  by the Free Software Foundation.
   9  */
  10
  11 #include <linux/phy.h>
  12 #include <linux/platform_device.h>
  13 #include <linux/ar8216_platform.h>
  14 #include <linux/mtd/mtd.h>
  15 #include <linux/mtd/partitions.h>
  16 #include <linux/spi/spi.h>
  17 #include <linux/spi/flash.h>
  18
  19 #include <asm/mach-ath79/ar71xx_regs.h>
  20
  21 #include "common.h"
  22 #include "dev-eth.h"
  23 #include "dev-m25p80.h"
  24 #include "machtypes.h"
  25
  26 #define RB_ROUTERBOOT_OFFSET    0x0000
  27 #define RB_ROUTERBOOT_SIZE      0xb000
  28 #define RB_HARD_CFG_OFFSET      0xb000
  29 #define RB_HARD_CFG_SIZE        0x1000
  30 #define RB_BIOS_OFFSET          0xd000
  31 #define RB_BIOS_SIZE            0x2000
  32 #define RB_SOFT_CFG_OFFSET      0xf000
  33 #define RB_SOFT_CFG_SIZE        0x1000
  34
  35 static struct mtd_partition rb2011_spi_partitions[] = {
  36         {
  37                 .name           = "routerboot",
  38                 .offset         = RB_ROUTERBOOT_OFFSET,
  39                 .size           = RB_ROUTERBOOT_SIZE,
  40                 .mask_flags     = MTD_WRITEABLE,
  41         }, {
  42                 .name           = "hard_config",
  43                 .offset         = RB_HARD_CFG_OFFSET,
  44                 .size           = RB_HARD_CFG_SIZE,
  45                 .mask_flags     = MTD_WRITEABLE,
  46         }, {
  47                 .name           = "bios",
  48                 .offset         = RB_BIOS_OFFSET,
  49                 .size           = RB_BIOS_SIZE,
  50                 .mask_flags     = MTD_WRITEABLE,
  51         }, {
  52                 .name           = "soft_config",
  53                 .offset         = RB_SOFT_CFG_OFFSET,
  54                 .size           = RB_SOFT_CFG_SIZE,
  55         }
  56 };
  57
  58 static struct flash_platform_data rb2011_spi_flash_data = {
  59         .parts          = rb2011_spi_partitions,
  60         .nr_parts       = ARRAY_SIZE(rb2011_spi_partitions),
  61 };
  62
  63 static struct ar8327_pad_cfg rb2011_ar8327_pad0_cfg = {
  64         .mode = AR8327_PAD_MAC_RGMII,
  65         .txclk_delay_en = true,
  66         .rxclk_delay_en = true,
  67         .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
  68         .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
  69 };
  70
  71 static struct ar8327_platform_data rb2011_ar8327_data = {
  72         .pad0_cfg = &rb2011_ar8327_pad0_cfg,
  73         .cpuport_cfg = {
  74                 .force_link = 1,
  75                 .speed = AR8327_PORT_SPEED_1000,
  76                 .duplex = 1,
  77                 .txpause = 1,
  78                 .rxpause = 1,
  79         }
  80 };
  81
  82 static struct mdio_board_info rb2011_mdio0_info[] = {
  83         {
  84                 .bus_id = "ag71xx-mdio.0",
  85                 .phy_addr = 0,
  86                 .platform_data = &rb2011_ar8327_data,
  87         },
  88 };
  89
  90 static void __init rb2011_gmac_setup(void)
  91 {
  92         void __iomem *base;
  93         u32 t;
  94
  95         base = ioremap(AR934X_GMAC_BASE, AR934X_GMAC_SIZE);
  96
  97         t = __raw_readl(base + AR934X_GMAC_REG_ETH_CFG);
  98         t &= ~(AR934X_ETH_CFG_RGMII_GMAC0 | AR934X_ETH_CFG_MII_GMAC0 |
  99                 AR934X_ETH_CFG_GMII_GMAC0 | AR934X_ETH_CFG_SW_ONLY_MODE);
 100         t |= AR934X_ETH_CFG_RGMII_GMAC0 | AR934X_ETH_CFG_SW_ONLY_MODE;
 101
 102         __raw_writel(t, base + AR934X_GMAC_REG_ETH_CFG);
 103
 104         iounmap(base);
 105 }
 106
 107 static void __init rb2011_setup(void)
 108 {
 109         ath79_register_m25p80(&rb2011_spi_flash_data);
 110
 111         rb2011_gmac_setup();
 112
 113         ath79_register_mdio(1, 0x0);
 114         ath79_register_mdio(0, 0x0);
 115
 116         mdiobus_register_board_info(rb2011_mdio0_info,
 117                                     ARRAY_SIZE(rb2011_mdio0_info));
 118
 119         /* GMAC0 is connected to an ar8327 switch */
 120         ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0);
 121         ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
 122         ath79_eth0_data.phy_mask = BIT(0);
 123         ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
 124         ath79_eth0_pll_data.pll_1000 = 0x06000000;
 125
 126         ath79_register_eth(0);
 127
 128         /* GMAC1 is connected to the internal switch */
 129         ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 5);
 130         ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
 131         ath79_eth1_data.speed = SPEED_1000;
 132         ath79_eth1_data.duplex = DUPLEX_FULL;
 133
 134         ath79_register_eth(1);
 135 }
 136
 137 MIPS_MACHINE(ATH79_MACH_RB_2011L, "2011L", "MikroTik RouterBOARD 2011L",
 138              rb2011_setup);