2 * OpenMesh OM2P support
4 * Copyright (C) 2011 Marek Lindner <marek@open-mesh.com>
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
11 #include <linux/gpio.h>
12 #include <linux/mtd/mtd.h>
13 #include <linux/mtd/partitions.h>
14 #include <linux/platform_device.h>
16 #include <asm/mach-ath79/ar71xx_regs.h>
17 #include <asm/mach-ath79/ath79.h>
20 #include "dev-ap9x-pci.h"
22 #include "dev-gpio-buttons.h"
23 #include "dev-leds-gpio.h"
24 #include "dev-m25p80.h"
26 #include "machtypes.h"
28 #define OM2P_GPIO_LED_POWER 0
29 #define OM2P_GPIO_LED_GREEN 13
30 #define OM2P_GPIO_LED_RED 14
31 #define OM2P_GPIO_LED_YELLOW 15
32 #define OM2P_GPIO_LED_LAN 16
33 #define OM2P_GPIO_LED_WAN 17
34 #define OM2P_GPIO_BTN_RESET 11
36 #define OM2P_KEYS_POLL_INTERVAL 20 /* msecs */
37 #define OM2P_KEYS_DEBOUNCE_INTERVAL (3 * OM2P_KEYS_POLL_INTERVAL)
39 #define OM2P_WAN_PHYMASK BIT(4)
41 #define OM2P_LC_GPIO_LED_POWER 1
42 #define OM2P_LC_GPIO_LED_GREEN 15
43 #define OM2P_LC_GPIO_LED_RED 16
44 #define OM2P_LC_GPIO_LED_YELLOW 0
45 #define OM2P_LC_GPIO_LED_LAN 13
46 #define OM2P_LC_GPIO_LED_WAN 17
47 #define OM2P_LC_GPIO_BTN_RESET 12
49 static struct flash_platform_data om2p_flash_data = {
51 .name = "ar7240-nor0",
54 static struct gpio_led om2p_leds_gpio[] __initdata = {
56 .name = "om2p:blue:power",
57 .gpio = OM2P_GPIO_LED_POWER,
60 .name = "om2p:red:wifi",
61 .gpio = OM2P_GPIO_LED_RED,
64 .name = "om2p:yellow:wifi",
65 .gpio = OM2P_GPIO_LED_YELLOW,
68 .name = "om2p:green:wifi",
69 .gpio = OM2P_GPIO_LED_GREEN,
72 .name = "om2p:blue:lan",
73 .gpio = OM2P_GPIO_LED_LAN,
76 .name = "om2p:blue:wan",
77 .gpio = OM2P_GPIO_LED_WAN,
82 static struct gpio_keys_button om2p_gpio_keys[] __initdata = {
87 .debounce_interval = OM2P_KEYS_DEBOUNCE_INTERVAL,
88 .gpio = OM2P_GPIO_BTN_RESET,
93 static void __init om2p_setup(void)
95 u8 *mac1 = (u8 *)KSEG1ADDR(0x1ffc0000);
96 u8 *mac2 = (u8 *)KSEG1ADDR(0x1ffc0000 + ETH_ALEN);
97 u8 *ee = (u8 *)KSEG1ADDR(0x1ffc1000);
99 ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
100 AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
101 AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
102 AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
103 AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN);
105 ath79_register_m25p80(&om2p_flash_data);
107 ath79_register_mdio(0, ~OM2P_WAN_PHYMASK);
109 ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0);
110 ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0);
112 ath79_register_eth(0);
113 ath79_register_eth(1);
115 ap91_pci_init(ee, NULL);
117 ath79_register_leds_gpio(-1, ARRAY_SIZE(om2p_leds_gpio),
120 ath79_register_gpio_keys_polled(-1, OM2P_KEYS_POLL_INTERVAL,
121 ARRAY_SIZE(om2p_gpio_keys),
125 MIPS_MACHINE(ATH79_MACH_OM2P, "OM2P", "OpenMesh OM2P", om2p_setup);
128 static struct flash_platform_data om2p_lc_flash_data = {
129 .type = "s25sl12800",
132 static void __init om2p_lc_setup(void)
134 u8 *mac1 = (u8 *)KSEG1ADDR(0x1ffc0000);
135 u8 *mac2 = (u8 *)KSEG1ADDR(0x1ffc0000 + ETH_ALEN);
136 u8 *art = (u8 *)KSEG1ADDR(0x1ffc1000);
139 ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
140 AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
141 AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
142 AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
143 AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN);
145 t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP);
146 t |= AR933X_BOOTSTRAP_MDIO_GPIO_EN;
147 ath79_reset_wr(AR933X_RESET_REG_BOOTSTRAP, t);
149 ath79_register_m25p80(&om2p_lc_flash_data);
151 om2p_leds_gpio[0].gpio = OM2P_LC_GPIO_LED_POWER;
152 om2p_leds_gpio[1].gpio = OM2P_LC_GPIO_LED_RED;
153 om2p_leds_gpio[2].gpio = OM2P_LC_GPIO_LED_YELLOW;
154 om2p_leds_gpio[3].gpio = OM2P_LC_GPIO_LED_GREEN;
155 om2p_leds_gpio[4].gpio = OM2P_LC_GPIO_LED_LAN;
156 om2p_leds_gpio[5].gpio = OM2P_LC_GPIO_LED_WAN;
157 ath79_register_leds_gpio(-1, ARRAY_SIZE(om2p_leds_gpio),
160 om2p_gpio_keys[0].gpio = OM2P_LC_GPIO_BTN_RESET;
161 ath79_register_gpio_keys_polled(-1, OM2P_KEYS_POLL_INTERVAL,
162 ARRAY_SIZE(om2p_gpio_keys),
165 ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0);
166 ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0);
168 ath79_register_mdio(0, 0x0);
170 ath79_register_eth(0);
171 ath79_register_eth(1);
173 ath79_register_wmac(art, NULL);
176 MIPS_MACHINE(ATH79_MACH_OM2P_LC, "OM2P-LC", "OpenMesh OM2P LC", om2p_lc_setup);
178 static void __init om2p_hs_setup(void)
180 u8 *mac1 = (u8 *)KSEG1ADDR(0x1ffc0000);
181 u8 *mac2 = (u8 *)KSEG1ADDR(0x1ffc0000 + ETH_ALEN);
182 u8 *art = (u8 *)KSEG1ADDR(0x1ffc1000);
184 /* make lan / wan leds software controllable */
185 ath79_gpio_output_select(OM2P_GPIO_LED_LAN, AR934X_GPIO_OUT_GPIO);
186 ath79_gpio_output_select(OM2P_GPIO_LED_WAN, AR934X_GPIO_OUT_GPIO);
188 /* enable reset button */
189 ath79_gpio_output_select(OM2P_GPIO_BTN_RESET, AR934X_GPIO_OUT_GPIO);
190 ath79_gpio_function_enable(AR934X_GPIO_FUNC_JTAG_DISABLE);
192 om2p_leds_gpio[4].gpio = OM2P_GPIO_LED_WAN;
193 om2p_leds_gpio[5].gpio = OM2P_GPIO_LED_LAN;
195 ath79_register_m25p80(&om2p_lc_flash_data);
196 ath79_register_leds_gpio(-1, ARRAY_SIZE(om2p_leds_gpio),
198 ath79_register_gpio_keys_polled(-1, OM2P_KEYS_POLL_INTERVAL,
199 ARRAY_SIZE(om2p_gpio_keys),
202 ath79_register_wmac(art, NULL);
204 ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_PHY_SWAP);
205 ath79_register_mdio(1, 0x0);
207 ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0);
208 ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0);
210 /* GMAC0 is connected to the PHY0 of the internal switch */
211 ath79_switch_data.phy4_mii_en = 1;
212 ath79_switch_data.phy_poll_mask = BIT(0);
213 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
214 ath79_eth0_data.phy_mask = BIT(0);
215 ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
216 ath79_register_eth(0);
218 /* GMAC1 is connected to the internal switch */
219 ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
220 ath79_register_eth(1);
223 MIPS_MACHINE(ATH79_MACH_OM2P_HS, "OM2P-HS", "OpenMesh OM2P HS", om2p_hs_setup);