ar71xx: wndr4300: indicate WNDR3700v4 in the kernel support files
[openwrt.git] / target / linux / ar71xx / files / arch / mips / ath79 / mach-dir-505-a1.c
1 /*
2  *  DLink DIR-505 A1 board support
3  *
4  *  Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org>
5  *
6  *  This program is free software; you can redistribute it and/or modify it
7  *  under the terms of the GNU General Public License version 2 as published
8  *  by the Free Software Foundation.
9  */
10
11 #include <linux/gpio.h>
12
13 #include <asm/mach-ath79/ath79.h>
14 #include <asm/mach-ath79/ar71xx_regs.h>
15
16 #include "common.h"
17 #include "dev-eth.h"
18 #include "dev-gpio-buttons.h"
19 #include "dev-leds-gpio.h"
20 #include "dev-m25p80.h"
21 #include "dev-wmac.h"
22 #include "dev-usb.h"
23 #include "machtypes.h"
24
25 #define DIR_505A1_GPIO_BTN_WPS         11 /* verify */
26 #define DIR_505A1_GPIO_BTN_RESET       12 /* verify */
27
28 #define DIR_505A1_GPIO_LED_RED         26 /* unused, fyi */
29 #define DIR_505A1_GPIO_LED_GREEN       27
30
31 #define DIR_505A1_GPIO_WAN_LED_ENABLE  1
32
33 #define DIR_505A1_KEYS_POLL_INTERVAL   20      /* msecs */
34 #define DIR_505A1_KEYS_DEBOUNCE_INTERVAL (3 * DIR_505A1_KEYS_POLL_INTERVAL)
35
36 #define DIR_505A1_ART_ADDRESS          0x1f010000
37 #define DIR_505A1_CALDATA_OFFSET       0x1000
38
39 #define DIR_505A1_MAC_PART_ADDRESS      0x1f020000
40 #define DIR_505A1_LAN_MAC_OFFSET        0x04
41 #define DIR_505A1_WAN_MAC_OFFSET        0x16
42
43 static struct gpio_led dir_505_a1_leds_gpio[] __initdata = {
44         {
45                 .name           = "d-link:green:power",
46                 .gpio           = DIR_505A1_GPIO_LED_GREEN,
47                 .active_low     = 1,
48         }, {
49                 .name           = "d-link:red:status",
50                 .gpio           = DIR_505A1_GPIO_LED_RED,
51                 .active_low     = 1,
52         },
53 };
54
55 static struct gpio_keys_button dir_505_a1_gpio_keys[] __initdata = {
56         {
57                 .desc           = "Reset button",
58                 .type           = EV_KEY,
59                 .code           = KEY_RESTART,
60                 .debounce_interval = DIR_505A1_KEYS_DEBOUNCE_INTERVAL,
61                 .gpio           = DIR_505A1_GPIO_BTN_RESET,
62                 .active_low     = 1,
63         }, {
64                 .desc           = "WPS button",
65                 .type           = EV_KEY,
66                 .code           = KEY_WPS_BUTTON,
67                 .debounce_interval = DIR_505A1_KEYS_DEBOUNCE_INTERVAL,
68                 .gpio           = DIR_505A1_GPIO_BTN_WPS,
69                 .active_low     = 1,
70         }
71 };
72
73 static void __init dir_505_a1_setup(void)
74 {
75         u8 *art = (u8 *) KSEG1ADDR(DIR_505A1_ART_ADDRESS);
76         u8 *mac = (u8 *) KSEG1ADDR(DIR_505A1_MAC_PART_ADDRESS);
77         u8 lan_mac[ETH_ALEN];
78         u8 wan_mac[ETH_ALEN];
79
80         ath79_setup_ar933x_phy4_switch(false, false);
81
82         ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
83                 AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
84                 AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
85                 AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
86                 AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN);
87
88         gpio_request_one(DIR_505A1_GPIO_WAN_LED_ENABLE,
89                 GPIOF_OUT_INIT_LOW, "WAN LED enable");
90
91         ath79_register_leds_gpio(-1, ARRAY_SIZE(dir_505_a1_leds_gpio),
92                 dir_505_a1_leds_gpio);
93
94         ath79_register_gpio_keys_polled(1, DIR_505A1_KEYS_POLL_INTERVAL,
95                 ARRAY_SIZE(dir_505_a1_gpio_keys),
96                 dir_505_a1_gpio_keys);
97
98         ath79_register_m25p80(NULL);
99
100         ath79_register_usb();
101
102         ath79_parse_ascii_mac(mac + DIR_505A1_LAN_MAC_OFFSET, lan_mac);
103         ath79_parse_ascii_mac(mac + DIR_505A1_WAN_MAC_OFFSET, wan_mac);
104
105         ath79_init_mac(ath79_eth0_data.mac_addr, wan_mac, 0);
106         ath79_init_mac(ath79_eth1_data.mac_addr, lan_mac, 0);
107
108         ath79_register_mdio(0, 0x0);
109         ath79_register_eth(1);
110         ath79_register_eth(0);
111
112         ath79_register_wmac(art + DIR_505A1_CALDATA_OFFSET, lan_mac);
113 }
114
115 MIPS_MACHINE(ATH79_MACH_DIR_505_A1, "DIR-505-A1",
116                 "D-Link DIR-505 rev. A1", dir_505_a1_setup);