[ar7] correct the MDIO base address and reset sequence for Titan (#6573)
[openwrt.git] / target / linux / ar7 / patches-2.6.32 / 940-cpmac-titan.patch
1 Index: linux-2.6.32.9/arch/mips/ar7/platform.c
2 ===================================================================
3 --- linux-2.6.32.9.orig/arch/mips/ar7/platform.c        2010-03-07 13:09:00.000000000 +0100
4 +++ linux-2.6.32.9/arch/mips/ar7/platform.c     2010-03-07 13:09:00.000000000 +0100
5 @@ -716,23 +716,35 @@
6         }
7  
8         if (ar7_has_high_cpmac()) {
9 -               res = fixed_phy_add(PHY_POLL, cpmac_high.id, &fixed_phy_status);
10 +               res = fixed_phy_add(PHY_POLL, ar7_is_titan() ? cpmac_high_titan.id : cpmac_high.id,
11 +                                               &fixed_phy_status);
12                 if (res && res != -ENODEV)
13                         return res;
14 -               cpmac_get_mac(1, cpmac_high_data.dev_addr);
15 -               res = platform_device_register(&cpmac_high);
16 +
17 +               cpmac_get_mac(1, ar7_is_titan() ? cpmac_high_data_titan.dev_addr :
18 +                                               cpmac_high_data.dev_addr);
19 +               res = platform_device_register(ar7_is_titan() ? &cpmac_high_titan :
20 +                                               &cpmac_high);
21 +
22                 if (res)
23                         return res;
24         } else {
25 -               cpmac_low_data.phy_mask = 0xffffffff;
26 +               if (ar7_is_titan())
27 +                       cpmac_low_data_titan.phy_mask = 0xffffffff;
28 +               else
29 +                       cpmac_low_data.phy_mask = 0xffffffff;
30 +
31         }
32  
33 -       res = fixed_phy_add(PHY_POLL, cpmac_low.id, &fixed_phy_status);
34 +       res = fixed_phy_add(PHY_POLL, ar7_is_titan() ? cpmac_low_titan.id :
35 +                       cpmac_low.id, &fixed_phy_status);
36         if (res && res != -ENODEV)
37                 return res;
38  
39 -       cpmac_get_mac(0, cpmac_low_data.dev_addr);
40 -       res = platform_device_register(&cpmac_low);
41 +       cpmac_get_mac(0, ar7_is_titan() ? cpmac_low_data_titan.dev_addr :
42 +                       cpmac_low_data.dev_addr);
43 +       res = platform_device_register(ar7_is_titan() ? &cpmac_low_titan :
44 +                       &cpmac_low);
45         if (res)
46                 return res;
47  
48 Index: linux-2.6.32.9/drivers/net/cpmac.c
49 ===================================================================
50 --- linux-2.6.32.9.orig/drivers/net/cpmac.c     2010-02-23 16:38:51.000000000 +0100
51 +++ linux-2.6.32.9/drivers/net/cpmac.c  2010-03-07 13:24:56.000000000 +0100
52 @@ -1153,6 +1153,8 @@
53                 goto fail;
54         }
55  
56 +       ar7_device_reset(pdata->reset_bit);
57 +
58         dev->irq = platform_get_irq_byname(pdev, "irq");
59  
60         dev->netdev_ops = &cpmac_netdev_ops;
61 @@ -1228,7 +1230,7 @@
62         cpmac_mii->reset = cpmac_mdio_reset;
63         cpmac_mii->irq = mii_irqs;
64  
65 -       cpmac_mii->priv = ioremap(AR7_REGS_MDIO, 256);
66 +       cpmac_mii->priv = ioremap(ar7_is_titan() ? TITAN_REGS_MDIO : AR7_REGS_MDIO, 256);
67  
68         if (!cpmac_mii->priv) {
69                 printk(KERN_ERR "Can't ioremap mdio registers\n");
70 @@ -1239,10 +1241,17 @@
71  #warning FIXME: unhardcode gpio&reset bits
72         ar7_gpio_disable(26);
73         ar7_gpio_disable(27);
74 -       ar7_device_reset(AR7_RESET_BIT_CPMAC_LO);
75 -       ar7_device_reset(AR7_RESET_BIT_CPMAC_HI);
76 +
77 +       if (!ar7_is_titan()) {
78 +               ar7_device_reset(AR7_RESET_BIT_CPMAC_LO);
79 +               ar7_device_reset(AR7_RESET_BIT_CPMAC_HI);
80 +       }
81         ar7_device_reset(AR7_RESET_BIT_EPHY);
82  
83 +       if (ar7_is_titan()) {
84 +               ar7_device_reset(TITAN_RESET_BIT_EPHY1);
85 +       }
86 +
87         cpmac_mii->reset(cpmac_mii);
88  
89         for (i = 0; i < 300; i++)
90 @@ -1257,7 +1266,8 @@
91                 mask = 0;
92         }
93  
94 -       cpmac_mii->phy_mask = ~(mask | 0x80000000);
95 +       cpmac_mii->phy_mask = ar7_is_titan()? ~(mask | 0x80000000 | 0x40000000):
96 +               ~(mask | 0x80000000);
97         snprintf(cpmac_mii->id, MII_BUS_ID_SIZE, "1");
98  
99         res = mdiobus_register(cpmac_mii);
100 Index: a/arch/mips/include/asm/mach-ar7/ar7.h
101 ===================================================================
102 --- a/arch/mips/include/asm/mach-ar7/ar7.h      (revision 19112)
103 +++ b/arch/mips/include/asm/mach-ar7/ar7.h      (working copy)
104 @@ -44,8 +44,10 @@
105  #define UR8_REGS_WDT   (AR7_REGS_BASE + 0x0b00)
106  #define UR8_REGS_UART1 (AR7_REGS_BASE + 0x0f00)
107  
108 -#define TITAN_REGS_MAC0                (0x08640000)
109 -#define TITAN_REGS_MAC1                (TITAN_REGS_MAC0 + 0x0800)
110 +#define TITAN_REGS_ESWITCH_BASE        (0x08640000)
111 +#define TITAN_REGS_MAC0                        (TITAN_REGS_ESWITCH_BASE + 0)
112 +#define TITAN_REGS_MAC1                        (TITAN_REGS_ESWITCH_BASE + 0x0800)
113 +#define TITAN_REGS_MDIO                        (TITAN_REGS_ESWITCH_BASE + 0x02000)
114  #define TITAN_REGS_VLYNQ0      (AR7_REGS_BASE + 0x1c00)
115  #define TITAN_REGS_VLYNQ1      (AR7_REGS_BASE + 0x1300)
116