2 * Copyright (C) 2007 Florian Fainelli <florian@openwrt.org>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 #ifndef __AR7_GPIO_H__
20 #define __AR7_GPIO_H__
21 #include <asm/ar7/ar7.h>
22 #ifndef __AR7_TITAN_H__
23 #include <asm/ar7/titan.h>
26 #define AR7_GPIO_MAX 32
27 #define TITAN_GPIO_MAX 51
29 extern int gpio_request(unsigned gpio, const char *label);
30 extern void gpio_free(unsigned gpio);
32 /* Common GPIO layer */
33 static inline int gpio_get_value_ar7(unsigned gpio)
35 void __iomem *gpio_in =
36 (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_INPUT);
38 return readl(gpio_in) & (1 << gpio);
41 static inline int gpio_get_value_titan(unsigned gpio)
43 void __iomem *gpio_in0 =
44 (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_INPUT_0);
45 void __iomem *gpio_in1 =
46 (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_INPUT_1);
48 return readl(gpio >> 5 ? gpio_in1 : gpio_in0) & (1 << (gpio & 0x1f));
51 static inline int gpio_get_value(unsigned gpio)
53 return ar7_is_titan() ? gpio_get_value_titan(gpio) :
54 gpio_get_value_ar7(gpio);
57 static inline void gpio_set_value_ar7(unsigned gpio, int value)
59 void __iomem *gpio_out =
60 (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_OUTPUT);
63 tmp = readl(gpio_out) & ~(1 << gpio);
66 writel(tmp, gpio_out);
69 static inline void gpio_set_value_titan(unsigned gpio, int value)
71 void __iomem *gpio_out0 =
72 (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_OUTPUT_0);
73 void __iomem *gpio_out1 =
74 (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_OUTPUT_1);
77 tmp = readl(gpio >> 5 ? gpio_out1 : gpio_out0) & ~(1 << (gpio & 0x1f));
79 tmp |= 1 << (gpio & 0x1f);
80 writel(tmp, gpio >> 5 ? gpio_out1 : gpio_out0);
83 static inline void gpio_set_value(unsigned gpio, int value)
86 gpio_set_value_titan(gpio, value);
88 gpio_set_value_ar7(gpio, value);
91 static inline int gpio_direction_input_ar7(unsigned gpio)
93 void __iomem *gpio_dir =
94 (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_DIR);
96 if (gpio >= AR7_GPIO_MAX)
99 writel(readl(gpio_dir) | (1 << gpio), gpio_dir);
104 static inline int gpio_direction_input_titan(unsigned gpio)
106 void __iomem *gpio_dir0 =
107 (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_DIR_0);
108 void __iomem *gpio_dir1 =
109 (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_DIR_1);
111 if (gpio >= TITAN_GPIO_MAX)
114 writel(readl(gpio >> 5 ? gpio_dir1 : gpio_dir0) | (1 << (gpio & 0x1f)),
115 gpio >> 5 ? gpio_dir1 : gpio_dir0);
120 static inline int gpio_direction_input(unsigned gpio)
122 return ar7_is_titan() ? gpio_direction_input_titan(gpio) :
123 gpio_direction_input_ar7(gpio);
126 static inline int gpio_direction_output_ar7(unsigned gpio, int value)
128 void __iomem *gpio_dir =
129 (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_DIR);
131 if (gpio >= AR7_GPIO_MAX)
134 gpio_set_value(gpio, value);
135 writel(readl(gpio_dir) & ~(1 << gpio), gpio_dir);
140 static inline int gpio_direction_output_titan(unsigned gpio, int value)
142 void __iomem *gpio_dir0 =
143 (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_DIR_0);
144 void __iomem *gpio_dir1 =
145 (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_DIR_1);
147 if (gpio >= TITAN_GPIO_MAX)
150 gpio_set_value_titan(gpio, value);
151 writel(readl(gpio >> 5 ? gpio_dir1 : gpio_dir0) & ~(1 <<
152 (gpio & 0x1f)), gpio >> 5 ? gpio_dir1 : gpio_dir0);
157 static inline int gpio_direction_output(unsigned gpio, int value)
159 return ar7_is_titan() ? gpio_direction_output_titan(gpio, value) :
160 gpio_direction_output_ar7(gpio, value);
163 static inline int gpio_to_irq(unsigned gpio)
168 static inline int irq_to_gpio(unsigned irq)
173 /* Board specific GPIO functions */
174 static inline int ar7_gpio_enable_ar7(unsigned gpio)
176 void __iomem *gpio_en =
177 (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_ENABLE);
179 writel(readl(gpio_en) | (1 << gpio), gpio_en);
184 static inline int ar7_gpio_enable_titan(unsigned gpio)
186 void __iomem *gpio_en0 =
187 (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_ENBL_0);
188 void __iomem *gpio_en1 =
189 (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_ENBL_1);
191 writel(readl(gpio >> 5 ? gpio_en1 : gpio_en0) | (1 << (gpio & 0x1f)),
192 gpio >> 5 ? gpio_en1 : gpio_en0);
197 static inline int ar7_gpio_enable(unsigned gpio)
199 return ar7_is_titan() ? ar7_gpio_enable_titan(gpio) :
200 ar7_gpio_enable_ar7(gpio);
203 static inline int ar7_gpio_disable_ar7(unsigned gpio)
205 void __iomem *gpio_en =
206 (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_ENABLE);
208 writel(readl(gpio_en) & ~(1 << gpio), gpio_en);
213 static inline int ar7_gpio_disable_titan(unsigned gpio)
215 void __iomem *gpio_en0 =
216 (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_ENBL_0);
217 void __iomem *gpio_en1 =
218 (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_ENBL_1);
220 writel(readl(gpio >> 5 ? gpio_en1 : gpio_en0) & ~(1 << (gpio & 0x1f)),
221 gpio >> 5 ? gpio_en1 : gpio_en0);
226 static inline int ar7_gpio_disable(unsigned gpio)
228 return ar7_is_titan() ? ar7_gpio_disable_titan(gpio) :
229 ar7_gpio_disable_ar7(gpio);
232 static inline int ar7_init_titan_variant( void )
237 /* set GPIO 44 - 47 as input */
238 /*PAL_sysGpioCtrl(const int, GPIO_PIN, GPIO_INPUT_PIN); */
239 /*define titan_gpio_ctrl in titan.h*/
240 titan_gpio_ctrl(44, GPIO_PIN, GPIO_INPUT_PIN);
241 titan_gpio_ctrl(45, GPIO_PIN, GPIO_INPUT_PIN);
242 titan_gpio_ctrl(46, GPIO_PIN, GPIO_INPUT_PIN);
243 titan_gpio_ctrl(47, GPIO_PIN, GPIO_INPUT_PIN);
245 /* read GPIO to get Titan variant type */
247 titan_sysGpioInValue( &new_val, 1 );
254 case TITAN_CHIP_1050:
255 case TITAN_CHIP_1055:
256 case TITAN_CHIP_1056:
257 case TITAN_CHIP_1060:
263 /* In case we get an invalid value, return the default Titan chip */
264 return TITAN_CHIP_1050;
267 #include <asm-generic/gpio.h>