From 2d3d3c4f6e44013824247928605c5d9439a3b564 Mon Sep 17 00:00:00 2001 From: blogic Date: Tue, 19 Jul 2011 18:06:42 +0000 Subject: [PATCH] fixes pci on lantiq AR9 SoC git-svn-id: svn://svn.openwrt.org/openwrt/trunk@27695 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- target/linux/lantiq/patches-2.6.39/999-fix_pci.patch | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) create mode 100644 target/linux/lantiq/patches-2.6.39/999-fix_pci.patch diff --git a/target/linux/lantiq/patches-2.6.39/999-fix_pci.patch b/target/linux/lantiq/patches-2.6.39/999-fix_pci.patch new file mode 100644 index 0000000000..94a3bc7516 --- /dev/null +++ b/target/linux/lantiq/patches-2.6.39/999-fix_pci.patch @@ -0,0 +1,18 @@ +--- a/arch/mips/pci/pci-lantiq.c ++++ b/arch/mips/pci/pci-lantiq.c +@@ -171,8 +171,13 @@ + u32 temp_buffer; + + /* set clock to 33Mhz */ +- ltq_cgu_w32(ltq_cgu_r32(LTQ_CGU_IFCCR) & ~0xf00000, LTQ_CGU_IFCCR); +- ltq_cgu_w32(ltq_cgu_r32(LTQ_CGU_IFCCR) | 0x800000, LTQ_CGU_IFCCR); ++ if (ltq_is_ar9()) { ++ ltq_cgu_w32(ltq_cgu_r32(LTQ_CGU_IFCCR) & ~0x1f00000, LTQ_CGU_IFCCR); ++ ltq_cgu_w32(ltq_cgu_r32(LTQ_CGU_IFCCR) | 0xe00000, LTQ_CGU_IFCCR); ++ } else { ++ ltq_cgu_w32(ltq_cgu_r32(LTQ_CGU_IFCCR) & ~0xf00000, LTQ_CGU_IFCCR); ++ ltq_cgu_w32(ltq_cgu_r32(LTQ_CGU_IFCCR) | 0x800000, LTQ_CGU_IFCCR); ++ } + + /* external or internal clock ? */ + if (conf->clock) { -- 2.11.0