From 68bad2954ff51cc7ebe1d0f6c05aaf32117e8e44 Mon Sep 17 00:00:00 2001 From: blogic Date: Fri, 11 Dec 2015 15:04:47 +0000 Subject: [PATCH] ar71xx: Add support for Wallys DR344 This patch is for Wallys DR344 support under OpenWRT Signed-off-by: Philippe Duchein git-svn-id: svn://svn.openwrt.org/openwrt/trunk@47847 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- .../linux/ar71xx/base-files/etc/board.d/02_network | 1 + target/linux/ar71xx/base-files/etc/diag.sh | 3 + target/linux/ar71xx/base-files/lib/ar71xx.sh | 3 + .../ar71xx/base-files/lib/upgrade/platform.sh | 1 + target/linux/ar71xx/config-4.1 | 1 + .../ar71xx/files/arch/mips/ath79/mach-dr344.c | 184 +++++++++++++++++++++ target/linux/ar71xx/generic/profiles/wallys.mk | 17 ++ target/linux/ar71xx/image/Makefile | 2 + .../patches-4.1/702-MIPS-ath79-openwrt-dr344.patch | 42 +++++ 9 files changed, 254 insertions(+) create mode 100644 target/linux/ar71xx/files/arch/mips/ath79/mach-dr344.c create mode 100644 target/linux/ar71xx/generic/profiles/wallys.mk create mode 100644 target/linux/ar71xx/patches-4.1/702-MIPS-ath79-openwrt-dr344.patch diff --git a/target/linux/ar71xx/base-files/etc/board.d/02_network b/target/linux/ar71xx/base-files/etc/board.d/02_network index ed47dcf194..3dc1ec4422 100755 --- a/target/linux/ar71xx/base-files/etc/board.d/02_network +++ b/target/linux/ar71xx/base-files/etc/board.d/02_network @@ -15,6 +15,7 @@ board=$(ar71xx_board_name) case "$board" in all0315n |\ all0258n |\ +dr344 |\ ja76pf2|\ rocket-m-ti |\ ubnt-unifi-outdoor) diff --git a/target/linux/ar71xx/base-files/etc/diag.sh b/target/linux/ar71xx/base-files/etc/diag.sh index a8e1721b7c..5b997e08df 100644 --- a/target/linux/ar71xx/base-files/etc/diag.sh +++ b/target/linux/ar71xx/base-files/etc/diag.sh @@ -95,6 +95,9 @@ get_status_led() { dlan-pro-1200-ac) status_led="devolo:status:wlan" ;; + dr344) + status_led="dr344:green:status" + ;; dragino2) status_led="dragino2:red:system" ;; diff --git a/target/linux/ar71xx/base-files/lib/ar71xx.sh b/target/linux/ar71xx/base-files/lib/ar71xx.sh index df77040bdd..a1125236cf 100755 --- a/target/linux/ar71xx/base-files/lib/ar71xx.sh +++ b/target/linux/ar71xx/base-files/lib/ar71xx.sh @@ -463,6 +463,9 @@ ar71xx_board_detect() { *"dLAN pro 1200+ WiFi ac") name="dlan-pro-1200-ac" ;; + *DR344) + name="dr344" + ;; *"Dragino v2") name="dragino2" ;; diff --git a/target/linux/ar71xx/base-files/lib/upgrade/platform.sh b/target/linux/ar71xx/base-files/lib/upgrade/platform.sh index 41886e33e8..5ec4499b73 100755 --- a/target/linux/ar71xx/base-files/lib/upgrade/platform.sh +++ b/target/linux/ar71xx/base-files/lib/upgrade/platform.sh @@ -184,6 +184,7 @@ platform_check_image() { ap96 | \ bxu2000n-2-a1 | \ db120 | \ + dr344 | \ f9k1115v2 |\ hornet-ub | \ mr12 | \ diff --git a/target/linux/ar71xx/config-4.1 b/target/linux/ar71xx/config-4.1 index eff197a14d..e21581dbb3 100644 --- a/target/linux/ar71xx/config-4.1 +++ b/target/linux/ar71xx/config-4.1 @@ -66,6 +66,7 @@ CONFIG_ATH79_MACH_DIR_825_C1=y CONFIG_ATH79_MACH_DLAN_HOTSPOT=y CONFIG_ATH79_MACH_DLAN_PRO_1200_AC=y CONFIG_ATH79_MACH_DLAN_PRO_500_WP=y +CONFIG_ATH79_MACH_DR344=y CONFIG_ATH79_MACH_GL_DOMINO=y CONFIG_ATH79_MACH_DRAGINO2=y CONFIG_ATH79_MACH_EAP300V2=y diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-dr344.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-dr344.c new file mode 100644 index 0000000000..e2155e3ec3 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-dr344.c @@ -0,0 +1,184 @@ +/* + * Wallys DR344 board support + * + * Copyright (c) 2011 Qualcomm Atheros + * Copyright (c) 2011-2012 Gabor Juhos + * Copyright (c) 2015 Philippe Duchein + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + * + */ + +#include +#include +#include +#include + +#include + +#include "common.h" +#include "pci.h" +#include "dev-ap9x-pci.h" +#include "dev-gpio-buttons.h" +#include "dev-eth.h" +#include "dev-usb.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-spi.h" +#include "dev-wmac.h" +#include "machtypes.h" + +#define DR344_GPIO_LED_SIG1 15 +#define DR344_GPIO_LED_SIG2 11 +#define DR344_GPIO_LED_SIG3 12 +#define DR344_GPIO_LED_SIG4 13 +#define DR344_GPIO_EXTERNAL_LNA0 18 +#define DR344_GPIO_EXTERNAL_LNA1 19 +#define DR344_GPIO_LED_STATUS 14 + +#define DR344_GPIO_BTN_RESET 12 + +#define DR344_KEYS_POLL_INTERVAL 20 /* msecs */ +#define DR344_KEYS_DEBOUNCE_INTERVAL (3 * DR344_KEYS_POLL_INTERVAL) + +#define DR344_MAC0_OFFSET 0 +#define DR344_MAC1_OFFSET 8 +#define DR344_WMAC_CALDATA_OFFSET 0x1000 +#define DR344_PCIE_CALDATA_OFFSET 0x5000 + +static struct gpio_led dr344_leds_gpio[] __initdata = { + { + .name = "dr344:green:status", + .gpio = DR344_GPIO_LED_STATUS, + .active_low = 1, + }, + { + .name = "dr344:red:sig1", + .gpio = DR344_GPIO_LED_SIG1, + .active_low = 1, + }, + { + .name = "dr344:yellow:sig2", + .gpio = DR344_GPIO_LED_SIG2, + .active_low = 1, + }, + { + .name = "dr344:green:sig3", + .gpio = DR344_GPIO_LED_SIG3, + .active_low = 1, + }, + { + .name = "dr344:green:sig4", + .gpio = DR344_GPIO_LED_SIG4, + .active_low = 1, + } +}; + +static struct gpio_keys_button dr344_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = DR344_KEYS_DEBOUNCE_INTERVAL, + .gpio = DR344_GPIO_BTN_RESET, + .active_low = 1, + }, +}; + +static struct ar8327_pad_cfg dr344_ar8327_pad0_cfg = { + .mode = AR8327_PAD_MAC_RGMII, + .txclk_delay_en = true, + .rxclk_delay_en = true, + .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, + .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, +}; + +static struct ar8327_led_cfg dr344_ar8327_led_cfg = { + .led_ctrl0 = 0x00000000, + .led_ctrl1 = 0xc737c737, + .led_ctrl2 = 0x00000000, + .led_ctrl3 = 0x00c30c00, + .open_drain = true, +}; + +static struct ar8327_platform_data dr344_ar8327_data = { + .pad0_cfg = &dr344_ar8327_pad0_cfg, + .port0_cfg = { + .force_link = 1, + .speed = AR8327_PORT_SPEED_1000, + .duplex = 1, + .txpause = 1, + .rxpause = 1, + }, + .led_cfg = &dr344_ar8327_led_cfg, +}; + +static struct mdio_board_info dr344_mdio0_info[] = { + { + .bus_id = "ag71xx-mdio.0", + .phy_addr = 0, + .platform_data = &dr344_ar8327_data, + }, +}; + +static void __init dr344_setup(void) +{ + u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); + + ath79_register_m25p80(NULL); + ath79_register_leds_gpio(-1, ARRAY_SIZE(dr344_leds_gpio), + dr344_leds_gpio); + ath79_register_gpio_keys_polled(-1, DR344_KEYS_POLL_INTERVAL, + ARRAY_SIZE(dr344_gpio_keys), + dr344_gpio_keys); + + ath79_register_usb(); + + ath79_wmac_set_ext_lna_gpio(0, DR344_GPIO_EXTERNAL_LNA0); + + ath79_wmac_set_ext_lna_gpio(1, DR344_GPIO_EXTERNAL_LNA1); + + ath79_register_wmac(art + DR344_WMAC_CALDATA_OFFSET, NULL); + + ath79_register_pci(); + + mdiobus_register_board_info(dr344_mdio0_info, + ARRAY_SIZE(dr344_mdio0_info)); + + ath79_register_mdio(1, 0x0); + ath79_register_mdio(0, 0x0); + + ath79_init_mac(ath79_eth0_data.mac_addr, art + DR344_MAC0_OFFSET, 0); + ath79_init_mac(ath79_eth1_data.mac_addr, art + DR344_MAC1_OFFSET, 0); + + ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | + AR934X_ETH_CFG_SW_ONLY_MODE); + + /* GMAC0 is connected to an AR8327 switch */ + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; + ath79_eth0_data.phy_mask = BIT(0); + ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; + ath79_eth0_pll_data.pll_1000 = 0x0e000000; + ath79_eth0_pll_data.pll_100 = 0x0101; + ath79_eth0_pll_data.pll_10 = 0x1313; + + /* GMAC1 is connected to the internal switch */ + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; + ath79_eth1_data.speed = SPEED_1000; + ath79_eth1_data.duplex = DUPLEX_FULL; + + ath79_register_eth(0); + ath79_register_eth(1); +} + +MIPS_MACHINE(ATH79_MACH_DR344, "DR344", "Wallys DR344", dr344_setup); diff --git a/target/linux/ar71xx/generic/profiles/wallys.mk b/target/linux/ar71xx/generic/profiles/wallys.mk new file mode 100644 index 0000000000..11be9211c4 --- /dev/null +++ b/target/linux/ar71xx/generic/profiles/wallys.mk @@ -0,0 +1,17 @@ +# +# Copyright (C) 2015 Philippe DUCHEIN +# Copyright (C) 2009 OpenWrt.org +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# + +define Profile/DR344 + NAME:=Wallys DR344 +endef + +define Profile/DR344/Description + Package set optimized for the Wallys DR344 board. +endef + +$(eval $(call Profile,DR344)) + diff --git a/target/linux/ar71xx/image/Makefile b/target/linux/ar71xx/image/Makefile index 87da05d45c..5737005a48 100644 --- a/target/linux/ar71xx/image/Makefile +++ b/target/linux/ar71xx/image/Makefile @@ -1503,6 +1503,7 @@ ubdev_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,7488k(firmware) whrhpg300n_mtdlayout=mtdparts=spi0.0:248k(u-boot)ro,8k(u-boot-env)ro,3712k(firmware),64k(art)ro wlr8100_mtdlayout=mtdparts=spi0.0:192k(u-boot)ro,64k(u-boot-env)ro,1408k(kernel),14080k(rootfs),192k(unknown)ro,64k(art)ro,384k(unknown2)ro,15488k@0x40000(firmware) wpj344_mtdlayout_16M=mtdparts=spi0.0:192k(u-boot)ro,16128k(firmware),64k(art)ro +dr344_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,6336k(rootfs),1408k(kernel),64k(nvram),64k(art)ro,7744k@0x50000(firmware) wpj531_mtdlayout_16M=mtdparts=spi0.0:192k(u-boot)ro,16128k(firmware),64k(art)ro wpj558_mtdlayout_16M=mtdparts=spi0.0:192k(u-boot)ro,16128k(firmware),64k(art)ro wndap360_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,1728k(kernel),6016k(rootfs),64k(nvram)ro,64k(art)ro,7744k@0x50000(firmware) @@ -2277,6 +2278,7 @@ $(eval $(call SingleProfile,AthLzma,64k,PB92,pb92,PB92,ttyS0,115200,$$(pb92_mtdl $(eval $(call SingleProfile,AthLzma,64k,TUBE2H16M,tube2h-16M,TUBE2H,ttyATH0,115200,$$(alfa_mtdlayout_16M),KRuImage,65536)) $(eval $(call SingleProfile,AthLzma,64k,WLR8100,wlr8100,WLR8100,ttyS0,115200,$$(wlr8100_mtdlayout),KRuImage)) $(eval $(call SingleProfile,AthLzma,64k,WPJ344_16M,wpj344-16M,WPJ344,ttyS0,115200,$$(wpj344_mtdlayout_16M),KRuImage,65536)) +$(eval $(call SingleProfile,AthLzma,64k,DR344,dr344,DR344,ttyS0,115200,$$(dr344_mtdlayout),RKuImage)) $(eval $(call SingleProfile,AthLzma,64k,WPJ531_16M,wpj531-16M,WPJ531,ttyS0,115200,$$(wpj531_mtdlayout_16M),KRuImage,65536)) $(eval $(call SingleProfile,AthLzma,64k,WPJ558_16M,wpj558-16M,WPJ558,ttyS0,115200,$$(wpj558_mtdlayout_16M),KRuImage,65536)) $(eval $(call SingleProfile,AthLzma,64k,YUN_8M,yun-8M,Yun,ttyATH0,250000,$$(yun_mtdlayout_8M),RKuImage)) diff --git a/target/linux/ar71xx/patches-4.1/702-MIPS-ath79-openwrt-dr344.patch b/target/linux/ar71xx/patches-4.1/702-MIPS-ath79-openwrt-dr344.patch new file mode 100644 index 0000000000..23cada5570 --- /dev/null +++ b/target/linux/ar71xx/patches-4.1/702-MIPS-ath79-openwrt-dr344.patch @@ -0,0 +1,42 @@ +diff -Nru a/arch/mips/ath79/Kconfig b/arch/mips/ath79/Kconfig +--- a/arch/mips/ath79/Kconfig 2015-10-27 22:09:32.705886861 +0100 ++++ b/arch/mips/ath79/Kconfig 2015-10-27 22:16:08.822566162 +0100 +@@ -512,6 +512,16 @@ + select ATH79_DEV_NFC + select ATH79_DEV_USB + ++config ATH79_MACH_DR344 ++ bool "Wallys DR344 board support" ++ select SOC_AS934X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ + config ATH79_MACH_DRAGINO2 + bool "DRAGINO V2 support" + select SOC_AR933X +diff -Nru a/arch/mips/ath79/machtypes.h b/arch/mips/ath79/machtypes.h +--- a/arch/mips/ath79/machtypes.h 2015-10-27 22:09:32.706886873 +0100 ++++ b/arch/mips/ath79/machtypes.h 2015-10-27 22:12:28.011957673 +0100 +@@ -60,6 +60,7 @@ + ATH79_MACH_DIR_835_A1, /* D-Link DIR-835 rev. A1 */ + ATH79_MACH_DLAN_PRO_500_WP, /* devolo dLAN pro 500 Wireless+ */ + ATH79_MACH_DLAN_PRO_1200_AC, /* devolo dLAN pro 1200+ WiFi ac*/ ++ ATH79_MACH_DR344, /* Wallys DR344 */ + ATH79_MACH_DRAGINO2, /* Dragino Version 2 */ + ATH79_MACH_ESR900, /* EnGenius ESR900 */ + ATH79_MACH_EW_DORIN, /* embedded wireless Dorin Platform */ +diff -Nru a/arch/mips/ath79/Makefile b/arch/mips/ath79/Makefile +--- a/arch/mips/ath79/Makefile 2015-10-27 22:09:32.706886873 +0100 ++++ b/arch/mips/ath79/Makefile 2015-10-27 22:17:18.716391867 +0100 +@@ -72,6 +72,7 @@ + obj-$(CONFIG_ATH79_MACH_DIR_615_I1) += mach-dir-615-i1.o + obj-$(CONFIG_ATH79_MACH_DIR_825_B1) += mach-dir-825-b1.o + obj-$(CONFIG_ATH79_MACH_DIR_825_C1) += mach-dir-825-c1.o ++obj-$(CONFIG_ATH79_MACH_DR344) += mach-dr344.o + obj-$(CONFIG_ATH79_MACH_DRAGINO2) += mach-dragino2.o + obj-$(CONFIG_ATH79_MACH_ESR900) += mach-esr900.o + obj-$(CONFIG_ATH79_MACH_EW_DORIN) += mach-ew-dorin.o -- 2.11.0