X-Git-Url: https://git.archive.openwrt.org/?a=blobdiff_plain;f=target%2Flinux%2Framips%2Fdts%2Fmt7621.dtsi;h=801b075e27fb32ed5844e10d789c02ec70ba6061;hb=ad46464e8443c620b83069bfcda852e2c4d2eede;hp=6d3c782430cc6bbd3ec7c03406d6066da1434294;hpb=501bc8bcbbd280e757796a2e395fe5d9dadaab49;p=openwrt.git

diff --git a/target/linux/ramips/dts/mt7621.dtsi b/target/linux/ramips/dts/mt7621.dtsi
index 6d3c782430..801b075e27 100644
--- a/target/linux/ramips/dts/mt7621.dtsi
+++ b/target/linux/ramips/dts/mt7621.dtsi
@@ -5,7 +5,11 @@
 
 	cpus {
 		cpu@0 {
-			compatible = "mips,mips24KEc";
+			compatible = "mips,mips1004Kc";
+		};
+
+		cpu@1 {
+			compatible = "mips,mips1004Kc";
 		};
 	};
 
@@ -19,7 +23,7 @@
 	palmbus@1E000000 {
 		compatible = "palmbus";
 		reg = <0x1E000000 0x100000>;
-                ranges = <0x0 0x1E000000 0x0FFFFF>;
+		ranges = <0x0 0x1E000000 0x0FFFFF>;
 
 		#address-cells = <1>;
 		#size-cells = <1>;
@@ -73,7 +77,7 @@
 			reg = <0xc00 0x100>;
 
 			interrupt-parent = <&gic>;
-			interrupts = <26>;
+			interrupts = <0 26 4>;
 
 			reg-shift = <2>;
 			reg-io-width = <4>;
@@ -90,7 +94,7 @@
 			reset-names = "spi";
 
 			#address-cells = <1>;
-			#size-cells = <1>;
+			#size-cells = <0>;
 
 			pinctrl-names = "default";
 			pinctrl-0 = <&spi_pins>;
@@ -98,40 +102,9 @@
 			m25p80@0 {
 				#address-cells = <1>;
 				#size-cells = <1>;
-				compatible = "en25q64";
 				reg = <0 0>;
-				linux,modalias = "m25p80", "en25q64";
 				spi-max-frequency = <10000000>;
-
-				m25p,chunked-io;
-
-				partition@0 {
-					label = "u-boot";
-					reg = <0x0 0x30000>;
-					read-only;
-				};
-
-				partition@30000 {
-					label = "u-boot-env";
-					reg = <0x30000 0x10000>;
-					read-only;
-				};
-
-				factory: partition@40000 {
-					label = "factory";
-					reg = <0x40000 0x10000>;
-					read-only;
-				};
-
-				partition@50000 {
-					label = "firmware";
-					reg = <0x50000 0x7a0000>;
-				};
-
-				partition@7f0000 {
-					label = "test";
-					reg = <0x7f0000 0x10000>;
-				};
+				m25p,chunked-io = <32>;
 			};
 		};
 	};
@@ -140,72 +113,85 @@
 		compatible = "ralink,rt2880-pinmux";
 		pinctrl-names = "default";
 		pinctrl-0 = <&state_default>;
+
 		state_default: pinctrl0 {
 		};
+
 		spi_pins: spi {
 			spi {
 				ralink,group = "spi";
 				ralink,function = "spi";
 			};
 		};
+
 		i2c_pins: i2c {
 			i2c {
-				lantiq,group = "i2c";
-				lantiq,function = "i2c";
+				ralink,group = "i2c";
+				ralink,function = "i2c";
 			};
 		};
+
 		uart1_pins: uart1 {
 			uart1 {
 				ralink,group = "uart1";
-				ralink,function = "uart";
+				ralink,function = "uart1";
 			};
 		};
+
 		uart2_pins: uart2 {
 			uart2 {
 				ralink,group = "uart2";
-				ralink,function = "uart";
+				ralink,function = "uart2";
 			};
 		};
+
 		uart3_pins: uart3 {
 			uart3 {
 				ralink,group = "uart3";
-				ralink,function = "uart";
+				ralink,function = "uart3";
 			};
 		};
+
 		rgmii1_pins: rgmii1 {
 			rgmii1 {
 				ralink,group = "rgmii1";
-				ralink,function = "rgmii";
+				ralink,function = "rgmii1";
 			};
 		};
+
 		rgmii2_pins: rgmii2 {
 			rgmii2 {
 				ralink,group = "rgmii2";
-				ralink,function = "rgmii";
+				ralink,function = "rgmii2";
 			};
 		};
+
 		mdio_pins: mdio {
 			mdio {
 				ralink,group = "mdio";
 				ralink,function = "mdio";
 			};
 		};
+
 		pcie_pins: pcie {
 			pcie {
 				ralink,group = "pcie";
 				ralink,function = "pcie rst";
 			};
 		};
+
 		nand_pins: nand {
 			spi-nand {
 				ralink,group = "spi";
-				ralink,function = "nand";
+				ralink,function = "nand1";
 			};
+
 			sdhci-nand {
 				ralink,group = "sdhci";
-				ralink,function = "nand";
+				ralink,function = "nand2";
 			};
 		};
+
 		sdhci_pins: sdhci {
 			sdhci {
 				ralink,group = "sdhci";
@@ -224,26 +210,27 @@
 		reg = <0x1E130000 4000>;
 
 		interrupt-parent = <&gic>;
-		interrupts = <20>;
+		interrupts = <0 20 4>;
 	};
 
 	xhci@1E1C0000 {
+		status = "okay";
+
 		compatible = "xhci-platform";
 		reg = <0x1E1C0000 4000>;
 
 		interrupt-parent = <&gic>;
-		interrupts = <22>;
+		interrupts = <0 22 4>;
 	};
 
-	gic: gic@1fbc0000 {
-		#address-cells = <0>;
-		#interrupt-cells = <1>;
+	gic: interrupt-controller@1fbc0000 {
+		compatible = "mti,gic";
+		reg = <0x1fbc0000 0x80>;
+
 		interrupt-controller;
-		compatible = "ralink,mt7621-gic";
-		reg = < 0x1fbc0000 0x80 /* gic */
-			0x1fbf0000 0x8000 /* cpc */
-			0x1fbf8000 0x8000 /* gpmc */
-		>;
+		#interrupt-cells = <3>;
+
+		mti,reserved-cpu-vectors = <7>;
 	};
 
 	nand@1e003000 {
@@ -258,14 +245,17 @@
 			label = "uboot";
 			reg = <0x00000 0x80000>; /* 64 KB */
 		};
+
 		partition@80000 {
 			label = "uboot_env";
 			reg = <0x80000 0x80000>; /* 64 KB */
 		};
+
 		partition@100000 {
 			label = "factory";
 			reg = <0x100000 0x40000>;
 		};
+
 		partition@140000 {
 			label = "rootfs";
 			reg = <0x140000 0xec0000>;
@@ -279,8 +269,11 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
+		resets = <&rstctrl 6 &rstctrl 23>;
+		reset-names = "fe", "eth";
+
 		interrupt-parent = <&gic>;
-		interrupts = <3>;
+		interrupts = <0 3 4>;
 
 		mdio-bus {
 			#address-cells = <1>;
@@ -297,6 +290,60 @@
 		compatible = "ralink,mt7620a-gsw";
 		reg = <0x1e110000 8000>;
 		interrupt-parent = <&gic>;
-		interrupts = <23>; 
+		interrupts = <0 23 4>;
+	};
+
+	pcie@1e140000 {
+		compatible = "mediatek,mt7621-pci";
+		reg = <0x1e140000 0x100
+			0x1e142000 0x100>;
+
+		#address-cells = <3>;
+		#size-cells = <2>;
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&pcie_pins>;
+
+		device_type = "pci";
+
+		bus-range = <0 255>;
+		ranges = <
+			0x02000000 0 0x00000000 0x60000000 0 0x10000000 /* pci memory */
+			0x01000000 0 0x00000000 0x1e160000 0 0x00010000 /* io space */
+		>;
+
+		interrupt-parent = <&gic>;
+		interrupts = <0 4 4
+				0 24 4
+				0 25 4>;
+
+		status = "okay";
+
+		pcie0 {
+			reg = <0x0000 0 0 0 0>;
+
+			#address-cells = <3>;
+			#size-cells = <2>;
+
+			device_type = "pci";
+		};
+
+		pcie1 {
+			reg = <0x0800 0 0 0 0>;
+
+			#address-cells = <3>;
+			#size-cells = <2>;
+
+			device_type = "pci";
+		};
+
+		pcie2 {
+			reg = <0x1000 0 0 0 0>;
+
+			#address-cells = <3>;
+			#size-cells = <2>;
+
+			device_type = "pci";
+		};
 	};
 };