X-Git-Url: https://git.archive.openwrt.org/?a=blobdiff_plain;f=target%2Flinux%2Fadm8668%2Ffiles%2Farch%2Fmips%2Finclude%2Fasm%2Fmach-adm8668%2Fadm8668.h;h=2cf65d81a639c35156a476bb3310f648e9c529cb;hb=c2ffdb04c4dbeac68495850314b01e5f53c69c53;hp=7898ccf9381394112f7a4fa2b7cb044d60ee2580;hpb=af36ffaaebbd092d418cd6dbca49c7f0d544e9dd;p=openwrt.git diff --git a/target/linux/adm8668/files/arch/mips/include/asm/mach-adm8668/adm8668.h b/target/linux/adm8668/files/arch/mips/include/asm/mach-adm8668/adm8668.h index 7898ccf938..2cf65d81a6 100644 --- a/target/linux/adm8668/files/arch/mips/include/asm/mach-adm8668/adm8668.h +++ b/target/linux/adm8668/files/arch/mips/include/asm/mach-adm8668/adm8668.h @@ -9,20 +9,7 @@ #ifndef __ADM8668_H__ #define __ADM8668_H__ -#include -#include "bsp_sup.h" - -#define MEM_KSEG0_BASE 0x80000000 -#define MEM_KSEG1_BASE 0xA0000000 -#define MEM_SEG_MASK 0xE0000000 -#define KVA2PA(_addr) ((unsigned long)(_addr) & ~MEM_SEG_MASK) - -#define MIPS_KSEG0A(_addr) (KVA2PA(_addr) | MEM_KSEG0_BASE) -#define MIPS_KSEG1A(_addr) (KVA2PA(_addr) | MEM_KSEG1_BASE) - -#define PA2VA(_addr) (KVA2PA(_addr) | MEM_KSEG1_BASE) -#define PA2CACHEVA(_addr) (KVA2PA(_addr) | MEM_KSEG0_BASE) - +#define SYS_CLOCK 175000000 /*======================= Physical Memory Map ============================*/ #define ADM8668_SDRAM_BASE 0 @@ -37,115 +24,45 @@ #define ADM8668_TMR_BASE 0x1E200000 #define ADM8668_UART0_BASE 0x1E400000 #define ADM8668_SMEM0_BASE 0x1FC00000 -#define ADM8668_NAND_BASE 0x1fffff00 +#define ADM8668_NAND_BASE 0x1FFFFF00 #define PCICFG_BASE 0x12200000 #define PCIDAT_BASE 0x12400000 -/* for PCI bridge fixup ! */ -#define PCI_BRIDGE_MASK 0x40 - -/* WLAN registers */ -#define WCSR0 0x00 -#define WCSR11A 0x5c - -#define GPIO_REG WCSR11A - -#define ADM8668_WLAN_REG(_reg) \ - (*((volatile unsigned int *)(PA2VA(ADM8668_WLAN_BASE + (_reg))))) +/** onboard uart **/ +#define ADM8668_UARTCLK_FREQ 62500000 +/* registers */ +#define UART_DR_REG 0x00 +#define UART_RSR_REG 0x04 +#define UART_CR_REG 0x14 +#define UART_FR_REG 0x18 +#define UART_IIR_REG 0x1C -/* configuration registers */ -#define ADM8668_CR0 0x00 -#define ADM8668_CR1 0x04 -#define ADM8668_CR2 0x08 -#define ADM8668_CR3 0x0C -#define ADM8668_CR8 0x20 -#define ADM8668_CR10 0x28 -#define ADM8668_CR11 0x2C -#define ADM8668_CR12 0x30 -#define ADM8668_CR13 0x34 -#define ADM8668_CR14 0x38 -#define ADM8668_CR15 0x3C -#define ADM8668_CR16 0x40 -#define ADM8668_CR17 0x44 -#define ADM8668_CR18 0x48 -#define ADM8668_CR19 0x4C -#define ADM8668_CR20 0x50 -#define ADM8668_CR21 0x54 -#define ADM8668_CR22 0x58 -#define ADM8668_CR23 0x5C -#define ADM8668_CR24 0x60 -#define ADM8668_CR25 0x64 -#define ADM8668_CR26 0x68 -#define ADM8668_CR27 0x6C -#define ADM8668_CR28 0x70 -#define ADM8668_CR29 0x74 -#define ADM8668_CR30 0x78 -#define ADM8668_CR31 0x7C -#define ADM8668_CR32 0x80 -#define ADM8668_CR33 0x84 -#define ADM8668_CR34 0x88 -#define ADM8668_CR35 0x8C -#define ADM8668_CR36 0x90 -#define ADM8668_CR37 0x94 -#define ADM8668_CR38 0x98 -#define ADM8668_CR39 0x9C -#define ADM8668_CR40 0xA0 -#define ADM8668_CR41 0xA4 -#define ADM8668_CR42 0xA8 -#define ADM8668_CR43 0xAC -#define ADM8668_CR44 0xB0 -#define ADM8668_CR45 0xB4 -#define ADM8668_CR46 0xB8 -#define ADM8668_CR47 0xBC -#define ADM8668_CR48 0xC0 -#define ADM8668_CR49 0xC4 -#define ADM8668_CR50 0xC8 -#define ADM8668_CR51 0xCC -#define ADM8668_CR52 0xD0 -#define ADM8668_CR53 0xD4 -#define ADM8668_CR54 0xD8 -#define ADM8668_CR55 0xDC -#define ADM8668_CR56 0xE0 -#define ADM8668_CR57 0xE4 -#define ADM8668_CR58 0xE8 -#define ADM8668_CR59 0xEC -#define ADM8668_CR60 0xF0 -#define ADM8668_CR61 0xF4 -#define ADM8668_CR62 0xF8 -#define ADM8668_CR63 0xFC -#define ADM8668_CR64 0x100 -#define ADM8668_CR65 0x104 -#define ADM8668_CR66 0x108 -#define ADM8668_CR67 0x10C -#define ADM8668_CR68 0x110 +/* rsr reg */ +#define UART_FRAMING_ERR 0x01 +#define UART_PARITY_ERR 0x02 +#define UART_BREAK_ERR 0x04 +#define UART_OVERRUN_ERR 0x08 +#define UART_RX_STATUS_MASK 0x0F -#define CRGPIO_REG ADM8668_CR8 +/* cr reg */ +#define UART_RX_INT_EN 0x10 +#define UART_TX_INT_EN 0x20 +#define UART_RX_TIMEOUT_INT_EN 0x40 -#define ADM8668_CONFIG_REG(_reg) \ - (*((volatile unsigned int *)(PA2VA(ADM8668_CONFIG_BASE + (_reg))))) -#define ADM8668_MPMC_REG(_reg) \ - (*((volatile unsigned int *)(PA2VA(ADM8668_MPMC_BASE + (_reg))))) +/* fr reg */ +#define UART_RX_FIFO_EMPTY 0x10 +#define UART_TX_FIFO_FULL 0x20 +/* iir reg */ +#define UART_RX_INT 0x02 +#define UART_TX_INT 0x04 +#define UART_RX_TIMEOUT_INT 0x08 -/*========================== Interrupt Controller ==========================*/ -/* registers offset */ +/* interrupt controller */ #define IRQ_STATUS_REG 0x00 /* Read */ -#define IRQ_RAW_STATUS_REG 0x04 /* Read */ #define IRQ_ENABLE_REG 0x08 /* Read/Write */ #define IRQ_DISABLE_REG 0x0C /* Write */ -#define IRQ_SOFT_REG 0x10 /* Write */ - -#define FIQ_STATUS_REG 0x100 /* Read */ -#define FIQ_RAW_STATUS_REG 0x104 -#define FIQ_ENABLE_REG 0x108 -#define FIQ_DISABLE_REG 0x10c - - -/* Macro for accessing Interrupt controller register */ -#define ADM8668_INTC_REG(_reg) \ - (*((volatile unsigned long *)(PA2VA(ADM8668_INTC_BASE + (_reg))))) - /* interrupt levels */ #define INT_LVL_SWI 1 @@ -165,146 +82,31 @@ #define INT_LVL_USB 15 #define INT_LVL_MAX INT_LVL_USB -#define IRQ_MASK 0xffff - -#define IRQ_SWI (0x1<