1 #include <linux/init.h>
7 #include <asm/bootinfo.h>
10 #include <ifxmips_irq.h>
11 #include <ifxmips_pmu.h>
12 #include <ifxmips_cgu.h>
13 #include <ifxmips_prom.h>
17 DEFINE_SPINLOCK(ebu_lock);
18 EXPORT_SYMBOL_GPL(ebu_lock);
20 static unsigned int r4k_offset;
21 static unsigned int r4k_cur;
23 static unsigned int ifxmips_ram_clocks[] = {CLOCK_167M, CLOCK_133M, CLOCK_111M, CLOCK_83M };
24 #define DDR_HZ ifxmips_ram_clocks[ifxmips_r32(IFXMIPS_CGU_SYS) & 0x3]
26 extern void __init ifxmips_soc_setup(void);
29 ifxmips_get_counter_resolution(void)
49 mips_hpt_frequency = ifxmips_get_cpu_hz() / ifxmips_get_counter_resolution();
50 r4k_cur = (read_c0_count() + r4k_offset);
51 write_c0_compare(r4k_cur);
53 ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_GPT | IFXMIPS_PMU_PWDCR_FPI);
54 ifxmips_w32(0x100, IFXMIPS_GPTU_GPT_CLC); /* set clock divider to 1 */
62 /* make sure to have no "reverse endian" for user mode! */
63 status = read_c0_status();
65 write_c0_status(status);
67 /* call the chip specific init code */
73 ifxmips_get_cpu_hz(void)
75 switch (ifxmips_r32(IFXMIPS_CGU_SYS) & 0xc)
84 EXPORT_SYMBOL(ifxmips_get_cpu_hz);
87 ifxmips_machine_setup(void)
93 arch_initcall(ifxmips_machine_setup);
96 ifxmips_generic_init(void)
100 MIPS_MACHINE(IFXMIPS_MACH_GENERIC, "Generic", "Generic Infineon board",
101 ifxmips_generic_init);
103 __setup("board=", mips_machtype_setup);