1 --- a/arch/mips/Kconfig
2 +++ b/arch/mips/Kconfig
3 @@ -1705,6 +1705,9 @@ config MIPS_MALTA_PM
7 +config SYS_HAS_DMA_OPS
11 # CPU may reorder R->R, R->W, W->R, W->W
12 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
13 --- a/arch/mips/include/asm/dma-mapping.h
14 +++ b/arch/mips/include/asm/dma-mapping.h
16 #ifndef _ASM_DMA_MAPPING_H
17 #define _ASM_DMA_MAPPING_H
19 +#include <linux/kmemcheck.h>
20 +#include <linux/bug.h>
21 +#include <linux/scatterlist.h>
22 +#include <linux/dma-debug.h>
23 +#include <linux/dma-attrs.h>
25 #include <asm/scatterlist.h>
26 #include <asm/dma-coherence.h>
27 #include <asm/cache.h>
28 +#include <asm/cpu-type.h>
29 #include <asm-generic/dma-coherent.h>
31 #ifndef CONFIG_SGI_IP27 /* Kludge to fix 2.6.39 build for IP27 */
34 extern struct dma_map_ops *mips_dma_map_ops;
36 +void __dma_sync(struct page *page, unsigned long offset, size_t size,
37 + enum dma_data_direction direction);
38 +void *mips_dma_alloc_coherent(struct device *dev, size_t size,
39 + dma_addr_t *dma_handle, gfp_t gfp,
40 + struct dma_attrs *attrs);
41 +void mips_dma_free_coherent(struct device *dev, size_t size, void *vaddr,
42 + dma_addr_t dma_handle, struct dma_attrs *attrs);
44 static inline struct dma_map_ops *get_dma_ops(struct device *dev)
46 +#ifdef CONFIG_SYS_HAS_DMA_OPS
47 if (dev && dev->archdata.dma_ops)
48 return dev->archdata.dma_ops;
50 return mips_dma_map_ops;
57 + * Warning on the terminology - Linux calls an uncached area coherent;
58 + * MIPS terminology calls memory areas with hardware maintained coherency
62 +static inline int cpu_needs_post_dma_flush(struct device *dev)
64 +#ifndef CONFIG_SYS_HAS_CPU_R10000
67 + return !plat_device_is_coherent(dev) &&
68 + (boot_cpu_type() == CPU_R10000 ||
69 + boot_cpu_type() == CPU_R12000 ||
70 + boot_cpu_type() == CPU_BMIPS5000);
73 +static inline struct page *dma_addr_to_page(struct device *dev,
74 + dma_addr_t dma_addr)
77 + plat_dma_addr_to_phys(dev, dma_addr) >> PAGE_SHIFT);
80 static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
81 @@ -30,12 +73,312 @@ static inline bool dma_capable(struct de
83 static inline void dma_mark_clean(void *addr, size_t size) {}
85 -#include <asm-generic/dma-mapping-common.h>
86 +static inline dma_addr_t dma_map_single_attrs(struct device *dev, void *ptr,
88 + enum dma_data_direction dir,
89 + struct dma_attrs *attrs)
91 + struct dma_map_ops *ops = get_dma_ops(dev);
92 + unsigned long offset = (unsigned long)ptr & ~PAGE_MASK;
93 + struct page *page = virt_to_page(ptr);
96 + kmemcheck_mark_initialized(ptr, size);
97 + BUG_ON(!valid_dma_direction(dir));
99 + addr = ops->map_page(dev, page, offset, size, dir, attrs);
101 + if (!plat_device_is_coherent(dev))
102 + __dma_sync(page, offset, size, dir);
104 + addr = plat_map_dma_mem_page(dev, page) + offset;
106 + debug_dma_map_page(dev, page, offset, size, dir, addr, true);
110 +static inline void dma_unmap_single_attrs(struct device *dev, dma_addr_t addr,
112 + enum dma_data_direction dir,
113 + struct dma_attrs *attrs)
115 + struct dma_map_ops *ops = get_dma_ops(dev);
117 + BUG_ON(!valid_dma_direction(dir));
119 + ops->unmap_page(dev, addr, size, dir, attrs);
121 + if (cpu_needs_post_dma_flush(dev))
122 + __dma_sync(dma_addr_to_page(dev, addr),
123 + addr & ~PAGE_MASK, size, dir);
125 + plat_unmap_dma_mem(dev, addr, size, dir);
127 + debug_dma_unmap_page(dev, addr, size, dir, true);
130 +static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg,
131 + int nents, enum dma_data_direction dir,
132 + struct dma_attrs *attrs)
134 + struct dma_map_ops *ops = get_dma_ops(dev);
136 + struct scatterlist *s;
138 + for_each_sg(sg, s, nents, i)
139 + kmemcheck_mark_initialized(sg_virt(s), s->length);
140 + BUG_ON(!valid_dma_direction(dir));
142 + ents = ops->map_sg(dev, sg, nents, dir, attrs);
144 + for_each_sg(sg, s, nents, i) {
145 + struct page *page = sg_page(s);
147 + if (!plat_device_is_coherent(dev))
148 + __dma_sync(page, s->offset, s->length, dir);
149 +#ifdef CONFIG_NEED_SG_DMA_LENGTH
150 + s->dma_length = s->length;
153 + plat_map_dma_mem_page(dev, page) + s->offset;
157 + debug_dma_map_sg(dev, sg, nents, ents, dir);
162 +static inline void dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sg,
163 + int nents, enum dma_data_direction dir,
164 + struct dma_attrs *attrs)
166 + struct dma_map_ops *ops = get_dma_ops(dev);
167 + struct scatterlist *s;
170 + BUG_ON(!valid_dma_direction(dir));
171 + debug_dma_unmap_sg(dev, sg, nents, dir);
173 + ops->unmap_sg(dev, sg, nents, dir, attrs);
177 + for_each_sg(sg, s, nents, i) {
178 + if (!plat_device_is_coherent(dev) && dir != DMA_TO_DEVICE)
179 + __dma_sync(sg_page(s), s->offset, s->length, dir);
180 + plat_unmap_dma_mem(dev, s->dma_address, s->length, dir);
184 +static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
185 + size_t offset, size_t size,
186 + enum dma_data_direction dir)
188 + struct dma_map_ops *ops = get_dma_ops(dev);
191 + kmemcheck_mark_initialized(page_address(page) + offset, size);
192 + BUG_ON(!valid_dma_direction(dir));
194 + addr = ops->map_page(dev, page, offset, size, dir, NULL);
196 + if (!plat_device_is_coherent(dev))
197 + __dma_sync(page, offset, size, dir);
199 + addr = plat_map_dma_mem_page(dev, page) + offset;
201 + debug_dma_map_page(dev, page, offset, size, dir, addr, false);
206 +static inline void dma_unmap_page(struct device *dev, dma_addr_t addr,
207 + size_t size, enum dma_data_direction dir)
209 + struct dma_map_ops *ops = get_dma_ops(dev);
211 + BUG_ON(!valid_dma_direction(dir));
213 + ops->unmap_page(dev, addr, size, dir, NULL);
215 + if (cpu_needs_post_dma_flush(dev))
216 + __dma_sync(dma_addr_to_page(dev, addr),
217 + addr & ~PAGE_MASK, size, dir);
219 + plat_unmap_dma_mem(dev, addr, size, dir);
221 + debug_dma_unmap_page(dev, addr, size, dir, false);
224 +static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr,
226 + enum dma_data_direction dir)
228 + struct dma_map_ops *ops = get_dma_ops(dev);
230 + BUG_ON(!valid_dma_direction(dir));
232 + ops->sync_single_for_cpu(dev, addr, size, dir);
233 + else if (cpu_needs_post_dma_flush(dev))
234 + __dma_sync(dma_addr_to_page(dev, addr),
235 + addr & ~PAGE_MASK, size, dir);
236 + debug_dma_sync_single_for_cpu(dev, addr, size, dir);
239 +static inline void dma_sync_single_for_device(struct device *dev,
240 + dma_addr_t addr, size_t size,
241 + enum dma_data_direction dir)
243 + struct dma_map_ops *ops = get_dma_ops(dev);
245 + BUG_ON(!valid_dma_direction(dir));
247 + ops->sync_single_for_device(dev, addr, size, dir);
248 + else if (!plat_device_is_coherent(dev))
249 + __dma_sync(dma_addr_to_page(dev, addr),
250 + addr & ~PAGE_MASK, size, dir);
251 + debug_dma_sync_single_for_device(dev, addr, size, dir);
254 +static inline void dma_sync_single_range_for_cpu(struct device *dev,
256 + unsigned long offset,
258 + enum dma_data_direction dir)
260 + const struct dma_map_ops *ops = get_dma_ops(dev);
262 + BUG_ON(!valid_dma_direction(dir));
264 + ops->sync_single_for_cpu(dev, addr + offset, size, dir);
265 + else if (cpu_needs_post_dma_flush(dev))
266 + __dma_sync(dma_addr_to_page(dev, addr + offset),
267 + (addr + offset) & ~PAGE_MASK, size, dir);
268 + debug_dma_sync_single_range_for_cpu(dev, addr, offset, size, dir);
271 +static inline void dma_sync_single_range_for_device(struct device *dev,
273 + unsigned long offset,
275 + enum dma_data_direction dir)
277 + const struct dma_map_ops *ops = get_dma_ops(dev);
279 + BUG_ON(!valid_dma_direction(dir));
281 + ops->sync_single_for_device(dev, addr + offset, size, dir);
282 + else if (!plat_device_is_coherent(dev))
283 + __dma_sync(dma_addr_to_page(dev, addr + offset),
284 + (addr + offset) & ~PAGE_MASK, size, dir);
285 + debug_dma_sync_single_range_for_device(dev, addr, offset, size, dir);
289 +dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
290 + int nelems, enum dma_data_direction dir)
292 + struct dma_map_ops *ops = get_dma_ops(dev);
293 + struct scatterlist *s;
296 + BUG_ON(!valid_dma_direction(dir));
298 + ops->sync_sg_for_cpu(dev, sg, nelems, dir);
299 + else if (cpu_needs_post_dma_flush(dev)) {
300 + for_each_sg(sg, s, nelems, i)
301 + __dma_sync(sg_page(s), s->offset, s->length, dir);
303 + debug_dma_sync_sg_for_cpu(dev, sg, nelems, dir);
307 +dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
308 + int nelems, enum dma_data_direction dir)
310 + struct dma_map_ops *ops = get_dma_ops(dev);
311 + struct scatterlist *s;
314 + BUG_ON(!valid_dma_direction(dir));
316 + ops->sync_sg_for_device(dev, sg, nelems, dir);
317 + else if (!plat_device_is_coherent(dev)) {
318 + for_each_sg(sg, s, nelems, i)
319 + __dma_sync(sg_page(s), s->offset, s->length, dir);
321 + debug_dma_sync_sg_for_device(dev, sg, nelems, dir);
325 +#define dma_map_single(d, a, s, r) dma_map_single_attrs(d, a, s, r, NULL)
326 +#define dma_unmap_single(d, a, s, r) dma_unmap_single_attrs(d, a, s, r, NULL)
327 +#define dma_map_sg(d, s, n, r) dma_map_sg_attrs(d, s, n, r, NULL)
328 +#define dma_unmap_sg(d, s, n, r) dma_unmap_sg_attrs(d, s, n, r, NULL)
330 +extern int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
331 + void *cpu_addr, dma_addr_t dma_addr, size_t size);
334 + * dma_mmap_attrs - map a coherent DMA allocation into user space
335 + * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
336 + * @vma: vm_area_struct describing requested user mapping
337 + * @cpu_addr: kernel CPU-view address returned from dma_alloc_attrs
338 + * @handle: device-view address returned from dma_alloc_attrs
339 + * @size: size of memory originally requested in dma_alloc_attrs
340 + * @attrs: attributes of mapping properties requested in dma_alloc_attrs
342 + * Map a coherent DMA buffer previously allocated by dma_alloc_attrs
343 + * into user space. The coherent DMA buffer must not be freed by the
344 + * driver until the user space mapping has been released.
347 +dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma, void *cpu_addr,
348 + dma_addr_t dma_addr, size_t size, struct dma_attrs *attrs)
350 + struct dma_map_ops *ops = get_dma_ops(dev);
352 + if (ops && ops->mmap)
353 + return ops->mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
354 + return dma_common_mmap(dev, vma, cpu_addr, dma_addr, size);
357 +#define dma_mmap_coherent(d, v, c, h, s) dma_mmap_attrs(d, v, c, h, s, NULL)
359 +static inline int dma_mmap_writecombine(struct device *dev, struct vm_area_struct *vma,
360 + void *cpu_addr, dma_addr_t dma_addr, size_t size)
362 + DEFINE_DMA_ATTRS(attrs);
363 + dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs);
364 + return dma_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, &attrs);
368 +dma_common_get_sgtable(struct device *dev, struct sg_table *sgt,
369 + void *cpu_addr, dma_addr_t dma_addr, size_t size);
372 +dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt, void *cpu_addr,
373 + dma_addr_t dma_addr, size_t size, struct dma_attrs *attrs)
375 + struct dma_map_ops *ops = get_dma_ops(dev);
377 + if (ops && ops->get_sgtable)
378 + return ops->get_sgtable(dev, sgt, cpu_addr, dma_addr, size,
380 + return dma_common_get_sgtable(dev, sgt, cpu_addr, dma_addr, size);
383 +#define dma_get_sgtable(d, t, v, h, s) dma_get_sgtable_attrs(d, t, v, h, s, NULL)
386 static inline int dma_supported(struct device *dev, u64 mask)
388 struct dma_map_ops *ops = get_dma_ops(dev);
389 - return ops->dma_supported(dev, mask);
391 + return ops->dma_supported(dev, mask);
392 + return plat_dma_supported(dev, mask);
395 static inline int dma_mapping_error(struct device *dev, u64 mask)
396 @@ -43,7 +386,9 @@ static inline int dma_mapping_error(stru
397 struct dma_map_ops *ops = get_dma_ops(dev);
399 debug_dma_mapping_error(dev, mask);
400 - return ops->mapping_error(dev, mask);
402 + return ops->mapping_error(dev, mask);
407 @@ -74,7 +419,11 @@ static inline void *dma_alloc_attrs(stru
409 struct dma_map_ops *ops = get_dma_ops(dev);
411 - ret = ops->alloc(dev, size, dma_handle, gfp, attrs);
413 + ret = ops->alloc(dev, size, dma_handle, gfp, attrs);
415 + ret = mips_dma_alloc_coherent(dev, size, dma_handle, gfp,
418 debug_dma_alloc_coherent(dev, size, *dma_handle, ret);
420 @@ -89,7 +438,10 @@ static inline void dma_free_attrs(struct
422 struct dma_map_ops *ops = get_dma_ops(dev);
424 - ops->free(dev, size, vaddr, dma_handle, attrs);
426 + ops->free(dev, size, vaddr, dma_handle, attrs);
428 + mips_dma_free_coherent(dev, size, vaddr, dma_handle, attrs);
430 debug_dma_free_coherent(dev, size, vaddr, dma_handle);
432 --- a/arch/mips/mm/dma-default.c
433 +++ b/arch/mips/mm/dma-default.c
436 #ifdef CONFIG_DMA_MAYBE_COHERENT
437 int coherentio = 0; /* User defined DMA coherency from command line. */
438 -EXPORT_SYMBOL_GPL(coherentio);
439 +EXPORT_SYMBOL(coherentio);
440 int hw_coherentio = 0; /* Actual hardware supported DMA coherency setting. */
442 static int __init setcoherentio(char *str)
443 @@ -46,30 +46,6 @@ static int __init setnocoherentio(char *
444 early_param("nocoherentio", setnocoherentio);
447 -static inline struct page *dma_addr_to_page(struct device *dev,
448 - dma_addr_t dma_addr)
450 - return pfn_to_page(
451 - plat_dma_addr_to_phys(dev, dma_addr) >> PAGE_SHIFT);
455 - * The affected CPUs below in 'cpu_needs_post_dma_flush()' can
456 - * speculatively fill random cachelines with stale data at any time,
457 - * requiring an extra flush post-DMA.
459 - * Warning on the terminology - Linux calls an uncached area coherent;
460 - * MIPS terminology calls memory areas with hardware maintained coherency
463 -static inline int cpu_needs_post_dma_flush(struct device *dev)
465 - return !plat_device_is_coherent(dev) &&
466 - (boot_cpu_type() == CPU_R10000 ||
467 - boot_cpu_type() == CPU_R12000 ||
468 - boot_cpu_type() == CPU_BMIPS5000);
471 static gfp_t massage_gfp_flags(const struct device *dev, gfp_t gfp)
474 @@ -125,8 +101,9 @@ void *dma_alloc_noncoherent(struct devic
476 EXPORT_SYMBOL(dma_alloc_noncoherent);
478 -static void *mips_dma_alloc_coherent(struct device *dev, size_t size,
479 - dma_addr_t * dma_handle, gfp_t gfp, struct dma_attrs *attrs)
480 +void *mips_dma_alloc_coherent(struct device *dev, size_t size,
481 + dma_addr_t *dma_handle, gfp_t gfp,
482 + struct dma_attrs *attrs)
485 struct page *page = NULL;
486 @@ -157,6 +134,7 @@ static void *mips_dma_alloc_coherent(str
490 +EXPORT_SYMBOL(mips_dma_alloc_coherent);
493 void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr,
494 @@ -167,8 +145,8 @@ void dma_free_noncoherent(struct device
496 EXPORT_SYMBOL(dma_free_noncoherent);
498 -static void mips_dma_free_coherent(struct device *dev, size_t size, void *vaddr,
499 - dma_addr_t dma_handle, struct dma_attrs *attrs)
500 +void mips_dma_free_coherent(struct device *dev, size_t size, void *vaddr,
501 + dma_addr_t dma_handle, struct dma_attrs *attrs)
503 unsigned long addr = (unsigned long) vaddr;
504 int order = get_order(size);
505 @@ -188,6 +166,7 @@ static void mips_dma_free_coherent(struc
506 if (!dma_release_from_contiguous(dev, page, count))
507 __free_pages(page, get_order(size));
509 +EXPORT_SYMBOL(mips_dma_free_coherent);
511 static inline void __dma_sync_virtual(void *addr, size_t size,
512 enum dma_data_direction direction)
513 @@ -216,8 +195,8 @@ static inline void __dma_sync_virtual(vo
514 * If highmem is not configured then the bulk of this loop gets
517 -static inline void __dma_sync(struct page *page,
518 - unsigned long offset, size_t size, enum dma_data_direction direction)
519 +void __dma_sync(struct page *page, unsigned long offset, size_t size,
520 + enum dma_data_direction direction)
524 @@ -246,108 +225,7 @@ static inline void __dma_sync(struct pag
529 -static void mips_dma_unmap_page(struct device *dev, dma_addr_t dma_addr,
530 - size_t size, enum dma_data_direction direction, struct dma_attrs *attrs)
532 - if (cpu_needs_post_dma_flush(dev))
533 - __dma_sync(dma_addr_to_page(dev, dma_addr),
534 - dma_addr & ~PAGE_MASK, size, direction);
536 - plat_unmap_dma_mem(dev, dma_addr, size, direction);
539 -static int mips_dma_map_sg(struct device *dev, struct scatterlist *sg,
540 - int nents, enum dma_data_direction direction, struct dma_attrs *attrs)
544 - for (i = 0; i < nents; i++, sg++) {
545 - if (!plat_device_is_coherent(dev))
546 - __dma_sync(sg_page(sg), sg->offset, sg->length,
548 -#ifdef CONFIG_NEED_SG_DMA_LENGTH
549 - sg->dma_length = sg->length;
551 - sg->dma_address = plat_map_dma_mem_page(dev, sg_page(sg)) +
558 -static dma_addr_t mips_dma_map_page(struct device *dev, struct page *page,
559 - unsigned long offset, size_t size, enum dma_data_direction direction,
560 - struct dma_attrs *attrs)
562 - if (!plat_device_is_coherent(dev))
563 - __dma_sync(page, offset, size, direction);
565 - return plat_map_dma_mem_page(dev, page) + offset;
568 -static void mips_dma_unmap_sg(struct device *dev, struct scatterlist *sg,
569 - int nhwentries, enum dma_data_direction direction,
570 - struct dma_attrs *attrs)
574 - for (i = 0; i < nhwentries; i++, sg++) {
575 - if (!plat_device_is_coherent(dev) &&
576 - direction != DMA_TO_DEVICE)
577 - __dma_sync(sg_page(sg), sg->offset, sg->length,
579 - plat_unmap_dma_mem(dev, sg->dma_address, sg->length, direction);
583 -static void mips_dma_sync_single_for_cpu(struct device *dev,
584 - dma_addr_t dma_handle, size_t size, enum dma_data_direction direction)
586 - if (cpu_needs_post_dma_flush(dev))
587 - __dma_sync(dma_addr_to_page(dev, dma_handle),
588 - dma_handle & ~PAGE_MASK, size, direction);
591 -static void mips_dma_sync_single_for_device(struct device *dev,
592 - dma_addr_t dma_handle, size_t size, enum dma_data_direction direction)
594 - if (!plat_device_is_coherent(dev))
595 - __dma_sync(dma_addr_to_page(dev, dma_handle),
596 - dma_handle & ~PAGE_MASK, size, direction);
599 -static void mips_dma_sync_sg_for_cpu(struct device *dev,
600 - struct scatterlist *sg, int nelems, enum dma_data_direction direction)
604 - if (cpu_needs_post_dma_flush(dev))
605 - for (i = 0; i < nelems; i++, sg++)
606 - __dma_sync(sg_page(sg), sg->offset, sg->length,
610 -static void mips_dma_sync_sg_for_device(struct device *dev,
611 - struct scatterlist *sg, int nelems, enum dma_data_direction direction)
615 - if (!plat_device_is_coherent(dev))
616 - for (i = 0; i < nelems; i++, sg++)
617 - __dma_sync(sg_page(sg), sg->offset, sg->length,
621 -int mips_dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
626 -int mips_dma_supported(struct device *dev, u64 mask)
628 - return plat_dma_supported(dev, mask);
630 +EXPORT_SYMBOL(__dma_sync);
632 void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
633 enum dma_data_direction direction)
634 @@ -360,23 +238,10 @@ void dma_cache_sync(struct device *dev,
636 EXPORT_SYMBOL(dma_cache_sync);
638 -static struct dma_map_ops mips_default_dma_map_ops = {
639 - .alloc = mips_dma_alloc_coherent,
640 - .free = mips_dma_free_coherent,
641 - .map_page = mips_dma_map_page,
642 - .unmap_page = mips_dma_unmap_page,
643 - .map_sg = mips_dma_map_sg,
644 - .unmap_sg = mips_dma_unmap_sg,
645 - .sync_single_for_cpu = mips_dma_sync_single_for_cpu,
646 - .sync_single_for_device = mips_dma_sync_single_for_device,
647 - .sync_sg_for_cpu = mips_dma_sync_sg_for_cpu,
648 - .sync_sg_for_device = mips_dma_sync_sg_for_device,
649 - .mapping_error = mips_dma_mapping_error,
650 - .dma_supported = mips_dma_supported
653 -struct dma_map_ops *mips_dma_map_ops = &mips_default_dma_map_ops;
654 +#ifdef CONFIG_SYS_HAS_DMA_OPS
655 +struct dma_map_ops *mips_dma_map_ops = NULL;
656 EXPORT_SYMBOL(mips_dma_map_ops);
659 #define PREALLOC_DMA_DEBUG_ENTRIES (1 << 16)