1 /**************************************************************************
3 * BRIEF MODULE DESCRIPTION
4 * Definitions for IDT RC32434 CPU
6 * Copyright 2004 IDT Inc. (rischelp@idt.com)
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA.
29 **************************************************************************
36 **************************************************************************
42 #include <linux/autoconf.h>
43 #include <linux/delay.h>
45 #include <asm/idt-boards/rc32434/rc32434_timer.h>
47 #define RC32434_REG_BASE 0x18000000
50 #define interrupt ((volatile INT_t ) INT0_VirtualAddress)
51 #define idt_timer ((volatile TIM_t) TIM0_VirtualAddress)
52 #define idt_gpio ((volatile GPIO_t) GPIO0_VirtualAddress)
54 #define IDT_CLOCK_MULT 2
55 #define MIPS_CPU_TIMER_IRQ 7
56 /* Interrupt Controller */
57 #define IC_GROUP0_PEND (RC32434_REG_BASE + 0x38000)
58 #define IC_GROUP0_MASK (RC32434_REG_BASE + 0x38008)
59 #define IC_GROUP_OFFSET 0x0C
60 #define RTC_BASE 0xBA001FF0
62 #define NUM_INTR_GROUPS 5
65 #define GROUP0_IRQ_BASE 8 /* GRP2 IRQ numbers start here */
66 #define GROUP1_IRQ_BASE (GROUP0_IRQ_BASE + 32) /* GRP3 IRQ numbers start here */
67 #define GROUP2_IRQ_BASE (GROUP1_IRQ_BASE + 32) /* GRP4 IRQ numbers start here */
68 #define GROUP3_IRQ_BASE (GROUP2_IRQ_BASE + 32) /* GRP5 IRQ numbers start here */
69 #define GROUP4_IRQ_BASE (GROUP3_IRQ_BASE + 32)
73 #define RC32434_UART0_BASE (RC32434_REG_BASE + 0x58003)
74 #define EB434_UART1_BASE (0x19800003)
78 #define RC32434_UART0_BASE (RC32434_REG_BASE + 0x58000)
79 #define EB434_UART1_BASE (0x19800000)
83 #define RC32434_UART0_IRQ GROUP3_IRQ_BASE + 0
84 #define EB434_UART1_IRQ GROUP4_IRQ_BASE + 11
86 #define RC32434_NR_IRQS (GROUP4_IRQ_BASE + 32)
88 /* cpu pipeline flush */
89 static inline void rc32434_sync(void)
91 __asm__ volatile ("sync");
94 static inline void rc32434_sync_udelay(int us)
96 __asm__ volatile ("sync");
100 static inline void rc32434_sync_delay(int ms)
102 __asm__ volatile ("sync");
109 * Macros to access internal RC32434 registers. No byte
110 * swapping should be done when accessing the internal
114 #define rc32434_readb __raw_readb
115 #define rc32434_readw __raw_readw
116 #define rc32434_readl __raw_readl
118 #define rc32434_writeb __raw_writeb
119 #define rc32434_writew __raw_writew
120 #define rc32434_writel __raw_writel
123 static inline u8 rc32434_readb(unsigned long pa)
125 return *((volatile u8 *)KSEG1ADDR(pa));
127 static inline u16 rc32434_readw(unsigned long pa)
129 return *((volatile u16 *)KSEG1ADDR(pa));
131 static inline u32 rc32434_readl(unsigned long pa)
133 return *((volatile u32 *)KSEG1ADDR(pa));
135 static inline void rc32434_writeb(u8 val, unsigned long pa)
137 *((volatile u8 *)KSEG1ADDR(pa)) = val;
139 static inline void rc32434_writew(u16 val, unsigned long pa)
141 *((volatile u16 *)KSEG1ADDR(pa)) = val;
143 static inline void rc32434_writel(u32 val, unsigned long pa)
145 *((volatile u32 *)KSEG1ADDR(pa)) = val;
152 * C access to CLZ and CLO instructions
153 * (count leading zeroes/ones).
155 static inline int rc32434_clz(unsigned long val)
159 ".set\tnoreorder\n\t"
171 static inline int rc32434_clo(unsigned long val)
175 ".set\tnoreorder\n\t"
187 #endif /* _RC32434_H_ */