2 * NAND flash driver for the MikroTik RouterBOARD 750
4 * Copyright (C) 2010-2012 Gabor Juhos <juhosg@openwrt.org>
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <linux/mtd/nand.h>
14 #include <linux/mtd/mtd.h>
15 #include <linux/mtd/partitions.h>
16 #include <linux/platform_device.h>
18 #include <linux/slab.h>
20 #include <asm/mach-ath79/ar71xx_regs.h>
21 #include <asm/mach-ath79/ath79.h>
22 #include <asm/mach-ath79/mach-rb750.h>
24 #define DRV_NAME "rb750-nand"
25 #define DRV_VERSION "0.1.0"
26 #define DRV_DESC "NAND flash driver for the RouterBOARD 750"
28 #define RB750_NAND_IO0 BIT(RB750_GPIO_NAND_IO0)
29 #define RB750_NAND_ALE BIT(RB750_GPIO_NAND_ALE)
30 #define RB750_NAND_CLE BIT(RB750_GPIO_NAND_CLE)
31 #define RB750_NAND_NRE BIT(RB750_GPIO_NAND_NRE)
32 #define RB750_NAND_NWE BIT(RB750_GPIO_NAND_NWE)
33 #define RB750_NAND_RDY BIT(RB750_GPIO_NAND_RDY)
35 #define RB750_NAND_DATA_SHIFT 1
36 #define RB750_NAND_DATA_BITS (0xff << RB750_NAND_DATA_SHIFT)
37 #define RB750_NAND_INPUT_BITS (RB750_NAND_DATA_BITS | RB750_NAND_RDY)
38 #define RB750_NAND_OUTPUT_BITS (RB750_NAND_ALE | RB750_NAND_CLE | \
39 RB750_NAND_NRE | RB750_NAND_NWE)
41 struct rb750_nand_info {
42 struct nand_chip chip;
44 struct rb7xx_nand_platform_data *pdata;
47 static inline struct rb750_nand_info *mtd_to_rbinfo(struct mtd_info *mtd)
49 return container_of(mtd, struct rb750_nand_info, mtd);
53 * We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader
54 * will not be able to find the kernel that we load.
56 static struct nand_ecclayout rb750_nand_ecclayout = {
58 .eccpos = { 8, 9, 10, 13, 14, 15 },
60 .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } }
63 static struct mtd_partition rb750_nand_partitions[] = {
68 .mask_flags = MTD_WRITEABLE,
71 .offset = (256 * 1024),
72 .size = (4 * 1024 * 1024) - (256 * 1024),
75 .offset = MTDPART_OFS_NXTBLK,
76 .size = MTDPART_SIZ_FULL,
80 static void rb750_nand_write(const u8 *buf, unsigned len)
82 void __iomem *base = ath79_gpio_base;
87 /* set data lines to output mode */
88 t = __raw_readl(base + AR71XX_GPIO_REG_OE);
89 __raw_writel(t | RB750_NAND_DATA_BITS, base + AR71XX_GPIO_REG_OE);
91 out = __raw_readl(base + AR71XX_GPIO_REG_OUT);
92 out &= ~(RB750_NAND_DATA_BITS | RB750_NAND_NWE);
93 for (i = 0; i != len; i++) {
97 data <<= RB750_NAND_DATA_SHIFT;
99 __raw_writel(data, base + AR71XX_GPIO_REG_OUT);
101 __raw_writel(data | RB750_NAND_NWE, base + AR71XX_GPIO_REG_OUT);
103 __raw_readl(base + AR71XX_GPIO_REG_OUT);
106 /* set data lines to input mode */
107 t = __raw_readl(base + AR71XX_GPIO_REG_OE);
108 __raw_writel(t & ~RB750_NAND_DATA_BITS, base + AR71XX_GPIO_REG_OE);
110 __raw_readl(base + AR71XX_GPIO_REG_OE);
113 static int rb750_nand_read_verify(u8 *read_buf, unsigned len,
114 const u8 *verify_buf)
116 void __iomem *base = ath79_gpio_base;
119 for (i = 0; i < len; i++) {
122 /* activate RE line */
123 __raw_writel(RB750_NAND_NRE, base + AR71XX_GPIO_REG_CLEAR);
125 __raw_readl(base + AR71XX_GPIO_REG_CLEAR);
127 /* read input lines */
128 data = __raw_readl(base + AR71XX_GPIO_REG_IN) >>
129 RB750_NAND_DATA_SHIFT;
131 /* deactivate RE line */
132 __raw_writel(RB750_NAND_NRE, base + AR71XX_GPIO_REG_SET);
136 else if (verify_buf && verify_buf[i] != data)
143 static void rb750_nand_select_chip(struct mtd_info *mtd, int chip)
145 struct rb750_nand_info *rbinfo = mtd_to_rbinfo(mtd);
146 void __iomem *base = ath79_gpio_base;
150 rbinfo->pdata->enable_pins();
152 /* set input mode for data lines */
153 t = __raw_readl(base + AR71XX_GPIO_REG_OE);
154 __raw_writel(t & ~RB750_NAND_INPUT_BITS,
155 base + AR71XX_GPIO_REG_OE);
157 /* deactivate RE and WE lines */
158 __raw_writel(RB750_NAND_NRE | RB750_NAND_NWE,
159 base + AR71XX_GPIO_REG_SET);
161 (void) __raw_readl(base + AR71XX_GPIO_REG_SET);
163 /* activate CE line */
164 __raw_writel(rbinfo->pdata->nce_line,
165 base + AR71XX_GPIO_REG_CLEAR);
167 /* deactivate CE line */
168 __raw_writel(rbinfo->pdata->nce_line,
169 base + AR71XX_GPIO_REG_SET);
171 (void) __raw_readl(base + AR71XX_GPIO_REG_SET);
173 t = __raw_readl(base + AR71XX_GPIO_REG_OE);
174 __raw_writel(t | RB750_NAND_IO0 | RB750_NAND_RDY,
175 base + AR71XX_GPIO_REG_OE);
177 rbinfo->pdata->disable_pins();
181 static int rb750_nand_dev_ready(struct mtd_info *mtd)
183 void __iomem *base = ath79_gpio_base;
185 return !!(__raw_readl(base + AR71XX_GPIO_REG_IN) & RB750_NAND_RDY);
188 static void rb750_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
191 if (ctrl & NAND_CTRL_CHANGE) {
192 void __iomem *base = ath79_gpio_base;
195 t = __raw_readl(base + AR71XX_GPIO_REG_OUT);
197 t &= ~(RB750_NAND_CLE | RB750_NAND_ALE);
198 t |= (ctrl & NAND_CLE) ? RB750_NAND_CLE : 0;
199 t |= (ctrl & NAND_ALE) ? RB750_NAND_ALE : 0;
201 __raw_writel(t, base + AR71XX_GPIO_REG_OUT);
203 __raw_readl(base + AR71XX_GPIO_REG_OUT);
206 if (cmd != NAND_CMD_NONE) {
208 rb750_nand_write(&t, 1);
212 static u8 rb750_nand_read_byte(struct mtd_info *mtd)
215 rb750_nand_read_verify(&data, 1, NULL);
219 static void rb750_nand_read_buf(struct mtd_info *mtd, u8 *buf, int len)
221 rb750_nand_read_verify(buf, len, NULL);
224 static void rb750_nand_write_buf(struct mtd_info *mtd, const u8 *buf, int len)
226 rb750_nand_write(buf, len);
229 static int rb750_nand_verify_buf(struct mtd_info *mtd, const u8 *buf, int len)
231 return rb750_nand_read_verify(NULL, len, buf);
234 static void __init rb750_nand_gpio_init(struct rb750_nand_info *info)
236 void __iomem *base = ath79_gpio_base;
240 out = __raw_readl(base + AR71XX_GPIO_REG_OUT);
242 /* setup output levels */
243 __raw_writel(RB750_NAND_NCE | RB750_NAND_NRE | RB750_NAND_NWE,
244 base + AR71XX_GPIO_REG_SET);
246 __raw_writel(RB750_NAND_ALE | RB750_NAND_CLE,
247 base + AR71XX_GPIO_REG_CLEAR);
249 /* setup input lines */
250 t = __raw_readl(base + AR71XX_GPIO_REG_OE);
251 __raw_writel(t & ~(RB750_NAND_INPUT_BITS), base + AR71XX_GPIO_REG_OE);
253 /* setup output lines */
254 t = __raw_readl(base + AR71XX_GPIO_REG_OE);
255 t |= RB750_NAND_OUTPUT_BITS;
256 t |= info->pdata->nce_line;
257 __raw_writel(t, base + AR71XX_GPIO_REG_OE);
259 info->pdata->latch_change(~out & RB750_NAND_IO0, out & RB750_NAND_IO0);
262 static int __devinit rb750_nand_probe(struct platform_device *pdev)
264 struct rb750_nand_info *info;
265 struct rb7xx_nand_platform_data *pdata;
268 printk(KERN_INFO DRV_DESC " version " DRV_VERSION "\n");
270 pdata = pdev->dev.platform_data;
274 info = kzalloc(sizeof(*info), GFP_KERNEL);
278 info->chip.priv = &info;
279 info->mtd.priv = &info->chip;
280 info->mtd.owner = THIS_MODULE;
282 info->chip.select_chip = rb750_nand_select_chip;
283 info->chip.cmd_ctrl = rb750_nand_cmd_ctrl;
284 info->chip.dev_ready = rb750_nand_dev_ready;
285 info->chip.read_byte = rb750_nand_read_byte;
286 info->chip.write_buf = rb750_nand_write_buf;
287 info->chip.read_buf = rb750_nand_read_buf;
288 info->chip.verify_buf = rb750_nand_verify_buf;
290 info->chip.chip_delay = 25;
291 info->chip.ecc.mode = NAND_ECC_SOFT;
295 platform_set_drvdata(pdev, info);
297 rb750_nand_gpio_init(info);
299 ret = nand_scan_ident(&info->mtd, 1, NULL);
305 if (info->mtd.writesize == 512)
306 info->chip.ecc.layout = &rb750_nand_ecclayout;
308 ret = nand_scan_tail(&info->mtd);
311 goto err_set_drvdata;
314 ret = mtd_device_register(&info->mtd, rb750_nand_partitions,
315 ARRAY_SIZE(rb750_nand_partitions));
317 goto err_release_nand;
322 nand_release(&info->mtd);
324 platform_set_drvdata(pdev, NULL);
330 static int __devexit rb750_nand_remove(struct platform_device *pdev)
332 struct rb750_nand_info *info = platform_get_drvdata(pdev);
334 nand_release(&info->mtd);
335 platform_set_drvdata(pdev, NULL);
341 static struct platform_driver rb750_nand_driver = {
342 .probe = rb750_nand_probe,
343 .remove = __devexit_p(rb750_nand_remove),
346 .owner = THIS_MODULE,
350 static int __init rb750_nand_init(void)
352 return platform_driver_register(&rb750_nand_driver);
355 static void __exit rb750_nand_exit(void)
357 platform_driver_unregister(&rb750_nand_driver);
360 module_init(rb750_nand_init);
361 module_exit(rb750_nand_exit);
363 MODULE_DESCRIPTION(DRV_DESC);
364 MODULE_VERSION(DRV_VERSION);
365 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
366 MODULE_LICENSE("GPL v2");