From fe656036574cef2688b57f5b7b152a49dd1daa6a Mon Sep 17 00:00:00 2001 From: nbd Date: Mon, 20 Apr 2015 15:01:00 +0000 Subject: [PATCH] ar71xx: Increase RXD/RDV to 2 on OM5P-AN It was reported that OM5P-AN needs not only a delay setting of 1 for RXD/RDV but 2. These was found when testing with a NetGear GS752TP POE switch with a cable length of 50ft and 250ft. Signed-off-by: Sven Eckelmann git-svn-id: svn://svn.openwrt.org/openwrt/trunk@45524 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- target/linux/ar71xx/files/arch/mips/ath79/mach-om5p.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-om5p.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-om5p.c index 298e80ce6c..49acd3b67f 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-om5p.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-om5p.c @@ -186,9 +186,8 @@ static void __init om5p_an_setup(void) ath79_init_mac(mac, art, 0x02); ath79_register_wmac(art + OM5P_WMAC_CALDATA_OFFSET, mac); - ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | - AR934X_ETH_CFG_RXD_DELAY | - AR934X_ETH_CFG_RDV_DELAY); + ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0); + ath79_setup_ar934x_eth_rx_delay(2, 2); ath79_register_mdio(0, 0x0); ath79_register_mdio(1, 0x0); -- 2.11.0