PKG_NAME:=mac80211
-PKG_VERSION:=2012-07-06
+PKG_VERSION:=2012-07-16
PKG_RELEASE:=1
PKG_SOURCE_URL:=http://mirror2.openwrt.org/sources
-PKG_MD5SUM:=71e1ba84a7d1c3ab69ee1b68fa9e1269
+PKG_MD5SUM:=8e41a935ad147631b78f99eda7187c1f
PKG_SOURCE:=compat-wireless-$(PKG_VERSION).tar.bz2
PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/compat-wireless-$(PKG_VERSION)
+--- a/drivers/net/wireless/ath/ath5k/mac80211-ops.c
++++ b/drivers/net/wireless/ath/ath5k/mac80211-ops.c
+@@ -622,7 +622,7 @@ ath5k_conf_tx(struct ieee80211_hw *hw, s
+ qi.tqi_aifs = params->aifs;
+ qi.tqi_cw_min = params->cw_min;
+ qi.tqi_cw_max = params->cw_max;
+- qi.tqi_burst_time = params->txop;
++ qi.tqi_burst_time = params->txop * 32;
+
+ ATH5K_DBG(ah, ATH5K_DEBUG_ANY,
+ "Configure tx [queue %d], "
+--- a/drivers/net/wireless/ath/ath9k/ar9002_hw.c
++++ b/drivers/net/wireless/ath/ath9k/ar9002_hw.c
+@@ -26,106 +26,74 @@
+ static void ar9002_hw_init_mode_regs(struct ath_hw *ah)
+ {
+ if (AR_SREV_9271(ah)) {
+- INIT_INI_ARRAY(&ah->iniModes, ar9271Modes_9271,
+- ARRAY_SIZE(ar9271Modes_9271), 5);
+- INIT_INI_ARRAY(&ah->iniCommon, ar9271Common_9271,
+- ARRAY_SIZE(ar9271Common_9271), 2);
+- INIT_INI_ARRAY(&ah->iniModes_9271_ANI_reg, ar9271Modes_9271_ANI_reg,
+- ARRAY_SIZE(ar9271Modes_9271_ANI_reg), 5);
++ INIT_INI_ARRAY(&ah->iniModes, ar9271Modes_9271);
++ INIT_INI_ARRAY(&ah->iniCommon, ar9271Common_9271);
++ INIT_INI_ARRAY(&ah->iniModes_9271_ANI_reg, ar9271Modes_9271_ANI_reg);
+ return;
+ }
+
+ if (ah->config.pcie_clock_req)
+ INIT_INI_ARRAY(&ah->iniPcieSerdes,
+- ar9280PciePhy_clkreq_off_L1_9280,
+- ARRAY_SIZE(ar9280PciePhy_clkreq_off_L1_9280), 2);
++ ar9280PciePhy_clkreq_off_L1_9280);
+ else
+ INIT_INI_ARRAY(&ah->iniPcieSerdes,
+- ar9280PciePhy_clkreq_always_on_L1_9280,
+- ARRAY_SIZE(ar9280PciePhy_clkreq_always_on_L1_9280), 2);
++ ar9280PciePhy_clkreq_always_on_L1_9280);
+ #ifdef CONFIG_PM_SLEEP
+ INIT_INI_ARRAY(&ah->iniPcieSerdesWow,
+- ar9280PciePhy_awow,
+- ARRAY_SIZE(ar9280PciePhy_awow), 2);
++ ar9280PciePhy_awow);
+ #endif
+
+ if (AR_SREV_9287_11_OR_LATER(ah)) {
+- INIT_INI_ARRAY(&ah->iniModes, ar9287Modes_9287_1_1,
+- ARRAY_SIZE(ar9287Modes_9287_1_1), 5);
+- INIT_INI_ARRAY(&ah->iniCommon, ar9287Common_9287_1_1,
+- ARRAY_SIZE(ar9287Common_9287_1_1), 2);
++ INIT_INI_ARRAY(&ah->iniModes, ar9287Modes_9287_1_1);
++ INIT_INI_ARRAY(&ah->iniCommon, ar9287Common_9287_1_1);
+ } else if (AR_SREV_9285_12_OR_LATER(ah)) {
+- INIT_INI_ARRAY(&ah->iniModes, ar9285Modes_9285_1_2,
+- ARRAY_SIZE(ar9285Modes_9285_1_2), 5);
+- INIT_INI_ARRAY(&ah->iniCommon, ar9285Common_9285_1_2,
+- ARRAY_SIZE(ar9285Common_9285_1_2), 2);
++ INIT_INI_ARRAY(&ah->iniModes, ar9285Modes_9285_1_2);
++ INIT_INI_ARRAY(&ah->iniCommon, ar9285Common_9285_1_2);
+ } else if (AR_SREV_9280_20_OR_LATER(ah)) {
+- INIT_INI_ARRAY(&ah->iniModes, ar9280Modes_9280_2,
+- ARRAY_SIZE(ar9280Modes_9280_2), 5);
+- INIT_INI_ARRAY(&ah->iniCommon, ar9280Common_9280_2,
+- ARRAY_SIZE(ar9280Common_9280_2), 2);
++ INIT_INI_ARRAY(&ah->iniModes, ar9280Modes_9280_2);
++ INIT_INI_ARRAY(&ah->iniCommon, ar9280Common_9280_2);
+
+ INIT_INI_ARRAY(&ah->iniModesFastClock,
+- ar9280Modes_fast_clock_9280_2,
+- ARRAY_SIZE(ar9280Modes_fast_clock_9280_2), 3);
++ ar9280Modes_fast_clock_9280_2);
+ } else if (AR_SREV_9160_10_OR_LATER(ah)) {
+- INIT_INI_ARRAY(&ah->iniModes, ar5416Modes_9160,
+- ARRAY_SIZE(ar5416Modes_9160), 5);
+- INIT_INI_ARRAY(&ah->iniCommon, ar5416Common_9160,
+- ARRAY_SIZE(ar5416Common_9160), 2);
++ INIT_INI_ARRAY(&ah->iniModes, ar5416Modes_9160);
++ INIT_INI_ARRAY(&ah->iniCommon, ar5416Common_9160);
+ if (AR_SREV_9160_11(ah)) {
+ INIT_INI_ARRAY(&ah->iniAddac,
+- ar5416Addac_9160_1_1,
+- ARRAY_SIZE(ar5416Addac_9160_1_1), 2);
++ ar5416Addac_9160_1_1);
+ } else {
+- INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac_9160,
+- ARRAY_SIZE(ar5416Addac_9160), 2);
++ INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac_9160);
+ }
+ } else if (AR_SREV_9100_OR_LATER(ah)) {
+- INIT_INI_ARRAY(&ah->iniModes, ar5416Modes_9100,
+- ARRAY_SIZE(ar5416Modes_9100), 5);
+- INIT_INI_ARRAY(&ah->iniCommon, ar5416Common_9100,
+- ARRAY_SIZE(ar5416Common_9100), 2);
+- INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6_9100,
+- ARRAY_SIZE(ar5416Bank6_9100), 3);
+- INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac_9100,
+- ARRAY_SIZE(ar5416Addac_9100), 2);
++ INIT_INI_ARRAY(&ah->iniModes, ar5416Modes_9100);
++ INIT_INI_ARRAY(&ah->iniCommon, ar5416Common_9100);
++ INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6_9100);
++ INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac_9100);
+ } else {
+- INIT_INI_ARRAY(&ah->iniModes, ar5416Modes,
+- ARRAY_SIZE(ar5416Modes), 5);
+- INIT_INI_ARRAY(&ah->iniCommon, ar5416Common,
+- ARRAY_SIZE(ar5416Common), 2);
+- INIT_INI_ARRAY(&ah->iniBank6TPC, ar5416Bank6TPC,
+- ARRAY_SIZE(ar5416Bank6TPC), 3);
+- INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac,
+- ARRAY_SIZE(ar5416Addac), 2);
++ INIT_INI_ARRAY(&ah->iniModes, ar5416Modes);
++ INIT_INI_ARRAY(&ah->iniCommon, ar5416Common);
++ INIT_INI_ARRAY(&ah->iniBank6TPC, ar5416Bank6TPC);
++ INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac);
+ }
+
+ if (!AR_SREV_9280_20_OR_LATER(ah)) {
+ /* Common for AR5416, AR913x, AR9160 */
+- INIT_INI_ARRAY(&ah->iniBB_RfGain, ar5416BB_RfGain,
+- ARRAY_SIZE(ar5416BB_RfGain), 3);
++ INIT_INI_ARRAY(&ah->iniBB_RfGain, ar5416BB_RfGain);
+
+- INIT_INI_ARRAY(&ah->iniBank0, ar5416Bank0,
+- ARRAY_SIZE(ar5416Bank0), 2);
+- INIT_INI_ARRAY(&ah->iniBank1, ar5416Bank1,
+- ARRAY_SIZE(ar5416Bank1), 2);
+- INIT_INI_ARRAY(&ah->iniBank2, ar5416Bank2,
+- ARRAY_SIZE(ar5416Bank2), 2);
+- INIT_INI_ARRAY(&ah->iniBank3, ar5416Bank3,
+- ARRAY_SIZE(ar5416Bank3), 3);
+- INIT_INI_ARRAY(&ah->iniBank7, ar5416Bank7,
+- ARRAY_SIZE(ar5416Bank7), 2);
++ INIT_INI_ARRAY(&ah->iniBank0, ar5416Bank0);
++ INIT_INI_ARRAY(&ah->iniBank1, ar5416Bank1);
++ INIT_INI_ARRAY(&ah->iniBank2, ar5416Bank2);
++ INIT_INI_ARRAY(&ah->iniBank3, ar5416Bank3);
++ INIT_INI_ARRAY(&ah->iniBank7, ar5416Bank7);
+
+ /* Common for AR5416, AR9160 */
+ if (!AR_SREV_9100(ah))
+- INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6,
+- ARRAY_SIZE(ar5416Bank6), 3);
++ INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6);
+
+ /* Common for AR913x, AR9160 */
+ if (!AR_SREV_5416(ah))
+- INIT_INI_ARRAY(&ah->iniBank6TPC, ar5416Bank6TPC_9100,
+- ARRAY_SIZE(ar5416Bank6TPC_9100), 3);
++ INIT_INI_ARRAY(&ah->iniBank6TPC,
++ ar5416Bank6TPC_9100);
+ }
+
+ /* iniAddac needs to be modified for these chips */
+@@ -148,13 +116,9 @@ static void ar9002_hw_init_mode_regs(str
+ }
+ if (AR_SREV_9287_11_OR_LATER(ah)) {
+ INIT_INI_ARRAY(&ah->iniCckfirNormal,
+- ar9287Common_normal_cck_fir_coeff_9287_1_1,
+- ARRAY_SIZE(ar9287Common_normal_cck_fir_coeff_9287_1_1),
+- 2);
++ ar9287Common_normal_cck_fir_coeff_9287_1_1);
+ INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
+- ar9287Common_japan_2484_cck_fir_coeff_9287_1_1,
+- ARRAY_SIZE(ar9287Common_japan_2484_cck_fir_coeff_9287_1_1),
+- 2);
++ ar9287Common_japan_2484_cck_fir_coeff_9287_1_1);
+ }
+ }
+
+@@ -168,20 +132,16 @@ static void ar9280_20_hw_init_rxgain_ini
+
+ if (rxgain_type == AR5416_EEP_RXGAIN_13DB_BACKOFF)
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9280Modes_backoff_13db_rxgain_9280_2,
+- ARRAY_SIZE(ar9280Modes_backoff_13db_rxgain_9280_2), 5);
++ ar9280Modes_backoff_13db_rxgain_9280_2);
+ else if (rxgain_type == AR5416_EEP_RXGAIN_23DB_BACKOFF)
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9280Modes_backoff_23db_rxgain_9280_2,
+- ARRAY_SIZE(ar9280Modes_backoff_23db_rxgain_9280_2), 5);
++ ar9280Modes_backoff_23db_rxgain_9280_2);
+ else
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9280Modes_original_rxgain_9280_2,
+- ARRAY_SIZE(ar9280Modes_original_rxgain_9280_2), 5);
++ ar9280Modes_original_rxgain_9280_2);
+ } else {
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9280Modes_original_rxgain_9280_2,
+- ARRAY_SIZE(ar9280Modes_original_rxgain_9280_2), 5);
++ ar9280Modes_original_rxgain_9280_2);
+ }
+ }
+
+@@ -191,16 +151,13 @@ static void ar9280_20_hw_init_txgain_ini
+ AR5416_EEP_MINOR_VER_19) {
+ if (txgain_type == AR5416_EEP_TXGAIN_HIGH_POWER)
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9280Modes_high_power_tx_gain_9280_2,
+- ARRAY_SIZE(ar9280Modes_high_power_tx_gain_9280_2), 5);
++ ar9280Modes_high_power_tx_gain_9280_2);
+ else
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9280Modes_original_tx_gain_9280_2,
+- ARRAY_SIZE(ar9280Modes_original_tx_gain_9280_2), 5);
++ ar9280Modes_original_tx_gain_9280_2);
+ } else {
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9280Modes_original_tx_gain_9280_2,
+- ARRAY_SIZE(ar9280Modes_original_tx_gain_9280_2), 5);
++ ar9280Modes_original_tx_gain_9280_2);
+ }
+ }
+
+@@ -208,12 +165,10 @@ static void ar9271_hw_init_txgain_ini(st
+ {
+ if (txgain_type == AR5416_EEP_TXGAIN_HIGH_POWER)
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9271Modes_high_power_tx_gain_9271,
+- ARRAY_SIZE(ar9271Modes_high_power_tx_gain_9271), 5);
++ ar9271Modes_high_power_tx_gain_9271);
+ else
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9271Modes_normal_power_tx_gain_9271,
+- ARRAY_SIZE(ar9271Modes_normal_power_tx_gain_9271), 5);
++ ar9271Modes_normal_power_tx_gain_9271);
+ }
+
+ static void ar9002_hw_init_mode_gain_regs(struct ath_hw *ah)
+@@ -222,8 +177,7 @@ static void ar9002_hw_init_mode_gain_reg
+
+ if (AR_SREV_9287_11_OR_LATER(ah))
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9287Modes_rx_gain_9287_1_1,
+- ARRAY_SIZE(ar9287Modes_rx_gain_9287_1_1), 5);
++ ar9287Modes_rx_gain_9287_1_1);
+ else if (AR_SREV_9280_20(ah))
+ ar9280_20_hw_init_rxgain_ini(ah);
+
+@@ -231,8 +185,7 @@ static void ar9002_hw_init_mode_gain_reg
+ ar9271_hw_init_txgain_ini(ah, txgain_type);
+ } else if (AR_SREV_9287_11_OR_LATER(ah)) {
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9287Modes_tx_gain_9287_1_1,
+- ARRAY_SIZE(ar9287Modes_tx_gain_9287_1_1), 5);
++ ar9287Modes_tx_gain_9287_1_1);
+ } else if (AR_SREV_9280_20(ah)) {
+ ar9280_20_hw_init_txgain_ini(ah, txgain_type);
+ } else if (AR_SREV_9285_12_OR_LATER(ah)) {
+@@ -240,26 +193,18 @@ static void ar9002_hw_init_mode_gain_reg
+ if (txgain_type == AR5416_EEP_TXGAIN_HIGH_POWER) {
+ if (AR_SREV_9285E_20(ah)) {
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9285Modes_XE2_0_high_power,
+- ARRAY_SIZE(
+- ar9285Modes_XE2_0_high_power), 5);
++ ar9285Modes_XE2_0_high_power);
+ } else {
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9285Modes_high_power_tx_gain_9285_1_2,
+- ARRAY_SIZE(
+- ar9285Modes_high_power_tx_gain_9285_1_2), 5);
++ ar9285Modes_high_power_tx_gain_9285_1_2);
+ }
+ } else {
+ if (AR_SREV_9285E_20(ah)) {
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9285Modes_XE2_0_normal_power,
+- ARRAY_SIZE(
+- ar9285Modes_XE2_0_normal_power), 5);
++ ar9285Modes_XE2_0_normal_power);
+ } else {
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9285Modes_original_tx_gain_9285_1_2,
+- ARRAY_SIZE(
+- ar9285Modes_original_tx_gain_9285_1_2), 5);
++ ar9285Modes_original_tx_gain_9285_1_2);
+ }
+ }
+ }
+--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
++++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
+@@ -131,8 +131,9 @@ static const struct ar9300_eeprom ar9300
+ .thresh62 = 28,
+ .papdRateMaskHt20 = LE32(0x0cf0e0e0),
+ .papdRateMaskHt40 = LE32(0x6cf0e0e0),
++ .xlna_bias_strength = 0,
+ .futureModal = {
+- 0, 0, 0, 0, 0, 0, 0, 0,
++ 0, 0, 0, 0, 0, 0, 0,
+ },
+ },
+ .base_ext1 = {
+@@ -331,8 +332,9 @@ static const struct ar9300_eeprom ar9300
+ .thresh62 = 28,
+ .papdRateMaskHt20 = LE32(0x0c80c080),
+ .papdRateMaskHt40 = LE32(0x0080c080),
++ .xlna_bias_strength = 0,
+ .futureModal = {
+- 0, 0, 0, 0, 0, 0, 0, 0,
++ 0, 0, 0, 0, 0, 0, 0,
+ },
+ },
+ .base_ext2 = {
+@@ -704,8 +706,9 @@ static const struct ar9300_eeprom ar9300
+ .thresh62 = 28,
+ .papdRateMaskHt20 = LE32(0x0c80c080),
+ .papdRateMaskHt40 = LE32(0x0080c080),
++ .xlna_bias_strength = 0,
+ .futureModal = {
+- 0, 0, 0, 0, 0, 0, 0, 0,
++ 0, 0, 0, 0, 0, 0, 0,
+ },
+ },
+ .base_ext1 = {
+@@ -904,8 +907,9 @@ static const struct ar9300_eeprom ar9300
+ .thresh62 = 28,
+ .papdRateMaskHt20 = LE32(0x0cf0e0e0),
+ .papdRateMaskHt40 = LE32(0x6cf0e0e0),
++ .xlna_bias_strength = 0,
+ .futureModal = {
+- 0, 0, 0, 0, 0, 0, 0, 0,
++ 0, 0, 0, 0, 0, 0, 0,
+ },
+ },
+ .base_ext2 = {
+@@ -1278,8 +1282,9 @@ static const struct ar9300_eeprom ar9300
+ .thresh62 = 28,
+ .papdRateMaskHt20 = LE32(0x0c80c080),
+ .papdRateMaskHt40 = LE32(0x0080c080),
++ .xlna_bias_strength = 0,
+ .futureModal = {
+- 0, 0, 0, 0, 0, 0, 0, 0,
++ 0, 0, 0, 0, 0, 0, 0,
+ },
+ },
+ .base_ext1 = {
+@@ -1478,8 +1483,9 @@ static const struct ar9300_eeprom ar9300
+ .thresh62 = 28,
+ .papdRateMaskHt20 = LE32(0x0cf0e0e0),
+ .papdRateMaskHt40 = LE32(0x6cf0e0e0),
++ .xlna_bias_strength = 0,
+ .futureModal = {
+- 0, 0, 0, 0, 0, 0, 0, 0,
++ 0, 0, 0, 0, 0, 0, 0,
+ },
+ },
+ .base_ext2 = {
+@@ -1852,8 +1858,9 @@ static const struct ar9300_eeprom ar9300
+ .thresh62 = 28,
+ .papdRateMaskHt20 = LE32(0x0c80c080),
+ .papdRateMaskHt40 = LE32(0x0080c080),
++ .xlna_bias_strength = 0,
+ .futureModal = {
+- 0, 0, 0, 0, 0, 0, 0, 0,
++ 0, 0, 0, 0, 0, 0, 0,
+ },
+ },
+ .base_ext1 = {
+@@ -2052,8 +2059,9 @@ static const struct ar9300_eeprom ar9300
+ .thresh62 = 28,
+ .papdRateMaskHt20 = LE32(0x0cf0e0e0),
+ .papdRateMaskHt40 = LE32(0x6cf0e0e0),
++ .xlna_bias_strength = 0,
+ .futureModal = {
+- 0, 0, 0, 0, 0, 0, 0, 0,
++ 0, 0, 0, 0, 0, 0, 0,
+ },
+ },
+ .base_ext2 = {
+@@ -2425,8 +2433,9 @@ static const struct ar9300_eeprom ar9300
+ .thresh62 = 28,
+ .papdRateMaskHt20 = LE32(0x0c80C080),
+ .papdRateMaskHt40 = LE32(0x0080C080),
++ .xlna_bias_strength = 0,
+ .futureModal = {
+- 0, 0, 0, 0, 0, 0, 0, 0,
++ 0, 0, 0, 0, 0, 0, 0,
+ },
+ },
+ .base_ext1 = {
+@@ -2625,8 +2634,9 @@ static const struct ar9300_eeprom ar9300
+ .thresh62 = 28,
+ .papdRateMaskHt20 = LE32(0x0cf0e0e0),
+ .papdRateMaskHt40 = LE32(0x6cf0e0e0),
++ .xlna_bias_strength = 0,
+ .futureModal = {
+- 0, 0, 0, 0, 0, 0, 0, 0,
++ 0, 0, 0, 0, 0, 0, 0,
+ },
+ },
+ .base_ext2 = {
+@@ -2971,14 +2981,6 @@ static u32 ath9k_hw_ar9300_get_eeprom(st
+ return (pBase->txrxMask >> 4) & 0xf;
+ case EEP_RX_MASK:
+ return pBase->txrxMask & 0xf;
+- case EEP_DRIVE_STRENGTH:
+-#define AR9300_EEP_BASE_DRIV_STRENGTH 0x1
+- return pBase->miscConfiguration & AR9300_EEP_BASE_DRIV_STRENGTH;
+- case EEP_INTERNAL_REGULATOR:
+- /* Bit 4 is internal regulator flag */
+- return (pBase->featureEnable & 0x10) >> 4;
+- case EEP_SWREG:
+- return le32_to_cpu(pBase->swreg);
+ case EEP_PAPRD:
+ return !!(pBase->featureEnable & BIT(5));
+ case EEP_CHAIN_MASK_REDUCE:
+@@ -2989,8 +2991,6 @@ static u32 ath9k_hw_ar9300_get_eeprom(st
+ return eep->modalHeader5G.antennaGain;
+ case EEP_ANTENNA_GAIN_2G:
+ return eep->modalHeader2G.antennaGain;
+- case EEP_QUICK_DROP:
+- return pBase->miscConfiguration & BIT(1);
+ default:
+ return 0;
+ }
+@@ -3260,10 +3260,20 @@ static int ar9300_eeprom_restore_interna
+ int it;
+ u16 checksum, mchecksum;
+ struct ath_common *common = ath9k_hw_common(ah);
++ struct ar9300_eeprom *eep;
+ eeprom_read_op read;
+
+- if (ath9k_hw_use_flash(ah))
+- return ar9300_eeprom_restore_flash(ah, mptr, mdata_size);
++ if (ath9k_hw_use_flash(ah)) {
++ u8 txrx;
++
++ ar9300_eeprom_restore_flash(ah, mptr, mdata_size);
++
++ /* check if eeprom contains valid data */
++ eep = (struct ar9300_eeprom *) mptr;
++ txrx = eep->baseEepHeader.txrxMask;
++ if (txrx != 0 && txrx != 0xff)
++ return 0;
++ }
+
+ word = kzalloc(2048, GFP_KERNEL);
+ if (!word)
+@@ -3493,19 +3503,20 @@ static int ath9k_hw_ar9300_get_eeprom_re
+ return 0;
+ }
+
+-static s32 ar9003_hw_xpa_bias_level_get(struct ath_hw *ah, bool is2ghz)
++static struct ar9300_modal_eep_header *ar9003_modal_header(struct ath_hw *ah,
++ bool is2ghz)
+ {
+ struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
+
+ if (is2ghz)
+- return eep->modalHeader2G.xpaBiasLvl;
++ return &eep->modalHeader2G;
+ else
+- return eep->modalHeader5G.xpaBiasLvl;
++ return &eep->modalHeader5G;
+ }
+
+ static void ar9003_hw_xpa_bias_level_apply(struct ath_hw *ah, bool is2ghz)
+ {
+- int bias = ar9003_hw_xpa_bias_level_get(ah, is2ghz);
++ int bias = ar9003_modal_header(ah, is2ghz)->xpaBiasLvl;
+
+ if (AR_SREV_9485(ah) || AR_SREV_9330(ah) || AR_SREV_9340(ah))
+ REG_RMW_FIELD(ah, AR_CH0_TOP2, AR_CH0_TOP2_XPABIASLVL, bias);
+@@ -3521,57 +3532,26 @@ static void ar9003_hw_xpa_bias_level_app
+ }
+ }
+
+-static u16 ar9003_switch_com_spdt_get(struct ath_hw *ah, bool is_2ghz)
++static u16 ar9003_switch_com_spdt_get(struct ath_hw *ah, bool is2ghz)
+ {
+- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
+- __le16 val;
+-
+- if (is_2ghz)
+- val = eep->modalHeader2G.switchcomspdt;
+- else
+- val = eep->modalHeader5G.switchcomspdt;
+- return le16_to_cpu(val);
++ return le16_to_cpu(ar9003_modal_header(ah, is2ghz)->switchcomspdt);
+ }
+
+
+ static u32 ar9003_hw_ant_ctrl_common_get(struct ath_hw *ah, bool is2ghz)
+ {
+- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
+- __le32 val;
+-
+- if (is2ghz)
+- val = eep->modalHeader2G.antCtrlCommon;
+- else
+- val = eep->modalHeader5G.antCtrlCommon;
+- return le32_to_cpu(val);
++ return le32_to_cpu(ar9003_modal_header(ah, is2ghz)->antCtrlCommon);
+ }
+
+ static u32 ar9003_hw_ant_ctrl_common_2_get(struct ath_hw *ah, bool is2ghz)
+ {
+- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
+- __le32 val;
+-
+- if (is2ghz)
+- val = eep->modalHeader2G.antCtrlCommon2;
+- else
+- val = eep->modalHeader5G.antCtrlCommon2;
+- return le32_to_cpu(val);
++ return le32_to_cpu(ar9003_modal_header(ah, is2ghz)->antCtrlCommon2);
+ }
+
+-static u16 ar9003_hw_ant_ctrl_chain_get(struct ath_hw *ah,
+- int chain,
++static u16 ar9003_hw_ant_ctrl_chain_get(struct ath_hw *ah, int chain,
+ bool is2ghz)
+ {
+- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
+- __le16 val = 0;
+-
+- if (chain >= 0 && chain < AR9300_MAX_CHAINS) {
+- if (is2ghz)
+- val = eep->modalHeader2G.antCtrlChain[chain];
+- else
+- val = eep->modalHeader5G.antCtrlChain[chain];
+- }
+-
++ __le16 val = ar9003_modal_header(ah, is2ghz)->antCtrlChain[chain];
+ return le16_to_cpu(val);
+ }
+
+@@ -3681,11 +3661,12 @@ static void ar9003_hw_ant_ctrl_apply(str
+
+ static void ar9003_hw_drive_strength_apply(struct ath_hw *ah)
+ {
++ struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
++ struct ar9300_base_eep_hdr *pBase = &eep->baseEepHeader;
+ int drive_strength;
+ unsigned long reg;
+
+- drive_strength = ath9k_hw_ar9300_get_eeprom(ah, EEP_DRIVE_STRENGTH);
+-
++ drive_strength = pBase->miscConfiguration & BIT(0);
+ if (!drive_strength)
+ return;
+
+@@ -3815,11 +3796,11 @@ static bool is_pmu_set(struct ath_hw *ah
+
+ void ar9003_hw_internal_regulator_apply(struct ath_hw *ah)
+ {
+- int internal_regulator =
+- ath9k_hw_ar9300_get_eeprom(ah, EEP_INTERNAL_REGULATOR);
++ struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
++ struct ar9300_base_eep_hdr *pBase = &eep->baseEepHeader;
+ u32 reg_val;
+
+- if (internal_regulator) {
++ if (pBase->featureEnable & BIT(4)) {
+ if (AR_SREV_9330(ah) || AR_SREV_9485(ah)) {
+ int reg_pmu_set;
+
+@@ -3863,11 +3844,11 @@ void ar9003_hw_internal_regulator_apply(
+ if (!is_pmu_set(ah, AR_PHY_PMU2, reg_pmu_set))
+ return;
+ } else if (AR_SREV_9462(ah)) {
+- reg_val = ath9k_hw_ar9300_get_eeprom(ah, EEP_SWREG);
++ reg_val = le32_to_cpu(pBase->swreg);
+ REG_WRITE(ah, AR_PHY_PMU1, reg_val);
+ } else {
+ /* Internal regulator is ON. Write swreg register. */
+- reg_val = ath9k_hw_ar9300_get_eeprom(ah, EEP_SWREG);
++ reg_val = le32_to_cpu(pBase->swreg);
+ REG_WRITE(ah, AR_RTC_REG_CONTROL1,
+ REG_READ(ah, AR_RTC_REG_CONTROL1) &
+ (~AR_RTC_REG_CONTROL1_SWREG_PROGRAM));
+@@ -3909,6 +3890,9 @@ static void ar9003_hw_apply_tuning_caps(
+ struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
+ u8 tuning_caps_param = eep->baseEepHeader.params_for_tuning_caps[0];
+
++ if (AR_SREV_9485(ah) || AR_SREV_9330(ah) || AR_SREV_9340(ah))
++ return;
++
+ if (eep->baseEepHeader.featureEnable & 0x40) {
+ tuning_caps_param &= 0x7f;
+ REG_RMW_FIELD(ah, AR_CH0_XTAL, AR_CH0_XTAL_CAPINDAC,
+@@ -3921,10 +3905,11 @@ static void ar9003_hw_apply_tuning_caps(
+ static void ar9003_hw_quick_drop_apply(struct ath_hw *ah, u16 freq)
+ {
+ struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
+- int quick_drop = ath9k_hw_ar9300_get_eeprom(ah, EEP_QUICK_DROP);
++ struct ar9300_base_eep_hdr *pBase = &eep->baseEepHeader;
++ int quick_drop;
+ s32 t[3], f[3] = {5180, 5500, 5785};
+
+- if (!quick_drop)
++ if (!(pBase->miscConfiguration & BIT(1)))
+ return;
+
+ if (freq < 4000)
+@@ -3938,13 +3923,11 @@ static void ar9003_hw_quick_drop_apply(s
+ REG_RMW_FIELD(ah, AR_PHY_AGC, AR_PHY_AGC_QUICK_DROP, quick_drop);
+ }
+
+-static void ar9003_hw_txend_to_xpa_off_apply(struct ath_hw *ah, u16 freq)
++static void ar9003_hw_txend_to_xpa_off_apply(struct ath_hw *ah, bool is2ghz)
+ {
+- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
+ u32 value;
+
+- value = (freq < 4000) ? eep->modalHeader2G.txEndToXpaOff :
+- eep->modalHeader5G.txEndToXpaOff;
++ value = ar9003_modal_header(ah, is2ghz)->txEndToXpaOff;
+
+ REG_RMW_FIELD(ah, AR_PHY_XPA_TIMING_CTL,
+ AR_PHY_XPA_TIMING_CTL_TX_END_XPAB_OFF, value);
+@@ -3952,19 +3935,63 @@ static void ar9003_hw_txend_to_xpa_off_a
+ AR_PHY_XPA_TIMING_CTL_TX_END_XPAA_OFF, value);
+ }
+
++static void ar9003_hw_xpa_timing_control_apply(struct ath_hw *ah, bool is2ghz)
++{
++ struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
++ u8 xpa_ctl;
++
++ if (!(eep->baseEepHeader.featureEnable & 0x80))
++ return;
++
++ if (!AR_SREV_9300(ah) && !AR_SREV_9340(ah) && !AR_SREV_9580(ah))
++ return;
++
++ xpa_ctl = ar9003_modal_header(ah, is2ghz)->txFrameToXpaOn;
++ if (is2ghz)
++ REG_RMW_FIELD(ah, AR_PHY_XPA_TIMING_CTL,
++ AR_PHY_XPA_TIMING_CTL_FRAME_XPAB_ON, xpa_ctl);
++ else
++ REG_RMW_FIELD(ah, AR_PHY_XPA_TIMING_CTL,
++ AR_PHY_XPA_TIMING_CTL_FRAME_XPAA_ON, xpa_ctl);
++}
++
++static void ar9003_hw_xlna_bias_strength_apply(struct ath_hw *ah, bool is2ghz)
++{
++ struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
++ u8 bias;
++
++ if (!(eep->baseEepHeader.featureEnable & 0x40))
++ return;
++
++ if (!AR_SREV_9300(ah))
++ return;
++
++ bias = ar9003_modal_header(ah, is2ghz)->xlna_bias_strength;
++ REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_RXTX4, AR_PHY_65NM_RXTX4_XLNA_BIAS,
++ bias & 0x3);
++ bias >>= 2;
++ REG_RMW_FIELD(ah, AR_PHY_65NM_CH1_RXTX4, AR_PHY_65NM_RXTX4_XLNA_BIAS,
++ bias & 0x3);
++ bias >>= 2;
++ REG_RMW_FIELD(ah, AR_PHY_65NM_CH2_RXTX4, AR_PHY_65NM_RXTX4_XLNA_BIAS,
++ bias & 0x3);
++}
++
+ static void ath9k_hw_ar9300_set_board_values(struct ath_hw *ah,
+ struct ath9k_channel *chan)
+ {
+- ar9003_hw_xpa_bias_level_apply(ah, IS_CHAN_2GHZ(chan));
+- ar9003_hw_ant_ctrl_apply(ah, IS_CHAN_2GHZ(chan));
++ bool is2ghz = IS_CHAN_2GHZ(chan);
++ ar9003_hw_xpa_timing_control_apply(ah, is2ghz);
++ ar9003_hw_xpa_bias_level_apply(ah, is2ghz);
++ ar9003_hw_ant_ctrl_apply(ah, is2ghz);
+ ar9003_hw_drive_strength_apply(ah);
++ ar9003_hw_xlna_bias_strength_apply(ah, is2ghz);
+ ar9003_hw_atten_apply(ah, chan);
+ ar9003_hw_quick_drop_apply(ah, chan->channel);
+ if (!AR_SREV_9330(ah) && !AR_SREV_9340(ah) && !AR_SREV_9550(ah))
+ ar9003_hw_internal_regulator_apply(ah);
+- if (AR_SREV_9485(ah) || AR_SREV_9330(ah) || AR_SREV_9340(ah))
+- ar9003_hw_apply_tuning_caps(ah);
+- ar9003_hw_txend_to_xpa_off_apply(ah, chan->channel);
++ ar9003_hw_apply_tuning_caps(ah);
++ ar9003_hw_txend_to_xpa_off_apply(ah, is2ghz);
+ }
+
+ static void ath9k_hw_ar9300_set_addac(struct ath_hw *ah,
+@@ -5100,14 +5127,9 @@ s32 ar9003_hw_get_rx_gain_idx(struct ath
+ return (eep->baseEepHeader.txrxgain) & 0xf; /* bits 3:0 */
+ }
+
+-u8 *ar9003_get_spur_chan_ptr(struct ath_hw *ah, bool is_2ghz)
++u8 *ar9003_get_spur_chan_ptr(struct ath_hw *ah, bool is2ghz)
+ {
+- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
+-
+- if (is_2ghz)
+- return eep->modalHeader2G.spurChans;
+- else
+- return eep->modalHeader5G.spurChans;
++ return ar9003_modal_header(ah, is2ghz)->spurChans;
+ }
+
+ unsigned int ar9003_get_paprd_scale_factor(struct ath_hw *ah,
+--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
++++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
+@@ -231,7 +231,8 @@ struct ar9300_modal_eep_header {
+ __le32 papdRateMaskHt20;
+ __le32 papdRateMaskHt40;
+ __le16 switchcomspdt;
+- u8 futureModal[8];
++ u8 xlna_bias_strength;
++ u8 futureModal[7];
+ } __packed;
+
+ struct ar9300_cal_data_per_freq_op_loop {
+--- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c
++++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
+@@ -44,462 +44,310 @@ static void ar9003_hw_init_mode_regs(str
+ ar9462_2p0_baseband_core_txfir_coeff_japan_2484
+ if (AR_SREV_9330_11(ah)) {
+ /* mac */
+- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
+- ar9331_1p1_mac_core,
+- ARRAY_SIZE(ar9331_1p1_mac_core), 2);
++ ar9331_1p1_mac_core);
+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
+- ar9331_1p1_mac_postamble,
+- ARRAY_SIZE(ar9331_1p1_mac_postamble), 5);
++ ar9331_1p1_mac_postamble);
+
+ /* bb */
+- INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
+ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
+- ar9331_1p1_baseband_core,
+- ARRAY_SIZE(ar9331_1p1_baseband_core), 2);
++ ar9331_1p1_baseband_core);
+ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
+- ar9331_1p1_baseband_postamble,
+- ARRAY_SIZE(ar9331_1p1_baseband_postamble), 5);
++ ar9331_1p1_baseband_postamble);
+
+ /* radio */
+- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
+ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
+- ar9331_1p1_radio_core,
+- ARRAY_SIZE(ar9331_1p1_radio_core), 2);
+- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST], NULL, 0, 0);
++ ar9331_1p1_radio_core);
+
+ /* soc */
+ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
+- ar9331_1p1_soc_preamble,
+- ARRAY_SIZE(ar9331_1p1_soc_preamble), 2);
+- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
++ ar9331_1p1_soc_preamble);
+ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
+- ar9331_1p1_soc_postamble,
+- ARRAY_SIZE(ar9331_1p1_soc_postamble), 2);
++ ar9331_1p1_soc_postamble);
+
+ /* rx/tx gain */
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9331_common_rx_gain_1p1,
+- ARRAY_SIZE(ar9331_common_rx_gain_1p1), 2);
++ ar9331_common_rx_gain_1p1);
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9331_modes_lowest_ob_db_tx_gain_1p1,
+- ARRAY_SIZE(ar9331_modes_lowest_ob_db_tx_gain_1p1),
+- 5);
++ ar9331_modes_lowest_ob_db_tx_gain_1p1);
+
+ /* additional clock settings */
+ if (ah->is_clk_25mhz)
+ INIT_INI_ARRAY(&ah->iniAdditional,
+- ar9331_1p1_xtal_25M,
+- ARRAY_SIZE(ar9331_1p1_xtal_25M), 2);
++ ar9331_1p1_xtal_25M);
+ else
+ INIT_INI_ARRAY(&ah->iniAdditional,
+- ar9331_1p1_xtal_40M,
+- ARRAY_SIZE(ar9331_1p1_xtal_40M), 2);
++ ar9331_1p1_xtal_40M);
+ } else if (AR_SREV_9330_12(ah)) {
+ /* mac */
+- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
+- ar9331_1p2_mac_core,
+- ARRAY_SIZE(ar9331_1p2_mac_core), 2);
++ ar9331_1p2_mac_core);
+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
+- ar9331_1p2_mac_postamble,
+- ARRAY_SIZE(ar9331_1p2_mac_postamble), 5);
++ ar9331_1p2_mac_postamble);
+
+ /* bb */
+- INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
+ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
+- ar9331_1p2_baseband_core,
+- ARRAY_SIZE(ar9331_1p2_baseband_core), 2);
++ ar9331_1p2_baseband_core);
+ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
+- ar9331_1p2_baseband_postamble,
+- ARRAY_SIZE(ar9331_1p2_baseband_postamble), 5);
++ ar9331_1p2_baseband_postamble);
+
+ /* radio */
+- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
+ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
+- ar9331_1p2_radio_core,
+- ARRAY_SIZE(ar9331_1p2_radio_core), 2);
+- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST], NULL, 0, 0);
++ ar9331_1p2_radio_core);
+
+ /* soc */
+ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
+- ar9331_1p2_soc_preamble,
+- ARRAY_SIZE(ar9331_1p2_soc_preamble), 2);
+- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
++ ar9331_1p2_soc_preamble);
+ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
+- ar9331_1p2_soc_postamble,
+- ARRAY_SIZE(ar9331_1p2_soc_postamble), 2);
++ ar9331_1p2_soc_postamble);
+
+ /* rx/tx gain */
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9331_common_rx_gain_1p2,
+- ARRAY_SIZE(ar9331_common_rx_gain_1p2), 2);
++ ar9331_common_rx_gain_1p2);
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9331_modes_lowest_ob_db_tx_gain_1p2,
+- ARRAY_SIZE(ar9331_modes_lowest_ob_db_tx_gain_1p2),
+- 5);
++ ar9331_modes_lowest_ob_db_tx_gain_1p2);
+
+ /* additional clock settings */
+ if (ah->is_clk_25mhz)
+ INIT_INI_ARRAY(&ah->iniAdditional,
+- ar9331_1p2_xtal_25M,
+- ARRAY_SIZE(ar9331_1p2_xtal_25M), 2);
++ ar9331_1p2_xtal_25M);
+ else
+ INIT_INI_ARRAY(&ah->iniAdditional,
+- ar9331_1p2_xtal_40M,
+- ARRAY_SIZE(ar9331_1p2_xtal_40M), 2);
++ ar9331_1p2_xtal_40M);
+ } else if (AR_SREV_9340(ah)) {
+ /* mac */
+- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
+- ar9340_1p0_mac_core,
+- ARRAY_SIZE(ar9340_1p0_mac_core), 2);
++ ar9340_1p0_mac_core);
+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
+- ar9340_1p0_mac_postamble,
+- ARRAY_SIZE(ar9340_1p0_mac_postamble), 5);
++ ar9340_1p0_mac_postamble);
+
+ /* bb */
+- INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
+ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
+- ar9340_1p0_baseband_core,
+- ARRAY_SIZE(ar9340_1p0_baseband_core), 2);
++ ar9340_1p0_baseband_core);
+ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
+- ar9340_1p0_baseband_postamble,
+- ARRAY_SIZE(ar9340_1p0_baseband_postamble), 5);
++ ar9340_1p0_baseband_postamble);
+
+ /* radio */
+- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
+ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
+- ar9340_1p0_radio_core,
+- ARRAY_SIZE(ar9340_1p0_radio_core), 2);
++ ar9340_1p0_radio_core);
+ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
+- ar9340_1p0_radio_postamble,
+- ARRAY_SIZE(ar9340_1p0_radio_postamble), 5);
++ ar9340_1p0_radio_postamble);
+
+ /* soc */
+ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
+- ar9340_1p0_soc_preamble,
+- ARRAY_SIZE(ar9340_1p0_soc_preamble), 2);
+- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
++ ar9340_1p0_soc_preamble);
+ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
+- ar9340_1p0_soc_postamble,
+- ARRAY_SIZE(ar9340_1p0_soc_postamble), 5);
++ ar9340_1p0_soc_postamble);
+
+ /* rx/tx gain */
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9340Common_wo_xlna_rx_gain_table_1p0,
+- ARRAY_SIZE(ar9340Common_wo_xlna_rx_gain_table_1p0),
+- 5);
+- INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9340Modes_high_ob_db_tx_gain_table_1p0,
+- ARRAY_SIZE(ar9340Modes_high_ob_db_tx_gain_table_1p0),
+- 5);
++ ar9340Common_wo_xlna_rx_gain_table_1p0);
++ INIT_INI_ARRAY(&ah->iniModesTxGain,
++ ar9340Modes_high_ob_db_tx_gain_table_1p0);
+
+ INIT_INI_ARRAY(&ah->iniModesFastClock,
+- ar9340Modes_fast_clock_1p0,
+- ARRAY_SIZE(ar9340Modes_fast_clock_1p0),
+- 3);
++ ar9340Modes_fast_clock_1p0);
+
+ if (!ah->is_clk_25mhz)
+ INIT_INI_ARRAY(&ah->iniAdditional,
+- ar9340_1p0_radio_core_40M,
+- ARRAY_SIZE(ar9340_1p0_radio_core_40M),
+- 2);
++ ar9340_1p0_radio_core_40M);
+ } else if (AR_SREV_9485_11(ah)) {
+ /* mac */
+- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
+- ar9485_1_1_mac_core,
+- ARRAY_SIZE(ar9485_1_1_mac_core), 2);
++ ar9485_1_1_mac_core);
+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
+- ar9485_1_1_mac_postamble,
+- ARRAY_SIZE(ar9485_1_1_mac_postamble), 5);
++ ar9485_1_1_mac_postamble);
+
+ /* bb */
+- INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], ar9485_1_1,
+- ARRAY_SIZE(ar9485_1_1), 2);
++ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], ar9485_1_1);
+ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
+- ar9485_1_1_baseband_core,
+- ARRAY_SIZE(ar9485_1_1_baseband_core), 2);
++ ar9485_1_1_baseband_core);
+ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
+- ar9485_1_1_baseband_postamble,
+- ARRAY_SIZE(ar9485_1_1_baseband_postamble), 5);
++ ar9485_1_1_baseband_postamble);
+
+ /* radio */
+- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
+ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
+- ar9485_1_1_radio_core,
+- ARRAY_SIZE(ar9485_1_1_radio_core), 2);
++ ar9485_1_1_radio_core);
+ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
+- ar9485_1_1_radio_postamble,
+- ARRAY_SIZE(ar9485_1_1_radio_postamble), 2);
++ ar9485_1_1_radio_postamble);
+
+ /* soc */
+ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
+- ar9485_1_1_soc_preamble,
+- ARRAY_SIZE(ar9485_1_1_soc_preamble), 2);
+- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
+- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST], NULL, 0, 0);
++ ar9485_1_1_soc_preamble);
+
+ /* rx/tx gain */
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9485Common_wo_xlna_rx_gain_1_1,
+- ARRAY_SIZE(ar9485Common_wo_xlna_rx_gain_1_1), 2);
++ ar9485Common_wo_xlna_rx_gain_1_1);
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9485_modes_lowest_ob_db_tx_gain_1_1,
+- ARRAY_SIZE(ar9485_modes_lowest_ob_db_tx_gain_1_1),
+- 5);
++ ar9485_modes_lowest_ob_db_tx_gain_1_1);
+
+ /* Load PCIE SERDES settings from INI */
+
+ /* Awake Setting */
+
+ INIT_INI_ARRAY(&ah->iniPcieSerdes,
+- ar9485_1_1_pcie_phy_clkreq_disable_L1,
+- ARRAY_SIZE(ar9485_1_1_pcie_phy_clkreq_disable_L1),
+- 2);
++ ar9485_1_1_pcie_phy_clkreq_disable_L1);
+
+ /* Sleep Setting */
+
+ INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
+- ar9485_1_1_pcie_phy_clkreq_disable_L1,
+- ARRAY_SIZE(ar9485_1_1_pcie_phy_clkreq_disable_L1),
+- 2);
++ ar9485_1_1_pcie_phy_clkreq_disable_L1);
+ } else if (AR_SREV_9462_20(ah)) {
+
+- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
+- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], ar9462_2p0_mac_core,
+- ARRAY_SIZE(ar9462_2p0_mac_core), 2);
++ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], ar9462_2p0_mac_core);
+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
+- ar9462_2p0_mac_postamble,
+- ARRAY_SIZE(ar9462_2p0_mac_postamble), 5);
++ ar9462_2p0_mac_postamble);
+
+- INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
+ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
+- ar9462_2p0_baseband_core,
+- ARRAY_SIZE(ar9462_2p0_baseband_core), 2);
++ ar9462_2p0_baseband_core);
+ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
+- ar9462_2p0_baseband_postamble,
+- ARRAY_SIZE(ar9462_2p0_baseband_postamble), 5);
++ ar9462_2p0_baseband_postamble);
+
+- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
+ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
+- ar9462_2p0_radio_core,
+- ARRAY_SIZE(ar9462_2p0_radio_core), 2);
++ ar9462_2p0_radio_core);
+ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
+- ar9462_2p0_radio_postamble,
+- ARRAY_SIZE(ar9462_2p0_radio_postamble), 5);
++ ar9462_2p0_radio_postamble);
+ INIT_INI_ARRAY(&ah->ini_radio_post_sys2ant,
+- ar9462_2p0_radio_postamble_sys2ant,
+- ARRAY_SIZE(ar9462_2p0_radio_postamble_sys2ant),
+- 5);
++ ar9462_2p0_radio_postamble_sys2ant);
+
+ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
+- ar9462_2p0_soc_preamble,
+- ARRAY_SIZE(ar9462_2p0_soc_preamble), 2);
+- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
++ ar9462_2p0_soc_preamble);
+ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
+- ar9462_2p0_soc_postamble,
+- ARRAY_SIZE(ar9462_2p0_soc_postamble), 5);
++ ar9462_2p0_soc_postamble);
+
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9462_common_rx_gain_table_2p0,
+- ARRAY_SIZE(ar9462_common_rx_gain_table_2p0), 2);
++ ar9462_common_rx_gain_table_2p0);
+
+ /* Awake -> Sleep Setting */
+ INIT_INI_ARRAY(&ah->iniPcieSerdes,
+- PCIE_PLL_ON_CREQ_DIS_L1_2P0,
+- ARRAY_SIZE(PCIE_PLL_ON_CREQ_DIS_L1_2P0),
+- 2);
++ PCIE_PLL_ON_CREQ_DIS_L1_2P0);
+ /* Sleep -> Awake Setting */
+ INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
+- PCIE_PLL_ON_CREQ_DIS_L1_2P0,
+- ARRAY_SIZE(PCIE_PLL_ON_CREQ_DIS_L1_2P0),
+- 2);
++ PCIE_PLL_ON_CREQ_DIS_L1_2P0);
+
+ /* Fast clock modal settings */
+ INIT_INI_ARRAY(&ah->iniModesFastClock,
+- ar9462_modes_fast_clock_2p0,
+- ARRAY_SIZE(ar9462_modes_fast_clock_2p0), 3);
++ ar9462_modes_fast_clock_2p0);
+
+ INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
+- AR9462_BB_CTX_COEFJ(2p0),
+- ARRAY_SIZE(AR9462_BB_CTX_COEFJ(2p0)), 2);
++ AR9462_BB_CTX_COEFJ(2p0));
+
+- INIT_INI_ARRAY(&ah->ini_japan2484, AR9462_BBC_TXIFR_COEFFJ,
+- ARRAY_SIZE(AR9462_BBC_TXIFR_COEFFJ), 2);
++ INIT_INI_ARRAY(&ah->ini_japan2484, AR9462_BBC_TXIFR_COEFFJ);
+ } else if (AR_SREV_9550(ah)) {
+ /* mac */
+- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
+- ar955x_1p0_mac_core,
+- ARRAY_SIZE(ar955x_1p0_mac_core), 2);
++ ar955x_1p0_mac_core);
+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
+- ar955x_1p0_mac_postamble,
+- ARRAY_SIZE(ar955x_1p0_mac_postamble), 5);
++ ar955x_1p0_mac_postamble);
+
+ /* bb */
+- INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
+ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
+- ar955x_1p0_baseband_core,
+- ARRAY_SIZE(ar955x_1p0_baseband_core), 2);
++ ar955x_1p0_baseband_core);
+ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
+- ar955x_1p0_baseband_postamble,
+- ARRAY_SIZE(ar955x_1p0_baseband_postamble), 5);
++ ar955x_1p0_baseband_postamble);
+
+ /* radio */
+- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
+ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
+- ar955x_1p0_radio_core,
+- ARRAY_SIZE(ar955x_1p0_radio_core), 2);
++ ar955x_1p0_radio_core);
+ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
+- ar955x_1p0_radio_postamble,
+- ARRAY_SIZE(ar955x_1p0_radio_postamble), 5);
++ ar955x_1p0_radio_postamble);
+
+ /* soc */
+ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
+- ar955x_1p0_soc_preamble,
+- ARRAY_SIZE(ar955x_1p0_soc_preamble), 2);
+- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
++ ar955x_1p0_soc_preamble);
+ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
+- ar955x_1p0_soc_postamble,
+- ARRAY_SIZE(ar955x_1p0_soc_postamble), 5);
++ ar955x_1p0_soc_postamble);
+
+ /* rx/tx gain */
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar955x_1p0_common_wo_xlna_rx_gain_table,
+- ARRAY_SIZE(ar955x_1p0_common_wo_xlna_rx_gain_table),
+- 2);
++ ar955x_1p0_common_wo_xlna_rx_gain_table);
+ INIT_INI_ARRAY(&ah->ini_modes_rx_gain_bounds,
+- ar955x_1p0_common_wo_xlna_rx_gain_bounds,
+- ARRAY_SIZE(ar955x_1p0_common_wo_xlna_rx_gain_bounds),
+- 5);
+- INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar955x_1p0_modes_xpa_tx_gain_table,
+- ARRAY_SIZE(ar955x_1p0_modes_xpa_tx_gain_table),
+- 9);
++ ar955x_1p0_common_wo_xlna_rx_gain_bounds);
++ INIT_INI_ARRAY(&ah->iniModesTxGain,
++ ar955x_1p0_modes_xpa_tx_gain_table);
+
+ /* Fast clock modal settings */
+ INIT_INI_ARRAY(&ah->iniModesFastClock,
+- ar955x_1p0_modes_fast_clock,
+- ARRAY_SIZE(ar955x_1p0_modes_fast_clock), 3);
++ ar955x_1p0_modes_fast_clock);
+ } else if (AR_SREV_9580(ah)) {
+ /* mac */
+- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
+- ar9580_1p0_mac_core,
+- ARRAY_SIZE(ar9580_1p0_mac_core), 2);
++ ar9580_1p0_mac_core);
+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
+- ar9580_1p0_mac_postamble,
+- ARRAY_SIZE(ar9580_1p0_mac_postamble), 5);
++ ar9580_1p0_mac_postamble);
+
+ /* bb */
+- INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
+ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
+- ar9580_1p0_baseband_core,
+- ARRAY_SIZE(ar9580_1p0_baseband_core), 2);
++ ar9580_1p0_baseband_core);
+ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
+- ar9580_1p0_baseband_postamble,
+- ARRAY_SIZE(ar9580_1p0_baseband_postamble), 5);
++ ar9580_1p0_baseband_postamble);
+
+ /* radio */
+- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
+ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
+- ar9580_1p0_radio_core,
+- ARRAY_SIZE(ar9580_1p0_radio_core), 2);
++ ar9580_1p0_radio_core);
+ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
+- ar9580_1p0_radio_postamble,
+- ARRAY_SIZE(ar9580_1p0_radio_postamble), 5);
++ ar9580_1p0_radio_postamble);
+
+ /* soc */
+ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
+- ar9580_1p0_soc_preamble,
+- ARRAY_SIZE(ar9580_1p0_soc_preamble), 2);
+- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
++ ar9580_1p0_soc_preamble);
+ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
+- ar9580_1p0_soc_postamble,
+- ARRAY_SIZE(ar9580_1p0_soc_postamble), 5);
++ ar9580_1p0_soc_postamble);
+
+ /* rx/tx gain */
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9580_1p0_rx_gain_table,
+- ARRAY_SIZE(ar9580_1p0_rx_gain_table), 2);
++ ar9580_1p0_rx_gain_table);
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9580_1p0_low_ob_db_tx_gain_table,
+- ARRAY_SIZE(ar9580_1p0_low_ob_db_tx_gain_table),
+- 5);
++ ar9580_1p0_low_ob_db_tx_gain_table);
+
+ INIT_INI_ARRAY(&ah->iniModesFastClock,
+- ar9580_1p0_modes_fast_clock,
+- ARRAY_SIZE(ar9580_1p0_modes_fast_clock),
+- 3);
++ ar9580_1p0_modes_fast_clock);
+ } else {
+ /* mac */
+- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
+- ar9300_2p2_mac_core,
+- ARRAY_SIZE(ar9300_2p2_mac_core), 2);
++ ar9300_2p2_mac_core);
+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
+- ar9300_2p2_mac_postamble,
+- ARRAY_SIZE(ar9300_2p2_mac_postamble), 5);
++ ar9300_2p2_mac_postamble);
+
+ /* bb */
+- INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
+ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
+- ar9300_2p2_baseband_core,
+- ARRAY_SIZE(ar9300_2p2_baseband_core), 2);
++ ar9300_2p2_baseband_core);
+ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
+- ar9300_2p2_baseband_postamble,
+- ARRAY_SIZE(ar9300_2p2_baseband_postamble), 5);
++ ar9300_2p2_baseband_postamble);
+
+ /* radio */
+- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
+ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
+- ar9300_2p2_radio_core,
+- ARRAY_SIZE(ar9300_2p2_radio_core), 2);
++ ar9300_2p2_radio_core);
+ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
+- ar9300_2p2_radio_postamble,
+- ARRAY_SIZE(ar9300_2p2_radio_postamble), 5);
++ ar9300_2p2_radio_postamble);
+
+ /* soc */
+ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
+- ar9300_2p2_soc_preamble,
+- ARRAY_SIZE(ar9300_2p2_soc_preamble), 2);
+- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
++ ar9300_2p2_soc_preamble);
+ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
+- ar9300_2p2_soc_postamble,
+- ARRAY_SIZE(ar9300_2p2_soc_postamble), 5);
++ ar9300_2p2_soc_postamble);
+
+ /* rx/tx gain */
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9300Common_rx_gain_table_2p2,
+- ARRAY_SIZE(ar9300Common_rx_gain_table_2p2), 2);
++ ar9300Common_rx_gain_table_2p2);
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9300Modes_lowest_ob_db_tx_gain_table_2p2,
+- ARRAY_SIZE(ar9300Modes_lowest_ob_db_tx_gain_table_2p2),
+- 5);
++ ar9300Modes_lowest_ob_db_tx_gain_table_2p2);
+
+ /* Load PCIE SERDES settings from INI */
+
+ /* Awake Setting */
+
+ INIT_INI_ARRAY(&ah->iniPcieSerdes,
+- ar9300PciePhy_pll_on_clkreq_disable_L1_2p2,
+- ARRAY_SIZE(ar9300PciePhy_pll_on_clkreq_disable_L1_2p2),
+- 2);
++ ar9300PciePhy_pll_on_clkreq_disable_L1_2p2);
+
+ /* Sleep Setting */
+
+ INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
+- ar9300PciePhy_pll_on_clkreq_disable_L1_2p2,
+- ARRAY_SIZE(ar9300PciePhy_pll_on_clkreq_disable_L1_2p2),
+- 2);
++ ar9300PciePhy_pll_on_clkreq_disable_L1_2p2);
+
+ /* Fast clock modal settings */
+ INIT_INI_ARRAY(&ah->iniModesFastClock,
+- ar9300Modes_fast_clock_2p2,
+- ARRAY_SIZE(ar9300Modes_fast_clock_2p2),
+- 3);
++ ar9300Modes_fast_clock_2p2);
+ }
+ }
+
+@@ -507,156 +355,110 @@ static void ar9003_tx_gain_table_mode0(s
+ {
+ if (AR_SREV_9330_12(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9331_modes_lowest_ob_db_tx_gain_1p2,
+- ARRAY_SIZE(ar9331_modes_lowest_ob_db_tx_gain_1p2),
+- 5);
++ ar9331_modes_lowest_ob_db_tx_gain_1p2);
+ else if (AR_SREV_9330_11(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9331_modes_lowest_ob_db_tx_gain_1p1,
+- ARRAY_SIZE(ar9331_modes_lowest_ob_db_tx_gain_1p1),
+- 5);
++ ar9331_modes_lowest_ob_db_tx_gain_1p1);
+ else if (AR_SREV_9340(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9340Modes_lowest_ob_db_tx_gain_table_1p0,
+- ARRAY_SIZE(ar9340Modes_lowest_ob_db_tx_gain_table_1p0),
+- 5);
++ ar9340Modes_lowest_ob_db_tx_gain_table_1p0);
+ else if (AR_SREV_9485_11(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9485_modes_lowest_ob_db_tx_gain_1_1,
+- ARRAY_SIZE(ar9485_modes_lowest_ob_db_tx_gain_1_1),
+- 5);
++ ar9485_modes_lowest_ob_db_tx_gain_1_1);
+ else if (AR_SREV_9550(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar955x_1p0_modes_xpa_tx_gain_table,
+- ARRAY_SIZE(ar955x_1p0_modes_xpa_tx_gain_table),
+- 9);
++ ar955x_1p0_modes_xpa_tx_gain_table);
+ else if (AR_SREV_9580(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9580_1p0_lowest_ob_db_tx_gain_table,
+- ARRAY_SIZE(ar9580_1p0_lowest_ob_db_tx_gain_table),
+- 5);
++ ar9580_1p0_lowest_ob_db_tx_gain_table);
+ else if (AR_SREV_9462_20(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9462_modes_low_ob_db_tx_gain_table_2p0,
+- ARRAY_SIZE(ar9462_modes_low_ob_db_tx_gain_table_2p0),
+- 5);
++ ar9462_modes_low_ob_db_tx_gain_table_2p0);
+ else
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9300Modes_lowest_ob_db_tx_gain_table_2p2,
+- ARRAY_SIZE(ar9300Modes_lowest_ob_db_tx_gain_table_2p2),
+- 5);
++ ar9300Modes_lowest_ob_db_tx_gain_table_2p2);
+ }
+
+ static void ar9003_tx_gain_table_mode1(struct ath_hw *ah)
+ {
+ if (AR_SREV_9330_12(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9331_modes_high_ob_db_tx_gain_1p2,
+- ARRAY_SIZE(ar9331_modes_high_ob_db_tx_gain_1p2),
+- 5);
++ ar9331_modes_high_ob_db_tx_gain_1p2);
+ else if (AR_SREV_9330_11(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9331_modes_high_ob_db_tx_gain_1p1,
+- ARRAY_SIZE(ar9331_modes_high_ob_db_tx_gain_1p1),
+- 5);
++ ar9331_modes_high_ob_db_tx_gain_1p1);
+ else if (AR_SREV_9340(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9340Modes_lowest_ob_db_tx_gain_table_1p0,
+- ARRAY_SIZE(ar9340Modes_lowest_ob_db_tx_gain_table_1p0),
+- 5);
++ ar9340Modes_high_ob_db_tx_gain_table_1p0);
+ else if (AR_SREV_9485_11(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9485Modes_high_ob_db_tx_gain_1_1,
+- ARRAY_SIZE(ar9485Modes_high_ob_db_tx_gain_1_1),
+- 5);
++ ar9485Modes_high_ob_db_tx_gain_1_1);
+ else if (AR_SREV_9580(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9580_1p0_high_ob_db_tx_gain_table,
+- ARRAY_SIZE(ar9580_1p0_high_ob_db_tx_gain_table),
+- 5);
++ ar9580_1p0_high_ob_db_tx_gain_table);
+ else if (AR_SREV_9550(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar955x_1p0_modes_no_xpa_tx_gain_table,
+- ARRAY_SIZE(ar955x_1p0_modes_no_xpa_tx_gain_table),
+- 9);
++ ar955x_1p0_modes_no_xpa_tx_gain_table);
+ else if (AR_SREV_9462_20(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9462_modes_high_ob_db_tx_gain_table_2p0,
+- ARRAY_SIZE(ar9462_modes_high_ob_db_tx_gain_table_2p0),
+- 5);
++ ar9462_modes_high_ob_db_tx_gain_table_2p0);
+ else
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9300Modes_high_ob_db_tx_gain_table_2p2,
+- ARRAY_SIZE(ar9300Modes_high_ob_db_tx_gain_table_2p2),
+- 5);
++ ar9300Modes_high_ob_db_tx_gain_table_2p2);
+ }
+
+ static void ar9003_tx_gain_table_mode2(struct ath_hw *ah)
+ {
+ if (AR_SREV_9330_12(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9331_modes_low_ob_db_tx_gain_1p2,
+- ARRAY_SIZE(ar9331_modes_low_ob_db_tx_gain_1p2),
+- 5);
++ ar9331_modes_low_ob_db_tx_gain_1p2);
+ else if (AR_SREV_9330_11(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9331_modes_low_ob_db_tx_gain_1p1,
+- ARRAY_SIZE(ar9331_modes_low_ob_db_tx_gain_1p1),
+- 5);
++ ar9331_modes_low_ob_db_tx_gain_1p1);
+ else if (AR_SREV_9340(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9340Modes_lowest_ob_db_tx_gain_table_1p0,
+- ARRAY_SIZE(ar9340Modes_lowest_ob_db_tx_gain_table_1p0),
+- 5);
++ ar9340Modes_low_ob_db_tx_gain_table_1p0);
+ else if (AR_SREV_9485_11(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9485Modes_low_ob_db_tx_gain_1_1,
+- ARRAY_SIZE(ar9485Modes_low_ob_db_tx_gain_1_1),
+- 5);
++ ar9485Modes_low_ob_db_tx_gain_1_1);
+ else if (AR_SREV_9580(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9580_1p0_low_ob_db_tx_gain_table,
+- ARRAY_SIZE(ar9580_1p0_low_ob_db_tx_gain_table),
+- 5);
++ ar9580_1p0_low_ob_db_tx_gain_table);
+ else
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9300Modes_low_ob_db_tx_gain_table_2p2,
+- ARRAY_SIZE(ar9300Modes_low_ob_db_tx_gain_table_2p2),
+- 5);
++ ar9300Modes_low_ob_db_tx_gain_table_2p2);
+ }
+
+ static void ar9003_tx_gain_table_mode3(struct ath_hw *ah)
+ {
+ if (AR_SREV_9330_12(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9331_modes_high_power_tx_gain_1p2,
+- ARRAY_SIZE(ar9331_modes_high_power_tx_gain_1p2),
+- 5);
++ ar9331_modes_high_power_tx_gain_1p2);
+ else if (AR_SREV_9330_11(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9331_modes_high_power_tx_gain_1p1,
+- ARRAY_SIZE(ar9331_modes_high_power_tx_gain_1p1),
+- 5);
++ ar9331_modes_high_power_tx_gain_1p1);
+ else if (AR_SREV_9340(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9340Modes_lowest_ob_db_tx_gain_table_1p0,
+- ARRAY_SIZE(ar9340Modes_lowest_ob_db_tx_gain_table_1p0),
+- 5);
++ ar9340Modes_high_power_tx_gain_table_1p0);
+ else if (AR_SREV_9485_11(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9485Modes_high_power_tx_gain_1_1,
+- ARRAY_SIZE(ar9485Modes_high_power_tx_gain_1_1),
+- 5);
++ ar9485Modes_high_power_tx_gain_1_1);
+ else if (AR_SREV_9580(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9580_1p0_high_power_tx_gain_table,
+- ARRAY_SIZE(ar9580_1p0_high_power_tx_gain_table),
+- 5);
++ ar9580_1p0_high_power_tx_gain_table);
+ else
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9300Modes_high_power_tx_gain_table_2p2,
+- ARRAY_SIZE(ar9300Modes_high_power_tx_gain_table_2p2),
+- 5);
++ ar9300Modes_high_power_tx_gain_table_2p2);
++}
++
++static void ar9003_tx_gain_table_mode4(struct ath_hw *ah)
++{
++ if (AR_SREV_9340(ah))
++ INIT_INI_ARRAY(&ah->iniModesTxGain,
++ ar9340Modes_mixed_ob_db_tx_gain_table_1p0);
++ else if (AR_SREV_9580(ah))
++ INIT_INI_ARRAY(&ah->iniModesTxGain,
++ ar9580_1p0_mixed_ob_db_tx_gain_table);
+ }
+
+ static void ar9003_tx_gain_table_apply(struct ath_hw *ah)
+@@ -675,6 +477,9 @@ static void ar9003_tx_gain_table_apply(s
+ case 3:
+ ar9003_tx_gain_table_mode3(ah);
+ break;
++ case 4:
++ ar9003_tx_gain_table_mode4(ah);
++ break;
+ }
+ }
+
+@@ -682,104 +487,67 @@ static void ar9003_rx_gain_table_mode0(s
+ {
+ if (AR_SREV_9330_12(ah))
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9331_common_rx_gain_1p2,
+- ARRAY_SIZE(ar9331_common_rx_gain_1p2),
+- 2);
++ ar9331_common_rx_gain_1p2);
+ else if (AR_SREV_9330_11(ah))
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9331_common_rx_gain_1p1,
+- ARRAY_SIZE(ar9331_common_rx_gain_1p1),
+- 2);
++ ar9331_common_rx_gain_1p1);
+ else if (AR_SREV_9340(ah))
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9340Common_rx_gain_table_1p0,
+- ARRAY_SIZE(ar9340Common_rx_gain_table_1p0),
+- 2);
++ ar9340Common_rx_gain_table_1p0);
+ else if (AR_SREV_9485_11(ah))
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9485Common_wo_xlna_rx_gain_1_1,
+- ARRAY_SIZE(ar9485Common_wo_xlna_rx_gain_1_1),
+- 2);
++ ar9485Common_wo_xlna_rx_gain_1_1);
+ else if (AR_SREV_9550(ah)) {
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar955x_1p0_common_rx_gain_table,
+- ARRAY_SIZE(ar955x_1p0_common_rx_gain_table),
+- 2);
++ ar955x_1p0_common_rx_gain_table);
+ INIT_INI_ARRAY(&ah->ini_modes_rx_gain_bounds,
+- ar955x_1p0_common_rx_gain_bounds,
+- ARRAY_SIZE(ar955x_1p0_common_rx_gain_bounds),
+- 5);
++ ar955x_1p0_common_rx_gain_bounds);
+ } else if (AR_SREV_9580(ah))
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9580_1p0_rx_gain_table,
+- ARRAY_SIZE(ar9580_1p0_rx_gain_table),
+- 2);
++ ar9580_1p0_rx_gain_table);
+ else if (AR_SREV_9462_20(ah))
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9462_common_rx_gain_table_2p0,
+- ARRAY_SIZE(ar9462_common_rx_gain_table_2p0),
+- 2);
++ ar9462_common_rx_gain_table_2p0);
+ else
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9300Common_rx_gain_table_2p2,
+- ARRAY_SIZE(ar9300Common_rx_gain_table_2p2),
+- 2);
++ ar9300Common_rx_gain_table_2p2);
+ }
+
+ static void ar9003_rx_gain_table_mode1(struct ath_hw *ah)
+ {
+ if (AR_SREV_9330_12(ah))
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9331_common_wo_xlna_rx_gain_1p2,
+- ARRAY_SIZE(ar9331_common_wo_xlna_rx_gain_1p2),
+- 2);
++ ar9331_common_wo_xlna_rx_gain_1p2);
+ else if (AR_SREV_9330_11(ah))
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9331_common_wo_xlna_rx_gain_1p1,
+- ARRAY_SIZE(ar9331_common_wo_xlna_rx_gain_1p1),
+- 2);
++ ar9331_common_wo_xlna_rx_gain_1p1);
+ else if (AR_SREV_9340(ah))
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9340Common_wo_xlna_rx_gain_table_1p0,
+- ARRAY_SIZE(ar9340Common_wo_xlna_rx_gain_table_1p0),
+- 2);
++ ar9340Common_wo_xlna_rx_gain_table_1p0);
+ else if (AR_SREV_9485_11(ah))
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9485Common_wo_xlna_rx_gain_1_1,
+- ARRAY_SIZE(ar9485Common_wo_xlna_rx_gain_1_1),
+- 2);
++ ar9485Common_wo_xlna_rx_gain_1_1);
+ else if (AR_SREV_9462_20(ah))
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9462_common_wo_xlna_rx_gain_table_2p0,
+- ARRAY_SIZE(ar9462_common_wo_xlna_rx_gain_table_2p0),
+- 2);
++ ar9462_common_wo_xlna_rx_gain_table_2p0);
+ else if (AR_SREV_9550(ah)) {
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar955x_1p0_common_wo_xlna_rx_gain_table,
+- ARRAY_SIZE(ar955x_1p0_common_wo_xlna_rx_gain_table),
+- 2);
++ ar955x_1p0_common_wo_xlna_rx_gain_table);
+ INIT_INI_ARRAY(&ah->ini_modes_rx_gain_bounds,
+- ar955x_1p0_common_wo_xlna_rx_gain_bounds,
+- ARRAY_SIZE(ar955x_1p0_common_wo_xlna_rx_gain_bounds),
+- 5);
++ ar955x_1p0_common_wo_xlna_rx_gain_bounds);
+ } else if (AR_SREV_9580(ah))
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9580_1p0_wo_xlna_rx_gain_table,
+- ARRAY_SIZE(ar9580_1p0_wo_xlna_rx_gain_table),
+- 2);
++ ar9580_1p0_wo_xlna_rx_gain_table);
+ else
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9300Common_wo_xlna_rx_gain_table_2p2,
+- ARRAY_SIZE(ar9300Common_wo_xlna_rx_gain_table_2p2),
+- 2);
++ ar9300Common_wo_xlna_rx_gain_table_2p2);
+ }
+
+ static void ar9003_rx_gain_table_mode2(struct ath_hw *ah)
+ {
+ if (AR_SREV_9462_20(ah))
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9462_common_mixed_rx_gain_table_2p0,
+- ARRAY_SIZE(ar9462_common_mixed_rx_gain_table_2p0), 2);
++ ar9462_common_mixed_rx_gain_table_2p0);
+ }
+
+ static void ar9003_rx_gain_table_apply(struct ath_hw *ah)
+--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
++++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
+@@ -117,8 +117,8 @@ static int ar9003_hw_set_channel(struct
+ ah->is_clk_25mhz) {
+ u32 chan_frac;
+
+- channelSel = (freq * 2) / 75;
+- chan_frac = (((freq * 2) % 75) * 0x20000) / 75;
++ channelSel = freq / 75;
++ chan_frac = ((freq % 75) * 0x20000) / 75;
+ channelSel = (channelSel << 17) | chan_frac;
+ } else {
+ channelSel = CHANSEL_5G(freq);
+--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h
++++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
+@@ -633,6 +633,8 @@
+ #define AR_PHY_65NM_CH0_BIAS2 0x160c4
+ #define AR_PHY_65NM_CH0_BIAS4 0x160cc
+ #define AR_PHY_65NM_CH0_RXTX4 0x1610c
++#define AR_PHY_65NM_CH1_RXTX4 0x1650c
++#define AR_PHY_65NM_CH2_RXTX4 0x1690c
+
+ #define AR_CH0_TOP (AR_SREV_9300(ah) ? 0x16288 : \
+ ((AR_SREV_9462(ah) ? 0x1628c : 0x16280)))
+@@ -876,6 +878,9 @@
+ #define AR_PHY_65NM_CH0_RXTX4_THERM_ON 0x10000000
+ #define AR_PHY_65NM_CH0_RXTX4_THERM_ON_S 28
+
++#define AR_PHY_65NM_RXTX4_XLNA_BIAS 0xC0000000
++#define AR_PHY_65NM_RXTX4_XLNA_BIAS_S 30
++
+ /*
+ * Channel 1 Register Map
+ */
--- a/drivers/net/wireless/ath/ath9k/ath9k.h
+++ b/drivers/net/wireless/ath/ath9k/ath9k.h
-@@ -360,7 +360,7 @@ void ath_tx_aggr_sleep(struct ieee80211_
+@@ -297,6 +297,8 @@ struct ath_tx {
+ struct ath_txq txq[ATH9K_NUM_TX_QUEUES];
+ struct ath_descdma txdma;
+ struct ath_txq *txq_map[WME_NUM_AC];
++ u32 txq_max_pending[WME_NUM_AC];
++ u16 max_aggr_framelen[WME_NUM_AC][4][32];
+ };
+
+ struct ath_rx_edma {
+@@ -341,6 +343,7 @@ int ath_tx_init(struct ath_softc *sc, in
+ void ath_tx_cleanup(struct ath_softc *sc);
+ int ath_txq_update(struct ath_softc *sc, int qnum,
+ struct ath9k_tx_queue_info *q);
++void ath_update_max_aggr_framelen(struct ath_softc *sc, int queue, int txop);
+ int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
+ struct ath_tx_control *txctl);
+ void ath_tx_tasklet(struct ath_softc *sc);
+@@ -360,7 +363,7 @@ void ath_tx_aggr_sleep(struct ieee80211_
struct ath_vif {
int av_bslot;
__le64 tsf_adjust; /* TSF adjustment for staggered beacons */
struct ath_buf *av_bcbuf;
};
-@@ -386,6 +386,7 @@ struct ath_beacon_config {
+@@ -386,6 +389,7 @@ struct ath_beacon_config {
u16 dtim_period;
u16 bmiss_timeout;
u8 dtim_count;
};
struct ath_beacon {
-@@ -397,7 +398,6 @@ struct ath_beacon {
+@@ -397,7 +401,6 @@ struct ath_beacon {
u32 beaconq;
u32 bmisscnt;
u32 bc_tstamp;
struct ieee80211_vif *bslot[ATH_BCBUF];
int slottime;
-@@ -411,12 +411,14 @@ struct ath_beacon {
+@@ -411,12 +414,14 @@ struct ath_beacon {
bool tx_last;
};
void ath9k_set_beaconing_status(struct ath_softc *sc, bool status);
/*******************/
-@@ -442,9 +444,12 @@ void ath_rx_poll(unsigned long data);
+@@ -442,9 +447,12 @@ void ath_rx_poll(unsigned long data);
void ath_start_rx_poll(struct ath_softc *sc, u8 nbeacon);
void ath_paprd_calibrate(struct work_struct *work);
void ath_ani_calibrate(unsigned long data);
/**********/
/* BTCOEX */
-@@ -613,7 +618,6 @@ enum sc_op_flags {
+@@ -619,7 +627,6 @@ enum sc_op_flags {
SC_OP_INVALID,
SC_OP_BEACONS,
SC_OP_RXFLUSH,
- }
- ath9k_ps_restore(sc);
}
+--- a/drivers/net/wireless/ath/ath9k/calib.h
++++ b/drivers/net/wireless/ath/ath9k/calib.h
+@@ -30,10 +30,10 @@ struct ar5416IniArray {
+ u32 ia_columns;
+ };
+
+-#define INIT_INI_ARRAY(iniarray, array, rows, columns) do { \
++#define INIT_INI_ARRAY(iniarray, array) do { \
+ (iniarray)->ia_array = (u32 *)(array); \
+- (iniarray)->ia_rows = (rows); \
+- (iniarray)->ia_columns = (columns); \
++ (iniarray)->ia_rows = ARRAY_SIZE(array); \
++ (iniarray)->ia_columns = ARRAY_SIZE(array[0]); \
+ } while (0)
+
+ #define INI_RA(iniarray, row, column) \
--- a/drivers/net/wireless/ath/ath9k/debug.c
+++ b/drivers/net/wireless/ath/ath9k/debug.c
@@ -206,10 +206,9 @@ static ssize_t write_file_disable_ani(st
}
return count;
+@@ -1556,6 +1555,14 @@ int ath9k_init_debug(struct ath_hw *ah)
+ &fops_interrupt);
+ debugfs_create_file("xmit", S_IRUSR, sc->debug.debugfs_phy, sc,
+ &fops_xmit);
++ debugfs_create_u32("qlen_bk", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
++ &sc->tx.txq_max_pending[WME_AC_BK]);
++ debugfs_create_u32("qlen_be", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
++ &sc->tx.txq_max_pending[WME_AC_BE]);
++ debugfs_create_u32("qlen_vi", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
++ &sc->tx.txq_max_pending[WME_AC_VI]);
++ debugfs_create_u32("qlen_vo", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
++ &sc->tx.txq_max_pending[WME_AC_VO]);
+ debugfs_create_file("stations", S_IRUSR, sc->debug.debugfs_phy, sc,
+ &fops_stations);
+ debugfs_create_file("misc", S_IRUSR, sc->debug.debugfs_phy, sc,
--- a/drivers/net/wireless/ath/ath9k/debug.h
+++ b/drivers/net/wireless/ath/ath9k/debug.h
@@ -32,6 +32,19 @@ struct ath_buf;
struct ath_stats {
struct ath_interrupt_stats istats;
struct ath_tx_stats txstats[ATH9K_NUM_TX_QUEUES];
+--- a/drivers/net/wireless/ath/ath9k/eeprom.h
++++ b/drivers/net/wireless/ath/ath9k/eeprom.h
+@@ -241,16 +241,12 @@ enum eeprom_param {
+ EEP_TEMPSENSE_SLOPE,
+ EEP_TEMPSENSE_SLOPE_PAL_ON,
+ EEP_PWR_TABLE_OFFSET,
+- EEP_DRIVE_STRENGTH,
+- EEP_INTERNAL_REGULATOR,
+- EEP_SWREG,
+ EEP_PAPRD,
+ EEP_MODAL_VER,
+ EEP_ANT_DIV_CTL1,
+ EEP_CHAIN_MASK_REDUCE,
+ EEP_ANTENNA_GAIN_2G,
+ EEP_ANTENNA_GAIN_5G,
+- EEP_QUICK_DROP
+ };
+
+ enum ar5416_rates {
--- a/drivers/net/wireless/ath/ath9k/htc_drv_main.c
+++ b/drivers/net/wireless/ath/ath9k/htc_drv_main.c
@@ -1111,7 +1111,7 @@ static int ath9k_htc_add_interface(struc
ath9k_htc_start_ani(priv);
}
+@@ -1351,7 +1351,7 @@ static int ath9k_htc_conf_tx(struct ieee
+ qi.tqi_aifs = params->aifs;
+ qi.tqi_cwmin = params->cw_min;
+ qi.tqi_cwmax = params->cw_max;
+- qi.tqi_burstTime = params->txop;
++ qi.tqi_burstTime = params->txop * 32;
+
+ qnum = get_hw_qnum(queue, priv->hwq_map);
+
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
-@@ -2908,9 +2908,9 @@ void ath9k_hw_reset_tsf(struct ath_hw *a
+@@ -671,10 +671,6 @@ static int __ath9k_hw_init(struct ath_hw
+ if (!AR_SREV_9300_20_OR_LATER(ah))
+ ah->ani_function &= ~ATH9K_ANI_MRC_CCK;
+
+- /* disable ANI for 9340 */
+- if (AR_SREV_9340(ah))
+- ah->config.enable_ani = false;
+-
+ ath9k_hw_init_mode_regs(ah);
+
+ if (!ah->is_pciexpress)
+@@ -2916,9 +2912,9 @@ void ath9k_hw_reset_tsf(struct ath_hw *a
}
EXPORT_SYMBOL(ath9k_hw_reset_tsf);
ah->misc_mode &= ~AR_PCU_TX_ADD_TSF;
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
-@@ -943,7 +943,7 @@ u32 ath9k_hw_gettsf32(struct ath_hw *ah)
+@@ -994,7 +994,7 @@ u32 ath9k_hw_gettsf32(struct ath_hw *ah)
u64 ath9k_hw_gettsf64(struct ath_hw *ah);
void ath9k_hw_settsf64(struct ath_hw *ah, u64 tsf64);
void ath9k_hw_reset_tsf(struct ath_hw *ah);
void ath9k_hw_set11nmac2040(struct ath_hw *ah);
--- a/drivers/net/wireless/ath/ath9k/init.c
+++ b/drivers/net/wireless/ath/ath9k/init.c
-@@ -560,7 +560,7 @@ static int ath9k_init_softc(u16 devid, s
+@@ -436,6 +436,7 @@ static int ath9k_init_queues(struct ath_
+ for (i = 0; i < WME_NUM_AC; i++) {
+ sc->tx.txq_map[i] = ath_txq_setup(sc, ATH9K_TX_QUEUE_DATA, i);
+ sc->tx.txq_map[i]->mac80211_qnum = i;
++ sc->tx.txq_max_pending[i] = ATH_MAX_QDEPTH;
+ }
+ return 0;
+ }
+@@ -560,7 +561,7 @@ static int ath9k_init_softc(u16 devid, s
spin_lock_init(&sc->debug.samp_lock);
#endif
tasklet_init(&sc->intr_tq, ath9k_tasklet, (unsigned long)sc);
goto out;
}
-@@ -575,6 +566,15 @@ static int ath_reset(struct ath_softc *s
+@@ -586,6 +577,15 @@ static int ath_reset(struct ath_softc *s
return r;
}
void ath_reset_work(struct work_struct *work)
{
struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
-@@ -841,16 +841,6 @@ bool ath9k_uses_beacons(int type)
+@@ -852,16 +852,6 @@ bool ath9k_uses_beacons(int type)
}
}
static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
{
struct ath9k_vif_iter_data *iter_data = data;
-@@ -918,18 +908,14 @@ static void ath9k_calculate_summary_stat
+@@ -929,18 +919,14 @@ static void ath9k_calculate_summary_stat
ath9k_calculate_iter_data(hw, vif, &iter_data);
if (iter_data.nmeshes)
ah->opmode = NL80211_IFTYPE_MESH_POINT;
-@@ -941,45 +927,14 @@ static void ath9k_calculate_summary_stat
+@@ -952,45 +938,14 @@ static void ath9k_calculate_summary_stat
ah->opmode = NL80211_IFTYPE_STATION;
}
}
static int ath9k_add_interface(struct ieee80211_hw *hw,
-@@ -1021,7 +976,10 @@ static int ath9k_add_interface(struct ie
+@@ -1032,7 +987,10 @@ static int ath9k_add_interface(struct ie
sc->nvifs++;
out:
mutex_unlock(&sc->mutex);
ath9k_ps_restore(sc);
-@@ -1038,6 +996,7 @@ static int ath9k_change_interface(struct
+@@ -1049,6 +1007,7 @@ static int ath9k_change_interface(struct
int ret = 0;
ath_dbg(common, CONFIG, "Change Interface\n");
mutex_lock(&sc->mutex);
ath9k_ps_wakeup(sc);
-@@ -1050,15 +1009,16 @@ static int ath9k_change_interface(struct
+@@ -1061,15 +1020,16 @@ static int ath9k_change_interface(struct
}
}
out:
ath9k_ps_restore(sc);
mutex_unlock(&sc->mutex);
-@@ -1078,9 +1038,8 @@ static void ath9k_remove_interface(struc
+@@ -1089,9 +1049,8 @@ static void ath9k_remove_interface(struc
sc->nvifs--;
ath9k_calculate_summary_state(hw, NULL);
-@@ -1388,10 +1347,6 @@ static int ath9k_conf_tx(struct ieee8021
+@@ -1388,21 +1347,18 @@ static int ath9k_conf_tx(struct ieee8021
+ qi.tqi_aifs = params->aifs;
+ qi.tqi_cwmin = params->cw_min;
+ qi.tqi_cwmax = params->cw_max;
+- qi.tqi_burstTime = params->txop;
++ qi.tqi_burstTime = params->txop * 32;
+
+ ath_dbg(common, CONFIG,
+ "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
+ queue, txq->axq_qnum, params->aifs, params->cw_min,
+ params->cw_max, params->txop);
+
++ ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime);
+ ret = ath_txq_update(sc, txq->axq_qnum, &qi);
if (ret)
ath_err(common, "TXQ Update failed\n");
mutex_unlock(&sc->mutex);
ath9k_ps_restore(sc);
-@@ -1460,85 +1415,36 @@ static int ath9k_set_key(struct ieee8021
+@@ -1471,85 +1427,36 @@ static int ath9k_set_key(struct ieee8021
return ret;
}
}
}
-@@ -1547,6 +1453,11 @@ static void ath9k_bss_info_changed(struc
+@@ -1558,6 +1465,11 @@ static void ath9k_bss_info_changed(struc
struct ieee80211_bss_conf *bss_conf,
u32 changed)
{
struct ath_softc *sc = hw->priv;
struct ath_hw *ah = sc->sc_ah;
struct ath_common *common = ath9k_hw_common(ah);
-@@ -1557,53 +1468,43 @@ static void ath9k_bss_info_changed(struc
+@@ -1568,53 +1480,43 @@ static void ath9k_bss_info_changed(struc
mutex_lock(&sc->mutex);
if (changed & BSS_CHANGED_ASSOC) {
}
if (changed & BSS_CHANGED_ERP_SLOT) {
-@@ -1625,8 +1526,13 @@ static void ath9k_bss_info_changed(struc
+@@ -1636,8 +1538,13 @@ static void ath9k_bss_info_changed(struc
}
}
}
static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
-@@ -1855,10 +1761,11 @@ static int ath9k_tx_last_beacon(struct i
+@@ -1866,10 +1773,11 @@ static int ath9k_tx_last_beacon(struct i
if (!vif)
return 0;
if (!sc->beacon.tx_processed && !edma) {
tasklet_disable(&sc->bcon_tasklet);
+@@ -1923,12 +1831,29 @@ static u32 fill_chainmask(u32 cap, u32 n
+ return filled;
+ }
+
++static bool validate_antenna_mask(struct ath_hw *ah, u32 val)
++{
++ switch (val & 0x7) {
++ case 0x1:
++ case 0x3:
++ case 0x7:
++ return true;
++ case 0x2:
++ return (ah->caps.rx_chainmask == 1);
++ default:
++ return false;
++ }
++}
++
+ static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
+ {
+ struct ath_softc *sc = hw->priv;
+ struct ath_hw *ah = sc->sc_ah;
+
+- if (!rx_ant || !tx_ant)
++ if (ah->caps.rx_chainmask != 1)
++ rx_ant |= tx_ant;
++
++ if (!validate_antenna_mask(ah, rx_ant) || !tx_ant)
+ return -EINVAL;
+
+ sc->ant_rx = rx_ant;
--- a/drivers/net/wireless/ath/ath9k/mci.c
+++ b/drivers/net/wireless/ath/ath9k/mci.c
@@ -202,7 +202,7 @@ static void ath_mci_cal_msg(struct ath_s
if (ath_beacon_dtim_pending_cab(skb)) {
--- a/drivers/net/wireless/ath/ath9k/xmit.c
+++ b/drivers/net/wireless/ath/ath9k/xmit.c
-@@ -614,10 +614,8 @@ static void ath_tx_complete_aggr(struct
+@@ -29,6 +29,8 @@
+ #define HT_LTF(_ns) (4 * (_ns))
+ #define SYMBOL_TIME(_ns) ((_ns) << 2) /* ns * 4 us */
+ #define SYMBOL_TIME_HALFGI(_ns) (((_ns) * 18 + 4) / 5) /* ns * 3.6 us */
++#define TIME_SYMBOLS(t) ((t) >> 2)
++#define TIME_SYMBOLS_HALFGI(t) (((t) * 5 - 4) / 18)
+ #define NUM_SYMBOLS_PER_USEC(_usec) (_usec >> 2)
+ #define NUM_SYMBOLS_PER_USEC_HALFGI(_usec) (((_usec*5)-4)/18)
+
+@@ -74,33 +76,6 @@ enum {
+ MCS_HT40_SGI,
+ };
+
+-static int ath_max_4ms_framelen[4][32] = {
+- [MCS_HT20] = {
+- 3212, 6432, 9648, 12864, 19300, 25736, 28952, 32172,
+- 6424, 12852, 19280, 25708, 38568, 51424, 57852, 64280,
+- 9628, 19260, 28896, 38528, 57792, 65532, 65532, 65532,
+- 12828, 25656, 38488, 51320, 65532, 65532, 65532, 65532,
+- },
+- [MCS_HT20_SGI] = {
+- 3572, 7144, 10720, 14296, 21444, 28596, 32172, 35744,
+- 7140, 14284, 21428, 28568, 42856, 57144, 64288, 65532,
+- 10700, 21408, 32112, 42816, 64228, 65532, 65532, 65532,
+- 14256, 28516, 42780, 57040, 65532, 65532, 65532, 65532,
+- },
+- [MCS_HT40] = {
+- 6680, 13360, 20044, 26724, 40092, 53456, 60140, 65532,
+- 13348, 26700, 40052, 53400, 65532, 65532, 65532, 65532,
+- 20004, 40008, 60016, 65532, 65532, 65532, 65532, 65532,
+- 26644, 53292, 65532, 65532, 65532, 65532, 65532, 65532,
+- },
+- [MCS_HT40_SGI] = {
+- 7420, 14844, 22272, 29696, 44544, 59396, 65532, 65532,
+- 14832, 29668, 44504, 59340, 65532, 65532, 65532, 65532,
+- 22232, 44464, 65532, 65532, 65532, 65532, 65532, 65532,
+- 29616, 59232, 65532, 65532, 65532, 65532, 65532, 65532,
+- }
+-};
+-
+ /*********************/
+ /* Aggregation logic */
+ /*********************/
+@@ -614,10 +589,8 @@ static void ath_tx_complete_aggr(struct
rcu_read_unlock();
}
static bool ath_lookup_legacy(struct ath_buf *bf)
-@@ -1586,7 +1584,8 @@ void ath_txq_schedule(struct ath_softc *
+@@ -650,6 +623,7 @@ static u32 ath_lookup_rate(struct ath_so
+ struct ieee80211_tx_rate *rates;
+ u32 max_4ms_framelen, frmlen;
+ u16 aggr_limit, bt_aggr_limit, legacy = 0;
++ int q = tid->ac->txq->mac80211_qnum;
+ int i;
+
+ skb = bf->bf_mpdu;
+@@ -658,8 +632,7 @@ static u32 ath_lookup_rate(struct ath_so
+
+ /*
+ * Find the lowest frame length among the rate series that will have a
+- * 4ms transmit duration.
+- * TODO - TXOP limit needs to be considered.
++ * 4ms (or TXOP limited) transmit duration.
+ */
+ max_4ms_framelen = ATH_AMPDU_LIMIT_MAX;
+
+@@ -682,7 +655,7 @@ static u32 ath_lookup_rate(struct ath_so
+ if (rates[i].flags & IEEE80211_TX_RC_SHORT_GI)
+ modeidx++;
+
+- frmlen = ath_max_4ms_framelen[modeidx][rates[i].idx];
++ frmlen = sc->tx.max_aggr_framelen[q][modeidx][rates[i].idx];
+ max_4ms_framelen = min(max_4ms_framelen, frmlen);
+ }
+
+@@ -929,6 +902,44 @@ static u32 ath_pkt_duration(struct ath_s
+ return duration;
+ }
+
++static int ath_max_framelen(int usec, int mcs, bool ht40, bool sgi)
++{
++ int streams = HT_RC_2_STREAMS(mcs);
++ int symbols, bits;
++ int bytes = 0;
++
++ symbols = sgi ? TIME_SYMBOLS_HALFGI(usec) : TIME_SYMBOLS(usec);
++ bits = symbols * bits_per_symbol[mcs % 8][ht40] * streams;
++ bits -= OFDM_PLCP_BITS;
++ bytes = bits / 8;
++ bytes -= L_STF + L_LTF + L_SIG + HT_SIG + HT_STF + HT_LTF(streams);
++ if (bytes > 65532)
++ bytes = 65532;
++
++ return bytes;
++}
++
++void ath_update_max_aggr_framelen(struct ath_softc *sc, int queue, int txop)
++{
++ u16 *cur_ht20, *cur_ht20_sgi, *cur_ht40, *cur_ht40_sgi;
++ int mcs;
++
++ /* 4ms is the default (and maximum) duration */
++ if (!txop || txop > 4096)
++ txop = 4096;
++
++ cur_ht20 = sc->tx.max_aggr_framelen[queue][MCS_HT20];
++ cur_ht20_sgi = sc->tx.max_aggr_framelen[queue][MCS_HT20_SGI];
++ cur_ht40 = sc->tx.max_aggr_framelen[queue][MCS_HT40];
++ cur_ht40_sgi = sc->tx.max_aggr_framelen[queue][MCS_HT40_SGI];
++ for (mcs = 0; mcs < 32; mcs++) {
++ cur_ht20[mcs] = ath_max_framelen(txop, mcs, false, false);
++ cur_ht20_sgi[mcs] = ath_max_framelen(txop, mcs, false, true);
++ cur_ht40[mcs] = ath_max_framelen(txop, mcs, true, false);
++ cur_ht40_sgi[mcs] = ath_max_framelen(txop, mcs, true, true);
++ }
++}
++
+ static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf,
+ struct ath_tx_info *info, int len)
+ {
+@@ -1586,7 +1597,8 @@ void ath_txq_schedule(struct ath_softc *
struct ath_atx_ac *ac, *ac_tmp, *last_ac;
struct ath_atx_tid *tid, *last_tid;
txq->axq_ampdu_depth >= ATH_AGGR_MIN_QDEPTH)
return;
-@@ -2191,7 +2190,7 @@ static void ath_tx_processq(struct ath_s
+@@ -1988,7 +2000,8 @@ int ath_tx_start(struct ieee80211_hw *hw
+
+ ath_txq_lock(sc, txq);
+ if (txq == sc->tx.txq_map[q] &&
+- ++txq->pending_frames > ATH_MAX_QDEPTH && !txq->stopped) {
++ ++txq->pending_frames > sc->tx.txq_max_pending[q] &&
++ !txq->stopped) {
+ ieee80211_stop_queue(sc->hw, q);
+ txq->stopped = true;
+ }
+@@ -2047,7 +2060,8 @@ static void ath_tx_complete(struct ath_s
+ if (WARN_ON(--txq->pending_frames < 0))
+ txq->pending_frames = 0;
+
+- if (txq->stopped && txq->pending_frames < ATH_MAX_QDEPTH) {
++ if (txq->stopped &&
++ txq->pending_frames < sc->tx.txq_max_pending[q]) {
+ ieee80211_wake_queue(sc->hw, q);
+ txq->stopped = false;
+ }
+@@ -2191,7 +2205,7 @@ static void ath_tx_processq(struct ath_s
ath_txq_lock(sc, txq);
for (;;) {
break;
if (list_empty(&txq->axq_q)) {
-@@ -2274,7 +2273,7 @@ void ath_tx_edma_tasklet(struct ath_soft
+@@ -2274,7 +2288,7 @@ void ath_tx_edma_tasklet(struct ath_soft
int status;
for (;;) {
break;
status = ath9k_hw_txprocdesc(ah, NULL, (void *)&ts);
---- a/include/net/mac80211.h
-+++ b/include/net/mac80211.h
-@@ -3596,22 +3596,6 @@ void ieee80211_request_smps(struct ieee8
- enum ieee80211_smps_mode smps_mode);
+--- a/drivers/net/wireless/b43/xmit.c
++++ b/drivers/net/wireless/b43/xmit.c
+@@ -663,7 +663,7 @@ void b43_rx(struct b43_wldev *dev, struc
+ u32 uninitialized_var(macstat);
+ u16 chanid;
+ u16 phytype;
+- int padding;
++ int padding, rate_idx;
+
+ memset(&status, 0, sizeof(status));
+
+@@ -766,16 +766,17 @@ void b43_rx(struct b43_wldev *dev, struc
+ }
- /**
-- * ieee80211_key_removed - disable hw acceleration for key
-- * @key_conf: The key hw acceleration should be disabled for
-- *
-- * This allows drivers to indicate that the given key has been
-- * removed from hardware acceleration, due to a new key that
-- * was added. Don't use this if the key can continue to be used
-- * for TX, if the key restriction is on RX only it is permitted
-- * to keep the key for TX only and not call this function.
-- *
-- * Due to locking constraints, it may only be called during
-- * @set_key. This function must be allowed to sleep, and the
-- * key it tries to disable may still be used until it returns.
-- */
--void ieee80211_key_removed(struct ieee80211_key_conf *key_conf);
--
--/**
- * ieee80211_ready_on_channel - notification of remain-on-channel start
- * @hw: pointer as obtained from ieee80211_alloc_hw()
+ if (phystat0 & B43_RX_PHYST0_OFDM)
+- status.rate_idx = b43_plcp_get_bitrate_idx_ofdm(plcp,
++ rate_idx = b43_plcp_get_bitrate_idx_ofdm(plcp,
+ phytype == B43_PHYTYPE_A);
+ else
+- status.rate_idx = b43_plcp_get_bitrate_idx_cck(plcp);
+- if (unlikely(status.rate_idx == -1)) {
++ rate_idx = b43_plcp_get_bitrate_idx_cck(plcp);
++ if (unlikely(rate_idx == -1)) {
+ /* PLCP seems to be corrupted.
+ * Drop the frame, if we are not interested in corrupted frames. */
+ if (!(dev->wl->filter_flags & FIF_PLCPFAIL))
+ goto drop;
+ }
++ status.rate_idx = rate_idx;
+ status.antenna = !!(phystat0 & B43_RX_PHYST0_ANT);
+
+ /*
+--- a/drivers/net/wireless/libertas/cfg.c
++++ b/drivers/net/wireless/libertas/cfg.c
+@@ -2182,13 +2182,15 @@ int lbs_reg_notifier(struct wiphy *wiphy
+ struct regulatory_request *request)
+ {
+ struct lbs_private *priv = wiphy_priv(wiphy);
+- int ret;
++ int ret = 0;
+
+ lbs_deb_enter_args(LBS_DEB_CFG80211, "cfg80211 regulatory domain "
+ "callback for domain %c%c\n", request->alpha2[0],
+ request->alpha2[1]);
+
+- ret = lbs_set_11d_domain_info(priv, request, wiphy->bands);
++ memcpy(priv->country_code, request->alpha2, sizeof(request->alpha2));
++ if (lbs_iface_active(priv))
++ ret = lbs_set_11d_domain_info(priv);
+
+ lbs_deb_leave(LBS_DEB_CFG80211);
+ return ret;
+--- a/drivers/net/wireless/libertas/cmd.c
++++ b/drivers/net/wireless/libertas/cmd.c
+@@ -733,15 +733,13 @@ int lbs_get_rssi(struct lbs_private *pri
+ * to the firmware
+ *
+ * @priv: pointer to &struct lbs_private
+- * @request: cfg80211 regulatory request structure
+- * @bands: the device's supported bands and channels
+ *
+ * returns: 0 on success, error code on failure
+ */
+-int lbs_set_11d_domain_info(struct lbs_private *priv,
+- struct regulatory_request *request,
+- struct ieee80211_supported_band **bands)
++int lbs_set_11d_domain_info(struct lbs_private *priv)
+ {
++ struct wiphy *wiphy = priv->wdev->wiphy;
++ struct ieee80211_supported_band **bands = wiphy->bands;
+ struct cmd_ds_802_11d_domain_info cmd;
+ struct mrvl_ie_domain_param_set *domain = &cmd.domain;
+ struct ieee80211_country_ie_triplet *t;
+@@ -752,21 +750,23 @@ int lbs_set_11d_domain_info(struct lbs_p
+ u8 first_channel = 0, next_chan = 0, max_pwr = 0;
+ u8 i, flag = 0;
+ size_t triplet_size;
+- int ret;
++ int ret = 0;
+
+ lbs_deb_enter(LBS_DEB_11D);
++ if (!priv->country_code[0])
++ goto out;
+
+ memset(&cmd, 0, sizeof(cmd));
+ cmd.action = cpu_to_le16(CMD_ACT_SET);
+
+ lbs_deb_11d("Setting country code '%c%c'\n",
+- request->alpha2[0], request->alpha2[1]);
++ priv->country_code[0], priv->country_code[1]);
+
+ domain->header.type = cpu_to_le16(TLV_TYPE_DOMAIN);
+
+ /* Set country code */
+- domain->country_code[0] = request->alpha2[0];
+- domain->country_code[1] = request->alpha2[1];
++ domain->country_code[0] = priv->country_code[0];
++ domain->country_code[1] = priv->country_code[1];
+ domain->country_code[2] = ' ';
+
+ /* Now set up the channel triplets; firmware is somewhat picky here
+@@ -848,6 +848,7 @@ int lbs_set_11d_domain_info(struct lbs_p
+
+ ret = lbs_cmd_with_response(priv, CMD_802_11D_DOMAIN_INFO, &cmd);
+
++out:
+ lbs_deb_leave_args(LBS_DEB_11D, "ret %d", ret);
+ return ret;
+ }
+@@ -1019,9 +1020,9 @@ static void lbs_submit_command(struct lb
+ if (ret) {
+ netdev_info(priv->dev, "DNLD_CMD: hw_host_to_card failed: %d\n",
+ ret);
+- /* Let the timer kick in and retry, and potentially reset
+- the whole thing if the condition persists */
+- timeo = HZ/4;
++ /* Reset dnld state machine, report failure */
++ priv->dnld_sent = DNLD_RES_RECEIVED;
++ lbs_complete_command(priv, cmdnode, ret);
+ }
+
+ if (command == CMD_802_11_DEEP_SLEEP) {
+--- a/drivers/net/wireless/libertas/cmd.h
++++ b/drivers/net/wireless/libertas/cmd.h
+@@ -128,9 +128,7 @@ int lbs_set_monitor_mode(struct lbs_priv
+
+ int lbs_get_rssi(struct lbs_private *priv, s8 *snr, s8 *nf);
+
+-int lbs_set_11d_domain_info(struct lbs_private *priv,
+- struct regulatory_request *request,
+- struct ieee80211_supported_band **bands);
++int lbs_set_11d_domain_info(struct lbs_private *priv);
+
+ int lbs_get_reg(struct lbs_private *priv, u16 reg, u16 offset, u32 *value);
+
+--- a/drivers/net/wireless/libertas/dev.h
++++ b/drivers/net/wireless/libertas/dev.h
+@@ -49,6 +49,7 @@ struct lbs_private {
+ bool wiphy_registered;
+ struct cfg80211_scan_request *scan_req;
+ u8 assoc_bss[ETH_ALEN];
++ u8 country_code[IEEE80211_COUNTRY_STRING_LEN];
+ u8 disassoc_reason;
+
+ /* Mesh */
+--- a/drivers/net/wireless/libertas/if_usb.c
++++ b/drivers/net/wireless/libertas/if_usb.c
+@@ -311,7 +311,6 @@ static void if_usb_disconnect(struct usb
+ cardp->surprise_removed = 1;
+
+ if (priv) {
+- priv->surpriseremoved = 1;
+ lbs_stop_card(priv);
+ lbs_remove_card(priv);
+ }
+--- a/drivers/net/wireless/libertas/main.c
++++ b/drivers/net/wireless/libertas/main.c
+@@ -154,6 +154,12 @@ int lbs_start_iface(struct lbs_private *
+ goto err;
+ }
+
++ ret = lbs_set_11d_domain_info(priv);
++ if (ret) {
++ lbs_deb_net("set 11d domain info failed\n");
++ goto err;
++ }
++
+ lbs_update_channel(priv);
+
+ priv->iface_running = true;
+--- a/include/net/cfg80211.h
++++ b/include/net/cfg80211.h
+@@ -1504,8 +1504,6 @@ struct cfg80211_gtk_rekey_data {
+ * interfaces are active this callback should reject the configuration.
+ * If no interfaces are active or the device is down, the channel should
+ * be stored for when a monitor interface becomes active.
+- * @set_monitor_enabled: Notify driver that there are only monitor
+- * interfaces running.
+ *
+ * @scan: Request to do a scan. If returning zero, the scan request is given
+ * the driver, and will be valid until passed to cfg80211_scan_done().
+@@ -1612,6 +1610,10 @@ struct cfg80211_gtk_rekey_data {
+ * @get_et_strings: Ethtool API to get a set of strings to describe stats
+ * and perhaps other supported types of ethtool data-sets.
+ * See @ethtool_ops.get_strings
++ *
++ * @get_channel: Get the current operating channel for the virtual interface.
++ * For monitor interfaces, it should return %NULL unless there's a single
++ * current monitoring channel.
*/
+ struct cfg80211_ops {
+ int (*suspend)(struct wiphy *wiphy, struct cfg80211_wowlan *wow);
+@@ -1820,7 +1822,10 @@ struct cfg80211_ops {
+ void (*get_et_strings)(struct wiphy *wiphy, struct net_device *dev,
+ u32 sset, u8 *data);
+
+- void (*set_monitor_enabled)(struct wiphy *wiphy, bool enabled);
++ struct ieee80211_channel *
++ (*get_channel)(struct wiphy *wiphy,
++ struct wireless_dev *wdev,
++ enum nl80211_channel_type *type);
+ };
+
+ /*
--- a/net/mac80211/agg-rx.c
+++ b/net/mac80211/agg-rx.c
@@ -203,6 +203,8 @@ static void ieee80211_send_addba_resp(st
memcpy(mgmt->bssid, sdata->vif.addr, ETH_ALEN);
else if (sdata->vif.type == NL80211_IFTYPE_STATION)
memcpy(mgmt->bssid, sdata->u.mgd.bssid, ETH_ALEN);
-@@ -459,6 +460,7 @@ int ieee80211_start_tx_ba_session(struct
+@@ -460,6 +461,7 @@ int ieee80211_start_tx_ba_session(struct
sdata->vif.type != NL80211_IFTYPE_MESH_POINT &&
sdata->vif.type != NL80211_IFTYPE_AP_VLAN &&
sdata->vif.type != NL80211_IFTYPE_AP &&
--- a/net/mac80211/cfg.c
+++ b/net/mac80211/cfg.c
-@@ -1741,6 +1741,8 @@ static int ieee80211_set_txq_params(stru
- return -EINVAL;
- }
-
-+ ieee80211_bss_info_change_notify(sdata, BSS_CHANGED_QOS);
-+
+@@ -2982,14 +2982,14 @@ static int ieee80211_probe_client(struct
return 0;
}
+-static void ieee80211_set_monitor_enabled(struct wiphy *wiphy, bool enabled)
++static struct ieee80211_channel *
++ieee80211_cfg_get_channel(struct wiphy *wiphy, struct wireless_dev *wdev,
++ enum nl80211_channel_type *type)
+ {
+ struct ieee80211_local *local = wiphy_priv(wiphy);
+
+- if (enabled)
+- WARN_ON(ieee80211_add_virtual_monitor(local));
+- else
+- ieee80211_del_virtual_monitor(local);
++ *type = local->_oper_channel_type;
++ return local->oper_channel;
+ }
+
+ #ifdef CONFIG_PM
+@@ -3066,11 +3066,11 @@ struct cfg80211_ops mac80211_config_ops
+ .tdls_mgmt = ieee80211_tdls_mgmt,
+ .probe_client = ieee80211_probe_client,
+ .set_noack_map = ieee80211_set_noack_map,
+- .set_monitor_enabled = ieee80211_set_monitor_enabled,
+ #ifdef CONFIG_PM
+ .set_wakeup = ieee80211_set_wakeup,
+ #endif
+ .get_et_sset_count = ieee80211_get_et_sset_count,
+ .get_et_stats = ieee80211_get_et_stats,
+ .get_et_strings = ieee80211_get_et_strings,
++ .get_channel = ieee80211_cfg_get_channel,
+ };
--- a/net/mac80211/debugfs_sta.c
+++ b/net/mac80211/debugfs_sta.c
@@ -63,11 +63,11 @@ static ssize_t sta_flags_read(struct fil
TEST(MFP), TEST(BLOCK_BA), TEST(PSPOLL),
TEST(UAPSD), TEST(SP), TEST(TDLS_PEER),
TEST(TDLS_PEER_AUTH), TEST(4ADDR_EVENT),
+--- a/net/mac80211/ieee80211_i.h
++++ b/net/mac80211/ieee80211_i.h
+@@ -1496,10 +1496,6 @@ int ieee80211_add_srates_ie(struct ieee8
+ int ieee80211_add_ext_srates_ie(struct ieee80211_sub_if_data *sdata,
+ struct sk_buff *skb, bool need_basic);
+
+-/* virtual monitor */
+-int ieee80211_add_virtual_monitor(struct ieee80211_local *local);
+-void ieee80211_del_virtual_monitor(struct ieee80211_local *local);
+-
+ /* channel management */
+ enum ieee80211_chan_mode {
+ CHAN_MODE_UNDEFINED,
--- a/net/mac80211/iface.c
+++ b/net/mac80211/iface.c
-@@ -400,7 +400,6 @@ static int ieee80211_do_open(struct net_
+@@ -331,7 +331,7 @@ static void ieee80211_set_default_queues
+ sdata->vif.cab_queue = IEEE80211_INVAL_HW_QUEUE;
+ }
+
+-int ieee80211_add_virtual_monitor(struct ieee80211_local *local)
++static int ieee80211_add_virtual_monitor(struct ieee80211_local *local)
+ {
+ struct ieee80211_sub_if_data *sdata;
+ int ret = 0;
+@@ -377,7 +377,7 @@ int ieee80211_add_virtual_monitor(struct
+ return ret;
+ }
+
+-void ieee80211_del_virtual_monitor(struct ieee80211_local *local)
++static void ieee80211_del_virtual_monitor(struct ieee80211_local *local)
+ {
+ struct ieee80211_sub_if_data *sdata;
+
+@@ -410,7 +410,6 @@ static int ieee80211_do_open(struct net_
{
struct ieee80211_sub_if_data *sdata = IEEE80211_DEV_TO_SUB_IF(dev);
struct ieee80211_local *local = sdata->local;
u32 changed = 0;
int res;
u32 hw_reconf_flags = 0;
-@@ -538,28 +537,6 @@ static int ieee80211_do_open(struct net_
+@@ -497,6 +496,12 @@ static int ieee80211_do_open(struct net_
+ break;
+ }
+
++ if (local->monitors == 0 && local->open_count == 0) {
++ res = ieee80211_add_virtual_monitor(local);
++ if (res)
++ goto err_stop;
++ }
++
+ /* must be before the call to ieee80211_configure_filter */
+ local->monitors++;
+ if (local->monitors == 1) {
+@@ -511,6 +516,8 @@ static int ieee80211_do_open(struct net_
+ break;
+ default:
+ if (coming_up) {
++ ieee80211_del_virtual_monitor(local);
++
+ res = drv_add_interface(local, sdata);
+ if (res)
+ goto err_stop;
+@@ -548,28 +555,6 @@ static int ieee80211_do_open(struct net_
set_bit(SDATA_STATE_RUNNING, &sdata->state);
/*
* set_multicast_list will be invoked by the networking core
* which will check whether any increments here were done in
-@@ -949,6 +926,72 @@ static void ieee80211_if_setup(struct ne
+@@ -750,6 +735,7 @@ static void ieee80211_do_stop(struct iee
+ if (local->monitors == 0) {
+ local->hw.conf.flags &= ~IEEE80211_CONF_MONITOR;
+ hw_reconf_flags |= IEEE80211_CONF_CHANGE_MONITOR;
++ ieee80211_del_virtual_monitor(local);
+ }
+
+ ieee80211_adjust_monitor_flags(sdata, -1);
+@@ -823,6 +809,9 @@ static void ieee80211_do_stop(struct iee
+ }
+ }
+ spin_unlock_irqrestore(&local->queue_stop_reason_lock, flags);
++
++ if (local->monitors == local->open_count && local->monitors > 0)
++ ieee80211_add_virtual_monitor(local);
+ }
+
+ static int ieee80211_stop(struct net_device *dev)
+@@ -959,6 +948,72 @@ static void ieee80211_if_setup(struct ne
dev->destructor = free_netdev;
}
static void ieee80211_iface_work(struct work_struct *work)
{
struct ieee80211_sub_if_data *sdata =
-@@ -1053,6 +1096,9 @@ static void ieee80211_iface_work(struct
+@@ -1063,6 +1118,9 @@ static void ieee80211_iface_work(struct
break;
ieee80211_mesh_rx_queued_mgmt(sdata, skb);
break;
default:
WARN(1, "frame for unexpected interface type");
break;
---- a/net/mac80211/key.c
-+++ b/net/mac80211/key.c
-@@ -197,26 +197,6 @@ static void ieee80211_key_disable_hw_acc
- key->flags &= ~KEY_FLAG_UPLOADED_TO_HARDWARE;
- }
-
--void ieee80211_key_removed(struct ieee80211_key_conf *key_conf)
--{
-- struct ieee80211_key *key;
--
-- key = container_of(key_conf, struct ieee80211_key, conf);
--
-- might_sleep();
-- assert_key_lock(key->local);
--
-- key->flags &= ~KEY_FLAG_UPLOADED_TO_HARDWARE;
--
-- /*
-- * Flush TX path to avoid attempts to use this key
-- * after this function returns. Until then, drivers
-- * must be prepared to handle the key.
-- */
-- synchronize_rcu();
--}
--EXPORT_SYMBOL_GPL(ieee80211_key_removed);
--
- static void __ieee80211_set_default_key(struct ieee80211_sub_if_data *sdata,
- int idx, bool uni, bool multi)
- {
---- a/net/mac80211/mlme.c
-+++ b/net/mac80211/mlme.c
-@@ -1108,7 +1108,7 @@ void ieee80211_dynamic_ps_timer(unsigned
- }
-
- /* MLME */
--static void ieee80211_sta_wmm_params(struct ieee80211_local *local,
-+static bool ieee80211_sta_wmm_params(struct ieee80211_local *local,
- struct ieee80211_sub_if_data *sdata,
- u8 *wmm_param, size_t wmm_param_len)
- {
-@@ -1119,23 +1119,23 @@ static void ieee80211_sta_wmm_params(str
- u8 *pos, uapsd_queues = 0;
-
- if (!local->ops->conf_tx)
-- return;
-+ return false;
-
- if (local->hw.queues < IEEE80211_NUM_ACS)
-- return;
-+ return false;
-
- if (!wmm_param)
-- return;
-+ return false;
-
- if (wmm_param_len < 8 || wmm_param[5] /* version */ != 1)
-- return;
-+ return false;
+--- a/net/mac80211/offchannel.c
++++ b/net/mac80211/offchannel.c
+@@ -324,6 +324,7 @@ void ieee80211_sw_roc_work(struct work_s
+ container_of(work, struct ieee80211_roc_work, work.work);
+ struct ieee80211_sub_if_data *sdata = roc->sdata;
+ struct ieee80211_local *local = sdata->local;
++ bool started;
- if (ifmgd->flags & IEEE80211_STA_UAPSD_ENABLED)
- uapsd_queues = ifmgd->uapsd_queues;
+ mutex_lock(&local->mtx);
- count = wmm_param[6] & 0x0f;
- if (count == ifmgd->wmm_last_param_set)
-- return;
-+ return false;
- ifmgd->wmm_last_param_set = count;
+@@ -366,9 +367,10 @@ void ieee80211_sw_roc_work(struct work_s
+ /* finish this ROC */
+ finish:
+ list_del(&roc->list);
++ started = roc->started;
+ ieee80211_roc_notify_destroy(roc);
- pos = wmm_param + 8;
-@@ -1202,6 +1202,7 @@ static void ieee80211_sta_wmm_params(str
+- if (roc->started) {
++ if (started) {
+ drv_flush(local, false);
- /* enable WMM or activate new settings */
- sdata->vif.bss_conf.qos = true;
-+ return true;
- }
+ local->tmp_channel = NULL;
+@@ -379,7 +381,7 @@ void ieee80211_sw_roc_work(struct work_s
- static void __ieee80211_stop_poll(struct ieee80211_sub_if_data *sdata)
-@@ -2435,14 +2436,6 @@ static void ieee80211_rx_mgmt_beacon(str
- directed_tim = ieee80211_check_tim(elems.tim, elems.tim_len,
- ifmgd->aid);
+ ieee80211_recalc_idle(local);
-- if (ncrc != ifmgd->beacon_crc || !ifmgd->beacon_crc_valid) {
-- ieee80211_rx_bss_info(sdata, mgmt, len, rx_status, &elems,
-- true);
--
-- ieee80211_sta_wmm_params(local, sdata, elems.wmm_param,
-- elems.wmm_param_len);
-- }
--
- if (local->hw.flags & IEEE80211_HW_PS_NULLFUNC_STACK) {
- if (directed_tim) {
- if (local->hw.conf.dynamic_ps_timeout > 0) {
-@@ -2473,6 +2466,13 @@ static void ieee80211_rx_mgmt_beacon(str
- ifmgd->beacon_crc = ncrc;
- ifmgd->beacon_crc_valid = true;
-
-+ ieee80211_rx_bss_info(sdata, mgmt, len, rx_status, &elems,
-+ true);
-+
-+ if (ieee80211_sta_wmm_params(local, sdata, elems.wmm_param,
-+ elems.wmm_param_len))
-+ changed |= BSS_CHANGED_QOS;
-+
- if (elems.erp_info && elems.erp_info_len >= 1) {
- erp_valid = true;
- erp_value = elems.erp_info[0];
---- a/net/mac80211/rc80211_minstrel_ht.c
-+++ b/net/mac80211/rc80211_minstrel_ht.c
-@@ -626,8 +626,12 @@ minstrel_ht_get_rate(void *priv, struct
-
- #ifdef CONFIG_MAC80211_DEBUGFS
- /* use fixed index if set */
-- if (mp->fixed_rate_idx != -1)
-- sample_idx = mp->fixed_rate_idx;
-+ if (mp->fixed_rate_idx != -1) {
-+ mi->max_tp_rate = mp->fixed_rate_idx;
-+ mi->max_tp_rate2 = mp->fixed_rate_idx;
-+ mi->max_prob_rate = mp->fixed_rate_idx;
-+ sample_idx = -1;
-+ }
- #endif
+- if (roc->started)
++ if (started)
+ ieee80211_start_next_roc(local);
+ }
- if (sample_idx >= 0) {
--- a/net/mac80211/rx.c
+++ b/net/mac80211/rx.c
-@@ -2262,6 +2262,7 @@ ieee80211_rx_h_action(struct ieee80211_r
+@@ -2239,6 +2239,7 @@ ieee80211_rx_h_action(struct ieee80211_r
sdata->vif.type != NL80211_IFTYPE_MESH_POINT &&
sdata->vif.type != NL80211_IFTYPE_AP_VLAN &&
sdata->vif.type != NL80211_IFTYPE_AP &&
sdata->vif.type != NL80211_IFTYPE_ADHOC)
break;
-@@ -2479,14 +2480,15 @@ ieee80211_rx_h_mgmt(struct ieee80211_rx_
+@@ -2456,14 +2457,15 @@ ieee80211_rx_h_mgmt(struct ieee80211_rx_
if (!ieee80211_vif_is_mesh(&sdata->vif) &&
sdata->vif.type != NL80211_IFTYPE_ADHOC &&
break;
case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
-@@ -2817,10 +2819,16 @@ static int prepare_for_handlers(struct i
+@@ -2788,10 +2790,16 @@ static int prepare_for_handlers(struct i
}
break;
case NL80211_IFTYPE_WDS:
WLAN_STA_CLEAR_PS_FILT,
WLAN_STA_MFP,
WLAN_STA_BLOCK_BA,
---- a/net/mac80211/tx.c
-+++ b/net/mac80211/tx.c
-@@ -2716,7 +2716,7 @@ EXPORT_SYMBOL(ieee80211_get_buffered_bc)
- void ieee80211_tx_skb_tid(struct ieee80211_sub_if_data *sdata,
- struct sk_buff *skb, int tid)
- {
-- int ac = ieee802_1d_to_ac[tid];
-+ int ac = ieee802_1d_to_ac[tid & 7];
-
- skb_set_mac_header(skb, 0);
- skb_set_network_header(skb, 0);
--- a/net/wireless/chan.c
+++ b/net/wireless/chan.c
-@@ -136,9 +136,16 @@ cfg80211_get_chan_state(struct cfg80211_
+@@ -82,7 +82,6 @@ int cfg80211_set_monitor_channel(struct
+ int freq, enum nl80211_channel_type chantype)
+ {
+ struct ieee80211_channel *chan;
+- int err;
+
+ if (!rdev->ops->set_monitor_channel)
+ return -EOPNOTSUPP;
+@@ -93,13 +92,7 @@ int cfg80211_set_monitor_channel(struct
+ if (!chan)
+ return -EINVAL;
+
+- err = rdev->ops->set_monitor_channel(&rdev->wiphy, chan, chantype);
+- if (!err) {
+- rdev->monitor_channel = chan;
+- rdev->monitor_channel_type = chantype;
+- }
+-
+- return err;
++ return rdev->ops->set_monitor_channel(&rdev->wiphy, chan, chantype);
+ }
+
+ void
+@@ -134,9 +127,16 @@ cfg80211_get_chan_state(struct wireless_
break;
case NL80211_IFTYPE_AP:
case NL80211_IFTYPE_P2P_GO:
return;
case NL80211_IFTYPE_MONITOR:
case NL80211_IFTYPE_AP_VLAN:
+--- a/net/wireless/core.c
++++ b/net/wireless/core.c
+@@ -747,60 +747,14 @@ static struct device_type wiphy_type = {
+ };
+ #endif
+
+-static struct ieee80211_channel *
+-cfg80211_get_any_chan(struct cfg80211_registered_device *rdev)
+-{
+- struct ieee80211_supported_band *sband;
+- int i;
+-
+- for (i = 0; i < IEEE80211_NUM_BANDS; i++) {
+- sband = rdev->wiphy.bands[i];
+- if (sband && sband->n_channels > 0)
+- return &sband->channels[0];
+- }
+-
+- return NULL;
+-}
+-
+-static void cfg80211_init_mon_chan(struct cfg80211_registered_device *rdev)
+-{
+- struct ieee80211_channel *chan;
+-
+- chan = cfg80211_get_any_chan(rdev);
+- if (WARN_ON(!chan))
+- return;
+-
+- mutex_lock(&rdev->devlist_mtx);
+- WARN_ON(cfg80211_set_monitor_channel(rdev, chan->center_freq,
+- NL80211_CHAN_NO_HT));
+- mutex_unlock(&rdev->devlist_mtx);
+-}
+-
+ void cfg80211_update_iface_num(struct cfg80211_registered_device *rdev,
+ enum nl80211_iftype iftype, int num)
+ {
+- bool has_monitors_only_old = cfg80211_has_monitors_only(rdev);
+- bool has_monitors_only_new;
+-
+ ASSERT_RTNL();
+
+ rdev->num_running_ifaces += num;
+ if (iftype == NL80211_IFTYPE_MONITOR)
+ rdev->num_running_monitor_ifaces += num;
+-
+- has_monitors_only_new = cfg80211_has_monitors_only(rdev);
+- if (has_monitors_only_new != has_monitors_only_old) {
+- if (rdev->ops->set_monitor_enabled)
+- rdev->ops->set_monitor_enabled(&rdev->wiphy,
+- has_monitors_only_new);
+-
+- if (!has_monitors_only_new) {
+- rdev->monitor_channel = NULL;
+- rdev->monitor_channel_type = NL80211_CHAN_NO_HT;
+- } else {
+- cfg80211_init_mon_chan(rdev);
+- }
+- }
+ }
+
+ static int cfg80211_netdev_notifier_call(struct notifier_block *nb,
+@@ -932,6 +886,7 @@ static int cfg80211_netdev_notifier_call
+ mutex_unlock(&rdev->devlist_mtx);
+ dev_put(dev);
+ }
++ cfg80211_update_iface_num(rdev, wdev->iftype, 1);
+ cfg80211_lock_rdev(rdev);
+ mutex_lock(&rdev->devlist_mtx);
+ wdev_lock(wdev);
+@@ -1026,7 +981,6 @@ static int cfg80211_netdev_notifier_call
+ mutex_unlock(&rdev->devlist_mtx);
+ if (ret)
+ return notifier_from_errno(ret);
+- cfg80211_update_iface_num(rdev, wdev->iftype, 1);
+ break;
+ }
+
+--- a/net/wireless/core.h
++++ b/net/wireless/core.h
+@@ -61,9 +61,6 @@ struct cfg80211_registered_device {
+ int num_running_ifaces;
+ int num_running_monitor_ifaces;
+
+- struct ieee80211_channel *monitor_channel;
+- enum nl80211_channel_type monitor_channel_type;
+-
+ /* BSSes/scanning */
+ spinlock_t bss_lock;
+ struct list_head bss_list;
+--- a/net/wireless/nl80211.c
++++ b/net/wireless/nl80211.c
+@@ -1759,11 +1759,17 @@ static int nl80211_send_iface(struct sk_
+ (cfg80211_rdev_list_generation << 2)))
+ goto nla_put_failure;
+
+- if (rdev->monitor_channel) {
+- if (nla_put_u32(msg, NL80211_ATTR_WIPHY_FREQ,
+- rdev->monitor_channel->center_freq) ||
+- nla_put_u32(msg, NL80211_ATTR_WIPHY_CHANNEL_TYPE,
+- rdev->monitor_channel_type))
++ if (rdev->ops->get_channel) {
++ struct ieee80211_channel *chan;
++ enum nl80211_channel_type channel_type;
++
++ chan = rdev->ops->get_channel(&rdev->wiphy, wdev,
++ &channel_type);
++ if (chan &&
++ (nla_put_u32(msg, NL80211_ATTR_WIPHY_FREQ,
++ chan->center_freq) ||
++ nla_put_u32(msg, NL80211_ATTR_WIPHY_CHANNEL_TYPE,
++ channel_type)))
+ goto nla_put_failure;
+ }
+
+--- a/net/wireless/wext-compat.c
++++ b/net/wireless/wext-compat.c
+@@ -827,6 +827,8 @@ static int cfg80211_wext_giwfreq(struct
+ {
+ struct wireless_dev *wdev = dev->ieee80211_ptr;
+ struct cfg80211_registered_device *rdev = wiphy_to_dev(wdev->wiphy);
++ struct ieee80211_channel *chan;
++ enum nl80211_channel_type channel_type;
+
+ switch (wdev->iftype) {
+ case NL80211_IFTYPE_STATION:
+@@ -834,10 +836,13 @@ static int cfg80211_wext_giwfreq(struct
+ case NL80211_IFTYPE_ADHOC:
+ return cfg80211_ibss_wext_giwfreq(dev, info, freq, extra);
+ case NL80211_IFTYPE_MONITOR:
+- if (!rdev->monitor_channel)
++ if (!rdev->ops->get_channel)
+ return -EINVAL;
+
+- freq->m = rdev->monitor_channel->center_freq;
++ chan = rdev->ops->get_channel(wdev->wiphy, wdev, &channel_type);
++ if (!chan)
++ return -EINVAL;
++ freq->m = chan->center_freq;
+ freq->e = 6;
+ return 0;
+ default:
ccflags-y += -D__CHECK_ENDIAN__
--- a/drivers/net/wireless/ath/ath.h
+++ b/drivers/net/wireless/ath/ath.h
-@@ -278,13 +278,6 @@ void _ath_dbg(struct ath_common *common,
+@@ -280,13 +280,6 @@ void _ath_dbg(struct ath_common *common,
#endif /* CONFIG_ATH_DEBUG */
/** Returns string describing opmode, or NULL if unknown mode. */
--- a/drivers/net/wireless/ath/ath9k/init.c
+++ b/drivers/net/wireless/ath/ath9k/init.c
-@@ -666,6 +666,7 @@ static const struct ieee80211_iface_limi
+@@ -667,6 +667,7 @@ static const struct ieee80211_iface_limi
#ifdef CONFIG_MAC80211_MESH
BIT(NL80211_IFTYPE_MESH_POINT) |
#endif
goto end;
--- a/drivers/net/wireless/ath/ath5k/base.c
+++ b/drivers/net/wireless/ath/ath5k/base.c
-@@ -1872,7 +1872,7 @@ ath5k_beacon_send(struct ath5k_hw *ah)
+@@ -1875,7 +1875,7 @@ ath5k_beacon_send(struct ath5k_hw *ah)
}
if ((ah->opmode == NL80211_IFTYPE_AP && ah->num_ap_vifs +
ah->opmode == NL80211_IFTYPE_MESH_POINT) {
u64 tsf = ath5k_hw_get_tsf64(ah);
u32 tsftu = TSF_TO_TU(tsf);
-@@ -1958,7 +1958,7 @@ ath5k_beacon_update_timers(struct ath5k_
+@@ -1961,7 +1961,7 @@ ath5k_beacon_update_timers(struct ath5k_
intval = ah->bintval & AR5K_BEACON_PERIOD;
if (ah->opmode == NL80211_IFTYPE_AP && ah->num_ap_vifs
intval /= ATH_BCBUF; /* staggered multi-bss beacons */
if (intval < 15)
ATH5K_WARN(ah, "intval %u is too low, min 15\n",
-@@ -2423,6 +2423,7 @@ static const struct ieee80211_iface_limi
+@@ -2426,6 +2426,7 @@ static const struct ieee80211_iface_limi
#ifdef CONFIG_MAC80211_MESH
BIT(NL80211_IFTYPE_MESH_POINT) |
#endif
--- a/net/mac80211/main.c
+++ b/net/mac80211/main.c
-@@ -786,17 +786,11 @@ int ieee80211_register_hw(struct ieee802
+@@ -787,17 +787,11 @@ int ieee80211_register_hw(struct ieee802
*/
for (i = 0; i < hw->wiphy->n_iface_combinations; i++) {
const struct ieee80211_iface_combination *c;
+++ /dev/null
---- a/drivers/net/wireless/ath/ath5k/mac80211-ops.c
-+++ b/drivers/net/wireless/ath/ath5k/mac80211-ops.c
-@@ -617,7 +617,7 @@ ath5k_conf_tx(struct ieee80211_hw *hw, s
- qi.tqi_aifs = params->aifs;
- qi.tqi_cw_min = params->cw_min;
- qi.tqi_cw_max = params->cw_max;
-- qi.tqi_burst_time = params->txop;
-+ qi.tqi_burst_time = params->txop * 32;
-
- ATH5K_DBG(ah, ATH5K_DEBUG_ANY,
- "Configure tx [queue %d], "
int ath9k_init_debug(struct ath_hw *ah)
{
struct ath_common *common = ath9k_hw_common(ah);
-@@ -1595,5 +1642,8 @@ int ath9k_init_debug(struct ath_hw *ah)
+@@ -1603,5 +1650,8 @@ int ath9k_init_debug(struct ath_hw *ah)
debugfs_create_u32("gpio_val", S_IRUSR | S_IWUSR,
sc->debug.debugfs_phy, &sc->sc_ah->gpio_val);
ath_err(common, "Reading Magic # failed\n");
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
-@@ -658,6 +658,7 @@ enum ath_cal_list {
+@@ -703,6 +703,7 @@ enum ath_cal_list {
#define AH_USE_EEPROM 0x1
#define AH_UNPLUGGED 0x2 /* The card has been physically removed. */
#define AH_FASTCC 0x4
struct ath_ops reg_ops;
--- a/drivers/net/wireless/ath/ath9k/init.c
+++ b/drivers/net/wireless/ath/ath9k/init.c
-@@ -536,6 +536,8 @@ static int ath9k_init_softc(u16 devid, s
+@@ -537,6 +537,8 @@ static int ath9k_init_softc(u16 devid, s
ah->is_clk_25mhz = pdata->is_clk_25mhz;
ah->get_mac_revision = pdata->get_mac_revision;
ah->external_reset = pdata->external_reset;
--- a/drivers/net/wireless/ath/ath9k/init.c
+++ b/drivers/net/wireless/ath/ath9k/init.c
-@@ -907,23 +907,23 @@ static int __init ath9k_init(void)
+@@ -926,23 +926,23 @@ static int __init ath9k_init(void)
goto err_out;
}
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
-@@ -1956,8 +1956,8 @@ int ath9k_hw_reset(struct ath_hw *ah, st
+@@ -1952,8 +1952,8 @@ int ath9k_hw_reset(struct ath_hw *ah, st
REG_WRITE(ah, AR_OBS, 8);
if (ah->config.rx_intr_mitigation) {
--- a/drivers/net/wireless/ath/ath9k/ath9k.h
+++ b/drivers/net/wireless/ath/ath9k/ath9k.h
-@@ -649,6 +649,7 @@ struct ath_softc {
+@@ -658,6 +658,7 @@ struct ath_softc {
struct ieee80211_hw *hw;
struct device *dev;
struct survey_info *cur_survey;
struct survey_info survey[ATH9K_NUM_CHANNELS];
-@@ -717,6 +718,7 @@ struct ath_softc {
- struct dfs_pattern_detector *dfs_detector;
+@@ -733,6 +734,7 @@ struct ath_softc {
+ #endif
};
+int ath9k_config(struct ieee80211_hw *hw, u32 changed);
int ath9k_init_debug(struct ath_hw *ah)
{
struct ath_common *common = ath9k_hw_common(ah);
-@@ -1645,5 +1689,8 @@ int ath9k_init_debug(struct ath_hw *ah)
+@@ -1653,5 +1697,8 @@ int ath9k_init_debug(struct ath_hw *ah)
debugfs_create_file("eeprom", S_IRUSR, sc->debug.debugfs_phy, sc,
&fops_eeprom);
}
--- a/drivers/net/wireless/ath/ath9k/main.c
+++ b/drivers/net/wireless/ath/ath9k/main.c
-@@ -1084,7 +1084,7 @@ static void ath9k_disable_ps(struct ath_
+@@ -1095,7 +1095,7 @@ static void ath9k_disable_ps(struct ath_
ath_dbg(common, PS, "PowerSave disabled\n");
}
{
struct ath_softc *sc = hw->priv;
struct ath_hw *ah = sc->sc_ah;
-@@ -1138,9 +1138,11 @@ static int ath9k_config(struct ieee80211
+@@ -1149,9 +1149,11 @@ static int ath9k_config(struct ieee80211
if ((changed & IEEE80211_CONF_CHANGE_CHANNEL) || reset_channel) {
struct ieee80211_channel *curchan = hw->conf.channel;
if (ah->curchan)
old_pos = ah->curchan - &ah->channels[0];
-@@ -1183,7 +1185,23 @@ static int ath9k_config(struct ieee80211
+@@ -1194,7 +1196,23 @@ static int ath9k_config(struct ieee80211
memset(&sc->survey[pos], 0, sizeof(struct survey_info));
}
--- a/net/mac80211/iface.c
+++ b/net/mac80211/iface.c
-@@ -916,6 +916,7 @@ static const struct net_device_ops ieee8
+@@ -938,6 +938,7 @@ static const struct net_device_ops ieee8
static void ieee80211_if_setup(struct net_device *dev)
{
ether_setup(dev);
--- a/include/net/mac80211.h
+++ b/include/net/mac80211.h
-@@ -829,7 +829,7 @@ enum ieee80211_smps_mode {
+@@ -835,7 +835,7 @@ enum ieee80211_smps_mode {
*/
struct ieee80211_conf {
u32 flags;
u16 listen_interval;
--- a/net/mac80211/cfg.c
+++ b/net/mac80211/cfg.c
-@@ -1956,7 +1956,7 @@ static int ieee80211_get_tx_power(struct
+@@ -1957,7 +1957,7 @@ static int ieee80211_get_tx_power(struct
{
struct ieee80211_local *local = wiphy_priv(wiphy);
--- a/drivers/net/wireless/ath/ath9k/main.c
+++ b/drivers/net/wireless/ath/ath9k/main.c
-@@ -1208,6 +1208,8 @@ int ath9k_config(struct ieee80211_hw *hw
+@@ -1219,6 +1219,8 @@ int ath9k_config(struct ieee80211_hw *hw
return -EINVAL;
}
/*
* The most recent snapshot of channel->noisefloor for the old
* channel is only available after the hardware reset. Copy it to
-@@ -1222,6 +1224,7 @@ int ath9k_config(struct ieee80211_hw *hw
+@@ -1233,6 +1235,7 @@ int ath9k_config(struct ieee80211_hw *hw
sc->config.txpowlimit = 2 * conf->power_level;
ath9k_cmn_update_txpow(ah, sc->curtxpow,
sc->config.txpowlimit, &sc->curtxpow);
--- a/include/net/mac80211.h
+++ b/include/net/mac80211.h
-@@ -697,6 +697,9 @@ enum mac80211_rx_flags {
- * @mactime: value in microseconds of the 64-bit Time Synchronization Function
- * (TSF) timer when the first data symbol (MPDU) arrived at the hardware.
- * @band: the active band when this frame was received
+@@ -706,6 +706,9 @@ enum mac80211_rx_flags {
+ * @signal: signal strength when receiving this frame, either in dBm, in dB or
+ * unspecified depending on the hardware capabilities flags
+ * @IEEE80211_HW_SIGNAL_*
+ * @chains: bitmask of receive chains for which separate signal strength
+ * values were filled.
+ * @chain_signal: per-chain signal strength, same format as @signal
- * @freq: frequency the radio was tuned to when receiving this frame, in MHz
- * @signal: signal strength when receiving this frame, either in dBm, in dB or
- * unspecified depending on the hardware capabilities flags
-@@ -710,6 +713,10 @@ enum mac80211_rx_flags {
- struct ieee80211_rx_status {
- u64 mactime;
- enum ieee80211_band band;
+ * @antenna: antenna used
+ * @rate_idx: index of data rate into band's supported rates or MCS index if
+ * HT rates are use (RX_FLAG_HT)
+@@ -722,6 +725,9 @@ struct ieee80211_rx_status {
+ u8 band;
+ u8 antenna;
+ s8 signal;
+
+ u8 chains;
+ s8 chain_signal[4];
-+
- int freq;
- int signal;
- int antenna;
+ };
+
+ /**
--- a/net/mac80211/sta_info.h
+++ b/net/mac80211/sta_info.h
@@ -325,6 +325,11 @@ struct sta_info {
--- a/net/mac80211/rx.c
+++ b/net/mac80211/rx.c
-@@ -1254,6 +1254,7 @@ ieee80211_rx_h_sta_process(struct ieee80
+@@ -1231,6 +1231,7 @@ ieee80211_rx_h_sta_process(struct ieee80
struct sk_buff *skb = rx->skb;
struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
if (!sta)
return RX_CONTINUE;
-@@ -1298,6 +1299,19 @@ ieee80211_rx_h_sta_process(struct ieee80
+@@ -1275,6 +1276,19 @@ ieee80211_rx_h_sta_process(struct ieee80
ewma_add(&sta->avg_signal, -status->signal);
}
RX_SAMP_DBG(rate) = rs->rs_rate;
--- a/include/linux/nl80211.h
+++ b/include/linux/nl80211.h
-@@ -1729,6 +1729,8 @@ enum nl80211_sta_bss_param {
+@@ -1734,6 +1734,8 @@ enum nl80211_sta_bss_param {
* @NL80211_STA_INFO_STA_FLAGS: Contains a struct nl80211_sta_flag_update.
* @NL80211_STA_INFO_BEACON_LOSS: count of times beacon loss was detected (u32)
* @NL80211_STA_INFO_T_OFFSET: timing offset with respect to this STA (s64)
* @__NL80211_STA_INFO_AFTER_LAST: internal
* @NL80211_STA_INFO_MAX: highest possible station info attribute
*/
-@@ -1753,6 +1755,8 @@ enum nl80211_sta_info {
+@@ -1758,6 +1760,8 @@ enum nl80211_sta_info {
NL80211_STA_INFO_STA_FLAGS,
NL80211_STA_INFO_BEACON_LOSS,
NL80211_STA_INFO_T_OFFSET,
__NL80211_STA_INFO_AFTER_LAST,
--- a/net/wireless/nl80211.c
+++ b/net/wireless/nl80211.c
-@@ -2648,6 +2648,32 @@ nla_put_failure:
+@@ -2745,6 +2745,32 @@ nla_put_failure:
return false;
}
static int nl80211_send_station(struct sk_buff *msg, u32 pid, u32 seq,
int flags,
struct cfg80211_registered_device *rdev,
-@@ -2709,6 +2735,18 @@ static int nl80211_send_station(struct s
+@@ -2806,6 +2832,18 @@ static int nl80211_send_station(struct s
default:
break;
}
--- a/drivers/net/wireless/ath/ath9k/ath9k.h
+++ b/drivers/net/wireless/ath/ath9k/ath9k.h
-@@ -528,6 +528,9 @@ static inline void ath9k_btcoex_stop_gen
+@@ -537,6 +537,9 @@ struct ath9k_wow_pattern {
#ifdef CONFIG_MAC80211_LEDS
void ath_init_leds(struct ath_softc *sc);
void ath_deinit_leds(struct ath_softc *sc);
#else
static inline void ath_init_leds(struct ath_softc *sc)
{
-@@ -645,6 +648,13 @@ struct ath9k_vif_iter_data {
+@@ -654,6 +657,13 @@ struct ath9k_vif_iter_data {
int nadhocs; /* number of adhoc vifs */
};
struct ath_softc {
struct ieee80211_hw *hw;
struct device *dev;
-@@ -686,9 +696,8 @@ struct ath_softc {
+@@ -695,9 +705,8 @@ struct ath_softc {
struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
#ifdef CONFIG_MAC80211_LEDS
--- a/drivers/net/wireless/ath/ath9k/init.c
+++ b/drivers/net/wireless/ath/ath9k/init.c
-@@ -792,7 +792,7 @@ int ath9k_init_device(u16 devid, struct
+@@ -811,7 +811,7 @@ int ath9k_init_device(u16 devid, struct
#ifdef CONFIG_MAC80211_LEDS
/* must be initialized before ieee80211_register_hw */
#ifdef CONFIG_ATH9K_MAC_DEBUG
void ath9k_debug_samp_bb_mac(struct ath_softc *sc)
-@@ -1680,6 +1735,11 @@ int ath9k_init_debug(struct ath_hw *ah)
+@@ -1688,6 +1743,11 @@ int ath9k_init_debug(struct ath_hw *ah)
&fops_samps);
#endif
union {
--- a/net/mac80211/cfg.c
+++ b/net/mac80211/cfg.c
-@@ -2135,9 +2135,20 @@ static int ieee80211_set_bitrate_mask(st
+@@ -2136,9 +2136,20 @@ static int ieee80211_set_bitrate_mask(st
}
for (i = 0; i < IEEE80211_NUM_BANDS; i++) {
return 0;
--- a/include/net/mac80211.h
+++ b/include/net/mac80211.h
-@@ -3665,7 +3665,7 @@ void ieee80211_send_bar(struct ieee80211
+@@ -3670,7 +3670,7 @@ void ieee80211_send_bar(struct ieee80211
* (deprecated; this will be removed once drivers get updated to use
* rate_idx_mask)
* @rate_idx_mask: user-requested (legacy) rate mask
* @bss: whether this frame is sent out in AP or IBSS mode
*/
struct ieee80211_tx_rate_control {
-@@ -3677,7 +3677,7 @@ struct ieee80211_tx_rate_control {
+@@ -3682,7 +3682,7 @@ struct ieee80211_tx_rate_control {
bool rts, short_preamble;
u8 max_rate_idx;
u32 rate_idx_mask;
--- a/net/mac80211/tx.c
+++ b/net/mac80211/tx.c
-@@ -624,9 +624,11 @@ ieee80211_tx_h_rate_ctrl(struct ieee8021
+@@ -631,9 +631,11 @@ ieee80211_tx_h_rate_ctrl(struct ieee8021
txrc.max_rate_idx = -1;
else
txrc.max_rate_idx = fls(txrc.rate_idx_mask) - 1;
txrc.bss = (tx->sdata->vif.type == NL80211_IFTYPE_AP ||
tx->sdata->vif.type == NL80211_IFTYPE_MESH_POINT ||
tx->sdata->vif.type == NL80211_IFTYPE_ADHOC);
-@@ -2454,8 +2456,6 @@ struct sk_buff *ieee80211_beacon_get_tim
+@@ -2464,8 +2466,6 @@ struct sk_buff *ieee80211_beacon_get_tim
txrc.max_rate_idx = -1;
else
txrc.max_rate_idx = fls(txrc.rate_idx_mask) - 1;
+++ /dev/null
---- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
-+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
-@@ -3260,10 +3260,20 @@ static int ar9300_eeprom_restore_interna
- int it;
- u16 checksum, mchecksum;
- struct ath_common *common = ath9k_hw_common(ah);
-+ struct ar9300_eeprom *eep;
- eeprom_read_op read;
-
-- if (ath9k_hw_use_flash(ah))
-- return ar9300_eeprom_restore_flash(ah, mptr, mdata_size);
-+ if (ath9k_hw_use_flash(ah)) {
-+ u8 txrx;
-+
-+ ar9300_eeprom_restore_flash(ah, mptr, mdata_size);
-+
-+ /* check if eeprom contains valid data */
-+ eep = (struct ar9300_eeprom *) mptr;
-+ txrx = eep->baseEepHeader.txrxMask;
-+ if (txrx != 0 && txrx != 0xff)
-+ return 0;
-+ }
-
- word = kzalloc(2048, GFP_KERNEL);
- if (!word)
--- /dev/null
+--- a/drivers/net/wireless/ath/ath9k/ani.h
++++ b/drivers/net/wireless/ath/ath9k/ani.h
+@@ -51,7 +51,7 @@
+ #define ATH9K_ANI_PERIOD 300
+
+ /* in ms */
+-#define ATH9K_ANI_POLLINTERVAL 1000
++#define ATH9K_ANI_POLLINTERVAL 100
+
+ #define HAL_NOISE_IMMUNE_MAX 4
+ #define HAL_SPUR_IMMUNE_MAX 7
+++ /dev/null
---- a/drivers/net/wireless/ath/ath9k/main.c
-+++ b/drivers/net/wireless/ath/ath9k/main.c
-@@ -1840,12 +1840,29 @@ static u32 fill_chainmask(u32 cap, u32 n
- return filled;
- }
-
-+static bool validate_antenna_mask(struct ath_hw *ah, u32 val)
-+{
-+ switch (val & 0x7) {
-+ case 0x1:
-+ case 0x3:
-+ case 0x7:
-+ return true;
-+ case 0x2:
-+ return (ah->caps.rx_chainmask == 1);
-+ default:
-+ return false;
-+ }
-+}
-+
- static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
- {
- struct ath_softc *sc = hw->priv;
- struct ath_hw *ah = sc->sc_ah;
-
-- if (!rx_ant || !tx_ant)
-+ if (ah->caps.rx_chainmask != 1)
-+ rx_ant |= tx_ant;
-+
-+ if (!validate_antenna_mask(ah, rx_ant) || !tx_ant)
- return -EINVAL;
-
- sc->ant_rx = rx_ant;
--- /dev/null
+--- a/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
++++ b/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
+@@ -778,11 +778,11 @@ static const u32 ar9300Common_rx_gain_ta
+ {0x0000a074, 0x00000000},
+ {0x0000a078, 0x00000000},
+ {0x0000a07c, 0x00000000},
+- {0x0000a080, 0x1a1a1a1a},
+- {0x0000a084, 0x1a1a1a1a},
+- {0x0000a088, 0x1a1a1a1a},
+- {0x0000a08c, 0x1a1a1a1a},
+- {0x0000a090, 0x171a1a1a},
++ {0x0000a080, 0x22222229},
++ {0x0000a084, 0x1d1d1d1d},
++ {0x0000a088, 0x1d1d1d1d},
++ {0x0000a08c, 0x1d1d1d1d},
++ {0x0000a090, 0x171d1d1d},
+ {0x0000a094, 0x11111717},
+ {0x0000a098, 0x00030311},
+ {0x0000a09c, 0x00000000},
--- /dev/null
+--- a/drivers/net/wireless/ath/ath9k/main.c
++++ b/drivers/net/wireless/ath/ath9k/main.c
+@@ -1055,6 +1055,7 @@ static void ath9k_remove_interface(struc
+ ath9k_calculate_summary_state(hw, NULL);
+
+ mutex_unlock(&sc->mutex);
++ ath9k_config(hw, IEEE80211_CONF_CHANGE_IDLE);
+ ath9k_ps_restore(sc);
+ }
+
+@@ -1107,7 +1108,8 @@ int ath9k_config(struct ieee80211_hw *hw
+ mutex_lock(&sc->mutex);
+
+ if (changed & IEEE80211_CONF_CHANGE_IDLE) {
+- sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
++ sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE) &&
++ !sc->nvifs;
+ if (sc->ps_idle) {
+ ath_cancel_work(sc);
+ ath9k_stop_btcoex(sc);
+++ /dev/null
---- a/drivers/net/wireless/ath/ath9k/ani.h
-+++ b/drivers/net/wireless/ath/ath9k/ani.h
-@@ -51,7 +51,7 @@
- #define ATH9K_ANI_PERIOD 300
-
- /* in ms */
--#define ATH9K_ANI_POLLINTERVAL 1000
-+#define ATH9K_ANI_POLLINTERVAL 100
-
- #define HAL_NOISE_IMMUNE_MAX 4
- #define HAL_SPUR_IMMUNE_MAX 7
+++ /dev/null
---- a/drivers/net/wireless/ath/ath9k/hw.c
-+++ b/drivers/net/wireless/ath/ath9k/hw.c
-@@ -680,10 +680,6 @@ static int __ath9k_hw_init(struct ath_hw
- if (!AR_SREV_9300_20_OR_LATER(ah))
- ah->ani_function &= ~ATH9K_ANI_MRC_CCK;
-
-- /* disable ANI for 9340 */
-- if (AR_SREV_9340(ah))
-- ah->config.enable_ani = false;
--
- ath9k_hw_init_mode_regs(ah);
-
- if (!ah->is_pciexpress)
--- /dev/null
+--- a/drivers/net/wireless/ath/ath9k/mac.c
++++ b/drivers/net/wireless/ath/ath9k/mac.c
+@@ -689,7 +689,7 @@ bool ath9k_hw_stopdmarecv(struct ath_hw
+ {
+ #define AH_RX_STOP_DMA_TIMEOUT 10000 /* usec */
+ struct ath_common *common = ath9k_hw_common(ah);
+- u32 mac_status, last_mac_status = 0;
++ u32 mac_status = 0, last_mac_status = 0;
+ int i;
+
+ /* Enable access to the DMA observation bus */
+@@ -719,6 +719,16 @@ bool ath9k_hw_stopdmarecv(struct ath_hw
+ }
+
+ if (i == 0) {
++ if (!AR_SREV_9300_20_OR_LATER(ah) &&
++ (mac_status & 0x700) == 0) {
++ /*
++ * DMA is idle but the MAC is still stuck
++ * processing events
++ */
++ *reset = true;
++ return true;
++ }
++
+ ath_err(common,
+ "DMA failed to stop in %d ms AR_CR=0x%08x AR_DIAG_SW=0x%08x DMADBG_7=0x%08x\n",
+ AH_RX_STOP_DMA_TIMEOUT / 1000,
+++ /dev/null
---- a/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
-+++ b/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
-@@ -778,11 +778,11 @@ static const u32 ar9300Common_rx_gain_ta
- {0x0000a074, 0x00000000},
- {0x0000a078, 0x00000000},
- {0x0000a07c, 0x00000000},
-- {0x0000a080, 0x1a1a1a1a},
-- {0x0000a084, 0x1a1a1a1a},
-- {0x0000a088, 0x1a1a1a1a},
-- {0x0000a08c, 0x1a1a1a1a},
-- {0x0000a090, 0x171a1a1a},
-+ {0x0000a080, 0x22222229},
-+ {0x0000a084, 0x1d1d1d1d},
-+ {0x0000a088, 0x1d1d1d1d},
-+ {0x0000a08c, 0x1d1d1d1d},
-+ {0x0000a090, 0x171d1d1d},
- {0x0000a094, 0x11111717},
- {0x0000a098, 0x00030311},
- {0x0000a09c, 0x00000000},
+++ /dev/null
---- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c
-+++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
-@@ -561,8 +561,8 @@ static void ar9003_tx_gain_table_mode1(s
- 5);
- else if (AR_SREV_9340(ah))
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9340Modes_lowest_ob_db_tx_gain_table_1p0,
-- ARRAY_SIZE(ar9340Modes_lowest_ob_db_tx_gain_table_1p0),
-+ ar9340Modes_high_ob_db_tx_gain_table_1p0,
-+ ARRAY_SIZE(ar9340Modes_high_ob_db_tx_gain_table_1p0),
- 5);
- else if (AR_SREV_9485_11(ah))
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-@@ -605,8 +605,8 @@ static void ar9003_tx_gain_table_mode2(s
- 5);
- else if (AR_SREV_9340(ah))
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9340Modes_lowest_ob_db_tx_gain_table_1p0,
-- ARRAY_SIZE(ar9340Modes_lowest_ob_db_tx_gain_table_1p0),
-+ ar9340Modes_low_ob_db_tx_gain_table_1p0,
-+ ARRAY_SIZE(ar9340Modes_low_ob_db_tx_gain_table_1p0),
- 5);
- else if (AR_SREV_9485_11(ah))
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-@@ -639,8 +639,8 @@ static void ar9003_tx_gain_table_mode3(s
- 5);
- else if (AR_SREV_9340(ah))
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9340Modes_lowest_ob_db_tx_gain_table_1p0,
-- ARRAY_SIZE(ar9340Modes_lowest_ob_db_tx_gain_table_1p0),
-+ ar9340Modes_high_power_tx_gain_table_1p0,
-+ ARRAY_SIZE(ar9340Modes_high_power_tx_gain_table_1p0),
- 5);
- else if (AR_SREV_9485_11(ah))
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-@@ -659,6 +659,20 @@ static void ar9003_tx_gain_table_mode3(s
- 5);
- }
-
-+static void ar9003_tx_gain_table_mode4(struct ath_hw *ah)
-+{
-+ if (AR_SREV_9340(ah))
-+ INIT_INI_ARRAY(&ah->iniModesTxGain,
-+ ar9340Modes_mixed_ob_db_tx_gain_table_1p0,
-+ ARRAY_SIZE(ar9340Modes_mixed_ob_db_tx_gain_table_1p0),
-+ 5);
-+ else if (AR_SREV_9580(ah))
-+ INIT_INI_ARRAY(&ah->iniModesTxGain,
-+ ar9580_1p0_mixed_ob_db_tx_gain_table,
-+ ARRAY_SIZE(ar9580_1p0_mixed_ob_db_tx_gain_table),
-+ 5);
-+}
-+
- static void ar9003_tx_gain_table_apply(struct ath_hw *ah)
- {
- switch (ar9003_hw_get_tx_gain_idx(ah)) {
-@@ -675,6 +689,9 @@ static void ar9003_tx_gain_table_apply(s
- case 3:
- ar9003_tx_gain_table_mode3(ah);
- break;
-+ case 4:
-+ ar9003_tx_gain_table_mode4(ah);
-+ break;
- }
- }
-
+++ /dev/null
---- a/drivers/net/wireless/ath/ath9k/ar9002_hw.c
-+++ b/drivers/net/wireless/ath/ath9k/ar9002_hw.c
-@@ -26,101 +26,70 @@
- static void ar9002_hw_init_mode_regs(struct ath_hw *ah)
- {
- if (AR_SREV_9271(ah)) {
-- INIT_INI_ARRAY(&ah->iniModes, ar9271Modes_9271,
-- ARRAY_SIZE(ar9271Modes_9271), 5);
-- INIT_INI_ARRAY(&ah->iniCommon, ar9271Common_9271,
-- ARRAY_SIZE(ar9271Common_9271), 2);
-- INIT_INI_ARRAY(&ah->iniModes_9271_ANI_reg, ar9271Modes_9271_ANI_reg,
-- ARRAY_SIZE(ar9271Modes_9271_ANI_reg), 5);
-+ INIT_INI_ARRAY(&ah->iniModes, ar9271Modes_9271);
-+ INIT_INI_ARRAY(&ah->iniCommon, ar9271Common_9271);
-+ INIT_INI_ARRAY(&ah->iniModes_9271_ANI_reg, ar9271Modes_9271_ANI_reg);
- return;
- }
-
- if (ah->config.pcie_clock_req)
- INIT_INI_ARRAY(&ah->iniPcieSerdes,
-- ar9280PciePhy_clkreq_off_L1_9280,
-- ARRAY_SIZE(ar9280PciePhy_clkreq_off_L1_9280), 2);
-+ ar9280PciePhy_clkreq_off_L1_9280);
- else
- INIT_INI_ARRAY(&ah->iniPcieSerdes,
-- ar9280PciePhy_clkreq_always_on_L1_9280,
-- ARRAY_SIZE(ar9280PciePhy_clkreq_always_on_L1_9280), 2);
-+ ar9280PciePhy_clkreq_always_on_L1_9280);
-
- if (AR_SREV_9287_11_OR_LATER(ah)) {
-- INIT_INI_ARRAY(&ah->iniModes, ar9287Modes_9287_1_1,
-- ARRAY_SIZE(ar9287Modes_9287_1_1), 5);
-- INIT_INI_ARRAY(&ah->iniCommon, ar9287Common_9287_1_1,
-- ARRAY_SIZE(ar9287Common_9287_1_1), 2);
-+ INIT_INI_ARRAY(&ah->iniModes, ar9287Modes_9287_1_1);
-+ INIT_INI_ARRAY(&ah->iniCommon, ar9287Common_9287_1_1);
- } else if (AR_SREV_9285_12_OR_LATER(ah)) {
-- INIT_INI_ARRAY(&ah->iniModes, ar9285Modes_9285_1_2,
-- ARRAY_SIZE(ar9285Modes_9285_1_2), 5);
-- INIT_INI_ARRAY(&ah->iniCommon, ar9285Common_9285_1_2,
-- ARRAY_SIZE(ar9285Common_9285_1_2), 2);
-+ INIT_INI_ARRAY(&ah->iniModes, ar9285Modes_9285_1_2);
-+ INIT_INI_ARRAY(&ah->iniCommon, ar9285Common_9285_1_2);
- } else if (AR_SREV_9280_20_OR_LATER(ah)) {
-- INIT_INI_ARRAY(&ah->iniModes, ar9280Modes_9280_2,
-- ARRAY_SIZE(ar9280Modes_9280_2), 5);
-- INIT_INI_ARRAY(&ah->iniCommon, ar9280Common_9280_2,
-- ARRAY_SIZE(ar9280Common_9280_2), 2);
-+ INIT_INI_ARRAY(&ah->iniModes, ar9280Modes_9280_2);
-+ INIT_INI_ARRAY(&ah->iniCommon, ar9280Common_9280_2);
-
- INIT_INI_ARRAY(&ah->iniModesFastClock,
-- ar9280Modes_fast_clock_9280_2,
-- ARRAY_SIZE(ar9280Modes_fast_clock_9280_2), 3);
-+ ar9280Modes_fast_clock_9280_2);
- } else if (AR_SREV_9160_10_OR_LATER(ah)) {
-- INIT_INI_ARRAY(&ah->iniModes, ar5416Modes_9160,
-- ARRAY_SIZE(ar5416Modes_9160), 5);
-- INIT_INI_ARRAY(&ah->iniCommon, ar5416Common_9160,
-- ARRAY_SIZE(ar5416Common_9160), 2);
-+ INIT_INI_ARRAY(&ah->iniModes, ar5416Modes_9160);
-+ INIT_INI_ARRAY(&ah->iniCommon, ar5416Common_9160);
- if (AR_SREV_9160_11(ah)) {
- INIT_INI_ARRAY(&ah->iniAddac,
-- ar5416Addac_9160_1_1,
-- ARRAY_SIZE(ar5416Addac_9160_1_1), 2);
-+ ar5416Addac_9160_1_1);
- } else {
-- INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac_9160,
-- ARRAY_SIZE(ar5416Addac_9160), 2);
-+ INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac_9160);
- }
- } else if (AR_SREV_9100_OR_LATER(ah)) {
-- INIT_INI_ARRAY(&ah->iniModes, ar5416Modes_9100,
-- ARRAY_SIZE(ar5416Modes_9100), 5);
-- INIT_INI_ARRAY(&ah->iniCommon, ar5416Common_9100,
-- ARRAY_SIZE(ar5416Common_9100), 2);
-- INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6_9100,
-- ARRAY_SIZE(ar5416Bank6_9100), 3);
-- INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac_9100,
-- ARRAY_SIZE(ar5416Addac_9100), 2);
-+ INIT_INI_ARRAY(&ah->iniModes, ar5416Modes_9100);
-+ INIT_INI_ARRAY(&ah->iniCommon, ar5416Common_9100);
-+ INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6_9100);
-+ INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac_9100);
- } else {
-- INIT_INI_ARRAY(&ah->iniModes, ar5416Modes,
-- ARRAY_SIZE(ar5416Modes), 5);
-- INIT_INI_ARRAY(&ah->iniCommon, ar5416Common,
-- ARRAY_SIZE(ar5416Common), 2);
-- INIT_INI_ARRAY(&ah->iniBank6TPC, ar5416Bank6TPC,
-- ARRAY_SIZE(ar5416Bank6TPC), 3);
-- INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac,
-- ARRAY_SIZE(ar5416Addac), 2);
-+ INIT_INI_ARRAY(&ah->iniModes, ar5416Modes);
-+ INIT_INI_ARRAY(&ah->iniCommon, ar5416Common);
-+ INIT_INI_ARRAY(&ah->iniBank6TPC, ar5416Bank6TPC);
-+ INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac);
- }
-
- if (!AR_SREV_9280_20_OR_LATER(ah)) {
- /* Common for AR5416, AR913x, AR9160 */
-- INIT_INI_ARRAY(&ah->iniBB_RfGain, ar5416BB_RfGain,
-- ARRAY_SIZE(ar5416BB_RfGain), 3);
-+ INIT_INI_ARRAY(&ah->iniBB_RfGain, ar5416BB_RfGain);
-
-- INIT_INI_ARRAY(&ah->iniBank0, ar5416Bank0,
-- ARRAY_SIZE(ar5416Bank0), 2);
-- INIT_INI_ARRAY(&ah->iniBank1, ar5416Bank1,
-- ARRAY_SIZE(ar5416Bank1), 2);
-- INIT_INI_ARRAY(&ah->iniBank2, ar5416Bank2,
-- ARRAY_SIZE(ar5416Bank2), 2);
-- INIT_INI_ARRAY(&ah->iniBank3, ar5416Bank3,
-- ARRAY_SIZE(ar5416Bank3), 3);
-- INIT_INI_ARRAY(&ah->iniBank7, ar5416Bank7,
-- ARRAY_SIZE(ar5416Bank7), 2);
-+ INIT_INI_ARRAY(&ah->iniBank0, ar5416Bank0);
-+ INIT_INI_ARRAY(&ah->iniBank1, ar5416Bank1);
-+ INIT_INI_ARRAY(&ah->iniBank2, ar5416Bank2);
-+ INIT_INI_ARRAY(&ah->iniBank3, ar5416Bank3);
-+ INIT_INI_ARRAY(&ah->iniBank7, ar5416Bank7);
-
- /* Common for AR5416, AR9160 */
- if (!AR_SREV_9100(ah))
-- INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6,
-- ARRAY_SIZE(ar5416Bank6), 3);
-+ INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6);
-
- /* Common for AR913x, AR9160 */
- if (!AR_SREV_5416(ah))
-- INIT_INI_ARRAY(&ah->iniBank6TPC, ar5416Bank6TPC_9100,
-- ARRAY_SIZE(ar5416Bank6TPC_9100), 3);
-+ INIT_INI_ARRAY(&ah->iniBank6TPC,
-+ ar5416Bank6TPC_9100);
- }
-
- /* iniAddac needs to be modified for these chips */
-@@ -143,13 +112,9 @@ static void ar9002_hw_init_mode_regs(str
- }
- if (AR_SREV_9287_11_OR_LATER(ah)) {
- INIT_INI_ARRAY(&ah->iniCckfirNormal,
-- ar9287Common_normal_cck_fir_coeff_9287_1_1,
-- ARRAY_SIZE(ar9287Common_normal_cck_fir_coeff_9287_1_1),
-- 2);
-+ ar9287Common_normal_cck_fir_coeff_9287_1_1);
- INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
-- ar9287Common_japan_2484_cck_fir_coeff_9287_1_1,
-- ARRAY_SIZE(ar9287Common_japan_2484_cck_fir_coeff_9287_1_1),
-- 2);
-+ ar9287Common_japan_2484_cck_fir_coeff_9287_1_1);
- }
- }
-
-@@ -163,20 +128,16 @@ static void ar9280_20_hw_init_rxgain_ini
-
- if (rxgain_type == AR5416_EEP_RXGAIN_13DB_BACKOFF)
- INIT_INI_ARRAY(&ah->iniModesRxGain,
-- ar9280Modes_backoff_13db_rxgain_9280_2,
-- ARRAY_SIZE(ar9280Modes_backoff_13db_rxgain_9280_2), 5);
-+ ar9280Modes_backoff_13db_rxgain_9280_2);
- else if (rxgain_type == AR5416_EEP_RXGAIN_23DB_BACKOFF)
- INIT_INI_ARRAY(&ah->iniModesRxGain,
-- ar9280Modes_backoff_23db_rxgain_9280_2,
-- ARRAY_SIZE(ar9280Modes_backoff_23db_rxgain_9280_2), 5);
-+ ar9280Modes_backoff_23db_rxgain_9280_2);
- else
- INIT_INI_ARRAY(&ah->iniModesRxGain,
-- ar9280Modes_original_rxgain_9280_2,
-- ARRAY_SIZE(ar9280Modes_original_rxgain_9280_2), 5);
-+ ar9280Modes_original_rxgain_9280_2);
- } else {
- INIT_INI_ARRAY(&ah->iniModesRxGain,
-- ar9280Modes_original_rxgain_9280_2,
-- ARRAY_SIZE(ar9280Modes_original_rxgain_9280_2), 5);
-+ ar9280Modes_original_rxgain_9280_2);
- }
- }
-
-@@ -186,16 +147,13 @@ static void ar9280_20_hw_init_txgain_ini
- AR5416_EEP_MINOR_VER_19) {
- if (txgain_type == AR5416_EEP_TXGAIN_HIGH_POWER)
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9280Modes_high_power_tx_gain_9280_2,
-- ARRAY_SIZE(ar9280Modes_high_power_tx_gain_9280_2), 5);
-+ ar9280Modes_high_power_tx_gain_9280_2);
- else
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9280Modes_original_tx_gain_9280_2,
-- ARRAY_SIZE(ar9280Modes_original_tx_gain_9280_2), 5);
-+ ar9280Modes_original_tx_gain_9280_2);
- } else {
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9280Modes_original_tx_gain_9280_2,
-- ARRAY_SIZE(ar9280Modes_original_tx_gain_9280_2), 5);
-+ ar9280Modes_original_tx_gain_9280_2);
- }
- }
-
-@@ -203,12 +161,10 @@ static void ar9271_hw_init_txgain_ini(st
- {
- if (txgain_type == AR5416_EEP_TXGAIN_HIGH_POWER)
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9271Modes_high_power_tx_gain_9271,
-- ARRAY_SIZE(ar9271Modes_high_power_tx_gain_9271), 5);
-+ ar9271Modes_high_power_tx_gain_9271);
- else
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9271Modes_normal_power_tx_gain_9271,
-- ARRAY_SIZE(ar9271Modes_normal_power_tx_gain_9271), 5);
-+ ar9271Modes_normal_power_tx_gain_9271);
- }
-
- static void ar9002_hw_init_mode_gain_regs(struct ath_hw *ah)
-@@ -217,8 +173,7 @@ static void ar9002_hw_init_mode_gain_reg
-
- if (AR_SREV_9287_11_OR_LATER(ah))
- INIT_INI_ARRAY(&ah->iniModesRxGain,
-- ar9287Modes_rx_gain_9287_1_1,
-- ARRAY_SIZE(ar9287Modes_rx_gain_9287_1_1), 5);
-+ ar9287Modes_rx_gain_9287_1_1);
- else if (AR_SREV_9280_20(ah))
- ar9280_20_hw_init_rxgain_ini(ah);
-
-@@ -226,8 +181,7 @@ static void ar9002_hw_init_mode_gain_reg
- ar9271_hw_init_txgain_ini(ah, txgain_type);
- } else if (AR_SREV_9287_11_OR_LATER(ah)) {
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9287Modes_tx_gain_9287_1_1,
-- ARRAY_SIZE(ar9287Modes_tx_gain_9287_1_1), 5);
-+ ar9287Modes_tx_gain_9287_1_1);
- } else if (AR_SREV_9280_20(ah)) {
- ar9280_20_hw_init_txgain_ini(ah, txgain_type);
- } else if (AR_SREV_9285_12_OR_LATER(ah)) {
-@@ -235,26 +189,18 @@ static void ar9002_hw_init_mode_gain_reg
- if (txgain_type == AR5416_EEP_TXGAIN_HIGH_POWER) {
- if (AR_SREV_9285E_20(ah)) {
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9285Modes_XE2_0_high_power,
-- ARRAY_SIZE(
-- ar9285Modes_XE2_0_high_power), 5);
-+ ar9285Modes_XE2_0_high_power);
- } else {
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9285Modes_high_power_tx_gain_9285_1_2,
-- ARRAY_SIZE(
-- ar9285Modes_high_power_tx_gain_9285_1_2), 5);
-+ ar9285Modes_high_power_tx_gain_9285_1_2);
- }
- } else {
- if (AR_SREV_9285E_20(ah)) {
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9285Modes_XE2_0_normal_power,
-- ARRAY_SIZE(
-- ar9285Modes_XE2_0_normal_power), 5);
-+ ar9285Modes_XE2_0_normal_power);
- } else {
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9285Modes_original_tx_gain_9285_1_2,
-- ARRAY_SIZE(
-- ar9285Modes_original_tx_gain_9285_1_2), 5);
-+ ar9285Modes_original_tx_gain_9285_1_2);
- }
- }
- }
---- a/drivers/net/wireless/ath/ath9k/calib.h
-+++ b/drivers/net/wireless/ath/ath9k/calib.h
-@@ -30,10 +30,10 @@ struct ar5416IniArray {
- u32 ia_columns;
- };
-
--#define INIT_INI_ARRAY(iniarray, array, rows, columns) do { \
-+#define INIT_INI_ARRAY(iniarray, array) do { \
- (iniarray)->ia_array = (u32 *)(array); \
-- (iniarray)->ia_rows = (rows); \
-- (iniarray)->ia_columns = (columns); \
-+ (iniarray)->ia_rows = ARRAY_SIZE(array); \
-+ (iniarray)->ia_columns = ARRAY_SIZE(array[0]); \
- } while (0)
-
- #define INI_RA(iniarray, row, column) \
---- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c
-+++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
-@@ -44,462 +44,310 @@ static void ar9003_hw_init_mode_regs(str
- ar9462_2p0_baseband_core_txfir_coeff_japan_2484
- if (AR_SREV_9330_11(ah)) {
- /* mac */
-- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
-- ar9331_1p1_mac_core,
-- ARRAY_SIZE(ar9331_1p1_mac_core), 2);
-+ ar9331_1p1_mac_core);
- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
-- ar9331_1p1_mac_postamble,
-- ARRAY_SIZE(ar9331_1p1_mac_postamble), 5);
-+ ar9331_1p1_mac_postamble);
-
- /* bb */
-- INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
- INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
-- ar9331_1p1_baseband_core,
-- ARRAY_SIZE(ar9331_1p1_baseband_core), 2);
-+ ar9331_1p1_baseband_core);
- INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
-- ar9331_1p1_baseband_postamble,
-- ARRAY_SIZE(ar9331_1p1_baseband_postamble), 5);
-+ ar9331_1p1_baseband_postamble);
-
- /* radio */
-- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
-- ar9331_1p1_radio_core,
-- ARRAY_SIZE(ar9331_1p1_radio_core), 2);
-- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST], NULL, 0, 0);
-+ ar9331_1p1_radio_core);
-
- /* soc */
- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
-- ar9331_1p1_soc_preamble,
-- ARRAY_SIZE(ar9331_1p1_soc_preamble), 2);
-- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
-+ ar9331_1p1_soc_preamble);
- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
-- ar9331_1p1_soc_postamble,
-- ARRAY_SIZE(ar9331_1p1_soc_postamble), 2);
-+ ar9331_1p1_soc_postamble);
-
- /* rx/tx gain */
- INIT_INI_ARRAY(&ah->iniModesRxGain,
-- ar9331_common_rx_gain_1p1,
-- ARRAY_SIZE(ar9331_common_rx_gain_1p1), 2);
-+ ar9331_common_rx_gain_1p1);
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9331_modes_lowest_ob_db_tx_gain_1p1,
-- ARRAY_SIZE(ar9331_modes_lowest_ob_db_tx_gain_1p1),
-- 5);
-+ ar9331_modes_lowest_ob_db_tx_gain_1p1);
-
- /* additional clock settings */
- if (ah->is_clk_25mhz)
- INIT_INI_ARRAY(&ah->iniAdditional,
-- ar9331_1p1_xtal_25M,
-- ARRAY_SIZE(ar9331_1p1_xtal_25M), 2);
-+ ar9331_1p1_xtal_25M);
- else
- INIT_INI_ARRAY(&ah->iniAdditional,
-- ar9331_1p1_xtal_40M,
-- ARRAY_SIZE(ar9331_1p1_xtal_40M), 2);
-+ ar9331_1p1_xtal_40M);
- } else if (AR_SREV_9330_12(ah)) {
- /* mac */
-- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
-- ar9331_1p2_mac_core,
-- ARRAY_SIZE(ar9331_1p2_mac_core), 2);
-+ ar9331_1p2_mac_core);
- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
-- ar9331_1p2_mac_postamble,
-- ARRAY_SIZE(ar9331_1p2_mac_postamble), 5);
-+ ar9331_1p2_mac_postamble);
-
- /* bb */
-- INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
- INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
-- ar9331_1p2_baseband_core,
-- ARRAY_SIZE(ar9331_1p2_baseband_core), 2);
-+ ar9331_1p2_baseband_core);
- INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
-- ar9331_1p2_baseband_postamble,
-- ARRAY_SIZE(ar9331_1p2_baseband_postamble), 5);
-+ ar9331_1p2_baseband_postamble);
-
- /* radio */
-- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
-- ar9331_1p2_radio_core,
-- ARRAY_SIZE(ar9331_1p2_radio_core), 2);
-- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST], NULL, 0, 0);
-+ ar9331_1p2_radio_core);
-
- /* soc */
- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
-- ar9331_1p2_soc_preamble,
-- ARRAY_SIZE(ar9331_1p2_soc_preamble), 2);
-- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
-+ ar9331_1p2_soc_preamble);
- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
-- ar9331_1p2_soc_postamble,
-- ARRAY_SIZE(ar9331_1p2_soc_postamble), 2);
-+ ar9331_1p2_soc_postamble);
-
- /* rx/tx gain */
- INIT_INI_ARRAY(&ah->iniModesRxGain,
-- ar9331_common_rx_gain_1p2,
-- ARRAY_SIZE(ar9331_common_rx_gain_1p2), 2);
-+ ar9331_common_rx_gain_1p2);
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9331_modes_lowest_ob_db_tx_gain_1p2,
-- ARRAY_SIZE(ar9331_modes_lowest_ob_db_tx_gain_1p2),
-- 5);
-+ ar9331_modes_lowest_ob_db_tx_gain_1p2);
-
- /* additional clock settings */
- if (ah->is_clk_25mhz)
- INIT_INI_ARRAY(&ah->iniAdditional,
-- ar9331_1p2_xtal_25M,
-- ARRAY_SIZE(ar9331_1p2_xtal_25M), 2);
-+ ar9331_1p2_xtal_25M);
- else
- INIT_INI_ARRAY(&ah->iniAdditional,
-- ar9331_1p2_xtal_40M,
-- ARRAY_SIZE(ar9331_1p2_xtal_40M), 2);
-+ ar9331_1p2_xtal_40M);
- } else if (AR_SREV_9340(ah)) {
- /* mac */
-- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
-- ar9340_1p0_mac_core,
-- ARRAY_SIZE(ar9340_1p0_mac_core), 2);
-+ ar9340_1p0_mac_core);
- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
-- ar9340_1p0_mac_postamble,
-- ARRAY_SIZE(ar9340_1p0_mac_postamble), 5);
-+ ar9340_1p0_mac_postamble);
-
- /* bb */
-- INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
- INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
-- ar9340_1p0_baseband_core,
-- ARRAY_SIZE(ar9340_1p0_baseband_core), 2);
-+ ar9340_1p0_baseband_core);
- INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
-- ar9340_1p0_baseband_postamble,
-- ARRAY_SIZE(ar9340_1p0_baseband_postamble), 5);
-+ ar9340_1p0_baseband_postamble);
-
- /* radio */
-- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
-- ar9340_1p0_radio_core,
-- ARRAY_SIZE(ar9340_1p0_radio_core), 2);
-+ ar9340_1p0_radio_core);
- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
-- ar9340_1p0_radio_postamble,
-- ARRAY_SIZE(ar9340_1p0_radio_postamble), 5);
-+ ar9340_1p0_radio_postamble);
-
- /* soc */
- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
-- ar9340_1p0_soc_preamble,
-- ARRAY_SIZE(ar9340_1p0_soc_preamble), 2);
-- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
-+ ar9340_1p0_soc_preamble);
- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
-- ar9340_1p0_soc_postamble,
-- ARRAY_SIZE(ar9340_1p0_soc_postamble), 5);
-+ ar9340_1p0_soc_postamble);
-
- /* rx/tx gain */
- INIT_INI_ARRAY(&ah->iniModesRxGain,
-- ar9340Common_wo_xlna_rx_gain_table_1p0,
-- ARRAY_SIZE(ar9340Common_wo_xlna_rx_gain_table_1p0),
-- 5);
-- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9340Modes_high_ob_db_tx_gain_table_1p0,
-- ARRAY_SIZE(ar9340Modes_high_ob_db_tx_gain_table_1p0),
-- 5);
-+ ar9340Common_wo_xlna_rx_gain_table_1p0);
-+ INIT_INI_ARRAY(&ah->iniModesTxGain,
-+ ar9340Modes_high_ob_db_tx_gain_table_1p0);
-
- INIT_INI_ARRAY(&ah->iniModesFastClock,
-- ar9340Modes_fast_clock_1p0,
-- ARRAY_SIZE(ar9340Modes_fast_clock_1p0),
-- 3);
-+ ar9340Modes_fast_clock_1p0);
-
- if (!ah->is_clk_25mhz)
- INIT_INI_ARRAY(&ah->iniAdditional,
-- ar9340_1p0_radio_core_40M,
-- ARRAY_SIZE(ar9340_1p0_radio_core_40M),
-- 2);
-+ ar9340_1p0_radio_core_40M);
- } else if (AR_SREV_9485_11(ah)) {
- /* mac */
-- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
-- ar9485_1_1_mac_core,
-- ARRAY_SIZE(ar9485_1_1_mac_core), 2);
-+ ar9485_1_1_mac_core);
- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
-- ar9485_1_1_mac_postamble,
-- ARRAY_SIZE(ar9485_1_1_mac_postamble), 5);
-+ ar9485_1_1_mac_postamble);
-
- /* bb */
-- INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], ar9485_1_1,
-- ARRAY_SIZE(ar9485_1_1), 2);
-+ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], ar9485_1_1);
- INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
-- ar9485_1_1_baseband_core,
-- ARRAY_SIZE(ar9485_1_1_baseband_core), 2);
-+ ar9485_1_1_baseband_core);
- INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
-- ar9485_1_1_baseband_postamble,
-- ARRAY_SIZE(ar9485_1_1_baseband_postamble), 5);
-+ ar9485_1_1_baseband_postamble);
-
- /* radio */
-- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
-- ar9485_1_1_radio_core,
-- ARRAY_SIZE(ar9485_1_1_radio_core), 2);
-+ ar9485_1_1_radio_core);
- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
-- ar9485_1_1_radio_postamble,
-- ARRAY_SIZE(ar9485_1_1_radio_postamble), 2);
-+ ar9485_1_1_radio_postamble);
-
- /* soc */
- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
-- ar9485_1_1_soc_preamble,
-- ARRAY_SIZE(ar9485_1_1_soc_preamble), 2);
-- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
-- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST], NULL, 0, 0);
-+ ar9485_1_1_soc_preamble);
-
- /* rx/tx gain */
- INIT_INI_ARRAY(&ah->iniModesRxGain,
-- ar9485Common_wo_xlna_rx_gain_1_1,
-- ARRAY_SIZE(ar9485Common_wo_xlna_rx_gain_1_1), 2);
-+ ar9485Common_wo_xlna_rx_gain_1_1);
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9485_modes_lowest_ob_db_tx_gain_1_1,
-- ARRAY_SIZE(ar9485_modes_lowest_ob_db_tx_gain_1_1),
-- 5);
-+ ar9485_modes_lowest_ob_db_tx_gain_1_1);
-
- /* Load PCIE SERDES settings from INI */
-
- /* Awake Setting */
-
- INIT_INI_ARRAY(&ah->iniPcieSerdes,
-- ar9485_1_1_pcie_phy_clkreq_disable_L1,
-- ARRAY_SIZE(ar9485_1_1_pcie_phy_clkreq_disable_L1),
-- 2);
-+ ar9485_1_1_pcie_phy_clkreq_disable_L1);
-
- /* Sleep Setting */
-
- INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
-- ar9485_1_1_pcie_phy_clkreq_disable_L1,
-- ARRAY_SIZE(ar9485_1_1_pcie_phy_clkreq_disable_L1),
-- 2);
-+ ar9485_1_1_pcie_phy_clkreq_disable_L1);
- } else if (AR_SREV_9462_20(ah)) {
-
-- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
-- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], ar9462_2p0_mac_core,
-- ARRAY_SIZE(ar9462_2p0_mac_core), 2);
-+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], ar9462_2p0_mac_core);
- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
-- ar9462_2p0_mac_postamble,
-- ARRAY_SIZE(ar9462_2p0_mac_postamble), 5);
-+ ar9462_2p0_mac_postamble);
-
-- INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
- INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
-- ar9462_2p0_baseband_core,
-- ARRAY_SIZE(ar9462_2p0_baseband_core), 2);
-+ ar9462_2p0_baseband_core);
- INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
-- ar9462_2p0_baseband_postamble,
-- ARRAY_SIZE(ar9462_2p0_baseband_postamble), 5);
-+ ar9462_2p0_baseband_postamble);
-
-- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
-- ar9462_2p0_radio_core,
-- ARRAY_SIZE(ar9462_2p0_radio_core), 2);
-+ ar9462_2p0_radio_core);
- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
-- ar9462_2p0_radio_postamble,
-- ARRAY_SIZE(ar9462_2p0_radio_postamble), 5);
-+ ar9462_2p0_radio_postamble);
- INIT_INI_ARRAY(&ah->ini_radio_post_sys2ant,
-- ar9462_2p0_radio_postamble_sys2ant,
-- ARRAY_SIZE(ar9462_2p0_radio_postamble_sys2ant),
-- 5);
-+ ar9462_2p0_radio_postamble_sys2ant);
-
- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
-- ar9462_2p0_soc_preamble,
-- ARRAY_SIZE(ar9462_2p0_soc_preamble), 2);
-- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
-+ ar9462_2p0_soc_preamble);
- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
-- ar9462_2p0_soc_postamble,
-- ARRAY_SIZE(ar9462_2p0_soc_postamble), 5);
-+ ar9462_2p0_soc_postamble);
-
- INIT_INI_ARRAY(&ah->iniModesRxGain,
-- ar9462_common_rx_gain_table_2p0,
-- ARRAY_SIZE(ar9462_common_rx_gain_table_2p0), 2);
-+ ar9462_common_rx_gain_table_2p0);
-
- /* Awake -> Sleep Setting */
- INIT_INI_ARRAY(&ah->iniPcieSerdes,
-- PCIE_PLL_ON_CREQ_DIS_L1_2P0,
-- ARRAY_SIZE(PCIE_PLL_ON_CREQ_DIS_L1_2P0),
-- 2);
-+ PCIE_PLL_ON_CREQ_DIS_L1_2P0);
- /* Sleep -> Awake Setting */
- INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
-- PCIE_PLL_ON_CREQ_DIS_L1_2P0,
-- ARRAY_SIZE(PCIE_PLL_ON_CREQ_DIS_L1_2P0),
-- 2);
-+ PCIE_PLL_ON_CREQ_DIS_L1_2P0);
-
- /* Fast clock modal settings */
- INIT_INI_ARRAY(&ah->iniModesFastClock,
-- ar9462_modes_fast_clock_2p0,
-- ARRAY_SIZE(ar9462_modes_fast_clock_2p0), 3);
-+ ar9462_modes_fast_clock_2p0);
-
- INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
-- AR9462_BB_CTX_COEFJ(2p0),
-- ARRAY_SIZE(AR9462_BB_CTX_COEFJ(2p0)), 2);
-+ AR9462_BB_CTX_COEFJ(2p0));
-
-- INIT_INI_ARRAY(&ah->ini_japan2484, AR9462_BBC_TXIFR_COEFFJ,
-- ARRAY_SIZE(AR9462_BBC_TXIFR_COEFFJ), 2);
-+ INIT_INI_ARRAY(&ah->ini_japan2484, AR9462_BBC_TXIFR_COEFFJ);
- } else if (AR_SREV_9550(ah)) {
- /* mac */
-- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
-- ar955x_1p0_mac_core,
-- ARRAY_SIZE(ar955x_1p0_mac_core), 2);
-+ ar955x_1p0_mac_core);
- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
-- ar955x_1p0_mac_postamble,
-- ARRAY_SIZE(ar955x_1p0_mac_postamble), 5);
-+ ar955x_1p0_mac_postamble);
-
- /* bb */
-- INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
- INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
-- ar955x_1p0_baseband_core,
-- ARRAY_SIZE(ar955x_1p0_baseband_core), 2);
-+ ar955x_1p0_baseband_core);
- INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
-- ar955x_1p0_baseband_postamble,
-- ARRAY_SIZE(ar955x_1p0_baseband_postamble), 5);
-+ ar955x_1p0_baseband_postamble);
-
- /* radio */
-- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
-- ar955x_1p0_radio_core,
-- ARRAY_SIZE(ar955x_1p0_radio_core), 2);
-+ ar955x_1p0_radio_core);
- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
-- ar955x_1p0_radio_postamble,
-- ARRAY_SIZE(ar955x_1p0_radio_postamble), 5);
-+ ar955x_1p0_radio_postamble);
-
- /* soc */
- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
-- ar955x_1p0_soc_preamble,
-- ARRAY_SIZE(ar955x_1p0_soc_preamble), 2);
-- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
-+ ar955x_1p0_soc_preamble);
- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
-- ar955x_1p0_soc_postamble,
-- ARRAY_SIZE(ar955x_1p0_soc_postamble), 5);
-+ ar955x_1p0_soc_postamble);
-
- /* rx/tx gain */
- INIT_INI_ARRAY(&ah->iniModesRxGain,
-- ar955x_1p0_common_wo_xlna_rx_gain_table,
-- ARRAY_SIZE(ar955x_1p0_common_wo_xlna_rx_gain_table),
-- 2);
-+ ar955x_1p0_common_wo_xlna_rx_gain_table);
- INIT_INI_ARRAY(&ah->ini_modes_rx_gain_bounds,
-- ar955x_1p0_common_wo_xlna_rx_gain_bounds,
-- ARRAY_SIZE(ar955x_1p0_common_wo_xlna_rx_gain_bounds),
-- 5);
-- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar955x_1p0_modes_xpa_tx_gain_table,
-- ARRAY_SIZE(ar955x_1p0_modes_xpa_tx_gain_table),
-- 9);
-+ ar955x_1p0_common_wo_xlna_rx_gain_bounds);
-+ INIT_INI_ARRAY(&ah->iniModesTxGain,
-+ ar955x_1p0_modes_xpa_tx_gain_table);
-
- /* Fast clock modal settings */
- INIT_INI_ARRAY(&ah->iniModesFastClock,
-- ar955x_1p0_modes_fast_clock,
-- ARRAY_SIZE(ar955x_1p0_modes_fast_clock), 3);
-+ ar955x_1p0_modes_fast_clock);
- } else if (AR_SREV_9580(ah)) {
- /* mac */
-- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
-- ar9580_1p0_mac_core,
-- ARRAY_SIZE(ar9580_1p0_mac_core), 2);
-+ ar9580_1p0_mac_core);
- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
-- ar9580_1p0_mac_postamble,
-- ARRAY_SIZE(ar9580_1p0_mac_postamble), 5);
-+ ar9580_1p0_mac_postamble);
-
- /* bb */
-- INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
- INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
-- ar9580_1p0_baseband_core,
-- ARRAY_SIZE(ar9580_1p0_baseband_core), 2);
-+ ar9580_1p0_baseband_core);
- INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
-- ar9580_1p0_baseband_postamble,
-- ARRAY_SIZE(ar9580_1p0_baseband_postamble), 5);
-+ ar9580_1p0_baseband_postamble);
-
- /* radio */
-- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
-- ar9580_1p0_radio_core,
-- ARRAY_SIZE(ar9580_1p0_radio_core), 2);
-+ ar9580_1p0_radio_core);
- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
-- ar9580_1p0_radio_postamble,
-- ARRAY_SIZE(ar9580_1p0_radio_postamble), 5);
-+ ar9580_1p0_radio_postamble);
-
- /* soc */
- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
-- ar9580_1p0_soc_preamble,
-- ARRAY_SIZE(ar9580_1p0_soc_preamble), 2);
-- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
-+ ar9580_1p0_soc_preamble);
- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
-- ar9580_1p0_soc_postamble,
-- ARRAY_SIZE(ar9580_1p0_soc_postamble), 5);
-+ ar9580_1p0_soc_postamble);
-
- /* rx/tx gain */
- INIT_INI_ARRAY(&ah->iniModesRxGain,
-- ar9580_1p0_rx_gain_table,
-- ARRAY_SIZE(ar9580_1p0_rx_gain_table), 2);
-+ ar9580_1p0_rx_gain_table);
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9580_1p0_low_ob_db_tx_gain_table,
-- ARRAY_SIZE(ar9580_1p0_low_ob_db_tx_gain_table),
-- 5);
-+ ar9580_1p0_low_ob_db_tx_gain_table);
-
- INIT_INI_ARRAY(&ah->iniModesFastClock,
-- ar9580_1p0_modes_fast_clock,
-- ARRAY_SIZE(ar9580_1p0_modes_fast_clock),
-- 3);
-+ ar9580_1p0_modes_fast_clock);
- } else {
- /* mac */
-- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
-- ar9300_2p2_mac_core,
-- ARRAY_SIZE(ar9300_2p2_mac_core), 2);
-+ ar9300_2p2_mac_core);
- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
-- ar9300_2p2_mac_postamble,
-- ARRAY_SIZE(ar9300_2p2_mac_postamble), 5);
-+ ar9300_2p2_mac_postamble);
-
- /* bb */
-- INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
- INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
-- ar9300_2p2_baseband_core,
-- ARRAY_SIZE(ar9300_2p2_baseband_core), 2);
-+ ar9300_2p2_baseband_core);
- INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
-- ar9300_2p2_baseband_postamble,
-- ARRAY_SIZE(ar9300_2p2_baseband_postamble), 5);
-+ ar9300_2p2_baseband_postamble);
-
- /* radio */
-- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
-- ar9300_2p2_radio_core,
-- ARRAY_SIZE(ar9300_2p2_radio_core), 2);
-+ ar9300_2p2_radio_core);
- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
-- ar9300_2p2_radio_postamble,
-- ARRAY_SIZE(ar9300_2p2_radio_postamble), 5);
-+ ar9300_2p2_radio_postamble);
-
- /* soc */
- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
-- ar9300_2p2_soc_preamble,
-- ARRAY_SIZE(ar9300_2p2_soc_preamble), 2);
-- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
-+ ar9300_2p2_soc_preamble);
- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
-- ar9300_2p2_soc_postamble,
-- ARRAY_SIZE(ar9300_2p2_soc_postamble), 5);
-+ ar9300_2p2_soc_postamble);
-
- /* rx/tx gain */
- INIT_INI_ARRAY(&ah->iniModesRxGain,
-- ar9300Common_rx_gain_table_2p2,
-- ARRAY_SIZE(ar9300Common_rx_gain_table_2p2), 2);
-+ ar9300Common_rx_gain_table_2p2);
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9300Modes_lowest_ob_db_tx_gain_table_2p2,
-- ARRAY_SIZE(ar9300Modes_lowest_ob_db_tx_gain_table_2p2),
-- 5);
-+ ar9300Modes_lowest_ob_db_tx_gain_table_2p2);
-
- /* Load PCIE SERDES settings from INI */
-
- /* Awake Setting */
-
- INIT_INI_ARRAY(&ah->iniPcieSerdes,
-- ar9300PciePhy_pll_on_clkreq_disable_L1_2p2,
-- ARRAY_SIZE(ar9300PciePhy_pll_on_clkreq_disable_L1_2p2),
-- 2);
-+ ar9300PciePhy_pll_on_clkreq_disable_L1_2p2);
-
- /* Sleep Setting */
-
- INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
-- ar9300PciePhy_pll_on_clkreq_disable_L1_2p2,
-- ARRAY_SIZE(ar9300PciePhy_pll_on_clkreq_disable_L1_2p2),
-- 2);
-+ ar9300PciePhy_pll_on_clkreq_disable_L1_2p2);
-
- /* Fast clock modal settings */
- INIT_INI_ARRAY(&ah->iniModesFastClock,
-- ar9300Modes_fast_clock_2p2,
-- ARRAY_SIZE(ar9300Modes_fast_clock_2p2),
-- 3);
-+ ar9300Modes_fast_clock_2p2);
- }
- }
-
-@@ -507,170 +355,110 @@ static void ar9003_tx_gain_table_mode0(s
- {
- if (AR_SREV_9330_12(ah))
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9331_modes_lowest_ob_db_tx_gain_1p2,
-- ARRAY_SIZE(ar9331_modes_lowest_ob_db_tx_gain_1p2),
-- 5);
-+ ar9331_modes_lowest_ob_db_tx_gain_1p2);
- else if (AR_SREV_9330_11(ah))
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9331_modes_lowest_ob_db_tx_gain_1p1,
-- ARRAY_SIZE(ar9331_modes_lowest_ob_db_tx_gain_1p1),
-- 5);
-+ ar9331_modes_lowest_ob_db_tx_gain_1p1);
- else if (AR_SREV_9340(ah))
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9340Modes_lowest_ob_db_tx_gain_table_1p0,
-- ARRAY_SIZE(ar9340Modes_lowest_ob_db_tx_gain_table_1p0),
-- 5);
-+ ar9340Modes_lowest_ob_db_tx_gain_table_1p0);
- else if (AR_SREV_9485_11(ah))
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9485_modes_lowest_ob_db_tx_gain_1_1,
-- ARRAY_SIZE(ar9485_modes_lowest_ob_db_tx_gain_1_1),
-- 5);
-+ ar9485_modes_lowest_ob_db_tx_gain_1_1);
- else if (AR_SREV_9550(ah))
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar955x_1p0_modes_xpa_tx_gain_table,
-- ARRAY_SIZE(ar955x_1p0_modes_xpa_tx_gain_table),
-- 9);
-+ ar955x_1p0_modes_xpa_tx_gain_table);
- else if (AR_SREV_9580(ah))
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9580_1p0_lowest_ob_db_tx_gain_table,
-- ARRAY_SIZE(ar9580_1p0_lowest_ob_db_tx_gain_table),
-- 5);
-+ ar9580_1p0_lowest_ob_db_tx_gain_table);
- else if (AR_SREV_9462_20(ah))
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9462_modes_low_ob_db_tx_gain_table_2p0,
-- ARRAY_SIZE(ar9462_modes_low_ob_db_tx_gain_table_2p0),
-- 5);
-+ ar9462_modes_low_ob_db_tx_gain_table_2p0);
- else
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9300Modes_lowest_ob_db_tx_gain_table_2p2,
-- ARRAY_SIZE(ar9300Modes_lowest_ob_db_tx_gain_table_2p2),
-- 5);
-+ ar9300Modes_lowest_ob_db_tx_gain_table_2p2);
- }
-
- static void ar9003_tx_gain_table_mode1(struct ath_hw *ah)
- {
- if (AR_SREV_9330_12(ah))
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9331_modes_high_ob_db_tx_gain_1p2,
-- ARRAY_SIZE(ar9331_modes_high_ob_db_tx_gain_1p2),
-- 5);
-+ ar9331_modes_high_ob_db_tx_gain_1p2);
- else if (AR_SREV_9330_11(ah))
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9331_modes_high_ob_db_tx_gain_1p1,
-- ARRAY_SIZE(ar9331_modes_high_ob_db_tx_gain_1p1),
-- 5);
-+ ar9331_modes_high_ob_db_tx_gain_1p1);
- else if (AR_SREV_9340(ah))
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9340Modes_high_ob_db_tx_gain_table_1p0,
-- ARRAY_SIZE(ar9340Modes_high_ob_db_tx_gain_table_1p0),
-- 5);
-+ ar9340Modes_high_ob_db_tx_gain_table_1p0);
- else if (AR_SREV_9485_11(ah))
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9485Modes_high_ob_db_tx_gain_1_1,
-- ARRAY_SIZE(ar9485Modes_high_ob_db_tx_gain_1_1),
-- 5);
-+ ar9485Modes_high_ob_db_tx_gain_1_1);
- else if (AR_SREV_9580(ah))
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9580_1p0_high_ob_db_tx_gain_table,
-- ARRAY_SIZE(ar9580_1p0_high_ob_db_tx_gain_table),
-- 5);
-+ ar9580_1p0_high_ob_db_tx_gain_table);
- else if (AR_SREV_9550(ah))
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar955x_1p0_modes_no_xpa_tx_gain_table,
-- ARRAY_SIZE(ar955x_1p0_modes_no_xpa_tx_gain_table),
-- 9);
-+ ar955x_1p0_modes_no_xpa_tx_gain_table);
- else if (AR_SREV_9462_20(ah))
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9462_modes_high_ob_db_tx_gain_table_2p0,
-- ARRAY_SIZE(ar9462_modes_high_ob_db_tx_gain_table_2p0),
-- 5);
-+ ar9462_modes_high_ob_db_tx_gain_table_2p0);
- else
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9300Modes_high_ob_db_tx_gain_table_2p2,
-- ARRAY_SIZE(ar9300Modes_high_ob_db_tx_gain_table_2p2),
-- 5);
-+ ar9300Modes_high_ob_db_tx_gain_table_2p2);
- }
-
- static void ar9003_tx_gain_table_mode2(struct ath_hw *ah)
- {
- if (AR_SREV_9330_12(ah))
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9331_modes_low_ob_db_tx_gain_1p2,
-- ARRAY_SIZE(ar9331_modes_low_ob_db_tx_gain_1p2),
-- 5);
-+ ar9331_modes_low_ob_db_tx_gain_1p2);
- else if (AR_SREV_9330_11(ah))
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9331_modes_low_ob_db_tx_gain_1p1,
-- ARRAY_SIZE(ar9331_modes_low_ob_db_tx_gain_1p1),
-- 5);
-+ ar9331_modes_low_ob_db_tx_gain_1p1);
- else if (AR_SREV_9340(ah))
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9340Modes_low_ob_db_tx_gain_table_1p0,
-- ARRAY_SIZE(ar9340Modes_low_ob_db_tx_gain_table_1p0),
-- 5);
-+ ar9340Modes_low_ob_db_tx_gain_table_1p0);
- else if (AR_SREV_9485_11(ah))
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9485Modes_low_ob_db_tx_gain_1_1,
-- ARRAY_SIZE(ar9485Modes_low_ob_db_tx_gain_1_1),
-- 5);
-+ ar9485Modes_low_ob_db_tx_gain_1_1);
- else if (AR_SREV_9580(ah))
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9580_1p0_low_ob_db_tx_gain_table,
-- ARRAY_SIZE(ar9580_1p0_low_ob_db_tx_gain_table),
-- 5);
-+ ar9580_1p0_low_ob_db_tx_gain_table);
- else
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9300Modes_low_ob_db_tx_gain_table_2p2,
-- ARRAY_SIZE(ar9300Modes_low_ob_db_tx_gain_table_2p2),
-- 5);
-+ ar9300Modes_low_ob_db_tx_gain_table_2p2);
- }
-
- static void ar9003_tx_gain_table_mode3(struct ath_hw *ah)
- {
- if (AR_SREV_9330_12(ah))
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9331_modes_high_power_tx_gain_1p2,
-- ARRAY_SIZE(ar9331_modes_high_power_tx_gain_1p2),
-- 5);
-+ ar9331_modes_high_power_tx_gain_1p2);
- else if (AR_SREV_9330_11(ah))
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9331_modes_high_power_tx_gain_1p1,
-- ARRAY_SIZE(ar9331_modes_high_power_tx_gain_1p1),
-- 5);
-+ ar9331_modes_high_power_tx_gain_1p1);
- else if (AR_SREV_9340(ah))
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9340Modes_high_power_tx_gain_table_1p0,
-- ARRAY_SIZE(ar9340Modes_high_power_tx_gain_table_1p0),
-- 5);
-+ ar9340Modes_high_power_tx_gain_table_1p0);
- else if (AR_SREV_9485_11(ah))
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9485Modes_high_power_tx_gain_1_1,
-- ARRAY_SIZE(ar9485Modes_high_power_tx_gain_1_1),
-- 5);
-+ ar9485Modes_high_power_tx_gain_1_1);
- else if (AR_SREV_9580(ah))
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9580_1p0_high_power_tx_gain_table,
-- ARRAY_SIZE(ar9580_1p0_high_power_tx_gain_table),
-- 5);
-+ ar9580_1p0_high_power_tx_gain_table);
- else
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9300Modes_high_power_tx_gain_table_2p2,
-- ARRAY_SIZE(ar9300Modes_high_power_tx_gain_table_2p2),
-- 5);
-+ ar9300Modes_high_power_tx_gain_table_2p2);
- }
-
- static void ar9003_tx_gain_table_mode4(struct ath_hw *ah)
- {
- if (AR_SREV_9340(ah))
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9340Modes_mixed_ob_db_tx_gain_table_1p0,
-- ARRAY_SIZE(ar9340Modes_mixed_ob_db_tx_gain_table_1p0),
-- 5);
-+ ar9340Modes_mixed_ob_db_tx_gain_table_1p0);
- else if (AR_SREV_9580(ah))
- INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9580_1p0_mixed_ob_db_tx_gain_table,
-- ARRAY_SIZE(ar9580_1p0_mixed_ob_db_tx_gain_table),
-- 5);
-+ ar9580_1p0_mixed_ob_db_tx_gain_table);
- }
-
- static void ar9003_tx_gain_table_apply(struct ath_hw *ah)
-@@ -699,104 +487,67 @@ static void ar9003_rx_gain_table_mode0(s
- {
- if (AR_SREV_9330_12(ah))
- INIT_INI_ARRAY(&ah->iniModesRxGain,
-- ar9331_common_rx_gain_1p2,
-- ARRAY_SIZE(ar9331_common_rx_gain_1p2),
-- 2);
-+ ar9331_common_rx_gain_1p2);
- else if (AR_SREV_9330_11(ah))
- INIT_INI_ARRAY(&ah->iniModesRxGain,
-- ar9331_common_rx_gain_1p1,
-- ARRAY_SIZE(ar9331_common_rx_gain_1p1),
-- 2);
-+ ar9331_common_rx_gain_1p1);
- else if (AR_SREV_9340(ah))
- INIT_INI_ARRAY(&ah->iniModesRxGain,
-- ar9340Common_rx_gain_table_1p0,
-- ARRAY_SIZE(ar9340Common_rx_gain_table_1p0),
-- 2);
-+ ar9340Common_rx_gain_table_1p0);
- else if (AR_SREV_9485_11(ah))
- INIT_INI_ARRAY(&ah->iniModesRxGain,
-- ar9485Common_wo_xlna_rx_gain_1_1,
-- ARRAY_SIZE(ar9485Common_wo_xlna_rx_gain_1_1),
-- 2);
-+ ar9485Common_wo_xlna_rx_gain_1_1);
- else if (AR_SREV_9550(ah)) {
- INIT_INI_ARRAY(&ah->iniModesRxGain,
-- ar955x_1p0_common_rx_gain_table,
-- ARRAY_SIZE(ar955x_1p0_common_rx_gain_table),
-- 2);
-+ ar955x_1p0_common_rx_gain_table);
- INIT_INI_ARRAY(&ah->ini_modes_rx_gain_bounds,
-- ar955x_1p0_common_rx_gain_bounds,
-- ARRAY_SIZE(ar955x_1p0_common_rx_gain_bounds),
-- 5);
-+ ar955x_1p0_common_rx_gain_bounds);
- } else if (AR_SREV_9580(ah))
- INIT_INI_ARRAY(&ah->iniModesRxGain,
-- ar9580_1p0_rx_gain_table,
-- ARRAY_SIZE(ar9580_1p0_rx_gain_table),
-- 2);
-+ ar9580_1p0_rx_gain_table);
- else if (AR_SREV_9462_20(ah))
- INIT_INI_ARRAY(&ah->iniModesRxGain,
-- ar9462_common_rx_gain_table_2p0,
-- ARRAY_SIZE(ar9462_common_rx_gain_table_2p0),
-- 2);
-+ ar9462_common_rx_gain_table_2p0);
- else
- INIT_INI_ARRAY(&ah->iniModesRxGain,
-- ar9300Common_rx_gain_table_2p2,
-- ARRAY_SIZE(ar9300Common_rx_gain_table_2p2),
-- 2);
-+ ar9300Common_rx_gain_table_2p2);
- }
-
- static void ar9003_rx_gain_table_mode1(struct ath_hw *ah)
- {
- if (AR_SREV_9330_12(ah))
- INIT_INI_ARRAY(&ah->iniModesRxGain,
-- ar9331_common_wo_xlna_rx_gain_1p2,
-- ARRAY_SIZE(ar9331_common_wo_xlna_rx_gain_1p2),
-- 2);
-+ ar9331_common_wo_xlna_rx_gain_1p2);
- else if (AR_SREV_9330_11(ah))
- INIT_INI_ARRAY(&ah->iniModesRxGain,
-- ar9331_common_wo_xlna_rx_gain_1p1,
-- ARRAY_SIZE(ar9331_common_wo_xlna_rx_gain_1p1),
-- 2);
-+ ar9331_common_wo_xlna_rx_gain_1p1);
- else if (AR_SREV_9340(ah))
- INIT_INI_ARRAY(&ah->iniModesRxGain,
-- ar9340Common_wo_xlna_rx_gain_table_1p0,
-- ARRAY_SIZE(ar9340Common_wo_xlna_rx_gain_table_1p0),
-- 2);
-+ ar9340Common_wo_xlna_rx_gain_table_1p0);
- else if (AR_SREV_9485_11(ah))
- INIT_INI_ARRAY(&ah->iniModesRxGain,
-- ar9485Common_wo_xlna_rx_gain_1_1,
-- ARRAY_SIZE(ar9485Common_wo_xlna_rx_gain_1_1),
-- 2);
-+ ar9485Common_wo_xlna_rx_gain_1_1);
- else if (AR_SREV_9462_20(ah))
- INIT_INI_ARRAY(&ah->iniModesRxGain,
-- ar9462_common_wo_xlna_rx_gain_table_2p0,
-- ARRAY_SIZE(ar9462_common_wo_xlna_rx_gain_table_2p0),
-- 2);
-+ ar9462_common_wo_xlna_rx_gain_table_2p0);
- else if (AR_SREV_9550(ah)) {
- INIT_INI_ARRAY(&ah->iniModesRxGain,
-- ar955x_1p0_common_wo_xlna_rx_gain_table,
-- ARRAY_SIZE(ar955x_1p0_common_wo_xlna_rx_gain_table),
-- 2);
-+ ar955x_1p0_common_wo_xlna_rx_gain_table);
- INIT_INI_ARRAY(&ah->ini_modes_rx_gain_bounds,
-- ar955x_1p0_common_wo_xlna_rx_gain_bounds,
-- ARRAY_SIZE(ar955x_1p0_common_wo_xlna_rx_gain_bounds),
-- 5);
-+ ar955x_1p0_common_wo_xlna_rx_gain_bounds);
- } else if (AR_SREV_9580(ah))
- INIT_INI_ARRAY(&ah->iniModesRxGain,
-- ar9580_1p0_wo_xlna_rx_gain_table,
-- ARRAY_SIZE(ar9580_1p0_wo_xlna_rx_gain_table),
-- 2);
-+ ar9580_1p0_wo_xlna_rx_gain_table);
- else
- INIT_INI_ARRAY(&ah->iniModesRxGain,
-- ar9300Common_wo_xlna_rx_gain_table_2p2,
-- ARRAY_SIZE(ar9300Common_wo_xlna_rx_gain_table_2p2),
-- 2);
-+ ar9300Common_wo_xlna_rx_gain_table_2p2);
- }
-
- static void ar9003_rx_gain_table_mode2(struct ath_hw *ah)
- {
- if (AR_SREV_9462_20(ah))
- INIT_INI_ARRAY(&ah->iniModesRxGain,
-- ar9462_common_mixed_rx_gain_table_2p0,
-- ARRAY_SIZE(ar9462_common_mixed_rx_gain_table_2p0), 2);
-+ ar9462_common_mixed_rx_gain_table_2p0);
- }
-
- static void ar9003_rx_gain_table_apply(struct ath_hw *ah)
+++ /dev/null
---- a/drivers/net/wireless/ath/ath9k/main.c
-+++ b/drivers/net/wireless/ath/ath9k/main.c
-@@ -1044,6 +1044,7 @@ static void ath9k_remove_interface(struc
- ath9k_calculate_summary_state(hw, NULL);
-
- mutex_unlock(&sc->mutex);
-+ ath9k_config(hw, IEEE80211_CONF_CHANGE_IDLE);
- ath9k_ps_restore(sc);
- }
-
-@@ -1096,7 +1097,8 @@ int ath9k_config(struct ieee80211_hw *hw
- mutex_lock(&sc->mutex);
-
- if (changed & IEEE80211_CONF_CHANGE_IDLE) {
-- sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
-+ sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE) &&
-+ !sc->nvifs;
- if (sc->ps_idle) {
- ath_cancel_work(sc);
- ath9k_stop_btcoex(sc);
+++ /dev/null
---- a/drivers/net/wireless/ath/ath9k/htc_drv_main.c
-+++ b/drivers/net/wireless/ath/ath9k/htc_drv_main.c
-@@ -1351,7 +1351,7 @@ static int ath9k_htc_conf_tx(struct ieee
- qi.tqi_aifs = params->aifs;
- qi.tqi_cwmin = params->cw_min;
- qi.tqi_cwmax = params->cw_max;
-- qi.tqi_burstTime = params->txop;
-+ qi.tqi_burstTime = params->txop * 32;
-
- qnum = get_hw_qnum(queue, priv->hwq_map);
-
---- a/drivers/net/wireless/ath/ath9k/main.c
-+++ b/drivers/net/wireless/ath/ath9k/main.c
-@@ -1359,7 +1359,7 @@ static int ath9k_conf_tx(struct ieee8021
- qi.tqi_aifs = params->aifs;
- qi.tqi_cwmin = params->cw_min;
- qi.tqi_cwmax = params->cw_max;
-- qi.tqi_burstTime = params->txop;
-+ qi.tqi_burstTime = params->txop * 32;
-
- ath_dbg(common, CONFIG,
- "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
+++ /dev/null
---- a/drivers/net/wireless/ath/ath9k/ath9k.h
-+++ b/drivers/net/wireless/ath/ath9k/ath9k.h
-@@ -297,6 +297,7 @@ struct ath_tx {
- struct ath_txq txq[ATH9K_NUM_TX_QUEUES];
- struct ath_descdma txdma;
- struct ath_txq *txq_map[WME_NUM_AC];
-+ u32 txq_max_pending[WME_NUM_AC];
- };
-
- struct ath_rx_edma {
---- a/drivers/net/wireless/ath/ath9k/init.c
-+++ b/drivers/net/wireless/ath/ath9k/init.c
-@@ -436,6 +436,7 @@ static int ath9k_init_queues(struct ath_
- for (i = 0; i < WME_NUM_AC; i++) {
- sc->tx.txq_map[i] = ath_txq_setup(sc, ATH9K_TX_QUEUE_DATA, i);
- sc->tx.txq_map[i]->mac80211_qnum = i;
-+ sc->tx.txq_max_pending[i] = ATH_MAX_QDEPTH;
- }
- return 0;
- }
---- a/drivers/net/wireless/ath/ath9k/xmit.c
-+++ b/drivers/net/wireless/ath/ath9k/xmit.c
-@@ -1987,7 +1987,8 @@ int ath_tx_start(struct ieee80211_hw *hw
-
- ath_txq_lock(sc, txq);
- if (txq == sc->tx.txq_map[q] &&
-- ++txq->pending_frames > ATH_MAX_QDEPTH && !txq->stopped) {
-+ ++txq->pending_frames > sc->tx.txq_max_pending[q] &&
-+ !txq->stopped) {
- ieee80211_stop_queue(sc->hw, q);
- txq->stopped = true;
- }
-@@ -2046,7 +2047,8 @@ static void ath_tx_complete(struct ath_s
- if (WARN_ON(--txq->pending_frames < 0))
- txq->pending_frames = 0;
-
-- if (txq->stopped && txq->pending_frames < ATH_MAX_QDEPTH) {
-+ if (txq->stopped &&
-+ txq->pending_frames < sc->tx.txq_max_pending[q]) {
- ieee80211_wake_queue(sc->hw, q);
- txq->stopped = false;
- }
---- a/drivers/net/wireless/ath/ath9k/debug.c
-+++ b/drivers/net/wireless/ath/ath9k/debug.c
-@@ -1701,6 +1701,14 @@ int ath9k_init_debug(struct ath_hw *ah)
- &fops_interrupt);
- debugfs_create_file("xmit", S_IRUSR, sc->debug.debugfs_phy, sc,
- &fops_xmit);
-+ debugfs_create_u32("qlen_bk", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
-+ &sc->tx.txq_max_pending[WME_AC_BK]);
-+ debugfs_create_u32("qlen_be", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
-+ &sc->tx.txq_max_pending[WME_AC_BE]);
-+ debugfs_create_u32("qlen_vi", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
-+ &sc->tx.txq_max_pending[WME_AC_VI]);
-+ debugfs_create_u32("qlen_vo", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
-+ &sc->tx.txq_max_pending[WME_AC_VO]);
- debugfs_create_file("stations", S_IRUSR, sc->debug.debugfs_phy, sc,
- &fops_stations);
- debugfs_create_file("misc", S_IRUSR, sc->debug.debugfs_phy, sc,
+++ /dev/null
---- a/drivers/net/wireless/ath/ath9k/ath9k.h
-+++ b/drivers/net/wireless/ath/ath9k/ath9k.h
-@@ -298,6 +298,7 @@ struct ath_tx {
- struct ath_descdma txdma;
- struct ath_txq *txq_map[WME_NUM_AC];
- u32 txq_max_pending[WME_NUM_AC];
-+ u16 max_aggr_framelen[WME_NUM_AC][4][32];
- };
-
- struct ath_rx_edma {
-@@ -342,6 +343,7 @@ int ath_tx_init(struct ath_softc *sc, in
- void ath_tx_cleanup(struct ath_softc *sc);
- int ath_txq_update(struct ath_softc *sc, int qnum,
- struct ath9k_tx_queue_info *q);
-+void ath_update_max_aggr_framelen(struct ath_softc *sc, int queue, int txop);
- int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
- struct ath_tx_control *txctl);
- void ath_tx_tasklet(struct ath_softc *sc);
---- a/drivers/net/wireless/ath/ath9k/xmit.c
-+++ b/drivers/net/wireless/ath/ath9k/xmit.c
-@@ -29,6 +29,8 @@
- #define HT_LTF(_ns) (4 * (_ns))
- #define SYMBOL_TIME(_ns) ((_ns) << 2) /* ns * 4 us */
- #define SYMBOL_TIME_HALFGI(_ns) (((_ns) * 18 + 4) / 5) /* ns * 3.6 us */
-+#define TIME_SYMBOLS(t) ((t) >> 2)
-+#define TIME_SYMBOLS_HALFGI(t) (((t) * 5 - 4) / 18)
- #define NUM_SYMBOLS_PER_USEC(_usec) (_usec >> 2)
- #define NUM_SYMBOLS_PER_USEC_HALFGI(_usec) (((_usec*5)-4)/18)
-
-@@ -74,33 +76,6 @@ enum {
- MCS_HT40_SGI,
- };
-
--static int ath_max_4ms_framelen[4][32] = {
-- [MCS_HT20] = {
-- 3212, 6432, 9648, 12864, 19300, 25736, 28952, 32172,
-- 6424, 12852, 19280, 25708, 38568, 51424, 57852, 64280,
-- 9628, 19260, 28896, 38528, 57792, 65532, 65532, 65532,
-- 12828, 25656, 38488, 51320, 65532, 65532, 65532, 65532,
-- },
-- [MCS_HT20_SGI] = {
-- 3572, 7144, 10720, 14296, 21444, 28596, 32172, 35744,
-- 7140, 14284, 21428, 28568, 42856, 57144, 64288, 65532,
-- 10700, 21408, 32112, 42816, 64228, 65532, 65532, 65532,
-- 14256, 28516, 42780, 57040, 65532, 65532, 65532, 65532,
-- },
-- [MCS_HT40] = {
-- 6680, 13360, 20044, 26724, 40092, 53456, 60140, 65532,
-- 13348, 26700, 40052, 53400, 65532, 65532, 65532, 65532,
-- 20004, 40008, 60016, 65532, 65532, 65532, 65532, 65532,
-- 26644, 53292, 65532, 65532, 65532, 65532, 65532, 65532,
-- },
-- [MCS_HT40_SGI] = {
-- 7420, 14844, 22272, 29696, 44544, 59396, 65532, 65532,
-- 14832, 29668, 44504, 59340, 65532, 65532, 65532, 65532,
-- 22232, 44464, 65532, 65532, 65532, 65532, 65532, 65532,
-- 29616, 59232, 65532, 65532, 65532, 65532, 65532, 65532,
-- }
--};
--
- /*********************/
- /* Aggregation logic */
- /*********************/
-@@ -648,6 +623,7 @@ static u32 ath_lookup_rate(struct ath_so
- struct ieee80211_tx_rate *rates;
- u32 max_4ms_framelen, frmlen;
- u16 aggr_limit, bt_aggr_limit, legacy = 0;
-+ int q = tid->ac->txq->mac80211_qnum;
- int i;
-
- skb = bf->bf_mpdu;
-@@ -680,7 +656,7 @@ static u32 ath_lookup_rate(struct ath_so
- if (rates[i].flags & IEEE80211_TX_RC_SHORT_GI)
- modeidx++;
-
-- frmlen = ath_max_4ms_framelen[modeidx][rates[i].idx];
-+ frmlen = sc->tx.max_aggr_framelen[q][modeidx][rates[i].idx];
- max_4ms_framelen = min(max_4ms_framelen, frmlen);
- }
-
-@@ -927,6 +903,44 @@ static u32 ath_pkt_duration(struct ath_s
- return duration;
- }
-
-+static int ath_max_framelen(int usec, int mcs, bool ht40, bool sgi)
-+{
-+ int streams = HT_RC_2_STREAMS(mcs);
-+ int symbols, bits;
-+ int bytes = 0;
-+
-+ symbols = sgi ? TIME_SYMBOLS_HALFGI(usec) : TIME_SYMBOLS(usec);
-+ bits = symbols * bits_per_symbol[mcs % 8][ht40] * streams;
-+ bits -= OFDM_PLCP_BITS;
-+ bytes = bits / 8;
-+ bytes -= L_STF + L_LTF + L_SIG + HT_SIG + HT_STF + HT_LTF(streams);
-+ if (bytes > 65532)
-+ bytes = 65532;
-+
-+ return bytes;
-+}
-+
-+void ath_update_max_aggr_framelen(struct ath_softc *sc, int queue, int txop)
-+{
-+ u16 *cur_ht20, *cur_ht20_sgi, *cur_ht40, *cur_ht40_sgi;
-+ int mcs;
-+
-+ /* 4ms is the default (and maximum) duration */
-+ if (!txop || txop > 4096)
-+ txop = 4096;
-+
-+ cur_ht20 = sc->tx.max_aggr_framelen[queue][MCS_HT20];
-+ cur_ht20_sgi = sc->tx.max_aggr_framelen[queue][MCS_HT20_SGI];
-+ cur_ht40 = sc->tx.max_aggr_framelen[queue][MCS_HT40];
-+ cur_ht40_sgi = sc->tx.max_aggr_framelen[queue][MCS_HT40_SGI];
-+ for (mcs = 0; mcs < 32; mcs++) {
-+ cur_ht20[mcs] = ath_max_framelen(txop, mcs, false, false);
-+ cur_ht20_sgi[mcs] = ath_max_framelen(txop, mcs, false, true);
-+ cur_ht40[mcs] = ath_max_framelen(txop, mcs, true, false);
-+ cur_ht40_sgi[mcs] = ath_max_framelen(txop, mcs, true, true);
-+ }
-+}
-+
- static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf,
- struct ath_tx_info *info, int len)
- {
---- a/drivers/net/wireless/ath/ath9k/main.c
-+++ b/drivers/net/wireless/ath/ath9k/main.c
-@@ -1366,6 +1366,7 @@ static int ath9k_conf_tx(struct ieee8021
- queue, txq->axq_qnum, params->aifs, params->cw_min,
- params->cw_max, params->txop);
-
-+ ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime);
- ret = ath_txq_update(sc, txq->axq_qnum, &qi);
- if (ret)
- ath_err(common, "TXQ Update failed\n");
+++ /dev/null
---- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
-+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
-@@ -3962,9 +3962,32 @@ static void ar9003_hw_txend_to_xpa_off_a
- AR_PHY_XPA_TIMING_CTL_TX_END_XPAA_OFF, value);
- }
-
-+static void ar9003_hw_xpa_timing_control_apply(struct ath_hw *ah, bool is_2ghz)
-+{
-+ struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
-+ u8 xpa_ctl;
-+
-+ if (!(eep->baseEepHeader.featureEnable & 0x80))
-+ return;
-+
-+ if (!AR_SREV_9300(ah) && !AR_SREV_9340(ah) && !AR_SREV_9580(ah))
-+ return;
-+
-+ if (is_2ghz) {
-+ xpa_ctl = eep->modalHeader2G.txFrameToXpaOn;
-+ REG_RMW_FIELD(ah, AR_PHY_XPA_TIMING_CTL,
-+ AR_PHY_XPA_TIMING_CTL_FRAME_XPAB_ON, xpa_ctl);
-+ } else {
-+ xpa_ctl = eep->modalHeader5G.txFrameToXpaOn;
-+ REG_RMW_FIELD(ah, AR_PHY_XPA_TIMING_CTL,
-+ AR_PHY_XPA_TIMING_CTL_FRAME_XPAA_ON, xpa_ctl);
-+ }
-+}
-+
- static void ath9k_hw_ar9300_set_board_values(struct ath_hw *ah,
- struct ath9k_channel *chan)
- {
-+ ar9003_hw_xpa_timing_control_apply(ah, IS_CHAN_2GHZ(chan));
- ar9003_hw_xpa_bias_level_apply(ah, IS_CHAN_2GHZ(chan));
- ar9003_hw_ant_ctrl_apply(ah, IS_CHAN_2GHZ(chan));
- ar9003_hw_drive_strength_apply(ah);
+++ /dev/null
---- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
-+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
-@@ -2971,14 +2971,6 @@ static u32 ath9k_hw_ar9300_get_eeprom(st
- return (pBase->txrxMask >> 4) & 0xf;
- case EEP_RX_MASK:
- return pBase->txrxMask & 0xf;
-- case EEP_DRIVE_STRENGTH:
--#define AR9300_EEP_BASE_DRIV_STRENGTH 0x1
-- return pBase->miscConfiguration & AR9300_EEP_BASE_DRIV_STRENGTH;
-- case EEP_INTERNAL_REGULATOR:
-- /* Bit 4 is internal regulator flag */
-- return (pBase->featureEnable & 0x10) >> 4;
-- case EEP_SWREG:
-- return le32_to_cpu(pBase->swreg);
- case EEP_PAPRD:
- return !!(pBase->featureEnable & BIT(5));
- case EEP_CHAIN_MASK_REDUCE:
-@@ -2989,8 +2981,6 @@ static u32 ath9k_hw_ar9300_get_eeprom(st
- return eep->modalHeader5G.antennaGain;
- case EEP_ANTENNA_GAIN_2G:
- return eep->modalHeader2G.antennaGain;
-- case EEP_QUICK_DROP:
-- return pBase->miscConfiguration & BIT(1);
- default:
- return 0;
- }
-@@ -3503,19 +3493,20 @@ static int ath9k_hw_ar9300_get_eeprom_re
- return 0;
- }
-
--static s32 ar9003_hw_xpa_bias_level_get(struct ath_hw *ah, bool is2ghz)
-+static struct ar9300_modal_eep_header *ar9003_modal_header(struct ath_hw *ah,
-+ bool is2ghz)
- {
- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
-
- if (is2ghz)
-- return eep->modalHeader2G.xpaBiasLvl;
-+ return &eep->modalHeader2G;
- else
-- return eep->modalHeader5G.xpaBiasLvl;
-+ return &eep->modalHeader5G;
- }
-
- static void ar9003_hw_xpa_bias_level_apply(struct ath_hw *ah, bool is2ghz)
- {
-- int bias = ar9003_hw_xpa_bias_level_get(ah, is2ghz);
-+ int bias = ar9003_modal_header(ah, is2ghz)->xpaBiasLvl;
-
- if (AR_SREV_9485(ah) || AR_SREV_9330(ah) || AR_SREV_9340(ah))
- REG_RMW_FIELD(ah, AR_CH0_TOP2, AR_CH0_TOP2_XPABIASLVL, bias);
-@@ -3531,57 +3522,26 @@ static void ar9003_hw_xpa_bias_level_app
- }
- }
-
--static u16 ar9003_switch_com_spdt_get(struct ath_hw *ah, bool is_2ghz)
-+static u16 ar9003_switch_com_spdt_get(struct ath_hw *ah, bool is2ghz)
- {
-- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
-- __le16 val;
--
-- if (is_2ghz)
-- val = eep->modalHeader2G.switchcomspdt;
-- else
-- val = eep->modalHeader5G.switchcomspdt;
-- return le16_to_cpu(val);
-+ return le16_to_cpu(ar9003_modal_header(ah, is2ghz)->switchcomspdt);
- }
-
-
- static u32 ar9003_hw_ant_ctrl_common_get(struct ath_hw *ah, bool is2ghz)
- {
-- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
-- __le32 val;
--
-- if (is2ghz)
-- val = eep->modalHeader2G.antCtrlCommon;
-- else
-- val = eep->modalHeader5G.antCtrlCommon;
-- return le32_to_cpu(val);
-+ return le32_to_cpu(ar9003_modal_header(ah, is2ghz)->antCtrlCommon);
- }
-
- static u32 ar9003_hw_ant_ctrl_common_2_get(struct ath_hw *ah, bool is2ghz)
- {
-- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
-- __le32 val;
--
-- if (is2ghz)
-- val = eep->modalHeader2G.antCtrlCommon2;
-- else
-- val = eep->modalHeader5G.antCtrlCommon2;
-- return le32_to_cpu(val);
-+ return le32_to_cpu(ar9003_modal_header(ah, is2ghz)->antCtrlCommon2);
- }
-
--static u16 ar9003_hw_ant_ctrl_chain_get(struct ath_hw *ah,
-- int chain,
-+static u16 ar9003_hw_ant_ctrl_chain_get(struct ath_hw *ah, int chain,
- bool is2ghz)
- {
-- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
-- __le16 val = 0;
--
-- if (chain >= 0 && chain < AR9300_MAX_CHAINS) {
-- if (is2ghz)
-- val = eep->modalHeader2G.antCtrlChain[chain];
-- else
-- val = eep->modalHeader5G.antCtrlChain[chain];
-- }
--
-+ __le16 val = ar9003_modal_header(ah, is2ghz)->antCtrlChain[chain];
- return le16_to_cpu(val);
- }
-
-@@ -3691,11 +3651,12 @@ static void ar9003_hw_ant_ctrl_apply(str
-
- static void ar9003_hw_drive_strength_apply(struct ath_hw *ah)
- {
-+ struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
-+ struct ar9300_base_eep_hdr *pBase = &eep->baseEepHeader;
- int drive_strength;
- unsigned long reg;
-
-- drive_strength = ath9k_hw_ar9300_get_eeprom(ah, EEP_DRIVE_STRENGTH);
--
-+ drive_strength = pBase->miscConfiguration & BIT(0);
- if (!drive_strength)
- return;
-
-@@ -3825,11 +3786,11 @@ static bool is_pmu_set(struct ath_hw *ah
-
- void ar9003_hw_internal_regulator_apply(struct ath_hw *ah)
- {
-- int internal_regulator =
-- ath9k_hw_ar9300_get_eeprom(ah, EEP_INTERNAL_REGULATOR);
-+ struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
-+ struct ar9300_base_eep_hdr *pBase = &eep->baseEepHeader;
- u32 reg_val;
-
-- if (internal_regulator) {
-+ if (pBase->featureEnable & BIT(4)) {
- if (AR_SREV_9330(ah) || AR_SREV_9485(ah)) {
- int reg_pmu_set;
-
-@@ -3873,11 +3834,11 @@ void ar9003_hw_internal_regulator_apply(
- if (!is_pmu_set(ah, AR_PHY_PMU2, reg_pmu_set))
- return;
- } else if (AR_SREV_9462(ah)) {
-- reg_val = ath9k_hw_ar9300_get_eeprom(ah, EEP_SWREG);
-+ reg_val = le32_to_cpu(pBase->swreg);
- REG_WRITE(ah, AR_PHY_PMU1, reg_val);
- } else {
- /* Internal regulator is ON. Write swreg register. */
-- reg_val = ath9k_hw_ar9300_get_eeprom(ah, EEP_SWREG);
-+ reg_val = le32_to_cpu(pBase->swreg);
- REG_WRITE(ah, AR_RTC_REG_CONTROL1,
- REG_READ(ah, AR_RTC_REG_CONTROL1) &
- (~AR_RTC_REG_CONTROL1_SWREG_PROGRAM));
-@@ -3931,10 +3892,11 @@ static void ar9003_hw_apply_tuning_caps(
- static void ar9003_hw_quick_drop_apply(struct ath_hw *ah, u16 freq)
- {
- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
-- int quick_drop = ath9k_hw_ar9300_get_eeprom(ah, EEP_QUICK_DROP);
-+ struct ar9300_base_eep_hdr *pBase = &eep->baseEepHeader;
-+ int quick_drop;
- s32 t[3], f[3] = {5180, 5500, 5785};
-
-- if (!quick_drop)
-+ if (!(pBase->miscConfiguration & BIT(1)))
- return;
-
- if (freq < 4000)
-@@ -3948,13 +3910,11 @@ static void ar9003_hw_quick_drop_apply(s
- REG_RMW_FIELD(ah, AR_PHY_AGC, AR_PHY_AGC_QUICK_DROP, quick_drop);
- }
-
--static void ar9003_hw_txend_to_xpa_off_apply(struct ath_hw *ah, u16 freq)
-+static void ar9003_hw_txend_to_xpa_off_apply(struct ath_hw *ah, bool is2ghz)
- {
-- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
- u32 value;
-
-- value = (freq < 4000) ? eep->modalHeader2G.txEndToXpaOff :
-- eep->modalHeader5G.txEndToXpaOff;
-+ value = ar9003_modal_header(ah, is2ghz)->txEndToXpaOff;
-
- REG_RMW_FIELD(ah, AR_PHY_XPA_TIMING_CTL,
- AR_PHY_XPA_TIMING_CTL_TX_END_XPAB_OFF, value);
-@@ -3962,7 +3922,7 @@ static void ar9003_hw_txend_to_xpa_off_a
- AR_PHY_XPA_TIMING_CTL_TX_END_XPAA_OFF, value);
- }
-
--static void ar9003_hw_xpa_timing_control_apply(struct ath_hw *ah, bool is_2ghz)
-+static void ar9003_hw_xpa_timing_control_apply(struct ath_hw *ah, bool is2ghz)
- {
- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
- u8 xpa_ctl;
-@@ -3973,23 +3933,22 @@ static void ar9003_hw_xpa_timing_control
- if (!AR_SREV_9300(ah) && !AR_SREV_9340(ah) && !AR_SREV_9580(ah))
- return;
-
-- if (is_2ghz) {
-- xpa_ctl = eep->modalHeader2G.txFrameToXpaOn;
-+ xpa_ctl = ar9003_modal_header(ah, is2ghz)->txFrameToXpaOn;
-+ if (is2ghz)
- REG_RMW_FIELD(ah, AR_PHY_XPA_TIMING_CTL,
- AR_PHY_XPA_TIMING_CTL_FRAME_XPAB_ON, xpa_ctl);
-- } else {
-- xpa_ctl = eep->modalHeader5G.txFrameToXpaOn;
-+ else
- REG_RMW_FIELD(ah, AR_PHY_XPA_TIMING_CTL,
- AR_PHY_XPA_TIMING_CTL_FRAME_XPAA_ON, xpa_ctl);
-- }
- }
-
- static void ath9k_hw_ar9300_set_board_values(struct ath_hw *ah,
- struct ath9k_channel *chan)
- {
-- ar9003_hw_xpa_timing_control_apply(ah, IS_CHAN_2GHZ(chan));
-- ar9003_hw_xpa_bias_level_apply(ah, IS_CHAN_2GHZ(chan));
-- ar9003_hw_ant_ctrl_apply(ah, IS_CHAN_2GHZ(chan));
-+ bool is2ghz = IS_CHAN_2GHZ(chan);
-+ ar9003_hw_xpa_timing_control_apply(ah, is2ghz);
-+ ar9003_hw_xpa_bias_level_apply(ah, is2ghz);
-+ ar9003_hw_ant_ctrl_apply(ah, is2ghz);
- ar9003_hw_drive_strength_apply(ah);
- ar9003_hw_atten_apply(ah, chan);
- ar9003_hw_quick_drop_apply(ah, chan->channel);
-@@ -3997,7 +3956,7 @@ static void ath9k_hw_ar9300_set_board_va
- ar9003_hw_internal_regulator_apply(ah);
- if (AR_SREV_9485(ah) || AR_SREV_9330(ah) || AR_SREV_9340(ah))
- ar9003_hw_apply_tuning_caps(ah);
-- ar9003_hw_txend_to_xpa_off_apply(ah, chan->channel);
-+ ar9003_hw_txend_to_xpa_off_apply(ah, is2ghz);
- }
-
- static void ath9k_hw_ar9300_set_addac(struct ath_hw *ah,
-@@ -5133,14 +5092,9 @@ s32 ar9003_hw_get_rx_gain_idx(struct ath
- return (eep->baseEepHeader.txrxgain) & 0xf; /* bits 3:0 */
- }
-
--u8 *ar9003_get_spur_chan_ptr(struct ath_hw *ah, bool is_2ghz)
-+u8 *ar9003_get_spur_chan_ptr(struct ath_hw *ah, bool is2ghz)
- {
-- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
--
-- if (is_2ghz)
-- return eep->modalHeader2G.spurChans;
-- else
-- return eep->modalHeader5G.spurChans;
-+ return ar9003_modal_header(ah, is2ghz)->spurChans;
- }
-
- unsigned int ar9003_get_paprd_scale_factor(struct ath_hw *ah,
---- a/drivers/net/wireless/ath/ath9k/eeprom.h
-+++ b/drivers/net/wireless/ath/ath9k/eeprom.h
-@@ -241,16 +241,12 @@ enum eeprom_param {
- EEP_TEMPSENSE_SLOPE,
- EEP_TEMPSENSE_SLOPE_PAL_ON,
- EEP_PWR_TABLE_OFFSET,
-- EEP_DRIVE_STRENGTH,
-- EEP_INTERNAL_REGULATOR,
-- EEP_SWREG,
- EEP_PAPRD,
- EEP_MODAL_VER,
- EEP_ANT_DIV_CTL1,
- EEP_CHAIN_MASK_REDUCE,
- EEP_ANTENNA_GAIN_2G,
- EEP_ANTENNA_GAIN_5G,
-- EEP_QUICK_DROP
- };
-
- enum ar5416_rates {
+++ /dev/null
---- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
-+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
-@@ -131,8 +131,9 @@ static const struct ar9300_eeprom ar9300
- .thresh62 = 28,
- .papdRateMaskHt20 = LE32(0x0cf0e0e0),
- .papdRateMaskHt40 = LE32(0x6cf0e0e0),
-+ .xlna_bias_strength = 0,
- .futureModal = {
-- 0, 0, 0, 0, 0, 0, 0, 0,
-+ 0, 0, 0, 0, 0, 0, 0,
- },
- },
- .base_ext1 = {
-@@ -331,8 +332,9 @@ static const struct ar9300_eeprom ar9300
- .thresh62 = 28,
- .papdRateMaskHt20 = LE32(0x0c80c080),
- .papdRateMaskHt40 = LE32(0x0080c080),
-+ .xlna_bias_strength = 0,
- .futureModal = {
-- 0, 0, 0, 0, 0, 0, 0, 0,
-+ 0, 0, 0, 0, 0, 0, 0,
- },
- },
- .base_ext2 = {
-@@ -704,8 +706,9 @@ static const struct ar9300_eeprom ar9300
- .thresh62 = 28,
- .papdRateMaskHt20 = LE32(0x0c80c080),
- .papdRateMaskHt40 = LE32(0x0080c080),
-+ .xlna_bias_strength = 0,
- .futureModal = {
-- 0, 0, 0, 0, 0, 0, 0, 0,
-+ 0, 0, 0, 0, 0, 0, 0,
- },
- },
- .base_ext1 = {
-@@ -904,8 +907,9 @@ static const struct ar9300_eeprom ar9300
- .thresh62 = 28,
- .papdRateMaskHt20 = LE32(0x0cf0e0e0),
- .papdRateMaskHt40 = LE32(0x6cf0e0e0),
-+ .xlna_bias_strength = 0,
- .futureModal = {
-- 0, 0, 0, 0, 0, 0, 0, 0,
-+ 0, 0, 0, 0, 0, 0, 0,
- },
- },
- .base_ext2 = {
-@@ -1278,8 +1282,9 @@ static const struct ar9300_eeprom ar9300
- .thresh62 = 28,
- .papdRateMaskHt20 = LE32(0x0c80c080),
- .papdRateMaskHt40 = LE32(0x0080c080),
-+ .xlna_bias_strength = 0,
- .futureModal = {
-- 0, 0, 0, 0, 0, 0, 0, 0,
-+ 0, 0, 0, 0, 0, 0, 0,
- },
- },
- .base_ext1 = {
-@@ -1478,8 +1483,9 @@ static const struct ar9300_eeprom ar9300
- .thresh62 = 28,
- .papdRateMaskHt20 = LE32(0x0cf0e0e0),
- .papdRateMaskHt40 = LE32(0x6cf0e0e0),
-+ .xlna_bias_strength = 0,
- .futureModal = {
-- 0, 0, 0, 0, 0, 0, 0, 0,
-+ 0, 0, 0, 0, 0, 0, 0,
- },
- },
- .base_ext2 = {
-@@ -1852,8 +1858,9 @@ static const struct ar9300_eeprom ar9300
- .thresh62 = 28,
- .papdRateMaskHt20 = LE32(0x0c80c080),
- .papdRateMaskHt40 = LE32(0x0080c080),
-+ .xlna_bias_strength = 0,
- .futureModal = {
-- 0, 0, 0, 0, 0, 0, 0, 0,
-+ 0, 0, 0, 0, 0, 0, 0,
- },
- },
- .base_ext1 = {
-@@ -2052,8 +2059,9 @@ static const struct ar9300_eeprom ar9300
- .thresh62 = 28,
- .papdRateMaskHt20 = LE32(0x0cf0e0e0),
- .papdRateMaskHt40 = LE32(0x6cf0e0e0),
-+ .xlna_bias_strength = 0,
- .futureModal = {
-- 0, 0, 0, 0, 0, 0, 0, 0,
-+ 0, 0, 0, 0, 0, 0, 0,
- },
- },
- .base_ext2 = {
-@@ -2425,8 +2433,9 @@ static const struct ar9300_eeprom ar9300
- .thresh62 = 28,
- .papdRateMaskHt20 = LE32(0x0c80C080),
- .papdRateMaskHt40 = LE32(0x0080C080),
-+ .xlna_bias_strength = 0,
- .futureModal = {
-- 0, 0, 0, 0, 0, 0, 0, 0,
-+ 0, 0, 0, 0, 0, 0, 0,
- },
- },
- .base_ext1 = {
-@@ -2625,8 +2634,9 @@ static const struct ar9300_eeprom ar9300
- .thresh62 = 28,
- .papdRateMaskHt20 = LE32(0x0cf0e0e0),
- .papdRateMaskHt40 = LE32(0x6cf0e0e0),
-+ .xlna_bias_strength = 0,
- .futureModal = {
-- 0, 0, 0, 0, 0, 0, 0, 0,
-+ 0, 0, 0, 0, 0, 0, 0,
- },
- },
- .base_ext2 = {
-@@ -3942,6 +3952,28 @@ static void ar9003_hw_xpa_timing_control
- AR_PHY_XPA_TIMING_CTL_FRAME_XPAA_ON, xpa_ctl);
- }
-
-+static void ar9003_hw_xlna_bias_strength_apply(struct ath_hw *ah, bool is2ghz)
-+{
-+ struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
-+ u8 bias;
-+
-+ if (!(eep->baseEepHeader.featureEnable & 0x40))
-+ return;
-+
-+ if (!AR_SREV_9300(ah))
-+ return;
-+
-+ bias = ar9003_modal_header(ah, is2ghz)->xlna_bias_strength;
-+ REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_RXTX4, AR_PHY_65NM_RXTX4_XLNA_BIAS,
-+ bias & 0x3);
-+ bias >>= 2;
-+ REG_RMW_FIELD(ah, AR_PHY_65NM_CH1_RXTX4, AR_PHY_65NM_RXTX4_XLNA_BIAS,
-+ bias & 0x3);
-+ bias >>= 2;
-+ REG_RMW_FIELD(ah, AR_PHY_65NM_CH2_RXTX4, AR_PHY_65NM_RXTX4_XLNA_BIAS,
-+ bias & 0x3);
-+}
-+
- static void ath9k_hw_ar9300_set_board_values(struct ath_hw *ah,
- struct ath9k_channel *chan)
- {
-@@ -3950,6 +3982,7 @@ static void ath9k_hw_ar9300_set_board_va
- ar9003_hw_xpa_bias_level_apply(ah, is2ghz);
- ar9003_hw_ant_ctrl_apply(ah, is2ghz);
- ar9003_hw_drive_strength_apply(ah);
-+ ar9003_hw_xlna_bias_strength_apply(ah, is2ghz);
- ar9003_hw_atten_apply(ah, chan);
- ar9003_hw_quick_drop_apply(ah, chan->channel);
- if (!AR_SREV_9330(ah) && !AR_SREV_9340(ah) && !AR_SREV_9550(ah))
---- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
-+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
-@@ -231,7 +231,8 @@ struct ar9300_modal_eep_header {
- __le32 papdRateMaskHt20;
- __le32 papdRateMaskHt40;
- __le16 switchcomspdt;
-- u8 futureModal[8];
-+ u8 xlna_bias_strength;
-+ u8 futureModal[7];
- } __packed;
-
- struct ar9300_cal_data_per_freq_op_loop {
---- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h
-+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
-@@ -633,6 +633,8 @@
- #define AR_PHY_65NM_CH0_BIAS2 0x160c4
- #define AR_PHY_65NM_CH0_BIAS4 0x160cc
- #define AR_PHY_65NM_CH0_RXTX4 0x1610c
-+#define AR_PHY_65NM_CH1_RXTX4 0x1650c
-+#define AR_PHY_65NM_CH2_RXTX4 0x1690c
-
- #define AR_CH0_TOP (AR_SREV_9300(ah) ? 0x16288 : \
- ((AR_SREV_9462(ah) ? 0x1628c : 0x16280)))
-@@ -876,6 +878,9 @@
- #define AR_PHY_65NM_CH0_RXTX4_THERM_ON 0x10000000
- #define AR_PHY_65NM_CH0_RXTX4_THERM_ON_S 28
-
-+#define AR_PHY_65NM_RXTX4_XLNA_BIAS 0xC0000000
-+#define AR_PHY_65NM_RXTX4_XLNA_BIAS_S 30
-+
- /*
- * Channel 1 Register Map
- */
+++ /dev/null
---- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
-+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
-@@ -3890,6 +3890,9 @@ static void ar9003_hw_apply_tuning_caps(
- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
- u8 tuning_caps_param = eep->baseEepHeader.params_for_tuning_caps[0];
-
-+ if (AR_SREV_9485(ah) || AR_SREV_9330(ah) || AR_SREV_9340(ah))
-+ return;
-+
- if (eep->baseEepHeader.featureEnable & 0x40) {
- tuning_caps_param &= 0x7f;
- REG_RMW_FIELD(ah, AR_CH0_XTAL, AR_CH0_XTAL_CAPINDAC,
-@@ -3987,8 +3990,7 @@ static void ath9k_hw_ar9300_set_board_va
- ar9003_hw_quick_drop_apply(ah, chan->channel);
- if (!AR_SREV_9330(ah) && !AR_SREV_9340(ah) && !AR_SREV_9550(ah))
- ar9003_hw_internal_regulator_apply(ah);
-- if (AR_SREV_9485(ah) || AR_SREV_9330(ah) || AR_SREV_9340(ah))
-- ar9003_hw_apply_tuning_caps(ah);
-+ ar9003_hw_apply_tuning_caps(ah);
- ar9003_hw_txend_to_xpa_off_apply(ah, is2ghz);
- }
-
+++ /dev/null
---- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
-+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
-@@ -117,8 +117,8 @@ static int ar9003_hw_set_channel(struct
- ah->is_clk_25mhz) {
- u32 chan_frac;
-
-- channelSel = (freq * 2) / 75;
-- chan_frac = (((freq * 2) % 75) * 0x20000) / 75;
-+ channelSel = freq / 75;
-+ chan_frac = ((freq % 75) * 0x20000) / 75;
- channelSel = (channelSel << 17) | chan_frac;
- } else {
- channelSel = CHANSEL_5G(freq);
+++ /dev/null
---- a/drivers/net/wireless/ath/ath9k/mac.c
-+++ b/drivers/net/wireless/ath/ath9k/mac.c
-@@ -689,7 +689,7 @@ bool ath9k_hw_stopdmarecv(struct ath_hw
- {
- #define AH_RX_STOP_DMA_TIMEOUT 10000 /* usec */
- struct ath_common *common = ath9k_hw_common(ah);
-- u32 mac_status, last_mac_status = 0;
-+ u32 mac_status = 0, last_mac_status = 0;
- int i;
-
- /* Enable access to the DMA observation bus */
-@@ -719,6 +719,16 @@ bool ath9k_hw_stopdmarecv(struct ath_hw
- }
-
- if (i == 0) {
-+ if (!AR_SREV_9300_20_OR_LATER(ah) &&
-+ (mac_status & 0x700) == 0) {
-+ /*
-+ * DMA is idle but the MAC is still stuck
-+ * processing events
-+ */
-+ *reset = true;
-+ return true;
-+ }
-+
- ath_err(common,
- "DMA failed to stop in %d ms AR_CR=0x%08x AR_DIAG_SW=0x%08x DMADBG_7=0x%08x\n",
- AH_RX_STOP_DMA_TIMEOUT / 1000,
--- a/drivers/net/wireless/mwl8k.c
+++ b/drivers/net/wireless/mwl8k.c
-@@ -5297,6 +5297,7 @@ MODULE_FIRMWARE("mwl8k/fmimage_8366.fw")
+@@ -5299,6 +5299,7 @@ MODULE_FIRMWARE("mwl8k/fmimage_8366.fw")
MODULE_FIRMWARE(MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API));
static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
+++ /dev/null
---- a/drivers/net/wireless/brcm80211/brcmsmac/aiutils.c
-+++ b/drivers/net/wireless/brcm80211/brcmsmac/aiutils.c
-@@ -320,10 +320,6 @@
- #define IS_SIM(chippkg) \
- ((chippkg == HDLSIM_PKG_ID) || (chippkg == HWSIM_PKG_ID))
-
--#define PCIE(sih) (ai_get_buscoretype(sih) == PCIE_CORE_ID)
--
--#define PCI_FORCEHT(sih) (PCIE(sih) && (ai_get_chip_id(sih) == BCM4716_CHIP_ID))
--
- #ifdef DEBUG
- #define SI_MSG(fmt, ...) pr_debug(fmt, ##__VA_ARGS__)
- #else
-@@ -475,9 +471,6 @@ ai_buscore_setup(struct si_info *sii, st
- sii->pub.pmurev = sii->pub.pmucaps & PCAP_REV_MASK;
- }
-
-- /* figure out buscore */
-- sii->buscore = ai_findcore(&sii->pub, PCIE_CORE_ID, 0);
--
- return true;
- }
-
-@@ -485,11 +478,7 @@ static struct si_info *ai_doattach(struc
- struct bcma_bus *pbus)
- {
- struct si_pub *sih = &sii->pub;
-- u32 w, savewin;
- struct bcma_device *cc;
-- struct ssb_sprom *sprom = &pbus->sprom;
--
-- savewin = 0;
-
- sii->icbus = pbus;
- sii->pcibus = pbus->host_pci;
-@@ -512,47 +501,7 @@ static struct si_info *ai_doattach(struc
-
- /* PMU specific initializations */
- if (ai_get_cccaps(sih) & CC_CAP_PMU) {
-- si_pmu_init(sih);
- (void)si_pmu_measure_alpclk(sih);
-- si_pmu_res_init(sih);
-- }
--
-- /* setup the GPIO based LED powersave register */
-- w = (sprom->leddc_on_time << BCMA_CC_GPIOTIMER_ONTIME_SHIFT) |
-- (sprom->leddc_off_time << BCMA_CC_GPIOTIMER_OFFTIME_SHIFT);
-- if (w == 0)
-- w = DEFAULT_GPIOTIMERVAL;
-- ai_cc_reg(sih, offsetof(struct chipcregs, gpiotimerval),
-- ~0, w);
--
-- if (ai_get_chip_id(sih) == BCM43224_CHIP_ID) {
-- /*
-- * enable 12 mA drive strenth for 43224 and
-- * set chipControl register bit 15
-- */
-- if (ai_get_chiprev(sih) == 0) {
-- SI_MSG("Applying 43224A0 WARs\n");
-- ai_cc_reg(sih, offsetof(struct chipcregs, chipcontrol),
-- CCTRL43224_GPIO_TOGGLE,
-- CCTRL43224_GPIO_TOGGLE);
-- si_pmu_chipcontrol(sih, 0, CCTRL_43224A0_12MA_LED_DRIVE,
-- CCTRL_43224A0_12MA_LED_DRIVE);
-- }
-- if (ai_get_chiprev(sih) >= 1) {
-- SI_MSG("Applying 43224B0+ WARs\n");
-- si_pmu_chipcontrol(sih, 0, CCTRL_43224B0_12MA_LED_DRIVE,
-- CCTRL_43224B0_12MA_LED_DRIVE);
-- }
-- }
--
-- if (ai_get_chip_id(sih) == BCM4313_CHIP_ID) {
-- /*
-- * enable 12 mA drive strenth for 4313 and
-- * set chipControl register bit 1
-- */
-- SI_MSG("Applying 4313 WARs\n");
-- si_pmu_chipcontrol(sih, 0, CCTRL_4313_12MA_LED_DRIVE,
-- CCTRL_4313_12MA_LED_DRIVE);
- }
-
- return sii;
-@@ -591,7 +540,7 @@ void ai_detach(struct si_pub *sih)
- struct si_pub *si_local = NULL;
- memcpy(&si_local, &sih, sizeof(struct si_pub **));
-
-- sii = (struct si_info *)sih;
-+ sii = container_of(sih, struct si_info, pub);
-
- if (sii == NULL)
- return;
-@@ -599,27 +548,6 @@ void ai_detach(struct si_pub *sih)
- kfree(sii);
- }
-
--/* return index of coreid or BADIDX if not found */
--struct bcma_device *ai_findcore(struct si_pub *sih, u16 coreid, u16 coreunit)
--{
-- struct bcma_device *core;
-- struct si_info *sii;
-- uint found;
--
-- sii = (struct si_info *)sih;
--
-- found = 0;
--
-- list_for_each_entry(core, &sii->icbus->cores, list)
-- if (core->id.id == coreid) {
-- if (found == coreunit)
-- return core;
-- found++;
-- }
--
-- return NULL;
--}
--
- /*
- * read/modify chipcommon core register.
- */
-@@ -629,7 +557,7 @@ uint ai_cc_reg(struct si_pub *sih, uint
- u32 w;
- struct si_info *sii;
-
-- sii = (struct si_info *)sih;
-+ sii = container_of(sih, struct si_info, pub);
- cc = sii->icbus->drv_cc.core;
-
- /* mask and set */
-@@ -695,12 +623,13 @@ ai_clkctl_setdelay(struct si_pub *sih, s
- /* initialize power control delay registers */
- void ai_clkctl_init(struct si_pub *sih)
- {
-+ struct si_info *sii = container_of(sih, struct si_info, pub);
- struct bcma_device *cc;
-
- if (!(ai_get_cccaps(sih) & CC_CAP_PWR_CTL))
- return;
-
-- cc = ai_findcore(sih, BCMA_CORE_CHIPCOMMON, 0);
-+ cc = sii->icbus->drv_cc.core;
- if (cc == NULL)
- return;
-
-@@ -722,7 +651,7 @@ u16 ai_clkctl_fast_pwrup_delay(struct si
- uint slowminfreq;
- u16 fpdelay;
-
-- sii = (struct si_info *)sih;
-+ sii = container_of(sih, struct si_info, pub);
- if (ai_get_cccaps(sih) & CC_CAP_PMU) {
- fpdelay = si_pmu_fast_pwrup_delay(sih);
- return fpdelay;
-@@ -732,7 +661,7 @@ u16 ai_clkctl_fast_pwrup_delay(struct si
- return 0;
-
- fpdelay = 0;
-- cc = ai_findcore(sih, CC_CORE_ID, 0);
-+ cc = sii->icbus->drv_cc.core;
- if (cc) {
- slowminfreq = ai_slowclk_freq(sih, false, cc);
- fpdelay = (((bcma_read32(cc, CHIPCREGOFFS(pll_on_delay)) + 2)
-@@ -754,12 +683,9 @@ bool ai_clkctl_cc(struct si_pub *sih, en
- struct si_info *sii;
- struct bcma_device *cc;
-
-- sii = (struct si_info *)sih;
--
-- if (PCI_FORCEHT(sih))
-- return mode == BCMA_CLKMODE_FAST;
-+ sii = container_of(sih, struct si_info, pub);
-
-- cc = ai_findcore(&sii->pub, BCMA_CORE_CHIPCOMMON, 0);
-+ cc = sii->icbus->drv_cc.core;
- bcma_core_set_clockmode(cc, mode);
- return mode == BCMA_CLKMODE_FAST;
- }
-@@ -767,16 +693,10 @@ bool ai_clkctl_cc(struct si_pub *sih, en
- void ai_pci_up(struct si_pub *sih)
- {
- struct si_info *sii;
-- struct bcma_device *cc;
-
-- sii = (struct si_info *)sih;
-+ sii = container_of(sih, struct si_info, pub);
-
-- if (PCI_FORCEHT(sih)) {
-- cc = ai_findcore(&sii->pub, BCMA_CORE_CHIPCOMMON, 0);
-- bcma_core_set_clockmode(cc, BCMA_CLKMODE_FAST);
-- }
--
-- if (PCIE(sih))
-+ if (sii->icbus->hosttype == BCMA_HOSTTYPE_PCI)
- bcma_core_pci_extend_L1timer(&sii->icbus->drv_pci, true);
- }
-
-@@ -784,26 +704,20 @@ void ai_pci_up(struct si_pub *sih)
- void ai_pci_down(struct si_pub *sih)
- {
- struct si_info *sii;
-- struct bcma_device *cc;
-
-- sii = (struct si_info *)sih;
-+ sii = container_of(sih, struct si_info, pub);
-
-- /* release FORCEHT since chip is going to "down" state */
-- if (PCI_FORCEHT(sih)) {
-- cc = ai_findcore(&sii->pub, BCMA_CORE_CHIPCOMMON, 0);
-- bcma_core_set_clockmode(cc, BCMA_CLKMODE_DYNAMIC);
-- }
--
-- if (PCIE(sih))
-+ if (sii->icbus->hosttype == BCMA_HOSTTYPE_PCI)
- bcma_core_pci_extend_L1timer(&sii->icbus->drv_pci, false);
- }
-
- /* Enable BT-COEX & Ex-PA for 4313 */
- void ai_epa_4313war(struct si_pub *sih)
- {
-+ struct si_info *sii = container_of(sih, struct si_info, pub);
- struct bcma_device *cc;
-
-- cc = ai_findcore(sih, CC_CORE_ID, 0);
-+ cc = sii->icbus->drv_cc.core;
-
- /* EPA Fix */
- bcma_set32(cc, CHIPCREGOFFS(gpiocontrol), GPIO_CTRL_EPA_EN_MASK);
-@@ -815,7 +729,7 @@ bool ai_deviceremoved(struct si_pub *sih
- u32 w;
- struct si_info *sii;
-
-- sii = (struct si_info *)sih;
-+ sii = container_of(sih, struct si_info, pub);
-
- if (sii->icbus->hosttype != BCMA_HOSTTYPE_PCI)
- return false;
-@@ -826,15 +740,3 @@ bool ai_deviceremoved(struct si_pub *sih
-
- return false;
- }
--
--uint ai_get_buscoretype(struct si_pub *sih)
--{
-- struct si_info *sii = (struct si_info *)sih;
-- return sii->buscore->id.id;
--}
--
--uint ai_get_buscorerev(struct si_pub *sih)
--{
-- struct si_info *sii = (struct si_info *)sih;
-- return sii->buscore->id.rev;
--}
---- a/drivers/net/wireless/brcm80211/brcmsmac/aiutils.h
-+++ b/drivers/net/wireless/brcm80211/brcmsmac/aiutils.h
-@@ -88,16 +88,6 @@
- #define CLKD_OTP 0x000f0000
- #define CLKD_OTP_SHIFT 16
-
--/* Package IDs */
--#define BCM4717_PKG_ID 9 /* 4717 package id */
--#define BCM4718_PKG_ID 10 /* 4718 package id */
--#define BCM43224_FAB_SMIC 0xa /* the chip is manufactured by SMIC */
--
--/* these are router chips */
--#define BCM4716_CHIP_ID 0x4716 /* 4716 chipcommon chipid */
--#define BCM47162_CHIP_ID 47162 /* 47162 chipcommon chipid */
--#define BCM4748_CHIP_ID 0x4748 /* 4716 chipcommon chipid (OTP, RBBU) */
--
- /* dynamic clock control defines */
- #define LPOMINFREQ 25000 /* low power oscillator min */
- #define LPOMAXFREQ 43000 /* low power oscillator max */
-@@ -168,7 +158,6 @@ struct si_info {
- struct si_pub pub; /* back plane public state (must be first) */
- struct bcma_bus *icbus; /* handle to soc interconnect bus */
- struct pci_dev *pcibus; /* handle to pci bus */
-- struct bcma_device *buscore;
-
- u32 chipst; /* chip status */
- };
-@@ -183,8 +172,6 @@ struct si_info {
-
-
- /* AMBA Interconnect exported externs */
--extern struct bcma_device *ai_findcore(struct si_pub *sih,
-- u16 coreid, u16 coreunit);
- extern u32 ai_core_cflags(struct bcma_device *core, u32 mask, u32 val);
-
- /* === exported functions === */
-@@ -202,9 +189,6 @@ extern void ai_pci_up(struct si_pub *sih
- /* Enable Ex-PA for 4313 */
- extern void ai_epa_4313war(struct si_pub *sih);
-
--extern uint ai_get_buscoretype(struct si_pub *sih);
--extern uint ai_get_buscorerev(struct si_pub *sih);
--
- static inline u32 ai_get_cccaps(struct si_pub *sih)
- {
- return sih->cccaps;
---- a/drivers/net/wireless/brcm80211/brcmsmac/dma.c
-+++ b/drivers/net/wireless/brcm80211/brcmsmac/dma.c
-@@ -574,6 +574,7 @@ struct dma_pub *dma_attach(char *name, s
- struct dma_info *di;
- u8 rev = core->id.rev;
- uint size;
-+ struct si_info *sii = container_of(sih, struct si_info, pub);
-
- /* allocate private info structure */
- di = kzalloc(sizeof(struct dma_info), GFP_ATOMIC);
-@@ -634,16 +635,20 @@ struct dma_pub *dma_attach(char *name, s
- */
- di->ddoffsetlow = 0;
- di->dataoffsetlow = 0;
-- /* add offset for pcie with DMA64 bus */
-- di->ddoffsetlow = 0;
-- di->ddoffsethigh = SI_PCIE_DMA_H32;
-+ /* for pci bus, add offset */
-+ if (sii->icbus->hosttype == BCMA_HOSTTYPE_PCI) {
-+ /* add offset for pcie with DMA64 bus */
-+ di->ddoffsetlow = 0;
-+ di->ddoffsethigh = SI_PCIE_DMA_H32;
-+ }
- di->dataoffsetlow = di->ddoffsetlow;
- di->dataoffsethigh = di->ddoffsethigh;
-+
- /* WAR64450 : DMACtl.Addr ext fields are not supported in SDIOD core. */
-- if ((core->id.id == SDIOD_CORE_ID)
-+ if ((core->id.id == BCMA_CORE_SDIO_DEV)
- && ((rev > 0) && (rev <= 2)))
- di->addrext = false;
-- else if ((core->id.id == I2S_CORE_ID) &&
-+ else if ((core->id.id == BCMA_CORE_I2S) &&
- ((rev == 0) || (rev == 1)))
- di->addrext = false;
- else
---- a/drivers/net/wireless/brcm80211/brcmsmac/mac80211_if.c
-+++ b/drivers/net/wireless/brcm80211/brcmsmac/mac80211_if.c
-@@ -321,8 +321,7 @@ static void brcms_ops_stop(struct ieee80
- return;
-
- spin_lock_bh(&wl->lock);
-- status = brcms_c_chipmatch(wl->wlc->hw->vendorid,
-- wl->wlc->hw->deviceid);
-+ status = brcms_c_chipmatch(wl->wlc->hw->d11core);
- spin_unlock_bh(&wl->lock);
- if (!status) {
- wiphy_err(wl->wiphy,
---- a/drivers/net/wireless/brcm80211/brcmsmac/main.c
-+++ b/drivers/net/wireless/brcm80211/brcmsmac/main.c
-@@ -271,7 +271,7 @@ struct brcms_c_bit_desc {
- */
-
- /* Starting corerev for the fifo size table */
--#define XMTFIFOTBL_STARTREV 20
-+#define XMTFIFOTBL_STARTREV 17
-
- struct d11init {
- __le16 addr;
-@@ -335,6 +335,12 @@ const u8 wlc_prio2prec_map[] = {
- };
-
- static const u16 xmtfifo_sz[][NFIFO] = {
-+ /* corerev 17: 5120, 49152, 49152, 5376, 4352, 1280 */
-+ {20, 192, 192, 21, 17, 5},
-+ /* corerev 18: */
-+ {0, 0, 0, 0, 0, 0},
-+ /* corerev 19: */
-+ {0, 0, 0, 0, 0, 0},
- /* corerev 20: 5120, 49152, 49152, 5376, 4352, 1280 */
- {20, 192, 192, 21, 17, 5},
- /* corerev 21: 2304, 14848, 5632, 3584, 3584, 1280 */
-@@ -345,6 +351,14 @@ static const u16 xmtfifo_sz[][NFIFO] = {
- {20, 192, 192, 21, 17, 5},
- /* corerev 24: 2304, 14848, 5632, 3584, 3584, 1280 */
- {9, 58, 22, 14, 14, 5},
-+ /* corerev 25: */
-+ {0, 0, 0, 0, 0, 0},
-+ /* corerev 26: */
-+ {0, 0, 0, 0, 0, 0},
-+ /* corerev 27: */
-+ {0, 0, 0, 0, 0, 0},
-+ /* corerev 28: 2304, 14848, 5632, 3584, 3584, 1280 */
-+ {9, 58, 22, 14, 14, 5},
- };
-
- #ifdef DEBUG
-@@ -1944,7 +1958,8 @@ static bool brcms_b_radio_read_hwdisable
- * accesses phyreg throughput mac. This can be skipped since
- * only mac reg is accessed below
- */
-- flags |= SICF_PCLKE;
-+ if (D11REV_GE(wlc_hw->corerev, 18))
-+ flags |= SICF_PCLKE;
-
- /*
- * TODO: test suspend/resume
-@@ -2025,7 +2040,8 @@ void brcms_b_corereset(struct brcms_hard
- * phyreg throughput mac, AND phy_reset is skipped at early stage when
- * band->pi is invalid. need to enable PHY CLK
- */
-- flags |= SICF_PCLKE;
-+ if (D11REV_GE(wlc_hw->corerev, 18))
-+ flags |= SICF_PCLKE;
-
- /*
- * reset the core
-@@ -2128,8 +2144,8 @@ void brcms_b_switch_macfreq(struct brcms
- {
- struct bcma_device *core = wlc_hw->d11core;
-
-- if ((ai_get_chip_id(wlc_hw->sih) == BCM43224_CHIP_ID) ||
-- (ai_get_chip_id(wlc_hw->sih) == BCM43225_CHIP_ID)) {
-+ if ((ai_get_chip_id(wlc_hw->sih) == BCMA_CHIP_ID_BCM43224) ||
-+ (ai_get_chip_id(wlc_hw->sih) == BCMA_CHIP_ID_BCM43225)) {
- if (spurmode == WL_SPURAVOID_ON2) { /* 126Mhz */
- bcma_write16(core, D11REGOFFS(tsf_clk_frac_l), 0x2082);
- bcma_write16(core, D11REGOFFS(tsf_clk_frac_h), 0x8);
-@@ -2793,7 +2809,7 @@ void brcms_b_core_phypll_ctl(struct brcm
- tmp = 0;
-
- if (on) {
-- if ((ai_get_chip_id(wlc_hw->sih) == BCM4313_CHIP_ID)) {
-+ if ((ai_get_chip_id(wlc_hw->sih) == BCMA_CHIP_ID_BCM4313)) {
- bcma_set32(core, D11REGOFFS(clk_ctl_st),
- CCS_ERSRC_REQ_HT |
- CCS_ERSRC_REQ_D11PLL |
-@@ -4220,9 +4236,8 @@ static void brcms_c_radio_timer(void *ar
- }
-
- /* common low-level watchdog code */
--static void brcms_b_watchdog(void *arg)
-+static void brcms_b_watchdog(struct brcms_c_info *wlc)
- {
-- struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
- struct brcms_hardware *wlc_hw = wlc->hw;
-
- BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
-@@ -4243,10 +4258,8 @@ static void brcms_b_watchdog(void *arg)
- }
-
- /* common watchdog code */
--static void brcms_c_watchdog(void *arg)
-+static void brcms_c_watchdog(struct brcms_c_info *wlc)
- {
-- struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
--
- BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
-
- if (!wlc->pub->up)
-@@ -4286,7 +4299,9 @@ static void brcms_c_watchdog(void *arg)
-
- static void brcms_c_watchdog_by_timer(void *arg)
- {
-- brcms_c_watchdog(arg);
-+ struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
-+
-+ brcms_c_watchdog(wlc);
- }
-
- static bool brcms_c_timers_init(struct brcms_c_info *wlc, int unit)
-@@ -4456,11 +4471,9 @@ static int brcms_b_attach(struct brcms_c
- }
-
- /* verify again the device is supported */
-- if (core->bus->hosttype == BCMA_HOSTTYPE_PCI &&
-- !brcms_c_chipmatch(pcidev->vendor, pcidev->device)) {
-- wiphy_err(wiphy, "wl%d: brcms_b_attach: Unsupported "
-- "vendor/device (0x%x/0x%x)\n",
-- unit, pcidev->vendor, pcidev->device);
-+ if (!brcms_c_chipmatch(core)) {
-+ wiphy_err(wiphy, "wl%d: brcms_b_attach: Unsupported device\n",
-+ unit);
- err = 12;
- goto fail;
- }
-@@ -4530,7 +4543,7 @@ static int brcms_b_attach(struct brcms_c
- else
- wlc_hw->_nbands = 1;
-
-- if ((ai_get_chip_id(wlc_hw->sih) == BCM43225_CHIP_ID))
-+ if ((ai_get_chip_id(wlc_hw->sih) == BCMA_CHIP_ID_BCM43225))
- wlc_hw->_nbands = 1;
-
- /* BMAC_NOTE: remove init of pub values when brcms_c_attach()
-@@ -4597,8 +4610,12 @@ static int brcms_b_attach(struct brcms_c
- wlc_hw->machwcap_backup = wlc_hw->machwcap;
-
- /* init tx fifo size */
-+ WARN_ON((wlc_hw->corerev - XMTFIFOTBL_STARTREV) < 0 ||
-+ (wlc_hw->corerev - XMTFIFOTBL_STARTREV) >
-+ ARRAY_SIZE(xmtfifo_sz));
- wlc_hw->xmtfifo_sz =
- xmtfifo_sz[(wlc_hw->corerev - XMTFIFOTBL_STARTREV)];
-+ WARN_ON(!wlc_hw->xmtfifo_sz[0]);
-
- /* Get a phy for this band */
- wlc_hw->band->pi =
-@@ -5038,7 +5055,7 @@ static void brcms_b_hw_up(struct brcms_h
- wlc_hw->wlc->pub->hw_up = true;
-
- if ((wlc_hw->boardflags & BFL_FEM)
-- && (ai_get_chip_id(wlc_hw->sih) == BCM4313_CHIP_ID)) {
-+ && (ai_get_chip_id(wlc_hw->sih) == BCMA_CHIP_ID_BCM4313)) {
- if (!
- (wlc_hw->boardrev >= 0x1250
- && (wlc_hw->boardflags & BFL_FEM_BT)))
-@@ -5132,7 +5149,7 @@ int brcms_c_up(struct brcms_c_info *wlc)
- }
-
- if ((wlc->pub->boardflags & BFL_FEM)
-- && (ai_get_chip_id(wlc->hw->sih) == BCM4313_CHIP_ID)) {
-+ && (ai_get_chip_id(wlc->hw->sih) == BCMA_CHIP_ID_BCM4313)) {
- if (wlc->pub->boardrev >= 0x1250
- && (wlc->pub->boardflags & BFL_FEM_BT))
- brcms_b_mhf(wlc->hw, MHF5, MHF5_4313_GPIOCTRL,
-@@ -5769,8 +5786,12 @@ void brcms_c_print_txstatus(struct tx_st
- (txs->ackphyrxsh & PRXS1_SQ_MASK) >> PRXS1_SQ_SHIFT);
- }
-
--bool brcms_c_chipmatch(u16 vendor, u16 device)
-+static bool brcms_c_chipmatch_pci(struct bcma_device *core)
- {
-+ struct pci_dev *pcidev = core->bus->host_pci;
-+ u16 vendor = pcidev->vendor;
-+ u16 device = pcidev->device;
-+
- if (vendor != PCI_VENDOR_ID_BROADCOM) {
- pr_err("unknown vendor id %04x\n", vendor);
- return false;
-@@ -5789,6 +5810,30 @@ bool brcms_c_chipmatch(u16 vendor, u16 d
- return false;
- }
-
-+static bool brcms_c_chipmatch_soc(struct bcma_device *core)
-+{
-+ struct bcma_chipinfo *chipinfo = &core->bus->chipinfo;
-+
-+ if (chipinfo->id == BCMA_CHIP_ID_BCM4716)
-+ return true;
-+
-+ pr_err("unknown chip id %04x\n", chipinfo->id);
-+ return false;
-+}
-+
-+bool brcms_c_chipmatch(struct bcma_device *core)
-+{
-+ switch (core->bus->hosttype) {
-+ case BCMA_HOSTTYPE_PCI:
-+ return brcms_c_chipmatch_pci(core);
-+ case BCMA_HOSTTYPE_SOC:
-+ return brcms_c_chipmatch_soc(core);
-+ default:
-+ pr_err("unknown host type: %i\n", core->bus->hosttype);
-+ return false;
-+ }
-+}
-+
- #if defined(DEBUG)
- void brcms_c_print_txdesc(struct d11txh *txh)
- {
---- a/drivers/net/wireless/brcm80211/brcmsmac/phy/phy_cmn.c
-+++ b/drivers/net/wireless/brcm80211/brcmsmac/phy/phy_cmn.c
-@@ -198,6 +198,8 @@ u16 read_radio_reg(struct brcms_phy *pi,
-
- void write_radio_reg(struct brcms_phy *pi, u16 addr, u16 val)
- {
-+ struct si_info *sii = container_of(pi->sh->sih, struct si_info, pub);
-+
- if ((D11REV_GE(pi->sh->corerev, 24)) ||
- (D11REV_IS(pi->sh->corerev, 22)
- && (pi->pubpi.phy_type != PHY_TYPE_SSN))) {
-@@ -209,7 +211,8 @@ void write_radio_reg(struct brcms_phy *p
- bcma_write16(pi->d11core, D11REGOFFS(phy4wdatalo), val);
- }
-
-- if (++pi->phy_wreg >= pi->phy_wreg_limit) {
-+ if ((sii->icbus->hosttype == BCMA_HOSTTYPE_PCI) &&
-+ (++pi->phy_wreg >= pi->phy_wreg_limit)) {
- (void)bcma_read32(pi->d11core, D11REGOFFS(maccontrol));
- pi->phy_wreg = 0;
- }
-@@ -292,10 +295,13 @@ void write_phy_reg(struct brcms_phy *pi,
- bcma_wflush16(pi->d11core, D11REGOFFS(phyregaddr), addr);
- bcma_write16(pi->d11core, D11REGOFFS(phyregdata), val);
- if (addr == 0x72)
-- (void)bcma_read16(pi->d11core, D11REGOFFS(phyversion));
-+ (void)bcma_read16(pi->d11core, D11REGOFFS(phyregdata));
- #else
-+ struct si_info *sii = container_of(pi->sh->sih, struct si_info, pub);
-+
- bcma_write32(pi->d11core, D11REGOFFS(phyregaddr), addr | (val << 16));
-- if (++pi->phy_wreg >= pi->phy_wreg_limit) {
-+ if ((sii->icbus->hosttype == BCMA_HOSTTYPE_PCI) &&
-+ (++pi->phy_wreg >= pi->phy_wreg_limit)) {
- pi->phy_wreg = 0;
- (void)bcma_read16(pi->d11core, D11REGOFFS(phyversion));
- }
-@@ -837,7 +843,7 @@ wlc_phy_table_addr(struct brcms_phy *pi,
- pi->tbl_data_hi = tblDataHi;
- pi->tbl_data_lo = tblDataLo;
-
-- if (pi->sh->chip == BCM43224_CHIP_ID &&
-+ if (pi->sh->chip == BCMA_CHIP_ID_BCM43224 &&
- pi->sh->chiprev == 1) {
- pi->tbl_addr = tblAddr;
- pi->tbl_save_id = tbl_id;
-@@ -847,7 +853,7 @@ wlc_phy_table_addr(struct brcms_phy *pi,
-
- void wlc_phy_table_data_write(struct brcms_phy *pi, uint width, u32 val)
- {
-- if ((pi->sh->chip == BCM43224_CHIP_ID) &&
-+ if ((pi->sh->chip == BCMA_CHIP_ID_BCM43224) &&
- (pi->sh->chiprev == 1) &&
- (pi->tbl_save_id == NPHY_TBL_ID_ANTSWCTRLLUT)) {
- read_phy_reg(pi, pi->tbl_data_lo);
-@@ -881,7 +887,7 @@ wlc_phy_write_table(struct brcms_phy *pi
-
- for (idx = 0; idx < ptbl_info->tbl_len; idx++) {
-
-- if ((pi->sh->chip == BCM43224_CHIP_ID) &&
-+ if ((pi->sh->chip == BCMA_CHIP_ID_BCM43224) &&
- (pi->sh->chiprev == 1) &&
- (tbl_id == NPHY_TBL_ID_ANTSWCTRLLUT)) {
- read_phy_reg(pi, tblDataLo);
-@@ -918,7 +924,7 @@ wlc_phy_read_table(struct brcms_phy *pi,
-
- for (idx = 0; idx < ptbl_info->tbl_len; idx++) {
-
-- if ((pi->sh->chip == BCM43224_CHIP_ID) &&
-+ if ((pi->sh->chip == BCMA_CHIP_ID_BCM43224) &&
- (pi->sh->chiprev == 1)) {
- (void)read_phy_reg(pi, tblDataLo);
-
-@@ -2894,7 +2900,7 @@ const u8 *wlc_phy_get_ofdm_rate_lookup(v
-
- void wlc_lcnphy_epa_switch(struct brcms_phy *pi, bool mode)
- {
-- if ((pi->sh->chip == BCM4313_CHIP_ID) &&
-+ if ((pi->sh->chip == BCMA_CHIP_ID_BCM4313) &&
- (pi->sh->boardflags & BFL_FEM)) {
- if (mode) {
- u16 txant = 0;
---- a/drivers/net/wireless/brcm80211/brcmsmac/phy/phy_n.c
-+++ b/drivers/net/wireless/brcm80211/brcmsmac/phy/phy_n.c
-@@ -17895,6 +17895,8 @@ static u32 *wlc_phy_get_ipa_gaintbl_nphy
- nphy_tpc_txgain_ipa_2g_2057rev7;
- } else if (NREV_IS(pi->pubpi.phy_rev, 6)) {
- tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_rev6;
-+ if (pi->sh->chip == BCMA_CHIP_ID_BCM47162)
-+ tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_rev5;
- } else if (NREV_IS(pi->pubpi.phy_rev, 5)) {
- tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_rev5;
- } else {
-@@ -19256,8 +19258,14 @@ static void wlc_phy_spurwar_nphy(struct
- case 38:
- case 102:
- case 118:
-- nphy_adj_tone_id_buf[0] = 0;
-- nphy_adj_noise_var_buf[0] = 0x0;
-+ if ((pi->sh->chip == BCMA_CHIP_ID_BCM4716) &&
-+ (pi->sh->chippkg == BCMA_PKG_ID_BCM4717)) {
-+ nphy_adj_tone_id_buf[0] = 32;
-+ nphy_adj_noise_var_buf[0] = 0x21f;
-+ } else {
-+ nphy_adj_tone_id_buf[0] = 0;
-+ nphy_adj_noise_var_buf[0] = 0x0;
-+ }
- break;
- case 134:
- nphy_adj_tone_id_buf[0] = 32;
-@@ -19311,8 +19319,8 @@ void wlc_phy_init_nphy(struct brcms_phy
- pi->measure_hold |= PHY_HOLD_FOR_NOT_ASSOC;
-
- if ((ISNPHY(pi)) && (NREV_GE(pi->pubpi.phy_rev, 5)) &&
-- ((pi->sh->chippkg == BCM4717_PKG_ID) ||
-- (pi->sh->chippkg == BCM4718_PKG_ID))) {
-+ ((pi->sh->chippkg == BCMA_PKG_ID_BCM4717) ||
-+ (pi->sh->chippkg == BCMA_PKG_ID_BCM4718))) {
- if ((pi->sh->boardflags & BFL_EXTLNA) &&
- (CHSPEC_IS2G(pi->radio_chanspec)))
- ai_cc_reg(pi->sh->sih,
-@@ -19320,6 +19328,10 @@ void wlc_phy_init_nphy(struct brcms_phy
- 0x40, 0x40);
- }
-
-+ if ((!PHY_IPA(pi)) && (pi->sh->chip == BCMA_CHIP_ID_BCM5357))
-+ si_pmu_chipcontrol(pi->sh->sih, 1, CCTRL5357_EXTPA,
-+ CCTRL5357_EXTPA);
-+
- if ((pi->nphy_gband_spurwar2_en) && CHSPEC_IS2G(pi->radio_chanspec) &&
- CHSPEC_IS40(pi->radio_chanspec)) {
-
-@@ -20697,12 +20709,22 @@ wlc_phy_chanspec_radio2056_setup(struct
- write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER2 |
- RADIO_2056_SYN, 0x1f);
-
-- write_radio_reg(pi,
-- RADIO_2056_SYN_PLL_LOOPFILTER4 |
-- RADIO_2056_SYN, 0xb);
-- write_radio_reg(pi,
-- RADIO_2056_SYN_PLL_CP2 |
-- RADIO_2056_SYN, 0x14);
-+ if ((pi->sh->chip == BCMA_CHIP_ID_BCM4716) ||
-+ (pi->sh->chip == BCMA_CHIP_ID_BCM47162)) {
-+ write_radio_reg(pi,
-+ RADIO_2056_SYN_PLL_LOOPFILTER4 |
-+ RADIO_2056_SYN, 0x14);
-+ write_radio_reg(pi,
-+ RADIO_2056_SYN_PLL_CP2 |
-+ RADIO_2056_SYN, 0x00);
-+ } else {
-+ write_radio_reg(pi,
-+ RADIO_2056_SYN_PLL_LOOPFILTER4 |
-+ RADIO_2056_SYN, 0xb);
-+ write_radio_reg(pi,
-+ RADIO_2056_SYN_PLL_CP2 |
-+ RADIO_2056_SYN, 0x14);
-+ }
- }
- }
-
-@@ -20749,24 +20771,30 @@ wlc_phy_chanspec_radio2056_setup(struct
- WRITE_RADIO_REG2(pi, RADIO_2056, TX, core,
- PADG_IDAC, 0xcc);
-
-- bias = 0x25;
-- cascbias = 0x20;
-+ if ((pi->sh->chip == BCMA_CHIP_ID_BCM4716) ||
-+ (pi->sh->chip == BCMA_CHIP_ID_BCM47162)) {
-+ bias = 0x40;
-+ cascbias = 0x45;
-+ pag_boost_tune = 0x5;
-+ pgag_boost_tune = 0x33;
-+ padg_boost_tune = 0x77;
-+ mixg_boost_tune = 0x55;
-+ } else {
-+ bias = 0x25;
-+ cascbias = 0x20;
-
-- if ((pi->sh->chip ==
-- BCM43224_CHIP_ID)
-- || (pi->sh->chip ==
-- BCM43225_CHIP_ID)) {
-- if (pi->sh->chippkg ==
-- BCM43224_FAB_SMIC) {
-+ if ((pi->sh->chip == BCMA_CHIP_ID_BCM43224 ||
-+ pi->sh->chip == BCMA_CHIP_ID_BCM43225) &&
-+ pi->sh->chippkg == BCMA_PKG_ID_BCM43224_FAB_SMIC) {
- bias = 0x2a;
- cascbias = 0x38;
- }
-- }
-
-- pag_boost_tune = 0x4;
-- pgag_boost_tune = 0x03;
-- padg_boost_tune = 0x77;
-- mixg_boost_tune = 0x65;
-+ pag_boost_tune = 0x4;
-+ pgag_boost_tune = 0x03;
-+ padg_boost_tune = 0x77;
-+ mixg_boost_tune = 0x65;
-+ }
-
- WRITE_RADIO_REG2(pi, RADIO_2056, TX, core,
- INTPAG_IMAIN_STAT, bias);
-@@ -20865,11 +20893,10 @@ wlc_phy_chanspec_radio2056_setup(struct
-
- cascbias = 0x30;
-
-- if ((pi->sh->chip == BCM43224_CHIP_ID) ||
-- (pi->sh->chip == BCM43225_CHIP_ID)) {
-- if (pi->sh->chippkg == BCM43224_FAB_SMIC)
-- cascbias = 0x35;
-- }
-+ if ((pi->sh->chip == BCMA_CHIP_ID_BCM43224 ||
-+ pi->sh->chip == BCMA_CHIP_ID_BCM43225) &&
-+ pi->sh->chippkg == BCMA_PKG_ID_BCM43224_FAB_SMIC)
-+ cascbias = 0x35;
-
- pabias = (pi->phy_pabias == 0) ? 0x30 : pi->phy_pabias;
-
-@@ -21108,6 +21135,7 @@ wlc_phy_chanspec_nphy_setup(struct brcms
- const struct nphy_sfo_cfg *ci)
- {
- u16 val;
-+ struct si_info *sii = container_of(pi->sh->sih, struct si_info, pub);
-
- val = read_phy_reg(pi, 0x09) & NPHY_BandControl_currentBand;
- if (CHSPEC_IS5G(chanspec) && !val) {
-@@ -21180,22 +21208,32 @@ wlc_phy_chanspec_nphy_setup(struct brcms
- } else if (NREV_GE(pi->pubpi.phy_rev, 7)) {
- if (val == 54)
- spuravoid = 1;
-- } else {
-- if (pi->nphy_aband_spurwar_en &&
-- ((val == 38) || (val == 102)
-- || (val == 118)))
-+ } else if (pi->nphy_aband_spurwar_en &&
-+ ((val == 38) || (val == 102) || (val == 118))) {
-+ if ((pi->sh->chip == BCMA_CHIP_ID_BCM4716)
-+ && (pi->sh->chippkg == BCMA_PKG_ID_BCM4717)) {
-+ spuravoid = 0;
-+ } else {
- spuravoid = 1;
-+ }
- }
-
- if (pi->phy_spuravoid == SPURAVOID_FORCEON)
- spuravoid = 1;
-
-- wlapi_bmac_core_phypll_ctl(pi->sh->physhim, false);
-- si_pmu_spuravoid_pllupdate(pi->sh->sih, spuravoid);
-- wlapi_bmac_core_phypll_ctl(pi->sh->physhim, true);
-+ if ((pi->sh->chip == BCMA_CHIP_ID_BCM4716) ||
-+ (pi->sh->chip == BCMA_CHIP_ID_BCM43225)) {
-+ bcma_pmu_spuravoid_pllupdate(&sii->icbus->drv_cc,
-+ spuravoid);
-+ } else {
-+ wlapi_bmac_core_phypll_ctl(pi->sh->physhim, false);
-+ bcma_pmu_spuravoid_pllupdate(&sii->icbus->drv_cc,
-+ spuravoid);
-+ wlapi_bmac_core_phypll_ctl(pi->sh->physhim, true);
-+ }
-
-- if ((pi->sh->chip == BCM43224_CHIP_ID) ||
-- (pi->sh->chip == BCM43225_CHIP_ID)) {
-+ if ((pi->sh->chip == BCMA_CHIP_ID_BCM43224) ||
-+ (pi->sh->chip == BCMA_CHIP_ID_BCM43225)) {
- if (spuravoid == 1) {
- bcma_write16(pi->d11core,
- D11REGOFFS(tsf_clk_frac_l),
-@@ -21211,7 +21249,9 @@ wlc_phy_chanspec_nphy_setup(struct brcms
- }
- }
-
-- wlapi_bmac_core_phypll_reset(pi->sh->physhim);
-+ if (!((pi->sh->chip == BCMA_CHIP_ID_BCM4716) ||
-+ (pi->sh->chip == BCMA_CHIP_ID_BCM47162)))
-+ wlapi_bmac_core_phypll_reset(pi->sh->physhim);
-
- mod_phy_reg(pi, 0x01, (0x1 << 15),
- ((spuravoid > 0) ? (0x1 << 15) : 0));
-@@ -22173,9 +22213,15 @@ s16 wlc_phy_tempsense_nphy(struct brcms_
- wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x03, 16,
- &auxADC_rssi_ctrlH_save);
-
-- radio_temp[0] = (179 * (radio_temp[1] + radio_temp2[1])
-- + 82 * (auxADC_Vl) - 28861 +
-- 128) / 256;
-+ if (pi->sh->chip == BCMA_CHIP_ID_BCM5357) {
-+ radio_temp[0] = (193 * (radio_temp[1] + radio_temp2[1])
-+ + 88 * (auxADC_Vl) - 27111 +
-+ 128) / 256;
-+ } else {
-+ radio_temp[0] = (179 * (radio_temp[1] + radio_temp2[1])
-+ + 82 * (auxADC_Vl) - 28861 +
-+ 128) / 256;
-+ }
-
- offset = (s16) pi->phy_tempsense_offset;
-
-@@ -24925,14 +24971,16 @@ wlc_phy_a2_nphy(struct brcms_phy *pi, st
- if (txgains->useindex) {
- phy_a4 = 15 - ((txgains->index) >> 3);
- if (CHSPEC_IS2G(pi->radio_chanspec)) {
-- if (NREV_GE(pi->pubpi.phy_rev, 6))
-+ if (NREV_GE(pi->pubpi.phy_rev, 6) &&
-+ pi->sh->chip == BCMA_CHIP_ID_BCM47162) {
-+ phy_a5 = 0x10f7 | (phy_a4 << 8);
-+ } else if (NREV_GE(pi->pubpi.phy_rev, 6)) {
- phy_a5 = 0x00f7 | (phy_a4 << 8);
--
-- else
-- if (NREV_IS(pi->pubpi.phy_rev, 5))
-+ } else if (NREV_IS(pi->pubpi.phy_rev, 5)) {
- phy_a5 = 0x10f7 | (phy_a4 << 8);
-- else
-+ } else {
- phy_a5 = 0x50f7 | (phy_a4 << 8);
-+ }
- } else {
- phy_a5 = 0x70f7 | (phy_a4 << 8);
- }
---- a/drivers/net/wireless/brcm80211/brcmsmac/pmu.c
-+++ b/drivers/net/wireless/brcm80211/brcmsmac/pmu.c
-@@ -74,16 +74,6 @@
- * PMU<rev>_PLL<num>_XX where <rev> is PMU corerev and <num> is an arbitrary
- * number to differentiate different PLLs controlled by the same PMU rev.
- */
--/* pllcontrol registers:
-- * ndiv_pwrdn, pwrdn_ch<x>, refcomp_pwrdn, dly_ch<x>,
-- * p1div, p2div, _bypass_sdmod
-- */
--#define PMU1_PLL0_PLLCTL0 0
--#define PMU1_PLL0_PLLCTL1 1
--#define PMU1_PLL0_PLLCTL2 2
--#define PMU1_PLL0_PLLCTL3 3
--#define PMU1_PLL0_PLLCTL4 4
--#define PMU1_PLL0_PLLCTL5 5
-
- /* pmu XtalFreqRatio */
- #define PMU_XTALFREQ_REG_ILPCTR_MASK 0x00001FFF
-@@ -108,118 +98,14 @@
- #define RES4313_HT_AVAIL_RSRC 14
- #define RES4313_MACPHY_CLK_AVAIL_RSRC 15
-
--/* Determine min/max rsrc masks. Value 0 leaves hardware at default. */
--static void si_pmu_res_masks(struct si_pub *sih, u32 * pmin, u32 * pmax)
--{
-- u32 min_mask = 0, max_mask = 0;
-- uint rsrcs;
--
-- /* # resources */
-- rsrcs = (ai_get_pmucaps(sih) & PCAP_RC_MASK) >> PCAP_RC_SHIFT;
--
-- /* determine min/max rsrc masks */
-- switch (ai_get_chip_id(sih)) {
-- case BCM43224_CHIP_ID:
-- case BCM43225_CHIP_ID:
-- /* ??? */
-- break;
--
-- case BCM4313_CHIP_ID:
-- min_mask = PMURES_BIT(RES4313_BB_PU_RSRC) |
-- PMURES_BIT(RES4313_XTAL_PU_RSRC) |
-- PMURES_BIT(RES4313_ALP_AVAIL_RSRC) |
-- PMURES_BIT(RES4313_BB_PLL_PWRSW_RSRC);
-- max_mask = 0xffff;
-- break;
-- default:
-- break;
-- }
--
-- *pmin = min_mask;
-- *pmax = max_mask;
--}
--
--void si_pmu_spuravoid_pllupdate(struct si_pub *sih, u8 spuravoid)
--{
-- u32 tmp = 0;
-- struct bcma_device *core;
--
-- /* switch to chipc */
-- core = ai_findcore(sih, BCMA_CORE_CHIPCOMMON, 0);
--
-- switch (ai_get_chip_id(sih)) {
-- case BCM43224_CHIP_ID:
-- case BCM43225_CHIP_ID:
-- if (spuravoid == 1) {
-- bcma_write32(core, CHIPCREGOFFS(pllcontrol_addr),
-- PMU1_PLL0_PLLCTL0);
-- bcma_write32(core, CHIPCREGOFFS(pllcontrol_data),
-- 0x11500010);
-- bcma_write32(core, CHIPCREGOFFS(pllcontrol_addr),
-- PMU1_PLL0_PLLCTL1);
-- bcma_write32(core, CHIPCREGOFFS(pllcontrol_data),
-- 0x000C0C06);
-- bcma_write32(core, CHIPCREGOFFS(pllcontrol_addr),
-- PMU1_PLL0_PLLCTL2);
-- bcma_write32(core, CHIPCREGOFFS(pllcontrol_data),
-- 0x0F600a08);
-- bcma_write32(core, CHIPCREGOFFS(pllcontrol_addr),
-- PMU1_PLL0_PLLCTL3);
-- bcma_write32(core, CHIPCREGOFFS(pllcontrol_data),
-- 0x00000000);
-- bcma_write32(core, CHIPCREGOFFS(pllcontrol_addr),
-- PMU1_PLL0_PLLCTL4);
-- bcma_write32(core, CHIPCREGOFFS(pllcontrol_data),
-- 0x2001E920);
-- bcma_write32(core, CHIPCREGOFFS(pllcontrol_addr),
-- PMU1_PLL0_PLLCTL5);
-- bcma_write32(core, CHIPCREGOFFS(pllcontrol_data),
-- 0x88888815);
-- } else {
-- bcma_write32(core, CHIPCREGOFFS(pllcontrol_addr),
-- PMU1_PLL0_PLLCTL0);
-- bcma_write32(core, CHIPCREGOFFS(pllcontrol_data),
-- 0x11100010);
-- bcma_write32(core, CHIPCREGOFFS(pllcontrol_addr),
-- PMU1_PLL0_PLLCTL1);
-- bcma_write32(core, CHIPCREGOFFS(pllcontrol_data),
-- 0x000c0c06);
-- bcma_write32(core, CHIPCREGOFFS(pllcontrol_addr),
-- PMU1_PLL0_PLLCTL2);
-- bcma_write32(core, CHIPCREGOFFS(pllcontrol_data),
-- 0x03000a08);
-- bcma_write32(core, CHIPCREGOFFS(pllcontrol_addr),
-- PMU1_PLL0_PLLCTL3);
-- bcma_write32(core, CHIPCREGOFFS(pllcontrol_data),
-- 0x00000000);
-- bcma_write32(core, CHIPCREGOFFS(pllcontrol_addr),
-- PMU1_PLL0_PLLCTL4);
-- bcma_write32(core, CHIPCREGOFFS(pllcontrol_data),
-- 0x200005c0);
-- bcma_write32(core, CHIPCREGOFFS(pllcontrol_addr),
-- PMU1_PLL0_PLLCTL5);
-- bcma_write32(core, CHIPCREGOFFS(pllcontrol_data),
-- 0x88888815);
-- }
-- tmp = 1 << 10;
-- break;
--
-- default:
-- /* bail out */
-- return;
-- }
--
-- bcma_set32(core, CHIPCREGOFFS(pmucontrol), tmp);
--}
--
- u16 si_pmu_fast_pwrup_delay(struct si_pub *sih)
- {
- uint delay = PMU_MAX_TRANSITION_DLY;
-
- switch (ai_get_chip_id(sih)) {
-- case BCM43224_CHIP_ID:
-- case BCM43225_CHIP_ID:
-- case BCM4313_CHIP_ID:
-+ case BCMA_CHIP_ID_BCM43224:
-+ case BCMA_CHIP_ID_BCM43225:
-+ case BCMA_CHIP_ID_BCM4313:
- delay = 3700;
- break;
- default:
-@@ -270,9 +156,9 @@ u32 si_pmu_alp_clock(struct si_pub *sih)
- return clock;
-
- switch (ai_get_chip_id(sih)) {
-- case BCM43224_CHIP_ID:
-- case BCM43225_CHIP_ID:
-- case BCM4313_CHIP_ID:
-+ case BCMA_CHIP_ID_BCM43224:
-+ case BCMA_CHIP_ID_BCM43225:
-+ case BCMA_CHIP_ID_BCM4313:
- /* always 20Mhz */
- clock = 20000 * 1000;
- break;
-@@ -283,51 +169,9 @@ u32 si_pmu_alp_clock(struct si_pub *sih)
- return clock;
- }
-
--/* initialize PMU */
--void si_pmu_init(struct si_pub *sih)
--{
-- struct bcma_device *core;
--
-- /* select chipc */
-- core = ai_findcore(sih, BCMA_CORE_CHIPCOMMON, 0);
--
-- if (ai_get_pmurev(sih) == 1)
-- bcma_mask32(core, CHIPCREGOFFS(pmucontrol),
-- ~PCTL_NOILP_ON_WAIT);
-- else if (ai_get_pmurev(sih) >= 2)
-- bcma_set32(core, CHIPCREGOFFS(pmucontrol), PCTL_NOILP_ON_WAIT);
--}
--
--/* initialize PMU resources */
--void si_pmu_res_init(struct si_pub *sih)
--{
-- struct bcma_device *core;
-- u32 min_mask = 0, max_mask = 0;
--
-- /* select to chipc */
-- core = ai_findcore(sih, BCMA_CORE_CHIPCOMMON, 0);
--
-- /* Determine min/max rsrc masks */
-- si_pmu_res_masks(sih, &min_mask, &max_mask);
--
-- /* It is required to program max_mask first and then min_mask */
--
-- /* Program max resource mask */
--
-- if (max_mask)
-- bcma_write32(core, CHIPCREGOFFS(max_res_mask), max_mask);
--
-- /* Program min resource mask */
--
-- if (min_mask)
-- bcma_write32(core, CHIPCREGOFFS(min_res_mask), min_mask);
--
-- /* Add some delay; allow resources to come up and settle. */
-- mdelay(2);
--}
--
- u32 si_pmu_measure_alpclk(struct si_pub *sih)
- {
-+ struct si_info *sii = container_of(sih, struct si_info, pub);
- struct bcma_device *core;
- u32 alp_khz;
-
-@@ -335,7 +179,7 @@ u32 si_pmu_measure_alpclk(struct si_pub
- return 0;
-
- /* Remember original core before switch to chipc */
-- core = ai_findcore(sih, BCMA_CORE_CHIPCOMMON, 0);
-+ core = sii->icbus->drv_cc.core;
-
- if (bcma_read32(core, CHIPCREGOFFS(pmustatus)) & PST_EXTLPOAVAIL) {
- u32 ilp_ctr, alp_hz;
---- a/drivers/net/wireless/brcm80211/brcmsmac/pmu.h
-+++ b/drivers/net/wireless/brcm80211/brcmsmac/pmu.h
-@@ -26,10 +26,7 @@ extern u32 si_pmu_chipcontrol(struct si_
- extern u32 si_pmu_regcontrol(struct si_pub *sih, uint reg, u32 mask, u32 val);
- extern u32 si_pmu_alp_clock(struct si_pub *sih);
- extern void si_pmu_pllupd(struct si_pub *sih);
--extern void si_pmu_spuravoid_pllupdate(struct si_pub *sih, u8 spuravoid);
- extern u32 si_pmu_pllcontrol(struct si_pub *sih, uint reg, u32 mask, u32 val);
--extern void si_pmu_init(struct si_pub *sih);
--extern void si_pmu_res_init(struct si_pub *sih);
- extern u32 si_pmu_measure_alpclk(struct si_pub *sih);
-
- #endif /* _BRCM_PMU_H_ */
---- a/drivers/net/wireless/brcm80211/brcmsmac/pub.h
-+++ b/drivers/net/wireless/brcm80211/brcmsmac/pub.h
-@@ -311,7 +311,7 @@ extern uint brcms_c_detach(struct brcms_
- extern int brcms_c_up(struct brcms_c_info *wlc);
- extern uint brcms_c_down(struct brcms_c_info *wlc);
-
--extern bool brcms_c_chipmatch(u16 vendor, u16 device);
-+extern bool brcms_c_chipmatch(struct bcma_device *core);
- extern void brcms_c_init(struct brcms_c_info *wlc, bool mute_tx);
- extern void brcms_c_reset(struct brcms_c_info *wlc);
-
---- a/drivers/net/wireless/brcm80211/include/soc.h
-+++ b/drivers/net/wireless/brcm80211/include/soc.h
-@@ -19,68 +19,6 @@
-
- #define SI_ENUM_BASE 0x18000000 /* Enumeration space base */
-
--/* core codes */
--#define NODEV_CORE_ID 0x700 /* Invalid coreid */
--#define CC_CORE_ID 0x800 /* chipcommon core */
--#define ILINE20_CORE_ID 0x801 /* iline20 core */
--#define SRAM_CORE_ID 0x802 /* sram core */
--#define SDRAM_CORE_ID 0x803 /* sdram core */
--#define PCI_CORE_ID 0x804 /* pci core */
--#define MIPS_CORE_ID 0x805 /* mips core */
--#define ENET_CORE_ID 0x806 /* enet mac core */
--#define CODEC_CORE_ID 0x807 /* v90 codec core */
--#define USB_CORE_ID 0x808 /* usb 1.1 host/device core */
--#define ADSL_CORE_ID 0x809 /* ADSL core */
--#define ILINE100_CORE_ID 0x80a /* iline100 core */
--#define IPSEC_CORE_ID 0x80b /* ipsec core */
--#define UTOPIA_CORE_ID 0x80c /* utopia core */
--#define PCMCIA_CORE_ID 0x80d /* pcmcia core */
--#define SOCRAM_CORE_ID 0x80e /* internal memory core */
--#define MEMC_CORE_ID 0x80f /* memc sdram core */
--#define OFDM_CORE_ID 0x810 /* OFDM phy core */
--#define EXTIF_CORE_ID 0x811 /* external interface core */
--#define D11_CORE_ID 0x812 /* 802.11 MAC core */
--#define APHY_CORE_ID 0x813 /* 802.11a phy core */
--#define BPHY_CORE_ID 0x814 /* 802.11b phy core */
--#define GPHY_CORE_ID 0x815 /* 802.11g phy core */
--#define MIPS33_CORE_ID 0x816 /* mips3302 core */
--#define USB11H_CORE_ID 0x817 /* usb 1.1 host core */
--#define USB11D_CORE_ID 0x818 /* usb 1.1 device core */
--#define USB20H_CORE_ID 0x819 /* usb 2.0 host core */
--#define USB20D_CORE_ID 0x81a /* usb 2.0 device core */
--#define SDIOH_CORE_ID 0x81b /* sdio host core */
--#define ROBO_CORE_ID 0x81c /* roboswitch core */
--#define ATA100_CORE_ID 0x81d /* parallel ATA core */
--#define SATAXOR_CORE_ID 0x81e /* serial ATA & XOR DMA core */
--#define GIGETH_CORE_ID 0x81f /* gigabit ethernet core */
--#define PCIE_CORE_ID 0x820 /* pci express core */
--#define NPHY_CORE_ID 0x821 /* 802.11n 2x2 phy core */
--#define SRAMC_CORE_ID 0x822 /* SRAM controller core */
--#define MINIMAC_CORE_ID 0x823 /* MINI MAC/phy core */
--#define ARM11_CORE_ID 0x824 /* ARM 1176 core */
--#define ARM7S_CORE_ID 0x825 /* ARM7tdmi-s core */
--#define LPPHY_CORE_ID 0x826 /* 802.11a/b/g phy core */
--#define PMU_CORE_ID 0x827 /* PMU core */
--#define SSNPHY_CORE_ID 0x828 /* 802.11n single-stream phy core */
--#define SDIOD_CORE_ID 0x829 /* SDIO device core */
--#define ARMCM3_CORE_ID 0x82a /* ARM Cortex M3 core */
--#define HTPHY_CORE_ID 0x82b /* 802.11n 4x4 phy core */
--#define MIPS74K_CORE_ID 0x82c /* mips 74k core */
--#define GMAC_CORE_ID 0x82d /* Gigabit MAC core */
--#define DMEMC_CORE_ID 0x82e /* DDR1/2 memory controller core */
--#define PCIERC_CORE_ID 0x82f /* PCIE Root Complex core */
--#define OCP_CORE_ID 0x830 /* OCP2OCP bridge core */
--#define SC_CORE_ID 0x831 /* shared common core */
--#define AHB_CORE_ID 0x832 /* OCP2AHB bridge core */
--#define SPIH_CORE_ID 0x833 /* SPI host core */
--#define I2S_CORE_ID 0x834 /* I2S core */
--#define DMEMS_CORE_ID 0x835 /* SDR/DDR1 memory controller core */
--#define DEF_SHIM_COMP 0x837 /* SHIM component in ubus/6362 */
--#define OOB_ROUTER_CORE_ID 0x367 /* OOB router core ID */
--#define DEF_AI_COMP 0xfff /* Default component, in ai chips it
-- * maps all unused address ranges
-- */
--
- /* Common core control flags */
- #define SICF_BIST_EN 0x8000
- #define SICF_PME_EN 0x4000
BCMA_CORETABLE_END
--- a/drivers/net/wireless/brcm80211/brcmsmac/main.c
+++ b/drivers/net/wireless/brcm80211/brcmsmac/main.c
-@@ -734,7 +734,7 @@ static void brcms_c_ucode_bsinit(struct
+@@ -734,7 +734,7 @@ static void brcms_c_ucode_bsinit(struct
brcms_c_write_mhf(wlc_hw, wlc_hw->band->mhfs);
/* do band-specific ucode IHR, SHM, and SCR inits */
if (BRCMS_ISNPHY(wlc_hw->band))
brcms_c_write_inits(wlc_hw, ucode->d11n0bsinitvals16);
else
-@@ -2259,7 +2259,7 @@ static void brcms_ucode_download(struct
+@@ -2259,7 +2259,7 @@ static void brcms_ucode_download(struct
if (wlc_hw->ucode_loaded)
return;
MODULE_DEVICE_TABLE(bcma, brcms_coreid_table);
--- a/drivers/net/wireless/brcm80211/brcmsmac/main.c
+++ b/drivers/net/wireless/brcm80211/brcmsmac/main.c
-@@ -734,7 +734,7 @@ static void brcms_c_ucode_bsinit(struct
+@@ -734,7 +734,7 @@ static void brcms_c_ucode_bsinit(struct
brcms_c_write_mhf(wlc_hw, wlc_hw->band->mhfs);
/* do band-specific ucode IHR, SHM, and SCR inits */
if (BRCMS_ISNPHY(wlc_hw->band))
brcms_c_write_inits(wlc_hw, ucode->d11n0bsinitvals16);
else
-@@ -2259,7 +2259,7 @@ static void brcms_ucode_download(struct
+@@ -2259,7 +2259,7 @@ static void brcms_ucode_download(struct
if (wlc_hw->ucode_loaded)
return;
projects / openwrt.git / commitdiff