bcm53xx: backport BCM5301X DT patch specifying SPI controller
authorrmilecki <rmilecki@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Tue, 26 Apr 2016 09:22:49 +0000 (09:22 +0000)
committerrmilecki <rmilecki@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Tue, 26 Apr 2016 09:22:49 +0000 (09:22 +0000)
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@49232 3c298f89-4303-0410-b956-a3cf2f4a3e73

target/linux/bcm53xx/patches-4.4/037-ARM-BCM5301X-Add-DT-entry-for-SPI-controller-and-NOR.patch [new file with mode: 0644]

diff --git a/target/linux/bcm53xx/patches-4.4/037-ARM-BCM5301X-Add-DT-entry-for-SPI-controller-and-NOR.patch b/target/linux/bcm53xx/patches-4.4/037-ARM-BCM5301X-Add-DT-entry-for-SPI-controller-and-NOR.patch
new file mode 100644 (file)
index 0000000..4549396
--- /dev/null
@@ -0,0 +1,58 @@
+From 1b47b98acce2db0da632d056821420b33205b8b2 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
+Date: Tue, 19 Apr 2016 08:56:46 +0200
+Subject: [PATCH] ARM: BCM5301X: Add DT entry for SPI controller and NOR flash
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Controller is present on every BCM4708* board but only few devices have
+serial flash attached so mark it as disabled by default.
+
+Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+
+--- a/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
++++ b/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
+@@ -59,3 +59,7 @@
+ &uart0 {
+       status = "okay";
+ };
++
++&spi_nor {
++      status = "okay";
++};
+--- a/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts
++++ b/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts
+@@ -122,3 +122,7 @@
+ &uart0 {
+       status = "okay";
+ };
++
++&spi_nor {
++      status = "okay";
++};
+--- a/arch/arm/boot/dts/bcm5301x.dtsi
++++ b/arch/arm/boot/dts/bcm5301x.dtsi
+@@ -225,6 +225,20 @@
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+               };
++
++              spi@29000 {
++                      reg = <0x00029000 0x1000>;
++                      #address-cells = <1>;
++                      #size-cells = <0>;
++
++                      spi_nor: spi-nor@0 {
++                              compatible = "jedec,spi-nor";
++                              reg = <0>;
++                              spi-max-frequency = <20000000>;
++                              linux,part-probe = "ofpart", "bcm47xxpart";
++                              status = "disabled";
++                      };
++              };
+       };
+       lcpll0: lcpll0@1800c100 {