machine=$(cat /proc/device-tree/model)
case "$machine" in
- "MediaTek MT7623 evaluation board")
- name="mt7623_evb"
+ "MediaTek MT7623 eMMC evaluation board")
+ name="eMMC"
+ ;;
+ "MediaTek MT7623 NAND evaluation board")
+ name="NAND"
;;
esac
--- /dev/null
+#
+# Copyright (C) 2016 OpenWrt.org
+#
+
+platform_do_upgrade() {
+ local tar_file="$1"
+ local board="$(cat /tmp/sysinfo/board_name)"
+
+ echo "flashing kernel"
+ tar xf $tar_file sysupgrade-$board/kernel -O | mtd write - kernel
+
+ echo "flashing rootfs"
+ tar xf $tar_file sysupgrade-$board/root -O | mtd write - rootfs
+
+ return 0
+}
+
+platform_check_image() {
+ local tar_file="$1"
+ local board=$(cat /tmp/sysinfo/board_name)
+
+ case "$board" in
+ NAND | \
+ eMMC)
+ local kernel_length=`(tar xf $tar_file sysupgrade-$board/kernel -O | wc -c) 2> /dev/null`
+ local rootfs_length=`(tar xf $tar_file sysupgrade-$board/root -O | wc -c) 2> /dev/null`
+ ;;
+
+ *)
+ echo "Sysupgrade is not supported on your board yet."
+ return 1
+ ;;
+ esac
+
+ [ "$kernel_length" = 0 -o "$rootfs_length" = 0 ] && {
+ echo "The upgarde image is corrupt."
+ return 1
+ }
+
+ return 0
+}
CONFIG_CLKSRC_OF=y
CONFIG_CLKSRC_PROBE=y
CONFIG_CLONE_BACKWARDS=y
-CONFIG_CMDLINE="earlyprintk console=ttyS0,115200 block2mtd.block2mtd=/dev/mmcblk0,65536,eMMC,5 mtdparts=eMMC:256k(mbr)ro,512k(uboot)ro,256k(config)ro,256k(factory)ro,32M(bootimg),32M(recovery),1024M(rootfs),2048M(usrdata),-(bmtpool)"
+CONFIG_CMDLINE="earlyprintk console=ttyS0,115200 block2mtd.block2mtd=/dev/mmcblk0,65536,eMMC,5 mtdparts=eMMC:256k(mbr)ro,512k(uboot)ro,256k(config)ro,256k(factory)ro,32M(kernel),32M(recovery),1024M(rootfs),2048M(usrdata),-(bmtpool)"
CONFIG_CMDLINE_FORCE=y
CONFIG_COMMON_CLK=y
CONFIG_COMMON_CLK_MEDIATEK=y
CONFIG_EDAC_ATOMIC_SCRUB=y
CONFIG_EDAC_SUPPORT=y
CONFIG_ELF_CORE=y
+CONFIG_FIXED_PHY=y
CONFIG_FIX_EARLYCON_MEM=y
CONFIG_FREEZER=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_MTD_BLOCK2MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_M25P80=y
+CONFIG_MTD_MT81xx_NOR=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_ECC=y
+CONFIG_MTD_NAND_MTK=y
CONFIG_MTD_SPI_NOR=y
CONFIG_MTK_INFRACFG=y
CONFIG_MTK_PMIC_WRAP=y
--- /dev/null
+/*
+ * Copyright (c) 2016 MediaTek Inc.
+ * Author: John Crispin <blogic@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/dts-v1/;
+
+#include "mt7623.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "MediaTek MT7623 evaluation board";
+ compatible = "mediatek,mt7623-evb", "mediatek,mt7623";
+
+ chosen {
+ stdout-path = &uart2;
+ };
+
+ memory {
+ reg = <0 0x80000000 0 0x20000000>;
+ };
+
+ usb_p1_vbus: regulator@0 {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&pio 135 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+};
+
+&cpu0 {
+ proc-supply = <&mt6323_vproc_reg>;
+};
+
+&cpu1 {
+ proc-supply = <&mt6323_vproc_reg>;
+};
+
+&cpu2 {
+ proc-supply = <&mt6323_vproc_reg>;
+};
+
+&cpu3 {
+ proc-supply = <&mt6323_vproc_reg>;
+};
+
+&pwrap {
+ pmic: mt6323 {
+ compatible = "mediatek,mt6323";
+ interrupt-parent = <&pio>;
+ interrupts = <150 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ mt6323regulator: mt6323regulator{
+ compatible = "mediatek,mt6323-regulator";
+
+ mt6323_vproc_reg: buck_vproc{
+ regulator-name = "vproc";
+ regulator-min-microvolt = < 700000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <12500>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ mt6323_vsys_reg: buck_vsys{
+ regulator-name = "vsys";
+ regulator-min-microvolt = <1400000>;
+ regulator-max-microvolt = <2987500>;
+ regulator-ramp-delay = <25000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ mt6323_vpa_reg: buck_vpa{
+ regulator-name = "vpa";
+ regulator-min-microvolt = < 500000>;
+ regulator-max-microvolt = <3650000>;
+ };
+
+ mt6323_vtcxo_reg: ldo_vtcxo{
+ regulator-name = "vtcxo";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-enable-ramp-delay = <90>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ mt6323_vcn28_reg: ldo_vcn28{
+ regulator-name = "vcn28";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-enable-ramp-delay = <185>;
+ };
+
+ mt6323_vcn33_bt_reg: ldo_vcn33_bt{
+ regulator-name = "vcn33_bt";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3600000>;
+ regulator-enable-ramp-delay = <185>;
+ };
+
+ mt6323_vcn33_wifi_reg: ldo_vcn33_wifi{
+ regulator-name = "vcn33_wifi";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3600000>;
+ regulator-enable-ramp-delay = <185>;
+ };
+
+ mt6323_va_reg: ldo_va{
+ regulator-name = "va";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-enable-ramp-delay = <216>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ mt6323_vcama_reg: ldo_vcama{
+ regulator-name = "vcama";
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-enable-ramp-delay = <216>;
+ };
+
+ mt6323_vio28_reg: ldo_vio28{
+ regulator-name = "vio28";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-enable-ramp-delay = <216>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ mt6323_vusb_reg: ldo_vusb{
+ regulator-name = "vusb";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-enable-ramp-delay = <216>;
+ regulator-boot-on;
+ };
+
+ mt6323_vmc_reg: ldo_vmc{
+ regulator-name = "vmc";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-enable-ramp-delay = <36>;
+ regulator-boot-on;
+ };
+
+ mt6323_vmch_reg: ldo_vmch{
+ regulator-name = "vmch";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-enable-ramp-delay = <36>;
+ regulator-boot-on;
+ };
+
+ mt6323_vemc3v3_reg: ldo_vemc3v3{
+ regulator-name = "vemc3v3";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-enable-ramp-delay = <36>;
+ regulator-boot-on;
+ };
+
+ mt6323_vgp1_reg: ldo_vgp1{
+ regulator-name = "vgp1";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-enable-ramp-delay = <216>;
+ };
+
+ mt6323_vgp2_reg: ldo_vgp2{
+ regulator-name = "vgp2";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-enable-ramp-delay = <216>;
+ };
+
+ mt6323_vgp3_reg: ldo_vgp3{
+ regulator-name = "vgp3";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-enable-ramp-delay = <216>;
+ };
+
+ mt6323_vcn18_reg: ldo_vcn18{
+ regulator-name = "vcn18";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-enable-ramp-delay = <216>;
+ };
+
+ mt6323_vsim1_reg: ldo_vsim1{
+ regulator-name = "vsim1";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-enable-ramp-delay = <216>;
+ };
+
+ mt6323_vsim2_reg: ldo_vsim2{
+ regulator-name = "vsim2";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-enable-ramp-delay = <216>;
+ };
+
+ mt6323_vrtc_reg: ldo_vrtc{
+ regulator-name = "vrtc";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ mt6323_vcamaf_reg: ldo_vcamaf{
+ regulator-name = "vcamaf";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-enable-ramp-delay = <216>;
+ };
+
+ mt6323_vibr_reg: ldo_vibr{
+ regulator-name = "vibr";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-enable-ramp-delay = <36>;
+ };
+
+ mt6323_vrf18_reg: ldo_vrf18{
+ regulator-name = "vrf18";
+ regulator-min-microvolt = <1825000>;
+ regulator-max-microvolt = <1825000>;
+ regulator-enable-ramp-delay = <187>;
+ };
+
+ mt6323_vm_reg: ldo_vm{
+ regulator-name = "vm";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-enable-ramp-delay = <216>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ mt6323_vio18_reg: ldo_vio18{
+ regulator-name = "vio18";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-enable-ramp-delay = <216>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ mt6323_vcamd_reg: ldo_vcamd{
+ regulator-name = "vcamd";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-enable-ramp-delay = <216>;
+ };
+
+ mt6323_vcamio_reg: ldo_vcamio{
+ regulator-name = "vcamio";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-enable-ramp-delay = <216>;
+ };
+ };
+ };
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&pio {
+ nand_pins_default: nanddefault {
+ pins_dat {
+ pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_NLD7>,
+ <MT7623_PIN_112_MSDC0_DAT6_FUNC_NLD6>,
+ <MT7623_PIN_114_MSDC0_DAT4_FUNC_NLD4>,
+ <MT7623_PIN_118_MSDC0_DAT3_FUNC_NLD3>,
+ <MT7623_PIN_121_MSDC0_DAT0_FUNC_NLD0>,
+ <MT7623_PIN_120_MSDC0_DAT1_FUNC_NLD1>,
+ <MT7623_PIN_113_MSDC0_DAT5_FUNC_NLD5>,
+ <MT7623_PIN_115_MSDC0_RSTB_FUNC_NLD8>,
+ <MT7623_PIN_119_MSDC0_DAT2_FUNC_NLD2>;
+ input-enable;
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-up;
+ };
+
+ pins_we {
+ pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_NWEB>;
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
+ };
+
+ pins_ale {
+ pinmux = <MT7623_PIN_116_MSDC0_CMD_FUNC_NALE>;
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
+ };
+ };
+
+ eth_default: eth {
+ pins_eth {
+ pinmux = <MT7623_PIN_275_G2_MDC_FUNC_MDC>,
+ <MT7623_PIN_276_G2_MDIO_FUNC_MDIO>,
+ <MT7623_PIN_262_G2_TXEN_FUNC_G2_TXEN>,
+ <MT7623_PIN_263_G2_TXD3_FUNC_G2_TXD3>,
+ <MT7623_PIN_264_G2_TXD2_FUNC_G2_TXD2>,
+ <MT7623_PIN_265_G2_TXD1_FUNC_G2_TXD1>,
+ <MT7623_PIN_266_G2_TXD0_FUNC_G2_TXD0>,
+ <MT7623_PIN_267_G2_TXCLK_FUNC_G2_TXC>,
+ <MT7623_PIN_268_G2_RXCLK_FUNC_G2_RXC>,
+ <MT7623_PIN_269_G2_RXD0_FUNC_G2_RXD0>,
+ <MT7623_PIN_270_G2_RXD1_FUNC_G2_RXD1>,
+ <MT7623_PIN_271_G2_RXD2_FUNC_G2_RXD2>,
+ <MT7623_PIN_272_G2_RXD3_FUNC_G2_RXD3>,
+ <MT7623_PIN_273_ESW_INT_FUNC_ESW_INT>,
+ <MT7623_PIN_274_G2_RXDV_FUNC_G2_RXDV>;
+ };
+
+ pins_eth_rst {
+ pinmux = <MT7623_PIN_15_GPIO15_FUNC_GPIO15>;
+ output-low;
+ };
+ };
+};
+
+&nandc {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&nand_pins_default>;
+ nand@0 {
+ reg = <0>;
+ spare_per_sector = <64>;
+ nand-on-flash-bbt;
+ nand-ecc-mode = "hw";
+ nand-ecc-strength = <12>;
+ nand-ecc-step-size = <1024>;
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@C0000 {
+ label = "uboot-env";
+ reg = <0xC0000 0x40000>;
+ };
+
+ partition@100000 {
+ label = "factory";
+ reg = <0x100000 0x40000>;
+ };
+
+ partition@140000 {
+ label = "kernel";
+ reg = <0x140000 0x2000000>;
+ };
+
+ partition@2140000 {
+ label = "recovery";
+ reg = <0x2140000 0x2000000>;
+ };
+
+ partition@4140000 {
+ label = "rootfs";
+ reg = <0x4140000 0x1000000>;
+ };
+ };
+ };
+};
+&bch {
+ status = "okay";
+};
+
+&usb1 {
+ vusb33-supply = <&mt6323_vusb_reg>;
+ vbus-supply = <&usb_p1_vbus>;
+ status = "okay";
+};
+
+&u3phy1 {
+ status = "okay";
+};
+
+&pcie {
+ status = "okay";
+};
+
+ð {
+ status = "okay";
+};
+
+&gmac1 {
+ mac-address = [00 11 22 33 44 56];
+ status = "okay";
+};
+
+&gmac2 {
+ mac-address = [00 11 22 33 44 55];
+ status = "okay";
+};
+
+&gsw {
+ pinctrl-names = "default";
+ pinctrl-0 = <ð_default>;
+ mediatek,reset-pin = <&pio 15 0>;
+ status = "okay";
+};
--- /dev/null
+/*
+ * Copyright (c) 2016 MediaTek Inc.
+ * Author: John Crispin <blogic@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/dts-v1/;
+
+#include "mt7623.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "MediaTek MT7623 eMMC evaluation board";
+ compatible = "mediatek,mt7623-evb", "mediatek,mt7623";
+
+ chosen {
+ stdout-path = &uart2;
+ };
+
+ memory {
+ reg = <0 0x80000000 0 0x20000000>;
+ };
+
+ usb_p1_vbus: regulator@0 {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&pio 135 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+};
+
+&cpu0 {
+ proc-supply = <&mt6323_vproc_reg>;
+};
+
+&cpu1 {
+ proc-supply = <&mt6323_vproc_reg>;
+};
+
+&cpu2 {
+ proc-supply = <&mt6323_vproc_reg>;
+};
+
+&cpu3 {
+ proc-supply = <&mt6323_vproc_reg>;
+};
+
+&pwrap {
+ pmic: mt6323 {
+ compatible = "mediatek,mt6323";
+ interrupt-parent = <&pio>;
+ interrupts = <150 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ mt6323regulator: mt6323regulator{
+ compatible = "mediatek,mt6323-regulator";
+
+ mt6323_vproc_reg: buck_vproc{
+ regulator-name = "vproc";
+ regulator-min-microvolt = < 700000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <12500>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ mt6323_vsys_reg: buck_vsys{
+ regulator-name = "vsys";
+ regulator-min-microvolt = <1400000>;
+ regulator-max-microvolt = <2987500>;
+ regulator-ramp-delay = <25000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ mt6323_vpa_reg: buck_vpa{
+ regulator-name = "vpa";
+ regulator-min-microvolt = < 500000>;
+ regulator-max-microvolt = <3650000>;
+ };
+
+ mt6323_vtcxo_reg: ldo_vtcxo{
+ regulator-name = "vtcxo";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-enable-ramp-delay = <90>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ mt6323_vcn28_reg: ldo_vcn28{
+ regulator-name = "vcn28";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-enable-ramp-delay = <185>;
+ };
+
+ mt6323_vcn33_bt_reg: ldo_vcn33_bt{
+ regulator-name = "vcn33_bt";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3600000>;
+ regulator-enable-ramp-delay = <185>;
+ };
+
+ mt6323_vcn33_wifi_reg: ldo_vcn33_wifi{
+ regulator-name = "vcn33_wifi";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3600000>;
+ regulator-enable-ramp-delay = <185>;
+ };
+
+ mt6323_va_reg: ldo_va{
+ regulator-name = "va";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-enable-ramp-delay = <216>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ mt6323_vcama_reg: ldo_vcama{
+ regulator-name = "vcama";
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-enable-ramp-delay = <216>;
+ };
+
+ mt6323_vio28_reg: ldo_vio28{
+ regulator-name = "vio28";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-enable-ramp-delay = <216>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ mt6323_vusb_reg: ldo_vusb{
+ regulator-name = "vusb";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-enable-ramp-delay = <216>;
+ regulator-boot-on;
+ };
+
+ mt6323_vmc_reg: ldo_vmc{
+ regulator-name = "vmc";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-enable-ramp-delay = <36>;
+ regulator-boot-on;
+ };
+
+ mt6323_vmch_reg: ldo_vmch{
+ regulator-name = "vmch";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-enable-ramp-delay = <36>;
+ regulator-boot-on;
+ };
+
+ mt6323_vemc3v3_reg: ldo_vemc3v3{
+ regulator-name = "vemc3v3";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-enable-ramp-delay = <36>;
+ regulator-boot-on;
+ };
+
+ mt6323_vgp1_reg: ldo_vgp1{
+ regulator-name = "vgp1";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-enable-ramp-delay = <216>;
+ };
+
+ mt6323_vgp2_reg: ldo_vgp2{
+ regulator-name = "vgp2";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-enable-ramp-delay = <216>;
+ };
+
+ mt6323_vgp3_reg: ldo_vgp3{
+ regulator-name = "vgp3";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-enable-ramp-delay = <216>;
+ };
+
+ mt6323_vcn18_reg: ldo_vcn18{
+ regulator-name = "vcn18";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-enable-ramp-delay = <216>;
+ };
+
+ mt6323_vsim1_reg: ldo_vsim1{
+ regulator-name = "vsim1";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-enable-ramp-delay = <216>;
+ };
+
+ mt6323_vsim2_reg: ldo_vsim2{
+ regulator-name = "vsim2";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-enable-ramp-delay = <216>;
+ };
+
+ mt6323_vrtc_reg: ldo_vrtc{
+ regulator-name = "vrtc";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ mt6323_vcamaf_reg: ldo_vcamaf{
+ regulator-name = "vcamaf";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-enable-ramp-delay = <216>;
+ };
+
+ mt6323_vibr_reg: ldo_vibr{
+ regulator-name = "vibr";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-enable-ramp-delay = <36>;
+ };
+
+ mt6323_vrf18_reg: ldo_vrf18{
+ regulator-name = "vrf18";
+ regulator-min-microvolt = <1825000>;
+ regulator-max-microvolt = <1825000>;
+ regulator-enable-ramp-delay = <187>;
+ };
+
+ mt6323_vm_reg: ldo_vm{
+ regulator-name = "vm";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-enable-ramp-delay = <216>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ mt6323_vio18_reg: ldo_vio18{
+ regulator-name = "vio18";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-enable-ramp-delay = <216>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ mt6323_vcamd_reg: ldo_vcamd{
+ regulator-name = "vcamd";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-enable-ramp-delay = <216>;
+ };
+
+ mt6323_vcamio_reg: ldo_vcamio{
+ regulator-name = "vcamio";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-enable-ramp-delay = <216>;
+ };
+ };
+ };
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&mmc0 {
+ status = "okay";
+ pinctrl-names = "default", "state_uhs";
+ pinctrl-0 = <&mmc0_pins_default>;
+ pinctrl-1 = <&mmc0_pins_uhs>;
+ bus-width = <8>;
+ max-frequency = <50000000>;
+ cap-mmc-highspeed;
+ vmmc-supply = <&mt6323_vemc3v3_reg>;
+ vqmmc-supply = <&mt6323_vio18_reg>;
+ non-removable;
+};
+
+&mmc1 {
+ status = "okay";
+ pinctrl-names = "default", "state_uhs";
+ pinctrl-0 = <&mmc1_pins_default>;
+ pinctrl-1 = <&mmc1_pins_uhs>;
+ bus-width = <4>;
+ max-frequency = <50000000>;
+ cap-sd-highspeed;
+ sd-uhs-sdr25;
+// cd-gpios = <&pio 132 0>;
+ vmmc-supply = <&mt6323_vmch_reg>;
+ vqmmc-supply = <&mt6323_vmc_reg>;
+};
+
+&pio {
+ mmc0_pins_default: mmc0default {
+ pins_cmd_dat {
+ pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
+ <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
+ <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
+ <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
+ <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
+ <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
+ <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
+ <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
+ <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
+ input-enable;
+ bias-pull-up;
+ };
+
+ pins_clk {
+ pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
+ bias-pull-down;
+ };
+
+ pins_rst {
+ pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
+ bias-pull-up;
+ };
+ };
+
+ mmc0_pins_uhs: mmc0 {
+ pins_cmd_dat {
+ pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
+ <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
+ <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
+ <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
+ <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
+ <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
+ <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
+ <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
+ <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
+ input-enable;
+ drive-strength = <MTK_DRIVE_2mA>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
+ };
+
+ pins_clk {
+ pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
+ drive-strength = <MTK_DRIVE_2mA>;
+ bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
+ };
+
+ pins_rst {
+ pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
+ bias-pull-up;
+ };
+ };
+
+ mmc1_pins_default: mmc1default {
+ pins_cmd_dat {
+ pinmux = <MT7623_PIN_107_MSDC1_DAT0_FUNC_MSDC1_DAT0>,
+ <MT7623_PIN_108_MSDC1_DAT1_FUNC_MSDC1_DAT1>,
+ <MT7623_PIN_109_MSDC1_DAT2_FUNC_MSDC1_DAT2>,
+ <MT7623_PIN_110_MSDC1_DAT3_FUNC_MSDC1_DAT3>,
+ <MT7623_PIN_105_MSDC1_CMD_FUNC_MSDC1_CMD>;
+ input-enable;
+ drive-strength = <MTK_DRIVE_4mA>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
+ };
+
+ pins_clk {
+ pinmux = <MT7623_PIN_106_MSDC1_CLK_FUNC_MSDC1_CLK>;
+ bias-pull-down;
+ drive-strength = <MTK_DRIVE_4mA>;
+ };
+
+// pins_insert {
+// pinmux = <MT8173_PIN_132_I2S0_DATA1_FUNC_GPIO132>;
+// bias-pull-up;
+// };
+ };
+
+ mmc1_pins_uhs: mmc1 {
+ pins_cmd_dat {
+ pinmux = <MT7623_PIN_107_MSDC1_DAT0_FUNC_MSDC1_DAT0>,
+ <MT7623_PIN_108_MSDC1_DAT1_FUNC_MSDC1_DAT1>,
+ <MT7623_PIN_109_MSDC1_DAT2_FUNC_MSDC1_DAT2>,
+ <MT7623_PIN_110_MSDC1_DAT3_FUNC_MSDC1_DAT3>,
+ <MT7623_PIN_105_MSDC1_CMD_FUNC_MSDC1_CMD>;
+ input-enable;
+ drive-strength = <MTK_DRIVE_4mA>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
+ };
+
+ pins_clk {
+ pinmux = <MT7623_PIN_106_MSDC1_CLK_FUNC_MSDC1_CLK>;
+ drive-strength = <MTK_DRIVE_4mA>;
+ bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
+ };
+ };
+
+ eth_default: eth {
+ pins_eth {
+ pinmux = <MT7623_PIN_275_G2_MDC_FUNC_MDC>,
+ <MT7623_PIN_276_G2_MDIO_FUNC_MDIO>,
+ <MT7623_PIN_262_G2_TXEN_FUNC_G2_TXEN>,
+ <MT7623_PIN_263_G2_TXD3_FUNC_G2_TXD3>,
+ <MT7623_PIN_264_G2_TXD2_FUNC_G2_TXD2>,
+ <MT7623_PIN_265_G2_TXD1_FUNC_G2_TXD1>,
+ <MT7623_PIN_266_G2_TXD0_FUNC_G2_TXD0>,
+ <MT7623_PIN_267_G2_TXCLK_FUNC_G2_TXC>,
+ <MT7623_PIN_268_G2_RXCLK_FUNC_G2_RXC>,
+ <MT7623_PIN_269_G2_RXD0_FUNC_G2_RXD0>,
+ <MT7623_PIN_270_G2_RXD1_FUNC_G2_RXD1>,
+ <MT7623_PIN_271_G2_RXD2_FUNC_G2_RXD2>,
+ <MT7623_PIN_272_G2_RXD3_FUNC_G2_RXD3>,
+ <MT7623_PIN_273_ESW_INT_FUNC_ESW_INT>,
+ <MT7623_PIN_274_G2_RXDV_FUNC_G2_RXDV>;
+ };
+
+ pins_eth_rst {
+ pinmux = <MT7623_PIN_15_GPIO15_FUNC_GPIO15>;
+ output-low;
+ };
+ };
+};
+
+&usb1 {
+ vusb33-supply = <&mt6323_vusb_reg>;
+ vbus-supply = <&usb_p1_vbus>;
+ status = "okay";
+};
+
+&u3phy1 {
+ status = "okay";
+};
+
+&pcie {
+ status = "okay";
+};
+
+ð {
+ status = "okay";
+};
+
+&gmac1 {
+ mac-address = [00 11 22 33 44 56];
+ status = "okay";
+};
+
+&gmac2 {
+ mac-address = [00 11 22 33 44 55];
+ status = "okay";
+};
+
+&gsw {
+ pinctrl-names = "default";
+ pinctrl-0 = <ð_default>;
+ mediatek,reset-pin = <&pio 15 0>;
+ status = "okay";
+};
include $(INCLUDE_DIR)/image.mk
define Image/BuilduImage
- cat $(LINUX_DIR)/arch/arm/boot/dts/mt7623-evb.dtb >> $(KDIR)/zImage$(1)
- mkimage -A arm -O linux -T kernel -C none -a 0x80008000 -e 0x80008000 -n 'MIPS OpenWrt Linux-$(LINUX_VERSION)' -d $(KDIR)/zImage$(1) $(KDIR)/uImage$(1)
- $(CP) $(KDIR)/uImage$(1) $(BIN_DIR)/$(IMG_PREFIX)-uImage$(1)
+ $(CP) $(KDIR)/zImage$(2) $(KDIR)/zImage-$(1)$(2)
+ cat $(LINUX_DIR)/arch/arm/boot/dts/mt7623-$1.dtb >> $(KDIR)/zImage-$(1)$(2)
+ mkimage -A arm -O linux -T kernel -C none -a 0x80008000 -e 0x80008000 -n 'MIPS OpenWrt Linux-$(LINUX_VERSION)' -d $(KDIR)/zImage-$(1)$(2) $(KDIR)/uImage-$(1)$(2)
endef
-define Image/BuildKernel
- $(call Image/BuilduImage)
+define Image/Build/SysupgradeCombined
+ $(call Image/BuilduImage,$1)
ifneq ($(CONFIG_TARGET_ROOTFS_INITRAMFS),)
- $(call Image/BuilduImage,-initramfs)
+ $(call Image/BuilduImage,$1,-initramfs)
+ $(CP) $(KDIR)/uImage-$(1)-initramfs $(BIN_DIR)/$(IMG_PREFIX)-uImage-$(1)-initramfs
endif
+ mkdir -p "$(KDIR_TMP)/sysupgrade-$(1)/"
+ echo "BOARD=$(1)" > "$(KDIR_TMP)/sysupgrade-$(1)/CONTROL"
+ $(CP) "$(KDIR)/root.squashfs" "$(KDIR_TMP)/sysupgrade-$(1)/root"
+ $(CP) "$(KDIR)/uImage-$(1)" "$(KDIR_TMP)/sysupgrade-$(1)/kernel"
+ (cd "$(KDIR_TMP)"; $(TAR) cvf \
+ "$(BIN_DIR)/$(IMG_PREFIX)-$(1)-sysupgrade.tar" sysupgrade-$(1) \
+ $(if $(SOURCE_DATE_EPOCH),--mtime="@$(SOURCE_DATE_EPOCH)") \
+ )
endef
define Image/Build/squashfs
$(call prepare_generic_squashfs,$(KDIR)/root.squashfs)
+ $(CP) $(KDIR)/root.squashfs $(BIN_DIR)/$(IMG_PREFIX)-root.squashfs
+
+ $(call Image/Build/SysupgradeCombined,eMMC)
+ $(call Image/Build/SysupgradeCombined,NAND)
endef
define Image/Build
From c30a296646a42302065ba452abe95b0b4b550883 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Sun, 27 Jul 2014 09:38:50 +0100
-Subject: [PATCH 01/91] NET: multi phy support
+Subject: [PATCH 01/90] NET: multi phy support
Signed-off-by: John Crispin <blogic@openwrt.org>
---
From 2c93328ed05061a50e3bd4111379dbcf6946d3ac Mon Sep 17 00:00:00 2001
From: James Liao <jamesjj.liao@mediatek.com>
Date: Wed, 30 Dec 2015 14:41:43 +0800
-Subject: [PATCH 02/91] soc: mediatek: Separate scpsys driver common code
+Subject: [PATCH 02/90] soc: mediatek: Separate scpsys driver common code
Separate scpsys driver common code to mtk-scpsys.c, and move MT8173
platform code to mtk-scpsys-mt8173.c.
From c359272f86805259c5801385d60fdeea9d629cf9 Mon Sep 17 00:00:00 2001
From: James Liao <jamesjj.liao@mediatek.com>
Date: Wed, 30 Dec 2015 14:41:44 +0800
-Subject: [PATCH 03/91] soc: mediatek: Init MT8173 scpsys driver earlier
+Subject: [PATCH 03/90] soc: mediatek: Init MT8173 scpsys driver earlier
Some power domain comsumers may init before module_init.
So the power domain provider (scpsys) need to be initialized
From f371844374fff273f817d6c43f679606417af59e Mon Sep 17 00:00:00 2001
From: Shunli Wang <shunli.wang@mediatek.com>
Date: Wed, 30 Dec 2015 14:41:45 +0800
-Subject: [PATCH 04/91] soc: mediatek: Add MT2701 power dt-bindings
+Subject: [PATCH 04/90] soc: mediatek: Add MT2701 power dt-bindings
Add power dt-bindings for MT2701.
From c6711565985f359d7d3c05f01f081e4c216902de Mon Sep 17 00:00:00 2001
From: Shunli Wang <shunli.wang@mediatek.com>
Date: Wed, 30 Dec 2015 14:41:46 +0800
-Subject: [PATCH 05/91] soc: mediatek: Add MT2701/MT7623 scpsys driver
+Subject: [PATCH 05/90] soc: mediatek: Add MT2701/MT7623 scpsys driver
Add scpsys driver for MT2701 and MT7623.
From 0c39bcd17fa6ce723f56ad3756b4bb36c4690342 Mon Sep 17 00:00:00 2001
From: James Liao <jamesjj.liao@mediatek.com>
Date: Tue, 5 Jan 2016 14:30:17 +0800
-Subject: [PATCH 06/91] clk: mediatek: Refine the makefile to support multiple
+Subject: [PATCH 06/90] clk: mediatek: Refine the makefile to support multiple
clock drivers
Add a Kconfig to define clock configuration for each SoC, and
From d7e96f87f66c571e9f4171ecd89c656fbd2de89b Mon Sep 17 00:00:00 2001
From: James Liao <jamesjj.liao@mediatek.com>
Date: Tue, 5 Jan 2016 14:30:18 +0800
-Subject: [PATCH 07/91] dt-bindings: ARM: Mediatek: Document bindings for
+Subject: [PATCH 07/90] dt-bindings: ARM: Mediatek: Document bindings for
MT2701
This patch adds the binding documentation for apmixedsys, bdpsys,
From 2fcbc15da2f13164e0851b9c7fae290249f0b44d Mon Sep 17 00:00:00 2001
From: Shunli Wang <shunli.wang@mediatek.com>
Date: Tue, 5 Jan 2016 14:30:19 +0800
-Subject: [PATCH 08/91] clk: mediatek: Add dt-bindings for MT2701 clocks
+Subject: [PATCH 08/90] clk: mediatek: Add dt-bindings for MT2701 clocks
Add MT2701 clock dt-bindings, include topckgen, apmixedsys,
infracfg, pericfg and subsystem clocks.
From f2c07eaa2df52f9acac9ffc3457d3d81079dd723 Mon Sep 17 00:00:00 2001
From: Shunli Wang <shunli.wang@mediatek.com>
Date: Tue, 5 Jan 2016 14:30:20 +0800
-Subject: [PATCH 09/91] clk: mediatek: Add MT2701 clock support
+Subject: [PATCH 09/90] clk: mediatek: Add MT2701 clock support
Add MT2701 clock support, include topckgen, apmixedsys,
infracfg, pericfg and subsystem clocks.
From 8d134cbe750b59d15c591622d81e2e9daa09f0c4 Mon Sep 17 00:00:00 2001
From: Shunli Wang <shunli.wang@mediatek.com>
Date: Tue, 5 Jan 2016 14:30:21 +0800
-Subject: [PATCH 10/91] reset: mediatek: mt2701 reset controller dt-binding
+Subject: [PATCH 10/90] reset: mediatek: mt2701 reset controller dt-binding
file
Dt-binding file about reset controller is used to provide
From b86d3303db25a8296e4c3de46ee1470f60f71b0c Mon Sep 17 00:00:00 2001
From: Shunli Wang <shunli.wang@mediatek.com>
Date: Tue, 5 Jan 2016 14:30:22 +0800
-Subject: [PATCH 11/91] reset: mediatek: mt2701 reset driver
+Subject: [PATCH 11/90] reset: mediatek: mt2701 reset driver
In infrasys and perifsys, there are many reset
control bits for kinds of modules. These bits are
From 3b5df542d52b13a1b20d25311fa4c4029a3b83af Mon Sep 17 00:00:00 2001
From: Erin Lo <erin.lo@mediatek.com>
Date: Mon, 28 Dec 2015 15:09:02 +0800
-Subject: [PATCH 12/91] ARM: mediatek: Add MT2701 config options for mediatek
+Subject: [PATCH 12/90] ARM: mediatek: Add MT2701 config options for mediatek
SoCs.
The upcoming MTK pinctrl driver have a big pin table for each SoC
From 1a254735cad9db5c8605c972b0f16b3929dc0d6e Mon Sep 17 00:00:00 2001
From: Biao Huang <biao.huang@mediatek.com>
Date: Mon, 28 Dec 2015 15:09:03 +0800
-Subject: [PATCH 13/91] dt-bindings: mediatek: Modify pinctrl bindings for
+Subject: [PATCH 13/90] dt-bindings: mediatek: Modify pinctrl bindings for
mt2701
Signed-off-by: Biao Huang <biao.huang@mediatek.com>
From 416720ba33d4fd7d3166c17be7c13651cc08d408 Mon Sep 17 00:00:00 2001
From: Biao Huang <biao.huang@mediatek.com>
Date: Mon, 28 Dec 2015 15:09:04 +0800
-Subject: [PATCH 14/91] pinctrl: dt bindings: Add pinfunc header file for
+Subject: [PATCH 14/90] pinctrl: dt bindings: Add pinfunc header file for
mt2701
Add pinfunc header file, mt2701 related dts will include it
From ddc72b659b3642d0496dee4e1ee39416ca008053 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Thu, 7 Jan 2016 23:42:06 +0100
-Subject: [PATCH 15/91] dt-bindings: mediatek: Modify pinctrl bindings for
+Subject: [PATCH 15/90] dt-bindings: mediatek: Modify pinctrl bindings for
mt7623
Signed-off-by: John Crispin <blogic@openwrt.org>
From 1255eaacd6cc9d1fa6bb33185380efed22008baf Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Sat, 27 Jun 2015 13:13:05 +0200
-Subject: [PATCH 16/91] pinctrl: dt bindings: Add pinctrl file for mt7623
+Subject: [PATCH 16/90] pinctrl: dt bindings: Add pinctrl file for mt7623
Add the driver and header files required to make pinctrl work on MediaTek
MT7623.
From 294cf90337d70ad74edf147180bbeef837298bd0 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Wed, 6 Jan 2016 20:06:49 +0100
-Subject: [PATCH 17/91] clk: add hifsys reset
+Subject: [PATCH 17/90] clk: add hifsys reset
Hi,
From 84d37aeef94deae3ce87e677f6016a5d980429e8 Mon Sep 17 00:00:00 2001
From: "chunfeng.yun@mediatek.com" <chunfeng.yun@mediatek.com>
Date: Tue, 17 Nov 2015 17:18:39 +0800
-Subject: [PATCH 18/91] dt-bindings: Add a binding for Mediatek xHCI host
+Subject: [PATCH 18/90] dt-bindings: Add a binding for Mediatek xHCI host
controller
add a DT binding documentation of xHCI host controller for the
From 651d8fff94718c7e48b8a40d7774878eb8ed62ee Mon Sep 17 00:00:00 2001
From: "chunfeng.yun@mediatek.com" <chunfeng.yun@mediatek.com>
Date: Tue, 17 Nov 2015 17:18:40 +0800
-Subject: [PATCH 19/91] xhci: mediatek: support MTK xHCI host controller
+Subject: [PATCH 19/90] xhci: mediatek: support MTK xHCI host controller
There some vendor quirks for MTK xhci host controller:
1. It defines some extra SW scheduling parameters for HW
From 31a22fbd0d3b187be61c4c5d22b19c95abb327c3 Mon Sep 17 00:00:00 2001
From: "chunfeng.yun@mediatek.com" <chunfeng.yun@mediatek.com>
Date: Tue, 17 Nov 2015 17:18:41 +0800
-Subject: [PATCH 20/91] arm64: dts: mediatek: add xHCI & usb phy for mt8173
+Subject: [PATCH 20/90] arm64: dts: mediatek: add xHCI & usb phy for mt8173
add xHCI and phy drivers for MT8173-EVB
From 162deec293400cb132161606629654acaec7cb4b Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Tue, 5 Jan 2016 12:13:54 +0100
-Subject: [PATCH 21/91] Document: DT: Add bindings for mediatek MT7623 SoC
+Subject: [PATCH 21/90] Document: DT: Add bindings for mediatek MT7623 SoC
Platform
This adds a DT binding documentation for the MT7623 SoC from Mediatek.
From fa5d94d6b4b314f751b1c32bb5a87a80b866d05e Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Tue, 5 Jan 2016 16:52:31 +0100
-Subject: [PATCH 22/91] soc: mediatek: add compat string for mt7623 to scpsys
+Subject: [PATCH 22/90] soc: mediatek: add compat string for mt7623 to scpsys
Signed-off-by: John Crispin <blogic@openwrt.org>
---
From 5536a546755527a862cb2494814c5244d3d8e30a Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Tue, 5 Jan 2016 12:16:17 +0100
-Subject: [PATCH 23/91] ARM: dts: mediatek: add MT7623 basic support
+Subject: [PATCH 23/90] ARM: dts: mediatek: add MT7623 basic support
This adds basic chip support for Mediatek MT7623.
From 0afae16fffe2cf547fad21279c120bedf19e9b8e Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Wed, 6 Jan 2016 21:55:10 +0100
-Subject: [PATCH 24/91] dt-bindings: add MediaTek PCIe binding documentation
+Subject: [PATCH 24/90] dt-bindings: add MediaTek PCIe binding documentation
Signed-off-by: John Crispin <blogic@openwrt.org>
---
From 4e9a4574e833ee42d646de2dc3b0cb912360e6c5 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Tue, 5 Jan 2016 20:20:04 +0100
-Subject: [PATCH 25/91] PCI: mediatek: add support for PCIe found on
+Subject: [PATCH 25/90] PCI: mediatek: add support for PCIe found on
MT7623/MT2701
Add PCIe controller support on MediaTek MT2701/MT7623. The driver supports
From e56caadcf189eafcd2c7a9e22f22c0b67e89df75 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Sun, 21 Feb 2016 13:52:12 +0100
-Subject: [PATCH 26/91] scpsys: various fixes
+Subject: [PATCH 26/90] scpsys: various fixes
---
drivers/clk/mediatek/clk-mt2701.c | 2 ++
From 036862011a5d13e8c54d9d0f9fe838fea986df89 Mon Sep 17 00:00:00 2001
From: Henry Chen <henryc.chen@mediatek.com>
Date: Mon, 4 Jan 2016 20:02:52 +0800
-Subject: [PATCH 27/91] soc: mediatek: PMIC wrap: Clear the vldclr if state
+Subject: [PATCH 27/90] soc: mediatek: PMIC wrap: Clear the vldclr if state
machine stay on FSM_VLDCLR state.
Sometimes PMIC is too busy to send data in time to cause pmic wrap timeout,
From a7b6aff661303f2c67e3f8d03b152fd6a0a19ac2 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Tue, 5 Jan 2016 17:24:28 +0100
-Subject: [PATCH 28/91] ARM: mediatek: add MT7623 smp bringup code
+Subject: [PATCH 28/90] ARM: mediatek: add MT7623 smp bringup code
Add support for booting secondary CPUs on MT7623.
From 4fbf092b199a344abe60528732c712ec3b22aa67 Mon Sep 17 00:00:00 2001
From: Henry Chen <henryc.chen@mediatek.com>
Date: Thu, 21 Jan 2016 19:04:00 +0800
-Subject: [PATCH 29/91] soc: mediatek: PMIC wrap: clear the STAUPD_TRIG bit of
+Subject: [PATCH 29/90] soc: mediatek: PMIC wrap: clear the STAUPD_TRIG bit of
WDT_SRC_EN
Since STAUPD interrupts aren't handled on mt8173, disable watchdog timeout
From 4203a164bbf1785b649bc8d7a94ede53a33ad92a Mon Sep 17 00:00:00 2001
From: Louis Yu <louis.yu@mediatek.com>
Date: Thu, 7 Jan 2016 20:09:43 +0800
-Subject: [PATCH 30/91] ARM: mediatek: add mt2701 smp bringup code
+Subject: [PATCH 30/90] ARM: mediatek: add mt2701 smp bringup code
Add support for booting secondary CPUs on mt2701.
From 55308931b04c0353fd1f3367fb018af5bb643a9a Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Wed, 20 Jan 2016 13:12:19 +0100
-Subject: [PATCH 31/91] dt-bindings: ARM: Mediatek: add MT2701/7623 string to
+Subject: [PATCH 31/90] dt-bindings: ARM: Mediatek: add MT2701/7623 string to
the PMIC wrapper doc
Signed-off-by: John Crispin <blogic@openwrt.org>
From e2b8f38b1a794b7a0912d0bbaa1454055b5cbac2 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Wed, 20 Jan 2016 06:42:01 +0100
-Subject: [PATCH 32/91] soc: mediatek: PMIC wrap: don't duplicate the wrapper
+Subject: [PATCH 32/90] soc: mediatek: PMIC wrap: don't duplicate the wrapper
data
As we add support for more devices struct pmic_wrapper_type will grow and
From 4265837216132e2b1c04b23e77281c1a4feb6ca8 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Wed, 20 Jan 2016 05:27:17 +0100
-Subject: [PATCH 33/91] soc: mediatek: PMIC wrap: add wrapper callbacks for
+Subject: [PATCH 33/90] soc: mediatek: PMIC wrap: add wrapper callbacks for
init_reg_clock
Split init_reg_clock up into SoC specific callbacks. The patch also
From b164dff8be266b531574e89a27eb3ce9e0b4e40a Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Wed, 20 Jan 2016 10:12:00 +0100
-Subject: [PATCH 34/91] soc: mediatek: PMIC wrap: split SoC specific init into
+Subject: [PATCH 34/90] soc: mediatek: PMIC wrap: split SoC specific init into
callback
This patch moves the SoC specific wrapper init code into separate callback
From 7046dc2a485b2b2ec993d7c933820c8ae2b45718 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Wed, 20 Jan 2016 10:14:39 +0100
-Subject: [PATCH 35/91] soc: mediatek: PMIC wrap: WRAP_INT_EN needs a
+Subject: [PATCH 35/90] soc: mediatek: PMIC wrap: WRAP_INT_EN needs a
different bitmask for MT2701/7623
MT2701 and MT7623 use a different bitmask for PWRAP_INT_EN.
From 506b811d75ec94b10eda673f8677ef507f870077 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Wed, 20 Jan 2016 10:21:42 +0100
-Subject: [PATCH 36/91] soc: mediatek: PMIC wrap: SPI_WRITE needs a different
+Subject: [PATCH 36/90] soc: mediatek: PMIC wrap: SPI_WRITE needs a different
bitmask for MT2701/7623
Different SoCs will use different bitmask for the SPI_WRITE command. This
From df7e52743b8159b2cc58fce14841135de84ec81a Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Wed, 20 Jan 2016 10:48:35 +0100
-Subject: [PATCH 37/91] soc: mediatek: PMIC wrap: move wdt_src into the
+Subject: [PATCH 37/90] soc: mediatek: PMIC wrap: move wdt_src into the
pmic_wrapper_type struct
Different SoCs will use different bitmask for the wdt_src. This patch
From e16393b2c78cc95ec124a46e8da8cfb2af333f00 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Wed, 20 Jan 2016 10:54:18 +0100
-Subject: [PATCH 38/91] soc: mediatek: PMIC wrap: remove pwrap_is_mt8135() and
+Subject: [PATCH 38/90] soc: mediatek: PMIC wrap: remove pwrap_is_mt8135() and
pwrap_is_mt8173()
With more SoCs being added the list of helper functions like these would
From 6dc9d9e08025ebc758981ea0396a41f95f669715 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Wed, 20 Jan 2016 09:55:08 +0100
-Subject: [PATCH 39/91] soc: mediatek: PMIC wrap: add a slave specific struct
+Subject: [PATCH 39/90] soc: mediatek: PMIC wrap: add a slave specific struct
This patch adds a new struct pwrap_slv_type that we use to store the slave
specific data. The patch adds 2 new helper functions to access the dew
From 2ff8338c16c86856fc6e3f636cf0df9a2562bc95 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Wed, 20 Jan 2016 11:40:43 +0100
-Subject: [PATCH 40/91] soc: mediatek: PMIC wrap: add mt6323 slave support
+Subject: [PATCH 40/90] soc: mediatek: PMIC wrap: add mt6323 slave support
Add support for MT6323 slaves. This PMIC can be found on MT2701 and MT7623
EVB. The only function that we need to touch is pwrap_init_cipher().
From ec6ad56b62c6cd769b5a35e7009518d99bbbb7b6 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Wed, 20 Jan 2016 12:09:14 +0100
-Subject: [PATCH 41/91] soc: mediatek: PMIC wrap: add MT2701/7623 support
+Subject: [PATCH 41/90] soc: mediatek: PMIC wrap: add MT2701/7623 support
Add the registers, callbacks and data structures required to make the
wrapper work on MT2701 and MT7623.
From 51deb5b355f0a26cc5f2a5e4a83e904f5c4c34df Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Sun, 10 Jan 2016 17:12:37 +0100
-Subject: [PATCH 42/91] dt-bindings: mfd: Add bindings for the MediaTek MT6323
+Subject: [PATCH 42/90] dt-bindings: mfd: Add bindings for the MediaTek MT6323
PMIC
Signed-off-by: John Crispin <blogic@openwrt.org>
From 3989b27c0a7cc16d29de14e1cb509b8ee82f7449 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Fri, 8 Jan 2016 08:33:17 +0100
-Subject: [PATCH 43/91] mfd: mt6397: int_con and int_status may vary in
+Subject: [PATCH 43/90] mfd: mt6397: int_con and int_status may vary in
location
MT6323 has the INT_CON and INT_STATUS located at a different position.
From bd51286bc2a310bc1ba2297e97e862bbdb102183 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Fri, 8 Jan 2016 08:41:52 +0100
-Subject: [PATCH 44/91] mfd: mt6397: add support for different Slave types
+Subject: [PATCH 44/90] mfd: mt6397: add support for different Slave types
Signed-off-by: John Crispin <blogic@openwrt.org>
---
From 52dde352cc7a558eab85458c3f7ab90dc652f761 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Fri, 8 Jan 2016 04:09:43 +0100
-Subject: [PATCH 45/91] mfd: mt6397: add MT6323 support to MT6397 driver
+Subject: [PATCH 45/90] mfd: mt6397: add MT6323 support to MT6397 driver
Signed-off-by: John Crispin <blogic@openwrt.org>
---
From 8113b9e7b599162ae4abf6bc940210ce2f826099 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Sun, 10 Jan 2016 17:31:46 +0100
-Subject: [PATCH 46/91] regulator: Add document for MT6323 regulator
+Subject: [PATCH 46/90] regulator: Add document for MT6323 regulator
Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: devicetree@vger.kernel.org
From 257b7279661d1d6fca41e053bcfb4368b238f049 Mon Sep 17 00:00:00 2001
From: Chen Zhong <chen.zhong@mediatek.com>
Date: Fri, 8 Jan 2016 04:17:37 +0100
-Subject: [PATCH 47/91] regulator: mt6323: Add support for MT6323 regulator
+Subject: [PATCH 47/90] regulator: mt6323: Add support for MT6323 regulator
The MT6323 is a regulator found on boards based on MediaTek MT7623 and
probably other SoCs. It is a so called pmic and connects as a slave to
From 1e759a179923236660f7f2070fd52e9d2cc09b22 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Wed, 2 Mar 2016 07:18:52 +0100
-Subject: [PATCH 48/91] net-next: mediatek: document MediaTek SoC ethernet
+Subject: [PATCH 48/90] net-next: mediatek: document MediaTek SoC ethernet
binding
This adds the binding documentation for the MediaTek Ethernet
From 15f1cb9603c22910f1cd6a8c63fd279a6d5acfd4 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Wed, 2 Mar 2016 04:27:10 +0100
-Subject: [PATCH 49/91] net-next: mediatek: add support for MT7623 ethernet
+Subject: [PATCH 49/90] net-next: mediatek: add support for MT7623 ethernet
Add ethernet support for MediaTek SoCs from the MT7623 family. These have
dual GMAC. Depending on the exact version, there might be a built-in
From 80d88cdd398bf0c33ca5e655ded3bb62339b9565 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Wed, 2 Mar 2016 04:32:43 +0100
-Subject: [PATCH 50/91] net-next: mediatek: add Kconfig and Makefile
+Subject: [PATCH 50/90] net-next: mediatek: add Kconfig and Makefile
This patch adds the Makefile and Kconfig required to make the driver build.
From 859c0e3dfcc227b6f3fd324ef2ea5fa22cfc7f17 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Wed, 2 Mar 2016 04:34:04 +0100
-Subject: [PATCH 51/91] net-next: mediatek: add an entry to MAINTAINERS
+Subject: [PATCH 51/90] net-next: mediatek: add an entry to MAINTAINERS
Add myself and Felix as the Maintainers for the MediaTek ethernet driver.
From 3126b17c9123daf9f96f513d53f08c06f4d08a7c Mon Sep 17 00:00:00 2001
From: Boris BREZILLON <boris.brezillon@free-electrons.com>
Date: Mon, 16 Nov 2015 14:37:35 +0100
-Subject: [PATCH 52/91] mtd: nand: add an mtd_to_nand() helper
+Subject: [PATCH 52/90] mtd: nand: add an mtd_to_nand() helper
Some drivers are retrieving the nand_chip pointer using the container_of
macro on a struct wrapping both the nand_chip and the mtd_info struct while
From 5175e1d27c52c0958b2d1cb4391a611444aaf432 Mon Sep 17 00:00:00 2001
From: Boris BREZILLON <boris.brezillon@free-electrons.com>
Date: Tue, 1 Dec 2015 12:03:07 +0100
-Subject: [PATCH 53/91] mtd: nand: add nand_to_mtd() helper
+Subject: [PATCH 53/90] mtd: nand: add nand_to_mtd() helper
Add a new helper to retrieve the MTD device attached to a NAND chip.
From ad8a96526816abfa75b19998bbf41857f9bae6cc Mon Sep 17 00:00:00 2001
From: Boris BREZILLON <boris.brezillon@free-electrons.com>
Date: Thu, 10 Dec 2015 09:00:39 +0100
-Subject: [PATCH 54/91] mtd: nand: add helpers to access ->priv
+Subject: [PATCH 54/90] mtd: nand: add helpers to access ->priv
Add two helpers to access the field reserved for private controller data.
This makes it clearer what this field is reserved for and ease future
From addd0678f84712ac6f70b8e6cda84e11c5d348f4 Mon Sep 17 00:00:00 2001
From: Boris BREZILLON <boris.brezillon@free-electrons.com>
Date: Tue, 1 Dec 2015 12:03:06 +0100
-Subject: [PATCH 55/91] mtd: nand: embed an mtd_info structure into nand_chip
+Subject: [PATCH 55/90] mtd: nand: embed an mtd_info structure into nand_chip
Currently all NAND controller drivers are providing both the mtd_info and
nand_chip struct and then let the NAND subsystem to initialize a few
From 6b4858de63badb90d820a1d343528d8575f3f28c Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Tue, 22 Mar 2016 03:52:07 +0100
-Subject: [PATCH 56/91] mtd: add get/set of_node/flash_node helpers
+Subject: [PATCH 56/90] mtd: add get/set of_node/flash_node helpers
We are going to begin using the mtd->dev.of_node field for MTD device
nodes, so let's add helpers for it. Also, we'll be making some
From 47589c3a100ae3dd0081866fd60ef31a67ba7fa9 Mon Sep 17 00:00:00 2001
From: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Date: Wed, 2 Mar 2016 12:00:11 -0500
-Subject: [PATCH 57/91] mtd: mediatek: device tree docs for MTK Smart Device
+Subject: [PATCH 57/90] mtd: mediatek: device tree docs for MTK Smart Device
Gen1 NAND
This patch adds documentation support for Smart Device Gen1 type of
From a97e38f34b59d18d9ca3626c2611c63cc6c6b48a Mon Sep 17 00:00:00 2001
From: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Date: Wed, 2 Mar 2016 12:00:12 -0500
-Subject: [PATCH 58/91] mtd: mediatek: driver for MTK Smart Device Gen1 NAND
+Subject: [PATCH 58/90] mtd: mediatek: driver for MTK Smart Device Gen1 NAND
This patch adds support for mediatek's SDG1 NFC nand controller
embedded in SoC 2701.
From bb79410956e03e7c775c38338c5826f8591378a9 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Thu, 31 Mar 2016 02:28:08 +0200
-Subject: [PATCH 59/91] mtd: nand: backport fixes
+Subject: [PATCH 59/90] mtd: nand: backport fixes
---
drivers/mtd/nand/mtksdg1_nand.c | 9 ++++++++-
From e31a6402c10f50bf45fd073fbfd622f16bfca031 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Thu, 7 Apr 2016 07:18:35 +0200
-Subject: [PATCH 60/91] clk: dont disable unused clocks
+Subject: [PATCH 60/90] clk: dont disable unused clocks
Signed-off-by: John Crispin <blogic@openwrt.org>
---
From 8304c8eb6b43d29fd5794bece27faaa7b7a59a2b Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Thu, 31 Mar 2016 06:46:51 +0200
-Subject: [PATCH 61/91] clk: mediatek: enable critical clocks
+Subject: [PATCH 61/90] clk: mediatek: enable critical clocks
Signed-off-by: John Crispin <blogic@openwrt.org>
---
From c906caf00335b78ae1275eea4bfceca5273f3154 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Thu, 31 Mar 2016 02:26:37 +0200
-Subject: [PATCH 62/91] clk: mediatek: Export CPU mux clocks for CPU frequency
+Subject: [PATCH 62/90] clk: mediatek: Export CPU mux clocks for CPU frequency
control
This patch adds CPU mux clocks which are used by Mediatek cpufreq driver
From a430fa942b3ff0e51f472e53110b7f6b16290295 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Wed, 30 Mar 2016 23:48:53 +0200
-Subject: [PATCH 63/91] cpufreq: mediatek: add driver
+Subject: [PATCH 63/90] cpufreq: mediatek: add driver
Signed-off-by: John Crispin <john@phrozen.org>
---
From cf070892e774e76e1bd969020d8e7f31af1d2e3d Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Thu, 31 Mar 2016 06:07:01 +0200
-Subject: [PATCH 64/91] arm: mediatek: make a7 timer work Signed-off-by: John
+Subject: [PATCH 64/90] arm: mediatek: make a7 timer work Signed-off-by: John
Crispin <blogic@openwrt.org>
---
From 56b33ebf188a59d8307c3b748eccf8cda1062981 Mon Sep 17 00:00:00 2001
From: Dan Carpenter <dan.carpenter@oracle.com>
Date: Tue, 15 Mar 2016 10:18:49 +0300
-Subject: [PATCH 65/91] net: mediatek: checking for IS_ERR() instead of NULL
+Subject: [PATCH 65/90] net: mediatek: checking for IS_ERR() instead of NULL
of_phy_connect() returns NULL on error, it never returns error pointers.
From 223a164816ee104df9fbd01c0c52587bd8d7d758 Mon Sep 17 00:00:00 2001
From: Dan Carpenter <dan.carpenter@oracle.com>
Date: Tue, 15 Mar 2016 10:19:04 +0300
-Subject: [PATCH 66/91] net: mediatek: unlock on error in mtk_tx_map()
+Subject: [PATCH 66/90] net: mediatek: unlock on error in mtk_tx_map()
There was a missing unlock on the error path.
From d57c2d08cdceba377a35f69ceb807ae58f4bdbb2 Mon Sep 17 00:00:00 2001
From: Arnd Bergmann <arnd@arndb.de>
Date: Mon, 14 Mar 2016 15:07:10 +0100
-Subject: [PATCH 67/91] net: mediatek: use dma_addr_t correctly
+Subject: [PATCH 67/90] net: mediatek: use dma_addr_t correctly
dma_alloc_coherent() expects a dma_addr_t pointer as its argument,
not an 'unsigned int', and gcc correctly warns about broken
From 6cf7d8453b9ef0a1e51144969141a92dade6b540 Mon Sep 17 00:00:00 2001
From: Arnd Bergmann <arnd@arndb.de>
Date: Mon, 14 Mar 2016 15:07:11 +0100
-Subject: [PATCH 68/91] net: mediatek: remove incorrect dma_mask assignment
+Subject: [PATCH 68/90] net: mediatek: remove incorrect dma_mask assignment
Device drivers should not mess with the DMA mask directly,
but instead call dma_set_mask() etc if needed.
From 592d94e0e580341fdcce975a97bebb90e71b38fc Mon Sep 17 00:00:00 2001
From: Arnd Bergmann <arnd@arndb.de>
Date: Mon, 14 Mar 2016 15:07:12 +0100
-Subject: [PATCH 69/91] net: mediatek: check device_reset return code
+Subject: [PATCH 69/90] net: mediatek: check device_reset return code
The device_reset() function may fail, so we have to check
its return value, e.g. to make deferred probing work correctly.
From d59c125296df424b8e7c5c4900e1b8084b6dd3ba Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Wed, 30 Mar 2016 03:18:17 +0200
-Subject: [PATCH 70/91] net: mediatek: watchdog_timeo was not set
+Subject: [PATCH 70/90] net: mediatek: watchdog_timeo was not set
The original commit failed to set watchdog_timeo. This patch sets
watchdog_timeo to HZ.
From b6f1b24448de1d294f9668b14bf02391ff6bef5c Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Tue, 22 Mar 2016 04:42:27 +0100
-Subject: [PATCH 71/91] net: mediatek: mtk_cal_txd_req() returns bad value
+Subject: [PATCH 71/90] net: mediatek: mtk_cal_txd_req() returns bad value
The code used to also support the PDMA engine, which had 2 packet pointers
per descriptor. Because of this we have to divide the result by 2 and round
From dd061dc7eacb22853981978fa94205292444fa49 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Fri, 25 Mar 2016 04:24:27 +0100
-Subject: [PATCH 72/91] net: mediatek: remove superflous reset call
+Subject: [PATCH 72/90] net: mediatek: remove superflous reset call
HW reset is triggered int he mtk_hw_init() function. There is no need to
reset the core during probe.
From 283001c04f395f32e55345632d8129f5395cde33 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Tue, 29 Mar 2016 16:41:07 +0200
-Subject: [PATCH 73/91] net: mediatek: fix stop and wakeup of queue
+Subject: [PATCH 73/90] net: mediatek: fix stop and wakeup of queue
The driver supports 2 MACs. Both run on the same DMA ring. If we go
above/below the TX rings thershold value, we always need to wake/stop
From 46e02ea6c0468ce01b6e370a20f01a7f7311af34 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Tue, 29 Mar 2016 17:00:47 +0200
-Subject: [PATCH 74/91] net: mediatek: fix mtk_pending_work
+Subject: [PATCH 74/90] net: mediatek: fix mtk_pending_work
The driver supports 2 MACs. Both run on the same DMA ring. If we hit a TX
timeout we need to stop both netdevs before retarting them again. If we
From 25e46afc7324196c89dfb6f83a9c518942e23b33 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Tue, 29 Mar 2016 17:20:01 +0200
-Subject: [PATCH 75/91] net: mediatek: fix TX locking
+Subject: [PATCH 75/90] net: mediatek: fix TX locking
Inside the TX path there is a lock inside the tx_map function. This is
however too late. The patch moves the lock to the start of the xmit
From 8830adaea03aafc1e35f739e436dc36af7c54428 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Tue, 29 Mar 2016 17:24:24 +0200
-Subject: [PATCH 76/91] net: mediatek: move the pending_work struct to the
+Subject: [PATCH 76/90] net: mediatek: move the pending_work struct to the
device generic struct
The worker always touches both netdevs. It is ethernet core and not MAC
From 6a6f264e82649f8d9933271f2e9b08af94daad50 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Thu, 7 Apr 2016 17:36:23 +0200
-Subject: [PATCH 77/91] net: mediatek: do not set the QID field in the TX DMA
+Subject: [PATCH 77/90] net: mediatek: do not set the QID field in the TX DMA
descriptors
The QID field gets set to the mac id. This made the DMA linked list queue
From 9dd4e96d415d1e1910ec42058729380cddb22f9d Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Tue, 29 Mar 2016 14:32:07 +0200
-Subject: [PATCH 78/91] net: mediatek: update the IRQ part of the binding
+Subject: [PATCH 78/90] net: mediatek: update the IRQ part of the binding
document
The current binding document only describes a single interrupt. Update the
+++ /dev/null
-From f84a8ad5cc385fe414758fa4d423e26197a79c28 Mon Sep 17 00:00:00 2001
-From: John Crispin <blogic@openwrt.org>
-Date: Sat, 23 Apr 2016 11:57:21 +0200
-Subject: [PATCH 79/91] net-next: fix BQL support
-
-Signed-off-by: John Crispin <blogic@openwrt.org>
----
- drivers/net/ethernet/mediatek/mtk_eth_soc.c | 33 +++++++++++++++------------
- 1 file changed, 19 insertions(+), 14 deletions(-)
-
-diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-index bab5d45..ded09bc 100644
---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -625,7 +625,15 @@ static int mtk_tx_map(struct sk_buff *skb, struct net_device *dev,
- WRITE_ONCE(itxd->txd3, (TX_DMA_SWC | TX_DMA_PLEN0(skb_headlen(skb)) |
- (!nr_frags * TX_DMA_LS0)));
-
-- netdev_sent_queue(dev, skb->len);
-+ /* we have a single DMA ring so BQL needs to be updated for all devices
-+ * sitting on this ring
-+ */
-+ for (i = 0; i < MTK_MAC_COUNT; i++) {
-+ if (!eth->netdev[i])
-+ continue;
-+ netdev_sent_queue(dev, skb->len);
-+ }
-+
- skb_tx_timestamp(skb);
-
- ring->next_free = mtk_qdma_phys_to_virt(ring, txd->txd2);
-@@ -853,21 +861,18 @@ static int mtk_poll_tx(struct mtk_eth *eth, int budget, bool *tx_again)
- struct mtk_tx_dma *desc;
- struct sk_buff *skb;
- struct mtk_tx_buf *tx_buf;
-- int total = 0, done[MTK_MAX_DEVS];
-- unsigned int bytes[MTK_MAX_DEVS];
-+ int total = 0, done = 0;
-+ unsigned int bytes = 0;
- u32 cpu, dma;
- static int condition;
- int i;
-
-- memset(done, 0, sizeof(done));
-- memset(bytes, 0, sizeof(bytes));
--
- cpu = mtk_r32(eth, MTK_QTX_CRX_PTR);
- dma = mtk_r32(eth, MTK_QTX_DRX_PTR);
-
- desc = mtk_qdma_phys_to_virt(ring, cpu);
-
-- while ((cpu != dma) && budget) {
-+ while ((cpu != dma) && done < budget) {
- u32 next_cpu = desc->txd2;
- int mac;
-
-@@ -887,9 +892,8 @@ static int mtk_poll_tx(struct mtk_eth *eth, int budget, bool *tx_again)
- }
-
- if (skb != (struct sk_buff *)MTK_DMA_DUMMY_DESC) {
-- bytes[mac] += skb->len;
-- done[mac]++;
-- budget--;
-+ bytes += skb->len;
-+ done++;
- }
- mtk_tx_unmap(eth->dev, tx_buf);
-
-@@ -902,13 +906,14 @@ static int mtk_poll_tx(struct mtk_eth *eth, int budget, bool *tx_again)
-
- mtk_w32(eth, cpu, MTK_QTX_CRX_PTR);
-
-+ /* we have a single DMA ring so BQL needs to be updated for all devices
-+ * sitting on this ring
-+ */
- for (i = 0; i < MTK_MAC_COUNT; i++) {
-- if (!eth->netdev[i] || !done[i])
-+ if (!eth->netdev[i])
- continue;
-- netdev_completed_queue(eth->netdev[i], done[i], bytes[i]);
-- total += done[i];
-+ netdev_completed_queue(eth->netdev[i], done, bytes);
- }
--
- /* read hw index again make sure no new tx packet */
- if (cpu != dma || cpu != mtk_r32(eth, MTK_QTX_DRX_PTR))
- *tx_again = true;
---
-1.7.10.4
-
--- /dev/null
+From d449af97701c1da5b373df5a7675b93b9a2067bf Mon Sep 17 00:00:00 2001
+From: John Crispin <blogic@openwrt.org>
+Date: Sat, 23 Apr 2016 11:57:21 +0200
+Subject: [PATCH 79/90] net-next: mediatek: fix BQL support
+
+Signed-off-by: John Crispin <blogic@openwrt.org>
+---
+ drivers/net/ethernet/mediatek/mtk_eth_soc.c | 33 ++++++++++++++++-----------
+ 1 file changed, 20 insertions(+), 13 deletions(-)
+
+diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+index bab5d45..9928a79 100644
+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+@@ -625,7 +625,16 @@ static int mtk_tx_map(struct sk_buff *skb, struct net_device *dev,
+ WRITE_ONCE(itxd->txd3, (TX_DMA_SWC | TX_DMA_PLEN0(skb_headlen(skb)) |
+ (!nr_frags * TX_DMA_LS0)));
+
+- netdev_sent_queue(dev, skb->len);
++ /* we have a single DMA ring so BQL needs to be updated for all devices
++ * sitting on this ring
++ */
++ for (i = 0; i < MTK_MAC_COUNT; i++) {
++ if (!eth->netdev[i])
++ continue;
++
++ netdev_sent_queue(eth->netdev[i], skb->len);
++ }
++
+ skb_tx_timestamp(skb);
+
+ ring->next_free = mtk_qdma_phys_to_virt(ring, txd->txd2);
+@@ -853,21 +862,18 @@ static int mtk_poll_tx(struct mtk_eth *eth, int budget, bool *tx_again)
+ struct mtk_tx_dma *desc;
+ struct sk_buff *skb;
+ struct mtk_tx_buf *tx_buf;
+- int total = 0, done[MTK_MAX_DEVS];
+- unsigned int bytes[MTK_MAX_DEVS];
++ int total = 0, done = 0;
++ unsigned int bytes = 0;
+ u32 cpu, dma;
+ static int condition;
+ int i;
+
+- memset(done, 0, sizeof(done));
+- memset(bytes, 0, sizeof(bytes));
+-
+ cpu = mtk_r32(eth, MTK_QTX_CRX_PTR);
+ dma = mtk_r32(eth, MTK_QTX_DRX_PTR);
+
+ desc = mtk_qdma_phys_to_virt(ring, cpu);
+
+- while ((cpu != dma) && budget) {
++ while ((cpu != dma) && done < budget) {
+ u32 next_cpu = desc->txd2;
+ int mac;
+
+@@ -887,9 +893,8 @@ static int mtk_poll_tx(struct mtk_eth *eth, int budget, bool *tx_again)
+ }
+
+ if (skb != (struct sk_buff *)MTK_DMA_DUMMY_DESC) {
+- bytes[mac] += skb->len;
+- done[mac]++;
+- budget--;
++ bytes += skb->len;
++ done++;
+ }
+ mtk_tx_unmap(eth->dev, tx_buf);
+
+@@ -902,11 +907,13 @@ static int mtk_poll_tx(struct mtk_eth *eth, int budget, bool *tx_again)
+
+ mtk_w32(eth, cpu, MTK_QTX_CRX_PTR);
+
++ /* we have a single DMA ring so BQL needs to be updated for all devices
++ * sitting on this ring
++ */
+ for (i = 0; i < MTK_MAC_COUNT; i++) {
+- if (!eth->netdev[i] || !done[i])
++ if (!eth->netdev[i])
+ continue;
+- netdev_completed_queue(eth->netdev[i], done[i], bytes[i]);
+- total += done[i];
++ netdev_completed_queue(eth->netdev[i], done, bytes);
+ }
+
+ /* read hw index again make sure no new tx packet */
+--
+1.7.10.4
+
-From 46bfe9068a6e1594affeab30c206d2bd05c1e8f3 Mon Sep 17 00:00:00 2001
+From 121287dee1454be0ebc0e5b8c7b5b85e16570551 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Fri, 22 Apr 2016 11:05:23 +0200
-Subject: [PATCH 80/91] net-next: mediatek: fix gigabit and flow control
+Subject: [PATCH 80/90] net-next: mediatek: fix gigabit and flow control
advertisement
The current code will not setup the PHYs advertisement features correctly.
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-index ded09bc..959d2cb 100644
+index 9928a79..204d927 100644
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -133,6 +133,8 @@ static int mtk_mdio_read(struct mii_bus *bus, int phy_addr, int phy_reg)
-From 3950bdb0a4e6fe45611e75fa4c92f3114e6729fd Mon Sep 17 00:00:00 2001
+From dbf02af61ecac8b8a2d651128379e54244f0c68a Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Fri, 22 Apr 2016 11:06:03 +0200
-Subject: [PATCH 81/91] net-next: mediatek: add fixed-phy support
+Subject: [PATCH 81/90] net-next: mediatek: add fixed-phy support
The MT7623 SoC has a builtin gigabit switch. If we want to use it, GMAC1
needs to be configured using a fixed link speed and flow control settings.
1 file changed, 3 insertions(+)
diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-index 959d2cb..92c7886 100644
+index 204d927..f4d8519 100644
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -219,6 +219,9 @@ static int mtk_phy_connect(struct mtk_mac *mac)
-From a4271fcf69eae0b10353600f75618ed760fad05b Mon Sep 17 00:00:00 2001
+From 3f7e90b7acf147dbbe6bb140c510fc1eb97279ef Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Fri, 22 Apr 2016 11:08:43 +0200
-Subject: [PATCH 82/91] net-next: mediatek: add RX delay support
+Subject: [PATCH 82/90] net-next: mediatek: add RX delay support
If an external Gigabit PHY is connected to either of the MACs we need to
tell the to use a RX delay. Not doing so will result in heavy packet loss
1 file changed, 1 insertion(+)
diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-index 92c7886..674e8e3 100644
+index f4d8519..aa25788 100644
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -226,6 +226,7 @@ static int mtk_phy_connect(struct mtk_mac *mac)
-From 2206de729d8a873898b983f5ff7633a2489aa71c Mon Sep 17 00:00:00 2001
+From 436659829b38d5babc2d590676f5b74bfc17568a Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Sat, 23 Apr 2016 09:06:05 +0200
-Subject: [PATCH 83/91] net-next: mediatek: add missing return code check
+Subject: [PATCH 83/90] net-next: mediatek: add missing return code check
The code fails to check if the scratch memory was properly allocated. Add
this check and return with an error if the allocation failed.
1 file changed, 3 insertions(+)
diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-index 674e8e3..37e9260 100644
+index aa25788..e58a634 100644
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -483,6 +483,9 @@ static int mtk_init_fq_dma(struct mtk_eth *eth)
-From 5207debf8825a8b6f2934b7d39ef76c163dfd794 Mon Sep 17 00:00:00 2001
+From 77c5d1b00214c9e42b9bd5f0f7fc0ec14807d117 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Sat, 23 Apr 2016 09:18:28 +0200
-Subject: [PATCH 84/91] net-next: mediatek: fix missing free of scratch memory
+Subject: [PATCH 84/90] net-next: mediatek: fix missing free of scratch memory
Scratch memory gets allocated in mtk_init_fq_dma() but the corresponding
code to free it is missing inside mtk_dma_free() causing a memory leak.
2 files changed, 15 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-index 37e9260..6896d17 100644
+index e58a634..06b9094 100644
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -469,14 +469,14 @@ static inline void mtk_rx_get_desc(struct mtk_rx_dma *rxd,
mtk_w32(eth, phy_ring_tail, MTK_QDMA_FQ_TAIL);
mtk_w32(eth, (cnt << 16) | cnt, MTK_QDMA_FQ_CNT);
mtk_w32(eth, MTK_QDMA_PAGE_SIZE << 16, MTK_QDMA_FQ_BLEN);
-@@ -1203,6 +1203,14 @@ static void mtk_dma_free(struct mtk_eth *eth)
+@@ -1205,6 +1205,14 @@ static void mtk_dma_free(struct mtk_eth *eth)
for (i = 0; i < MTK_MAC_COUNT; i++)
if (eth->netdev[i])
netdev_reset_queue(eth->netdev[i]);
-From e58c3912f08f71d9c3e2b09548c96dca8f6ea9d8 Mon Sep 17 00:00:00 2001
+From 7f0fb178cd514ea88aea611b0c92829be50bc8f6 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Sat, 23 Apr 2016 09:25:00 +0200
-Subject: [PATCH 85/91] net-next: mediatek: invalid buffer lookup in
+Subject: [PATCH 85/90] net-next: mediatek: invalid buffer lookup in
mtk_tx_map()
The lookup of the tx_buffer in the error path inside mtk_tx_map() uses the
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-index 6896d17..2a4bbbb 100644
+index 06b9094..63e1da4 100644
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -670,7 +670,7 @@ static int mtk_tx_map(struct sk_buff *skb, struct net_device *dev,
+@@ -671,7 +671,7 @@ static int mtk_tx_map(struct sk_buff *skb, struct net_device *dev,
err_dma:
do {
-From 78579ebd671ebdffdaa4691a0e91acd36f691575 Mon Sep 17 00:00:00 2001
+From 84376b626114ba6f33f86602379790743d4c4f85 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Sat, 23 Apr 2016 09:28:25 +0200
-Subject: [PATCH 86/91] net-next: mediatek: dropped rx packets are not being
+Subject: [PATCH 86/90] net-next: mediatek: dropped rx packets are not being
counted properly
There are 2 places inside mtk_poll_rx where rx_dropped is not being
1 file changed, 2 insertions(+)
diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-index 2a4bbbb..679cefd 100644
+index 63e1da4..24a4179 100644
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -825,6 +825,7 @@ static int mtk_poll_rx(struct napi_struct *napi, int budget,
+@@ -826,6 +826,7 @@ static int mtk_poll_rx(struct napi_struct *napi, int budget,
DMA_FROM_DEVICE);
if (unlikely(dma_mapping_error(&netdev->dev, dma_addr))) {
skb_free_frag(new_data);
goto release_desc;
}
-@@ -832,6 +833,7 @@ static int mtk_poll_rx(struct napi_struct *napi, int budget,
+@@ -833,6 +834,7 @@ static int mtk_poll_rx(struct napi_struct *napi, int budget,
skb = build_skb(data, ring->frag_size);
if (unlikely(!skb)) {
put_page(virt_to_head_page(new_data));
-From 8aa53beda6ad6c8154e4f7b8a7ca9815412fa95a Mon Sep 17 00:00:00 2001
+From f74d752da12c1b63bf2bbfa220aab5e2dd644157 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Wed, 20 Apr 2016 16:18:07 +0200
-Subject: [PATCH 87/91] net-next: mediatek: add IRQ locking
+Subject: [PATCH 87/90] net-next: mediatek: add IRQ locking
The code that enables and disables IRQs is missing proper locking. After
adding the IRQ separation patch and routing the putting the RX and TX IRQs
2 files changed, 8 insertions(+)
diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-index 679cefd..f821820 100644
+index 24a4179..f86d551 100644
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -316,22 +316,28 @@ static void mtk_mdio_cleanup(struct mtk_eth *eth)
}
static int mtk_set_mac_address(struct net_device *dev, void *p)
-@@ -1750,6 +1756,7 @@ static int mtk_probe(struct platform_device *pdev)
+@@ -1752,6 +1758,7 @@ static int mtk_probe(struct platform_device *pdev)
return -EADDRNOTAVAIL;
spin_lock_init(ð->page_lock);
-From f43e3aaaacaaf0482f0aaa6fbad03572f3a0c614 Mon Sep 17 00:00:00 2001
+From 781eb70655d4f25af51aafcc010851918d49b2d7 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Wed, 23 Mar 2016 18:31:48 +0100
-Subject: [PATCH 88/91] net-next: mediatek: add support for IRQ grouping
+Subject: [PATCH 88/90] net-next: mediatek: add support for IRQ grouping
The ethernet core has 3 IRQs. using the IRQ grouping registers we are able
to separate TX and RX IRQs, which allows us to service them on separate
Signed-off-by: John Crispin <blogic@openwrt.org>
---
- drivers/net/ethernet/mediatek/mtk_eth_soc.c | 165 ++++++++++++++++++---------
+ drivers/net/ethernet/mediatek/mtk_eth_soc.c | 164 ++++++++++++++++++---------
drivers/net/ethernet/mediatek/mtk_eth_soc.h | 16 ++-
- 2 files changed, 125 insertions(+), 56 deletions(-)
+ 2 files changed, 124 insertions(+), 56 deletions(-)
diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-index f821820..b5e364c 100644
+index f86d551..6557026 100644
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -789,7 +789,7 @@ drop:
+@@ -790,7 +790,7 @@ drop:
}
static int mtk_poll_rx(struct napi_struct *napi, int budget,
{
struct mtk_rx_ring *ring = ð->rx_ring;
int idx = ring->calc_idx;
-@@ -877,19 +877,18 @@ release_desc:
+@@ -878,19 +878,18 @@ release_desc:
}
if (done < budget)
u32 cpu, dma;
static int condition;
int i;
-@@ -941,64 +940,82 @@ static int mtk_poll_tx(struct mtk_eth *eth, int budget, bool *tx_again)
- continue;
- netdev_completed_queue(eth->netdev[i], done, bytes);
+@@ -944,63 +943,80 @@ static int mtk_poll_tx(struct mtk_eth *eth, int budget, bool *tx_again)
}
-+
+
/* read hw index again make sure no new tx packet */
- if (cpu != dma || cpu != mtk_r32(eth, MTK_QTX_DRX_PTR))
- *tx_again = true;
mtk_w32(eth, status_intr, MTK_INT_STATUS2);
}
+}
-+
+
+static int mtk_napi_tx(struct napi_struct *napi, int budget)
+{
+ struct mtk_eth *eth = container_of(napi, struct mtk_eth, tx_napi);
+
+ status = mtk_r32(eth, MTK_QMTK_INT_STATUS);
+ tx_done = mtk_poll_tx(eth, budget);
-+ if (unlikely(netif_msg_intr(eth))) {
-+ mask = mtk_r32(eth, MTK_QDMA_INT_MASK);
+ if (unlikely(netif_msg_intr(eth))) {
+ mask = mtk_r32(eth, MTK_QDMA_INT_MASK);
+- netdev_info(eth->netdev[0],
+- "done tx %d, rx %d, intr 0x%08x/0x%x\n",
+- tx_done, rx_done, status, mask);
+ dev_info(eth->dev,
+ "done tx %d, intr 0x%08x/0x%x\n",
+ tx_done, status, mask);
-+ }
-+
+ }
+
+- if (tx_again || rx_done == budget)
+ if (tx_done == budget)
-+ return budget;
-+
-+ status = mtk_r32(eth, MTK_QMTK_INT_STATUS);
+ return budget;
+
+ status = mtk_r32(eth, MTK_QMTK_INT_STATUS);
+- if (status & (tx_intr | rx_intr))
+ if (status & MTK_TX_DONE_INT)
-+ return budget;
-+
-+ napi_complete(napi);
+ return budget;
+
+ napi_complete(napi);
+- mtk_irq_enable(eth, tx_intr | rx_intr);
+ mtk_irq_enable(eth, MTK_TX_DONE_INT);
+
+ return tx_done;
+ struct mtk_eth *eth = container_of(napi, struct mtk_eth, rx_napi);
+ u32 status, mask;
+ int rx_done = 0;
-
++
+ status = mtk_r32(eth, MTK_QMTK_INT_STATUS);
+ rx_done = mtk_poll_rx(napi, budget, eth);
- if (unlikely(netif_msg_intr(eth))) {
- mask = mtk_r32(eth, MTK_QDMA_INT_MASK);
-- netdev_info(eth->netdev[0],
-- "done tx %d, rx %d, intr 0x%08x/0x%x\n",
-- tx_done, rx_done, status, mask);
++ if (unlikely(netif_msg_intr(eth))) {
++ mask = mtk_r32(eth, MTK_QDMA_INT_MASK);
+ dev_info(eth->dev,
+ "done rx %d, intr 0x%08x/0x%x\n",
+ rx_done, status, mask);
- }
-
-- if (tx_again || rx_done == budget)
++ }
++
+ if (rx_done == budget)
- return budget;
-
- status = mtk_r32(eth, MTK_QMTK_INT_STATUS);
-- if (status & (tx_intr | rx_intr))
++ return budget;
++
++ status = mtk_r32(eth, MTK_QMTK_INT_STATUS);
+ if (status & MTK_RX_DONE_INT)
- return budget;
-
- napi_complete(napi);
-- mtk_irq_enable(eth, tx_intr | rx_intr);
++ return budget;
++
++ napi_complete(napi);
+ mtk_irq_enable(eth, MTK_RX_DONE_INT);
return rx_done;
}
-@@ -1235,22 +1252,44 @@ static void mtk_tx_timeout(struct net_device *dev)
+@@ -1237,22 +1253,44 @@ static void mtk_tx_timeout(struct net_device *dev)
schedule_work(ð->pending_work);
}
- } else {
- mtk_w32(eth, status, MTK_QMTK_INT_STATUS);
+ mtk_irq_disable(eth, MTK_RX_DONE_INT);
- }
-- mtk_irq_disable(eth, (MTK_RX_DONE_INT | MTK_TX_DONE_INT));
++ }
+ mtk_w32(eth, status, MTK_QMTK_INT_STATUS);
+
+ return IRQ_HANDLED;
+ if (likely(napi_schedule_prep(ð->tx_napi)))
+ __napi_schedule(ð->tx_napi);
+ mtk_irq_disable(eth, MTK_TX_DONE_INT);
-+ }
+ }
+- mtk_irq_disable(eth, (MTK_RX_DONE_INT | MTK_TX_DONE_INT));
+ mtk_w32(eth, status, MTK_QMTK_INT_STATUS);
return IRQ_HANDLED;
}
-@@ -1263,7 +1302,7 @@ static void mtk_poll_controller(struct net_device *dev)
+@@ -1265,7 +1303,7 @@ static void mtk_poll_controller(struct net_device *dev)
u32 int_mask = MTK_TX_DONE_INT | MTK_RX_DONE_INT;
mtk_irq_disable(eth, int_mask);
mtk_irq_enable(eth, int_mask);
}
#endif
-@@ -1299,6 +1338,7 @@ static int mtk_open(struct net_device *dev)
+@@ -1301,6 +1339,7 @@ static int mtk_open(struct net_device *dev)
if (err)
return err;
napi_enable(ð->rx_napi);
mtk_irq_enable(eth, MTK_TX_DONE_INT | MTK_RX_DONE_INT);
}
-@@ -1347,6 +1387,7 @@ static int mtk_stop(struct net_device *dev)
+@@ -1349,6 +1388,7 @@ static int mtk_stop(struct net_device *dev)
return 0;
mtk_irq_disable(eth, MTK_TX_DONE_INT | MTK_RX_DONE_INT);
napi_disable(ð->rx_napi);
mtk_stop_dma(eth, MTK_QDMA_GLO_CFG);
-@@ -1384,7 +1425,11 @@ static int __init mtk_hw_init(struct mtk_eth *eth)
+@@ -1386,7 +1426,11 @@ static int __init mtk_hw_init(struct mtk_eth *eth)
/* Enable RX VLan Offloading */
mtk_w32(eth, 1, MTK_CDMP_EG_CTRL);
dev_name(eth->dev), eth);
if (err)
return err;
-@@ -1400,7 +1445,11 @@ static int __init mtk_hw_init(struct mtk_eth *eth)
+@@ -1402,7 +1446,11 @@ static int __init mtk_hw_init(struct mtk_eth *eth)
mtk_w32(eth, 0, MTK_RST_GL);
/* FE int grouping */
for (i = 0; i < 2; i++) {
u32 val = mtk_r32(eth, MTK_GDMA_FWD_CFG(i));
-@@ -1448,7 +1497,9 @@ static void mtk_uninit(struct net_device *dev)
+@@ -1450,7 +1498,9 @@ static void mtk_uninit(struct net_device *dev)
phy_disconnect(mac->phy_dev);
mtk_mdio_cleanup(eth);
mtk_irq_disable(eth, ~0);
}
static int mtk_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
-@@ -1723,10 +1774,10 @@ static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np)
+@@ -1725,10 +1775,10 @@ static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np)
dev_err(eth->dev, "error bringing up device\n");
goto free_netdev;
}
return 0;
-@@ -1743,6 +1794,7 @@ static int mtk_probe(struct platform_device *pdev)
+@@ -1745,6 +1795,7 @@ static int mtk_probe(struct platform_device *pdev)
struct mtk_soc_data *soc;
struct mtk_eth *eth;
int err;
match = of_match_device(of_mtk_match, &pdev->dev);
soc = (struct mtk_soc_data *)match->data;
-@@ -1778,10 +1830,12 @@ static int mtk_probe(struct platform_device *pdev)
+@@ -1780,10 +1831,12 @@ static int mtk_probe(struct platform_device *pdev)
return PTR_ERR(eth->rstc);
}
}
eth->clk_ethif = devm_clk_get(&pdev->dev, "ethif");
-@@ -1822,7 +1876,9 @@ static int mtk_probe(struct platform_device *pdev)
+@@ -1824,7 +1877,9 @@ static int mtk_probe(struct platform_device *pdev)
* for NAPI to work
*/
init_dummy_netdev(ð->dummy_dev);
MTK_NAPI_WEIGHT);
platform_set_drvdata(pdev, eth);
-@@ -1843,6 +1899,7 @@ static int mtk_remove(struct platform_device *pdev)
+@@ -1845,6 +1900,7 @@ static int mtk_remove(struct platform_device *pdev)
clk_disable_unprepare(eth->clk_gp1);
clk_disable_unprepare(eth->clk_gp2);
-From 4c23129f65d9bac10d9cf88c45fced58597400e6 Mon Sep 17 00:00:00 2001
+From bb14507c0624e088da231b6b20fd6add032e9226 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Mon, 11 Apr 2016 03:11:54 +0200
-Subject: [PATCH 89/91] net: mediatek add gsw/mt7530 driver
+Subject: [PATCH 89/90] net: mediatek add gsw/mt7530 driver
Signed-off-by: John Crispin <blogic@openwrt.org>
---
drivers/net/ethernet/mediatek/Makefile | 2 +-
drivers/net/ethernet/mediatek/gsw_mt7620.h | 251 +++++++
- drivers/net/ethernet/mediatek/gsw_mt7623.c | 1081 +++++++++++++++++++++++++++
+ drivers/net/ethernet/mediatek/gsw_mt7623.c | 1084 +++++++++++++++++++++++++++
drivers/net/ethernet/mediatek/mt7530.c | 808 ++++++++++++++++++++
drivers/net/ethernet/mediatek/mt7530.h | 20 +
drivers/net/ethernet/mediatek/mtk_eth_soc.c | 59 +-
drivers/net/ethernet/mediatek/mtk_eth_soc.h | 4 +
- 7 files changed, 2195 insertions(+), 30 deletions(-)
+ 7 files changed, 2198 insertions(+), 30 deletions(-)
create mode 100644 drivers/net/ethernet/mediatek/gsw_mt7620.h
create mode 100644 drivers/net/ethernet/mediatek/gsw_mt7623.c
create mode 100644 drivers/net/ethernet/mediatek/mt7530.c
+#endif
diff --git a/drivers/net/ethernet/mediatek/gsw_mt7623.c b/drivers/net/ethernet/mediatek/gsw_mt7623.c
new file mode 100644
-index 0000000..28df15a
+index 0000000..0c6b8a6
--- /dev/null
+++ b/drivers/net/ethernet/mediatek/gsw_mt7623.c
-@@ -0,0 +1,1081 @@
+@@ -0,0 +1,1084 @@
+/* This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License
+ if (ret)
+ return ret;
+
++ regmap_write(gsw->ethsys, 0x34, 0x800000);
++ regmap_write(gsw->ethsys, 0x34, 0x0);
++
+ clk_prepare_enable(gsw->clk_trgpll);
+
+ gpio_direction_output(reset_pin, 0);
+
+#endif
diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-index b5e364c..eee4324a 100644
+index 6557026..bb62b91 100644
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -24,6 +24,9 @@
}
dev_err(eth->dev, "mdio: MDIO timeout\n");
-@@ -1407,15 +1410,6 @@ static int __init mtk_hw_init(struct mtk_eth *eth)
+@@ -1408,15 +1411,6 @@ static int __init mtk_hw_init(struct mtk_eth *eth)
reset_control_deassert(eth->rstc);
usleep_range(10, 20);
/* GE1, Force 1000M/FD, FC ON */
mtk_w32(eth, MAC_MCR_FIXED_LINK, MTK_MAC_MCR(0));
-@@ -1438,6 +1432,8 @@ static int __init mtk_hw_init(struct mtk_eth *eth)
+@@ -1439,6 +1433,8 @@ static int __init mtk_hw_init(struct mtk_eth *eth)
if (err)
return err;
/* disable delay and normal interrupt */
mtk_w32(eth, 0, MTK_QDMA_DELAY_INT);
mtk_irq_disable(eth, MTK_TX_DONE_INT | MTK_RX_DONE_INT);
-@@ -1465,6 +1461,8 @@ static int __init mtk_hw_init(struct mtk_eth *eth)
+@@ -1466,6 +1462,8 @@ static int __init mtk_hw_init(struct mtk_eth *eth)
mtk_w32(eth, val, MTK_GDMA_FWD_CFG(i));
}
return 0;
}
-@@ -1720,7 +1718,7 @@ static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np)
+@@ -1721,7 +1719,7 @@ static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np)
{
struct mtk_mac *mac;
const __be32 *_id = of_get_property(np, "reg", NULL);
if (!_id) {
dev_err(eth->dev, "missing mac id\n");
-@@ -1754,8 +1752,8 @@ static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np)
+@@ -1755,8 +1753,8 @@ static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np)
GFP_KERNEL);
if (!mac->hw_stats) {
dev_err(eth->dev, "failed to allocate counter memory\n");
}
spin_lock_init(&mac->hw_stats->stats_lock);
mac->hw_stats->reg_offset = id * MTK_STAT_OFFSET;
-@@ -1769,21 +1767,9 @@ static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np)
+@@ -1770,21 +1768,9 @@ static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np)
eth->netdev[id]->features |= MTK_HW_FEATURES;
eth->netdev[id]->ethtool_ops = &mtk_ethtool_ops;
}
static int mtk_probe(struct platform_device *pdev)
-@@ -1851,14 +1837,13 @@ static int mtk_probe(struct platform_device *pdev)
+@@ -1852,14 +1838,13 @@ static int mtk_probe(struct platform_device *pdev)
clk_prepare_enable(eth->clk_gp1);
clk_prepare_enable(eth->clk_gp2);
for_each_child_of_node(pdev->dev.of_node, mac_np) {
if (!of_device_is_compatible(mac_np,
"mediatek,eth-mac"))
-@@ -1872,6 +1857,22 @@ static int mtk_probe(struct platform_device *pdev)
+@@ -1873,6 +1858,22 @@ static int mtk_probe(struct platform_device *pdev)
goto err_free_dev;
}
-From 65f0d87a26f7cec860b89b40eebc48a4eb71acf8 Mon Sep 17 00:00:00 2001
+From 9ad385f5a3d79d40938bfc265dc69821f6ecb5b8 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Mon, 11 Apr 2016 06:00:23 +0200
-Subject: [PATCH 90/91] net: mediatek: v4.4 backports
+Subject: [PATCH 90/90] net: mediatek: v4.4 backports
---
drivers/net/ethernet/mediatek/mtk_eth_soc.c | 23 ++++++++++++++---------
1 file changed, 14 insertions(+), 9 deletions(-)
diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-index eee4324a..b466f45 100644
+index bb62b91..5d33053 100644
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -207,7 +207,7 @@ static int mtk_phy_connect_node(struct mtk_eth *eth, struct mtk_mac *mac,
phydev->drv->name);
mac->phy_dev = phydev;
-@@ -1267,9 +1267,10 @@ static irqreturn_t mtk_handle_irq_rx(int irq, void *_eth)
+@@ -1268,9 +1268,10 @@ static irqreturn_t mtk_handle_irq_rx(int irq, void *_eth)
return IRQ_NONE;
if (status & MTK_RX_DONE_INT) {
}
mtk_w32(eth, status, MTK_QMTK_INT_STATUS);
-@@ -1288,9 +1289,10 @@ static irqreturn_t mtk_handle_irq_tx(int irq, void *_eth)
+@@ -1289,9 +1290,10 @@ static irqreturn_t mtk_handle_irq_tx(int irq, void *_eth)
return IRQ_NONE;
if (status & MTK_TX_DONE_INT) {
}
mtk_w32(eth, status, MTK_QMTK_INT_STATUS);
-@@ -1382,6 +1384,7 @@ static int mtk_stop(struct net_device *dev)
+@@ -1383,6 +1385,7 @@ static int mtk_stop(struct net_device *dev)
struct mtk_mac *mac = netdev_priv(dev);
struct mtk_eth *eth = mac->hw;
netif_tx_disable(dev);
phy_stop(mac->phy_dev);
-@@ -1581,11 +1584,13 @@ static int mtk_set_settings(struct net_device *dev,
+@@ -1582,11 +1585,13 @@ static int mtk_set_settings(struct net_device *dev,
{
struct mtk_mac *mac = netdev_priv(dev);
+++ /dev/null
-From 1e1f2c5ea2af34017a398ab11cffac142adea87e Mon Sep 17 00:00:00 2001
-From: John Crispin <blogic@openwrt.org>
-Date: Sat, 23 Apr 2016 12:57:21 +0200
-Subject: [PATCH 91/91] net-next: mediatek: remove BQL
-
-Signed-off-by: John Crispin <blogic@openwrt.org>
----
- drivers/net/ethernet/mediatek/mtk_eth_soc.c | 19 -------------------
- 1 file changed, 19 deletions(-)
-
-diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-index b466f45..68f39ed 100644
---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -653,15 +653,6 @@ static int mtk_tx_map(struct sk_buff *skb, struct net_device *dev,
- WRITE_ONCE(itxd->txd3, (TX_DMA_SWC | TX_DMA_PLEN0(skb_headlen(skb)) |
- (!nr_frags * TX_DMA_LS0)));
-
-- /* we have a single DMA ring so BQL needs to be updated for all devices
-- * sitting on this ring
-- */
-- for (i = 0; i < MTK_MAC_COUNT; i++) {
-- if (!eth->netdev[i])
-- continue;
-- netdev_sent_queue(dev, skb->len);
-- }
--
- skb_tx_timestamp(skb);
-
- ring->next_free = mtk_qdma_phys_to_virt(ring, txd->txd2);
-@@ -894,7 +885,6 @@ static int mtk_poll_tx(struct mtk_eth *eth, int budget)
- unsigned int bytes = 0, done = 0;
- u32 cpu, dma;
- static int condition;
-- int i;
-
- cpu = mtk_r32(eth, MTK_QTX_CRX_PTR);
- dma = mtk_r32(eth, MTK_QTX_DRX_PTR);
-@@ -935,15 +925,6 @@ static int mtk_poll_tx(struct mtk_eth *eth, int budget)
-
- mtk_w32(eth, cpu, MTK_QTX_CRX_PTR);
-
-- /* we have a single DMA ring so BQL needs to be updated for all devices
-- * sitting on this ring
-- */
-- for (i = 0; i < MTK_MAC_COUNT; i++) {
-- if (!eth->netdev[i])
-- continue;
-- netdev_completed_queue(eth->netdev[i], done, bytes);
-- }
--
- /* read hw index again make sure no new tx packet */
- if (cpu == dma && cpu == mtk_r32(eth, MTK_QTX_DRX_PTR))
- mtk_w32(eth, MTK_TX_DONE_INT, MTK_QMTK_INT_STATUS);
---
-1.7.10.4
-
--- /dev/null
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -775,6 +775,8 @@
+ mt6589-aquaris5.dtb \
+ mt6592-evb.dtb \
+ mt7623-evb.dtb \
++ mt7623-eMMC.dtb \
++ mt7623-NAND.dtb \
+ mt8127-moose.dtb \
+ mt8135-evbp1.dtb
+ dtb-$(CONFIG_ARCH_ZX) += zx296702-ad1.dtb
projects / openwrt.git / commitdiff