bcm63xx: fix USB base registers and IRQs for BCM6328
authorjogo <jogo@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Sun, 5 Aug 2012 23:18:22 +0000 (23:18 +0000)
committerjogo <jogo@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Sun, 5 Aug 2012 23:18:22 +0000 (23:18 +0000)
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33005 3c298f89-4303-0410-b956-a3cf2f4a3e73

target/linux/brcm63xx/patches-3.3/107-MIPS-BCM63XX-Fix-USB-IRQ-definitions-for-6328.patch [new file with mode: 0644]
target/linux/brcm63xx/patches-3.3/108-BCM63XX-Add-register-definitions-for-USBD-depen.patch [new file with mode: 0644]
target/linux/brcm63xx/patches-3.3/309-MIPS-BCM63XX-add-HSSPI-register-definitions.patch
target/linux/brcm63xx/patches-3.3/312-MIPS-BCM63XX-add-basic-BCM6362-support.patch
target/linux/brcm63xx/patches-3.3/313-MIPS-BCM63XX-enable-pcie-for-BCM6362.patch
target/linux/brcm63xx/patches-3.3/415-bcm63xx_enet-add-support-for-bcm6368-internal-ethern.patch
target/linux/brcm63xx/patches-3.3/422-bcm63xx_enet-enable-rgmii-clock-on-external-ports.patch
target/linux/brcm63xx/patches-3.3/427-MIPS-BCM63XX-Register-SPI-flash-if-present.patch
target/linux/brcm63xx/patches-3.3/428-MIPS-BCM63XX-add-flash-detection-for-BCM6362.patch
target/linux/brcm63xx/patches-3.3/440-MIPS-BCM63XX-enable-SPI-controller-for-BCM6362.patch

diff --git a/target/linux/brcm63xx/patches-3.3/107-MIPS-BCM63XX-Fix-USB-IRQ-definitions-for-6328.patch b/target/linux/brcm63xx/patches-3.3/107-MIPS-BCM63XX-Fix-USB-IRQ-definitions-for-6328.patch
new file mode 100644 (file)
index 0000000..c9d0421
--- /dev/null
@@ -0,0 +1,26 @@
+From 960e1ef3c5b2d69a4a5a6984b6408d65221dd86c Mon Sep 17 00:00:00 2001
+From: Kevin Cernekee <cernekee@gmail.com>
+Date: Sat, 23 Jun 2012 04:14:55 +0000
+Subject: [PATCH 06/81] MIPS: BCM63XX: Fix USB IRQ definitions for 6328
+
+OHCI/EHCI are in the high (second) word.  Not currently used by any
+driver.
+
+Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
+---
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h |    4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -602,8 +602,8 @@ enum bcm63xx_irq {
+ #define BCM_6328_ENET0_IRQ            0
+ #define BCM_6328_ENET1_IRQ            0
+ #define BCM_6328_ENET_PHY_IRQ         (IRQ_INTERNAL_BASE + 12)
+-#define BCM_6328_OHCI0_IRQ            (IRQ_INTERNAL_BASE + 9)
+-#define BCM_6328_EHCI0_IRQ            (IRQ_INTERNAL_BASE + 10)
++#define BCM_6328_OHCI0_IRQ            (BCM_6328_HIGH_IRQ_BASE + 9)
++#define BCM_6328_EHCI0_IRQ            (BCM_6328_HIGH_IRQ_BASE + 10)
+ #define BCM_6328_PCMCIA_IRQ           0
+ #define BCM_6328_ENET0_RXDMA_IRQ      0
+ #define BCM_6328_ENET0_TXDMA_IRQ      0
diff --git a/target/linux/brcm63xx/patches-3.3/108-BCM63XX-Add-register-definitions-for-USBD-depen.patch b/target/linux/brcm63xx/patches-3.3/108-BCM63XX-Add-register-definitions-for-USBD-depen.patch
new file mode 100644 (file)
index 0000000..c2130a5
--- /dev/null
@@ -0,0 +1,62 @@
+From 21bb8141c205ae48d331787debb6b272add90ac7 Mon Sep 17 00:00:00 2001
+From: Kevin Cernekee <cernekee@gmail.com>
+Date: Sat, 23 Jun 2012 04:14:54 +0000
+Subject: [PATCH 05/81] MIPS: BCM63XX: Add register definitions for USBD
+ dependencies
+
+The USB 2.0 device depends on some functionality in other blocks, such
+as GPIO and USBH.  Add those register definitions here.
+
+Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
+---
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h  |    6 +++---
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h |    8 ++++++++
+ 2 files changed, 11 insertions(+), 3 deletions(-)
+
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -184,9 +184,9 @@ enum bcm63xx_regs_set {
+ #define BCM_6328_SPI_BASE             (0xdeadbeef)
+ #define BCM_6328_UDC0_BASE            (0xdeadbeef)
+ #define BCM_6328_USBDMA_BASE          (0xdeadbeef)
+-#define BCM_6328_OHCI0_BASE           (0xdeadbeef)
++#define BCM_6328_OHCI0_BASE           (0xb0002600)
+ #define BCM_6328_OHCI_PRIV_BASE               (0xdeadbeef)
+-#define BCM_6328_USBH_PRIV_BASE               (0xdeadbeef)
++#define BCM_6328_USBH_PRIV_BASE               (0xb0002700)
+ #define BCM_6328_MPI_BASE             (0xdeadbeef)
+ #define BCM_6328_PCMCIA_BASE          (0xdeadbeef)
+ #define BCM_6328_PCIE_BASE            (0xb0e40000)
+@@ -199,7 +199,7 @@ enum bcm63xx_regs_set {
+ #define BCM_6328_ENETDMAC_BASE                (0xb000da00)
+ #define BCM_6328_ENETDMAS_BASE                (0xb000dc00)
+ #define BCM_6328_ENETSW_BASE          (0xb0e00000)
+-#define BCM_6328_EHCI0_BASE           (0x10002500)
++#define BCM_6328_EHCI0_BASE           (0xb0002500)
+ #define BCM_6328_SDRAM_BASE           (0xdeadbeef)
+ #define BCM_6328_MEMC_BASE            (0xdeadbeef)
+ #define BCM_6328_DDR_BASE             (0xb0003000)
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -543,6 +543,12 @@
+ #define GPIO_MODE_6368_SPI_SSN5               (1 << 31)
++#define GPIO_PINMUX_OTHR_REG          0x24
++#define GPIO_PINMUX_OTHR_6328_USB_SHIFT       12
++#define GPIO_PINMUX_OTHR_6328_USB_MASK        (3 << GPIO_PINMUX_OTHR_6328_USB_SHIFT)
++#define GPIO_PINMUX_OTHR_6328_USB_HOST        (1 << GPIO_PINMUX_OTHR_6328_USB_SHIFT)
++#define GPIO_PINMUX_OTHR_6328_USB_DEV (2 << GPIO_PINMUX_OTHR_6328_USB_SHIFT)
++
+ #define GPIO_BASEMODE_6368_REG                0x38
+ #define GPIO_BASEMODE_6368_UART2      0x1
+ #define GPIO_BASEMODE_6368_GPIO               0x0
+@@ -770,6 +776,8 @@
+ #define USBH_PRIV_SWAP_6358_REG               0x0
+ #define USBH_PRIV_SWAP_6368_REG               0x1c
++#define USBH_PRIV_SWAP_USBD_SHIFT     6
++#define USBH_PRIV_SWAP_USBD_MASK      (1 << USBH_PRIV_SWAP_USBD_SHIFT)
+ #define USBH_PRIV_SWAP_EHCI_ENDN_SHIFT        4
+ #define USBH_PRIV_SWAP_EHCI_ENDN_MASK (1 << USBH_PRIV_SWAP_EHCI_ENDN_SHIFT)
+ #define USBH_PRIV_SWAP_EHCI_DATA_SHIFT        3
index 1720ed6..5e2cd96 100644 (file)
@@ -34,7 +34,7 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 +#define BCM_6328_HSSPI_BASE           (0xb0001000)
  #define BCM_6328_UDC0_BASE            (0xdeadbeef)
  #define BCM_6328_USBDMA_BASE          (0xdeadbeef)
- #define BCM_6328_OHCI0_BASE           (0xdeadbeef)
+ #define BCM_6328_OHCI0_BASE           (0xb0002600)
 @@ -227,6 +230,7 @@ enum bcm63xx_regs_set {
  #define BCM_6338_UART1_BASE           (0xdeadbeef)
  #define BCM_6338_GPIO_BASE            (0xfffe0400)
@@ -104,8 +104,8 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
  #define BCM_6328_ENET1_IRQ            0
  #define BCM_6328_ENET_PHY_IRQ         (IRQ_INTERNAL_BASE + 12)
 +#define BCM_6328_HSSPI_IRQ            (IRQ_INTERNAL_BASE + 29)
- #define BCM_6328_OHCI0_IRQ            (IRQ_INTERNAL_BASE + 9)
- #define BCM_6328_EHCI0_IRQ            (IRQ_INTERNAL_BASE + 10)
+ #define BCM_6328_OHCI0_IRQ            (BCM_6328_HIGH_IRQ_BASE + 9)
+ #define BCM_6328_EHCI0_IRQ            (BCM_6328_HIGH_IRQ_BASE + 10)
  #define BCM_6328_PCMCIA_IRQ           0
 @@ -640,6 +652,7 @@ enum bcm63xx_irq {
  #define BCM_6338_ENET0_IRQ            (IRQ_INTERNAL_BASE + 8)
@@ -157,7 +157,7 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
        [IRQ_ENET0_RXDMA]       = BCM_## __cpu ##_ENET0_RXDMA_IRQ,      \
 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
 +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -1231,4 +1231,51 @@
+@@ -1239,4 +1239,51 @@
  
  #define PCIE_DEVICE_OFFSET            0x8000
  
index 6285929..5b6ecbe 100644 (file)
@@ -472,7 +472,7 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
  #define SOFTRESET_6368_SPI_MASK               (1 << 0)
  #define SOFTRESET_6368_MPI_MASK               (1 << 3)
  #define SOFTRESET_6368_EPHY_MASK      (1 << 6)
-@@ -1174,6 +1227,12 @@
+@@ -1182,6 +1235,12 @@
  #define SERDES_PCIE_EN                        (1 << 0)
  #define SERDES_PCIE_EXD_EN            (1 << 15)
  
index 1b3a0d9..36024d1 100644 (file)
@@ -11,7 +11,7 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 
 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
 +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -1223,7 +1223,8 @@
+@@ -1231,7 +1231,8 @@
  /*************************************************************************
   * _REG relative to RSET_MISC
   *************************************************************************/
index 7752b4e..67bf01a 100644 (file)
@@ -205,7 +205,7 @@ Subject: [PATCH 31/63] bcm63xx_enet: add support for bcm6368 internal ethernet s
  #endif /* ! BCM63XX_DEV_ENET_H_ */
 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
 +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -803,10 +803,60 @@
+@@ -809,10 +809,60 @@
   * _REG relative to RSET_ENETSW
   *************************************************************************/
  
index 217ddae..7d1f3f3 100644 (file)
@@ -10,7 +10,7 @@ Subject: [PATCH 54/81] bcm63xx_enet: enable rgmii clock on external ports
 
 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
 +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -832,6 +832,19 @@
+@@ -838,6 +838,19 @@
  #define ENETSW_PORTOV_FDX_MASK                (1 << 1)
  #define ENETSW_PORTOV_LINKUP_MASK     (1 << 0)
  
index 229a585..14776af 100644 (file)
@@ -84,7 +84,7 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
                return -ENODEV;
 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
 +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -608,6 +608,7 @@
+@@ -614,6 +614,7 @@
  #define GPIO_STRAPBUS_REG             0x40
  #define STRAPBUS_6358_BOOT_SEL_PARALLEL       (1 << 1)
  #define STRAPBUS_6358_BOOT_SEL_SERIAL (0 << 1)
@@ -92,7 +92,7 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
  #define STRAPBUS_6368_BOOT_SEL_MASK   0x3
  #define STRAPBUS_6368_BOOT_SEL_NAND   0
  #define STRAPBUS_6368_BOOT_SEL_SERIAL 1
-@@ -1300,6 +1301,7 @@
+@@ -1308,6 +1309,7 @@
  #define STRAPBUS_6362_BOOT_SEL_NAND   (0 << 15)
  
  #define MISC_STRAPBUS_6328_REG                0x240
index d913201..98a229b 100644 (file)
@@ -40,7 +40,7 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
                return spi_register_board_info(bcm63xx_spi_flash_info,
 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
 +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -1296,6 +1296,7 @@
+@@ -1304,6 +1304,7 @@
  
  #define MISC_STRAPBUS_6362_REG                0x14
  #define STRAPBUS_6362_FCVO_SHIFT      1
index 9057eba..f1f1342 100644 (file)
@@ -76,7 +76,7 @@ Subject: [PATCH 58/84] MIPS: BCM63XX: enable SPI controller for BCM6362
  #endif
 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
 +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -1215,6 +1215,22 @@
+@@ -1223,6 +1223,22 @@
  #define SPI_6358_MSG_TAIL             0x709
  #define SPI_6358_RX_TAIL              0x70B