ar71xx: allow unknown multicast frames to pass to the CPU on AR934x
authornbd <nbd@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Mon, 11 Feb 2013 18:59:05 +0000 (18:59 +0000)
committernbd <nbd@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Mon, 11 Feb 2013 18:59:05 +0000 (18:59 +0000)
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@35564 3c298f89-4303-0410-b956-a3cf2f4a3e73

target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c

index 49f0775..2114010 100644 (file)
 #define   AR934X_REG_OPER_MODE1_PHY4_MII_EN    BIT(28)
 
 #define AR934X_REG_FLOOD_MASK          0x2c
 #define   AR934X_REG_OPER_MODE1_PHY4_MII_EN    BIT(28)
 
 #define AR934X_REG_FLOOD_MASK          0x2c
+#define   AR934X_FLOOD_MASK_MC_DP(_p)  BIT(16 + (_p))
 #define   AR934X_FLOOD_MASK_BC_DP(_p)  BIT(25 + (_p))
 
 #define AR934X_REG_QM_CTRL             0x3c
 #define   AR934X_FLOOD_MASK_BC_DP(_p)  BIT(25 + (_p))
 
 #define AR934X_REG_QM_CTRL             0x3c
@@ -580,9 +581,10 @@ static void ar7240sw_setup(struct ar7240sw *as)
                /* Enable ARP frame acknowledge */
                ar7240sw_reg_set(mii, AR934X_REG_QM_CTRL,
                                 AR934X_QM_CTRL_ARP_EN);
                /* Enable ARP frame acknowledge */
                ar7240sw_reg_set(mii, AR934X_REG_QM_CTRL,
                                 AR934X_QM_CTRL_ARP_EN);
-               /* Enable Broadcast frames transmitted to the CPU */
+               /* Enable Broadcast/Multicast frames transmitted to the CPU */
                ar7240sw_reg_set(mii, AR934X_REG_FLOOD_MASK,
                ar7240sw_reg_set(mii, AR934X_REG_FLOOD_MASK,
-                                AR934X_FLOOD_MASK_BC_DP(0));
+                                AR934X_FLOOD_MASK_BC_DP(0) |
+                                AR934X_FLOOD_MASK_MC_DP(0));
 
                /* Enable MIB counters */
                ar7240sw_reg_set(mii, AR7240_REG_MIB_FUNCTION0,
 
                /* Enable MIB counters */
                ar7240sw_reg_set(mii, AR7240_REG_MIB_FUNCTION0,