ar71xx: use correct fractional dividers for {CPU,DDR}_PLL on QCA955x
authorjuhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Mon, 10 Sep 2012 14:38:01 +0000 (14:38 +0000)
committerjuhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Mon, 10 Sep 2012 14:38:01 +0000 (14:38 +0000)
commit29f447b9fd21fe0912cecfa6f2ff2bf229820564
treeda66bb7eb6bf89f8478bf887520747c84b08c1a8
parente1ee097247287ddcec6559db1e84e63ccf268b8a
ar71xx: use correct fractional dividers for {CPU,DDR}_PLL on QCA955x

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33362 3c298f89-4303-0410-b956-a3cf2f4a3e73
target/linux/ar71xx/patches-3.3/162-MIPS-ath79-add-clock-setup-for-the-QCA955X-SoCs.patch