X-Git-Url: https://git.archive.openwrt.org/?p=openwrt.git;a=blobdiff_plain;f=target%2Flinux%2Framips%2Fdts%2Fmt7621.dtsi;h=c055285bc63feab5213ea8361f83e6328410f579;hp=fd2e1008a36dd5c722b1b0770130c8e4d4478a6f;hb=363f1fa23c09abebd13c19d5f823d0508077a6d8;hpb=9bbda3026e08cb963da37debfe27da3ad962e907

diff --git a/target/linux/ramips/dts/mt7621.dtsi b/target/linux/ramips/dts/mt7621.dtsi
index fd2e1008a3..c055285bc6 100644
--- a/target/linux/ramips/dts/mt7621.dtsi
+++ b/target/linux/ramips/dts/mt7621.dtsi
@@ -1,3 +1,5 @@
+#include <dt-bindings/interrupt-controller/mips-gic.h>
+
 / {
 	#address-cells = <1>;
 	#size-cells = <1>;
@@ -20,6 +22,26 @@
 		compatible = "mti,cpu-interrupt-controller";
 	};
 
+	aliases {
+		serial0 = &uartlite;
+	};
+
+	cpuclock: cpuclock@0 {
+		#clock-cells = <0>;
+		compatible = "fixed-clock";
+
+		/* FIXME: there should be way to detect this */
+		clock-frequency = <880000000>;
+	};
+
+	sysclock: sysclock@0 {
+		#clock-cells = <0>;
+		compatible = "fixed-clock";
+
+		/* FIXME: there should be way to detect this */
+		clock-frequency = <50000000>;
+	};
+
 	palmbus@1E000000 {
 		compatible = "palmbus";
 		reg = <0x1E000000 0x100000>;
@@ -72,12 +94,24 @@
 			reg = <0x300 0x100>;
 		};
 
-		uartlite@c00 {
+		cpc@1fbf0000 {
+			     compatible = "mtk,mt7621-cpc";
+			     reg = <0x1fbf0000 0x8000>;
+		};
+
+		mc@1fbf8000 {
+			    compatible = "mtk,mt7621-mc";
+			    reg = <0x1fbf8000 0x8000>;
+ 		};
+
+		uartlite: uartlite@c00 {
 			compatible = "ns16550a";
 			reg = <0xc00 0x100>;
 
+			clocks = <&sysclock>;
+
 			interrupt-parent = <&gic>;
-			interrupts = <26>;
+			interrupts = <GIC_SHARED 26 IRQ_TYPE_LEVEL_HIGH>;
 
 			reg-shift = <2>;
 			reg-io-width = <4>;
@@ -90,6 +124,8 @@
 			compatible = "ralink,mt7621-spi";
 			reg = <0xb00 0x100>;
 
+			clocks = <&sysclock>;
+
 			resets = <&rstctrl 18>;
 			reset-names = "spi";
 
@@ -210,61 +246,52 @@
 		reg = <0x1E130000 4000>;
 
 		interrupt-parent = <&gic>;
-		interrupts = <20>;
+		interrupts = <GIC_SHARED 20 IRQ_TYPE_LEVEL_HIGH>;
 	};
 
 	xhci@1E1C0000 {
-		status = "disabled";
+		status = "okay";
+
+		compatible = "mediatek,mt8173-xhci";
+		reg = <0x1e1c0000 0x1000
+		       0x1e1d0700 0x0100>;
 
-		compatible = "xhci-platform";
-		reg = <0x1E1C0000 4000>;
+		clocks = <&sysclock>;
+		clock-names = "sys_ck";
 
 		interrupt-parent = <&gic>;
-		interrupts = <22>;
+		interrupts = <GIC_SHARED 22 IRQ_TYPE_LEVEL_HIGH>;
 	};
 
-	gic: gic@1fbc0000 {
-		#address-cells = <0>;
-		#interrupt-cells = <1>;
+	gic: interrupt-controller@1fbc0000 {
+		compatible = "mti,gic";
+		reg = <0x1fbc0000 0x2000>;
+
 		interrupt-controller;
-		compatible = "ralink,mt7621-gic";
-		reg = < 0x1fbc0000 0x80 /* gic */
-			0x1fbf0000 0x8000 /* cpc */
-			0x1fbf8000 0x8000 /* gpmc */
-		>;
+		#interrupt-cells = <3>;
+
+		mti,reserved-cpu-vectors = <7>;
+
+		timer {
+			compatible = "mti,gic-timer";
+			interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>;
+			clocks = <&cpuclock>;
+		};
 	};
 
 	nand@1e003000 {
+		status = "disabled";
+
 		compatible = "mtk,mt7621-nand";
 		bank-width = <2>;
 		reg = <0x1e003000 0x800
 			0x1e003800 0x800>;
 		#address-cells = <1>;
 		#size-cells = <1>;
-
-		partition@0 {
-			label = "uboot";
-			reg = <0x00000 0x80000>; /* 64 KB */
-		};
-
-		partition@80000 {
-			label = "uboot_env";
-			reg = <0x80000 0x80000>; /* 64 KB */
-		};
-
-		partition@100000 {
-			label = "factory";
-			reg = <0x100000 0x40000>;
-		};
-
-		partition@140000 {
-			label = "rootfs";
-			reg = <0x140000 0xec0000>;
-		};
 	};
 
 	ethernet@1e100000 {
-		compatible = "ralink,mt7621-eth";
+		compatible = "mediatek,mt7621-eth";
 		reg = <0x1e100000 10000>;
 
 		#address-cells = <1>;
@@ -274,7 +301,9 @@
 		reset-names = "fe", "eth";
 
 		interrupt-parent = <&gic>;
-		interrupts = <3>;
+		interrupts = <GIC_SHARED 3 IRQ_TYPE_LEVEL_HIGH>;
+
+		mediatek,switch = <&gsw>;
 
 		mdio-bus {
 			#address-cells = <1>;
@@ -287,11 +316,11 @@
 		};
 	};
 
-	gsw@1e110000 {
-		compatible = "ralink,mt7620a-gsw";
+	gsw: gsw@1e110000 {
+		compatible = "mediatek,mt7621-gsw";
 		reg = <0x1e110000 8000>;
 		interrupt-parent = <&gic>;
-		interrupts = <23>;
+		interrupts = <GIC_SHARED 23 IRQ_TYPE_LEVEL_HIGH>;
 	};
 
 	pcie@1e140000 {
@@ -313,6 +342,11 @@
 			0x01000000 0 0x00000000 0x1e160000 0 0x00010000 /* io space */
 		>;
 
+		interrupt-parent = <&gic>;
+		interrupts = <GIC_SHARED 4 IRQ_TYPE_LEVEL_HIGH
+				GIC_SHARED 24 IRQ_TYPE_LEVEL_HIGH
+				GIC_SHARED 25 IRQ_TYPE_LEVEL_HIGH>;
+
 		status = "okay";
 
 		pcie0 {